Marco Zecchini
/
Example_RTOS
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mbed-os/targets/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_hal_sdadc.h@0:9fca2b23d0ba, 2019-02-23 (annotated)
- Committer:
- marcozecchini
- Date:
- Sat Feb 23 12:13:36 2019 +0000
- Revision:
- 0:9fca2b23d0ba
final commit
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| marcozecchini | 0:9fca2b23d0ba | 1 | /** |
| marcozecchini | 0:9fca2b23d0ba | 2 | ****************************************************************************** |
| marcozecchini | 0:9fca2b23d0ba | 3 | * @file stm32f3xx_hal_sdadc.h |
| marcozecchini | 0:9fca2b23d0ba | 4 | * @author MCD Application Team |
| marcozecchini | 0:9fca2b23d0ba | 5 | * @version V1.4.0 |
| marcozecchini | 0:9fca2b23d0ba | 6 | * @date 16-December-2016 |
| marcozecchini | 0:9fca2b23d0ba | 7 | * @brief This file contains all the functions prototypes for the SDADC |
| marcozecchini | 0:9fca2b23d0ba | 8 | * firmware library. |
| marcozecchini | 0:9fca2b23d0ba | 9 | ****************************************************************************** |
| marcozecchini | 0:9fca2b23d0ba | 10 | * @attention |
| marcozecchini | 0:9fca2b23d0ba | 11 | * |
| marcozecchini | 0:9fca2b23d0ba | 12 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| marcozecchini | 0:9fca2b23d0ba | 13 | * |
| marcozecchini | 0:9fca2b23d0ba | 14 | * Redistribution and use in source and binary forms, with or without modification, |
| marcozecchini | 0:9fca2b23d0ba | 15 | * are permitted provided that the following conditions are met: |
| marcozecchini | 0:9fca2b23d0ba | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
| marcozecchini | 0:9fca2b23d0ba | 17 | * this list of conditions and the following disclaimer. |
| marcozecchini | 0:9fca2b23d0ba | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| marcozecchini | 0:9fca2b23d0ba | 19 | * this list of conditions and the following disclaimer in the documentation |
| marcozecchini | 0:9fca2b23d0ba | 20 | * and/or other materials provided with the distribution. |
| marcozecchini | 0:9fca2b23d0ba | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| marcozecchini | 0:9fca2b23d0ba | 22 | * may be used to endorse or promote products derived from this software |
| marcozecchini | 0:9fca2b23d0ba | 23 | * without specific prior written permission. |
| marcozecchini | 0:9fca2b23d0ba | 24 | * |
| marcozecchini | 0:9fca2b23d0ba | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| marcozecchini | 0:9fca2b23d0ba | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| marcozecchini | 0:9fca2b23d0ba | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| marcozecchini | 0:9fca2b23d0ba | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| marcozecchini | 0:9fca2b23d0ba | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| marcozecchini | 0:9fca2b23d0ba | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| marcozecchini | 0:9fca2b23d0ba | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| marcozecchini | 0:9fca2b23d0ba | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| marcozecchini | 0:9fca2b23d0ba | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| marcozecchini | 0:9fca2b23d0ba | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| marcozecchini | 0:9fca2b23d0ba | 35 | * |
| marcozecchini | 0:9fca2b23d0ba | 36 | ****************************************************************************** |
| marcozecchini | 0:9fca2b23d0ba | 37 | */ |
| marcozecchini | 0:9fca2b23d0ba | 38 | |
| marcozecchini | 0:9fca2b23d0ba | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| marcozecchini | 0:9fca2b23d0ba | 40 | #ifndef __STM32F3xx_SDADC_H |
| marcozecchini | 0:9fca2b23d0ba | 41 | #define __STM32F3xx_SDADC_H |
| marcozecchini | 0:9fca2b23d0ba | 42 | |
| marcozecchini | 0:9fca2b23d0ba | 43 | #ifdef __cplusplus |
| marcozecchini | 0:9fca2b23d0ba | 44 | extern "C" { |
| marcozecchini | 0:9fca2b23d0ba | 45 | #endif |
| marcozecchini | 0:9fca2b23d0ba | 46 | |
| marcozecchini | 0:9fca2b23d0ba | 47 | #if defined(STM32F373xC) || defined(STM32F378xx) |
| marcozecchini | 0:9fca2b23d0ba | 48 | |
| marcozecchini | 0:9fca2b23d0ba | 49 | /* Includes ------------------------------------------------------------------*/ |
| marcozecchini | 0:9fca2b23d0ba | 50 | #include "stm32f3xx_hal_def.h" |
| marcozecchini | 0:9fca2b23d0ba | 51 | |
| marcozecchini | 0:9fca2b23d0ba | 52 | /** @addtogroup STM32F3xx_HAL_Driver |
| marcozecchini | 0:9fca2b23d0ba | 53 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 54 | */ |
| marcozecchini | 0:9fca2b23d0ba | 55 | |
| marcozecchini | 0:9fca2b23d0ba | 56 | /** @addtogroup SDADC |
| marcozecchini | 0:9fca2b23d0ba | 57 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 58 | */ |
| marcozecchini | 0:9fca2b23d0ba | 59 | |
| marcozecchini | 0:9fca2b23d0ba | 60 | /* Exported types ------------------------------------------------------------*/ |
| marcozecchini | 0:9fca2b23d0ba | 61 | /** @defgroup SDADC_Exported_Types SDADC Exported Types |
| marcozecchini | 0:9fca2b23d0ba | 62 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 63 | */ |
| marcozecchini | 0:9fca2b23d0ba | 64 | |
| marcozecchini | 0:9fca2b23d0ba | 65 | |
| marcozecchini | 0:9fca2b23d0ba | 66 | /** |
| marcozecchini | 0:9fca2b23d0ba | 67 | * @brief HAL SDADC States definition |
| marcozecchini | 0:9fca2b23d0ba | 68 | */ |
| marcozecchini | 0:9fca2b23d0ba | 69 | typedef enum |
| marcozecchini | 0:9fca2b23d0ba | 70 | { |
| marcozecchini | 0:9fca2b23d0ba | 71 | HAL_SDADC_STATE_RESET = 0x00U, /*!< SDADC not initialized */ |
| marcozecchini | 0:9fca2b23d0ba | 72 | HAL_SDADC_STATE_READY = 0x01U, /*!< SDADC initialized and ready for use */ |
| marcozecchini | 0:9fca2b23d0ba | 73 | HAL_SDADC_STATE_CALIB = 0x02U, /*!< SDADC calibration in progress */ |
| marcozecchini | 0:9fca2b23d0ba | 74 | HAL_SDADC_STATE_REG = 0x03U, /*!< SDADC regular conversion in progress */ |
| marcozecchini | 0:9fca2b23d0ba | 75 | HAL_SDADC_STATE_INJ = 0x04U, /*!< SDADC injected conversion in progress */ |
| marcozecchini | 0:9fca2b23d0ba | 76 | HAL_SDADC_STATE_REG_INJ = 0x05U, /*!< SDADC regular and injected conversions in progress */ |
| marcozecchini | 0:9fca2b23d0ba | 77 | HAL_SDADC_STATE_ERROR = 0xFFU, /*!< SDADC state error */ |
| marcozecchini | 0:9fca2b23d0ba | 78 | }HAL_SDADC_StateTypeDef; |
| marcozecchini | 0:9fca2b23d0ba | 79 | |
| marcozecchini | 0:9fca2b23d0ba | 80 | /** |
| marcozecchini | 0:9fca2b23d0ba | 81 | * @brief SDADC Init Structure definition |
| marcozecchini | 0:9fca2b23d0ba | 82 | */ |
| marcozecchini | 0:9fca2b23d0ba | 83 | typedef struct |
| marcozecchini | 0:9fca2b23d0ba | 84 | { |
| marcozecchini | 0:9fca2b23d0ba | 85 | uint32_t IdleLowPowerMode; /*!< Specifies if SDADC can enter in power down or standby when idle. |
| marcozecchini | 0:9fca2b23d0ba | 86 | This parameter can be a value of @ref SDADC_Idle_Low_Power_Mode */ |
| marcozecchini | 0:9fca2b23d0ba | 87 | uint32_t FastConversionMode; /*!< Specifies if Fast conversion mode is enabled or not. |
| marcozecchini | 0:9fca2b23d0ba | 88 | This parameter can be a value of @ref SDADC_Fast_Conv_Mode */ |
| marcozecchini | 0:9fca2b23d0ba | 89 | uint32_t SlowClockMode; /*!< Specifies if slow clock mode is enabled or not. |
| marcozecchini | 0:9fca2b23d0ba | 90 | This parameter can be a value of @ref SDADC_Slow_Clock_Mode */ |
| marcozecchini | 0:9fca2b23d0ba | 91 | uint32_t ReferenceVoltage; /*!< Specifies the reference voltage. |
| marcozecchini | 0:9fca2b23d0ba | 92 | Note: This parameter is common to all SDADC instances. |
| marcozecchini | 0:9fca2b23d0ba | 93 | This parameter can be a value of @ref SDADC_Reference_Voltage */ |
| marcozecchini | 0:9fca2b23d0ba | 94 | }SDADC_InitTypeDef; |
| marcozecchini | 0:9fca2b23d0ba | 95 | |
| marcozecchini | 0:9fca2b23d0ba | 96 | /** |
| marcozecchini | 0:9fca2b23d0ba | 97 | * @brief SDADC handle Structure definition |
| marcozecchini | 0:9fca2b23d0ba | 98 | */ |
| marcozecchini | 0:9fca2b23d0ba | 99 | typedef struct |
| marcozecchini | 0:9fca2b23d0ba | 100 | { |
| marcozecchini | 0:9fca2b23d0ba | 101 | SDADC_TypeDef *Instance; /*!< SDADC registers base address */ |
| marcozecchini | 0:9fca2b23d0ba | 102 | SDADC_InitTypeDef Init; /*!< SDADC init parameters */ |
| marcozecchini | 0:9fca2b23d0ba | 103 | DMA_HandleTypeDef *hdma; /*!< SDADC DMA Handle parameters */ |
| marcozecchini | 0:9fca2b23d0ba | 104 | uint32_t RegularContMode; /*!< Regular conversion continuous mode */ |
| marcozecchini | 0:9fca2b23d0ba | 105 | uint32_t InjectedContMode; /*!< Injected conversion continuous mode */ |
| marcozecchini | 0:9fca2b23d0ba | 106 | uint32_t InjectedChannelsNbr; /*!< Number of channels in injected sequence */ |
| marcozecchini | 0:9fca2b23d0ba | 107 | uint32_t InjConvRemaining; /*!< Injected conversion remaining */ |
| marcozecchini | 0:9fca2b23d0ba | 108 | uint32_t RegularTrigger; /*!< Current trigger used for regular conversion */ |
| marcozecchini | 0:9fca2b23d0ba | 109 | uint32_t InjectedTrigger; /*!< Current trigger used for injected conversion */ |
| marcozecchini | 0:9fca2b23d0ba | 110 | uint32_t ExtTriggerEdge; /*!< Rising, falling or both edges selected */ |
| marcozecchini | 0:9fca2b23d0ba | 111 | uint32_t RegularMultimode; /*!< current type of regular multimode */ |
| marcozecchini | 0:9fca2b23d0ba | 112 | uint32_t InjectedMultimode; /*!< Current type of injected multimode */ |
| marcozecchini | 0:9fca2b23d0ba | 113 | HAL_SDADC_StateTypeDef State; /*!< SDADC state */ |
| marcozecchini | 0:9fca2b23d0ba | 114 | uint32_t ErrorCode; /*!< SDADC Error code */ |
| marcozecchini | 0:9fca2b23d0ba | 115 | }SDADC_HandleTypeDef; |
| marcozecchini | 0:9fca2b23d0ba | 116 | |
| marcozecchini | 0:9fca2b23d0ba | 117 | /** |
| marcozecchini | 0:9fca2b23d0ba | 118 | * @brief SDADC Configuration Register Parameter Structure |
| marcozecchini | 0:9fca2b23d0ba | 119 | */ |
| marcozecchini | 0:9fca2b23d0ba | 120 | typedef struct |
| marcozecchini | 0:9fca2b23d0ba | 121 | { |
| marcozecchini | 0:9fca2b23d0ba | 122 | uint32_t InputMode; /*!< Specifies the input mode (single ended, differential...) |
| marcozecchini | 0:9fca2b23d0ba | 123 | This parameter can be any value of @ref SDADC_InputMode */ |
| marcozecchini | 0:9fca2b23d0ba | 124 | uint32_t Gain; /*!< Specifies the gain setting. |
| marcozecchini | 0:9fca2b23d0ba | 125 | This parameter can be any value of @ref SDADC_Gain */ |
| marcozecchini | 0:9fca2b23d0ba | 126 | uint32_t CommonMode; /*!< Specifies the common mode setting (VSSA, VDDA, VDDA/2U). |
| marcozecchini | 0:9fca2b23d0ba | 127 | This parameter can be any value of @ref SDADC_CommonMode */ |
| marcozecchini | 0:9fca2b23d0ba | 128 | uint32_t Offset; /*!< Specifies the 12-bit offset value. |
| marcozecchini | 0:9fca2b23d0ba | 129 | This parameter can be any value lower or equal to 0x00000FFFU */ |
| marcozecchini | 0:9fca2b23d0ba | 130 | }SDADC_ConfParamTypeDef; |
| marcozecchini | 0:9fca2b23d0ba | 131 | |
| marcozecchini | 0:9fca2b23d0ba | 132 | /** |
| marcozecchini | 0:9fca2b23d0ba | 133 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 134 | */ |
| marcozecchini | 0:9fca2b23d0ba | 135 | |
| marcozecchini | 0:9fca2b23d0ba | 136 | /* Exported constants --------------------------------------------------------*/ |
| marcozecchini | 0:9fca2b23d0ba | 137 | |
| marcozecchini | 0:9fca2b23d0ba | 138 | /** @defgroup SDADC_Exported_Constants SDADC Exported Constants |
| marcozecchini | 0:9fca2b23d0ba | 139 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 140 | */ |
| marcozecchini | 0:9fca2b23d0ba | 141 | |
| marcozecchini | 0:9fca2b23d0ba | 142 | /** @defgroup SDADC_Idle_Low_Power_Mode SDADC Idle Low Power Mode |
| marcozecchini | 0:9fca2b23d0ba | 143 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 144 | */ |
| marcozecchini | 0:9fca2b23d0ba | 145 | #define SDADC_LOWPOWER_NONE (0x00000000U) |
| marcozecchini | 0:9fca2b23d0ba | 146 | #define SDADC_LOWPOWER_POWERDOWN SDADC_CR1_PDI |
| marcozecchini | 0:9fca2b23d0ba | 147 | #define SDADC_LOWPOWER_STANDBY SDADC_CR1_SBI |
| marcozecchini | 0:9fca2b23d0ba | 148 | /** |
| marcozecchini | 0:9fca2b23d0ba | 149 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 150 | */ |
| marcozecchini | 0:9fca2b23d0ba | 151 | |
| marcozecchini | 0:9fca2b23d0ba | 152 | /** @defgroup SDADC_Fast_Conv_Mode SDADC Fast Conversion Mode |
| marcozecchini | 0:9fca2b23d0ba | 153 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 154 | */ |
| marcozecchini | 0:9fca2b23d0ba | 155 | #define SDADC_FAST_CONV_DISABLE (0x00000000U) |
| marcozecchini | 0:9fca2b23d0ba | 156 | #define SDADC_FAST_CONV_ENABLE SDADC_CR2_FAST |
| marcozecchini | 0:9fca2b23d0ba | 157 | /** |
| marcozecchini | 0:9fca2b23d0ba | 158 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 159 | */ |
| marcozecchini | 0:9fca2b23d0ba | 160 | |
| marcozecchini | 0:9fca2b23d0ba | 161 | /** @defgroup SDADC_Slow_Clock_Mode SDADC Slow Clock Mode |
| marcozecchini | 0:9fca2b23d0ba | 162 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 163 | */ |
| marcozecchini | 0:9fca2b23d0ba | 164 | #define SDADC_SLOW_CLOCK_DISABLE (0x00000000U) |
| marcozecchini | 0:9fca2b23d0ba | 165 | #define SDADC_SLOW_CLOCK_ENABLE SDADC_CR1_SLOWCK |
| marcozecchini | 0:9fca2b23d0ba | 166 | /** |
| marcozecchini | 0:9fca2b23d0ba | 167 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 168 | */ |
| marcozecchini | 0:9fca2b23d0ba | 169 | |
| marcozecchini | 0:9fca2b23d0ba | 170 | /** @defgroup SDADC_Reference_Voltage SDADC Reference Voltage |
| marcozecchini | 0:9fca2b23d0ba | 171 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 172 | */ |
| marcozecchini | 0:9fca2b23d0ba | 173 | #define SDADC_VREF_EXT (0x00000000U) /*!< The reference voltage is forced externally using VREF pin */ |
| marcozecchini | 0:9fca2b23d0ba | 174 | #define SDADC_VREF_VREFINT1 SDADC_CR1_REFV_0 /*!< The reference voltage is forced internally to 1.22V VREFINT */ |
| marcozecchini | 0:9fca2b23d0ba | 175 | #define SDADC_VREF_VREFINT2 SDADC_CR1_REFV_1 /*!< The reference voltage is forced internally to 1.8V VREFINT */ |
| marcozecchini | 0:9fca2b23d0ba | 176 | #define SDADC_VREF_VDDA SDADC_CR1_REFV /*!< The reference voltage is forced internally to VDDA */ |
| marcozecchini | 0:9fca2b23d0ba | 177 | /** |
| marcozecchini | 0:9fca2b23d0ba | 178 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 179 | */ |
| marcozecchini | 0:9fca2b23d0ba | 180 | |
| marcozecchini | 0:9fca2b23d0ba | 181 | /** @defgroup SDADC_ConfIndex SDADC Configuration Index |
| marcozecchini | 0:9fca2b23d0ba | 182 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 183 | */ |
| marcozecchini | 0:9fca2b23d0ba | 184 | |
| marcozecchini | 0:9fca2b23d0ba | 185 | #define SDADC_CONF_INDEX_0 (0x00000000U) /*!< Configuration 0 Register selected */ |
| marcozecchini | 0:9fca2b23d0ba | 186 | #define SDADC_CONF_INDEX_1 (0x00000001U) /*!< Configuration 1 Register selected */ |
| marcozecchini | 0:9fca2b23d0ba | 187 | #define SDADC_CONF_INDEX_2 (0x00000002U) /*!< Configuration 2 Register selected */ |
| marcozecchini | 0:9fca2b23d0ba | 188 | /** |
| marcozecchini | 0:9fca2b23d0ba | 189 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 190 | */ |
| marcozecchini | 0:9fca2b23d0ba | 191 | |
| marcozecchini | 0:9fca2b23d0ba | 192 | /** @defgroup SDADC_InputMode SDADC Input Mode |
| marcozecchini | 0:9fca2b23d0ba | 193 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 194 | */ |
| marcozecchini | 0:9fca2b23d0ba | 195 | #define SDADC_INPUT_MODE_DIFF (0x00000000U) /*!< Conversions are executed in differential mode */ |
| marcozecchini | 0:9fca2b23d0ba | 196 | #define SDADC_INPUT_MODE_SE_OFFSET SDADC_CONF0R_SE0_0 /*!< Conversions are executed in single ended offset mode */ |
| marcozecchini | 0:9fca2b23d0ba | 197 | #define SDADC_INPUT_MODE_SE_ZERO_REFERENCE SDADC_CONF0R_SE0 /*!< Conversions are executed in single ended zero-volt reference mode */ |
| marcozecchini | 0:9fca2b23d0ba | 198 | /** |
| marcozecchini | 0:9fca2b23d0ba | 199 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 200 | */ |
| marcozecchini | 0:9fca2b23d0ba | 201 | |
| marcozecchini | 0:9fca2b23d0ba | 202 | /** @defgroup SDADC_Gain SDADC Gain |
| marcozecchini | 0:9fca2b23d0ba | 203 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 204 | */ |
| marcozecchini | 0:9fca2b23d0ba | 205 | #define SDADC_GAIN_1 (0x00000000U) /*!< Gain equal to 1U */ |
| marcozecchini | 0:9fca2b23d0ba | 206 | #define SDADC_GAIN_2 SDADC_CONF0R_GAIN0_0 /*!< Gain equal to 2U */ |
| marcozecchini | 0:9fca2b23d0ba | 207 | #define SDADC_GAIN_4 SDADC_CONF0R_GAIN0_1 /*!< Gain equal to 4U */ |
| marcozecchini | 0:9fca2b23d0ba | 208 | #define SDADC_GAIN_8 (0x00300000U) /*!< Gain equal to 8U */ |
| marcozecchini | 0:9fca2b23d0ba | 209 | #define SDADC_GAIN_16 SDADC_CONF0R_GAIN0_2 /*!< Gain equal to 16U */ |
| marcozecchini | 0:9fca2b23d0ba | 210 | #define SDADC_GAIN_32 (0x00500000U) /*!< Gain equal to 32U */ |
| marcozecchini | 0:9fca2b23d0ba | 211 | #define SDADC_GAIN_1_2 SDADC_CONF0R_GAIN0 /*!< Gain equal to 1U/2U */ |
| marcozecchini | 0:9fca2b23d0ba | 212 | /** |
| marcozecchini | 0:9fca2b23d0ba | 213 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 214 | */ |
| marcozecchini | 0:9fca2b23d0ba | 215 | |
| marcozecchini | 0:9fca2b23d0ba | 216 | /** @defgroup SDADC_CommonMode SDADC Common Mode |
| marcozecchini | 0:9fca2b23d0ba | 217 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 218 | */ |
| marcozecchini | 0:9fca2b23d0ba | 219 | #define SDADC_COMMON_MODE_VSSA (0x00000000U) /*!< Select SDADC VSSA as common mode */ |
| marcozecchini | 0:9fca2b23d0ba | 220 | #define SDADC_COMMON_MODE_VDDA_2 SDADC_CONF0R_COMMON0_0 /*!< Select SDADC VDDA/2 as common mode */ |
| marcozecchini | 0:9fca2b23d0ba | 221 | #define SDADC_COMMON_MODE_VDDA SDADC_CONF0R_COMMON0_1 /*!< Select SDADC VDDA as common mode */ |
| marcozecchini | 0:9fca2b23d0ba | 222 | /** |
| marcozecchini | 0:9fca2b23d0ba | 223 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 224 | */ |
| marcozecchini | 0:9fca2b23d0ba | 225 | |
| marcozecchini | 0:9fca2b23d0ba | 226 | |
| marcozecchini | 0:9fca2b23d0ba | 227 | |
| marcozecchini | 0:9fca2b23d0ba | 228 | /** @defgroup SDADC_Channel_Selection SDADC Channel Selection |
| marcozecchini | 0:9fca2b23d0ba | 229 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 230 | */ |
| marcozecchini | 0:9fca2b23d0ba | 231 | |
| marcozecchini | 0:9fca2b23d0ba | 232 | /* SDADC Channels ------------------------------------------------------------*/ |
| marcozecchini | 0:9fca2b23d0ba | 233 | /* The SDADC channels are defined as follows: |
| marcozecchini | 0:9fca2b23d0ba | 234 | - in 16-bit LSB the channel mask is set |
| marcozecchini | 0:9fca2b23d0ba | 235 | - in 16-bit MSB the channel number is set |
| marcozecchini | 0:9fca2b23d0ba | 236 | e.g. for channel 5 definition: |
| marcozecchini | 0:9fca2b23d0ba | 237 | - the channel mask is 0x00000020 (bit 5 is set) |
| marcozecchini | 0:9fca2b23d0ba | 238 | - the channel number 5 is 0x00050000 |
| marcozecchini | 0:9fca2b23d0ba | 239 | --> Consequently, channel 5 definition is 0x00000020U | 0x00050000U = 0x00050020U */ |
| marcozecchini | 0:9fca2b23d0ba | 240 | #define SDADC_CHANNEL_0 (0x00000001U) |
| marcozecchini | 0:9fca2b23d0ba | 241 | #define SDADC_CHANNEL_1 (0x00010002U) |
| marcozecchini | 0:9fca2b23d0ba | 242 | #define SDADC_CHANNEL_2 (0x00020004U) |
| marcozecchini | 0:9fca2b23d0ba | 243 | #define SDADC_CHANNEL_3 (0x00030008U) |
| marcozecchini | 0:9fca2b23d0ba | 244 | #define SDADC_CHANNEL_4 (0x00040010U) |
| marcozecchini | 0:9fca2b23d0ba | 245 | #define SDADC_CHANNEL_5 (0x00050020U) |
| marcozecchini | 0:9fca2b23d0ba | 246 | #define SDADC_CHANNEL_6 (0x00060040U) |
| marcozecchini | 0:9fca2b23d0ba | 247 | #define SDADC_CHANNEL_7 (0x00070080U) |
| marcozecchini | 0:9fca2b23d0ba | 248 | #define SDADC_CHANNEL_8 (0x00080100U) |
| marcozecchini | 0:9fca2b23d0ba | 249 | /** |
| marcozecchini | 0:9fca2b23d0ba | 250 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 251 | */ |
| marcozecchini | 0:9fca2b23d0ba | 252 | |
| marcozecchini | 0:9fca2b23d0ba | 253 | /** @defgroup SDADC_CalibrationSequence SDADC Calibration Sequence |
| marcozecchini | 0:9fca2b23d0ba | 254 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 255 | */ |
| marcozecchini | 0:9fca2b23d0ba | 256 | #define SDADC_CALIBRATION_SEQ_1 (0x00000000U) /*!< One calibration sequence to calculate offset of conf0 (OFFSET0[11:0]) */ |
| marcozecchini | 0:9fca2b23d0ba | 257 | #define SDADC_CALIBRATION_SEQ_2 SDADC_CR2_CALIBCNT_0 /*!< Two calibration sequences to calculate offset of conf0 and conf1 (OFFSET0[11:0] and OFFSET1[11:0]) */ |
| marcozecchini | 0:9fca2b23d0ba | 258 | #define SDADC_CALIBRATION_SEQ_3 SDADC_CR2_CALIBCNT_1 /*!< Three calibration sequences to calculate offset of conf0, conf1 and conf2 (OFFSET0[11:0], OFFSET1[11:0], and OFFSET2[11:0]) */ |
| marcozecchini | 0:9fca2b23d0ba | 259 | /** |
| marcozecchini | 0:9fca2b23d0ba | 260 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 261 | */ |
| marcozecchini | 0:9fca2b23d0ba | 262 | |
| marcozecchini | 0:9fca2b23d0ba | 263 | /** @defgroup SDADC_ContinuousMode SDADC Continuous Mode |
| marcozecchini | 0:9fca2b23d0ba | 264 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 265 | */ |
| marcozecchini | 0:9fca2b23d0ba | 266 | #define SDADC_CONTINUOUS_CONV_OFF (0x00000000U) /*!< Conversion are not continuous */ |
| marcozecchini | 0:9fca2b23d0ba | 267 | #define SDADC_CONTINUOUS_CONV_ON (0x00000001U) /*!< Conversion are continuous */ |
| marcozecchini | 0:9fca2b23d0ba | 268 | /** |
| marcozecchini | 0:9fca2b23d0ba | 269 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 270 | */ |
| marcozecchini | 0:9fca2b23d0ba | 271 | |
| marcozecchini | 0:9fca2b23d0ba | 272 | /** @defgroup SDADC_Trigger SDADC Trigger |
| marcozecchini | 0:9fca2b23d0ba | 273 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 274 | */ |
| marcozecchini | 0:9fca2b23d0ba | 275 | #define SDADC_SOFTWARE_TRIGGER (0x00000000U) /*!< Software trigger */ |
| marcozecchini | 0:9fca2b23d0ba | 276 | #define SDADC_SYNCHRONOUS_TRIGGER (0x00000001U) /*!< Synchronous with SDADC1 (only for SDADC2 and SDADC3) */ |
| marcozecchini | 0:9fca2b23d0ba | 277 | #define SDADC_EXTERNAL_TRIGGER (0x00000002U) /*!< External trigger */ |
| marcozecchini | 0:9fca2b23d0ba | 278 | /** |
| marcozecchini | 0:9fca2b23d0ba | 279 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 280 | */ |
| marcozecchini | 0:9fca2b23d0ba | 281 | |
| marcozecchini | 0:9fca2b23d0ba | 282 | /** @defgroup SDADC_InjectedExtTrigger SDADC Injected External Trigger |
| marcozecchini | 0:9fca2b23d0ba | 283 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 284 | */ |
| marcozecchini | 0:9fca2b23d0ba | 285 | #define SDADC_EXT_TRIG_TIM13_CC1 (0x00000000U) /*!< Trigger source for SDADC1 */ |
| marcozecchini | 0:9fca2b23d0ba | 286 | #define SDADC_EXT_TRIG_TIM14_CC1 (0x00000100U) /*!< Trigger source for SDADC1 */ |
| marcozecchini | 0:9fca2b23d0ba | 287 | #define SDADC_EXT_TRIG_TIM16_CC1 (0x00000000U) /*!< Trigger source for SDADC3 */ |
| marcozecchini | 0:9fca2b23d0ba | 288 | #define SDADC_EXT_TRIG_TIM17_CC1 (0x00000000U) /*!< Trigger source for SDADC2 */ |
| marcozecchini | 0:9fca2b23d0ba | 289 | #define SDADC_EXT_TRIG_TIM12_CC1 (0x00000100U) /*!< Trigger source for SDADC2 */ |
| marcozecchini | 0:9fca2b23d0ba | 290 | #define SDADC_EXT_TRIG_TIM12_CC2 (0x00000100U) /*!< Trigger source for SDADC3 */ |
| marcozecchini | 0:9fca2b23d0ba | 291 | #define SDADC_EXT_TRIG_TIM15_CC2 (0x00000200U) /*!< Trigger source for SDADC1 */ |
| marcozecchini | 0:9fca2b23d0ba | 292 | #define SDADC_EXT_TRIG_TIM2_CC3 (0x00000200U) /*!< Trigger source for SDADC2 */ |
| marcozecchini | 0:9fca2b23d0ba | 293 | #define SDADC_EXT_TRIG_TIM2_CC4 (0x00000200U) /*!< Trigger source for SDADC3 */ |
| marcozecchini | 0:9fca2b23d0ba | 294 | #define SDADC_EXT_TRIG_TIM3_CC1 (0x00000300U) /*!< Trigger source for SDADC1 */ |
| marcozecchini | 0:9fca2b23d0ba | 295 | #define SDADC_EXT_TRIG_TIM3_CC2 (0x00000300U) /*!< Trigger source for SDADC2 */ |
| marcozecchini | 0:9fca2b23d0ba | 296 | #define SDADC_EXT_TRIG_TIM3_CC3 (0x00000300U) /*!< Trigger source for SDADC3 */ |
| marcozecchini | 0:9fca2b23d0ba | 297 | #define SDADC_EXT_TRIG_TIM4_CC1 (0x00000400U) /*!< Trigger source for SDADC1 */ |
| marcozecchini | 0:9fca2b23d0ba | 298 | #define SDADC_EXT_TRIG_TIM4_CC2 (0x00000400U) /*!< Trigger source for SDADC2 */ |
| marcozecchini | 0:9fca2b23d0ba | 299 | #define SDADC_EXT_TRIG_TIM4_CC3 (0x00000400U) /*!< Trigger source for SDADC3 */ |
| marcozecchini | 0:9fca2b23d0ba | 300 | #define SDADC_EXT_TRIG_TIM19_CC2 (0x00000500U) /*!< Trigger source for SDADC1 */ |
| marcozecchini | 0:9fca2b23d0ba | 301 | #define SDADC_EXT_TRIG_TIM19_CC3 (0x00000500U) /*!< Trigger source for SDADC2 */ |
| marcozecchini | 0:9fca2b23d0ba | 302 | #define SDADC_EXT_TRIG_TIM19_CC4 (0x00000500U) /*!< Trigger source for SDADC3 */ |
| marcozecchini | 0:9fca2b23d0ba | 303 | #define SDADC_EXT_TRIG_EXTI11 (0x00000700U) /*!< Trigger source for SDADC1, SDADC2 and SDADC3 */ |
| marcozecchini | 0:9fca2b23d0ba | 304 | #define SDADC_EXT_TRIG_EXTI15 (0x00000600U) /*!< Trigger source for SDADC1, SDADC2 and SDADC3 */ |
| marcozecchini | 0:9fca2b23d0ba | 305 | /** |
| marcozecchini | 0:9fca2b23d0ba | 306 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 307 | */ |
| marcozecchini | 0:9fca2b23d0ba | 308 | |
| marcozecchini | 0:9fca2b23d0ba | 309 | /** @defgroup SDADC_ExtTriggerEdge SDADC External Trigger Edge |
| marcozecchini | 0:9fca2b23d0ba | 310 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 311 | */ |
| marcozecchini | 0:9fca2b23d0ba | 312 | #define SDADC_EXT_TRIG_RISING_EDGE SDADC_CR2_JEXTEN_0 /*!< External rising edge */ |
| marcozecchini | 0:9fca2b23d0ba | 313 | #define SDADC_EXT_TRIG_FALLING_EDGE SDADC_CR2_JEXTEN_1 /*!< External falling edge */ |
| marcozecchini | 0:9fca2b23d0ba | 314 | #define SDADC_EXT_TRIG_BOTH_EDGES SDADC_CR2_JEXTEN /*!< External rising and falling edges */ |
| marcozecchini | 0:9fca2b23d0ba | 315 | /** |
| marcozecchini | 0:9fca2b23d0ba | 316 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 317 | */ |
| marcozecchini | 0:9fca2b23d0ba | 318 | |
| marcozecchini | 0:9fca2b23d0ba | 319 | /** @defgroup SDADC_InjectedDelay SDADC Injected Conversion Delay |
| marcozecchini | 0:9fca2b23d0ba | 320 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 321 | */ |
| marcozecchini | 0:9fca2b23d0ba | 322 | #define SDADC_INJECTED_DELAY_NONE (0x00000000U) /*!< No delay on injected conversion */ |
| marcozecchini | 0:9fca2b23d0ba | 323 | #define SDADC_INJECTED_DELAY SDADC_CR2_JDS /*!< Delay on injected conversion */ |
| marcozecchini | 0:9fca2b23d0ba | 324 | /** |
| marcozecchini | 0:9fca2b23d0ba | 325 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 326 | */ |
| marcozecchini | 0:9fca2b23d0ba | 327 | |
| marcozecchini | 0:9fca2b23d0ba | 328 | /** @defgroup SDADC_MultimodeType SDADC Multimode Type |
| marcozecchini | 0:9fca2b23d0ba | 329 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 330 | */ |
| marcozecchini | 0:9fca2b23d0ba | 331 | #define SDADC_MULTIMODE_SDADC1_SDADC2 (0x00000000U) /*!< Get conversion values for SDADC1 and SDADC2 */ |
| marcozecchini | 0:9fca2b23d0ba | 332 | #define SDADC_MULTIMODE_SDADC1_SDADC3 (0x00000001U) /*!< Get conversion values for SDADC1 and SDADC3 */ |
| marcozecchini | 0:9fca2b23d0ba | 333 | /** |
| marcozecchini | 0:9fca2b23d0ba | 334 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 335 | */ |
| marcozecchini | 0:9fca2b23d0ba | 336 | |
| marcozecchini | 0:9fca2b23d0ba | 337 | /** @defgroup SDADC_ErrorCode SDADC Error Code |
| marcozecchini | 0:9fca2b23d0ba | 338 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 339 | */ |
| marcozecchini | 0:9fca2b23d0ba | 340 | #define SDADC_ERROR_NONE (0x00000000U) /*!< No error */ |
| marcozecchini | 0:9fca2b23d0ba | 341 | #define SDADC_ERROR_REGULAR_OVERRUN (0x00000001U) /*!< Overrun occurs during regular conversion */ |
| marcozecchini | 0:9fca2b23d0ba | 342 | #define SDADC_ERROR_INJECTED_OVERRUN (0x00000002U) /*!< Overrun occurs during injected conversion */ |
| marcozecchini | 0:9fca2b23d0ba | 343 | #define SDADC_ERROR_DMA (0x00000003U) /*!< DMA error occurs */ |
| marcozecchini | 0:9fca2b23d0ba | 344 | /** |
| marcozecchini | 0:9fca2b23d0ba | 345 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 346 | */ |
| marcozecchini | 0:9fca2b23d0ba | 347 | |
| marcozecchini | 0:9fca2b23d0ba | 348 | /** @defgroup SDADC_interrupts_definition SDADC interrupts definition |
| marcozecchini | 0:9fca2b23d0ba | 349 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 350 | */ |
| marcozecchini | 0:9fca2b23d0ba | 351 | #define SDADC_IT_EOCAL SDADC_CR1_EOCALIE /*!< End of calibration interrupt enable */ |
| marcozecchini | 0:9fca2b23d0ba | 352 | #define SDADC_IT_JEOC SDADC_CR1_JEOCIE /*!< Injected end of conversion interrupt enable */ |
| marcozecchini | 0:9fca2b23d0ba | 353 | #define SDADC_IT_JOVR SDADC_CR1_JOVRIE /*!< Injected data overrun interrupt enable */ |
| marcozecchini | 0:9fca2b23d0ba | 354 | #define SDADC_IT_REOC SDADC_CR1_REOCIE /*!< Regular end of conversion interrupt enable */ |
| marcozecchini | 0:9fca2b23d0ba | 355 | #define SDADC_IT_ROVR SDADC_CR1_ROVRIE /*!< Regular data overrun interrupt enable */ |
| marcozecchini | 0:9fca2b23d0ba | 356 | /** |
| marcozecchini | 0:9fca2b23d0ba | 357 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 358 | */ |
| marcozecchini | 0:9fca2b23d0ba | 359 | |
| marcozecchini | 0:9fca2b23d0ba | 360 | /** @defgroup SDADC_flags_definition SDADC flags definition |
| marcozecchini | 0:9fca2b23d0ba | 361 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 362 | */ |
| marcozecchini | 0:9fca2b23d0ba | 363 | #define SDADC_FLAG_EOCAL SDADC_ISR_EOCALF /*!< End of calibration flag */ |
| marcozecchini | 0:9fca2b23d0ba | 364 | #define SDADC_FLAG_JEOC SDADC_ISR_JEOCF /*!< End of injected conversion flag */ |
| marcozecchini | 0:9fca2b23d0ba | 365 | #define SDADC_FLAG_JOVR SDADC_ISR_JOVRF /*!< Injected conversion overrun flag */ |
| marcozecchini | 0:9fca2b23d0ba | 366 | #define SDADC_FLAG_REOC SDADC_ISR_REOCF /*!< End of regular conversion flag */ |
| marcozecchini | 0:9fca2b23d0ba | 367 | #define SDADC_FLAG_ROVR SDADC_ISR_ROVRF /*!< Regular conversion overrun flag */ |
| marcozecchini | 0:9fca2b23d0ba | 368 | /** |
| marcozecchini | 0:9fca2b23d0ba | 369 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 370 | */ |
| marcozecchini | 0:9fca2b23d0ba | 371 | |
| marcozecchini | 0:9fca2b23d0ba | 372 | /** |
| marcozecchini | 0:9fca2b23d0ba | 373 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 374 | */ |
| marcozecchini | 0:9fca2b23d0ba | 375 | |
| marcozecchini | 0:9fca2b23d0ba | 376 | /* Exported macros -----------------------------------------------------------*/ |
| marcozecchini | 0:9fca2b23d0ba | 377 | /** @defgroup SDADC_Exported_Macros SDADC Exported Macros |
| marcozecchini | 0:9fca2b23d0ba | 378 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 379 | */ |
| marcozecchini | 0:9fca2b23d0ba | 380 | |
| marcozecchini | 0:9fca2b23d0ba | 381 | /* Macro for internal HAL driver usage, and possibly can be used into code of */ |
| marcozecchini | 0:9fca2b23d0ba | 382 | /* final user. */ |
| marcozecchini | 0:9fca2b23d0ba | 383 | |
| marcozecchini | 0:9fca2b23d0ba | 384 | /** @brief Enable the ADC end of conversion interrupt. |
| marcozecchini | 0:9fca2b23d0ba | 385 | * @param __HANDLE__: ADC handle |
| marcozecchini | 0:9fca2b23d0ba | 386 | * @param __INTERRUPT__: ADC Interrupt |
| marcozecchini | 0:9fca2b23d0ba | 387 | * This parameter can be any combination of the following values: |
| marcozecchini | 0:9fca2b23d0ba | 388 | * @arg SDADC_IT_EOCAL: End of calibration interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 389 | * @arg SDADC_IT_JEOC: Injected end of conversion interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 390 | * @arg SDADC_IT_JOVR: Injected data overrun interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 391 | * @arg SDADC_IT_REOC: Regular end of conversion interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 392 | * @arg SDADC_IT_ROVR: Regular data overrun interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 393 | * @retval None |
| marcozecchini | 0:9fca2b23d0ba | 394 | */ |
| marcozecchini | 0:9fca2b23d0ba | 395 | #define __HAL_SDADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| marcozecchini | 0:9fca2b23d0ba | 396 | (SET_BIT((__HANDLE__)->Instance->CR1, (__INTERRUPT__))) |
| marcozecchini | 0:9fca2b23d0ba | 397 | |
| marcozecchini | 0:9fca2b23d0ba | 398 | /** @brief Disable the ADC end of conversion interrupt. |
| marcozecchini | 0:9fca2b23d0ba | 399 | * @param __HANDLE__: ADC handle |
| marcozecchini | 0:9fca2b23d0ba | 400 | * @param __INTERRUPT__: ADC Interrupt |
| marcozecchini | 0:9fca2b23d0ba | 401 | * This parameter can be any combination of the following values: |
| marcozecchini | 0:9fca2b23d0ba | 402 | * @arg SDADC_IT_EOCAL: End of calibration interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 403 | * @arg SDADC_IT_JEOC: Injected end of conversion interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 404 | * @arg SDADC_IT_JOVR: Injected data overrun interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 405 | * @arg SDADC_IT_REOC: Regular end of conversion interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 406 | * @arg SDADC_IT_ROVR: Regular data overrun interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 407 | * @retval None |
| marcozecchini | 0:9fca2b23d0ba | 408 | */ |
| marcozecchini | 0:9fca2b23d0ba | 409 | #define __HAL_SDADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| marcozecchini | 0:9fca2b23d0ba | 410 | (CLEAR_BIT((__HANDLE__)->Instance->CR1, (__INTERRUPT__))) |
| marcozecchini | 0:9fca2b23d0ba | 411 | |
| marcozecchini | 0:9fca2b23d0ba | 412 | /** @brief Checks if the specified ADC interrupt source is enabled or disabled. |
| marcozecchini | 0:9fca2b23d0ba | 413 | * @param __HANDLE__: ADC handle |
| marcozecchini | 0:9fca2b23d0ba | 414 | * @param __INTERRUPT__: ADC interrupt source to check |
| marcozecchini | 0:9fca2b23d0ba | 415 | * This parameter can be any combination of the following values: |
| marcozecchini | 0:9fca2b23d0ba | 416 | * @arg SDADC_IT_EOCAL: End of calibration interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 417 | * @arg SDADC_IT_JEOC: Injected end of conversion interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 418 | * @arg SDADC_IT_JOVR: Injected data overrun interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 419 | * @arg SDADC_IT_REOC: Regular end of conversion interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 420 | * @arg SDADC_IT_ROVR: Regular data overrun interrupt enable |
| marcozecchini | 0:9fca2b23d0ba | 421 | * @retval State of interruption (SET or RESET) |
| marcozecchini | 0:9fca2b23d0ba | 422 | */ |
| marcozecchini | 0:9fca2b23d0ba | 423 | #define __HAL_SDADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ |
| marcozecchini | 0:9fca2b23d0ba | 424 | (((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) |
| marcozecchini | 0:9fca2b23d0ba | 425 | |
| marcozecchini | 0:9fca2b23d0ba | 426 | /** @brief Get the selected ADC's flag status. |
| marcozecchini | 0:9fca2b23d0ba | 427 | * @param __HANDLE__: ADC handle |
| marcozecchini | 0:9fca2b23d0ba | 428 | * @param __FLAG__: ADC flag |
| marcozecchini | 0:9fca2b23d0ba | 429 | * This parameter can be any combination of the following values: |
| marcozecchini | 0:9fca2b23d0ba | 430 | * @arg SDADC_FLAG_EOCAL: End of calibration flag |
| marcozecchini | 0:9fca2b23d0ba | 431 | * @arg SDADC_FLAG_JEOC: End of injected conversion flag |
| marcozecchini | 0:9fca2b23d0ba | 432 | * @arg SDADC_FLAG_JOVR: Injected conversion overrun flag |
| marcozecchini | 0:9fca2b23d0ba | 433 | * @arg SDADC_FLAG_REOC: End of regular conversion flag |
| marcozecchini | 0:9fca2b23d0ba | 434 | * @arg SDADC_FLAG_ROVR: Regular conversion overrun flag |
| marcozecchini | 0:9fca2b23d0ba | 435 | * @retval None |
| marcozecchini | 0:9fca2b23d0ba | 436 | */ |
| marcozecchini | 0:9fca2b23d0ba | 437 | #define __HAL_SDADC_GET_FLAG(__HANDLE__, __FLAG__) \ |
| marcozecchini | 0:9fca2b23d0ba | 438 | ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) |
| marcozecchini | 0:9fca2b23d0ba | 439 | |
| marcozecchini | 0:9fca2b23d0ba | 440 | /** @brief Clear the ADC's pending flags |
| marcozecchini | 0:9fca2b23d0ba | 441 | * @param __HANDLE__: ADC handle |
| marcozecchini | 0:9fca2b23d0ba | 442 | * @param __FLAG__: ADC flag |
| marcozecchini | 0:9fca2b23d0ba | 443 | * This parameter can be any combination of the following values: |
| marcozecchini | 0:9fca2b23d0ba | 444 | * @arg SDADC_FLAG_EOCAL: End of calibration flag |
| marcozecchini | 0:9fca2b23d0ba | 445 | * @arg SDADC_FLAG_JEOC: End of injected conversion flag |
| marcozecchini | 0:9fca2b23d0ba | 446 | * @arg SDADC_FLAG_JOVR: Injected conversion overrun flag |
| marcozecchini | 0:9fca2b23d0ba | 447 | * @arg SDADC_FLAG_REOC: End of regular conversion flag |
| marcozecchini | 0:9fca2b23d0ba | 448 | * @arg SDADC_FLAG_ROVR: Regular conversion overrun flag |
| marcozecchini | 0:9fca2b23d0ba | 449 | * @retval None |
| marcozecchini | 0:9fca2b23d0ba | 450 | */ |
| marcozecchini | 0:9fca2b23d0ba | 451 | #define __HAL_SDADC_CLEAR_FLAG(__HANDLE__, __FLAG__) \ |
| marcozecchini | 0:9fca2b23d0ba | 452 | (CLEAR_BIT((__HANDLE__)->Instance->ISR, (__FLAG__))) |
| marcozecchini | 0:9fca2b23d0ba | 453 | |
| marcozecchini | 0:9fca2b23d0ba | 454 | /** @brief Reset SDADC handle state |
| marcozecchini | 0:9fca2b23d0ba | 455 | * @param __HANDLE__: SDADC handle. |
| marcozecchini | 0:9fca2b23d0ba | 456 | * @retval None |
| marcozecchini | 0:9fca2b23d0ba | 457 | */ |
| marcozecchini | 0:9fca2b23d0ba | 458 | #define __HAL_SDADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDADC_STATE_RESET) |
| marcozecchini | 0:9fca2b23d0ba | 459 | |
| marcozecchini | 0:9fca2b23d0ba | 460 | /** |
| marcozecchini | 0:9fca2b23d0ba | 461 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 462 | */ |
| marcozecchini | 0:9fca2b23d0ba | 463 | |
| marcozecchini | 0:9fca2b23d0ba | 464 | /* Private macros ------------------------------------------------------------*/ |
| marcozecchini | 0:9fca2b23d0ba | 465 | /** @defgroup SDADC_Private_Macros SDADC Private Macros |
| marcozecchini | 0:9fca2b23d0ba | 466 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 467 | */ |
| marcozecchini | 0:9fca2b23d0ba | 468 | |
| marcozecchini | 0:9fca2b23d0ba | 469 | #define IS_SDADC_LOWPOWER_MODE(LOWPOWER) (((LOWPOWER) == SDADC_LOWPOWER_NONE) || \ |
| marcozecchini | 0:9fca2b23d0ba | 470 | ((LOWPOWER) == SDADC_LOWPOWER_POWERDOWN) || \ |
| marcozecchini | 0:9fca2b23d0ba | 471 | ((LOWPOWER) == SDADC_LOWPOWER_STANDBY)) |
| marcozecchini | 0:9fca2b23d0ba | 472 | |
| marcozecchini | 0:9fca2b23d0ba | 473 | #define IS_SDADC_FAST_CONV_MODE(FAST) (((FAST) == SDADC_FAST_CONV_DISABLE) || \ |
| marcozecchini | 0:9fca2b23d0ba | 474 | ((FAST) == SDADC_FAST_CONV_ENABLE)) |
| marcozecchini | 0:9fca2b23d0ba | 475 | |
| marcozecchini | 0:9fca2b23d0ba | 476 | #define IS_SDADC_SLOW_CLOCK_MODE(MODE) (((MODE) == SDADC_SLOW_CLOCK_DISABLE) || \ |
| marcozecchini | 0:9fca2b23d0ba | 477 | ((MODE) == SDADC_SLOW_CLOCK_ENABLE)) |
| marcozecchini | 0:9fca2b23d0ba | 478 | |
| marcozecchini | 0:9fca2b23d0ba | 479 | #define IS_SDADC_VREF(VREF) (((VREF) == SDADC_VREF_EXT) || \ |
| marcozecchini | 0:9fca2b23d0ba | 480 | ((VREF) == SDADC_VREF_VREFINT1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 481 | ((VREF) == SDADC_VREF_VREFINT2) || \ |
| marcozecchini | 0:9fca2b23d0ba | 482 | ((VREF) == SDADC_VREF_VDDA)) |
| marcozecchini | 0:9fca2b23d0ba | 483 | |
| marcozecchini | 0:9fca2b23d0ba | 484 | #define IS_SDADC_CONF_INDEX(CONF) (((CONF) == SDADC_CONF_INDEX_0) || \ |
| marcozecchini | 0:9fca2b23d0ba | 485 | ((CONF) == SDADC_CONF_INDEX_1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 486 | ((CONF) == SDADC_CONF_INDEX_2)) |
| marcozecchini | 0:9fca2b23d0ba | 487 | |
| marcozecchini | 0:9fca2b23d0ba | 488 | #define IS_SDADC_INPUT_MODE(MODE) (((MODE) == SDADC_INPUT_MODE_DIFF) || \ |
| marcozecchini | 0:9fca2b23d0ba | 489 | ((MODE) == SDADC_INPUT_MODE_SE_OFFSET) || \ |
| marcozecchini | 0:9fca2b23d0ba | 490 | ((MODE) == SDADC_INPUT_MODE_SE_ZERO_REFERENCE)) |
| marcozecchini | 0:9fca2b23d0ba | 491 | |
| marcozecchini | 0:9fca2b23d0ba | 492 | #define IS_SDADC_GAIN(GAIN) (((GAIN) == SDADC_GAIN_1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 493 | ((GAIN) == SDADC_GAIN_2) || \ |
| marcozecchini | 0:9fca2b23d0ba | 494 | ((GAIN) == SDADC_GAIN_4) || \ |
| marcozecchini | 0:9fca2b23d0ba | 495 | ((GAIN) == SDADC_GAIN_8) || \ |
| marcozecchini | 0:9fca2b23d0ba | 496 | ((GAIN) == SDADC_GAIN_16) || \ |
| marcozecchini | 0:9fca2b23d0ba | 497 | ((GAIN) == SDADC_GAIN_32) || \ |
| marcozecchini | 0:9fca2b23d0ba | 498 | ((GAIN) == SDADC_GAIN_1_2)) |
| marcozecchini | 0:9fca2b23d0ba | 499 | |
| marcozecchini | 0:9fca2b23d0ba | 500 | #define IS_SDADC_COMMON_MODE(MODE) (((MODE) == SDADC_COMMON_MODE_VSSA) || \ |
| marcozecchini | 0:9fca2b23d0ba | 501 | ((MODE) == SDADC_COMMON_MODE_VDDA_2) || \ |
| marcozecchini | 0:9fca2b23d0ba | 502 | ((MODE) == SDADC_COMMON_MODE_VDDA)) |
| marcozecchini | 0:9fca2b23d0ba | 503 | |
| marcozecchini | 0:9fca2b23d0ba | 504 | #define IS_SDADC_OFFSET_VALUE(VALUE) ((VALUE) <= 0x00000FFFU) |
| marcozecchini | 0:9fca2b23d0ba | 505 | |
| marcozecchini | 0:9fca2b23d0ba | 506 | /* Just one channel of the 9 channels can be selected for regular conversion */ |
| marcozecchini | 0:9fca2b23d0ba | 507 | #define IS_SDADC_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == SDADC_CHANNEL_0) || \ |
| marcozecchini | 0:9fca2b23d0ba | 508 | ((CHANNEL) == SDADC_CHANNEL_1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 509 | ((CHANNEL) == SDADC_CHANNEL_2) || \ |
| marcozecchini | 0:9fca2b23d0ba | 510 | ((CHANNEL) == SDADC_CHANNEL_3) || \ |
| marcozecchini | 0:9fca2b23d0ba | 511 | ((CHANNEL) == SDADC_CHANNEL_4) || \ |
| marcozecchini | 0:9fca2b23d0ba | 512 | ((CHANNEL) == SDADC_CHANNEL_5) || \ |
| marcozecchini | 0:9fca2b23d0ba | 513 | ((CHANNEL) == SDADC_CHANNEL_6) || \ |
| marcozecchini | 0:9fca2b23d0ba | 514 | ((CHANNEL) == SDADC_CHANNEL_7) || \ |
| marcozecchini | 0:9fca2b23d0ba | 515 | ((CHANNEL) == SDADC_CHANNEL_8)) |
| marcozecchini | 0:9fca2b23d0ba | 516 | |
| marcozecchini | 0:9fca2b23d0ba | 517 | /* Any or all of the 9 channels can be selected for injected conversion */ |
| marcozecchini | 0:9fca2b23d0ba | 518 | #define IS_SDADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0U) && ((CHANNEL) <= 0x000F01FFU)) |
| marcozecchini | 0:9fca2b23d0ba | 519 | |
| marcozecchini | 0:9fca2b23d0ba | 520 | |
| marcozecchini | 0:9fca2b23d0ba | 521 | #define IS_SDADC_CALIB_SEQUENCE(SEQUENCE) (((SEQUENCE) == SDADC_CALIBRATION_SEQ_1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 522 | ((SEQUENCE) == SDADC_CALIBRATION_SEQ_2) || \ |
| marcozecchini | 0:9fca2b23d0ba | 523 | ((SEQUENCE) == SDADC_CALIBRATION_SEQ_3)) |
| marcozecchini | 0:9fca2b23d0ba | 524 | |
| marcozecchini | 0:9fca2b23d0ba | 525 | #define IS_SDADC_CONTINUOUS_MODE(MODE) (((MODE) == SDADC_CONTINUOUS_CONV_OFF) || \ |
| marcozecchini | 0:9fca2b23d0ba | 526 | ((MODE) == SDADC_CONTINUOUS_CONV_ON)) |
| marcozecchini | 0:9fca2b23d0ba | 527 | |
| marcozecchini | 0:9fca2b23d0ba | 528 | |
| marcozecchini | 0:9fca2b23d0ba | 529 | #define IS_SDADC_REGULAR_TRIGGER(TRIGGER) (((TRIGGER) == SDADC_SOFTWARE_TRIGGER) || \ |
| marcozecchini | 0:9fca2b23d0ba | 530 | ((TRIGGER) == SDADC_SYNCHRONOUS_TRIGGER)) |
| marcozecchini | 0:9fca2b23d0ba | 531 | |
| marcozecchini | 0:9fca2b23d0ba | 532 | #define IS_SDADC_INJECTED_TRIGGER(TRIGGER) (((TRIGGER) == SDADC_SOFTWARE_TRIGGER) || \ |
| marcozecchini | 0:9fca2b23d0ba | 533 | ((TRIGGER) == SDADC_SYNCHRONOUS_TRIGGER) || \ |
| marcozecchini | 0:9fca2b23d0ba | 534 | ((TRIGGER) == SDADC_EXTERNAL_TRIGGER)) |
| marcozecchini | 0:9fca2b23d0ba | 535 | |
| marcozecchini | 0:9fca2b23d0ba | 536 | |
| marcozecchini | 0:9fca2b23d0ba | 537 | #define IS_SDADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == SDADC_EXT_TRIG_TIM13_CC1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 538 | ((INJTRIG) == SDADC_EXT_TRIG_TIM14_CC1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 539 | ((INJTRIG) == SDADC_EXT_TRIG_TIM16_CC1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 540 | ((INJTRIG) == SDADC_EXT_TRIG_TIM17_CC1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 541 | ((INJTRIG) == SDADC_EXT_TRIG_TIM12_CC1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 542 | ((INJTRIG) == SDADC_EXT_TRIG_TIM12_CC2) || \ |
| marcozecchini | 0:9fca2b23d0ba | 543 | ((INJTRIG) == SDADC_EXT_TRIG_TIM15_CC2) || \ |
| marcozecchini | 0:9fca2b23d0ba | 544 | ((INJTRIG) == SDADC_EXT_TRIG_TIM2_CC3) || \ |
| marcozecchini | 0:9fca2b23d0ba | 545 | ((INJTRIG) == SDADC_EXT_TRIG_TIM2_CC4) || \ |
| marcozecchini | 0:9fca2b23d0ba | 546 | ((INJTRIG) == SDADC_EXT_TRIG_TIM3_CC1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 547 | ((INJTRIG) == SDADC_EXT_TRIG_TIM3_CC2) || \ |
| marcozecchini | 0:9fca2b23d0ba | 548 | ((INJTRIG) == SDADC_EXT_TRIG_TIM3_CC3) || \ |
| marcozecchini | 0:9fca2b23d0ba | 549 | ((INJTRIG) == SDADC_EXT_TRIG_TIM4_CC1) || \ |
| marcozecchini | 0:9fca2b23d0ba | 550 | ((INJTRIG) == SDADC_EXT_TRIG_TIM4_CC2) || \ |
| marcozecchini | 0:9fca2b23d0ba | 551 | ((INJTRIG) == SDADC_EXT_TRIG_TIM4_CC3) || \ |
| marcozecchini | 0:9fca2b23d0ba | 552 | ((INJTRIG) == SDADC_EXT_TRIG_TIM19_CC2) || \ |
| marcozecchini | 0:9fca2b23d0ba | 553 | ((INJTRIG) == SDADC_EXT_TRIG_TIM19_CC3) || \ |
| marcozecchini | 0:9fca2b23d0ba | 554 | ((INJTRIG) == SDADC_EXT_TRIG_TIM19_CC4) || \ |
| marcozecchini | 0:9fca2b23d0ba | 555 | ((INJTRIG) == SDADC_EXT_TRIG_EXTI11) || \ |
| marcozecchini | 0:9fca2b23d0ba | 556 | ((INJTRIG) == SDADC_EXT_TRIG_EXTI15)) |
| marcozecchini | 0:9fca2b23d0ba | 557 | |
| marcozecchini | 0:9fca2b23d0ba | 558 | #define IS_SDADC_EXT_TRIG_EDGE(TRIGGER) (((TRIGGER) == SDADC_EXT_TRIG_RISING_EDGE) || \ |
| marcozecchini | 0:9fca2b23d0ba | 559 | ((TRIGGER) == SDADC_EXT_TRIG_FALLING_EDGE) || \ |
| marcozecchini | 0:9fca2b23d0ba | 560 | ((TRIGGER) == SDADC_EXT_TRIG_BOTH_EDGES)) |
| marcozecchini | 0:9fca2b23d0ba | 561 | |
| marcozecchini | 0:9fca2b23d0ba | 562 | |
| marcozecchini | 0:9fca2b23d0ba | 563 | #define IS_SDADC_INJECTED_DELAY(DELAY) (((DELAY) == SDADC_INJECTED_DELAY_NONE) || \ |
| marcozecchini | 0:9fca2b23d0ba | 564 | ((DELAY) == SDADC_INJECTED_DELAY)) |
| marcozecchini | 0:9fca2b23d0ba | 565 | |
| marcozecchini | 0:9fca2b23d0ba | 566 | #define IS_SDADC_MULTIMODE_TYPE(TYPE) (((TYPE) == SDADC_MULTIMODE_SDADC1_SDADC2) || \ |
| marcozecchini | 0:9fca2b23d0ba | 567 | ((TYPE) == SDADC_MULTIMODE_SDADC1_SDADC3)) |
| marcozecchini | 0:9fca2b23d0ba | 568 | /** |
| marcozecchini | 0:9fca2b23d0ba | 569 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 570 | */ |
| marcozecchini | 0:9fca2b23d0ba | 571 | |
| marcozecchini | 0:9fca2b23d0ba | 572 | /* Exported functions --------------------------------------------------------*/ |
| marcozecchini | 0:9fca2b23d0ba | 573 | /** @addtogroup SDADC_Exported_Functions SDADC Exported Functions |
| marcozecchini | 0:9fca2b23d0ba | 574 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 575 | */ |
| marcozecchini | 0:9fca2b23d0ba | 576 | |
| marcozecchini | 0:9fca2b23d0ba | 577 | /** @addtogroup SDADC_Exported_Functions_Group1 Initialization and de-initialization functions |
| marcozecchini | 0:9fca2b23d0ba | 578 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 579 | */ |
| marcozecchini | 0:9fca2b23d0ba | 580 | |
| marcozecchini | 0:9fca2b23d0ba | 581 | /* Initialization and de-initialization functions *****************************/ |
| marcozecchini | 0:9fca2b23d0ba | 582 | HAL_StatusTypeDef HAL_SDADC_Init(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 583 | HAL_StatusTypeDef HAL_SDADC_DeInit(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 584 | void HAL_SDADC_MspInit(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 585 | void HAL_SDADC_MspDeInit(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 586 | |
| marcozecchini | 0:9fca2b23d0ba | 587 | /** |
| marcozecchini | 0:9fca2b23d0ba | 588 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 589 | */ |
| marcozecchini | 0:9fca2b23d0ba | 590 | |
| marcozecchini | 0:9fca2b23d0ba | 591 | /** @addtogroup SDADC_Exported_Functions_Group2 peripheral control functions |
| marcozecchini | 0:9fca2b23d0ba | 592 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 593 | */ |
| marcozecchini | 0:9fca2b23d0ba | 594 | |
| marcozecchini | 0:9fca2b23d0ba | 595 | /* Peripheral Control functions ***********************************************/ |
| marcozecchini | 0:9fca2b23d0ba | 596 | HAL_StatusTypeDef HAL_SDADC_PrepareChannelConfig(SDADC_HandleTypeDef *hsdadc, |
| marcozecchini | 0:9fca2b23d0ba | 597 | uint32_t ConfIndex, |
| marcozecchini | 0:9fca2b23d0ba | 598 | SDADC_ConfParamTypeDef* ConfParamStruct); |
| marcozecchini | 0:9fca2b23d0ba | 599 | HAL_StatusTypeDef HAL_SDADC_AssociateChannelConfig(SDADC_HandleTypeDef *hsdadc, |
| marcozecchini | 0:9fca2b23d0ba | 600 | uint32_t Channel, |
| marcozecchini | 0:9fca2b23d0ba | 601 | uint32_t ConfIndex); |
| marcozecchini | 0:9fca2b23d0ba | 602 | HAL_StatusTypeDef HAL_SDADC_ConfigChannel(SDADC_HandleTypeDef *hsdadc, |
| marcozecchini | 0:9fca2b23d0ba | 603 | uint32_t Channel, |
| marcozecchini | 0:9fca2b23d0ba | 604 | uint32_t ContinuousMode); |
| marcozecchini | 0:9fca2b23d0ba | 605 | HAL_StatusTypeDef HAL_SDADC_InjectedConfigChannel(SDADC_HandleTypeDef *hsdadc, |
| marcozecchini | 0:9fca2b23d0ba | 606 | uint32_t Channel, |
| marcozecchini | 0:9fca2b23d0ba | 607 | uint32_t ContinuousMode); |
| marcozecchini | 0:9fca2b23d0ba | 608 | HAL_StatusTypeDef HAL_SDADC_SelectInjectedExtTrigger(SDADC_HandleTypeDef *hsdadc, |
| marcozecchini | 0:9fca2b23d0ba | 609 | uint32_t InjectedExtTrigger, |
| marcozecchini | 0:9fca2b23d0ba | 610 | uint32_t ExtTriggerEdge); |
| marcozecchini | 0:9fca2b23d0ba | 611 | HAL_StatusTypeDef HAL_SDADC_SelectInjectedDelay(SDADC_HandleTypeDef *hsdadc, |
| marcozecchini | 0:9fca2b23d0ba | 612 | uint32_t InjectedDelay); |
| marcozecchini | 0:9fca2b23d0ba | 613 | HAL_StatusTypeDef HAL_SDADC_SelectRegularTrigger(SDADC_HandleTypeDef *hsdadc, uint32_t Trigger); |
| marcozecchini | 0:9fca2b23d0ba | 614 | HAL_StatusTypeDef HAL_SDADC_SelectInjectedTrigger(SDADC_HandleTypeDef *hsdadc, uint32_t Trigger); |
| marcozecchini | 0:9fca2b23d0ba | 615 | HAL_StatusTypeDef HAL_SDADC_MultiModeConfigChannel(SDADC_HandleTypeDef* hsdadc, uint32_t MultimodeType); |
| marcozecchini | 0:9fca2b23d0ba | 616 | HAL_StatusTypeDef HAL_SDADC_InjectedMultiModeConfigChannel(SDADC_HandleTypeDef* hsdadc, uint32_t MultimodeType); |
| marcozecchini | 0:9fca2b23d0ba | 617 | |
| marcozecchini | 0:9fca2b23d0ba | 618 | /** |
| marcozecchini | 0:9fca2b23d0ba | 619 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 620 | */ |
| marcozecchini | 0:9fca2b23d0ba | 621 | |
| marcozecchini | 0:9fca2b23d0ba | 622 | /** @addtogroup SDADC_Exported_Functions_Group3 Input and Output operation functions |
| marcozecchini | 0:9fca2b23d0ba | 623 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 624 | */ |
| marcozecchini | 0:9fca2b23d0ba | 625 | |
| marcozecchini | 0:9fca2b23d0ba | 626 | /* IO operation functions *****************************************************/ |
| marcozecchini | 0:9fca2b23d0ba | 627 | HAL_StatusTypeDef HAL_SDADC_CalibrationStart(SDADC_HandleTypeDef *hsdadc, uint32_t CalibrationSequence); |
| marcozecchini | 0:9fca2b23d0ba | 628 | HAL_StatusTypeDef HAL_SDADC_CalibrationStart_IT(SDADC_HandleTypeDef *hsdadc, uint32_t CalibrationSequence); |
| marcozecchini | 0:9fca2b23d0ba | 629 | |
| marcozecchini | 0:9fca2b23d0ba | 630 | HAL_StatusTypeDef HAL_SDADC_Start(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 631 | HAL_StatusTypeDef HAL_SDADC_Start_IT(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 632 | HAL_StatusTypeDef HAL_SDADC_Start_DMA(SDADC_HandleTypeDef *hsdadc, uint32_t *pData, uint32_t Length); |
| marcozecchini | 0:9fca2b23d0ba | 633 | HAL_StatusTypeDef HAL_SDADC_Stop(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 634 | HAL_StatusTypeDef HAL_SDADC_Stop_IT(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 635 | HAL_StatusTypeDef HAL_SDADC_Stop_DMA(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 636 | |
| marcozecchini | 0:9fca2b23d0ba | 637 | HAL_StatusTypeDef HAL_SDADC_InjectedStart(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 638 | HAL_StatusTypeDef HAL_SDADC_InjectedStart_IT(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 639 | HAL_StatusTypeDef HAL_SDADC_InjectedStart_DMA(SDADC_HandleTypeDef *hsdadc, uint32_t *pData, uint32_t Length); |
| marcozecchini | 0:9fca2b23d0ba | 640 | HAL_StatusTypeDef HAL_SDADC_InjectedStop(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 641 | HAL_StatusTypeDef HAL_SDADC_InjectedStop_IT(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 642 | HAL_StatusTypeDef HAL_SDADC_InjectedStop_DMA(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 643 | |
| marcozecchini | 0:9fca2b23d0ba | 644 | HAL_StatusTypeDef HAL_SDADC_MultiModeStart_DMA(SDADC_HandleTypeDef* hsdadc, uint32_t* pData, uint32_t Length); |
| marcozecchini | 0:9fca2b23d0ba | 645 | HAL_StatusTypeDef HAL_SDADC_MultiModeStop_DMA(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 646 | HAL_StatusTypeDef HAL_SDADC_InjectedMultiModeStart_DMA(SDADC_HandleTypeDef* hsdadc, uint32_t* pData, uint32_t Length); |
| marcozecchini | 0:9fca2b23d0ba | 647 | HAL_StatusTypeDef HAL_SDADC_InjectedMultiModeStop_DMA(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 648 | |
| marcozecchini | 0:9fca2b23d0ba | 649 | uint32_t HAL_SDADC_GetValue(SDADC_HandleTypeDef *hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 650 | uint32_t HAL_SDADC_InjectedGetValue(SDADC_HandleTypeDef *hsdadc, uint32_t* Channel); |
| marcozecchini | 0:9fca2b23d0ba | 651 | uint32_t HAL_SDADC_MultiModeGetValue(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 652 | uint32_t HAL_SDADC_InjectedMultiModeGetValue(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 653 | |
| marcozecchini | 0:9fca2b23d0ba | 654 | void HAL_SDADC_IRQHandler(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 655 | |
| marcozecchini | 0:9fca2b23d0ba | 656 | HAL_StatusTypeDef HAL_SDADC_PollForCalibEvent(SDADC_HandleTypeDef* hsdadc, uint32_t Timeout); |
| marcozecchini | 0:9fca2b23d0ba | 657 | HAL_StatusTypeDef HAL_SDADC_PollForConversion(SDADC_HandleTypeDef* hsdadc, uint32_t Timeout); |
| marcozecchini | 0:9fca2b23d0ba | 658 | HAL_StatusTypeDef HAL_SDADC_PollForInjectedConversion(SDADC_HandleTypeDef* hsdadc, uint32_t Timeout); |
| marcozecchini | 0:9fca2b23d0ba | 659 | |
| marcozecchini | 0:9fca2b23d0ba | 660 | void HAL_SDADC_CalibrationCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 661 | void HAL_SDADC_ConvHalfCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 662 | void HAL_SDADC_ConvCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 663 | void HAL_SDADC_InjectedConvHalfCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 664 | void HAL_SDADC_InjectedConvCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 665 | void HAL_SDADC_ErrorCallback(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 666 | |
| marcozecchini | 0:9fca2b23d0ba | 667 | /** |
| marcozecchini | 0:9fca2b23d0ba | 668 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 669 | */ |
| marcozecchini | 0:9fca2b23d0ba | 670 | |
| marcozecchini | 0:9fca2b23d0ba | 671 | /** @defgroup SDADC_Exported_Functions_Group4 Peripheral State functions |
| marcozecchini | 0:9fca2b23d0ba | 672 | * @{ |
| marcozecchini | 0:9fca2b23d0ba | 673 | */ |
| marcozecchini | 0:9fca2b23d0ba | 674 | |
| marcozecchini | 0:9fca2b23d0ba | 675 | /* Peripheral State and Error functions ***************************************/ |
| marcozecchini | 0:9fca2b23d0ba | 676 | HAL_SDADC_StateTypeDef HAL_SDADC_GetState(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 677 | uint32_t HAL_SDADC_GetError(SDADC_HandleTypeDef* hsdadc); |
| marcozecchini | 0:9fca2b23d0ba | 678 | |
| marcozecchini | 0:9fca2b23d0ba | 679 | /* Private functions ---------------------------------------------------------*/ |
| marcozecchini | 0:9fca2b23d0ba | 680 | |
| marcozecchini | 0:9fca2b23d0ba | 681 | /** |
| marcozecchini | 0:9fca2b23d0ba | 682 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 683 | */ |
| marcozecchini | 0:9fca2b23d0ba | 684 | |
| marcozecchini | 0:9fca2b23d0ba | 685 | /** |
| marcozecchini | 0:9fca2b23d0ba | 686 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 687 | */ |
| marcozecchini | 0:9fca2b23d0ba | 688 | |
| marcozecchini | 0:9fca2b23d0ba | 689 | /** |
| marcozecchini | 0:9fca2b23d0ba | 690 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 691 | */ |
| marcozecchini | 0:9fca2b23d0ba | 692 | |
| marcozecchini | 0:9fca2b23d0ba | 693 | /** |
| marcozecchini | 0:9fca2b23d0ba | 694 | * @} |
| marcozecchini | 0:9fca2b23d0ba | 695 | */ |
| marcozecchini | 0:9fca2b23d0ba | 696 | |
| marcozecchini | 0:9fca2b23d0ba | 697 | #endif /* defined(STM32F373xC) || defined(STM32F378xx) */ |
| marcozecchini | 0:9fca2b23d0ba | 698 | |
| marcozecchini | 0:9fca2b23d0ba | 699 | #ifdef __cplusplus |
| marcozecchini | 0:9fca2b23d0ba | 700 | } |
| marcozecchini | 0:9fca2b23d0ba | 701 | #endif |
| marcozecchini | 0:9fca2b23d0ba | 702 | |
| marcozecchini | 0:9fca2b23d0ba | 703 | #endif /*__STM32F3xx_SDADC_H */ |
| marcozecchini | 0:9fca2b23d0ba | 704 | |
| marcozecchini | 0:9fca2b23d0ba | 705 | |
| marcozecchini | 0:9fca2b23d0ba | 706 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |