Marco Zecchini / Mbed OS Example_RTOS

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mbed-os/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_adc.c@0:9fca2b23d0ba, 2019-02-23 (annotated)

Committer:
marcozecchini
Date:
Sat Feb 23 12:13:36 2019 +0000
Revision:
0:9fca2b23d0ba
final commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
marcozecchini 0:9fca2b23d0ba 1 /**************************************************************************//**
marcozecchini 0:9fca2b23d0ba 2 * @file adc.c
marcozecchini 0:9fca2b23d0ba 3 * @version V1.00
marcozecchini 0:9fca2b23d0ba 4 * $Revision: 13 $
marcozecchini 0:9fca2b23d0ba 5 * $Date: 14/05/29 1:13p $
marcozecchini 0:9fca2b23d0ba 6 * @brief NUC472/NUC442 ADC driver source file
marcozecchini 0:9fca2b23d0ba 7 *
marcozecchini 0:9fca2b23d0ba 8 * @note
marcozecchini 0:9fca2b23d0ba 9 * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved.
marcozecchini 0:9fca2b23d0ba 10 *****************************************************************************/
marcozecchini 0:9fca2b23d0ba 11 #include "NUC472_442.h"
marcozecchini 0:9fca2b23d0ba 12
marcozecchini 0:9fca2b23d0ba 13 /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
marcozecchini 0:9fca2b23d0ba 14 @{
marcozecchini 0:9fca2b23d0ba 15 */
marcozecchini 0:9fca2b23d0ba 16
marcozecchini 0:9fca2b23d0ba 17 /** @addtogroup NUC472_442_ADC_Driver ADC Driver
marcozecchini 0:9fca2b23d0ba 18 @{
marcozecchini 0:9fca2b23d0ba 19 */
marcozecchini 0:9fca2b23d0ba 20
marcozecchini 0:9fca2b23d0ba 21
marcozecchini 0:9fca2b23d0ba 22 /** @addtogroup NUC472_442_ADC_EXPORTED_FUNCTIONS ADC Exported Functions
marcozecchini 0:9fca2b23d0ba 23 @{
marcozecchini 0:9fca2b23d0ba 24 */
marcozecchini 0:9fca2b23d0ba 25
marcozecchini 0:9fca2b23d0ba 26 /**
marcozecchini 0:9fca2b23d0ba 27 * @brief This API configures ADC module to be ready for convert the input from selected channel
marcozecchini 0:9fca2b23d0ba 28 * @param[in] adc Base address of ADC module
marcozecchini 0:9fca2b23d0ba 29 * @param[in] u32InputMode Input mode (single-end/differential). Valid values are:
marcozecchini 0:9fca2b23d0ba 30 * - \ref ADC_INPUT_MODE_SINGLE_END
marcozecchini 0:9fca2b23d0ba 31 * - \ref ADC_INPUT_MODE_DIFFERENTIAL
marcozecchini 0:9fca2b23d0ba 32 * @param[in] u32OpMode Operation mode (single/single cycle/continuous). Valid values are:
marcozecchini 0:9fca2b23d0ba 33 * - \ref ADC_OPERATION_MODE_SINGLE
marcozecchini 0:9fca2b23d0ba 34 * - \ref ADC_OPERATION_MODE_SINGLE_CYCLE
marcozecchini 0:9fca2b23d0ba 35 * - \ref ADC_OPERATION_MODE_CONTINUOUS
marcozecchini 0:9fca2b23d0ba 36 * @param[in] u32ChMask Channel enable bit. Valid values are:
marcozecchini 0:9fca2b23d0ba 37 * - \ref ADC_CH_0_MASK
marcozecchini 0:9fca2b23d0ba 38 * - \ref ADC_CH_1_MASK
marcozecchini 0:9fca2b23d0ba 39 * - \ref ADC_CH_2_MASK
marcozecchini 0:9fca2b23d0ba 40 * - \ref ADC_CH_3_MASK
marcozecchini 0:9fca2b23d0ba 41 * - \ref ADC_CH_4_MASK
marcozecchini 0:9fca2b23d0ba 42 * - \ref ADC_CH_5_MASK
marcozecchini 0:9fca2b23d0ba 43 * - \ref ADC_CH_6_MASK
marcozecchini 0:9fca2b23d0ba 44 * - \ref ADC_CH_7_MASK
marcozecchini 0:9fca2b23d0ba 45 * - \ref ADC_CH_8_MASK
marcozecchini 0:9fca2b23d0ba 46 * - \ref ADC_CH_9_MASK
marcozecchini 0:9fca2b23d0ba 47 * - \ref ADC_CH_10_MASK
marcozecchini 0:9fca2b23d0ba 48 * - \ref ADC_CH_11_MASK
marcozecchini 0:9fca2b23d0ba 49 * - \ref ADC_CH_TS_MASK
marcozecchini 0:9fca2b23d0ba 50 * - \ref ADC_CH_BG_MASK
marcozecchini 0:9fca2b23d0ba 51 * @return None
marcozecchini 0:9fca2b23d0ba 52 * @note This API does not turn on ADC power nor does trigger ADC conversion
marcozecchini 0:9fca2b23d0ba 53 */
marcozecchini 0:9fca2b23d0ba 54 void ADC_Open(ADC_T *adc,
marcozecchini 0:9fca2b23d0ba 55 uint32_t u32InputMode,
marcozecchini 0:9fca2b23d0ba 56 uint32_t u32OpMode,
marcozecchini 0:9fca2b23d0ba 57 uint32_t u32ChMask)
marcozecchini 0:9fca2b23d0ba 58 {
marcozecchini 0:9fca2b23d0ba 59
marcozecchini 0:9fca2b23d0ba 60 ADC->CTL |= u32InputMode;
marcozecchini 0:9fca2b23d0ba 61 ADC->CTL |= u32OpMode;
marcozecchini 0:9fca2b23d0ba 62 ADC->CHEN = (ADC->CHEN & ~(ADC_CHEN_CHEN_Msk | ADC_CHEN_ADBGEN_Msk | ADC_CHEN_ADTSEN_Msk)) | u32ChMask;
marcozecchini 0:9fca2b23d0ba 63 return;
marcozecchini 0:9fca2b23d0ba 64 }
marcozecchini 0:9fca2b23d0ba 65
marcozecchini 0:9fca2b23d0ba 66 /**
marcozecchini 0:9fca2b23d0ba 67 * @brief Disable ADC module
marcozecchini 0:9fca2b23d0ba 68 * @param[in] adc Base address of ADC module
marcozecchini 0:9fca2b23d0ba 69 * @return None
marcozecchini 0:9fca2b23d0ba 70 */
marcozecchini 0:9fca2b23d0ba 71 void ADC_Close(ADC_T *adc)
marcozecchini 0:9fca2b23d0ba 72 {
marcozecchini 0:9fca2b23d0ba 73 SYS->IPRST1 |= SYS_IPRST1_ADCRST_Msk;
marcozecchini 0:9fca2b23d0ba 74 SYS->IPRST1 &= ~SYS_IPRST1_ADCRST_Msk;
marcozecchini 0:9fca2b23d0ba 75 return;
marcozecchini 0:9fca2b23d0ba 76
marcozecchini 0:9fca2b23d0ba 77 }
marcozecchini 0:9fca2b23d0ba 78
marcozecchini 0:9fca2b23d0ba 79 /**
marcozecchini 0:9fca2b23d0ba 80 * @brief Configure the hardware trigger condition and enable hardware trigger
marcozecchini 0:9fca2b23d0ba 81 * @param[in] adc Base address of ADC module
marcozecchini 0:9fca2b23d0ba 82 * @param[in] u32Source Decides the hardware trigger source. Valid values are:
marcozecchini 0:9fca2b23d0ba 83 * - \ref ADC_TRIGGER_BY_EXT_PIN
marcozecchini 0:9fca2b23d0ba 84 * - \ref ADC_TRIGGER_BY_PWM
marcozecchini 0:9fca2b23d0ba 85 * @param[in] u32Param While ADC trigger by PWM, this parameter is used to set the delay between PWM
marcozecchini 0:9fca2b23d0ba 86 * trigger and ADC conversion. Valid values are from 0 ~ 0xFF, and actual delay
marcozecchini 0:9fca2b23d0ba 87 * time is (4 * u32Param * HCLK). While ADC trigger by external pin, this parameter
marcozecchini 0:9fca2b23d0ba 88 * is used to set trigger condition. Valid values are:
marcozecchini 0:9fca2b23d0ba 89 * - \ref ADC_LOW_LEVEL_TRIGGER
marcozecchini 0:9fca2b23d0ba 90 * - \ref ADC_HIGH_LEVEL_TRIGGER
marcozecchini 0:9fca2b23d0ba 91 * - \ref ADC_FALLING_EDGE_TRIGGER
marcozecchini 0:9fca2b23d0ba 92 * - \ref ADC_RISING_EDGE_TRIGGER
marcozecchini 0:9fca2b23d0ba 93 * @return None
marcozecchini 0:9fca2b23d0ba 94 */
marcozecchini 0:9fca2b23d0ba 95 void ADC_EnableHWTrigger(ADC_T *adc,
marcozecchini 0:9fca2b23d0ba 96 uint32_t u32Source,
marcozecchini 0:9fca2b23d0ba 97 uint32_t u32Param)
marcozecchini 0:9fca2b23d0ba 98 {
marcozecchini 0:9fca2b23d0ba 99 ADC->CTL &= ~(ADC_TRIGGER_BY_PWM | ADC_RISING_EDGE_TRIGGER | ADC_CTL_HWTRGEN_Msk);
marcozecchini 0:9fca2b23d0ba 100 if(u32Source == ADC_TRIGGER_BY_EXT_PIN) {
marcozecchini 0:9fca2b23d0ba 101 ADC->CTL &= ~(ADC_CTL_HWTRGSEL_Msk | ADC_CTL_HWTRGCOND_Msk);
marcozecchini 0:9fca2b23d0ba 102 ADC->CTL |= u32Source | u32Param | ADC_CTL_HWTRGEN_Msk;
marcozecchini 0:9fca2b23d0ba 103 } else {
marcozecchini 0:9fca2b23d0ba 104 ADC->CTL &= ~(ADC_CTL_HWTRGSEL_Msk | ADC_CTL_PWMTRGDLY_Msk);
marcozecchini 0:9fca2b23d0ba 105 ADC->CTL |= u32Source | (u32Param << ADC_CTL_PWMTRGDLY_Pos) | ADC_CTL_HWTRGEN_Msk;
marcozecchini 0:9fca2b23d0ba 106 }
marcozecchini 0:9fca2b23d0ba 107
marcozecchini 0:9fca2b23d0ba 108 return;
marcozecchini 0:9fca2b23d0ba 109 }
marcozecchini 0:9fca2b23d0ba 110
marcozecchini 0:9fca2b23d0ba 111 /**
marcozecchini 0:9fca2b23d0ba 112 * @brief Disable hardware trigger ADC function.
marcozecchini 0:9fca2b23d0ba 113 * @param[in] adc Base address of ADC module
marcozecchini 0:9fca2b23d0ba 114 * @return None
marcozecchini 0:9fca2b23d0ba 115 */
marcozecchini 0:9fca2b23d0ba 116 void ADC_DisableHWTrigger(ADC_T *adc)
marcozecchini 0:9fca2b23d0ba 117 {
marcozecchini 0:9fca2b23d0ba 118 ADC->CTL &= ~(ADC_TRIGGER_BY_PWM | ADC_RISING_EDGE_TRIGGER | ADC_CTL_HWTRGEN_Msk);
marcozecchini 0:9fca2b23d0ba 119 return;
marcozecchini 0:9fca2b23d0ba 120 }
marcozecchini 0:9fca2b23d0ba 121
marcozecchini 0:9fca2b23d0ba 122 /**
marcozecchini 0:9fca2b23d0ba 123 * @brief Enable the interrupt(s) selected by u32Mask parameter.
marcozecchini 0:9fca2b23d0ba 124 * @param[in] adc Base address of ADC module
marcozecchini 0:9fca2b23d0ba 125 * @param[in] u32Mask The combination of interrupt status bits listed below. Each bit
marcozecchini 0:9fca2b23d0ba 126 * corresponds to a interrupt status. This parameter decides which
marcozecchini 0:9fca2b23d0ba 127 * interrupts will be enabled.
marcozecchini 0:9fca2b23d0ba 128 * - \ref ADC_ADF_INT
marcozecchini 0:9fca2b23d0ba 129 * - \ref ADC_CMP0_INT
marcozecchini 0:9fca2b23d0ba 130 * - \ref ADC_CMP1_INT
marcozecchini 0:9fca2b23d0ba 131 * @return None
marcozecchini 0:9fca2b23d0ba 132 */
marcozecchini 0:9fca2b23d0ba 133 void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
marcozecchini 0:9fca2b23d0ba 134 {
marcozecchini 0:9fca2b23d0ba 135 if(u32Mask & ADC_ADF_INT)
marcozecchini 0:9fca2b23d0ba 136 ADC->CTL |= ADC_CTL_ADCIEN_Msk;
marcozecchini 0:9fca2b23d0ba 137 if(u32Mask & ADC_CMP0_INT)
marcozecchini 0:9fca2b23d0ba 138 ADC->CMP[0] |= ADC_CMP0_ADCMPIE_Msk;
marcozecchini 0:9fca2b23d0ba 139 if(u32Mask & ADC_CMP1_INT)
marcozecchini 0:9fca2b23d0ba 140 ADC->CMP[1] |= ADC_CMP1_ADCMPIE_Msk;
marcozecchini 0:9fca2b23d0ba 141
marcozecchini 0:9fca2b23d0ba 142 return;
marcozecchini 0:9fca2b23d0ba 143 }
marcozecchini 0:9fca2b23d0ba 144
marcozecchini 0:9fca2b23d0ba 145 /**
marcozecchini 0:9fca2b23d0ba 146 * @brief Disable the interrupt(s) selected by u32Mask parameter.
marcozecchini 0:9fca2b23d0ba 147 * @param[in] adc Base address of ADC module
marcozecchini 0:9fca2b23d0ba 148 * @param[in] u32Mask The combination of interrupt status bits listed below. Each bit
marcozecchini 0:9fca2b23d0ba 149 * corresponds to a interrupt status. This parameter decides which
marcozecchini 0:9fca2b23d0ba 150 * interrupts will be disabled.
marcozecchini 0:9fca2b23d0ba 151 * - \ref ADC_ADF_INT
marcozecchini 0:9fca2b23d0ba 152 * - \ref ADC_CMP0_INT
marcozecchini 0:9fca2b23d0ba 153 * - \ref ADC_CMP1_INT
marcozecchini 0:9fca2b23d0ba 154 * @return None
marcozecchini 0:9fca2b23d0ba 155 */
marcozecchini 0:9fca2b23d0ba 156 void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
marcozecchini 0:9fca2b23d0ba 157 {
marcozecchini 0:9fca2b23d0ba 158 if(u32Mask & ADC_ADF_INT)
marcozecchini 0:9fca2b23d0ba 159 ADC->CTL &= ~ADC_CTL_ADCIEN_Msk;
marcozecchini 0:9fca2b23d0ba 160 if(u32Mask & ADC_CMP0_INT)
marcozecchini 0:9fca2b23d0ba 161 ADC->CMP[0] &= ~ADC_CMP0_ADCMPIE_Msk;
marcozecchini 0:9fca2b23d0ba 162 if(u32Mask & ADC_CMP1_INT)
marcozecchini 0:9fca2b23d0ba 163 ADC->CMP[1] &= ~ADC_CMP1_ADCMPIE_Msk;
marcozecchini 0:9fca2b23d0ba 164
marcozecchini 0:9fca2b23d0ba 165 return;
marcozecchini 0:9fca2b23d0ba 166 }
marcozecchini 0:9fca2b23d0ba 167
marcozecchini 0:9fca2b23d0ba 168
marcozecchini 0:9fca2b23d0ba 169
marcozecchini 0:9fca2b23d0ba 170 /*@}*/ /* end of group NUC472_442_ADC_EXPORTED_FUNCTIONS */
marcozecchini 0:9fca2b23d0ba 171
marcozecchini 0:9fca2b23d0ba 172 /*@}*/ /* end of group NUC472_442_ADC_Driver */
marcozecchini 0:9fca2b23d0ba 173
marcozecchini 0:9fca2b23d0ba 174 /*@}*/ /* end of group NUC472_442_Device_Driver */
marcozecchini 0:9fca2b23d0ba 175
marcozecchini 0:9fca2b23d0ba 176 /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/