Generic communication interface between the wireless board (mote) and the sensor board. Any kind of sensor board can be connected to the mote using this specification given it provides a SPI peripheral, one input pin with interrupt capability and one digital output. The sensor board must implement a special register set from which all required information can be retrieved. Protocol: http://is.gd/wuQorh Github: http://is.gd/ySj1L9
SLCD/FRDM-s401.h@1:acdf490d94a7, 2014-04-08 (annotated)
- Committer:
- marcelobarrosalmeida
- Date:
- Tue Apr 08 16:34:20 2014 +0000
- Revision:
- 1:acdf490d94a7
Adding accel to sensor list
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
marcelobarrosalmeida | 1:acdf490d94a7 | 1 | /*^^^^^^^^^^^^^^^^ LCD HARDWARE CONECTION ^^^^^^^^^^^^^^^^^^^^^^^^*/ |
marcelobarrosalmeida | 1:acdf490d94a7 | 2 | #define _LCDFRONTPLANES (8) // # of frontPlanes |
marcelobarrosalmeida | 1:acdf490d94a7 | 3 | #define _LCDBACKPLANES (4) // # of backplanes |
marcelobarrosalmeida | 1:acdf490d94a7 | 4 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 5 | /* |
marcelobarrosalmeida | 1:acdf490d94a7 | 6 | LCD logical organization definition |
marcelobarrosalmeida | 1:acdf490d94a7 | 7 | This section indicates how the LCD is distributed how many characteres of (7-seg, 14,seg, 16 seg, or colums in case of Dot Matrix) does it contain |
marcelobarrosalmeida | 1:acdf490d94a7 | 8 | First character is forced only one can be written |
marcelobarrosalmeida | 1:acdf490d94a7 | 9 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 10 | */ |
marcelobarrosalmeida | 1:acdf490d94a7 | 11 | // HARDWARE_CONFIG Changing LCD pins Allows to verify all LCD pins easily |
marcelobarrosalmeida | 1:acdf490d94a7 | 12 | // if HARDWARE_CONFIG == 0 FRDM-KL46 RevB |
marcelobarrosalmeida | 1:acdf490d94a7 | 13 | // if HARDWARE_CONFIG == 1 FRDM-KL46 RevA |
marcelobarrosalmeida | 1:acdf490d94a7 | 14 | #ifdef FRDM_REVA |
marcelobarrosalmeida | 1:acdf490d94a7 | 15 | #define HARDWARE_CONFIG 1 |
marcelobarrosalmeida | 1:acdf490d94a7 | 16 | #else |
marcelobarrosalmeida | 1:acdf490d94a7 | 17 | #define HARDWARE_CONFIG 0 |
marcelobarrosalmeida | 1:acdf490d94a7 | 18 | #endif |
marcelobarrosalmeida | 1:acdf490d94a7 | 19 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 20 | #define _CHARNUM (4) //number of chars that can be written |
marcelobarrosalmeida | 1:acdf490d94a7 | 21 | #define _CHAR_SIZE (2) // Used only when Dot Matrix is used |
marcelobarrosalmeida | 1:acdf490d94a7 | 22 | #define _LCDTYPE (2) //indicate how many LCD_WF are required to write a single Character |
marcelobarrosalmeida | 1:acdf490d94a7 | 23 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 24 | /* |
marcelobarrosalmeida | 1:acdf490d94a7 | 25 | Following definitions indicate how characters are associated to waveform |
marcelobarrosalmeida | 1:acdf490d94a7 | 26 | */ |
marcelobarrosalmeida | 1:acdf490d94a7 | 27 | /* Hardware configuration */ |
marcelobarrosalmeida | 1:acdf490d94a7 | 28 | #if HARDWARE_CONFIG == 0 |
marcelobarrosalmeida | 1:acdf490d94a7 | 29 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 30 | // LCD PIN1 to LCDWF0 Rev B |
marcelobarrosalmeida | 1:acdf490d94a7 | 31 | #define CHAR1a 37 // LCD Pin 5 |
marcelobarrosalmeida | 1:acdf490d94a7 | 32 | #define CHAR1b 17 // LCD Pin 6 |
marcelobarrosalmeida | 1:acdf490d94a7 | 33 | #define CHAR2a 7 // LCD Pin 7 |
marcelobarrosalmeida | 1:acdf490d94a7 | 34 | #define CHAR2b 8 // LCD Pin 8 |
marcelobarrosalmeida | 1:acdf490d94a7 | 35 | #define CHAR3a 53 // LCD Pin 9 |
marcelobarrosalmeida | 1:acdf490d94a7 | 36 | #define CHAR3b 38 // LCD Pin 10 |
marcelobarrosalmeida | 1:acdf490d94a7 | 37 | #define CHAR4a 10 // LCD Pin 11 |
marcelobarrosalmeida | 1:acdf490d94a7 | 38 | #define CHAR4b 11 // LCD Pin 12 |
marcelobarrosalmeida | 1:acdf490d94a7 | 39 | #define CHARCOM0 40 // LCD Pin 1 |
marcelobarrosalmeida | 1:acdf490d94a7 | 40 | #define CHARCOM1 52 // LCD Pin 2 |
marcelobarrosalmeida | 1:acdf490d94a7 | 41 | #define CHARCOM2 19 // LCD Pin 3 |
marcelobarrosalmeida | 1:acdf490d94a7 | 42 | #define CHARCOM3 18 // LCD Pin 4 |
marcelobarrosalmeida | 1:acdf490d94a7 | 43 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 44 | // LCD PIN1 to LCDWF2 for FRDM-KL46Z |
marcelobarrosalmeida | 1:acdf490d94a7 | 45 | #elif HARDWARE_CONFIG == 1 |
marcelobarrosalmeida | 1:acdf490d94a7 | 46 | #define CHAR1a 37 // LCD Pin 5 |
marcelobarrosalmeida | 1:acdf490d94a7 | 47 | #define CHAR1b 17 // LCD Pin 6 |
marcelobarrosalmeida | 1:acdf490d94a7 | 48 | #define CHAR2a 7 // LCD Pin 7 |
marcelobarrosalmeida | 1:acdf490d94a7 | 49 | #define CHAR2b 8 // LCD Pin 8 |
marcelobarrosalmeida | 1:acdf490d94a7 | 50 | #define CHAR3a 12 // LCD Pin 9 |
marcelobarrosalmeida | 1:acdf490d94a7 | 51 | #define CHAR3b 26 // LCD Pin 10 |
marcelobarrosalmeida | 1:acdf490d94a7 | 52 | #define CHAR4a 10 // LCD Pin 11 |
marcelobarrosalmeida | 1:acdf490d94a7 | 53 | #define CHAR4b 11 // LCD Pin 12 |
marcelobarrosalmeida | 1:acdf490d94a7 | 54 | #define CHARCOM0 51 // LCD Pin 1 |
marcelobarrosalmeida | 1:acdf490d94a7 | 55 | #define CHARCOM1 52 // LCD Pin 2 |
marcelobarrosalmeida | 1:acdf490d94a7 | 56 | #define CHARCOM2 19 // LCD Pin 3 |
marcelobarrosalmeida | 1:acdf490d94a7 | 57 | #define CHARCOM3 16 // LCD Pin 4 |
marcelobarrosalmeida | 1:acdf490d94a7 | 58 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 59 | #endif |
marcelobarrosalmeida | 1:acdf490d94a7 | 60 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 61 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 62 | /*Ascii Codification table information */ |
marcelobarrosalmeida | 1:acdf490d94a7 | 63 | #define ASCCI_TABLE_START '0' // indicates which is the first Ascii character in the table |
marcelobarrosalmeida | 1:acdf490d94a7 | 64 | #define ASCCI_TABLE_END 'Z' // indicates which is the last Ascii character in the table |
marcelobarrosalmeida | 1:acdf490d94a7 | 65 | #define BLANK_CHARACTER '>' // Indicate which ASCII character is a blank character (depends on ASCII table) |
marcelobarrosalmeida | 1:acdf490d94a7 | 66 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 67 | #define _ALLON 0xFF // Used for ALL_on function |
marcelobarrosalmeida | 1:acdf490d94a7 | 68 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 69 | #define SEGDP 0x01 |
marcelobarrosalmeida | 1:acdf490d94a7 | 70 | #define SEGC 0x02 |
marcelobarrosalmeida | 1:acdf490d94a7 | 71 | #define SEGB 0x04 |
marcelobarrosalmeida | 1:acdf490d94a7 | 72 | #define SEGA 0x08 |
marcelobarrosalmeida | 1:acdf490d94a7 | 73 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 74 | #define SEGD 0x01 |
marcelobarrosalmeida | 1:acdf490d94a7 | 75 | #define SEGE 0x02 |
marcelobarrosalmeida | 1:acdf490d94a7 | 76 | #define SEGG 0x04 |
marcelobarrosalmeida | 1:acdf490d94a7 | 77 | #define SEGF 0x08 |
marcelobarrosalmeida | 1:acdf490d94a7 | 78 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 79 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 80 | /* Fault detect initial limits */ |
marcelobarrosalmeida | 1:acdf490d94a7 | 81 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 82 | /* Fault detect initial parameters and limits */ |
marcelobarrosalmeida | 1:acdf490d94a7 | 83 | #define FAULTD_FP_FDPRS FDPRS_32 |
marcelobarrosalmeida | 1:acdf490d94a7 | 84 | #define FAULTD_FP_FDSWW FDSWW_128 |
marcelobarrosalmeida | 1:acdf490d94a7 | 85 | #define FAULTD_BP_FDPRS FDPRS_64 |
marcelobarrosalmeida | 1:acdf490d94a7 | 86 | #define FAULTD_BP_FDSWW FDSWW_128 |
marcelobarrosalmeida | 1:acdf490d94a7 | 87 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 88 | #define FAULTD_FP_HI 127 |
marcelobarrosalmeida | 1:acdf490d94a7 | 89 | #define FAULTD_FP_LO 110 |
marcelobarrosalmeida | 1:acdf490d94a7 | 90 | #define FAULTD_BP_HI 127 |
marcelobarrosalmeida | 1:acdf490d94a7 | 91 | #define FAULTD_BP_LO 110 |
marcelobarrosalmeida | 1:acdf490d94a7 | 92 | #define FAULTD_TIME 6 |
marcelobarrosalmeida | 1:acdf490d94a7 | 93 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 94 | extern const uint8_t WF_ORDERING_TABLE[]; // Logical Front plane N to LCD_WFx |
marcelobarrosalmeida | 1:acdf490d94a7 | 95 | |
marcelobarrosalmeida | 1:acdf490d94a7 | 96 |