João Victor / stm32f4-discovery-CAN-Activation

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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_rtc_ex.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_rtc_ex.c@144:ef7eb2e8f9f7
Child:
151:5eaa88a5bcc7
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l0xx_hal_rtc_ex.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.5.0
<> 144:ef7eb2e8f9f7 6 * @date 8-January-2016
<> 144:ef7eb2e8f9f7 7 * @brief Extended RTC HAL module driver.
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 10 * functionalities of the Real Time Clock (RTC) Extended peripheral:
<> 144:ef7eb2e8f9f7 11 * + RTC Time Stamp functions
<> 144:ef7eb2e8f9f7 12 * + RTC Tamper functions
<> 144:ef7eb2e8f9f7 13 * + RTC Wake-up functions
<> 144:ef7eb2e8f9f7 14 * + Extended Control functions
<> 144:ef7eb2e8f9f7 15 * + Extended RTC features functions
<> 144:ef7eb2e8f9f7 16 *
<> 144:ef7eb2e8f9f7 17 @verbatim
<> 144:ef7eb2e8f9f7 18 ==============================================================================
<> 144:ef7eb2e8f9f7 19 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 20 ==============================================================================
<> 144:ef7eb2e8f9f7 21 [..]
<> 144:ef7eb2e8f9f7 22 (+) Enable the RTC domain access.
<> 144:ef7eb2e8f9f7 23 (+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour
<> 144:ef7eb2e8f9f7 24 format using the HAL_RTC_Init() function.
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 *** RTC Wakeup configuration ***
<> 144:ef7eb2e8f9f7 27 ================================
<> 144:ef7eb2e8f9f7 28 [..]
<> 144:ef7eb2e8f9f7 29 (+) To configure the RTC Wakeup Clock source and Counter use the HAL_RTCEx_SetWakeUpTimer()
<> 144:ef7eb2e8f9f7 30 function. You can also configure the RTC Wakeup timer with interrupt mode
<> 144:ef7eb2e8f9f7 31 using the HAL_RTCEx_SetWakeUpTimer_IT() function.
<> 144:ef7eb2e8f9f7 32 (+) To read the RTC WakeUp Counter register, use the HAL_RTCEx_GetWakeUpTimer()
<> 144:ef7eb2e8f9f7 33 function.
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 *** Outputs configuration ***
<> 144:ef7eb2e8f9f7 36 =============================
<> 144:ef7eb2e8f9f7 37 [..] The RTC has 2 different outputs:
<> 144:ef7eb2e8f9f7 38 (+) RTC_ALARM: this output is used to manage the RTC Alarm A, Alarm B
<> 144:ef7eb2e8f9f7 39 and WaKeUp signals.
<> 144:ef7eb2e8f9f7 40 To output the selected RTC signal, use the HAL_RTC_Init() function.
<> 144:ef7eb2e8f9f7 41 (+) RTC_CALIB: this output is 512Hz signal or 1Hz.
<> 144:ef7eb2e8f9f7 42 To enable the RTC_CALIB, use the HAL_RTCEx_SetCalibrationOutPut() function.
<> 144:ef7eb2e8f9f7 43 (+) Two pins can be used as RTC_ALARM or RTC_CALIB (PC13, PB14) for STM32L05x/6x/7x/8x
<> 144:ef7eb2e8f9f7 44 and (PA2, PB14) for STM32L03x/4x managed on the RTC_OR register.
<> 144:ef7eb2e8f9f7 45 (+) When the RTC_CALIB or RTC_ALARM output is selected, the RTC_OUT pin is
<> 144:ef7eb2e8f9f7 46 automatically configured in output alternate function.
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 *** Smooth digital Calibration configuration ***
<> 144:ef7eb2e8f9f7 49 ================================================
<> 144:ef7eb2e8f9f7 50 [..]
<> 144:ef7eb2e8f9f7 51 (+) Configure the RTC Original Digital Calibration Value and the corresponding
<> 144:ef7eb2e8f9f7 52 calibration cycle period (32s,16s and 8s) using the HAL_RTCEx_SetSmoothCalib()
<> 144:ef7eb2e8f9f7 53 function.
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 *** TimeStamp configuration ***
<> 144:ef7eb2e8f9f7 56 ===============================
<> 144:ef7eb2e8f9f7 57 [..]
<> 144:ef7eb2e8f9f7 58 (+) Configure the RTC_AF trigger and enable the RTC TimeStamp using the
<> 144:ef7eb2e8f9f7 59 HAL_RTCEx_SetTimeStamp() function. You can also configure the RTC TimeStamp with
<> 144:ef7eb2e8f9f7 60 interrupt mode using the HAL_RTCEx_SetTimeStamp_IT() function.
<> 144:ef7eb2e8f9f7 61 (+) To read the RTC TimeStamp Time and Date register, use the HAL_RTCEx_GetTimeStamp()
<> 144:ef7eb2e8f9f7 62 function.
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 *** Tamper configuration ***
<> 144:ef7eb2e8f9f7 65 ============================
<> 144:ef7eb2e8f9f7 66 [..]
<> 144:ef7eb2e8f9f7 67 (+) Enable the RTC Tamper and configure the Tamper filter count, trigger Edge
<> 144:ef7eb2e8f9f7 68 or Level according to the Tamper filter (if equal to 0 Edge else Level)
<> 144:ef7eb2e8f9f7 69 value, sampling frequency, NoErase, MaskFlag, precharge or discharge and
<> 144:ef7eb2e8f9f7 70 Pull-UP using the HAL_RTCEx_SetTamper() function. You can configure RTC Tamper
<> 144:ef7eb2e8f9f7 71 with interrupt mode using HAL_RTCEx_SetTamper_IT() function.
<> 144:ef7eb2e8f9f7 72 (+) The default configuration of the Tamper erases the backup registers. To avoid
<> 144:ef7eb2e8f9f7 73 erase, enable the NoErase field on the RTC_TAMPCR register.
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 *** Backup Data Registers configuration ***
<> 144:ef7eb2e8f9f7 76 ===========================================
<> 144:ef7eb2e8f9f7 77 [..]
<> 144:ef7eb2e8f9f7 78 (+) To write to the RTC Backup Data registers, use the HAL_RTCEx_BKUPWrite()
<> 144:ef7eb2e8f9f7 79 function.
<> 144:ef7eb2e8f9f7 80 (+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead()
<> 144:ef7eb2e8f9f7 81 function.
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 @endverbatim
<> 144:ef7eb2e8f9f7 84 ******************************************************************************
<> 144:ef7eb2e8f9f7 85 * @attention
<> 144:ef7eb2e8f9f7 86 *
<> 144:ef7eb2e8f9f7 87 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 88 *
<> 144:ef7eb2e8f9f7 89 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 90 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 91 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 92 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 93 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 94 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 95 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 96 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 97 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 98 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 99 *
<> 144:ef7eb2e8f9f7 100 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 101 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 102 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 103 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 104 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 105 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 106 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 107 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 108 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 109 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 110 *
<> 144:ef7eb2e8f9f7 111 ******************************************************************************
<> 144:ef7eb2e8f9f7 112 */
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 115 #include "stm32l0xx_hal.h"
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 /** @addtogroup STM32L0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 118 * @{
<> 144:ef7eb2e8f9f7 119 */
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 /** @addtogroup RTCEx
<> 144:ef7eb2e8f9f7 122 * @brief RTC Extended HAL module driver
<> 144:ef7eb2e8f9f7 123 * @{
<> 144:ef7eb2e8f9f7 124 */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 #ifdef HAL_RTC_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 129 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 130 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 131 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 132 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 133 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 /** @addtogroup RTCEx_Exported_Functions
<> 144:ef7eb2e8f9f7 136 * @{
<> 144:ef7eb2e8f9f7 137 */
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 /** @addtogroup RTCEx_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 141 * @brief RTC TimeStamp and Tamper functions
<> 144:ef7eb2e8f9f7 142 *
<> 144:ef7eb2e8f9f7 143 @verbatim
<> 144:ef7eb2e8f9f7 144 ===============================================================================
<> 144:ef7eb2e8f9f7 145 ##### RTC TimeStamp and Tamper functions #####
<> 144:ef7eb2e8f9f7 146 ===============================================================================
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 [..] This section provides functions allowing to configure TimeStamp feature
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 @endverbatim
<> 144:ef7eb2e8f9f7 151 * @{
<> 144:ef7eb2e8f9f7 152 */
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 /**
<> 144:ef7eb2e8f9f7 155 * @brief Set TimeStamp.
<> 144:ef7eb2e8f9f7 156 * @note This API must be called before enabling the TimeStamp feature.
<> 144:ef7eb2e8f9f7 157 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 158 * @param TimeStampEdge: Specifies the pin edge on which the TimeStamp is
<> 144:ef7eb2e8f9f7 159 * activated.
<> 144:ef7eb2e8f9f7 160 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 161 * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 162 * rising edge of the related pin.
<> 144:ef7eb2e8f9f7 163 * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 164 * falling edge of the related pin.
<> 144:ef7eb2e8f9f7 165 * @param RTC_TimeStampPin: specifies the RTC TimeStamp Pin.
<> 144:ef7eb2e8f9f7 166 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 167 * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin on STM32L05x/6x/7x/8x
<> 144:ef7eb2e8f9f7 168 * and PA2 on STM32L03x/4x/2x/1x.
<> 144:ef7eb2e8f9f7 169 * @retval HAL status
<> 144:ef7eb2e8f9f7 170 */
<> 144:ef7eb2e8f9f7 171 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
<> 144:ef7eb2e8f9f7 172 {
<> 144:ef7eb2e8f9f7 173 uint32_t tmpreg = 0;
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 /* Check the parameters */
<> 144:ef7eb2e8f9f7 176 assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
<> 144:ef7eb2e8f9f7 177 assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
<> 144:ef7eb2e8f9f7 178
<> 144:ef7eb2e8f9f7 179 /* Process Locked */
<> 144:ef7eb2e8f9f7 180 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /* Get the RTC_CR register and clear the bits to be configured */
<> 144:ef7eb2e8f9f7 185 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 tmpreg|= TimeStampEdge;
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 190 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 191
<> 144:ef7eb2e8f9f7 192 /* Configure the Time Stamp TSEDGE and Enable bits */
<> 144:ef7eb2e8f9f7 193 hrtc->Instance->CR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 198 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /* Change RTC state */
<> 144:ef7eb2e8f9f7 201 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 204 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 return HAL_OK;
<> 144:ef7eb2e8f9f7 207 }
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /**
<> 144:ef7eb2e8f9f7 210 * @brief Set TimeStamp with Interrupt.
<> 144:ef7eb2e8f9f7 211 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 212 * @note This API must be called before enabling the TimeStamp feature.
<> 144:ef7eb2e8f9f7 213 * @param TimeStampEdge: Specifies the pin edge on which the TimeStamp is
<> 144:ef7eb2e8f9f7 214 * activated.
<> 144:ef7eb2e8f9f7 215 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 216 * @arg RTC_TIMESTAMPEDGE_RISING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 217 * rising edge of the related pin.
<> 144:ef7eb2e8f9f7 218 * @arg RTC_TIMESTAMPEDGE_FALLING: the Time stamp event occurs on the
<> 144:ef7eb2e8f9f7 219 * falling edge of the related pin.
<> 144:ef7eb2e8f9f7 220 * @param RTC_TimeStampPin: Specifies the RTC TimeStamp Pin.
<> 144:ef7eb2e8f9f7 221 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 222 * @arg RTC_TIMESTAMPPIN_DEFAULT: PC13 is selected as RTC TimeStamp Pin on STM32L05x/6x/7x/8x
<> 144:ef7eb2e8f9f7 223 * and PA2 on STM32L03x/4x/2x/1x.
<> 144:ef7eb2e8f9f7 224 * @retval HAL status
<> 144:ef7eb2e8f9f7 225 */
<> 144:ef7eb2e8f9f7 226 HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t TimeStampEdge, uint32_t RTC_TimeStampPin)
<> 144:ef7eb2e8f9f7 227 {
<> 144:ef7eb2e8f9f7 228 uint32_t tmpreg = 0;
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 /* Check the parameters */
<> 144:ef7eb2e8f9f7 231 assert_param(IS_TIMESTAMP_EDGE(TimeStampEdge));
<> 144:ef7eb2e8f9f7 232 assert_param(IS_RTC_TIMESTAMP_PIN(RTC_TimeStampPin));
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /* Process Locked */
<> 144:ef7eb2e8f9f7 235 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /* Get the RTC_CR register and clear the bits to be configured */
<> 144:ef7eb2e8f9f7 240 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 tmpreg |= TimeStampEdge;
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 245 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 /* Configure the Time Stamp TSEDGE and Enable bits */
<> 144:ef7eb2e8f9f7 248 hrtc->Instance->CR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 __HAL_RTC_TIMESTAMP_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 /* Enable IT timestamp */
<> 144:ef7eb2e8f9f7 253 __HAL_RTC_TIMESTAMP_ENABLE_IT(hrtc,RTC_IT_TS);
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /* RTC timestamp Interrupt Configuration: EXTI configuration */
<> 144:ef7eb2e8f9f7 256 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
<> 144:ef7eb2e8f9f7 259
<> 144:ef7eb2e8f9f7 260 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 261 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 264
<> 144:ef7eb2e8f9f7 265 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 266 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 return HAL_OK;
<> 144:ef7eb2e8f9f7 269 }
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 /**
<> 144:ef7eb2e8f9f7 272 * @brief Deactivate TimeStamp.
<> 144:ef7eb2e8f9f7 273 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 274 * @retval HAL status
<> 144:ef7eb2e8f9f7 275 */
<> 144:ef7eb2e8f9f7 276 HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 277 {
<> 144:ef7eb2e8f9f7 278 uint32_t tmpreg = 0;
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 /* Process Locked */
<> 144:ef7eb2e8f9f7 281 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 284
<> 144:ef7eb2e8f9f7 285 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 286 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 289 __HAL_RTC_TIMESTAMP_DISABLE_IT(hrtc, RTC_IT_TS);
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 /* Get the RTC_CR register and clear the bits to be configured */
<> 144:ef7eb2e8f9f7 292 tmpreg = (uint32_t)(hrtc->Instance->CR & (uint32_t)~(RTC_CR_TSEDGE | RTC_CR_TSE));
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 /* Configure the Time Stamp TSEDGE and Enable bits */
<> 144:ef7eb2e8f9f7 295 hrtc->Instance->CR = (uint32_t)tmpreg;
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 298 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 303 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 304
<> 144:ef7eb2e8f9f7 305 return HAL_OK;
<> 144:ef7eb2e8f9f7 306 }
<> 144:ef7eb2e8f9f7 307
<> 144:ef7eb2e8f9f7 308 /**
<> 144:ef7eb2e8f9f7 309 * @brief Get the RTC TimeStamp value.
<> 144:ef7eb2e8f9f7 310 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 * @param sTimeStamp: Pointer to Time structure
<> 144:ef7eb2e8f9f7 313 * @param sTimeStampDate: Pointer to Date structure
<> 144:ef7eb2e8f9f7 314 * @param Format: specifies the format of the entered parameters.
<> 144:ef7eb2e8f9f7 315 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 316 * @arg RTC_FORMAT_BIN: Binary data format
<> 144:ef7eb2e8f9f7 317 * @arg RTC_FORMAT_BCD: BCD data format
<> 144:ef7eb2e8f9f7 318 * @retval HAL status
<> 144:ef7eb2e8f9f7 319 */
<> 144:ef7eb2e8f9f7 320 HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef* sTimeStamp, RTC_DateTypeDef* sTimeStampDate, uint32_t Format)
<> 144:ef7eb2e8f9f7 321 {
<> 144:ef7eb2e8f9f7 322 uint32_t tmptime = 0, tmpdate = 0;
<> 144:ef7eb2e8f9f7 323
<> 144:ef7eb2e8f9f7 324 /* Check the parameters */
<> 144:ef7eb2e8f9f7 325 assert_param(IS_RTC_FORMAT(Format));
<> 144:ef7eb2e8f9f7 326
<> 144:ef7eb2e8f9f7 327 /* Get the TimeStamp time and date registers values */
<> 144:ef7eb2e8f9f7 328 tmptime = (uint32_t)(hrtc->Instance->TSTR & RTC_TR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 329 tmpdate = (uint32_t)(hrtc->Instance->TSDR & RTC_DR_RESERVED_MASK);
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331 /* Fill the Time structure fields with the read parameters */
<> 144:ef7eb2e8f9f7 332 sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TR_HT | RTC_TR_HU)) >> 16);
<> 144:ef7eb2e8f9f7 333 sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TR_MNT | RTC_TR_MNU)) >> 8);
<> 144:ef7eb2e8f9f7 334 sTimeStamp->Seconds = (uint8_t)(tmptime & (RTC_TR_ST | RTC_TR_SU));
<> 144:ef7eb2e8f9f7 335 sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TR_PM)) >> 16);
<> 144:ef7eb2e8f9f7 336 sTimeStamp->SubSeconds = (uint32_t) hrtc->Instance->TSSSR;
<> 144:ef7eb2e8f9f7 337
<> 144:ef7eb2e8f9f7 338 /* Fill the Date structure fields with the read parameters */
<> 144:ef7eb2e8f9f7 339 sTimeStampDate->Year = 0;
<> 144:ef7eb2e8f9f7 340 sTimeStampDate->Month = (uint8_t)((tmpdate & (RTC_DR_MT | RTC_DR_MU)) >> 8);
<> 144:ef7eb2e8f9f7 341 sTimeStampDate->Date = (uint8_t)(tmpdate & (RTC_DR_DT | RTC_DR_DU));
<> 144:ef7eb2e8f9f7 342 sTimeStampDate->WeekDay = (uint8_t)((tmpdate & (RTC_DR_WDU)) >> 13);
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /* Check the input parameters format */
<> 144:ef7eb2e8f9f7 345 if(Format == RTC_FORMAT_BIN)
<> 144:ef7eb2e8f9f7 346 {
<> 144:ef7eb2e8f9f7 347 /* Convert the TimeStamp structure parameters to Binary format */
<> 144:ef7eb2e8f9f7 348 sTimeStamp->Hours = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Hours);
<> 144:ef7eb2e8f9f7 349 sTimeStamp->Minutes = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Minutes);
<> 144:ef7eb2e8f9f7 350 sTimeStamp->Seconds = (uint8_t)RTC_Bcd2ToByte(sTimeStamp->Seconds);
<> 144:ef7eb2e8f9f7 351
<> 144:ef7eb2e8f9f7 352 /* Convert the DateTimeStamp structure parameters to Binary format */
<> 144:ef7eb2e8f9f7 353 sTimeStampDate->Month = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Month);
<> 144:ef7eb2e8f9f7 354 sTimeStampDate->Date = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->Date);
<> 144:ef7eb2e8f9f7 355 sTimeStampDate->WeekDay = (uint8_t)RTC_Bcd2ToByte(sTimeStampDate->WeekDay);
<> 144:ef7eb2e8f9f7 356 }
<> 144:ef7eb2e8f9f7 357
<> 144:ef7eb2e8f9f7 358 /* Clear the TIMESTAMP Flag */
<> 144:ef7eb2e8f9f7 359 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
<> 144:ef7eb2e8f9f7 360
<> 144:ef7eb2e8f9f7 361 return HAL_OK;
<> 144:ef7eb2e8f9f7 362 }
<> 144:ef7eb2e8f9f7 363
<> 144:ef7eb2e8f9f7 364 /**
<> 144:ef7eb2e8f9f7 365 * @brief Set Tamper
<> 144:ef7eb2e8f9f7 366 * @note By calling this API we disable the tamper interrupt for all tampers.
<> 144:ef7eb2e8f9f7 367 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 368 * @param sTamper: Pointer to Tamper Structure.
<> 144:ef7eb2e8f9f7 369 * @retval HAL status
<> 144:ef7eb2e8f9f7 370 */
<> 144:ef7eb2e8f9f7 371 HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper)
<> 144:ef7eb2e8f9f7 372 {
<> 144:ef7eb2e8f9f7 373 uint32_t tmpreg = 0;
<> 144:ef7eb2e8f9f7 374
<> 144:ef7eb2e8f9f7 375 /* Check the parameters */
<> 144:ef7eb2e8f9f7 376 assert_param( IS_RTC_TAMPER(sTamper->Tamper));
<> 144:ef7eb2e8f9f7 377 assert_param( IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
<> 144:ef7eb2e8f9f7 378 assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase));
<> 144:ef7eb2e8f9f7 379 assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag));
<> 144:ef7eb2e8f9f7 380 assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
<> 144:ef7eb2e8f9f7 381 assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
<> 144:ef7eb2e8f9f7 382 assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
<> 144:ef7eb2e8f9f7 383 assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
<> 144:ef7eb2e8f9f7 384 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
<> 144:ef7eb2e8f9f7 385
<> 144:ef7eb2e8f9f7 386 /* Process Locked */
<> 144:ef7eb2e8f9f7 387 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 388
<> 144:ef7eb2e8f9f7 389 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 390
<> 144:ef7eb2e8f9f7 391 /* Configure the tamper trigger */
<> 144:ef7eb2e8f9f7 392 if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE)
<> 144:ef7eb2e8f9f7 393 {
<> 144:ef7eb2e8f9f7 394 sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1);
<> 144:ef7eb2e8f9f7 395 }
<> 144:ef7eb2e8f9f7 396
<> 144:ef7eb2e8f9f7 397 if(sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE)
<> 144:ef7eb2e8f9f7 398 {
<> 144:ef7eb2e8f9f7 399 sTamper->NoErase = 0;
<> 144:ef7eb2e8f9f7 400 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 401 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 402 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 403 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 404 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 405
<> 144:ef7eb2e8f9f7 406 if((sTamper->Tamper & RTC_TAMPER_1) != 0)
<> 144:ef7eb2e8f9f7 407 {
<> 144:ef7eb2e8f9f7 408 sTamper->NoErase |= RTC_TAMPCR_TAMP1NOERASE;
<> 144:ef7eb2e8f9f7 409 }
<> 144:ef7eb2e8f9f7 410 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 411 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 412 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 413 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 414 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 415 */
<> 144:ef7eb2e8f9f7 416
<> 144:ef7eb2e8f9f7 417 if((sTamper->Tamper & RTC_TAMPER_2) != 0)
<> 144:ef7eb2e8f9f7 418 {
<> 144:ef7eb2e8f9f7 419 sTamper->NoErase |= RTC_TAMPCR_TAMP2NOERASE;
<> 144:ef7eb2e8f9f7 420 }
<> 144:ef7eb2e8f9f7 421 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 422 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 423 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 424
<> 144:ef7eb2e8f9f7 425 if((sTamper->Tamper & RTC_TAMPER_3) != 0)
<> 144:ef7eb2e8f9f7 426 {
<> 144:ef7eb2e8f9f7 427 sTamper->NoErase |= RTC_TAMPCR_TAMP3NOERASE;
<> 144:ef7eb2e8f9f7 428 }
<> 144:ef7eb2e8f9f7 429
<> 144:ef7eb2e8f9f7 430 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 431 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 432 */
<> 144:ef7eb2e8f9f7 433 }
<> 144:ef7eb2e8f9f7 434
<> 144:ef7eb2e8f9f7 435 if(sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE)
<> 144:ef7eb2e8f9f7 436 {
<> 144:ef7eb2e8f9f7 437 sTamper->MaskFlag = 0;
<> 144:ef7eb2e8f9f7 438
<> 144:ef7eb2e8f9f7 439 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 440 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 441 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 442 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 443 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 444
<> 144:ef7eb2e8f9f7 445 if((sTamper->Tamper & RTC_TAMPER_1) != 0)
<> 144:ef7eb2e8f9f7 446 {
<> 144:ef7eb2e8f9f7 447 sTamper->MaskFlag |= RTC_TAMPCR_TAMP1MF;
<> 144:ef7eb2e8f9f7 448 }
<> 144:ef7eb2e8f9f7 449 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 450 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 451 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 452 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 453 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 454 */
<> 144:ef7eb2e8f9f7 455
<> 144:ef7eb2e8f9f7 456 if((sTamper->Tamper & RTC_TAMPER_2) != 0)
<> 144:ef7eb2e8f9f7 457 {
<> 144:ef7eb2e8f9f7 458 sTamper->MaskFlag |= RTC_TAMPCR_TAMP2MF;
<> 144:ef7eb2e8f9f7 459 }
<> 144:ef7eb2e8f9f7 460 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 461 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 462 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 463
<> 144:ef7eb2e8f9f7 464 if((sTamper->Tamper & RTC_TAMPER_3) != 0)
<> 144:ef7eb2e8f9f7 465 {
<> 144:ef7eb2e8f9f7 466 sTamper->MaskFlag |= RTC_TAMPCR_TAMP3MF;
<> 144:ef7eb2e8f9f7 467 }
<> 144:ef7eb2e8f9f7 468 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 469 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx)|| (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 470 */
<> 144:ef7eb2e8f9f7 471 }
<> 144:ef7eb2e8f9f7 472
<> 144:ef7eb2e8f9f7 473 /* Configure the RTC_TAMPCR register */
<> 144:ef7eb2e8f9f7 474 tmpreg = (uint32_t)((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->NoErase |\
<> 144:ef7eb2e8f9f7 475 (uint32_t)sTamper->MaskFlag | (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency |\
<> 144:ef7eb2e8f9f7 476 (uint32_t)sTamper->PrechargeDuration | (uint32_t)sTamper->TamperPullUp | (uint32_t)sTamper->TimeStampOnTamperDetection);
<> 144:ef7eb2e8f9f7 477
<> 144:ef7eb2e8f9f7 478 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 479 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
<> 144:ef7eb2e8f9f7 480 hrtc->Instance->TAMPCR &= ((uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 481 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 482 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE |\
<> 144:ef7eb2e8f9f7 483 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP1NOERASE | RTC_TAMPCR_TAMP2NOERASE|\
<> 144:ef7eb2e8f9f7 484 RTC_TAMPCR_TAMP1MF | RTC_TAMPCR_TAMP2MF));
<> 144:ef7eb2e8f9f7 485
<> 144:ef7eb2e8f9f7 486 #elif defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 487 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 488 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 489 hrtc->Instance->TAMPCR &= ((uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 490 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 491 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE |\
<> 144:ef7eb2e8f9f7 492 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE | RTC_TAMPCR_TAMP1NOERASE |\
<> 144:ef7eb2e8f9f7 493 RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE | RTC_TAMPCR_TAMP1MF |\
<> 144:ef7eb2e8f9f7 494 RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF));
<> 144:ef7eb2e8f9f7 495
<> 144:ef7eb2e8f9f7 496 #elif defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 497 hrtc->Instance->TAMPCR &= ((uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 498 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 499 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE |\
<> 144:ef7eb2e8f9f7 500 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE |\
<> 144:ef7eb2e8f9f7 501 RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE |\
<> 144:ef7eb2e8f9f7 502 RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF));
<> 144:ef7eb2e8f9f7 503
<> 144:ef7eb2e8f9f7 504 #endif /* (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 505 */
<> 144:ef7eb2e8f9f7 506
<> 144:ef7eb2e8f9f7 507 hrtc->Instance->TAMPCR |= tmpreg;
<> 144:ef7eb2e8f9f7 508
<> 144:ef7eb2e8f9f7 509 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 510
<> 144:ef7eb2e8f9f7 511 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 512 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 513
<> 144:ef7eb2e8f9f7 514 return HAL_OK;
<> 144:ef7eb2e8f9f7 515 }
<> 144:ef7eb2e8f9f7 516
<> 144:ef7eb2e8f9f7 517 /**
<> 144:ef7eb2e8f9f7 518 * @brief Set Tamper with interrupt.
<> 144:ef7eb2e8f9f7 519 * @note By calling this API we force the tamper interrupt for all tampers.
<> 144:ef7eb2e8f9f7 520 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 521 * @param sTamper: Pointer to RTC Tamper.
<> 144:ef7eb2e8f9f7 522 * @retval HAL status
<> 144:ef7eb2e8f9f7 523 */
<> 144:ef7eb2e8f9f7 524 HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef* sTamper)
<> 144:ef7eb2e8f9f7 525 {
<> 144:ef7eb2e8f9f7 526 uint32_t tmpreg = 0;
<> 144:ef7eb2e8f9f7 527
<> 144:ef7eb2e8f9f7 528 /* Check the parameters */
<> 144:ef7eb2e8f9f7 529 assert_param( IS_RTC_TAMPER(sTamper->Tamper));
<> 144:ef7eb2e8f9f7 530 assert_param(IS_RTC_TAMPER_INTERRUPT(sTamper->Interrupt));
<> 144:ef7eb2e8f9f7 531 assert_param( IS_RTC_TAMPER_TRIGGER(sTamper->Trigger));
<> 144:ef7eb2e8f9f7 532 assert_param(IS_RTC_TAMPER_ERASE_MODE(sTamper->NoErase));
<> 144:ef7eb2e8f9f7 533 assert_param(IS_RTC_TAMPER_MASKFLAG_STATE(sTamper->MaskFlag));
<> 144:ef7eb2e8f9f7 534 assert_param(IS_RTC_TAMPER_FILTER(sTamper->Filter));
<> 144:ef7eb2e8f9f7 535 assert_param(IS_RTC_TAMPER_SAMPLING_FREQ(sTamper->SamplingFrequency));
<> 144:ef7eb2e8f9f7 536 assert_param(IS_RTC_TAMPER_PRECHARGE_DURATION(sTamper->PrechargeDuration));
<> 144:ef7eb2e8f9f7 537 assert_param(IS_RTC_TAMPER_PULLUP_STATE(sTamper->TamperPullUp));
<> 144:ef7eb2e8f9f7 538 assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sTamper->TimeStampOnTamperDetection));
<> 144:ef7eb2e8f9f7 539
<> 144:ef7eb2e8f9f7 540 /* Process Locked */
<> 144:ef7eb2e8f9f7 541 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 542
<> 144:ef7eb2e8f9f7 543 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 544
<> 144:ef7eb2e8f9f7 545 /* Configure the tamper trigger */
<> 144:ef7eb2e8f9f7 546 if(sTamper->Trigger != RTC_TAMPERTRIGGER_RISINGEDGE)
<> 144:ef7eb2e8f9f7 547 {
<> 144:ef7eb2e8f9f7 548 sTamper->Trigger = (uint32_t)(sTamper->Tamper << 1);
<> 144:ef7eb2e8f9f7 549 }
<> 144:ef7eb2e8f9f7 550
<> 144:ef7eb2e8f9f7 551 if(sTamper->NoErase != RTC_TAMPER_ERASE_BACKUP_ENABLE)
<> 144:ef7eb2e8f9f7 552 {
<> 144:ef7eb2e8f9f7 553 sTamper->NoErase = 0;
<> 144:ef7eb2e8f9f7 554
<> 144:ef7eb2e8f9f7 555 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 556 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 557 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 558 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 559 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 560
<> 144:ef7eb2e8f9f7 561 if((sTamper->Tamper & RTC_TAMPER_1) != 0)
<> 144:ef7eb2e8f9f7 562 {
<> 144:ef7eb2e8f9f7 563 sTamper->NoErase |= RTC_TAMPCR_TAMP1NOERASE;
<> 144:ef7eb2e8f9f7 564 }
<> 144:ef7eb2e8f9f7 565 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 566 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 567 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 568 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 569 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 570 */
<> 144:ef7eb2e8f9f7 571
<> 144:ef7eb2e8f9f7 572
<> 144:ef7eb2e8f9f7 573 if((sTamper->Tamper & RTC_TAMPER_2) != 0)
<> 144:ef7eb2e8f9f7 574 {
<> 144:ef7eb2e8f9f7 575 sTamper->NoErase |= RTC_TAMPCR_TAMP2NOERASE;
<> 144:ef7eb2e8f9f7 576 }
<> 144:ef7eb2e8f9f7 577 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 578 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 579 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 580
<> 144:ef7eb2e8f9f7 581 if((sTamper->Tamper & RTC_TAMPER_3) != 0)
<> 144:ef7eb2e8f9f7 582 {
<> 144:ef7eb2e8f9f7 583 sTamper->NoErase |= RTC_TAMPCR_TAMP3NOERASE;
<> 144:ef7eb2e8f9f7 584 }
<> 144:ef7eb2e8f9f7 585 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 586 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 587 */
<> 144:ef7eb2e8f9f7 588 }
<> 144:ef7eb2e8f9f7 589
<> 144:ef7eb2e8f9f7 590 if(sTamper->MaskFlag != RTC_TAMPERMASK_FLAG_DISABLE)
<> 144:ef7eb2e8f9f7 591 {
<> 144:ef7eb2e8f9f7 592 sTamper->MaskFlag = 0;
<> 144:ef7eb2e8f9f7 593
<> 144:ef7eb2e8f9f7 594 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 595 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 596 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 597 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 598 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 599 if((sTamper->Tamper & RTC_TAMPER_1) != 0)
<> 144:ef7eb2e8f9f7 600 {
<> 144:ef7eb2e8f9f7 601 sTamper->MaskFlag |= RTC_TAMPCR_TAMP1MF;
<> 144:ef7eb2e8f9f7 602 }
<> 144:ef7eb2e8f9f7 603 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 604 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 605 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 606 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 607 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 608 */
<> 144:ef7eb2e8f9f7 609
<> 144:ef7eb2e8f9f7 610 if((sTamper->Tamper & RTC_TAMPER_2) != 0)
<> 144:ef7eb2e8f9f7 611 {
<> 144:ef7eb2e8f9f7 612 sTamper->MaskFlag |= RTC_TAMPCR_TAMP2MF;
<> 144:ef7eb2e8f9f7 613 }
<> 144:ef7eb2e8f9f7 614 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 615 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 616 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 617
<> 144:ef7eb2e8f9f7 618 if((sTamper->Tamper & RTC_TAMPER_3) != 0)
<> 144:ef7eb2e8f9f7 619 {
<> 144:ef7eb2e8f9f7 620 sTamper->MaskFlag |= RTC_TAMPCR_TAMP3MF;
<> 144:ef7eb2e8f9f7 621 }
<> 144:ef7eb2e8f9f7 622 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 623 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 624 */
<> 144:ef7eb2e8f9f7 625 }
<> 144:ef7eb2e8f9f7 626
<> 144:ef7eb2e8f9f7 627 /* Configure the RTC_TAMPCR register */
<> 144:ef7eb2e8f9f7 628 tmpreg = (uint32_t)((uint32_t)sTamper->Tamper | (uint32_t)sTamper->Interrupt | (uint32_t)sTamper->Trigger | (uint32_t)sTamper->NoErase |\
<> 144:ef7eb2e8f9f7 629 (uint32_t)sTamper->MaskFlag | (uint32_t)sTamper->Filter | (uint32_t)sTamper->SamplingFrequency |\
<> 144:ef7eb2e8f9f7 630 (uint32_t)sTamper->PrechargeDuration | (uint32_t)sTamper->TamperPullUp | (uint32_t)sTamper->TimeStampOnTamperDetection);
<> 144:ef7eb2e8f9f7 631
<> 144:ef7eb2e8f9f7 632 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 633 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx)
<> 144:ef7eb2e8f9f7 634 hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 635 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 636 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE |\
<> 144:ef7eb2e8f9f7 637 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP1NOERASE | RTC_TAMPCR_TAMP2NOERASE |\
<> 144:ef7eb2e8f9f7 638 RTC_TAMPCR_TAMP1MF | RTC_TAMPCR_TAMP2MF);
<> 144:ef7eb2e8f9f7 639
<> 144:ef7eb2e8f9f7 640 #elif defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 641 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 642 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 643 hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 644 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 645 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE | RTC_TAMPCR_TAMP1IE |\
<> 144:ef7eb2e8f9f7 646 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE | RTC_TAMPCR_TAMP1NOERASE |\
<> 144:ef7eb2e8f9f7 647 RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE | RTC_TAMPCR_TAMP1MF |\
<> 144:ef7eb2e8f9f7 648 RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF);
<> 144:ef7eb2e8f9f7 649
<> 144:ef7eb2e8f9f7 650 #elif defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 651 hrtc->Instance->TAMPCR &= (uint32_t)~((uint32_t)sTamper->Tamper | (uint32_t)(sTamper->Tamper << 1) | RTC_TAMPCR_TAMPTS |\
<> 144:ef7eb2e8f9f7 652 RTC_TAMPCR_TAMPFREQ | RTC_TAMPCR_TAMPFLT | RTC_TAMPCR_TAMPPRCH |\
<> 144:ef7eb2e8f9f7 653 RTC_TAMPCR_TAMPPUDIS | RTC_TAMPCR_TAMPIE |\
<> 144:ef7eb2e8f9f7 654 RTC_TAMPCR_TAMP2IE | RTC_TAMPCR_TAMP3IE |\
<> 144:ef7eb2e8f9f7 655 RTC_TAMPCR_TAMP2NOERASE | RTC_TAMPCR_TAMP3NOERASE |\
<> 144:ef7eb2e8f9f7 656 RTC_TAMPCR_TAMP2MF | RTC_TAMPCR_TAMP3MF);
<> 144:ef7eb2e8f9f7 657
<> 144:ef7eb2e8f9f7 658 #endif /* (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 659 */
<> 144:ef7eb2e8f9f7 660
<> 144:ef7eb2e8f9f7 661 hrtc->Instance->TAMPCR |= tmpreg;
<> 144:ef7eb2e8f9f7 662
<> 144:ef7eb2e8f9f7 663 /* RTC Tamper Interrupt Configuration: EXTI configuration */
<> 144:ef7eb2e8f9f7 664 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 665
<> 144:ef7eb2e8f9f7 666 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_RISING_EDGE();
<> 144:ef7eb2e8f9f7 667
<> 144:ef7eb2e8f9f7 668 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 669
<> 144:ef7eb2e8f9f7 670 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 671 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 672
<> 144:ef7eb2e8f9f7 673 return HAL_OK;
<> 144:ef7eb2e8f9f7 674 }
<> 144:ef7eb2e8f9f7 675
<> 144:ef7eb2e8f9f7 676 /**
<> 144:ef7eb2e8f9f7 677 * @brief Deactivate Tamper.
<> 144:ef7eb2e8f9f7 678 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 679 * @param Tamper: Selected tamper pin.
<> 144:ef7eb2e8f9f7 680 * This parameter can be RTC_Tamper_1 and/or RTC_TAMPER_2 for STM32L05x/6x.
<> 144:ef7eb2e8f9f7 681 * This parameter can be any combination of RTC_TAMPER_1, RTC_TAMPER_2 and RTC_TAMPER_3 for STM32L01x/2x/3x/7x/8x.
<> 144:ef7eb2e8f9f7 682 * @retval HAL status
<> 144:ef7eb2e8f9f7 683 */
<> 144:ef7eb2e8f9f7 684 HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper)
<> 144:ef7eb2e8f9f7 685 {
<> 144:ef7eb2e8f9f7 686 assert_param( IS_RTC_TAMPER(Tamper));
<> 144:ef7eb2e8f9f7 687
<> 144:ef7eb2e8f9f7 688 /* Process Locked */
<> 144:ef7eb2e8f9f7 689 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 690
<> 144:ef7eb2e8f9f7 691 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 692
<> 144:ef7eb2e8f9f7 693 /* Disable the selected Tamper pin */
<> 144:ef7eb2e8f9f7 694 hrtc->Instance->TAMPCR &= ((uint32_t)~Tamper);
<> 144:ef7eb2e8f9f7 695
<> 144:ef7eb2e8f9f7 696 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 697 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 698 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 699 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 700 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 701 if ((Tamper & RTC_TAMPER_1) != 0)
<> 144:ef7eb2e8f9f7 702 {
<> 144:ef7eb2e8f9f7 703 /* Disable the Tamper1 interrupt */
<> 144:ef7eb2e8f9f7 704 hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP1));
<> 144:ef7eb2e8f9f7 705 }
<> 144:ef7eb2e8f9f7 706
<> 144:ef7eb2e8f9f7 707 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 708 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 709 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 710 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 711 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 712 */
<> 144:ef7eb2e8f9f7 713
<> 144:ef7eb2e8f9f7 714 if ((Tamper & RTC_TAMPER_2) != 0)
<> 144:ef7eb2e8f9f7 715 {
<> 144:ef7eb2e8f9f7 716 /* Disable the Tamper2 interrupt */
<> 144:ef7eb2e8f9f7 717 hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP2));
<> 144:ef7eb2e8f9f7 718 }
<> 144:ef7eb2e8f9f7 719
<> 144:ef7eb2e8f9f7 720 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 721 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 722 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 723
<> 144:ef7eb2e8f9f7 724 if ((Tamper & RTC_TAMPER_3) != 0)
<> 144:ef7eb2e8f9f7 725 {
<> 144:ef7eb2e8f9f7 726 /* Disable the Tamper3 interrupt */
<> 144:ef7eb2e8f9f7 727 hrtc->Instance->TAMPCR &= ((uint32_t)~(RTC_IT_TAMP | RTC_IT_TAMP3));
<> 144:ef7eb2e8f9f7 728 }
<> 144:ef7eb2e8f9f7 729
<> 144:ef7eb2e8f9f7 730 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 731 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 732 */
<> 144:ef7eb2e8f9f7 733
<> 144:ef7eb2e8f9f7 734 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 735
<> 144:ef7eb2e8f9f7 736 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 737 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 738
<> 144:ef7eb2e8f9f7 739 return HAL_OK;
<> 144:ef7eb2e8f9f7 740 }
<> 144:ef7eb2e8f9f7 741
<> 144:ef7eb2e8f9f7 742 /**
<> 144:ef7eb2e8f9f7 743 * @brief Handle TimeStamp interrupt request.
<> 144:ef7eb2e8f9f7 744 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 745 * @retval None
<> 144:ef7eb2e8f9f7 746 */
<> 144:ef7eb2e8f9f7 747 void HAL_RTCEx_TamperTimeStampIRQHandler(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 748 {
<> 144:ef7eb2e8f9f7 749 /* Get the TimeStamp interrupt source enable status */
<> 144:ef7eb2e8f9f7 750 if(__HAL_RTC_TIMESTAMP_GET_IT_SOURCE(hrtc, RTC_IT_TS) != RESET)
<> 144:ef7eb2e8f9f7 751 {
<> 144:ef7eb2e8f9f7 752 /* Get the pending status of the TIMESTAMP Interrupt */
<> 144:ef7eb2e8f9f7 753 if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) != RESET)
<> 144:ef7eb2e8f9f7 754 {
<> 144:ef7eb2e8f9f7 755 /* TIMESTAMP callback */
<> 144:ef7eb2e8f9f7 756 HAL_RTCEx_TimeStampEventCallback(hrtc);
<> 144:ef7eb2e8f9f7 757
<> 144:ef7eb2e8f9f7 758 /* Clear the TIMESTAMP interrupt pending bit */
<> 144:ef7eb2e8f9f7 759 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSF);
<> 144:ef7eb2e8f9f7 760 }
<> 144:ef7eb2e8f9f7 761 }
<> 144:ef7eb2e8f9f7 762
<> 144:ef7eb2e8f9f7 763 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 764 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 765 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 766 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 767 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 768
<> 144:ef7eb2e8f9f7 769 /* Get the Tamper1 interrupts source enable status */
<> 144:ef7eb2e8f9f7 770 if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP1) != RESET)
<> 144:ef7eb2e8f9f7 771 {
<> 144:ef7eb2e8f9f7 772 /* Get the pending status of the Tamper1 Interrupt */
<> 144:ef7eb2e8f9f7 773 if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F) != RESET)
<> 144:ef7eb2e8f9f7 774 {
<> 144:ef7eb2e8f9f7 775 /* Tamper1 callback */
<> 144:ef7eb2e8f9f7 776 HAL_RTCEx_Tamper1EventCallback(hrtc);
<> 144:ef7eb2e8f9f7 777
<> 144:ef7eb2e8f9f7 778 /* Clear the Tamper1 interrupt pending bit */
<> 144:ef7eb2e8f9f7 779 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP1F);
<> 144:ef7eb2e8f9f7 780 }
<> 144:ef7eb2e8f9f7 781 }
<> 144:ef7eb2e8f9f7 782 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 783 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 784 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 785 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 786 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 787 */
<> 144:ef7eb2e8f9f7 788
<> 144:ef7eb2e8f9f7 789 /* Get the Tamper2 interrupts source enable status */
<> 144:ef7eb2e8f9f7 790 if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP2) != RESET)
<> 144:ef7eb2e8f9f7 791 {
<> 144:ef7eb2e8f9f7 792 /* Get the pending status of the Tamper2 Interrupt */
<> 144:ef7eb2e8f9f7 793 if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) != RESET)
<> 144:ef7eb2e8f9f7 794 {
<> 144:ef7eb2e8f9f7 795 /* Tamper2 callback */
<> 144:ef7eb2e8f9f7 796 HAL_RTCEx_Tamper2EventCallback(hrtc);
<> 144:ef7eb2e8f9f7 797
<> 144:ef7eb2e8f9f7 798 /* Clear the Tamper2 interrupt pending bit */
<> 144:ef7eb2e8f9f7 799 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP2F);
<> 144:ef7eb2e8f9f7 800 }
<> 144:ef7eb2e8f9f7 801 }
<> 144:ef7eb2e8f9f7 802
<> 144:ef7eb2e8f9f7 803 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 804 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 805 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 806
<> 144:ef7eb2e8f9f7 807 /* Get the Tamper3 interrupts source enable status */
<> 144:ef7eb2e8f9f7 808 if(__HAL_RTC_TAMPER_GET_IT_SOURCE(hrtc, RTC_IT_TAMP | RTC_IT_TAMP3) != RESET)
<> 144:ef7eb2e8f9f7 809 {
<> 144:ef7eb2e8f9f7 810 /* Get the pending status of the Tamper3 Interrupt */
<> 144:ef7eb2e8f9f7 811 if(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP3F) != RESET)
<> 144:ef7eb2e8f9f7 812 {
<> 144:ef7eb2e8f9f7 813 /* Tamper3 callback */
<> 144:ef7eb2e8f9f7 814 HAL_RTCEx_Tamper3EventCallback(hrtc);
<> 144:ef7eb2e8f9f7 815
<> 144:ef7eb2e8f9f7 816 /* Clear the Tamper3 interrupt pending bit */
<> 144:ef7eb2e8f9f7 817 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc, RTC_FLAG_TAMP3F);
<> 144:ef7eb2e8f9f7 818 }
<> 144:ef7eb2e8f9f7 819 }
<> 144:ef7eb2e8f9f7 820
<> 144:ef7eb2e8f9f7 821 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 822 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) ||
<> 144:ef7eb2e8f9f7 823 * (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 824 */
<> 144:ef7eb2e8f9f7 825
<> 144:ef7eb2e8f9f7 826 /* Clear the EXTI's Flag for RTC TimeStamp and Tamper */
<> 144:ef7eb2e8f9f7 827 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG();
<> 144:ef7eb2e8f9f7 828
<> 144:ef7eb2e8f9f7 829 /* Change RTC state */
<> 144:ef7eb2e8f9f7 830 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 831 }
<> 144:ef7eb2e8f9f7 832
<> 144:ef7eb2e8f9f7 833 /**
<> 144:ef7eb2e8f9f7 834 * @brief TimeStamp callback.
<> 144:ef7eb2e8f9f7 835 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 836 * @retval None
<> 144:ef7eb2e8f9f7 837 */
<> 144:ef7eb2e8f9f7 838 __weak void HAL_RTCEx_TimeStampEventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 839 {
<> 144:ef7eb2e8f9f7 840 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 841 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 842
<> 144:ef7eb2e8f9f7 843 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 844 the HAL_RTCEx_TimeStampEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 845 */
<> 144:ef7eb2e8f9f7 846 }
<> 144:ef7eb2e8f9f7 847
<> 144:ef7eb2e8f9f7 848 /**
<> 144:ef7eb2e8f9f7 849 * @brief Tamper 1 callback.
<> 144:ef7eb2e8f9f7 850 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 851 * @retval None
<> 144:ef7eb2e8f9f7 852 */
<> 144:ef7eb2e8f9f7 853 __weak void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 854 {
<> 144:ef7eb2e8f9f7 855 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 856 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 857
<> 144:ef7eb2e8f9f7 858 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 859 the HAL_RTCEx_Tamper1EventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 860 */
<> 144:ef7eb2e8f9f7 861 }
<> 144:ef7eb2e8f9f7 862
<> 144:ef7eb2e8f9f7 863 /**
<> 144:ef7eb2e8f9f7 864 * @brief Tamper 2 callback.
<> 144:ef7eb2e8f9f7 865 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 866 * @retval None
<> 144:ef7eb2e8f9f7 867 */
<> 144:ef7eb2e8f9f7 868 __weak void HAL_RTCEx_Tamper2EventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 869 {
<> 144:ef7eb2e8f9f7 870 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 871 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 872
<> 144:ef7eb2e8f9f7 873 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 874 the HAL_RTCEx_Tamper2EventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 875 */
<> 144:ef7eb2e8f9f7 876 }
<> 144:ef7eb2e8f9f7 877
<> 144:ef7eb2e8f9f7 878
<> 144:ef7eb2e8f9f7 879 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 880 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 881 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 882
<> 144:ef7eb2e8f9f7 883 /**
<> 144:ef7eb2e8f9f7 884 * @brief Tamper 3 callback.
<> 144:ef7eb2e8f9f7 885 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 886 * @retval None
<> 144:ef7eb2e8f9f7 887 */
<> 144:ef7eb2e8f9f7 888 __weak void HAL_RTCEx_Tamper3EventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 889 {
<> 144:ef7eb2e8f9f7 890 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 891 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 892
<> 144:ef7eb2e8f9f7 893 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 894 the HAL_RTCEx_Tamper3EventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 895 */
<> 144:ef7eb2e8f9f7 896 }
<> 144:ef7eb2e8f9f7 897
<> 144:ef7eb2e8f9f7 898 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 899 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 900 */
<> 144:ef7eb2e8f9f7 901
<> 144:ef7eb2e8f9f7 902
<> 144:ef7eb2e8f9f7 903 /**
<> 144:ef7eb2e8f9f7 904 * @brief Handle TimeStamp polling request.
<> 144:ef7eb2e8f9f7 905 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 906 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 907 * @retval HAL status
<> 144:ef7eb2e8f9f7 908 */
<> 144:ef7eb2e8f9f7 909 HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 910 {
<> 144:ef7eb2e8f9f7 911 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 912
<> 144:ef7eb2e8f9f7 913 while(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSF) == RESET)
<> 144:ef7eb2e8f9f7 914 {
<> 144:ef7eb2e8f9f7 915 if(__HAL_RTC_TIMESTAMP_GET_FLAG(hrtc, RTC_FLAG_TSOVF) != RESET)
<> 144:ef7eb2e8f9f7 916 {
<> 144:ef7eb2e8f9f7 917 /* Clear the TIMESTAMP OverRun Flag */
<> 144:ef7eb2e8f9f7 918 __HAL_RTC_TIMESTAMP_CLEAR_FLAG(hrtc, RTC_FLAG_TSOVF);
<> 144:ef7eb2e8f9f7 919
<> 144:ef7eb2e8f9f7 920 /* Change TIMESTAMP state */
<> 144:ef7eb2e8f9f7 921 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 922
<> 144:ef7eb2e8f9f7 923 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 924 }
<> 144:ef7eb2e8f9f7 925
<> 144:ef7eb2e8f9f7 926 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 927 {
<> 144:ef7eb2e8f9f7 928 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 929 {
<> 144:ef7eb2e8f9f7 930 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 931 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 932 }
<> 144:ef7eb2e8f9f7 933 }
<> 144:ef7eb2e8f9f7 934 }
<> 144:ef7eb2e8f9f7 935
<> 144:ef7eb2e8f9f7 936 /* Change RTC state */
<> 144:ef7eb2e8f9f7 937 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 938
<> 144:ef7eb2e8f9f7 939 return HAL_OK;
<> 144:ef7eb2e8f9f7 940 }
<> 144:ef7eb2e8f9f7 941
<> 144:ef7eb2e8f9f7 942 #if defined (STM32L063xx) || defined (STM32L062xx) || defined (STM32L061xx) || \
<> 144:ef7eb2e8f9f7 943 defined (STM32L053xx) || defined (STM32L052xx) || defined (STM32L051xx) ||\
<> 144:ef7eb2e8f9f7 944 defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 945 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 946 defined (STM32L031xx) || defined (STM32L041xx)
<> 144:ef7eb2e8f9f7 947 /**
<> 144:ef7eb2e8f9f7 948 * @brief Handle Tamper 1 Polling.
<> 144:ef7eb2e8f9f7 949 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 950 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 951 * @retval HAL status
<> 144:ef7eb2e8f9f7 952 */
<> 144:ef7eb2e8f9f7 953 HAL_StatusTypeDef HAL_RTCEx_PollForTamper1Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 954 {
<> 144:ef7eb2e8f9f7 955 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 956
<> 144:ef7eb2e8f9f7 957 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 958 while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP1F)== RESET)
<> 144:ef7eb2e8f9f7 959 {
<> 144:ef7eb2e8f9f7 960 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 961 {
<> 144:ef7eb2e8f9f7 962 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 963 {
<> 144:ef7eb2e8f9f7 964 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 965 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 966 }
<> 144:ef7eb2e8f9f7 967 }
<> 144:ef7eb2e8f9f7 968 }
<> 144:ef7eb2e8f9f7 969
<> 144:ef7eb2e8f9f7 970 /* Clear the Tamper Flag */
<> 144:ef7eb2e8f9f7 971 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP1F);
<> 144:ef7eb2e8f9f7 972
<> 144:ef7eb2e8f9f7 973 /* Change RTC state */
<> 144:ef7eb2e8f9f7 974 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 975
<> 144:ef7eb2e8f9f7 976 return HAL_OK;
<> 144:ef7eb2e8f9f7 977 }
<> 144:ef7eb2e8f9f7 978 #endif /* (STM32L063xx) || (STM32L062xx) || (STM32L061xx) ||
<> 144:ef7eb2e8f9f7 979 * (STM32L053xx) || (STM32L052xx) || (STM32L051xx) ||
<> 144:ef7eb2e8f9f7 980 * (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 981 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) ||
<> 144:ef7eb2e8f9f7 982 * (STM32L031xx) || (STM32L041xx)
<> 144:ef7eb2e8f9f7 983 */
<> 144:ef7eb2e8f9f7 984
<> 144:ef7eb2e8f9f7 985 /**
<> 144:ef7eb2e8f9f7 986 * @brief Handle Tamper 2 Polling.
<> 144:ef7eb2e8f9f7 987 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 988 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 989 * @retval HAL status
<> 144:ef7eb2e8f9f7 990 */
<> 144:ef7eb2e8f9f7 991 HAL_StatusTypeDef HAL_RTCEx_PollForTamper2Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 992 {
<> 144:ef7eb2e8f9f7 993 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 994
<> 144:ef7eb2e8f9f7 995 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 996 while(__HAL_RTC_TAMPER_GET_FLAG(hrtc, RTC_FLAG_TAMP2F) == RESET)
<> 144:ef7eb2e8f9f7 997 {
<> 144:ef7eb2e8f9f7 998 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 999 {
<> 144:ef7eb2e8f9f7 1000 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1001 {
<> 144:ef7eb2e8f9f7 1002 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1003 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1004 }
<> 144:ef7eb2e8f9f7 1005 }
<> 144:ef7eb2e8f9f7 1006 }
<> 144:ef7eb2e8f9f7 1007
<> 144:ef7eb2e8f9f7 1008 /* Clear the Tamper Flag */
<> 144:ef7eb2e8f9f7 1009 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP2F);
<> 144:ef7eb2e8f9f7 1010
<> 144:ef7eb2e8f9f7 1011 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1012 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1013
<> 144:ef7eb2e8f9f7 1014 return HAL_OK;
<> 144:ef7eb2e8f9f7 1015 }
<> 144:ef7eb2e8f9f7 1016
<> 144:ef7eb2e8f9f7 1017
<> 144:ef7eb2e8f9f7 1018 #if defined (STM32L083xx) || defined (STM32L082xx) || defined (STM32L081xx) || \
<> 144:ef7eb2e8f9f7 1019 defined (STM32L073xx) || defined (STM32L072xx) || defined (STM32L071xx) || \
<> 144:ef7eb2e8f9f7 1020 defined (STM32L031xx) || defined (STM32L041xx) || defined (STM32L011xx) || defined (STM32L021xx)
<> 144:ef7eb2e8f9f7 1021
<> 144:ef7eb2e8f9f7 1022 /**
<> 144:ef7eb2e8f9f7 1023 * @brief Handle Tamper 3 Polling.
<> 144:ef7eb2e8f9f7 1024 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1025 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 1026 * @retval HAL status
<> 144:ef7eb2e8f9f7 1027 */
<> 144:ef7eb2e8f9f7 1028 HAL_StatusTypeDef HAL_RTCEx_PollForTamper3Event(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1029 {
<> 144:ef7eb2e8f9f7 1030 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1031
<> 144:ef7eb2e8f9f7 1032 /* Get the status of the Interrupt */
<> 144:ef7eb2e8f9f7 1033 while(__HAL_RTC_TAMPER_GET_FLAG(hrtc,RTC_FLAG_TAMP3F) == RESET)
<> 144:ef7eb2e8f9f7 1034 {
<> 144:ef7eb2e8f9f7 1035 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1036 {
<> 144:ef7eb2e8f9f7 1037 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
<> 144:ef7eb2e8f9f7 1038 {
<> 144:ef7eb2e8f9f7 1039 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1040 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1041 }
<> 144:ef7eb2e8f9f7 1042 }
<> 144:ef7eb2e8f9f7 1043 }
<> 144:ef7eb2e8f9f7 1044
<> 144:ef7eb2e8f9f7 1045 /* Clear the Tamper Flag */
<> 144:ef7eb2e8f9f7 1046 __HAL_RTC_TAMPER_CLEAR_FLAG(hrtc,RTC_FLAG_TAMP3F);
<> 144:ef7eb2e8f9f7 1047
<> 144:ef7eb2e8f9f7 1048 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1049 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1050
<> 144:ef7eb2e8f9f7 1051 return HAL_OK;
<> 144:ef7eb2e8f9f7 1052 }
<> 144:ef7eb2e8f9f7 1053 #endif /* (STM32L083xx) || (STM32L082xx) || (STM32L081xx) ||
<> 144:ef7eb2e8f9f7 1054 * (STM32L073xx) || (STM32L072xx) || (STM32L071xx) || (STM32L031xx) || (STM32L041xx) || (STM32L011xx) || (STM32L021xx)
<> 144:ef7eb2e8f9f7 1055 */
<> 144:ef7eb2e8f9f7 1056
<> 144:ef7eb2e8f9f7 1057 /**
<> 144:ef7eb2e8f9f7 1058 * @}
<> 144:ef7eb2e8f9f7 1059 */
<> 144:ef7eb2e8f9f7 1060
<> 144:ef7eb2e8f9f7 1061 /** @addtogroup RTCEx_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 1062 * @brief RTC Wake-up functions
<> 144:ef7eb2e8f9f7 1063 *
<> 144:ef7eb2e8f9f7 1064 @verbatim
<> 144:ef7eb2e8f9f7 1065 ===============================================================================
<> 144:ef7eb2e8f9f7 1066 ##### RTC Wake-up functions #####
<> 144:ef7eb2e8f9f7 1067 ===============================================================================
<> 144:ef7eb2e8f9f7 1068
<> 144:ef7eb2e8f9f7 1069 [..] This section provides functions allowing to configure Wake-up feature
<> 144:ef7eb2e8f9f7 1070
<> 144:ef7eb2e8f9f7 1071 @endverbatim
<> 144:ef7eb2e8f9f7 1072 * @{
<> 144:ef7eb2e8f9f7 1073 */
<> 144:ef7eb2e8f9f7 1074
<> 144:ef7eb2e8f9f7 1075 /**
<> 144:ef7eb2e8f9f7 1076 * @brief Set wake up timer.
<> 144:ef7eb2e8f9f7 1077 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1078 * @param WakeUpCounter: Wake up counter
<> 144:ef7eb2e8f9f7 1079 * @param WakeUpClock: Wake up clock
<> 144:ef7eb2e8f9f7 1080 * @retval HAL status
<> 144:ef7eb2e8f9f7 1081 */
<> 144:ef7eb2e8f9f7 1082 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
<> 144:ef7eb2e8f9f7 1083 {
<> 144:ef7eb2e8f9f7 1084 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 1085
<> 144:ef7eb2e8f9f7 1086 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1087 assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
<> 144:ef7eb2e8f9f7 1088 assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
<> 144:ef7eb2e8f9f7 1089
<> 144:ef7eb2e8f9f7 1090 /* Process Locked */
<> 144:ef7eb2e8f9f7 1091 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1092
<> 144:ef7eb2e8f9f7 1093 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1094
<> 144:ef7eb2e8f9f7 1095 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1096 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1097
<> 144:ef7eb2e8f9f7 1098 /*Check RTC WUTWF flag is reset only when wake up timer enabled*/
<> 144:ef7eb2e8f9f7 1099 if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET){
<> 144:ef7eb2e8f9f7 1100 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1101
<> 144:ef7eb2e8f9f7 1102 /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1103 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET)
<> 144:ef7eb2e8f9f7 1104 {
<> 144:ef7eb2e8f9f7 1105 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1106 {
<> 144:ef7eb2e8f9f7 1107 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1108 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1109
<> 144:ef7eb2e8f9f7 1110 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1111
<> 144:ef7eb2e8f9f7 1112 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1113 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1114
<> 144:ef7eb2e8f9f7 1115 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1116 }
<> 144:ef7eb2e8f9f7 1117 }
<> 144:ef7eb2e8f9f7 1118 }
<> 144:ef7eb2e8f9f7 1119
<> 144:ef7eb2e8f9f7 1120 __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1121
<> 144:ef7eb2e8f9f7 1122 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1123
<> 144:ef7eb2e8f9f7 1124 /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1125 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
<> 144:ef7eb2e8f9f7 1126 {
<> 144:ef7eb2e8f9f7 1127 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1128 {
<> 144:ef7eb2e8f9f7 1129 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1130 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1131
<> 144:ef7eb2e8f9f7 1132 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1133
<> 144:ef7eb2e8f9f7 1134 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1135 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1136
<> 144:ef7eb2e8f9f7 1137 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1138 }
<> 144:ef7eb2e8f9f7 1139 }
<> 144:ef7eb2e8f9f7 1140
<> 144:ef7eb2e8f9f7 1141 /* Clear the Wakeup Timer clock source bits in CR register */
<> 144:ef7eb2e8f9f7 1142 hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
<> 144:ef7eb2e8f9f7 1143
<> 144:ef7eb2e8f9f7 1144 /* Configure the clock source */
<> 144:ef7eb2e8f9f7 1145 hrtc->Instance->CR |= (uint32_t)WakeUpClock;
<> 144:ef7eb2e8f9f7 1146
<> 144:ef7eb2e8f9f7 1147 /* Configure the Wakeup Timer counter */
<> 144:ef7eb2e8f9f7 1148 hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
<> 144:ef7eb2e8f9f7 1149
<> 144:ef7eb2e8f9f7 1150 /* Enable the Wakeup Timer */
<> 144:ef7eb2e8f9f7 1151 __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1152
<> 144:ef7eb2e8f9f7 1153 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1154 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1155
<> 144:ef7eb2e8f9f7 1156 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1157
<> 144:ef7eb2e8f9f7 1158 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1159 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1160
<> 144:ef7eb2e8f9f7 1161 return HAL_OK;
<> 144:ef7eb2e8f9f7 1162 }
<> 144:ef7eb2e8f9f7 1163
<> 144:ef7eb2e8f9f7 1164 /**
<> 144:ef7eb2e8f9f7 1165 * @brief Set wake up timer with interrupt.
<> 144:ef7eb2e8f9f7 1166 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1167 * @param WakeUpCounter: Wake up counter
<> 144:ef7eb2e8f9f7 1168 * @param WakeUpClock: Wake up clock
<> 144:ef7eb2e8f9f7 1169 * @retval HAL status
<> 144:ef7eb2e8f9f7 1170 */
<> 144:ef7eb2e8f9f7 1171 HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t WakeUpCounter, uint32_t WakeUpClock)
<> 144:ef7eb2e8f9f7 1172 {
<> 144:ef7eb2e8f9f7 1173 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 1174
<> 144:ef7eb2e8f9f7 1175 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1176 assert_param(IS_RTC_WAKEUP_CLOCK(WakeUpClock));
<> 144:ef7eb2e8f9f7 1177 assert_param(IS_RTC_WAKEUP_COUNTER(WakeUpCounter));
<> 144:ef7eb2e8f9f7 1178
<> 144:ef7eb2e8f9f7 1179 /* Process Locked */
<> 144:ef7eb2e8f9f7 1180 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1181
<> 144:ef7eb2e8f9f7 1182 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1183
<> 144:ef7eb2e8f9f7 1184 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1185 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1186
<> 144:ef7eb2e8f9f7 1187 /*Check RTC WUTWF flag is reset only when wake up timer enabled*/
<> 144:ef7eb2e8f9f7 1188 if((hrtc->Instance->CR & RTC_CR_WUTE) != RESET){
<> 144:ef7eb2e8f9f7 1189 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1190
<> 144:ef7eb2e8f9f7 1191 /* Wait till RTC WUTWF flag is reset and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1192 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == SET)
<> 144:ef7eb2e8f9f7 1193 {
<> 144:ef7eb2e8f9f7 1194 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1195 {
<> 144:ef7eb2e8f9f7 1196 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1197 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1198
<> 144:ef7eb2e8f9f7 1199 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1200
<> 144:ef7eb2e8f9f7 1201 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1202 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1203
<> 144:ef7eb2e8f9f7 1204 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1205 }
<> 144:ef7eb2e8f9f7 1206 }
<> 144:ef7eb2e8f9f7 1207 }
<> 144:ef7eb2e8f9f7 1208
<> 144:ef7eb2e8f9f7 1209 __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1210
<> 144:ef7eb2e8f9f7 1211 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1212
<> 144:ef7eb2e8f9f7 1213 /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1214 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
<> 144:ef7eb2e8f9f7 1215 {
<> 144:ef7eb2e8f9f7 1216 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1217 {
<> 144:ef7eb2e8f9f7 1218 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1219 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1220
<> 144:ef7eb2e8f9f7 1221 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1222
<> 144:ef7eb2e8f9f7 1223 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1224 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1225
<> 144:ef7eb2e8f9f7 1226 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1227 }
<> 144:ef7eb2e8f9f7 1228 }
<> 144:ef7eb2e8f9f7 1229
<> 144:ef7eb2e8f9f7 1230 /* Configure the Wakeup Timer counter */
<> 144:ef7eb2e8f9f7 1231 hrtc->Instance->WUTR = (uint32_t)WakeUpCounter;
<> 144:ef7eb2e8f9f7 1232
<> 144:ef7eb2e8f9f7 1233 /* Clear the Wakeup Timer clock source bits in CR register */
<> 144:ef7eb2e8f9f7 1234 hrtc->Instance->CR &= (uint32_t)~RTC_CR_WUCKSEL;
<> 144:ef7eb2e8f9f7 1235
<> 144:ef7eb2e8f9f7 1236 /* Configure the clock source */
<> 144:ef7eb2e8f9f7 1237 hrtc->Instance->CR |= (uint32_t)WakeUpClock;
<> 144:ef7eb2e8f9f7 1238
<> 144:ef7eb2e8f9f7 1239 /* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */
<> 144:ef7eb2e8f9f7 1240 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT();
<> 144:ef7eb2e8f9f7 1241
<> 144:ef7eb2e8f9f7 1242 __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();
<> 144:ef7eb2e8f9f7 1243
<> 144:ef7eb2e8f9f7 1244 /* Configure the Interrupt in the RTC_CR register */
<> 144:ef7eb2e8f9f7 1245 __HAL_RTC_WAKEUPTIMER_ENABLE_IT(hrtc,RTC_IT_WUT);
<> 144:ef7eb2e8f9f7 1246
<> 144:ef7eb2e8f9f7 1247 /* Enable the Wakeup Timer */
<> 144:ef7eb2e8f9f7 1248 __HAL_RTC_WAKEUPTIMER_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1249
<> 144:ef7eb2e8f9f7 1250 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1251 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1252
<> 144:ef7eb2e8f9f7 1253 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1254
<> 144:ef7eb2e8f9f7 1255 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1256 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1257
<> 144:ef7eb2e8f9f7 1258 return HAL_OK;
<> 144:ef7eb2e8f9f7 1259 }
<> 144:ef7eb2e8f9f7 1260
<> 144:ef7eb2e8f9f7 1261 /**
<> 144:ef7eb2e8f9f7 1262 * @brief Deactivate wake up timer counter.
<> 144:ef7eb2e8f9f7 1263 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1264 * @retval HAL status
<> 144:ef7eb2e8f9f7 1265 */
<> 144:ef7eb2e8f9f7 1266 uint32_t HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1267 {
<> 144:ef7eb2e8f9f7 1268 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 1269
<> 144:ef7eb2e8f9f7 1270 /* Process Locked */
<> 144:ef7eb2e8f9f7 1271 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1272
<> 144:ef7eb2e8f9f7 1273 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1274
<> 144:ef7eb2e8f9f7 1275 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1276 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1277
<> 144:ef7eb2e8f9f7 1278 /* Disable the Wakeup Timer */
<> 144:ef7eb2e8f9f7 1279 __HAL_RTC_WAKEUPTIMER_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1280
<> 144:ef7eb2e8f9f7 1281 /* In case of interrupt mode is used, the interrupt source must disabled */
<> 144:ef7eb2e8f9f7 1282 __HAL_RTC_WAKEUPTIMER_DISABLE_IT(hrtc,RTC_IT_WUT);
<> 144:ef7eb2e8f9f7 1283
<> 144:ef7eb2e8f9f7 1284 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1285 /* Wait till RTC WUTWF flag is set and if Time out is reached exit */
<> 144:ef7eb2e8f9f7 1286 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTWF) == RESET)
<> 144:ef7eb2e8f9f7 1287 {
<> 144:ef7eb2e8f9f7 1288 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1289 {
<> 144:ef7eb2e8f9f7 1290 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1291 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1292
<> 144:ef7eb2e8f9f7 1293 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1294
<> 144:ef7eb2e8f9f7 1295 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1296 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1297
<> 144:ef7eb2e8f9f7 1298 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1299 }
<> 144:ef7eb2e8f9f7 1300 }
<> 144:ef7eb2e8f9f7 1301
<> 144:ef7eb2e8f9f7 1302 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1303 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1304
<> 144:ef7eb2e8f9f7 1305 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1306
<> 144:ef7eb2e8f9f7 1307 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1308 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1309
<> 144:ef7eb2e8f9f7 1310 return HAL_OK;
<> 144:ef7eb2e8f9f7 1311 }
<> 144:ef7eb2e8f9f7 1312
<> 144:ef7eb2e8f9f7 1313 /**
<> 144:ef7eb2e8f9f7 1314 * @brief Get wake up timer counter.
<> 144:ef7eb2e8f9f7 1315 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1316 * @retval Counter value
<> 144:ef7eb2e8f9f7 1317 */
<> 144:ef7eb2e8f9f7 1318 uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1319 {
<> 144:ef7eb2e8f9f7 1320 /* Get the counter value */
<> 144:ef7eb2e8f9f7 1321 return ((uint32_t)(hrtc->Instance->WUTR & RTC_WUTR_WUT));
<> 144:ef7eb2e8f9f7 1322 }
<> 144:ef7eb2e8f9f7 1323
<> 144:ef7eb2e8f9f7 1324 /**
<> 144:ef7eb2e8f9f7 1325 * @brief Handle Wake Up Timer interrupt request.
<> 144:ef7eb2e8f9f7 1326 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1327 * @retval None
<> 144:ef7eb2e8f9f7 1328 */
<> 144:ef7eb2e8f9f7 1329 void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1330 {
<> 144:ef7eb2e8f9f7 1331 /* Get the pending status of the WAKEUPTIMER Interrupt */
<> 144:ef7eb2e8f9f7 1332 if(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) != RESET)
<> 144:ef7eb2e8f9f7 1333 {
<> 144:ef7eb2e8f9f7 1334 /* WAKEUPTIMER callback */
<> 144:ef7eb2e8f9f7 1335 HAL_RTCEx_WakeUpTimerEventCallback(hrtc);
<> 144:ef7eb2e8f9f7 1336
<> 144:ef7eb2e8f9f7 1337 /* Clear the WAKEUPTIMER interrupt pending bit */
<> 144:ef7eb2e8f9f7 1338 __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
<> 144:ef7eb2e8f9f7 1339 }
<> 144:ef7eb2e8f9f7 1340
<> 144:ef7eb2e8f9f7 1341
<> 144:ef7eb2e8f9f7 1342 /* Clear the EXTI's line Flag for RTC WakeUpTimer */
<> 144:ef7eb2e8f9f7 1343 __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG();
<> 144:ef7eb2e8f9f7 1344
<> 144:ef7eb2e8f9f7 1345 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1346 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1347 }
<> 144:ef7eb2e8f9f7 1348
<> 144:ef7eb2e8f9f7 1349 /**
<> 144:ef7eb2e8f9f7 1350 * @brief Wake Up Timer callback.
<> 144:ef7eb2e8f9f7 1351 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1352 * @retval None
<> 144:ef7eb2e8f9f7 1353 */
<> 144:ef7eb2e8f9f7 1354 __weak void HAL_RTCEx_WakeUpTimerEventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1355 {
<> 144:ef7eb2e8f9f7 1356 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1357 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 1358
<> 144:ef7eb2e8f9f7 1359 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1360 the HAL_RTCEx_WakeUpTimerEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1361 */
<> 144:ef7eb2e8f9f7 1362 }
<> 144:ef7eb2e8f9f7 1363
<> 144:ef7eb2e8f9f7 1364
<> 144:ef7eb2e8f9f7 1365 /**
<> 144:ef7eb2e8f9f7 1366 * @brief Handle Wake Up Timer Polling.
<> 144:ef7eb2e8f9f7 1367 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1368 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 1369 * @retval HAL status
<> 144:ef7eb2e8f9f7 1370 */
<> 144:ef7eb2e8f9f7 1371 HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1372 {
<> 144:ef7eb2e8f9f7 1373 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1374
<> 144:ef7eb2e8f9f7 1375 while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(hrtc, RTC_FLAG_WUTF) == RESET)
<> 144:ef7eb2e8f9f7 1376 {
<> 144:ef7eb2e8f9f7 1377 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1378 {
<> 144:ef7eb2e8f9f7 1379 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1380 {
<> 144:ef7eb2e8f9f7 1381 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1382
<> 144:ef7eb2e8f9f7 1383 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1384 }
<> 144:ef7eb2e8f9f7 1385 }
<> 144:ef7eb2e8f9f7 1386 }
<> 144:ef7eb2e8f9f7 1387
<> 144:ef7eb2e8f9f7 1388 /* Clear the WAKEUPTIMER Flag */
<> 144:ef7eb2e8f9f7 1389 __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(hrtc, RTC_FLAG_WUTF);
<> 144:ef7eb2e8f9f7 1390
<> 144:ef7eb2e8f9f7 1391 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1392 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1393
<> 144:ef7eb2e8f9f7 1394 return HAL_OK;
<> 144:ef7eb2e8f9f7 1395 }
<> 144:ef7eb2e8f9f7 1396
<> 144:ef7eb2e8f9f7 1397 /**
<> 144:ef7eb2e8f9f7 1398 * @}
<> 144:ef7eb2e8f9f7 1399 */
<> 144:ef7eb2e8f9f7 1400
<> 144:ef7eb2e8f9f7 1401
<> 144:ef7eb2e8f9f7 1402 /** @addtogroup RTCEx_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 1403 * @brief Extended Peripheral Control functions
<> 144:ef7eb2e8f9f7 1404 *
<> 144:ef7eb2e8f9f7 1405 @verbatim
<> 144:ef7eb2e8f9f7 1406 ===============================================================================
<> 144:ef7eb2e8f9f7 1407 ##### Extended Peripheral Control functions #####
<> 144:ef7eb2e8f9f7 1408 ===============================================================================
<> 144:ef7eb2e8f9f7 1409 [..]
<> 144:ef7eb2e8f9f7 1410 This subsection provides functions allowing to
<> 144:ef7eb2e8f9f7 1411 (+) Write a data in a specified RTC Backup data register
<> 144:ef7eb2e8f9f7 1412 (+) Read a data in a specified RTC Backup data register
<> 144:ef7eb2e8f9f7 1413 (+) Set the Coarse calibration parameters.
<> 144:ef7eb2e8f9f7 1414 (+) Deactivate the Coarse calibration parameters
<> 144:ef7eb2e8f9f7 1415 (+) Set the Smooth calibration parameters.
<> 144:ef7eb2e8f9f7 1416 (+) Configure the Synchronization Shift Control Settings.
<> 144:ef7eb2e8f9f7 1417 (+) Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
<> 144:ef7eb2e8f9f7 1418 (+) Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
<> 144:ef7eb2e8f9f7 1419 (+) Enable the RTC reference clock detection.
<> 144:ef7eb2e8f9f7 1420 (+) Disable the RTC reference clock detection.
<> 144:ef7eb2e8f9f7 1421 (+) Enable the Bypass Shadow feature.
<> 144:ef7eb2e8f9f7 1422 (+) Disable the Bypass Shadow feature.
<> 144:ef7eb2e8f9f7 1423
<> 144:ef7eb2e8f9f7 1424 @endverbatim
<> 144:ef7eb2e8f9f7 1425 * @{
<> 144:ef7eb2e8f9f7 1426 */
<> 144:ef7eb2e8f9f7 1427
<> 144:ef7eb2e8f9f7 1428 /**
<> 144:ef7eb2e8f9f7 1429 * @brief Write a data in a specified RTC Backup data register.
<> 144:ef7eb2e8f9f7 1430 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1431 * @param BackupRegister: RTC Backup data Register number.
<> 144:ef7eb2e8f9f7 1432 * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
<> 144:ef7eb2e8f9f7 1433 * specify the register.
<> 144:ef7eb2e8f9f7 1434 * @param Data: Data to be written in the specified RTC Backup data register.
<> 144:ef7eb2e8f9f7 1435 * @retval None
<> 144:ef7eb2e8f9f7 1436 */
<> 144:ef7eb2e8f9f7 1437 void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data)
<> 144:ef7eb2e8f9f7 1438 {
<> 144:ef7eb2e8f9f7 1439 uint32_t tmp = 0;
<> 144:ef7eb2e8f9f7 1440
<> 144:ef7eb2e8f9f7 1441 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1442 assert_param(IS_RTC_BKP(BackupRegister));
<> 144:ef7eb2e8f9f7 1443
<> 144:ef7eb2e8f9f7 1444 tmp = (uint32_t)&(hrtc->Instance->BKP0R);
<> 144:ef7eb2e8f9f7 1445 tmp += (BackupRegister * 4);
<> 144:ef7eb2e8f9f7 1446
<> 144:ef7eb2e8f9f7 1447 /* Write the specified register */
<> 144:ef7eb2e8f9f7 1448 *(__IO uint32_t *)tmp = (uint32_t)Data;
<> 144:ef7eb2e8f9f7 1449 }
<> 144:ef7eb2e8f9f7 1450
<> 144:ef7eb2e8f9f7 1451 /**
<> 144:ef7eb2e8f9f7 1452 * @brief Reads data from the specified RTC Backup data Register.
<> 144:ef7eb2e8f9f7 1453 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1454 * @param BackupRegister: RTC Backup data Register number.
<> 144:ef7eb2e8f9f7 1455 * This parameter can be: RTC_BKP_DRx where x can be from 0 to 19 to
<> 144:ef7eb2e8f9f7 1456 * specify the register.
<> 144:ef7eb2e8f9f7 1457 * @retval Read value
<> 144:ef7eb2e8f9f7 1458 */
<> 144:ef7eb2e8f9f7 1459 uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister)
<> 144:ef7eb2e8f9f7 1460 {
<> 144:ef7eb2e8f9f7 1461 uint32_t tmp = 0;
<> 144:ef7eb2e8f9f7 1462
<> 144:ef7eb2e8f9f7 1463 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1464 assert_param(IS_RTC_BKP(BackupRegister));
<> 144:ef7eb2e8f9f7 1465
<> 144:ef7eb2e8f9f7 1466 tmp = (uint32_t)&(hrtc->Instance->BKP0R);
<> 144:ef7eb2e8f9f7 1467 tmp += (BackupRegister * 4);
<> 144:ef7eb2e8f9f7 1468
<> 144:ef7eb2e8f9f7 1469 /* Read the specified register */
<> 144:ef7eb2e8f9f7 1470 return (*(__IO uint32_t *)tmp);
<> 144:ef7eb2e8f9f7 1471 }
<> 144:ef7eb2e8f9f7 1472
<> 144:ef7eb2e8f9f7 1473 /**
<> 144:ef7eb2e8f9f7 1474 * @brief Set the Smooth calibration parameters.
<> 144:ef7eb2e8f9f7 1475 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1476 * @param SmoothCalibPeriod: Select the Smooth Calibration Period.
<> 144:ef7eb2e8f9f7 1477 * This parameter can be can be one of the following values :
<> 144:ef7eb2e8f9f7 1478 * @arg RTC_SMOOTHCALIB_PERIOD_32SEC: The smooth calibration period is 32s.
<> 144:ef7eb2e8f9f7 1479 * @arg RTC_SMOOTHCALIB_PERIOD_16SEC: The smooth calibration period is 16s.
<> 144:ef7eb2e8f9f7 1480 * @arg RTC_SMOOTHCALIB_PERIOD_8SEC: The smooth calibration period is 8s.
<> 144:ef7eb2e8f9f7 1481 * @param SmoothCalibPlusPulses: Select to Set or reset the CALP bit.
<> 144:ef7eb2e8f9f7 1482 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1483 * @arg RTC_SMOOTHCALIB_PLUSPULSES_SET: Add one RTCCLK pulse every 2*11 pulses.
<> 144:ef7eb2e8f9f7 1484 * @arg RTC_SMOOTHCALIB_PLUSPULSES_RESET: No RTCCLK pulses are added.
<> 144:ef7eb2e8f9f7 1485 * @param SmoothCalibMinusPulsesValue: Select the value of CALM[8:0] bits.
<> 144:ef7eb2e8f9f7 1486 * This parameter can be one any value from 0 to 0x000001FF.
<> 144:ef7eb2e8f9f7 1487 * @note To deactivate the smooth calibration, the field SmoothCalibPlusPulses
<> 144:ef7eb2e8f9f7 1488 * must be equal to SMOOTHCALIB_PLUSPULSES_RESET and the field
<> 144:ef7eb2e8f9f7 1489 * SmoothCalibMinusPulsesValue mut be equal to 0.
<> 144:ef7eb2e8f9f7 1490 * @retval HAL status
<> 144:ef7eb2e8f9f7 1491 */
<> 144:ef7eb2e8f9f7 1492 HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef* hrtc, uint32_t SmoothCalibPeriod, uint32_t SmoothCalibPlusPulses, uint32_t SmoothCalibMinusPulsesValue)
<> 144:ef7eb2e8f9f7 1493 {
<> 144:ef7eb2e8f9f7 1494 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 1495
<> 144:ef7eb2e8f9f7 1496 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1497 assert_param(IS_RTC_SMOOTH_CALIB_PERIOD(SmoothCalibPeriod));
<> 144:ef7eb2e8f9f7 1498 assert_param(IS_RTC_SMOOTH_CALIB_PLUS(SmoothCalibPlusPulses));
<> 144:ef7eb2e8f9f7 1499 assert_param(IS_RTC_SMOOTH_CALIB_MINUS(SmoothCalibMinusPulsesValue));
<> 144:ef7eb2e8f9f7 1500
<> 144:ef7eb2e8f9f7 1501 /* Process Locked */
<> 144:ef7eb2e8f9f7 1502 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1503
<> 144:ef7eb2e8f9f7 1504 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1505
<> 144:ef7eb2e8f9f7 1506 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1507 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1508
<> 144:ef7eb2e8f9f7 1509 /* check if a calibration is pending*/
<> 144:ef7eb2e8f9f7 1510 if((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET)
<> 144:ef7eb2e8f9f7 1511 {
<> 144:ef7eb2e8f9f7 1512 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1513
<> 144:ef7eb2e8f9f7 1514 /* check if a calibration is pending*/
<> 144:ef7eb2e8f9f7 1515 while((hrtc->Instance->ISR & RTC_ISR_RECALPF) != RESET)
<> 144:ef7eb2e8f9f7 1516 {
<> 144:ef7eb2e8f9f7 1517 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1518 {
<> 144:ef7eb2e8f9f7 1519 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1520 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1521
<> 144:ef7eb2e8f9f7 1522 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1523 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1524
<> 144:ef7eb2e8f9f7 1525 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1526 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1527
<> 144:ef7eb2e8f9f7 1528 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1529 }
<> 144:ef7eb2e8f9f7 1530 }
<> 144:ef7eb2e8f9f7 1531 }
<> 144:ef7eb2e8f9f7 1532
<> 144:ef7eb2e8f9f7 1533 /* Configure the Smooth calibration settings */
<> 144:ef7eb2e8f9f7 1534 hrtc->Instance->CALR = (uint32_t)((uint32_t)SmoothCalibPeriod | (uint32_t)SmoothCalibPlusPulses | (uint32_t)SmoothCalibMinusPulsesValue);
<> 144:ef7eb2e8f9f7 1535
<> 144:ef7eb2e8f9f7 1536 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1537 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1538
<> 144:ef7eb2e8f9f7 1539 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1540 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1541
<> 144:ef7eb2e8f9f7 1542 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1543 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1544
<> 144:ef7eb2e8f9f7 1545 return HAL_OK;
<> 144:ef7eb2e8f9f7 1546 }
<> 144:ef7eb2e8f9f7 1547
<> 144:ef7eb2e8f9f7 1548 /**
<> 144:ef7eb2e8f9f7 1549 * @brief Configure the Synchronization Shift Control Settings.
<> 144:ef7eb2e8f9f7 1550 * @note When REFCKON is set, firmware must not write to Shift control register.
<> 144:ef7eb2e8f9f7 1551 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1552 * @param ShiftAdd1S: Select to add or not 1 second to the time calendar.
<> 144:ef7eb2e8f9f7 1553 * This parameter can be one of the following values :
<> 144:ef7eb2e8f9f7 1554 * @arg RTC_SHIFTADD1S_SET: Add one second to the clock calendar.
<> 144:ef7eb2e8f9f7 1555 * @arg RTC_SHIFTADD1S_RESET: No effect.
<> 144:ef7eb2e8f9f7 1556 * @param ShiftSubFS: Select the number of Second Fractions to substitute.
<> 144:ef7eb2e8f9f7 1557 * This parameter can be one any value from 0 to 0x7FFF.
<> 144:ef7eb2e8f9f7 1558 * @retval HAL status
<> 144:ef7eb2e8f9f7 1559 */
<> 144:ef7eb2e8f9f7 1560 HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef* hrtc, uint32_t ShiftAdd1S, uint32_t ShiftSubFS)
<> 144:ef7eb2e8f9f7 1561 {
<> 144:ef7eb2e8f9f7 1562 uint32_t tickstart = 0;
<> 144:ef7eb2e8f9f7 1563
<> 144:ef7eb2e8f9f7 1564 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1565 assert_param(IS_RTC_SHIFT_ADD1S(ShiftAdd1S));
<> 144:ef7eb2e8f9f7 1566 assert_param(IS_RTC_SHIFT_SUBFS(ShiftSubFS));
<> 144:ef7eb2e8f9f7 1567
<> 144:ef7eb2e8f9f7 1568 /* Process Locked */
<> 144:ef7eb2e8f9f7 1569 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1570
<> 144:ef7eb2e8f9f7 1571 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1572
<> 144:ef7eb2e8f9f7 1573 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1574 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1575
<> 144:ef7eb2e8f9f7 1576 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1577
<> 144:ef7eb2e8f9f7 1578 /* Wait until the shift is completed*/
<> 144:ef7eb2e8f9f7 1579 while((hrtc->Instance->ISR & RTC_ISR_SHPF) != RESET)
<> 144:ef7eb2e8f9f7 1580 {
<> 144:ef7eb2e8f9f7 1581 if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<> 144:ef7eb2e8f9f7 1582 {
<> 144:ef7eb2e8f9f7 1583 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1584 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1585
<> 144:ef7eb2e8f9f7 1586 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1587
<> 144:ef7eb2e8f9f7 1588 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1589 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1590
<> 144:ef7eb2e8f9f7 1591 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1592 }
<> 144:ef7eb2e8f9f7 1593 }
<> 144:ef7eb2e8f9f7 1594
<> 144:ef7eb2e8f9f7 1595 /* Check if the reference clock detection is disabled */
<> 144:ef7eb2e8f9f7 1596 if((hrtc->Instance->CR & RTC_CR_REFCKON) == RESET)
<> 144:ef7eb2e8f9f7 1597 {
<> 144:ef7eb2e8f9f7 1598 /* Configure the Shift settings */
<> 144:ef7eb2e8f9f7 1599 hrtc->Instance->SHIFTR = (uint32_t)(uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S);
<> 144:ef7eb2e8f9f7 1600
<> 144:ef7eb2e8f9f7 1601 /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<> 144:ef7eb2e8f9f7 1602 if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<> 144:ef7eb2e8f9f7 1603 {
<> 144:ef7eb2e8f9f7 1604 if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 1605 {
<> 144:ef7eb2e8f9f7 1606 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1607 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1608
<> 144:ef7eb2e8f9f7 1609 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1610
<> 144:ef7eb2e8f9f7 1611 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1612 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1613
<> 144:ef7eb2e8f9f7 1614 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1615 }
<> 144:ef7eb2e8f9f7 1616 }
<> 144:ef7eb2e8f9f7 1617 }
<> 144:ef7eb2e8f9f7 1618 else
<> 144:ef7eb2e8f9f7 1619 {
<> 144:ef7eb2e8f9f7 1620 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1621 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1622
<> 144:ef7eb2e8f9f7 1623 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1624 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1625
<> 144:ef7eb2e8f9f7 1626 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1627 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1628
<> 144:ef7eb2e8f9f7 1629 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1630 }
<> 144:ef7eb2e8f9f7 1631
<> 144:ef7eb2e8f9f7 1632 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1633 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1634
<> 144:ef7eb2e8f9f7 1635 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1636 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1637
<> 144:ef7eb2e8f9f7 1638 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1639 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1640
<> 144:ef7eb2e8f9f7 1641 return HAL_OK;
<> 144:ef7eb2e8f9f7 1642 }
<> 144:ef7eb2e8f9f7 1643
<> 144:ef7eb2e8f9f7 1644 /**
<> 144:ef7eb2e8f9f7 1645 * @brief Configure the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
<> 144:ef7eb2e8f9f7 1646 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1647 * @param CalibOutput : Select the Calibration output Selection .
<> 144:ef7eb2e8f9f7 1648 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1649 * @arg RTC_CALIBOUTPUT_512HZ: A signal has a regular waveform at 512Hz.
<> 144:ef7eb2e8f9f7 1650 * @arg RTC_CALIBOUTPUT_1HZ: A signal has a regular waveform at 1Hz.
<> 144:ef7eb2e8f9f7 1651 * @retval HAL status
<> 144:ef7eb2e8f9f7 1652 */
<> 144:ef7eb2e8f9f7 1653 HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef* hrtc, uint32_t CalibOutput)
<> 144:ef7eb2e8f9f7 1654 {
<> 144:ef7eb2e8f9f7 1655 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1656 assert_param(IS_RTC_CALIB_OUTPUT(CalibOutput));
<> 144:ef7eb2e8f9f7 1657
<> 144:ef7eb2e8f9f7 1658 /* Process Locked */
<> 144:ef7eb2e8f9f7 1659 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1660
<> 144:ef7eb2e8f9f7 1661 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1662
<> 144:ef7eb2e8f9f7 1663 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1664 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1665
<> 144:ef7eb2e8f9f7 1666 /* Clear flags before config */
<> 144:ef7eb2e8f9f7 1667 hrtc->Instance->CR &= (uint32_t)~RTC_CR_COSEL;
<> 144:ef7eb2e8f9f7 1668
<> 144:ef7eb2e8f9f7 1669 /* Configure the RTC_CR register */
<> 144:ef7eb2e8f9f7 1670 hrtc->Instance->CR |= (uint32_t)CalibOutput;
<> 144:ef7eb2e8f9f7 1671
<> 144:ef7eb2e8f9f7 1672 __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1673
<> 144:ef7eb2e8f9f7 1674 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1675 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1676
<> 144:ef7eb2e8f9f7 1677 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1678 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1679
<> 144:ef7eb2e8f9f7 1680 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1681 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1682
<> 144:ef7eb2e8f9f7 1683 return HAL_OK;
<> 144:ef7eb2e8f9f7 1684 }
<> 144:ef7eb2e8f9f7 1685
<> 144:ef7eb2e8f9f7 1686 /**
<> 144:ef7eb2e8f9f7 1687 * @brief Deactivate the Calibration Pinout (RTC_CALIB) Selection (1Hz or 512Hz).
<> 144:ef7eb2e8f9f7 1688 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1689 * @retval HAL status
<> 144:ef7eb2e8f9f7 1690 */
<> 144:ef7eb2e8f9f7 1691 HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1692 {
<> 144:ef7eb2e8f9f7 1693 /* Process Locked */
<> 144:ef7eb2e8f9f7 1694 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1695
<> 144:ef7eb2e8f9f7 1696 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1697
<> 144:ef7eb2e8f9f7 1698 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1699 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1700
<> 144:ef7eb2e8f9f7 1701 __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1702
<> 144:ef7eb2e8f9f7 1703 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1704 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1705
<> 144:ef7eb2e8f9f7 1706 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1707 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1708
<> 144:ef7eb2e8f9f7 1709 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1710 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1711
<> 144:ef7eb2e8f9f7 1712 return HAL_OK;
<> 144:ef7eb2e8f9f7 1713 }
<> 144:ef7eb2e8f9f7 1714
<> 144:ef7eb2e8f9f7 1715 /**
<> 144:ef7eb2e8f9f7 1716 * @brief Enable the RTC reference clock detection.
<> 144:ef7eb2e8f9f7 1717 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1718 * @retval HAL status
<> 144:ef7eb2e8f9f7 1719 */
<> 144:ef7eb2e8f9f7 1720 HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1721 {
<> 144:ef7eb2e8f9f7 1722 /* Process Locked */
<> 144:ef7eb2e8f9f7 1723 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1724
<> 144:ef7eb2e8f9f7 1725 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1726
<> 144:ef7eb2e8f9f7 1727 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1728 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1729
<> 144:ef7eb2e8f9f7 1730 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 1731 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 1732 {
<> 144:ef7eb2e8f9f7 1733 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1734 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1735
<> 144:ef7eb2e8f9f7 1736 /* Set RTC state*/
<> 144:ef7eb2e8f9f7 1737 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1738
<> 144:ef7eb2e8f9f7 1739 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1740 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1741
<> 144:ef7eb2e8f9f7 1742 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1743 }
<> 144:ef7eb2e8f9f7 1744 else
<> 144:ef7eb2e8f9f7 1745 {
<> 144:ef7eb2e8f9f7 1746 __HAL_RTC_CLOCKREF_DETECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1747
<> 144:ef7eb2e8f9f7 1748 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 1749 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 1750 }
<> 144:ef7eb2e8f9f7 1751
<> 144:ef7eb2e8f9f7 1752 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1753 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1754
<> 144:ef7eb2e8f9f7 1755 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1756 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1757
<> 144:ef7eb2e8f9f7 1758 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1759 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1760
<> 144:ef7eb2e8f9f7 1761 return HAL_OK;
<> 144:ef7eb2e8f9f7 1762 }
<> 144:ef7eb2e8f9f7 1763
<> 144:ef7eb2e8f9f7 1764 /**
<> 144:ef7eb2e8f9f7 1765 * @brief Disable the RTC reference clock detection.
<> 144:ef7eb2e8f9f7 1766 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1767 * @retval HAL status
<> 144:ef7eb2e8f9f7 1768 */
<> 144:ef7eb2e8f9f7 1769 HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1770 {
<> 144:ef7eb2e8f9f7 1771 /* Process Locked */
<> 144:ef7eb2e8f9f7 1772 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1773
<> 144:ef7eb2e8f9f7 1774 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1775
<> 144:ef7eb2e8f9f7 1776 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1777 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1778
<> 144:ef7eb2e8f9f7 1779 /* Set Initialization mode */
<> 144:ef7eb2e8f9f7 1780 if(RTC_EnterInitMode(hrtc) != HAL_OK)
<> 144:ef7eb2e8f9f7 1781 {
<> 144:ef7eb2e8f9f7 1782 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1783 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1784
<> 144:ef7eb2e8f9f7 1785 /* Set RTC state*/
<> 144:ef7eb2e8f9f7 1786 hrtc->State = HAL_RTC_STATE_ERROR;
<> 144:ef7eb2e8f9f7 1787
<> 144:ef7eb2e8f9f7 1788 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1789 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1790
<> 144:ef7eb2e8f9f7 1791 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1792 }
<> 144:ef7eb2e8f9f7 1793 else
<> 144:ef7eb2e8f9f7 1794 {
<> 144:ef7eb2e8f9f7 1795 __HAL_RTC_CLOCKREF_DETECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1796
<> 144:ef7eb2e8f9f7 1797 /* Exit Initialization mode */
<> 144:ef7eb2e8f9f7 1798 hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<> 144:ef7eb2e8f9f7 1799 }
<> 144:ef7eb2e8f9f7 1800
<> 144:ef7eb2e8f9f7 1801 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1802 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1803
<> 144:ef7eb2e8f9f7 1804 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1805 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1806
<> 144:ef7eb2e8f9f7 1807 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1808 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1809
<> 144:ef7eb2e8f9f7 1810 return HAL_OK;
<> 144:ef7eb2e8f9f7 1811 }
<> 144:ef7eb2e8f9f7 1812
<> 144:ef7eb2e8f9f7 1813 /**
<> 144:ef7eb2e8f9f7 1814 * @brief Enable the Bypass Shadow feature.
<> 144:ef7eb2e8f9f7 1815 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1816 * @note When the Bypass Shadow is enabled the calendar value are taken
<> 144:ef7eb2e8f9f7 1817 * directly from the Calendar counter.
<> 144:ef7eb2e8f9f7 1818 * @retval HAL status
<> 144:ef7eb2e8f9f7 1819 */
<> 144:ef7eb2e8f9f7 1820 HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1821 {
<> 144:ef7eb2e8f9f7 1822 /* Process Locked */
<> 144:ef7eb2e8f9f7 1823 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1824
<> 144:ef7eb2e8f9f7 1825 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1826
<> 144:ef7eb2e8f9f7 1827 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1828 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1829
<> 144:ef7eb2e8f9f7 1830 /* Set the BYPSHAD bit */
<> 144:ef7eb2e8f9f7 1831 hrtc->Instance->CR |= (uint8_t)RTC_CR_BYPSHAD;
<> 144:ef7eb2e8f9f7 1832
<> 144:ef7eb2e8f9f7 1833 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1834 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1835
<> 144:ef7eb2e8f9f7 1836 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1837 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1838
<> 144:ef7eb2e8f9f7 1839 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1840 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1841
<> 144:ef7eb2e8f9f7 1842 return HAL_OK;
<> 144:ef7eb2e8f9f7 1843 }
<> 144:ef7eb2e8f9f7 1844
<> 144:ef7eb2e8f9f7 1845 /**
<> 144:ef7eb2e8f9f7 1846 * @brief Disable the Bypass Shadow feature.
<> 144:ef7eb2e8f9f7 1847 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1848 * @note When the Bypass Shadow is enabled the calendar value are taken
<> 144:ef7eb2e8f9f7 1849 * directly from the Calendar counter.
<> 144:ef7eb2e8f9f7 1850 * @retval HAL status
<> 144:ef7eb2e8f9f7 1851 */
<> 144:ef7eb2e8f9f7 1852 HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef* hrtc)
<> 144:ef7eb2e8f9f7 1853 {
<> 144:ef7eb2e8f9f7 1854 /* Process Locked */
<> 144:ef7eb2e8f9f7 1855 __HAL_LOCK(hrtc);
<> 144:ef7eb2e8f9f7 1856
<> 144:ef7eb2e8f9f7 1857 hrtc->State = HAL_RTC_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1858
<> 144:ef7eb2e8f9f7 1859 /* Disable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1860 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<> 144:ef7eb2e8f9f7 1861
<> 144:ef7eb2e8f9f7 1862 /* Reset the BYPSHAD bit */
<> 144:ef7eb2e8f9f7 1863 hrtc->Instance->CR &= ((uint8_t)~RTC_CR_BYPSHAD);
<> 144:ef7eb2e8f9f7 1864
<> 144:ef7eb2e8f9f7 1865 /* Enable the write protection for RTC registers */
<> 144:ef7eb2e8f9f7 1866 __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<> 144:ef7eb2e8f9f7 1867
<> 144:ef7eb2e8f9f7 1868 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1869 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1870
<> 144:ef7eb2e8f9f7 1871 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1872 __HAL_UNLOCK(hrtc);
<> 144:ef7eb2e8f9f7 1873
<> 144:ef7eb2e8f9f7 1874 return HAL_OK;
<> 144:ef7eb2e8f9f7 1875 }
<> 144:ef7eb2e8f9f7 1876
<> 144:ef7eb2e8f9f7 1877 /**
<> 144:ef7eb2e8f9f7 1878 * @}
<> 144:ef7eb2e8f9f7 1879 */
<> 144:ef7eb2e8f9f7 1880
<> 144:ef7eb2e8f9f7 1881 /** @addtogroup RTCEx_Exported_Functions_Group4
<> 144:ef7eb2e8f9f7 1882 * @brief Extended features functions
<> 144:ef7eb2e8f9f7 1883 *
<> 144:ef7eb2e8f9f7 1884 @verbatim
<> 144:ef7eb2e8f9f7 1885 ===============================================================================
<> 144:ef7eb2e8f9f7 1886 ##### Extended features functions #####
<> 144:ef7eb2e8f9f7 1887 ===============================================================================
<> 144:ef7eb2e8f9f7 1888 [..] This section provides functions allowing to:
<> 144:ef7eb2e8f9f7 1889 (+) RTC Alram B callback
<> 144:ef7eb2e8f9f7 1890 (+) RTC Poll for Alarm B request
<> 144:ef7eb2e8f9f7 1891
<> 144:ef7eb2e8f9f7 1892 @endverbatim
<> 144:ef7eb2e8f9f7 1893 * @{
<> 144:ef7eb2e8f9f7 1894 */
<> 144:ef7eb2e8f9f7 1895
<> 144:ef7eb2e8f9f7 1896 /**
<> 144:ef7eb2e8f9f7 1897 * @brief Alarm B callback.
<> 144:ef7eb2e8f9f7 1898 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1899 * @retval None
<> 144:ef7eb2e8f9f7 1900 */
<> 144:ef7eb2e8f9f7 1901 __weak void HAL_RTCEx_AlarmBEventCallback(RTC_HandleTypeDef *hrtc)
<> 144:ef7eb2e8f9f7 1902 {
<> 144:ef7eb2e8f9f7 1903 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1904 UNUSED(hrtc);
<> 144:ef7eb2e8f9f7 1905
<> 144:ef7eb2e8f9f7 1906 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1907 the HAL_RTCEx_AlarmBEventCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1908 */
<> 144:ef7eb2e8f9f7 1909 }
<> 144:ef7eb2e8f9f7 1910
<> 144:ef7eb2e8f9f7 1911 /**
<> 144:ef7eb2e8f9f7 1912 * @brief Handle Alarm B Polling request.
<> 144:ef7eb2e8f9f7 1913 * @param hrtc: RTC handle
<> 144:ef7eb2e8f9f7 1914 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 1915 * @retval HAL status
<> 144:ef7eb2e8f9f7 1916 */
<> 144:ef7eb2e8f9f7 1917 HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1918 {
<> 144:ef7eb2e8f9f7 1919 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1920
<> 144:ef7eb2e8f9f7 1921 while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBF) == RESET)
<> 144:ef7eb2e8f9f7 1922 {
<> 144:ef7eb2e8f9f7 1923 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1924 {
<> 144:ef7eb2e8f9f7 1925 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1926 {
<> 144:ef7eb2e8f9f7 1927 hrtc->State = HAL_RTC_STATE_TIMEOUT;
<> 144:ef7eb2e8f9f7 1928 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1929 }
<> 144:ef7eb2e8f9f7 1930 }
<> 144:ef7eb2e8f9f7 1931 }
<> 144:ef7eb2e8f9f7 1932
<> 144:ef7eb2e8f9f7 1933 /* Clear the Alarm Flag */
<> 144:ef7eb2e8f9f7 1934 __HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
<> 144:ef7eb2e8f9f7 1935
<> 144:ef7eb2e8f9f7 1936 /* Change RTC state */
<> 144:ef7eb2e8f9f7 1937 hrtc->State = HAL_RTC_STATE_READY;
<> 144:ef7eb2e8f9f7 1938
<> 144:ef7eb2e8f9f7 1939 return HAL_OK;
<> 144:ef7eb2e8f9f7 1940 }
<> 144:ef7eb2e8f9f7 1941
<> 144:ef7eb2e8f9f7 1942 /**
<> 144:ef7eb2e8f9f7 1943 * @}
<> 144:ef7eb2e8f9f7 1944 */
<> 144:ef7eb2e8f9f7 1945
<> 144:ef7eb2e8f9f7 1946 /**
<> 144:ef7eb2e8f9f7 1947 * @}
<> 144:ef7eb2e8f9f7 1948 */
<> 144:ef7eb2e8f9f7 1949
<> 144:ef7eb2e8f9f7 1950 #endif /* HAL_RTC_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 1951 /**
<> 144:ef7eb2e8f9f7 1952 * @}
<> 144:ef7eb2e8f9f7 1953 */
<> 144:ef7eb2e8f9f7 1954
<> 144:ef7eb2e8f9f7 1955
<> 144:ef7eb2e8f9f7 1956 /**
<> 144:ef7eb2e8f9f7 1957 * @}
<> 144:ef7eb2e8f9f7 1958 */
<> 144:ef7eb2e8f9f7 1959
<> 144:ef7eb2e8f9f7 1960 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 1961