João Victor / stm32f4-discovery-CAN-Activation

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Fork of mbed-dev by mbed official

targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_i2c.c@170:da0da54939c7, 2017-07-30 (annotated)

Committer:
malvitor
Date:
Sun Jul 30 20:08:40 2017 +0000
Revision:
170:da0da54939c7
Parent:
167:e84263d55307 
library alterada para funcionar can na stm32f4-discovery

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file stm32l1xx_hal_i2c.c
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @version V1.2.0
<> 149:156823d33999 6 * @date 01-July-2016
<> 149:156823d33999 7 * @brief I2C HAL module driver.
<> 149:156823d33999 8 * This file provides firmware functions to manage the following
<> 149:156823d33999 9 * functionalities of the Inter Integrated Circuit (I2C) peripheral:
<> 149:156823d33999 10 * + Initialization and de-initialization functions
<> 149:156823d33999 11 * + IO operation functions
<> 149:156823d33999 12 * + Peripheral State, Mode and Error functions
<> 149:156823d33999 13 *
<> 149:156823d33999 14 @verbatim
<> 149:156823d33999 15 ==============================================================================
<> 149:156823d33999 16 ##### How to use this driver #####
<> 149:156823d33999 17 ==============================================================================
<> 149:156823d33999 18 [..]
<> 149:156823d33999 19 The I2C HAL driver can be used as follows:
<> 149:156823d33999 20
<> 149:156823d33999 21 (#) Declare a I2C_HandleTypeDef handle structure, for example:
<> 149:156823d33999 22 I2C_HandleTypeDef hi2c;
<> 149:156823d33999 23
<> 149:156823d33999 24 (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
<> 149:156823d33999 25 (##) Enable the I2Cx interface clock
<> 149:156823d33999 26 (##) I2C pins configuration
<> 149:156823d33999 27 (+++) Enable the clock for the I2C GPIOs
<> 149:156823d33999 28 (+++) Configure I2C pins as alternate function open-drain
<> 149:156823d33999 29 (##) NVIC configuration if you need to use interrupt process
<> 149:156823d33999 30 (+++) Configure the I2Cx interrupt priority
<> 149:156823d33999 31 (+++) Enable the NVIC I2C IRQ Channel
<> 149:156823d33999 32 (##) DMA Configuration if you need to use DMA process
<> 149:156823d33999 33 (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel
<> 149:156823d33999 34 (+++) Enable the DMAx interface clock using
<> 149:156823d33999 35 (+++) Configure the DMA handle parameters
<> 149:156823d33999 36 (+++) Configure the DMA Tx or Rx channel
<> 149:156823d33999 37 (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
<> 149:156823d33999 38 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
<> 149:156823d33999 39 the DMA Tx or Rx channel
<> 149:156823d33999 40
<> 149:156823d33999 41 (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
<> 149:156823d33999 42 Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
<> 149:156823d33999 43
<> 149:156823d33999 44 (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
<> 149:156823d33999 45 (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
<> 149:156823d33999 46
<> 149:156823d33999 47 (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
<> 149:156823d33999 48
<> 149:156823d33999 49 (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
<> 149:156823d33999 50
<> 149:156823d33999 51 *** Polling mode IO operation ***
<> 149:156823d33999 52 =================================
<> 149:156823d33999 53 [..]
<> 149:156823d33999 54 (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
<> 149:156823d33999 55 (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
<> 149:156823d33999 56 (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
<> 149:156823d33999 57 (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
<> 149:156823d33999 58
<> 149:156823d33999 59 *** Polling mode IO MEM operation ***
<> 149:156823d33999 60 =====================================
<> 149:156823d33999 61 [..]
<> 149:156823d33999 62 (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
<> 149:156823d33999 63 (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
<> 149:156823d33999 64
<> 149:156823d33999 65
<> 149:156823d33999 66 *** Interrupt mode IO operation ***
<> 149:156823d33999 67 ===================================
<> 149:156823d33999 68 [..]
<> 149:156823d33999 69 (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT()
<> 149:156823d33999 70 (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
<> 149:156823d33999 71 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
<> 149:156823d33999 72 (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT()
<> 149:156823d33999 73 (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
<> 149:156823d33999 74 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
<> 149:156823d33999 75 (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT()
<> 149:156823d33999 76 (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
<> 149:156823d33999 77 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
<> 149:156823d33999 78 (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT()
<> 149:156823d33999 79 (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
<> 149:156823d33999 80 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
<> 149:156823d33999 81 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
<> 149:156823d33999 82 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
<> 149:156823d33999 83 (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
<> 149:156823d33999 84 (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
<> 149:156823d33999 85 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
<> 149:156823d33999 86 (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
<> 149:156823d33999 87 This action will inform Master to generate a Stop condition to discard the communication.
<> 149:156823d33999 88
<> 149:156823d33999 89
<> 149:156823d33999 90 *** Interrupt mode IO sequential operation ***
<> 149:156823d33999 91 ==============================================
<> 149:156823d33999 92 [..]
<> 149:156823d33999 93 (@) These interfaces allow to manage a sequential transfer with a repeated start condition
<> 149:156823d33999 94 when a direction change during transfer
<> 149:156823d33999 95 [..]
<> 149:156823d33999 96 (+) A specific option field manage the different steps of a sequential transfer
<> 149:156823d33999 97 (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
<> 149:156823d33999 98 (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
<> 149:156823d33999 99 (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
<> 149:156823d33999 100 and data to transfer without a final stop condition
<> 149:156823d33999 101 (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
<> 149:156823d33999 102 and with new data to transfer if the direction change or manage only the new data to transfer
<> 149:156823d33999 103 if no direction change and without a final stop condition in both cases
<> 149:156823d33999 104 (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
<> 149:156823d33999 105 and with new data to transfer if the direction change or manage only the new data to transfer
<> 149:156823d33999 106 if no direction change and with a final stop condition in both cases
<> 149:156823d33999 107
<> 149:156823d33999 108 (+) Differents sequential I2C interfaces are listed below:
<> 149:156823d33999 109 (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
<> 149:156823d33999 110 (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
<> 149:156823d33999 111 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
<> 149:156823d33999 112 (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
<> 149:156823d33999 113 (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
<> 149:156823d33999 114 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
<> 149:156823d33999 115 (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
<> 149:156823d33999 116 (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
<> 149:156823d33999 117 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
<> 149:156823d33999 118 (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
<> 149:156823d33999 119 (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
<> 149:156823d33999 120 add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
<> 149:156823d33999 121 (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
<> 149:156823d33999 122 add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
<> 149:156823d33999 123 (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
<> 149:156823d33999 124 (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
<> 149:156823d33999 125 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
<> 149:156823d33999 126 (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
<> 149:156823d33999 127 (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
<> 149:156823d33999 128 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
<> 149:156823d33999 129 (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
<> 149:156823d33999 130 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
<> 149:156823d33999 131 (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
<> 149:156823d33999 132 (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
<> 149:156823d33999 133 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
<> 149:156823d33999 134 (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
<> 149:156823d33999 135 This action will inform Master to generate a Stop condition to discard the communication.
<> 149:156823d33999 136
<> 149:156823d33999 137 *** Interrupt mode IO MEM operation ***
<> 149:156823d33999 138 =======================================
<> 149:156823d33999 139 [..]
<> 149:156823d33999 140 (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
<> 149:156823d33999 141 HAL_I2C_Mem_Write_IT()
<> 149:156823d33999 142 (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
<> 149:156823d33999 143 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
<> 149:156823d33999 144 (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
<> 149:156823d33999 145 HAL_I2C_Mem_Read_IT()
<> 149:156823d33999 146 (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
<> 149:156823d33999 147 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
<> 149:156823d33999 148 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
<> 149:156823d33999 149 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
<> 149:156823d33999 150
<> 149:156823d33999 151 *** DMA mode IO operation ***
<> 149:156823d33999 152 ==============================
<> 149:156823d33999 153 [..]
<> 149:156823d33999 154 (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using
<> 149:156823d33999 155 HAL_I2C_Master_Transmit_DMA()
<> 149:156823d33999 156 (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
<> 149:156823d33999 157 add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
<> 149:156823d33999 158 (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
<> 149:156823d33999 159 HAL_I2C_Master_Receive_DMA()
<> 149:156823d33999 160 (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
<> 149:156823d33999 161 add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
<> 149:156823d33999 162 (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using
<> 149:156823d33999 163 HAL_I2C_Slave_Transmit_DMA()
<> 149:156823d33999 164 (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
<> 149:156823d33999 165 add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
<> 149:156823d33999 166 (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using
<> 149:156823d33999 167 HAL_I2C_Slave_Receive_DMA()
<> 149:156823d33999 168 (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
<> 149:156823d33999 169 add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
<> 149:156823d33999 170 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
<> 149:156823d33999 171 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
<> 149:156823d33999 172 (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
<> 149:156823d33999 173 (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
<> 149:156823d33999 174 add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
<> 149:156823d33999 175 (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro.
<> 149:156823d33999 176 This action will inform Master to generate a Stop condition to discard the communication.
<> 149:156823d33999 177
<> 149:156823d33999 178 *** DMA mode IO MEM operation ***
<> 149:156823d33999 179 =================================
<> 149:156823d33999 180 [..]
<> 149:156823d33999 181 (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using
<> 149:156823d33999 182 HAL_I2C_Mem_Write_DMA()
<> 149:156823d33999 183 (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and user can
<> 149:156823d33999 184 add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback()
<> 149:156823d33999 185 (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using
<> 149:156823d33999 186 HAL_I2C_Mem_Read_DMA()
<> 149:156823d33999 187 (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and user can
<> 149:156823d33999 188 add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback()
<> 149:156823d33999 189 (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
<> 149:156823d33999 190 add his own code by customization of function pointer HAL_I2C_ErrorCallback()
<> 149:156823d33999 191
<> 149:156823d33999 192
<> 149:156823d33999 193 *** I2C HAL driver macros list ***
<> 149:156823d33999 194 ==================================
<> 149:156823d33999 195 [..]
<> 149:156823d33999 196 Below the list of most used macros in I2C HAL driver.
<> 149:156823d33999 197
<> 149:156823d33999 198 (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
<> 149:156823d33999 199 (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
<> 149:156823d33999 200 (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode
<> 149:156823d33999 201 (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not
<> 149:156823d33999 202 (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
<> 149:156823d33999 203 (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
<> 149:156823d33999 204 (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
<> 149:156823d33999 205
<> 149:156823d33999 206 [..]
<> 149:156823d33999 207 (@) You can refer to the I2C HAL driver header file for more useful macros
<> 149:156823d33999 208
<> 149:156823d33999 209
<> 149:156823d33999 210 @endverbatim
<> 149:156823d33999 211 ******************************************************************************
<> 149:156823d33999 212 * @attention
<> 149:156823d33999 213 *
<> 149:156823d33999 214 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 149:156823d33999 215 *
<> 149:156823d33999 216 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 217 * are permitted provided that the following conditions are met:
<> 149:156823d33999 218 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 219 * this list of conditions and the following disclaimer.
<> 149:156823d33999 220 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 221 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 222 * and/or other materials provided with the distribution.
<> 149:156823d33999 223 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 224 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 225 * without specific prior written permission.
<> 149:156823d33999 226 *
<> 149:156823d33999 227 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 228 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 229 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 230 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 231 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 232 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 233 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 234 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 235 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 236 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 237 *
<> 149:156823d33999 238 ******************************************************************************
<> 149:156823d33999 239 */
<> 149:156823d33999 240
<> 149:156823d33999 241 /* Includes ------------------------------------------------------------------*/
<> 149:156823d33999 242 #include "stm32l1xx_hal.h"
<> 149:156823d33999 243
<> 149:156823d33999 244 /** @addtogroup STM32L1xx_HAL_Driver
<> 149:156823d33999 245 * @{
<> 149:156823d33999 246 */
<> 149:156823d33999 247
<> 149:156823d33999 248 /** @defgroup I2C I2C
<> 149:156823d33999 249 * @brief I2C HAL module driver
<> 149:156823d33999 250 * @{
<> 149:156823d33999 251 */
<> 149:156823d33999 252
<> 149:156823d33999 253 #ifdef HAL_I2C_MODULE_ENABLED
<> 149:156823d33999 254
<> 149:156823d33999 255 /* Private typedef -----------------------------------------------------------*/
<> 149:156823d33999 256 /* Private define ------------------------------------------------------------*/
<> 149:156823d33999 257 /** @defgroup I2C_Private_Define I2C Private Define
<> 149:156823d33999 258 * @{
<> 149:156823d33999 259 */
<> 149:156823d33999 260 #define I2C_TIMEOUT_FLAG ((uint32_t)35U) /*!< Timeout 35 ms */
<> 149:156823d33999 261 #define I2C_TIMEOUT_ADDR_SLAVE ((uint32_t)10000U) /*!< Timeout 10 s */
<> 149:156823d33999 262 #define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)25U) /*!< Timeout 25 ms */
<> 149:156823d33999 263 #define I2C_NO_OPTION_FRAME ((uint32_t)0xFFFF0000U) /*!< XferOptions default value */
<> 149:156823d33999 264
<> 149:156823d33999 265 #define I2C_MIN_PCLK_FREQ ((uint32_t)2000000U) /*!< 2 MHz */
<> 149:156823d33999 266
<> 149:156823d33999 267 /* Private define for @ref PreviousState usage */
<> 149:156823d33999 268 #define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /*!< Mask State define, keep only RX and TX bits */
<> 149:156823d33999 269 #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
<> 149:156823d33999 270 #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
<> 149:156823d33999 271 #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
<> 149:156823d33999 272 #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
<> 149:156823d33999 273 #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
<> 149:156823d33999 274
<> 149:156823d33999 275 /**
<> 149:156823d33999 276 * @}
<> 149:156823d33999 277 */
<> 149:156823d33999 278
<> 149:156823d33999 279 /* Private macro -------------------------------------------------------------*/
<> 149:156823d33999 280 /* Private variables ---------------------------------------------------------*/
<> 149:156823d33999 281 /* Private function prototypes -----------------------------------------------*/
<> 149:156823d33999 282 /** @defgroup I2C_Private_Functions I2C Private Functions
<> 149:156823d33999 283 * @{
<> 149:156823d33999 284 */
<> 149:156823d33999 285 /* Private functions to handle DMA transfer */
<> 149:156823d33999 286 static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
<> 149:156823d33999 287 static void I2C_DMAError(DMA_HandleTypeDef *hdma);
<> 149:156823d33999 288 static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
<> 149:156823d33999 289
<> 149:156823d33999 290 static void I2C_ITError(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 291
<> 149:156823d33999 292 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
<> 149:156823d33999 293 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
<> 149:156823d33999 294 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
<> 149:156823d33999 295 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
<> 149:156823d33999 296 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
<> 149:156823d33999 297 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
<> 149:156823d33999 298 static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
<> 149:156823d33999 299 static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
<> 149:156823d33999 300 static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
<> 149:156823d33999 301 static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
<> 149:156823d33999 302 static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 303
<> 149:156823d33999 304 /* Private functions for I2C transfer IRQ handler */
<> 149:156823d33999 305 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 306 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 307 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 308 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 309 static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 310 static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 311 static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 312
<> 149:156823d33999 313 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 314 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 315 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 316 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 317 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 318 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 319 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
<> 149:156823d33999 320 /**
<> 149:156823d33999 321 * @}
<> 149:156823d33999 322 */
<> 149:156823d33999 323
<> 149:156823d33999 324 /* Exported functions --------------------------------------------------------*/
<> 149:156823d33999 325 /** @defgroup I2C_Exported_Functions I2C Exported Functions
<> 149:156823d33999 326 * @{
<> 149:156823d33999 327 */
<> 149:156823d33999 328
<> 149:156823d33999 329 /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
<> 149:156823d33999 330 * @brief Initialization and Configuration functions
<> 149:156823d33999 331 *
<> 149:156823d33999 332 @verbatim
<> 149:156823d33999 333 ===============================================================================
<> 149:156823d33999 334 ##### Initialization and de-initialization functions #####
<> 149:156823d33999 335 ===============================================================================
<> 149:156823d33999 336 [..] This subsection provides a set of functions allowing to initialize and
<> 149:156823d33999 337 deinitialize the I2Cx peripheral:
<> 149:156823d33999 338
<> 149:156823d33999 339 (+) User must Implement HAL_I2C_MspInit() function in which he configures
<> 149:156823d33999 340 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
<> 149:156823d33999 341
<> 149:156823d33999 342 (+) Call the function HAL_I2C_Init() to configure the selected device with
<> 149:156823d33999 343 the selected configuration:
<> 149:156823d33999 344 (++) Communication Speed
<> 149:156823d33999 345 (++) Duty cycle
<> 149:156823d33999 346 (++) Addressing mode
<> 149:156823d33999 347 (++) Own Address 1
<> 149:156823d33999 348 (++) Dual Addressing mode
<> 149:156823d33999 349 (++) Own Address 2
<> 149:156823d33999 350 (++) General call mode
<> 149:156823d33999 351 (++) Nostretch mode
<> 149:156823d33999 352
<> 149:156823d33999 353 (+) Call the function HAL_I2C_DeInit() to restore the default configuration
<> 149:156823d33999 354 of the selected I2Cx peripheral.
<> 149:156823d33999 355
<> 149:156823d33999 356 @endverbatim
<> 149:156823d33999 357 * @{
<> 149:156823d33999 358 */
<> 149:156823d33999 359
<> 149:156823d33999 360 /**
<> 149:156823d33999 361 * @brief Initializes the I2C according to the specified parameters
<> 149:156823d33999 362 * in the I2C_InitTypeDef and initialize the associated handle.
<> 149:156823d33999 363 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 364 * the configuration information for the specified I2C.
<> 149:156823d33999 365 * @retval HAL status
<> 149:156823d33999 366 */
<> 149:156823d33999 367 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 368 {
<> 149:156823d33999 369 uint32_t freqrange = 0U;
<> 149:156823d33999 370 uint32_t pclk1 = 0U;
<> 149:156823d33999 371
<> 149:156823d33999 372 /* Check the I2C handle allocation */
<> 149:156823d33999 373 if(hi2c == NULL)
<> 149:156823d33999 374 {
<> 149:156823d33999 375 return HAL_ERROR;
<> 149:156823d33999 376 }
<> 149:156823d33999 377
<> 149:156823d33999 378 /* Check the parameters */
<> 149:156823d33999 379 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
<> 149:156823d33999 380 assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
<> 149:156823d33999 381 assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
<> 149:156823d33999 382 assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
<> 149:156823d33999 383 assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
<> 149:156823d33999 384 assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
<> 149:156823d33999 385 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
<> 149:156823d33999 386 assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
<> 149:156823d33999 387 assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
<> 149:156823d33999 388
<> 149:156823d33999 389 if(hi2c->State == HAL_I2C_STATE_RESET)
<> 149:156823d33999 390 {
<> 149:156823d33999 391 /* Allocate lock resource and initialize it */
<> 149:156823d33999 392 hi2c->Lock = HAL_UNLOCKED;
<> 149:156823d33999 393
<> 149:156823d33999 394 /* Init the low level hardware : GPIO, CLOCK, NVIC */
<> 149:156823d33999 395 HAL_I2C_MspInit(hi2c);
<> 149:156823d33999 396 }
<> 149:156823d33999 397
<> 149:156823d33999 398 /* Get PCLK1 frequency */
<> 149:156823d33999 399 pclk1 = HAL_RCC_GetPCLK1Freq();
<> 149:156823d33999 400
<> 149:156823d33999 401 /* The minimum allowed frequency is 2 MHz */
<> 149:156823d33999 402 if(pclk1 < I2C_MIN_PCLK_FREQ)
<> 149:156823d33999 403 {
<> 149:156823d33999 404 return HAL_ERROR;
<> 149:156823d33999 405 }
<> 149:156823d33999 406
<> 149:156823d33999 407 hi2c->State = HAL_I2C_STATE_BUSY;
<> 149:156823d33999 408
<> 149:156823d33999 409 /* Disable the selected I2C peripheral */
<> 149:156823d33999 410 __HAL_I2C_DISABLE(hi2c);
<> 149:156823d33999 411
<> 149:156823d33999 412 /* Calculate frequency range */
<> 149:156823d33999 413 freqrange = I2C_FREQ_RANGE(pclk1);
<> 149:156823d33999 414
<> 149:156823d33999 415 /*---------------------------- I2Cx CR2 Configuration ----------------------*/
<> 149:156823d33999 416 /* Configure I2Cx: Frequency range */
<> 149:156823d33999 417 MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
<> 149:156823d33999 418
<> 149:156823d33999 419 /*---------------------------- I2Cx TRISE Configuration --------------------*/
<> 149:156823d33999 420 /* Configure I2Cx: Rise Time */
<> 149:156823d33999 421 MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
<> 149:156823d33999 422
<> 149:156823d33999 423 /*---------------------------- I2Cx CCR Configuration ----------------------*/
<> 149:156823d33999 424 /* Configure I2Cx: Speed */
<> 149:156823d33999 425 MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
<> 149:156823d33999 426
<> 149:156823d33999 427 /*---------------------------- I2Cx CR1 Configuration ----------------------*/
<> 149:156823d33999 428 /* Configure I2Cx: Generalcall and NoStretch mode */
<> 149:156823d33999 429 MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
<> 149:156823d33999 430
<> 149:156823d33999 431 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
<> 149:156823d33999 432 /* Configure I2Cx: Own Address1 and addressing mode */
<> 149:156823d33999 433 MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
<> 149:156823d33999 434
<> 149:156823d33999 435 /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
<> 149:156823d33999 436 /* Configure I2Cx: Dual mode and Own Address2 */
<> 149:156823d33999 437 MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
<> 149:156823d33999 438
<> 149:156823d33999 439 /* Enable the selected I2C peripheral */
<> 149:156823d33999 440 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 441
<> 149:156823d33999 442 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 443 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 444 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 445 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 446
<> 149:156823d33999 447 return HAL_OK;
<> 149:156823d33999 448 }
<> 149:156823d33999 449
<> 149:156823d33999 450 /**
<> 149:156823d33999 451 * @brief DeInitialize the I2C peripheral.
<> 149:156823d33999 452 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 453 * the configuration information for the specified I2C.
<> 149:156823d33999 454 * @retval HAL status
<> 149:156823d33999 455 */
<> 149:156823d33999 456 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 457 {
<> 149:156823d33999 458 /* Check the I2C handle allocation */
<> 149:156823d33999 459 if(hi2c == NULL)
<> 149:156823d33999 460 {
<> 149:156823d33999 461 return HAL_ERROR;
<> 149:156823d33999 462 }
<> 149:156823d33999 463
<> 149:156823d33999 464 /* Check the parameters */
<> 149:156823d33999 465 assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
<> 149:156823d33999 466
<> 149:156823d33999 467 hi2c->State = HAL_I2C_STATE_BUSY;
<> 149:156823d33999 468
<> 149:156823d33999 469 /* Disable the I2C Peripheral Clock */
<> 149:156823d33999 470 __HAL_I2C_DISABLE(hi2c);
<> 149:156823d33999 471
<> 149:156823d33999 472 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
<> 149:156823d33999 473 HAL_I2C_MspDeInit(hi2c);
<> 149:156823d33999 474
<> 149:156823d33999 475 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 476 hi2c->State = HAL_I2C_STATE_RESET;
<> 149:156823d33999 477 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 478 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 479
<> 149:156823d33999 480 /* Release Lock */
<> 149:156823d33999 481 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 482
<> 149:156823d33999 483 return HAL_OK;
<> 149:156823d33999 484 }
<> 149:156823d33999 485
<> 149:156823d33999 486 /**
<> 149:156823d33999 487 * @brief Initialize the I2C MSP.
<> 149:156823d33999 488 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 489 * the configuration information for the specified I2C.
<> 149:156823d33999 490 * @retval None
<> 149:156823d33999 491 */
<> 149:156823d33999 492 __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 493 {
<> 149:156823d33999 494 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 495 UNUSED(hi2c);
<> 149:156823d33999 496
<> 149:156823d33999 497 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 498 the HAL_I2C_MspInit could be implemented in the user file
<> 149:156823d33999 499 */
<> 149:156823d33999 500 }
<> 149:156823d33999 501
<> 149:156823d33999 502 /**
<> 149:156823d33999 503 * @brief DeInitialize the I2C MSP.
<> 149:156823d33999 504 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 505 * the configuration information for the specified I2C.
<> 149:156823d33999 506 * @retval None
<> 149:156823d33999 507 */
<> 149:156823d33999 508 __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 509 {
<> 149:156823d33999 510 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 511 UNUSED(hi2c);
<> 149:156823d33999 512
<> 149:156823d33999 513 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 514 the HAL_I2C_MspDeInit could be implemented in the user file
<> 149:156823d33999 515 */
<> 149:156823d33999 516 }
<> 149:156823d33999 517
<> 149:156823d33999 518 /**
<> 149:156823d33999 519 * @}
<> 149:156823d33999 520 */
<> 149:156823d33999 521
<> 149:156823d33999 522 /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
<> 149:156823d33999 523 * @brief Data transfers functions
<> 149:156823d33999 524 *
<> 149:156823d33999 525 @verbatim
<> 149:156823d33999 526 ===============================================================================
<> 149:156823d33999 527 ##### IO operation functions #####
<> 149:156823d33999 528 ===============================================================================
<> 149:156823d33999 529 [..]
<> 149:156823d33999 530 This subsection provides a set of functions allowing to manage the I2C data
<> 149:156823d33999 531 transfers.
<> 149:156823d33999 532
<> 149:156823d33999 533 (#) There are two modes of transfer:
<> 149:156823d33999 534 (++) Blocking mode : The communication is performed in the polling mode.
<> 149:156823d33999 535 The status of all data processing is returned by the same function
<> 149:156823d33999 536 after finishing transfer.
<> 149:156823d33999 537 (++) No-Blocking mode : The communication is performed using Interrupts
<> 149:156823d33999 538 or DMA. These functions return the status of the transfer startup.
<> 149:156823d33999 539 The end of the data processing will be indicated through the
<> 149:156823d33999 540 dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
<> 149:156823d33999 541 using DMA mode.
<> 149:156823d33999 542
<> 149:156823d33999 543 (#) Blocking mode functions are :
<> 149:156823d33999 544 (++) HAL_I2C_Master_Transmit()
<> 149:156823d33999 545 (++) HAL_I2C_Master_Receive()
<> 149:156823d33999 546 (++) HAL_I2C_Slave_Transmit()
<> 149:156823d33999 547 (++) HAL_I2C_Slave_Receive()
<> 149:156823d33999 548 (++) HAL_I2C_Mem_Write()
<> 149:156823d33999 549 (++) HAL_I2C_Mem_Read()
<> 149:156823d33999 550 (++) HAL_I2C_IsDeviceReady()
<> 149:156823d33999 551
<> 149:156823d33999 552 (#) No-Blocking mode functions with Interrupt are :
<> 149:156823d33999 553 (++) HAL_I2C_Master_Transmit_IT()
<> 149:156823d33999 554 (++) HAL_I2C_Master_Receive_IT()
<> 149:156823d33999 555 (++) HAL_I2C_Slave_Transmit_IT()
<> 149:156823d33999 556 (++) HAL_I2C_Slave_Receive_IT()
<> 149:156823d33999 557 (++) HAL_I2C_Master_Sequential_Transmit_IT()
<> 149:156823d33999 558 (++) HAL_I2C_Master_Sequential_Receive_IT()
<> 149:156823d33999 559 (++) HAL_I2C_Slave_Sequential_Transmit_IT()
<> 149:156823d33999 560 (++) HAL_I2C_Slave_Sequential_Receive_IT()
<> 149:156823d33999 561 (++) HAL_I2C_Mem_Write_IT()
<> 149:156823d33999 562 (++) HAL_I2C_Mem_Read_IT()
<> 149:156823d33999 563
<> 149:156823d33999 564 (#) No-Blocking mode functions with DMA are :
<> 149:156823d33999 565 (++) HAL_I2C_Master_Transmit_DMA()
<> 149:156823d33999 566 (++) HAL_I2C_Master_Receive_DMA()
<> 149:156823d33999 567 (++) HAL_I2C_Slave_Transmit_DMA()
<> 149:156823d33999 568 (++) HAL_I2C_Slave_Receive_DMA()
<> 149:156823d33999 569 (++) HAL_I2C_Mem_Write_DMA()
<> 149:156823d33999 570 (++) HAL_I2C_Mem_Read_DMA()
<> 149:156823d33999 571
<> 149:156823d33999 572 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
<> 149:156823d33999 573 (++) HAL_I2C_MemTxCpltCallback()
<> 149:156823d33999 574 (++) HAL_I2C_MemRxCpltCallback()
<> 149:156823d33999 575 (++) HAL_I2C_MasterTxCpltCallback()
<> 149:156823d33999 576 (++) HAL_I2C_MasterRxCpltCallback()
<> 149:156823d33999 577 (++) HAL_I2C_SlaveTxCpltCallback()
<> 149:156823d33999 578 (++) HAL_I2C_SlaveRxCpltCallback()
<> 149:156823d33999 579 (++) HAL_I2C_ErrorCallback()
<> 149:156823d33999 580 (++) HAL_I2C_AbortCpltCallback()
<> 149:156823d33999 581
<> 149:156823d33999 582 @endverbatim
<> 149:156823d33999 583 * @{
<> 149:156823d33999 584 */
<> 149:156823d33999 585
<> 149:156823d33999 586 /**
<> 149:156823d33999 587 * @brief Transmits in master mode an amount of data in blocking mode.
<> 149:156823d33999 588 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 589 * the configuration information for the specified I2C.
<> 149:156823d33999 590 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 591 * in datasheet must be shift at right before call interface
<> 149:156823d33999 592 * @param pData Pointer to data buffer
<> 149:156823d33999 593 * @param Size Amount of data to be sent
<> 149:156823d33999 594 * @param Timeout Timeout duration
<> 149:156823d33999 595 * @retval HAL status
<> 149:156823d33999 596 */
<> 149:156823d33999 597 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 149:156823d33999 598 {
<> 149:156823d33999 599 uint32_t tickstart = 0x00U;
<> 149:156823d33999 600
<> 149:156823d33999 601 /* Init tickstart for timeout management*/
<> 149:156823d33999 602 tickstart = HAL_GetTick();
<> 149:156823d33999 603
<> 149:156823d33999 604 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 605 {
<> 149:156823d33999 606 /* Wait until BUSY flag is reset */
<> 149:156823d33999 607 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 608 {
<> 149:156823d33999 609 return HAL_BUSY;
<> 149:156823d33999 610 }
<> 149:156823d33999 611
<> 149:156823d33999 612 /* Process Locked */
<> 149:156823d33999 613 __HAL_LOCK(hi2c);
<> 149:156823d33999 614
<> 149:156823d33999 615 /* Check if the I2C is already enabled */
<> 149:156823d33999 616 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 617 {
<> 149:156823d33999 618 /* Enable I2C peripheral */
<> 149:156823d33999 619 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 620 }
<> 149:156823d33999 621
<> 149:156823d33999 622 /* Disable Pos */
<> 149:156823d33999 623 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 624
<> 149:156823d33999 625 hi2c->State = HAL_I2C_STATE_BUSY_TX;
<> 149:156823d33999 626 hi2c->Mode = HAL_I2C_MODE_MASTER;
<> 149:156823d33999 627 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 628
<> 149:156823d33999 629 /* Prepare transfer parameters */
<> 149:156823d33999 630 hi2c->pBuffPtr = pData;
<> 149:156823d33999 631 hi2c->XferCount = Size;
<> 149:156823d33999 632 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 633 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 634
<> 149:156823d33999 635 /* Send Slave Address */
<> 149:156823d33999 636 if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 637 {
<> 149:156823d33999 638 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 639 {
<> 149:156823d33999 640 /* Process Unlocked */
<> 149:156823d33999 641 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 642 return HAL_ERROR;
<> 149:156823d33999 643 }
<> 149:156823d33999 644 else
<> 149:156823d33999 645 {
<> 149:156823d33999 646 /* Process Unlocked */
<> 149:156823d33999 647 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 648 return HAL_TIMEOUT;
<> 149:156823d33999 649 }
<> 149:156823d33999 650 }
<> 149:156823d33999 651
<> 149:156823d33999 652 /* Clear ADDR flag */
<> 149:156823d33999 653 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 654
<> 149:156823d33999 655 while(hi2c->XferSize > 0U)
<> 149:156823d33999 656 {
<> 149:156823d33999 657 /* Wait until TXE flag is set */
<> 149:156823d33999 658 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 659 {
<> 149:156823d33999 660 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 661 {
<> 149:156823d33999 662 /* Generate Stop */
<> 149:156823d33999 663 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 664 return HAL_ERROR;
<> 149:156823d33999 665 }
<> 149:156823d33999 666 else
<> 149:156823d33999 667 {
<> 149:156823d33999 668 return HAL_TIMEOUT;
<> 149:156823d33999 669 }
<> 149:156823d33999 670 }
<> 149:156823d33999 671
<> 149:156823d33999 672 /* Write data to DR */
<> 149:156823d33999 673 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
<> 149:156823d33999 674 hi2c->XferCount--;
<> 149:156823d33999 675 hi2c->XferSize--;
<> 149:156823d33999 676
<> 149:156823d33999 677 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
<> 149:156823d33999 678 {
<> 149:156823d33999 679 /* Write data to DR */
<> 149:156823d33999 680 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
<> 149:156823d33999 681 hi2c->XferCount--;
<> 149:156823d33999 682 hi2c->XferSize--;
<> 149:156823d33999 683 }
<> 149:156823d33999 684
<> 149:156823d33999 685 /* Wait until BTF flag is set */
<> 149:156823d33999 686 if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 687 {
<> 149:156823d33999 688 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 689 {
<> 149:156823d33999 690 /* Generate Stop */
<> 149:156823d33999 691 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 692 return HAL_ERROR;
<> 149:156823d33999 693 }
<> 149:156823d33999 694 else
<> 149:156823d33999 695 {
<> 149:156823d33999 696 return HAL_TIMEOUT;
<> 149:156823d33999 697 }
<> 149:156823d33999 698 }
<> 149:156823d33999 699 }
<> 149:156823d33999 700
<> 149:156823d33999 701 /* Generate Stop */
<> 149:156823d33999 702 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 703
<> 149:156823d33999 704 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 705 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 706
<> 149:156823d33999 707 /* Process Unlocked */
<> 149:156823d33999 708 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 709
<> 149:156823d33999 710 return HAL_OK;
<> 149:156823d33999 711 }
<> 149:156823d33999 712 else
<> 149:156823d33999 713 {
<> 149:156823d33999 714 return HAL_BUSY;
<> 149:156823d33999 715 }
<> 149:156823d33999 716 }
<> 149:156823d33999 717
<> 149:156823d33999 718 /**
<> 149:156823d33999 719 * @brief Receives in master mode an amount of data in blocking mode.
<> 149:156823d33999 720 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 721 * the configuration information for the specified I2C.
<> 149:156823d33999 722 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 723 * in datasheet must be shift at right before call interface
<> 149:156823d33999 724 * @param pData Pointer to data buffer
<> 149:156823d33999 725 * @param Size Amount of data to be sent
<> 149:156823d33999 726 * @param Timeout Timeout duration
<> 149:156823d33999 727 * @retval HAL status
<> 149:156823d33999 728 */
<> 149:156823d33999 729 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 149:156823d33999 730 {
<> 149:156823d33999 731 uint32_t tickstart = 0x00U;
<> 149:156823d33999 732
<> 149:156823d33999 733 /* Init tickstart for timeout management*/
<> 149:156823d33999 734 tickstart = HAL_GetTick();
<> 149:156823d33999 735
<> 149:156823d33999 736 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 737 {
<> 149:156823d33999 738 /* Wait until BUSY flag is reset */
<> 149:156823d33999 739 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 740 {
<> 149:156823d33999 741 return HAL_BUSY;
<> 149:156823d33999 742 }
<> 149:156823d33999 743
<> 149:156823d33999 744 /* Process Locked */
<> 149:156823d33999 745 __HAL_LOCK(hi2c);
<> 149:156823d33999 746
<> 149:156823d33999 747 /* Check if the I2C is already enabled */
<> 149:156823d33999 748 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 749 {
<> 149:156823d33999 750 /* Enable I2C peripheral */
<> 149:156823d33999 751 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 752 }
<> 149:156823d33999 753
<> 149:156823d33999 754 /* Disable Pos */
<> 149:156823d33999 755 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 756
<> 149:156823d33999 757 hi2c->State = HAL_I2C_STATE_BUSY_RX;
<> 149:156823d33999 758 hi2c->Mode = HAL_I2C_MODE_MASTER;
<> 149:156823d33999 759 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 760
<> 149:156823d33999 761 /* Prepare transfer parameters */
<> 149:156823d33999 762 hi2c->pBuffPtr = pData;
<> 149:156823d33999 763 hi2c->XferCount = Size;
<> 149:156823d33999 764 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 765 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 766
<> 149:156823d33999 767 /* Send Slave Address */
<> 149:156823d33999 768 if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 769 {
<> 149:156823d33999 770 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 771 {
<> 149:156823d33999 772 /* Process Unlocked */
<> 149:156823d33999 773 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 774 return HAL_ERROR;
<> 149:156823d33999 775 }
<> 149:156823d33999 776 else
<> 149:156823d33999 777 {
<> 149:156823d33999 778 /* Process Unlocked */
<> 149:156823d33999 779 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 780 return HAL_TIMEOUT;
<> 149:156823d33999 781 }
<> 149:156823d33999 782 }
<> 149:156823d33999 783
<> 149:156823d33999 784 if(hi2c->XferSize == 0U)
<> 149:156823d33999 785 {
<> 149:156823d33999 786 /* Clear ADDR flag */
<> 149:156823d33999 787 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 788
<> 149:156823d33999 789 /* Generate Stop */
<> 149:156823d33999 790 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 791 }
<> 149:156823d33999 792 else if(hi2c->XferSize == 1U)
<> 149:156823d33999 793 {
<> 149:156823d33999 794 /* Disable Acknowledge */
<> 149:156823d33999 795 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 796
<> 149:156823d33999 797 /* Clear ADDR flag */
<> 149:156823d33999 798 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 799
<> 149:156823d33999 800 /* Generate Stop */
<> 149:156823d33999 801 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 802 }
<> 149:156823d33999 803 else if(hi2c->XferSize == 2U)
<> 149:156823d33999 804 {
<> 149:156823d33999 805 /* Disable Acknowledge */
<> 149:156823d33999 806 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 807
<> 149:156823d33999 808 /* Enable Pos */
<> 149:156823d33999 809 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 810
<> 149:156823d33999 811 /* Clear ADDR flag */
<> 149:156823d33999 812 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 813 }
<> 149:156823d33999 814 else
<> 149:156823d33999 815 {
<> 149:156823d33999 816 /* Enable Acknowledge */
<> 149:156823d33999 817 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 818
<> 149:156823d33999 819 /* Clear ADDR flag */
<> 149:156823d33999 820 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 821 }
<> 149:156823d33999 822
<> 149:156823d33999 823 while(hi2c->XferSize > 0U)
<> 149:156823d33999 824 {
<> 149:156823d33999 825 if(hi2c->XferSize <= 3U)
<> 149:156823d33999 826 {
<> 149:156823d33999 827 /* One byte */
<> 149:156823d33999 828 if(hi2c->XferSize == 1U)
<> 149:156823d33999 829 {
<> 149:156823d33999 830 /* Wait until RXNE flag is set */
<> 149:156823d33999 831 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 832 {
<> 149:156823d33999 833 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
<> 149:156823d33999 834 {
<> 149:156823d33999 835 return HAL_TIMEOUT;
<> 149:156823d33999 836 }
<> 149:156823d33999 837 else
<> 149:156823d33999 838 {
<> 149:156823d33999 839 return HAL_ERROR;
<> 149:156823d33999 840 }
<> 149:156823d33999 841 }
<> 149:156823d33999 842
<> 149:156823d33999 843 /* Read data from DR */
<> 149:156823d33999 844 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 845 hi2c->XferSize--;
<> 149:156823d33999 846 hi2c->XferCount--;
<> 149:156823d33999 847 }
<> 149:156823d33999 848 /* Two bytes */
<> 149:156823d33999 849 else if(hi2c->XferSize == 2U)
<> 149:156823d33999 850 {
<> 149:156823d33999 851 /* Wait until BTF flag is set */
<> 149:156823d33999 852 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 853 {
<> 149:156823d33999 854 return HAL_TIMEOUT;
<> 149:156823d33999 855 }
<> 149:156823d33999 856
<> 149:156823d33999 857 /* Generate Stop */
<> 149:156823d33999 858 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 859
<> 149:156823d33999 860 /* Read data from DR */
<> 149:156823d33999 861 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 862 hi2c->XferSize--;
<> 149:156823d33999 863 hi2c->XferCount--;
<> 149:156823d33999 864
<> 149:156823d33999 865 /* Read data from DR */
<> 149:156823d33999 866 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 867 hi2c->XferSize--;
<> 149:156823d33999 868 hi2c->XferCount--;
<> 149:156823d33999 869 }
<> 149:156823d33999 870 /* 3 Last bytes */
<> 149:156823d33999 871 else
<> 149:156823d33999 872 {
<> 149:156823d33999 873 /* Wait until BTF flag is set */
<> 149:156823d33999 874 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 875 {
<> 149:156823d33999 876 return HAL_TIMEOUT;
<> 149:156823d33999 877 }
<> 149:156823d33999 878
<> 149:156823d33999 879 /* Disable Acknowledge */
<> 149:156823d33999 880 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 881
<> 149:156823d33999 882 /* Read data from DR */
<> 149:156823d33999 883 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 884 hi2c->XferSize--;
<> 149:156823d33999 885 hi2c->XferCount--;
<> 149:156823d33999 886
<> 149:156823d33999 887 /* Wait until BTF flag is set */
<> 149:156823d33999 888 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 889 {
<> 149:156823d33999 890 return HAL_TIMEOUT;
<> 149:156823d33999 891 }
<> 149:156823d33999 892
<> 149:156823d33999 893 /* Generate Stop */
<> 149:156823d33999 894 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 895
<> 149:156823d33999 896 /* Read data from DR */
<> 149:156823d33999 897 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 898 hi2c->XferSize--;
<> 149:156823d33999 899 hi2c->XferCount--;
<> 149:156823d33999 900
<> 149:156823d33999 901 /* Read data from DR */
<> 149:156823d33999 902 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 903 hi2c->XferSize--;
<> 149:156823d33999 904 hi2c->XferCount--;
<> 149:156823d33999 905 }
<> 149:156823d33999 906 }
<> 149:156823d33999 907 else
<> 149:156823d33999 908 {
<> 149:156823d33999 909 /* Wait until RXNE flag is set */
<> 149:156823d33999 910 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 911 {
<> 149:156823d33999 912 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
<> 149:156823d33999 913 {
<> 149:156823d33999 914 return HAL_TIMEOUT;
<> 149:156823d33999 915 }
<> 149:156823d33999 916 else
<> 149:156823d33999 917 {
<> 149:156823d33999 918 return HAL_ERROR;
<> 149:156823d33999 919 }
<> 149:156823d33999 920 }
<> 149:156823d33999 921
<> 149:156823d33999 922 /* Read data from DR */
<> 149:156823d33999 923 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 924 hi2c->XferSize--;
<> 149:156823d33999 925 hi2c->XferCount--;
<> 149:156823d33999 926
<> 149:156823d33999 927 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
<> 149:156823d33999 928 {
<> 149:156823d33999 929 /* Read data from DR */
<> 149:156823d33999 930 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 931 hi2c->XferSize--;
<> 149:156823d33999 932 hi2c->XferCount--;
<> 149:156823d33999 933 }
<> 149:156823d33999 934 }
<> 149:156823d33999 935 }
<> 149:156823d33999 936
<> 149:156823d33999 937 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 938 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 939
<> 149:156823d33999 940 /* Process Unlocked */
<> 149:156823d33999 941 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 942
<> 149:156823d33999 943 return HAL_OK;
<> 149:156823d33999 944 }
<> 149:156823d33999 945 else
<> 149:156823d33999 946 {
<> 149:156823d33999 947 return HAL_BUSY;
<> 149:156823d33999 948 }
<> 149:156823d33999 949 }
<> 149:156823d33999 950
<> 149:156823d33999 951 /**
<> 149:156823d33999 952 * @brief Transmits in slave mode an amount of data in blocking mode.
<> 149:156823d33999 953 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 954 * the configuration information for the specified I2C.
<> 149:156823d33999 955 * @param pData Pointer to data buffer
<> 149:156823d33999 956 * @param Size Amount of data to be sent
<> 149:156823d33999 957 * @param Timeout Timeout duration
<> 149:156823d33999 958 * @retval HAL status
<> 149:156823d33999 959 */
<> 149:156823d33999 960 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 149:156823d33999 961 {
<> 149:156823d33999 962 uint32_t tickstart = 0x00U;
<> 149:156823d33999 963
<> 149:156823d33999 964 /* Init tickstart for timeout management*/
<> 149:156823d33999 965 tickstart = HAL_GetTick();
<> 149:156823d33999 966
<> 149:156823d33999 967 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 968 {
<> 149:156823d33999 969 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 970 {
<> 149:156823d33999 971 return HAL_ERROR;
<> 149:156823d33999 972 }
<> 149:156823d33999 973
<> 149:156823d33999 974 /* Process Locked */
<> 149:156823d33999 975 __HAL_LOCK(hi2c);
<> 149:156823d33999 976
<> 149:156823d33999 977 /* Check if the I2C is already enabled */
<> 149:156823d33999 978 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 979 {
<> 149:156823d33999 980 /* Enable I2C peripheral */
<> 149:156823d33999 981 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 982 }
<> 149:156823d33999 983
<> 149:156823d33999 984 /* Disable Pos */
<> 149:156823d33999 985 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 986
<> 149:156823d33999 987 hi2c->State = HAL_I2C_STATE_BUSY_TX;
<> 149:156823d33999 988 hi2c->Mode = HAL_I2C_MODE_SLAVE;
<> 149:156823d33999 989 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 990
<> 149:156823d33999 991 /* Prepare transfer parameters */
<> 149:156823d33999 992 hi2c->pBuffPtr = pData;
<> 149:156823d33999 993 hi2c->XferCount = Size;
<> 149:156823d33999 994 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 995 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 996
<> 149:156823d33999 997 /* Enable Address Acknowledge */
<> 149:156823d33999 998 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 999
<> 149:156823d33999 1000 /* Wait until ADDR flag is set */
<> 149:156823d33999 1001 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 1002 {
<> 149:156823d33999 1003 return HAL_TIMEOUT;
<> 149:156823d33999 1004 }
<> 149:156823d33999 1005
<> 149:156823d33999 1006 /* Clear ADDR flag */
<> 149:156823d33999 1007 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 1008
<> 149:156823d33999 1009 /* If 10bit addressing mode is selected */
<> 149:156823d33999 1010 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
<> 149:156823d33999 1011 {
<> 149:156823d33999 1012 /* Wait until ADDR flag is set */
<> 149:156823d33999 1013 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 1014 {
<> 149:156823d33999 1015 return HAL_TIMEOUT;
<> 149:156823d33999 1016 }
<> 149:156823d33999 1017
<> 149:156823d33999 1018 /* Clear ADDR flag */
<> 149:156823d33999 1019 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 1020 }
<> 149:156823d33999 1021
<> 149:156823d33999 1022 while(hi2c->XferSize > 0U)
<> 149:156823d33999 1023 {
<> 149:156823d33999 1024 /* Wait until TXE flag is set */
<> 149:156823d33999 1025 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 1026 {
<> 149:156823d33999 1027 /* Disable Address Acknowledge */
<> 149:156823d33999 1028 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1029 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 1030 {
<> 149:156823d33999 1031 return HAL_ERROR;
<> 149:156823d33999 1032 }
<> 149:156823d33999 1033 else
<> 149:156823d33999 1034 {
<> 149:156823d33999 1035 return HAL_TIMEOUT;
<> 149:156823d33999 1036 }
<> 149:156823d33999 1037 }
<> 149:156823d33999 1038
<> 149:156823d33999 1039 /* Write data to DR */
<> 149:156823d33999 1040 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
<> 149:156823d33999 1041 hi2c->XferCount--;
<> 149:156823d33999 1042 hi2c->XferSize--;
<> 149:156823d33999 1043
<> 149:156823d33999 1044 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
<> 149:156823d33999 1045 {
<> 149:156823d33999 1046 /* Write data to DR */
<> 149:156823d33999 1047 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
<> 149:156823d33999 1048 hi2c->XferCount--;
<> 149:156823d33999 1049 hi2c->XferSize--;
<> 149:156823d33999 1050 }
<> 149:156823d33999 1051 }
<> 149:156823d33999 1052
<> 149:156823d33999 1053 /* Wait until AF flag is set */
<> 149:156823d33999 1054 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 1055 {
<> 149:156823d33999 1056 return HAL_TIMEOUT;
<> 149:156823d33999 1057 }
<> 149:156823d33999 1058
<> 149:156823d33999 1059 /* Clear AF flag */
<> 149:156823d33999 1060 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
<> 149:156823d33999 1061
<> 149:156823d33999 1062 /* Disable Address Acknowledge */
<> 149:156823d33999 1063 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1064
<> 149:156823d33999 1065 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 1066 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 1067
<> 149:156823d33999 1068 /* Process Unlocked */
<> 149:156823d33999 1069 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1070
<> 149:156823d33999 1071 return HAL_OK;
<> 149:156823d33999 1072 }
<> 149:156823d33999 1073 else
<> 149:156823d33999 1074 {
<> 149:156823d33999 1075 return HAL_BUSY;
<> 149:156823d33999 1076 }
<> 149:156823d33999 1077 }
<> 149:156823d33999 1078
<> 149:156823d33999 1079 /**
<> 149:156823d33999 1080 * @brief Receive in slave mode an amount of data in blocking mode
<> 149:156823d33999 1081 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1082 * the configuration information for the specified I2C.
<> 149:156823d33999 1083 * @param pData Pointer to data buffer
<> 149:156823d33999 1084 * @param Size Amount of data to be sent
<> 149:156823d33999 1085 * @param Timeout Timeout duration
<> 149:156823d33999 1086 * @retval HAL status
<> 149:156823d33999 1087 */
<> 149:156823d33999 1088 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 149:156823d33999 1089 {
<> 149:156823d33999 1090 uint32_t tickstart = 0x00U;
<> 149:156823d33999 1091
<> 149:156823d33999 1092 /* Init tickstart for timeout management*/
<> 149:156823d33999 1093 tickstart = HAL_GetTick();
<> 149:156823d33999 1094
<> 149:156823d33999 1095 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 1096 {
<> 149:156823d33999 1097 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 1098 {
<> 149:156823d33999 1099 return HAL_ERROR;
<> 149:156823d33999 1100 }
<> 149:156823d33999 1101
<> 149:156823d33999 1102 /* Process Locked */
<> 149:156823d33999 1103 __HAL_LOCK(hi2c);
<> 149:156823d33999 1104
<> 149:156823d33999 1105 /* Check if the I2C is already enabled */
<> 149:156823d33999 1106 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 1107 {
<> 149:156823d33999 1108 /* Enable I2C peripheral */
<> 149:156823d33999 1109 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 1110 }
<> 149:156823d33999 1111
<> 149:156823d33999 1112 /* Disable Pos */
<> 149:156823d33999 1113 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 1114
<> 149:156823d33999 1115 hi2c->State = HAL_I2C_STATE_BUSY_RX;
<> 149:156823d33999 1116 hi2c->Mode = HAL_I2C_MODE_SLAVE;
<> 149:156823d33999 1117 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 1118
<> 149:156823d33999 1119 /* Prepare transfer parameters */
<> 149:156823d33999 1120 hi2c->pBuffPtr = pData;
<> 149:156823d33999 1121 hi2c->XferCount = Size;
<> 149:156823d33999 1122 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 1123 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 1124
<> 149:156823d33999 1125 /* Enable Address Acknowledge */
<> 149:156823d33999 1126 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1127
<> 149:156823d33999 1128 /* Wait until ADDR flag is set */
<> 149:156823d33999 1129 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 1130 {
<> 149:156823d33999 1131 return HAL_TIMEOUT;
<> 149:156823d33999 1132 }
<> 149:156823d33999 1133
<> 149:156823d33999 1134 /* Clear ADDR flag */
<> 149:156823d33999 1135 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 1136
<> 149:156823d33999 1137 while(hi2c->XferSize > 0U)
<> 149:156823d33999 1138 {
<> 149:156823d33999 1139 /* Wait until RXNE flag is set */
<> 149:156823d33999 1140 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 1141 {
<> 149:156823d33999 1142 /* Disable Address Acknowledge */
<> 149:156823d33999 1143 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1144 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
<> 149:156823d33999 1145 {
<> 149:156823d33999 1146 return HAL_TIMEOUT;
<> 149:156823d33999 1147 }
<> 149:156823d33999 1148 else
<> 149:156823d33999 1149 {
<> 149:156823d33999 1150 return HAL_ERROR;
<> 149:156823d33999 1151 }
<> 149:156823d33999 1152 }
<> 149:156823d33999 1153
<> 149:156823d33999 1154 /* Read data from DR */
<> 149:156823d33999 1155 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 1156 hi2c->XferSize--;
<> 149:156823d33999 1157 hi2c->XferCount--;
<> 149:156823d33999 1158
<> 149:156823d33999 1159 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
<> 149:156823d33999 1160 {
<> 149:156823d33999 1161 /* Read data from DR */
<> 149:156823d33999 1162 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 1163 hi2c->XferSize--;
<> 149:156823d33999 1164 hi2c->XferCount--;
<> 149:156823d33999 1165 }
<> 149:156823d33999 1166 }
<> 149:156823d33999 1167
<> 149:156823d33999 1168 /* Wait until STOP flag is set */
<> 149:156823d33999 1169 if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 1170 {
<> 149:156823d33999 1171 /* Disable Address Acknowledge */
<> 149:156823d33999 1172 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1173
<> 149:156823d33999 1174 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 1175 {
<> 149:156823d33999 1176 return HAL_ERROR;
<> 149:156823d33999 1177 }
<> 149:156823d33999 1178 else
<> 149:156823d33999 1179 {
<> 149:156823d33999 1180 return HAL_TIMEOUT;
<> 149:156823d33999 1181 }
<> 149:156823d33999 1182 }
<> 149:156823d33999 1183
<> 149:156823d33999 1184 /* Clear STOP flag */
<> 149:156823d33999 1185 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
<> 149:156823d33999 1186
<> 149:156823d33999 1187 /* Disable Address Acknowledge */
<> 149:156823d33999 1188 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1189
<> 149:156823d33999 1190 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 1191 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 1192
<> 149:156823d33999 1193 /* Process Unlocked */
<> 149:156823d33999 1194 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1195
<> 149:156823d33999 1196 return HAL_OK;
<> 149:156823d33999 1197 }
<> 149:156823d33999 1198 else
<> 149:156823d33999 1199 {
<> 149:156823d33999 1200 return HAL_BUSY;
<> 149:156823d33999 1201 }
<> 149:156823d33999 1202 }
<> 149:156823d33999 1203
<> 149:156823d33999 1204 /**
<> 149:156823d33999 1205 * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
<> 149:156823d33999 1206 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1207 * the configuration information for the specified I2C.
<> 149:156823d33999 1208 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 1209 * in datasheet must be shift at right before call interface
<> 149:156823d33999 1210 * @param pData Pointer to data buffer
<> 149:156823d33999 1211 * @param Size Amount of data to be sent
<> 149:156823d33999 1212 * @retval HAL status
<> 149:156823d33999 1213 */
<> 149:156823d33999 1214 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 1215 {
<> 149:156823d33999 1216 __IO uint32_t count = 0U;
<> 149:156823d33999 1217
<> 149:156823d33999 1218 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 1219 {
<> 149:156823d33999 1220 /* Wait until BUSY flag is reset */
<> 149:156823d33999 1221 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
<> 149:156823d33999 1222 do
<> 149:156823d33999 1223 {
<> 149:156823d33999 1224 if(count-- == 0U)
<> 149:156823d33999 1225 {
<> 149:156823d33999 1226 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 1227 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 1228
<> 149:156823d33999 1229 /* Process Unlocked */
<> 149:156823d33999 1230 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1231
<> 149:156823d33999 1232 return HAL_TIMEOUT;
<> 149:156823d33999 1233 }
<> 149:156823d33999 1234 }
<> 149:156823d33999 1235 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
<> 149:156823d33999 1236
<> 149:156823d33999 1237 /* Process Locked */
<> 149:156823d33999 1238 __HAL_LOCK(hi2c);
<> 149:156823d33999 1239
<> 149:156823d33999 1240 /* Check if the I2C is already enabled */
<> 149:156823d33999 1241 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 1242 {
<> 149:156823d33999 1243 /* Enable I2C peripheral */
<> 149:156823d33999 1244 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 1245 }
<> 149:156823d33999 1246
<> 149:156823d33999 1247 /* Disable Pos */
<> 149:156823d33999 1248 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 1249
<> 149:156823d33999 1250 hi2c->State = HAL_I2C_STATE_BUSY_TX;
<> 149:156823d33999 1251 hi2c->Mode = HAL_I2C_MODE_MASTER;
<> 149:156823d33999 1252 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 1253
<> 149:156823d33999 1254 /* Prepare transfer parameters */
<> 149:156823d33999 1255 hi2c->pBuffPtr = pData;
<> 149:156823d33999 1256 hi2c->XferCount = Size;
<> 149:156823d33999 1257 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 1258 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 1259 hi2c->Devaddress = DevAddress;
<> 149:156823d33999 1260
<> 149:156823d33999 1261 /* Generate Start */
<> 149:156823d33999 1262 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 1263
<> 149:156823d33999 1264 /* Process Unlocked */
<> 149:156823d33999 1265 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1266
<> 149:156823d33999 1267 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 1268 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 1269 process unlock */
<> 149:156823d33999 1270 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 1271 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 1272
<> 149:156823d33999 1273 return HAL_OK;
<> 149:156823d33999 1274 }
<> 149:156823d33999 1275 else
<> 149:156823d33999 1276 {
<> 149:156823d33999 1277 return HAL_BUSY;
<> 149:156823d33999 1278 }
<> 149:156823d33999 1279 }
<> 149:156823d33999 1280
<> 149:156823d33999 1281 /**
<> 149:156823d33999 1282 * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
<> 149:156823d33999 1283 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1284 * the configuration information for the specified I2C.
<> 149:156823d33999 1285 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 1286 * in datasheet must be shift at right before call interface
<> 149:156823d33999 1287 * @param pData Pointer to data buffer
<> 149:156823d33999 1288 * @param Size Amount of data to be sent
<> 149:156823d33999 1289 * @retval HAL status
<> 149:156823d33999 1290 */
<> 149:156823d33999 1291 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 1292 {
<> 149:156823d33999 1293 __IO uint32_t count = 0U;
<> 149:156823d33999 1294
<> 149:156823d33999 1295 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 1296 {
<> 149:156823d33999 1297 /* Wait until BUSY flag is reset */
<> 149:156823d33999 1298 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
<> 149:156823d33999 1299 do
<> 149:156823d33999 1300 {
<> 149:156823d33999 1301 if(count-- == 0U)
<> 149:156823d33999 1302 {
<> 149:156823d33999 1303 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 1304 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 1305
<> 149:156823d33999 1306 /* Process Unlocked */
<> 149:156823d33999 1307 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1308
<> 149:156823d33999 1309 return HAL_TIMEOUT;
<> 149:156823d33999 1310 }
<> 149:156823d33999 1311 }
<> 149:156823d33999 1312 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
<> 149:156823d33999 1313
<> 149:156823d33999 1314 /* Process Locked */
<> 149:156823d33999 1315 __HAL_LOCK(hi2c);
<> 149:156823d33999 1316
<> 149:156823d33999 1317 /* Check if the I2C is already enabled */
<> 149:156823d33999 1318 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 1319 {
<> 149:156823d33999 1320 /* Enable I2C peripheral */
<> 149:156823d33999 1321 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 1322 }
<> 149:156823d33999 1323
<> 149:156823d33999 1324 /* Disable Pos */
<> 149:156823d33999 1325 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 1326
<> 149:156823d33999 1327 hi2c->State = HAL_I2C_STATE_BUSY_RX;
<> 149:156823d33999 1328 hi2c->Mode = HAL_I2C_MODE_MASTER;
<> 149:156823d33999 1329 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 1330
<> 149:156823d33999 1331 /* Prepare transfer parameters */
<> 149:156823d33999 1332 hi2c->pBuffPtr = pData;
<> 149:156823d33999 1333 hi2c->XferCount = Size;
<> 149:156823d33999 1334 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 1335 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 1336 hi2c->Devaddress = DevAddress;
<> 149:156823d33999 1337
<> 149:156823d33999 1338 /* Enable Acknowledge */
<> 149:156823d33999 1339 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1340
<> 149:156823d33999 1341 /* Generate Start */
<> 149:156823d33999 1342 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 1343
<> 149:156823d33999 1344 /* Process Unlocked */
<> 149:156823d33999 1345 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1346
<> 149:156823d33999 1347 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 1348 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 1349 process unlock */
<> 149:156823d33999 1350
<> 149:156823d33999 1351 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 1352 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 1353
<> 149:156823d33999 1354 return HAL_OK;
<> 149:156823d33999 1355 }
<> 149:156823d33999 1356 else
<> 149:156823d33999 1357 {
<> 149:156823d33999 1358 return HAL_BUSY;
<> 149:156823d33999 1359 }
<> 149:156823d33999 1360 }
<> 149:156823d33999 1361
<> 149:156823d33999 1362 /**
<> 149:156823d33999 1363 * @brief Sequential transmit in master mode an amount of data in non-blocking mode with Interrupt
<> 149:156823d33999 1364 * @note This interface allow to manage repeated start condition when a direction change during transfer
<> 149:156823d33999 1365 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1366 * the configuration information for the specified I2C.
<> 149:156823d33999 1367 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 1368 * in datasheet must be shift at right before call interface
<> 149:156823d33999 1369 * @param pData Pointer to data buffer
<> 149:156823d33999 1370 * @param Size Amount of data to be sent
<> 149:156823d33999 1371 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
<> 149:156823d33999 1372 * @retval HAL status
<> 149:156823d33999 1373 */
<> 149:156823d33999 1374 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
<> 149:156823d33999 1375 {
<> 149:156823d33999 1376 __IO uint32_t count = 0U;
<> 149:156823d33999 1377
<> 149:156823d33999 1378 /* Check the parameters */
<> 149:156823d33999 1379 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
<> 149:156823d33999 1380
<> 149:156823d33999 1381 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 1382 {
<> 149:156823d33999 1383 /* Check Busy Flag only if FIRST call of Master interface */
<> 149:156823d33999 1384 if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
<> 149:156823d33999 1385 {
<> 149:156823d33999 1386 /* Wait until BUSY flag is reset */
<> 149:156823d33999 1387 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
<> 149:156823d33999 1388 do
<> 149:156823d33999 1389 {
<> 149:156823d33999 1390 if(count-- == 0U)
<> 149:156823d33999 1391 {
<> 149:156823d33999 1392 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 1393 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 1394
<> 149:156823d33999 1395 /* Process Unlocked */
<> 149:156823d33999 1396 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1397
<> 149:156823d33999 1398 return HAL_TIMEOUT;
<> 149:156823d33999 1399 }
<> 149:156823d33999 1400 }
<> 149:156823d33999 1401 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
<> 149:156823d33999 1402 }
<> 149:156823d33999 1403
<> 149:156823d33999 1404 /* Process Locked */
<> 149:156823d33999 1405 __HAL_LOCK(hi2c);
<> 149:156823d33999 1406
<> 149:156823d33999 1407 /* Check if the I2C is already enabled */
<> 149:156823d33999 1408 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 1409 {
<> 149:156823d33999 1410 /* Enable I2C peripheral */
<> 149:156823d33999 1411 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 1412 }
<> 149:156823d33999 1413
<> 149:156823d33999 1414 /* Disable Pos */
<> 149:156823d33999 1415 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 1416
<> 149:156823d33999 1417 hi2c->State = HAL_I2C_STATE_BUSY_TX;
<> 149:156823d33999 1418 hi2c->Mode = HAL_I2C_MODE_MASTER;
<> 149:156823d33999 1419 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 1420
<> 149:156823d33999 1421 /* Prepare transfer parameters */
<> 149:156823d33999 1422 hi2c->pBuffPtr = pData;
<> 149:156823d33999 1423 hi2c->XferCount = Size;
<> 149:156823d33999 1424 hi2c->XferOptions = XferOptions;
<> 149:156823d33999 1425 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 1426 hi2c->Devaddress = DevAddress;
<> 149:156823d33999 1427
<> 149:156823d33999 1428 /* Generate Start */
<> 149:156823d33999 1429 if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) || (hi2c->PreviousState == I2C_STATE_NONE))
<> 149:156823d33999 1430 {
AnnaBridge 167:e84263d55307 1431 /* Generate Start or ReStart */
<> 149:156823d33999 1432 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 1433 }
<> 149:156823d33999 1434
<> 149:156823d33999 1435 /* Process Unlocked */
<> 149:156823d33999 1436 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1437
<> 149:156823d33999 1438 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 1439 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 1440 process unlock */
<> 149:156823d33999 1441
<> 149:156823d33999 1442 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 1443 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 1444
<> 149:156823d33999 1445 return HAL_OK;
<> 149:156823d33999 1446 }
<> 149:156823d33999 1447 else
<> 149:156823d33999 1448 {
<> 149:156823d33999 1449 return HAL_BUSY;
<> 149:156823d33999 1450 }
<> 149:156823d33999 1451 }
<> 149:156823d33999 1452
<> 149:156823d33999 1453 /**
<> 149:156823d33999 1454 * @brief Sequential receive in master mode an amount of data in non-blocking mode with Interrupt
<> 149:156823d33999 1455 * @note This interface allow to manage repeated start condition when a direction change during transfer
<> 149:156823d33999 1456 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1457 * the configuration information for the specified I2C.
<> 149:156823d33999 1458 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 1459 * in datasheet must be shift at right before call interface
<> 149:156823d33999 1460 * @param pData Pointer to data buffer
<> 149:156823d33999 1461 * @param Size Amount of data to be sent
<> 149:156823d33999 1462 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
<> 149:156823d33999 1463 * @retval HAL status
<> 149:156823d33999 1464 */
<> 149:156823d33999 1465 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
<> 149:156823d33999 1466 {
<> 149:156823d33999 1467 __IO uint32_t count = 0U;
<> 149:156823d33999 1468
<> 149:156823d33999 1469 /* Check the parameters */
<> 149:156823d33999 1470 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
<> 149:156823d33999 1471
<> 149:156823d33999 1472 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 1473 {
<> 149:156823d33999 1474 /* Check Busy Flag only if FIRST call of Master interface */
<> 149:156823d33999 1475 if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
<> 149:156823d33999 1476 {
<> 149:156823d33999 1477 /* Wait until BUSY flag is reset */
<> 149:156823d33999 1478 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
<> 149:156823d33999 1479 do
<> 149:156823d33999 1480 {
<> 149:156823d33999 1481 if(count-- == 0U)
<> 149:156823d33999 1482 {
<> 149:156823d33999 1483 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 1484 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 1485
<> 149:156823d33999 1486 /* Process Unlocked */
<> 149:156823d33999 1487 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1488
<> 149:156823d33999 1489 return HAL_TIMEOUT;
<> 149:156823d33999 1490 }
<> 149:156823d33999 1491 }
<> 149:156823d33999 1492 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
<> 149:156823d33999 1493 }
<> 149:156823d33999 1494
<> 149:156823d33999 1495 /* Process Locked */
<> 149:156823d33999 1496 __HAL_LOCK(hi2c);
<> 149:156823d33999 1497
<> 149:156823d33999 1498 /* Check if the I2C is already enabled */
<> 149:156823d33999 1499 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 1500 {
<> 149:156823d33999 1501 /* Enable I2C peripheral */
<> 149:156823d33999 1502 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 1503 }
<> 149:156823d33999 1504
<> 149:156823d33999 1505 /* Disable Pos */
<> 149:156823d33999 1506 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 1507
<> 149:156823d33999 1508 hi2c->State = HAL_I2C_STATE_BUSY_RX;
<> 149:156823d33999 1509 hi2c->Mode = HAL_I2C_MODE_MASTER;
<> 149:156823d33999 1510 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 1511
<> 149:156823d33999 1512 /* Prepare transfer parameters */
<> 149:156823d33999 1513 hi2c->pBuffPtr = pData;
<> 149:156823d33999 1514 hi2c->XferCount = Size;
<> 149:156823d33999 1515 hi2c->XferOptions = XferOptions;
<> 149:156823d33999 1516 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 1517 hi2c->Devaddress = DevAddress;
<> 149:156823d33999 1518
<> 149:156823d33999 1519 if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
<> 149:156823d33999 1520 {
<> 149:156823d33999 1521 /* Enable Acknowledge */
<> 149:156823d33999 1522 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
AnnaBridge 167:e84263d55307 1523 /* Generate Start or ReStart */
<> 149:156823d33999 1524 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 1525 }
<> 149:156823d33999 1526
<> 149:156823d33999 1527 /* Process Unlocked */
<> 149:156823d33999 1528 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1529
<> 149:156823d33999 1530 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 1531 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 1532 process unlock */
<> 149:156823d33999 1533
<> 149:156823d33999 1534 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 1535 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 1536
<> 149:156823d33999 1537 return HAL_OK;
<> 149:156823d33999 1538 }
<> 149:156823d33999 1539 else
<> 149:156823d33999 1540 {
<> 149:156823d33999 1541 return HAL_BUSY;
<> 149:156823d33999 1542 }
<> 149:156823d33999 1543 }
<> 149:156823d33999 1544
<> 149:156823d33999 1545 /**
<> 149:156823d33999 1546 * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
<> 149:156823d33999 1547 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1548 * the configuration information for the specified I2C.
<> 149:156823d33999 1549 * @param pData Pointer to data buffer
<> 149:156823d33999 1550 * @param Size Amount of data to be sent
<> 149:156823d33999 1551 * @retval HAL status
<> 149:156823d33999 1552 */
<> 149:156823d33999 1553 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 1554 {
<> 149:156823d33999 1555 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 1556 {
<> 149:156823d33999 1557 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 1558 {
<> 149:156823d33999 1559 return HAL_ERROR;
<> 149:156823d33999 1560 }
<> 149:156823d33999 1561
<> 149:156823d33999 1562 /* Process Locked */
<> 149:156823d33999 1563 __HAL_LOCK(hi2c);
<> 149:156823d33999 1564
<> 149:156823d33999 1565 /* Check if the I2C is already enabled */
<> 149:156823d33999 1566 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 1567 {
<> 149:156823d33999 1568 /* Enable I2C peripheral */
<> 149:156823d33999 1569 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 1570 }
<> 149:156823d33999 1571
<> 149:156823d33999 1572 /* Disable Pos */
<> 149:156823d33999 1573 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 1574
<> 149:156823d33999 1575 hi2c->State = HAL_I2C_STATE_BUSY_TX;
<> 149:156823d33999 1576 hi2c->Mode = HAL_I2C_MODE_SLAVE;
<> 149:156823d33999 1577 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 1578
<> 149:156823d33999 1579 /* Prepare transfer parameters */
<> 149:156823d33999 1580 hi2c->pBuffPtr = pData;
<> 149:156823d33999 1581 hi2c->XferCount = Size;
<> 149:156823d33999 1582 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 1583 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 1584
<> 149:156823d33999 1585 /* Enable Address Acknowledge */
<> 149:156823d33999 1586 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1587
<> 149:156823d33999 1588 /* Process Unlocked */
<> 149:156823d33999 1589 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1590
<> 149:156823d33999 1591 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 1592 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 1593 process unlock */
<> 149:156823d33999 1594
<> 149:156823d33999 1595 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 1596 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 1597
<> 149:156823d33999 1598 return HAL_OK;
<> 149:156823d33999 1599 }
<> 149:156823d33999 1600 else
<> 149:156823d33999 1601 {
<> 149:156823d33999 1602 return HAL_BUSY;
<> 149:156823d33999 1603 }
<> 149:156823d33999 1604 }
<> 149:156823d33999 1605
<> 149:156823d33999 1606 /**
<> 149:156823d33999 1607 * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
<> 149:156823d33999 1608 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1609 * the configuration information for the specified I2C.
<> 149:156823d33999 1610 * @param pData Pointer to data buffer
<> 149:156823d33999 1611 * @param Size Amount of data to be sent
<> 149:156823d33999 1612 * @retval HAL status
<> 149:156823d33999 1613 */
<> 149:156823d33999 1614 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 1615 {
<> 149:156823d33999 1616 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 1617 {
<> 149:156823d33999 1618 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 1619 {
<> 149:156823d33999 1620 return HAL_ERROR;
<> 149:156823d33999 1621 }
<> 149:156823d33999 1622
<> 149:156823d33999 1623 /* Process Locked */
<> 149:156823d33999 1624 __HAL_LOCK(hi2c);
<> 149:156823d33999 1625
<> 149:156823d33999 1626 /* Check if the I2C is already enabled */
<> 149:156823d33999 1627 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 1628 {
<> 149:156823d33999 1629 /* Enable I2C peripheral */
<> 149:156823d33999 1630 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 1631 }
<> 149:156823d33999 1632
<> 149:156823d33999 1633 /* Disable Pos */
<> 149:156823d33999 1634 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 1635
<> 149:156823d33999 1636 hi2c->State = HAL_I2C_STATE_BUSY_RX;
<> 149:156823d33999 1637 hi2c->Mode = HAL_I2C_MODE_SLAVE;
<> 149:156823d33999 1638 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 1639
<> 149:156823d33999 1640 /* Prepare transfer parameters */
<> 149:156823d33999 1641 hi2c->pBuffPtr = pData;
<> 149:156823d33999 1642 hi2c->XferCount = Size;
<> 149:156823d33999 1643 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 1644 hi2c->XferSize = Size;
<> 149:156823d33999 1645
<> 149:156823d33999 1646 /* Enable Address Acknowledge */
<> 149:156823d33999 1647 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1648
<> 149:156823d33999 1649 /* Process Unlocked */
<> 149:156823d33999 1650 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1651
<> 149:156823d33999 1652 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 1653 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 1654 process unlock */
<> 149:156823d33999 1655
<> 149:156823d33999 1656 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 1657 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 1658
<> 149:156823d33999 1659 return HAL_OK;
<> 149:156823d33999 1660 }
<> 149:156823d33999 1661 else
<> 149:156823d33999 1662 {
<> 149:156823d33999 1663 return HAL_BUSY;
<> 149:156823d33999 1664 }
<> 149:156823d33999 1665 }
<> 149:156823d33999 1666
<> 149:156823d33999 1667 /**
<> 149:156823d33999 1668 * @brief Sequential transmit in slave mode an amount of data in non-blocking mode with Interrupt
<> 149:156823d33999 1669 * @note This interface allow to manage repeated start condition when a direction change during transfer
<> 149:156823d33999 1670 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1671 * the configuration information for the specified I2C.
<> 149:156823d33999 1672 * @param pData Pointer to data buffer
<> 149:156823d33999 1673 * @param Size Amount of data to be sent
<> 149:156823d33999 1674 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
<> 149:156823d33999 1675 * @retval HAL status
<> 149:156823d33999 1676 */
<> 149:156823d33999 1677 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
<> 149:156823d33999 1678 {
<> 149:156823d33999 1679 /* Check the parameters */
<> 149:156823d33999 1680 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
<> 149:156823d33999 1681
<> 149:156823d33999 1682 if(hi2c->State == HAL_I2C_STATE_LISTEN)
<> 149:156823d33999 1683 {
<> 149:156823d33999 1684 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 1685 {
<> 149:156823d33999 1686 return HAL_ERROR;
<> 149:156823d33999 1687 }
<> 149:156823d33999 1688
<> 149:156823d33999 1689 /* Process Locked */
<> 149:156823d33999 1690 __HAL_LOCK(hi2c);
<> 149:156823d33999 1691
<> 149:156823d33999 1692 /* Check if the I2C is already enabled */
<> 149:156823d33999 1693 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 1694 {
<> 149:156823d33999 1695 /* Enable I2C peripheral */
<> 149:156823d33999 1696 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 1697 }
<> 149:156823d33999 1698
<> 149:156823d33999 1699 /* Disable Pos */
<> 149:156823d33999 1700 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 1701
<> 149:156823d33999 1702 hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
<> 149:156823d33999 1703 hi2c->Mode = HAL_I2C_MODE_SLAVE;
<> 149:156823d33999 1704 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 1705
<> 149:156823d33999 1706 /* Prepare transfer parameters */
<> 149:156823d33999 1707 hi2c->pBuffPtr = pData;
<> 149:156823d33999 1708 hi2c->XferCount = Size;
<> 149:156823d33999 1709 hi2c->XferOptions = XferOptions;
<> 149:156823d33999 1710 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 1711
<> 149:156823d33999 1712 /* Clear ADDR flag */
<> 149:156823d33999 1713 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 1714
<> 149:156823d33999 1715 /* Process Unlocked */
<> 149:156823d33999 1716 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1717
<> 149:156823d33999 1718 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 1719 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 1720 process unlock */
<> 149:156823d33999 1721
<> 149:156823d33999 1722 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 1723 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 1724
<> 149:156823d33999 1725 return HAL_OK;
<> 149:156823d33999 1726 }
<> 149:156823d33999 1727 else
<> 149:156823d33999 1728 {
<> 149:156823d33999 1729 return HAL_BUSY;
<> 149:156823d33999 1730 }
<> 149:156823d33999 1731 }
<> 149:156823d33999 1732
<> 149:156823d33999 1733 /**
<> 149:156823d33999 1734 * @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
<> 149:156823d33999 1735 * @note This interface allow to manage repeated start condition when a direction change during transfer
<> 149:156823d33999 1736 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1737 * the configuration information for the specified I2C.
<> 149:156823d33999 1738 * @param pData Pointer to data buffer
<> 149:156823d33999 1739 * @param Size Amount of data to be sent
<> 149:156823d33999 1740 * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
<> 149:156823d33999 1741 * @retval HAL status
<> 149:156823d33999 1742 */
<> 149:156823d33999 1743 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
<> 149:156823d33999 1744 {
<> 149:156823d33999 1745 /* Check the parameters */
<> 149:156823d33999 1746 assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
<> 149:156823d33999 1747
<> 149:156823d33999 1748 if(hi2c->State == HAL_I2C_STATE_LISTEN)
<> 149:156823d33999 1749 {
<> 149:156823d33999 1750 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 1751 {
<> 149:156823d33999 1752 return HAL_ERROR;
<> 149:156823d33999 1753 }
<> 149:156823d33999 1754
<> 149:156823d33999 1755 /* Process Locked */
<> 149:156823d33999 1756 __HAL_LOCK(hi2c);
<> 149:156823d33999 1757
<> 149:156823d33999 1758 /* Check if the I2C is already enabled */
<> 149:156823d33999 1759 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 1760 {
<> 149:156823d33999 1761 /* Enable I2C peripheral */
<> 149:156823d33999 1762 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 1763 }
<> 149:156823d33999 1764
<> 149:156823d33999 1765 /* Disable Pos */
<> 149:156823d33999 1766 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 1767
<> 149:156823d33999 1768 hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
<> 149:156823d33999 1769 hi2c->Mode = HAL_I2C_MODE_SLAVE;
<> 149:156823d33999 1770 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 1771
<> 149:156823d33999 1772 /* Prepare transfer parameters */
<> 149:156823d33999 1773 hi2c->pBuffPtr = pData;
<> 149:156823d33999 1774 hi2c->XferCount = Size;
<> 149:156823d33999 1775 hi2c->XferOptions = XferOptions;
<> 149:156823d33999 1776 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 1777
<> 149:156823d33999 1778 /* Clear ADDR flag */
<> 149:156823d33999 1779 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 1780
<> 149:156823d33999 1781 /* Process Unlocked */
<> 149:156823d33999 1782 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1783
<> 149:156823d33999 1784 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 1785 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 1786 process unlock */
<> 149:156823d33999 1787
<> 149:156823d33999 1788 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 1789 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 1790
<> 149:156823d33999 1791 return HAL_OK;
<> 149:156823d33999 1792 }
<> 149:156823d33999 1793 else
<> 149:156823d33999 1794 {
<> 149:156823d33999 1795 return HAL_BUSY;
<> 149:156823d33999 1796 }
<> 149:156823d33999 1797 }
<> 149:156823d33999 1798
<> 149:156823d33999 1799 /**
<> 149:156823d33999 1800 * @brief Enable the Address listen mode with Interrupt.
<> 149:156823d33999 1801 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1802 * the configuration information for the specified I2C.
<> 149:156823d33999 1803 * @retval HAL status
<> 149:156823d33999 1804 */
<> 149:156823d33999 1805 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 1806 {
<> 149:156823d33999 1807 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 1808 {
<> 149:156823d33999 1809 hi2c->State = HAL_I2C_STATE_LISTEN;
<> 149:156823d33999 1810
<> 149:156823d33999 1811 /* Check if the I2C is already enabled */
<> 149:156823d33999 1812 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 1813 {
<> 149:156823d33999 1814 /* Enable I2C peripheral */
<> 149:156823d33999 1815 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 1816 }
<> 149:156823d33999 1817
<> 149:156823d33999 1818 /* Enable Address Acknowledge */
<> 149:156823d33999 1819 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1820
<> 149:156823d33999 1821 /* Enable EVT and ERR interrupt */
<> 149:156823d33999 1822 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
<> 149:156823d33999 1823
<> 149:156823d33999 1824 return HAL_OK;
<> 149:156823d33999 1825 }
<> 149:156823d33999 1826 else
<> 149:156823d33999 1827 {
<> 149:156823d33999 1828 return HAL_BUSY;
<> 149:156823d33999 1829 }
<> 149:156823d33999 1830 }
<> 149:156823d33999 1831
<> 149:156823d33999 1832 /**
<> 149:156823d33999 1833 * @brief Disable the Address listen mode with Interrupt.
<> 149:156823d33999 1834 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1835 * the configuration information for the specified I2C.
<> 149:156823d33999 1836 * @retval HAL status
<> 149:156823d33999 1837 */
<> 149:156823d33999 1838 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 1839 {
<> 149:156823d33999 1840 /* Declaration of tmp to prevent undefined behavior of volatile usage */
<> 149:156823d33999 1841 uint32_t tmp;
<> 149:156823d33999 1842
<> 149:156823d33999 1843 /* Disable Address listen mode only if a transfer is not ongoing */
<> 149:156823d33999 1844 if(hi2c->State == HAL_I2C_STATE_LISTEN)
<> 149:156823d33999 1845 {
<> 149:156823d33999 1846 tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
<> 149:156823d33999 1847 hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
<> 149:156823d33999 1848 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 1849 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 1850
<> 149:156823d33999 1851 /* Disable Address Acknowledge */
<> 149:156823d33999 1852 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1853
<> 149:156823d33999 1854 /* Disable EVT and ERR interrupt */
<> 149:156823d33999 1855 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
<> 149:156823d33999 1856
<> 149:156823d33999 1857 return HAL_OK;
<> 149:156823d33999 1858 }
<> 149:156823d33999 1859 else
<> 149:156823d33999 1860 {
<> 149:156823d33999 1861 return HAL_BUSY;
<> 149:156823d33999 1862 }
<> 149:156823d33999 1863 }
<> 149:156823d33999 1864
<> 149:156823d33999 1865 /**
<> 149:156823d33999 1866 * @brief Transmit in master mode an amount of data in non-blocking mode with DMA
<> 149:156823d33999 1867 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1868 * the configuration information for the specified I2C.
<> 149:156823d33999 1869 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 1870 * in datasheet must be shift at right before call interface
<> 149:156823d33999 1871 * @param pData Pointer to data buffer
<> 149:156823d33999 1872 * @param Size Amount of data to be sent
<> 149:156823d33999 1873 * @retval HAL status
<> 149:156823d33999 1874 */
<> 149:156823d33999 1875 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 1876 {
<> 149:156823d33999 1877 __IO uint32_t count = 0U;
<> 149:156823d33999 1878
<> 149:156823d33999 1879 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 1880 {
<> 149:156823d33999 1881 /* Wait until BUSY flag is reset */
<> 149:156823d33999 1882 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
<> 149:156823d33999 1883 do
<> 149:156823d33999 1884 {
<> 149:156823d33999 1885 if(count-- == 0U)
<> 149:156823d33999 1886 {
<> 149:156823d33999 1887 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 1888 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 1889
<> 149:156823d33999 1890 /* Process Unlocked */
<> 149:156823d33999 1891 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1892
<> 149:156823d33999 1893 return HAL_TIMEOUT;
<> 149:156823d33999 1894 }
<> 149:156823d33999 1895 }
<> 149:156823d33999 1896 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
<> 149:156823d33999 1897
<> 149:156823d33999 1898 /* Process Locked */
<> 149:156823d33999 1899 __HAL_LOCK(hi2c);
<> 149:156823d33999 1900
<> 149:156823d33999 1901 /* Check if the I2C is already enabled */
<> 149:156823d33999 1902 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 1903 {
<> 149:156823d33999 1904 /* Enable I2C peripheral */
<> 149:156823d33999 1905 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 1906 }
<> 149:156823d33999 1907
<> 149:156823d33999 1908 /* Disable Pos */
<> 149:156823d33999 1909 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 1910
<> 149:156823d33999 1911 hi2c->State = HAL_I2C_STATE_BUSY_TX;
<> 149:156823d33999 1912 hi2c->Mode = HAL_I2C_MODE_MASTER;
<> 149:156823d33999 1913 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 1914
<> 149:156823d33999 1915 /* Prepare transfer parameters */
<> 149:156823d33999 1916 hi2c->pBuffPtr = pData;
<> 149:156823d33999 1917 hi2c->XferCount = Size;
<> 149:156823d33999 1918 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 1919 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 1920 hi2c->Devaddress = DevAddress;
<> 149:156823d33999 1921
<> 149:156823d33999 1922 if(hi2c->XferSize > 0U)
<> 149:156823d33999 1923 {
<> 149:156823d33999 1924 /* Set the I2C DMA transfer complete callback */
<> 149:156823d33999 1925 hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
<> 149:156823d33999 1926
<> 149:156823d33999 1927 /* Set the DMA error callback */
<> 149:156823d33999 1928 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
<> 149:156823d33999 1929
<> 149:156823d33999 1930 /* Set the unused DMA callbacks to NULL */
<> 149:156823d33999 1931 hi2c->hdmatx->XferHalfCpltCallback = NULL;
<> 149:156823d33999 1932 hi2c->hdmatx->XferAbortCallback = NULL;
<> 149:156823d33999 1933
<> 149:156823d33999 1934 /* Enable the DMA Channel */
<> 149:156823d33999 1935 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
<> 149:156823d33999 1936
<> 149:156823d33999 1937 /* Enable Acknowledge */
<> 149:156823d33999 1938 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1939
<> 149:156823d33999 1940 /* Generate Start */
<> 149:156823d33999 1941 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 1942
<> 149:156823d33999 1943 /* Process Unlocked */
<> 149:156823d33999 1944 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1945
<> 149:156823d33999 1946 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 1947 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 1948 process unlock */
<> 149:156823d33999 1949
<> 149:156823d33999 1950 /* Enable EVT and ERR interrupt */
<> 149:156823d33999 1951 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
<> 149:156823d33999 1952
<> 149:156823d33999 1953 /* Enable DMA Request */
<> 149:156823d33999 1954 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
<> 149:156823d33999 1955 }
<> 149:156823d33999 1956 else
<> 149:156823d33999 1957 {
<> 149:156823d33999 1958 /* Enable Acknowledge */
<> 149:156823d33999 1959 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 1960
<> 149:156823d33999 1961 /* Generate Start */
<> 149:156823d33999 1962 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 1963
<> 149:156823d33999 1964 /* Process Unlocked */
<> 149:156823d33999 1965 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 1966
<> 149:156823d33999 1967 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 1968 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 1969 process unlock */
<> 149:156823d33999 1970
<> 149:156823d33999 1971 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 1972 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 1973 }
<> 149:156823d33999 1974
<> 149:156823d33999 1975 return HAL_OK;
<> 149:156823d33999 1976 }
<> 149:156823d33999 1977 else
<> 149:156823d33999 1978 {
<> 149:156823d33999 1979 return HAL_BUSY;
<> 149:156823d33999 1980 }
<> 149:156823d33999 1981 }
<> 149:156823d33999 1982
<> 149:156823d33999 1983 /**
<> 149:156823d33999 1984 * @brief Receive in master mode an amount of data in non-blocking mode with DMA
<> 149:156823d33999 1985 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 1986 * the configuration information for the specified I2C.
<> 149:156823d33999 1987 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 1988 * in datasheet must be shift at right before call interface
<> 149:156823d33999 1989 * @param pData Pointer to data buffer
<> 149:156823d33999 1990 * @param Size Amount of data to be sent
<> 149:156823d33999 1991 * @retval HAL status
<> 149:156823d33999 1992 */
<> 149:156823d33999 1993 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 1994 {
<> 149:156823d33999 1995 __IO uint32_t count = 0U;
<> 149:156823d33999 1996
<> 149:156823d33999 1997 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 1998 {
<> 149:156823d33999 1999 /* Wait until BUSY flag is reset */
<> 149:156823d33999 2000 count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
<> 149:156823d33999 2001 do
<> 149:156823d33999 2002 {
<> 149:156823d33999 2003 if(count-- == 0U)
<> 149:156823d33999 2004 {
<> 149:156823d33999 2005 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 2006 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 2007
<> 149:156823d33999 2008 /* Process Unlocked */
<> 149:156823d33999 2009 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2010
<> 149:156823d33999 2011 return HAL_TIMEOUT;
<> 149:156823d33999 2012 }
<> 149:156823d33999 2013 }
<> 149:156823d33999 2014 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
<> 149:156823d33999 2015
<> 149:156823d33999 2016 /* Process Locked */
<> 149:156823d33999 2017 __HAL_LOCK(hi2c);
<> 149:156823d33999 2018
<> 149:156823d33999 2019 /* Check if the I2C is already enabled */
<> 149:156823d33999 2020 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 2021 {
<> 149:156823d33999 2022 /* Enable I2C peripheral */
<> 149:156823d33999 2023 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 2024 }
<> 149:156823d33999 2025
<> 149:156823d33999 2026 /* Disable Pos */
<> 149:156823d33999 2027 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 2028
<> 149:156823d33999 2029 hi2c->State = HAL_I2C_STATE_BUSY_RX;
<> 149:156823d33999 2030 hi2c->Mode = HAL_I2C_MODE_MASTER;
<> 149:156823d33999 2031 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 2032
<> 149:156823d33999 2033 /* Prepare transfer parameters */
<> 149:156823d33999 2034 hi2c->pBuffPtr = pData;
<> 149:156823d33999 2035 hi2c->XferCount = Size;
<> 149:156823d33999 2036 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 2037 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 2038 hi2c->Devaddress = DevAddress;
<> 149:156823d33999 2039
<> 149:156823d33999 2040 if(hi2c->XferSize > 0U)
<> 149:156823d33999 2041 {
<> 149:156823d33999 2042 /* Set the I2C DMA transfer complete callback */
<> 149:156823d33999 2043 hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
<> 149:156823d33999 2044
<> 149:156823d33999 2045 /* Set the DMA error callback */
<> 149:156823d33999 2046 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
<> 149:156823d33999 2047
<> 149:156823d33999 2048 /* Set the unused DMA callbacks to NULL */
<> 149:156823d33999 2049 hi2c->hdmarx->XferHalfCpltCallback = NULL;
<> 149:156823d33999 2050 hi2c->hdmarx->XferAbortCallback = NULL;
<> 149:156823d33999 2051
<> 149:156823d33999 2052 /* Enable the DMA Channel */
<> 149:156823d33999 2053 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
<> 149:156823d33999 2054
<> 149:156823d33999 2055 /* Enable Acknowledge */
<> 149:156823d33999 2056 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 2057
<> 149:156823d33999 2058 /* Generate Start */
<> 149:156823d33999 2059 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 2060
<> 149:156823d33999 2061 /* Process Unlocked */
<> 149:156823d33999 2062 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2063
<> 149:156823d33999 2064 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 2065 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 2066 process unlock */
<> 149:156823d33999 2067
<> 149:156823d33999 2068 /* Enable EVT and ERR interrupt */
<> 149:156823d33999 2069 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
<> 149:156823d33999 2070
<> 149:156823d33999 2071 /* Enable DMA Request */
<> 149:156823d33999 2072 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
<> 149:156823d33999 2073 }
<> 149:156823d33999 2074 else
<> 149:156823d33999 2075 {
<> 149:156823d33999 2076 /* Enable Acknowledge */
<> 149:156823d33999 2077 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 2078
<> 149:156823d33999 2079 /* Generate Start */
<> 149:156823d33999 2080 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 2081
<> 149:156823d33999 2082 /* Process Unlocked */
<> 149:156823d33999 2083 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2084
<> 149:156823d33999 2085 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 2086 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 2087 process unlock */
<> 149:156823d33999 2088
<> 149:156823d33999 2089 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 2090 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 2091 }
<> 149:156823d33999 2092
<> 149:156823d33999 2093 return HAL_OK;
<> 149:156823d33999 2094 }
<> 149:156823d33999 2095 else
<> 149:156823d33999 2096 {
<> 149:156823d33999 2097 return HAL_BUSY;
<> 149:156823d33999 2098 }
<> 149:156823d33999 2099 }
<> 149:156823d33999 2100
<> 149:156823d33999 2101 /**
<> 149:156823d33999 2102 * @brief Abort a master I2C process communication with Interrupt.
<> 149:156823d33999 2103 * @note This abort can be called only if state is ready
<> 149:156823d33999 2104 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 2105 * the configuration information for the specified I2C.
<> 149:156823d33999 2106 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 2107 * in datasheet must be shift at right before call interface
<> 149:156823d33999 2108 * @retval HAL status
<> 149:156823d33999 2109 */
<> 149:156823d33999 2110 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
<> 149:156823d33999 2111 {
<> 149:156823d33999 2112 /* Abort Master transfer during Receive or Transmit process */
<> 149:156823d33999 2113 if(hi2c->Mode == HAL_I2C_MODE_MASTER)
<> 149:156823d33999 2114 {
<> 149:156823d33999 2115 /* Process Locked */
<> 149:156823d33999 2116 __HAL_LOCK(hi2c);
<> 149:156823d33999 2117
<> 149:156823d33999 2118 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 2119 hi2c->State = HAL_I2C_STATE_ABORT;
<> 149:156823d33999 2120
<> 149:156823d33999 2121 /* Disable Acknowledge */
<> 149:156823d33999 2122 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 2123
<> 149:156823d33999 2124 /* Generate Stop */
<> 149:156823d33999 2125 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 2126
<> 149:156823d33999 2127 hi2c->XferCount = 0U;
<> 149:156823d33999 2128
<> 149:156823d33999 2129 /* Disable EVT, BUF and ERR interrupt */
<> 149:156823d33999 2130 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 2131
<> 149:156823d33999 2132 /* Process Unlocked */
<> 149:156823d33999 2133 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2134
<> 149:156823d33999 2135 /* Call the corresponding callback to inform upper layer of End of Transfer */
<> 149:156823d33999 2136 I2C_ITError(hi2c);
<> 149:156823d33999 2137
<> 149:156823d33999 2138 return HAL_OK;
<> 149:156823d33999 2139 }
<> 149:156823d33999 2140 else
<> 149:156823d33999 2141 {
<> 149:156823d33999 2142 /* Wrong usage of abort function */
<> 149:156823d33999 2143 /* This function should be used only in case of abort monitored by master device */
<> 149:156823d33999 2144 return HAL_ERROR;
<> 149:156823d33999 2145 }
<> 149:156823d33999 2146 }
<> 149:156823d33999 2147
<> 149:156823d33999 2148 /**
<> 149:156823d33999 2149 * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
<> 149:156823d33999 2150 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 2151 * the configuration information for the specified I2C.
<> 149:156823d33999 2152 * @param pData Pointer to data buffer
<> 149:156823d33999 2153 * @param Size Amount of data to be sent
<> 149:156823d33999 2154 * @retval HAL status
<> 149:156823d33999 2155 */
<> 149:156823d33999 2156 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 2157 {
<> 149:156823d33999 2158 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 2159 {
<> 149:156823d33999 2160 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 2161 {
<> 149:156823d33999 2162 return HAL_ERROR;
<> 149:156823d33999 2163 }
<> 149:156823d33999 2164
<> 149:156823d33999 2165 /* Process Locked */
<> 149:156823d33999 2166 __HAL_LOCK(hi2c);
<> 149:156823d33999 2167
<> 149:156823d33999 2168 /* Check if the I2C is already enabled */
<> 149:156823d33999 2169 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 2170 {
<> 149:156823d33999 2171 /* Enable I2C peripheral */
<> 149:156823d33999 2172 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 2173 }
<> 149:156823d33999 2174
<> 149:156823d33999 2175 /* Disable Pos */
<> 149:156823d33999 2176 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 2177
<> 149:156823d33999 2178 hi2c->State = HAL_I2C_STATE_BUSY_TX;
<> 149:156823d33999 2179 hi2c->Mode = HAL_I2C_MODE_SLAVE;
<> 149:156823d33999 2180 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 2181
<> 149:156823d33999 2182 /* Prepare transfer parameters */
<> 149:156823d33999 2183 hi2c->pBuffPtr = pData;
<> 149:156823d33999 2184 hi2c->XferCount = Size;
<> 149:156823d33999 2185 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 2186 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 2187
<> 149:156823d33999 2188 /* Set the I2C DMA transfer complete callback */
<> 149:156823d33999 2189 hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
<> 149:156823d33999 2190
<> 149:156823d33999 2191 /* Set the DMA error callback */
<> 149:156823d33999 2192 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
<> 149:156823d33999 2193
<> 149:156823d33999 2194 /* Set the unused DMA callbacks to NULL */
<> 149:156823d33999 2195 hi2c->hdmatx->XferHalfCpltCallback = NULL;
<> 149:156823d33999 2196 hi2c->hdmatx->XferAbortCallback = NULL;
<> 149:156823d33999 2197
<> 149:156823d33999 2198 /* Enable the DMA Channel */
<> 149:156823d33999 2199 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
<> 149:156823d33999 2200
<> 149:156823d33999 2201 /* Enable Address Acknowledge */
<> 149:156823d33999 2202 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 2203
<> 149:156823d33999 2204 /* Process Unlocked */
<> 149:156823d33999 2205 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2206
<> 149:156823d33999 2207 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 2208 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 2209 process unlock */
<> 149:156823d33999 2210 /* Enable EVT and ERR interrupt */
<> 149:156823d33999 2211 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
<> 149:156823d33999 2212
<> 149:156823d33999 2213 /* Enable DMA Request */
<> 149:156823d33999 2214 hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
<> 149:156823d33999 2215
<> 149:156823d33999 2216 return HAL_OK;
<> 149:156823d33999 2217 }
<> 149:156823d33999 2218 else
<> 149:156823d33999 2219 {
<> 149:156823d33999 2220 return HAL_BUSY;
<> 149:156823d33999 2221 }
<> 149:156823d33999 2222 }
<> 149:156823d33999 2223
<> 149:156823d33999 2224 /**
<> 149:156823d33999 2225 * @brief Receive in slave mode an amount of data in non-blocking mode with DMA
<> 149:156823d33999 2226 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 2227 * the configuration information for the specified I2C.
<> 149:156823d33999 2228 * @param pData Pointer to data buffer
<> 149:156823d33999 2229 * @param Size Amount of data to be sent
<> 149:156823d33999 2230 * @retval HAL status
<> 149:156823d33999 2231 */
<> 149:156823d33999 2232 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 2233 {
<> 149:156823d33999 2234 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 2235 {
<> 149:156823d33999 2236 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 2237 {
<> 149:156823d33999 2238 return HAL_ERROR;
<> 149:156823d33999 2239 }
<> 149:156823d33999 2240
<> 149:156823d33999 2241 /* Process Locked */
<> 149:156823d33999 2242 __HAL_LOCK(hi2c);
<> 149:156823d33999 2243
<> 149:156823d33999 2244 /* Check if the I2C is already enabled */
<> 149:156823d33999 2245 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 2246 {
<> 149:156823d33999 2247 /* Enable I2C peripheral */
<> 149:156823d33999 2248 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 2249 }
<> 149:156823d33999 2250
<> 149:156823d33999 2251 /* Disable Pos */
<> 149:156823d33999 2252 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 2253
<> 149:156823d33999 2254 hi2c->State = HAL_I2C_STATE_BUSY_RX;
<> 149:156823d33999 2255 hi2c->Mode = HAL_I2C_MODE_SLAVE;
<> 149:156823d33999 2256 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 2257
<> 149:156823d33999 2258 /* Prepare transfer parameters */
<> 149:156823d33999 2259 hi2c->pBuffPtr = pData;
<> 149:156823d33999 2260 hi2c->XferCount = Size;
<> 149:156823d33999 2261 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 2262 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 2263
<> 149:156823d33999 2264 /* Set the I2C DMA transfer complete callback */
<> 149:156823d33999 2265 hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
<> 149:156823d33999 2266
<> 149:156823d33999 2267 /* Set the DMA error callback */
<> 149:156823d33999 2268 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
<> 149:156823d33999 2269
<> 149:156823d33999 2270 /* Set the unused DMA callbacks to NULL */
<> 149:156823d33999 2271 hi2c->hdmarx->XferHalfCpltCallback = NULL;
<> 149:156823d33999 2272 hi2c->hdmarx->XferAbortCallback = NULL;
<> 149:156823d33999 2273
<> 149:156823d33999 2274 /* Enable the DMA Channel */
<> 149:156823d33999 2275 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
<> 149:156823d33999 2276
<> 149:156823d33999 2277 /* Enable Address Acknowledge */
<> 149:156823d33999 2278 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 2279
<> 149:156823d33999 2280 /* Process Unlocked */
<> 149:156823d33999 2281 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2282
<> 149:156823d33999 2283 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 2284 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 2285 process unlock */
<> 149:156823d33999 2286 /* Enable EVT and ERR interrupt */
<> 149:156823d33999 2287 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
<> 149:156823d33999 2288
<> 149:156823d33999 2289 /* Enable DMA Request */
<> 149:156823d33999 2290 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
<> 149:156823d33999 2291
<> 149:156823d33999 2292 return HAL_OK;
<> 149:156823d33999 2293 }
<> 149:156823d33999 2294 else
<> 149:156823d33999 2295 {
<> 149:156823d33999 2296 return HAL_BUSY;
<> 149:156823d33999 2297 }
<> 149:156823d33999 2298 }
<> 149:156823d33999 2299 /**
<> 149:156823d33999 2300 * @brief Write an amount of data in blocking mode to a specific memory address
<> 149:156823d33999 2301 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 2302 * the configuration information for the specified I2C.
<> 149:156823d33999 2303 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 2304 * in datasheet must be shift at right before call interface
<> 149:156823d33999 2305 * @param MemAddress Internal memory address
<> 149:156823d33999 2306 * @param MemAddSize Size of internal memory address
<> 149:156823d33999 2307 * @param pData Pointer to data buffer
<> 149:156823d33999 2308 * @param Size Amount of data to be sent
<> 149:156823d33999 2309 * @param Timeout Timeout duration
<> 149:156823d33999 2310 * @retval HAL status
<> 149:156823d33999 2311 */
<> 149:156823d33999 2312 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 149:156823d33999 2313 {
<> 149:156823d33999 2314 uint32_t tickstart = 0x00U;
<> 149:156823d33999 2315
<> 149:156823d33999 2316 /* Init tickstart for timeout management*/
<> 149:156823d33999 2317 tickstart = HAL_GetTick();
<> 149:156823d33999 2318
<> 149:156823d33999 2319 /* Check the parameters */
<> 149:156823d33999 2320 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
<> 149:156823d33999 2321
<> 149:156823d33999 2322 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 2323 {
<> 149:156823d33999 2324 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 2325 {
<> 149:156823d33999 2326 return HAL_ERROR;
<> 149:156823d33999 2327 }
<> 149:156823d33999 2328
<> 149:156823d33999 2329 /* Wait until BUSY flag is reset */
<> 149:156823d33999 2330 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 2331 {
<> 149:156823d33999 2332 return HAL_BUSY;
<> 149:156823d33999 2333 }
<> 149:156823d33999 2334
<> 149:156823d33999 2335 /* Process Locked */
<> 149:156823d33999 2336 __HAL_LOCK(hi2c);
<> 149:156823d33999 2337
<> 149:156823d33999 2338 /* Check if the I2C is already enabled */
<> 149:156823d33999 2339 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 2340 {
<> 149:156823d33999 2341 /* Enable I2C peripheral */
<> 149:156823d33999 2342 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 2343 }
<> 149:156823d33999 2344
<> 149:156823d33999 2345 /* Disable Pos */
<> 149:156823d33999 2346 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 2347
<> 149:156823d33999 2348 hi2c->State = HAL_I2C_STATE_BUSY_TX;
<> 149:156823d33999 2349 hi2c->Mode = HAL_I2C_MODE_MEM;
<> 149:156823d33999 2350 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 2351
<> 149:156823d33999 2352 /* Prepare transfer parameters */
<> 149:156823d33999 2353 hi2c->pBuffPtr = pData;
<> 149:156823d33999 2354 hi2c->XferCount = Size;
<> 149:156823d33999 2355 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 2356 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 2357
<> 149:156823d33999 2358 /* Send Slave Address and Memory Address */
<> 149:156823d33999 2359 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 2360 {
<> 149:156823d33999 2361 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 2362 {
<> 149:156823d33999 2363 /* Process Unlocked */
<> 149:156823d33999 2364 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2365 return HAL_ERROR;
<> 149:156823d33999 2366 }
<> 149:156823d33999 2367 else
<> 149:156823d33999 2368 {
<> 149:156823d33999 2369 /* Process Unlocked */
<> 149:156823d33999 2370 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2371 return HAL_TIMEOUT;
<> 149:156823d33999 2372 }
<> 149:156823d33999 2373 }
<> 149:156823d33999 2374
<> 149:156823d33999 2375 while(hi2c->XferSize > 0U)
<> 149:156823d33999 2376 {
<> 149:156823d33999 2377 /* Wait until TXE flag is set */
<> 149:156823d33999 2378 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 2379 {
<> 149:156823d33999 2380 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 2381 {
<> 149:156823d33999 2382 /* Generate Stop */
<> 149:156823d33999 2383 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 2384 return HAL_ERROR;
<> 149:156823d33999 2385 }
<> 149:156823d33999 2386 else
<> 149:156823d33999 2387 {
<> 149:156823d33999 2388 return HAL_TIMEOUT;
<> 149:156823d33999 2389 }
<> 149:156823d33999 2390 }
<> 149:156823d33999 2391
<> 149:156823d33999 2392 /* Write data to DR */
<> 149:156823d33999 2393 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
<> 149:156823d33999 2394 hi2c->XferSize--;
<> 149:156823d33999 2395 hi2c->XferCount--;
<> 149:156823d33999 2396
<> 149:156823d33999 2397 if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
<> 149:156823d33999 2398 {
<> 149:156823d33999 2399 /* Write data to DR */
<> 149:156823d33999 2400 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
<> 149:156823d33999 2401 hi2c->XferSize--;
<> 149:156823d33999 2402 hi2c->XferCount--;
<> 149:156823d33999 2403 }
<> 149:156823d33999 2404 }
<> 149:156823d33999 2405
<> 149:156823d33999 2406 /* Wait until BTF flag is set */
<> 149:156823d33999 2407 if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 2408 {
<> 149:156823d33999 2409 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 2410 {
<> 149:156823d33999 2411 /* Generate Stop */
<> 149:156823d33999 2412 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 2413 return HAL_ERROR;
<> 149:156823d33999 2414 }
<> 149:156823d33999 2415 else
<> 149:156823d33999 2416 {
<> 149:156823d33999 2417 return HAL_TIMEOUT;
<> 149:156823d33999 2418 }
<> 149:156823d33999 2419 }
<> 149:156823d33999 2420
<> 149:156823d33999 2421 /* Generate Stop */
<> 149:156823d33999 2422 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
<> 149:156823d33999 2423
<> 149:156823d33999 2424 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 2425 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 2426
<> 149:156823d33999 2427 /* Process Unlocked */
<> 149:156823d33999 2428 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2429
<> 149:156823d33999 2430 return HAL_OK;
<> 149:156823d33999 2431 }
<> 149:156823d33999 2432 else
<> 149:156823d33999 2433 {
<> 149:156823d33999 2434 return HAL_BUSY;
<> 149:156823d33999 2435 }
<> 149:156823d33999 2436 }
<> 149:156823d33999 2437
<> 149:156823d33999 2438 /**
<> 149:156823d33999 2439 * @brief Read an amount of data in blocking mode from a specific memory address
<> 149:156823d33999 2440 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 2441 * the configuration information for the specified I2C.
<> 149:156823d33999 2442 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 2443 * in datasheet must be shift at right before call interface
<> 149:156823d33999 2444 * @param MemAddress Internal memory address
<> 149:156823d33999 2445 * @param MemAddSize Size of internal memory address
<> 149:156823d33999 2446 * @param pData Pointer to data buffer
<> 149:156823d33999 2447 * @param Size Amount of data to be sent
<> 149:156823d33999 2448 * @param Timeout Timeout duration
<> 149:156823d33999 2449 * @retval HAL status
<> 149:156823d33999 2450 */
<> 149:156823d33999 2451 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 149:156823d33999 2452 {
<> 149:156823d33999 2453 uint32_t tickstart = 0x00U;
<> 149:156823d33999 2454
<> 149:156823d33999 2455 /* Init tickstart for timeout management*/
<> 149:156823d33999 2456 tickstart = HAL_GetTick();
<> 149:156823d33999 2457
<> 149:156823d33999 2458 /* Check the parameters */
<> 149:156823d33999 2459 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
<> 149:156823d33999 2460
<> 149:156823d33999 2461 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 2462 {
<> 149:156823d33999 2463 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 2464 {
<> 149:156823d33999 2465 return HAL_ERROR;
<> 149:156823d33999 2466 }
<> 149:156823d33999 2467
<> 149:156823d33999 2468 /* Wait until BUSY flag is reset */
<> 149:156823d33999 2469 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 2470 {
<> 149:156823d33999 2471 return HAL_BUSY;
<> 149:156823d33999 2472 }
<> 149:156823d33999 2473
<> 149:156823d33999 2474 /* Process Locked */
<> 149:156823d33999 2475 __HAL_LOCK(hi2c);
<> 149:156823d33999 2476
<> 149:156823d33999 2477 /* Check if the I2C is already enabled */
<> 149:156823d33999 2478 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 2479 {
<> 149:156823d33999 2480 /* Enable I2C peripheral */
<> 149:156823d33999 2481 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 2482 }
<> 149:156823d33999 2483
<> 149:156823d33999 2484 /* Disable Pos */
<> 149:156823d33999 2485 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 2486
<> 149:156823d33999 2487 hi2c->State = HAL_I2C_STATE_BUSY_RX;
<> 149:156823d33999 2488 hi2c->Mode = HAL_I2C_MODE_MEM;
<> 149:156823d33999 2489 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 2490
<> 149:156823d33999 2491 /* Prepare transfer parameters */
<> 149:156823d33999 2492 hi2c->pBuffPtr = pData;
<> 149:156823d33999 2493 hi2c->XferCount = Size;
<> 149:156823d33999 2494 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 2495 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 2496
<> 149:156823d33999 2497 /* Send Slave Address and Memory Address */
<> 149:156823d33999 2498 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 2499 {
<> 149:156823d33999 2500 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 2501 {
<> 149:156823d33999 2502 /* Process Unlocked */
<> 149:156823d33999 2503 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2504 return HAL_ERROR;
<> 149:156823d33999 2505 }
<> 149:156823d33999 2506 else
<> 149:156823d33999 2507 {
<> 149:156823d33999 2508 /* Process Unlocked */
<> 149:156823d33999 2509 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2510 return HAL_TIMEOUT;
<> 149:156823d33999 2511 }
<> 149:156823d33999 2512 }
<> 149:156823d33999 2513
<> 149:156823d33999 2514 if(hi2c->XferSize == 1U)
<> 149:156823d33999 2515 {
<> 149:156823d33999 2516 /* Disable Acknowledge */
<> 149:156823d33999 2517 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 2518
<> 149:156823d33999 2519 /* Clear ADDR flag */
<> 149:156823d33999 2520 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 2521
<> 149:156823d33999 2522 /* Generate Stop */
<> 149:156823d33999 2523 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 2524 }
<> 149:156823d33999 2525 else if(hi2c->XferSize == 2U)
<> 149:156823d33999 2526 {
<> 149:156823d33999 2527 /* Disable Acknowledge */
<> 149:156823d33999 2528 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 2529
<> 149:156823d33999 2530 /* Enable Pos */
<> 149:156823d33999 2531 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 2532
<> 149:156823d33999 2533 /* Clear ADDR flag */
<> 149:156823d33999 2534 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 2535 }
<> 149:156823d33999 2536 else
<> 149:156823d33999 2537 {
<> 149:156823d33999 2538 /* Clear ADDR flag */
<> 149:156823d33999 2539 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 2540 }
<> 149:156823d33999 2541
<> 149:156823d33999 2542 while(hi2c->XferSize > 0U)
<> 149:156823d33999 2543 {
<> 149:156823d33999 2544 if(hi2c->XferSize <= 3U)
<> 149:156823d33999 2545 {
<> 149:156823d33999 2546 /* One byte */
<> 149:156823d33999 2547 if(hi2c->XferSize== 1U)
<> 149:156823d33999 2548 {
<> 149:156823d33999 2549 /* Wait until RXNE flag is set */
<> 149:156823d33999 2550 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 2551 {
<> 149:156823d33999 2552 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
<> 149:156823d33999 2553 {
<> 149:156823d33999 2554 return HAL_TIMEOUT;
<> 149:156823d33999 2555 }
<> 149:156823d33999 2556 else
<> 149:156823d33999 2557 {
<> 149:156823d33999 2558 return HAL_ERROR;
<> 149:156823d33999 2559 }
<> 149:156823d33999 2560 }
<> 149:156823d33999 2561
<> 149:156823d33999 2562 /* Read data from DR */
<> 149:156823d33999 2563 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 2564 hi2c->XferSize--;
<> 149:156823d33999 2565 hi2c->XferCount--;
<> 149:156823d33999 2566 }
<> 149:156823d33999 2567 /* Two bytes */
<> 149:156823d33999 2568 else if(Size == 2U)
<> 149:156823d33999 2569 {
<> 149:156823d33999 2570 /* Wait until BTF flag is set */
<> 149:156823d33999 2571 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 2572 {
<> 149:156823d33999 2573 return HAL_TIMEOUT;
<> 149:156823d33999 2574 }
<> 149:156823d33999 2575
<> 149:156823d33999 2576 /* Generate Stop */
<> 149:156823d33999 2577 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 2578
<> 149:156823d33999 2579 /* Read data from DR */
<> 149:156823d33999 2580 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 2581 hi2c->XferSize--;
<> 149:156823d33999 2582 hi2c->XferCount--;
<> 149:156823d33999 2583
<> 149:156823d33999 2584 /* Read data from DR */
<> 149:156823d33999 2585 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 2586 hi2c->XferSize--;
<> 149:156823d33999 2587 hi2c->XferCount--;
<> 149:156823d33999 2588 }
<> 149:156823d33999 2589 /* 3 Last bytes */
<> 149:156823d33999 2590 else
<> 149:156823d33999 2591 {
<> 149:156823d33999 2592 /* Wait until BTF flag is set */
<> 149:156823d33999 2593 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 2594 {
<> 149:156823d33999 2595 return HAL_TIMEOUT;
<> 149:156823d33999 2596 }
<> 149:156823d33999 2597
<> 149:156823d33999 2598 /* Disable Acknowledge */
<> 149:156823d33999 2599 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 2600
<> 149:156823d33999 2601 /* Read data from DR */
<> 149:156823d33999 2602 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 2603 hi2c->XferSize--;
<> 149:156823d33999 2604 hi2c->XferCount--;
<> 149:156823d33999 2605
<> 149:156823d33999 2606 /* Wait until BTF flag is set */
<> 149:156823d33999 2607 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 2608 {
<> 149:156823d33999 2609 return HAL_TIMEOUT;
<> 149:156823d33999 2610 }
<> 149:156823d33999 2611
<> 149:156823d33999 2612 /* Generate Stop */
<> 149:156823d33999 2613 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 2614
<> 149:156823d33999 2615 /* Read data from DR */
<> 149:156823d33999 2616 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 2617 hi2c->XferSize--;
<> 149:156823d33999 2618 hi2c->XferCount--;
<> 149:156823d33999 2619
<> 149:156823d33999 2620 /* Read data from DR */
<> 149:156823d33999 2621 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 2622 hi2c->XferSize--;
<> 149:156823d33999 2623 hi2c->XferCount--;
<> 149:156823d33999 2624 }
<> 149:156823d33999 2625 }
<> 149:156823d33999 2626 else
<> 149:156823d33999 2627 {
<> 149:156823d33999 2628 /* Wait until RXNE flag is set */
<> 149:156823d33999 2629 if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 2630 {
<> 149:156823d33999 2631 if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
<> 149:156823d33999 2632 {
<> 149:156823d33999 2633 return HAL_TIMEOUT;
<> 149:156823d33999 2634 }
<> 149:156823d33999 2635 else
<> 149:156823d33999 2636 {
<> 149:156823d33999 2637 return HAL_ERROR;
<> 149:156823d33999 2638 }
<> 149:156823d33999 2639 }
<> 149:156823d33999 2640
<> 149:156823d33999 2641 /* Read data from DR */
<> 149:156823d33999 2642 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 2643 hi2c->XferSize--;
<> 149:156823d33999 2644 hi2c->XferCount--;
<> 149:156823d33999 2645
<> 149:156823d33999 2646 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
<> 149:156823d33999 2647 {
<> 149:156823d33999 2648 /* Read data from DR */
<> 149:156823d33999 2649 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 2650 hi2c->XferSize--;
<> 149:156823d33999 2651 hi2c->XferCount--;
<> 149:156823d33999 2652 }
<> 149:156823d33999 2653 }
<> 149:156823d33999 2654 }
<> 149:156823d33999 2655
<> 149:156823d33999 2656 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 2657 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 2658
<> 149:156823d33999 2659 /* Process Unlocked */
<> 149:156823d33999 2660 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2661
<> 149:156823d33999 2662 return HAL_OK;
<> 149:156823d33999 2663 }
<> 149:156823d33999 2664 else
<> 149:156823d33999 2665 {
<> 149:156823d33999 2666 return HAL_BUSY;
<> 149:156823d33999 2667 }
<> 149:156823d33999 2668 }
<> 149:156823d33999 2669
<> 149:156823d33999 2670 /**
<> 149:156823d33999 2671 * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
<> 149:156823d33999 2672 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 2673 * the configuration information for the specified I2C.
<> 149:156823d33999 2674 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 2675 * in datasheet must be shift at right before call interface
<> 149:156823d33999 2676 * @param MemAddress Internal memory address
<> 149:156823d33999 2677 * @param MemAddSize Size of internal memory address
<> 149:156823d33999 2678 * @param pData Pointer to data buffer
<> 149:156823d33999 2679 * @param Size Amount of data to be sent
<> 149:156823d33999 2680 * @retval HAL status
<> 149:156823d33999 2681 */
<> 149:156823d33999 2682 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 2683 {
<> 149:156823d33999 2684 uint32_t tickstart = 0x00U;
<> 149:156823d33999 2685
<> 149:156823d33999 2686 /* Init tickstart for timeout management*/
<> 149:156823d33999 2687 tickstart = HAL_GetTick();
<> 149:156823d33999 2688
<> 149:156823d33999 2689 /* Check the parameters */
<> 149:156823d33999 2690 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
<> 149:156823d33999 2691
<> 149:156823d33999 2692 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 2693 {
<> 149:156823d33999 2694 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 2695 {
<> 149:156823d33999 2696 return HAL_ERROR;
<> 149:156823d33999 2697 }
<> 149:156823d33999 2698
<> 149:156823d33999 2699 /* Wait until BUSY flag is reset */
<> 149:156823d33999 2700 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 2701 {
<> 149:156823d33999 2702 return HAL_BUSY;
<> 149:156823d33999 2703 }
<> 149:156823d33999 2704
<> 149:156823d33999 2705 /* Process Locked */
<> 149:156823d33999 2706 __HAL_LOCK(hi2c);
<> 149:156823d33999 2707
<> 149:156823d33999 2708 /* Check if the I2C is already enabled */
<> 149:156823d33999 2709 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 2710 {
<> 149:156823d33999 2711 /* Enable I2C peripheral */
<> 149:156823d33999 2712 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 2713 }
<> 149:156823d33999 2714
<> 149:156823d33999 2715 /* Disable Pos */
<> 149:156823d33999 2716 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 2717
<> 149:156823d33999 2718 hi2c->State = HAL_I2C_STATE_BUSY_TX;
<> 149:156823d33999 2719 hi2c->Mode = HAL_I2C_MODE_MEM;
<> 149:156823d33999 2720 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 2721
<> 149:156823d33999 2722 /* Prepare transfer parameters */
<> 149:156823d33999 2723 hi2c->pBuffPtr = pData;
<> 149:156823d33999 2724 hi2c->XferCount = Size;
<> 149:156823d33999 2725 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 2726 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 2727
<> 149:156823d33999 2728 /* Send Slave Address and Memory Address */
<> 149:156823d33999 2729 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 2730 {
<> 149:156823d33999 2731 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 2732 {
<> 149:156823d33999 2733 /* Process Unlocked */
<> 149:156823d33999 2734 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2735 return HAL_ERROR;
<> 149:156823d33999 2736 }
<> 149:156823d33999 2737 else
<> 149:156823d33999 2738 {
<> 149:156823d33999 2739 /* Process Unlocked */
<> 149:156823d33999 2740 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2741 return HAL_TIMEOUT;
<> 149:156823d33999 2742 }
<> 149:156823d33999 2743 }
<> 149:156823d33999 2744
<> 149:156823d33999 2745 /* Process Unlocked */
<> 149:156823d33999 2746 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2747
<> 149:156823d33999 2748 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 2749 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 2750 process unlock */
<> 149:156823d33999 2751
<> 149:156823d33999 2752 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 2753 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 2754
<> 149:156823d33999 2755 return HAL_OK;
<> 149:156823d33999 2756 }
<> 149:156823d33999 2757 else
<> 149:156823d33999 2758 {
<> 149:156823d33999 2759 return HAL_BUSY;
<> 149:156823d33999 2760 }
<> 149:156823d33999 2761 }
<> 149:156823d33999 2762
<> 149:156823d33999 2763 /**
<> 149:156823d33999 2764 * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
<> 149:156823d33999 2765 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 2766 * the configuration information for the specified I2C.
<> 149:156823d33999 2767 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 2768 * in datasheet must be shift at right before call interface
<> 149:156823d33999 2769 * @param MemAddress Internal memory address
<> 149:156823d33999 2770 * @param MemAddSize Size of internal memory address
<> 149:156823d33999 2771 * @param pData Pointer to data buffer
<> 149:156823d33999 2772 * @param Size Amount of data to be sent
<> 149:156823d33999 2773 * @retval HAL status
<> 149:156823d33999 2774 */
<> 149:156823d33999 2775 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 2776 {
<> 149:156823d33999 2777 uint32_t tickstart = 0x00U;
<> 149:156823d33999 2778
<> 149:156823d33999 2779 /* Init tickstart for timeout management*/
<> 149:156823d33999 2780 tickstart = HAL_GetTick();
<> 149:156823d33999 2781
<> 149:156823d33999 2782 /* Check the parameters */
<> 149:156823d33999 2783 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
<> 149:156823d33999 2784
<> 149:156823d33999 2785 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 2786 {
<> 149:156823d33999 2787 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 2788 {
<> 149:156823d33999 2789 return HAL_ERROR;
<> 149:156823d33999 2790 }
<> 149:156823d33999 2791
<> 149:156823d33999 2792 /* Wait until BUSY flag is reset */
<> 149:156823d33999 2793 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 2794 {
<> 149:156823d33999 2795 return HAL_BUSY;
<> 149:156823d33999 2796 }
<> 149:156823d33999 2797
<> 149:156823d33999 2798 /* Process Locked */
<> 149:156823d33999 2799 __HAL_LOCK(hi2c);
<> 149:156823d33999 2800
<> 149:156823d33999 2801 /* Check if the I2C is already enabled */
<> 149:156823d33999 2802 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 2803 {
<> 149:156823d33999 2804 /* Enable I2C peripheral */
<> 149:156823d33999 2805 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 2806 }
<> 149:156823d33999 2807
<> 149:156823d33999 2808 /* Disable Pos */
<> 149:156823d33999 2809 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 2810
<> 149:156823d33999 2811 hi2c->State = HAL_I2C_STATE_BUSY_RX;
<> 149:156823d33999 2812 hi2c->Mode = HAL_I2C_MODE_MEM;
<> 149:156823d33999 2813 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 2814
<> 149:156823d33999 2815 /* Prepare transfer parameters */
<> 149:156823d33999 2816 hi2c->pBuffPtr = pData;
<> 149:156823d33999 2817 hi2c->XferCount = Size;
<> 149:156823d33999 2818 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 2819 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 2820
<> 149:156823d33999 2821 /* Send Slave Address and Memory Address */
<> 149:156823d33999 2822 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 2823 {
<> 149:156823d33999 2824 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 2825 {
<> 149:156823d33999 2826 /* Process Unlocked */
<> 149:156823d33999 2827 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2828 return HAL_ERROR;
<> 149:156823d33999 2829 }
<> 149:156823d33999 2830 else
<> 149:156823d33999 2831 {
<> 149:156823d33999 2832 /* Process Unlocked */
<> 149:156823d33999 2833 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2834 return HAL_TIMEOUT;
<> 149:156823d33999 2835 }
<> 149:156823d33999 2836 }
<> 149:156823d33999 2837
<> 149:156823d33999 2838 if(hi2c->XferCount == 1U)
<> 149:156823d33999 2839 {
<> 149:156823d33999 2840 /* Disable Acknowledge */
<> 149:156823d33999 2841 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 2842
<> 149:156823d33999 2843 /* Clear ADDR flag */
<> 149:156823d33999 2844 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 2845
<> 149:156823d33999 2846 /* Generate Stop */
<> 149:156823d33999 2847 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
<> 149:156823d33999 2848 }
<> 149:156823d33999 2849 else if(hi2c->XferCount == 2U)
<> 149:156823d33999 2850 {
<> 149:156823d33999 2851 /* Disable Acknowledge */
<> 149:156823d33999 2852 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 2853
<> 149:156823d33999 2854 /* Enable Pos */
<> 149:156823d33999 2855 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 2856
<> 149:156823d33999 2857 /* Clear ADDR flag */
<> 149:156823d33999 2858 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 2859 }
<> 149:156823d33999 2860 else
<> 149:156823d33999 2861 {
<> 149:156823d33999 2862 /* Enable Acknowledge */
<> 149:156823d33999 2863 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 2864
<> 149:156823d33999 2865 /* Clear ADDR flag */
<> 149:156823d33999 2866 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 2867 }
<> 149:156823d33999 2868
<> 149:156823d33999 2869 /* Process Unlocked */
<> 149:156823d33999 2870 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2871
<> 149:156823d33999 2872 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 2873 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 2874 process unlock */
<> 149:156823d33999 2875
<> 149:156823d33999 2876 /* Enable EVT, BUF and ERR interrupt */
<> 149:156823d33999 2877 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 2878
<> 149:156823d33999 2879 return HAL_OK;
<> 149:156823d33999 2880 }
<> 149:156823d33999 2881 else
<> 149:156823d33999 2882 {
<> 149:156823d33999 2883 return HAL_BUSY;
<> 149:156823d33999 2884 }
<> 149:156823d33999 2885 }
<> 149:156823d33999 2886
<> 149:156823d33999 2887 /**
<> 149:156823d33999 2888 * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
<> 149:156823d33999 2889 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 2890 * the configuration information for the specified I2C.
<> 149:156823d33999 2891 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 2892 * in datasheet must be shift at right before call interface
<> 149:156823d33999 2893 * @param MemAddress Internal memory address
<> 149:156823d33999 2894 * @param MemAddSize Size of internal memory address
<> 149:156823d33999 2895 * @param pData Pointer to data buffer
<> 149:156823d33999 2896 * @param Size Amount of data to be sent
<> 149:156823d33999 2897 * @retval HAL status
<> 149:156823d33999 2898 */
<> 149:156823d33999 2899 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 2900 {
<> 149:156823d33999 2901 uint32_t tickstart = 0x00U;
<> 149:156823d33999 2902
<> 149:156823d33999 2903 /* Init tickstart for timeout management*/
<> 149:156823d33999 2904 tickstart = HAL_GetTick();
<> 149:156823d33999 2905
<> 149:156823d33999 2906 /* Check the parameters */
<> 149:156823d33999 2907 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
<> 149:156823d33999 2908
<> 149:156823d33999 2909 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 2910 {
<> 149:156823d33999 2911 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 2912 {
<> 149:156823d33999 2913 return HAL_ERROR;
<> 149:156823d33999 2914 }
<> 149:156823d33999 2915
<> 149:156823d33999 2916 /* Wait until BUSY flag is reset */
<> 149:156823d33999 2917 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 2918 {
<> 149:156823d33999 2919 return HAL_BUSY;
<> 149:156823d33999 2920 }
<> 149:156823d33999 2921
<> 149:156823d33999 2922 /* Process Locked */
<> 149:156823d33999 2923 __HAL_LOCK(hi2c);
<> 149:156823d33999 2924
<> 149:156823d33999 2925 /* Check if the I2C is already enabled */
<> 149:156823d33999 2926 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 2927 {
<> 149:156823d33999 2928 /* Enable I2C peripheral */
<> 149:156823d33999 2929 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 2930 }
<> 149:156823d33999 2931
<> 149:156823d33999 2932 /* Disable Pos */
<> 149:156823d33999 2933 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 2934
<> 149:156823d33999 2935 hi2c->State = HAL_I2C_STATE_BUSY_TX;
<> 149:156823d33999 2936 hi2c->Mode = HAL_I2C_MODE_MEM;
<> 149:156823d33999 2937 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 2938
<> 149:156823d33999 2939 /* Prepare transfer parameters */
<> 149:156823d33999 2940 hi2c->pBuffPtr = pData;
<> 149:156823d33999 2941 hi2c->XferCount = Size;
<> 149:156823d33999 2942 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 2943 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 2944
<> 149:156823d33999 2945 /* Set the I2C DMA transfer complete callback */
<> 149:156823d33999 2946 hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
<> 149:156823d33999 2947
<> 149:156823d33999 2948 /* Set the DMA error callback */
<> 149:156823d33999 2949 hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
<> 149:156823d33999 2950
<> 149:156823d33999 2951 /* Set the unused DMA callbacks to NULL */
<> 149:156823d33999 2952 hi2c->hdmatx->XferHalfCpltCallback = NULL;
<> 149:156823d33999 2953 hi2c->hdmatx->XferAbortCallback = NULL;
<> 149:156823d33999 2954
<> 149:156823d33999 2955 /* Enable the DMA Channel */
<> 149:156823d33999 2956 HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
<> 149:156823d33999 2957
<> 149:156823d33999 2958 /* Send Slave Address and Memory Address */
<> 149:156823d33999 2959 if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 2960 {
<> 149:156823d33999 2961 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 2962 {
<> 149:156823d33999 2963 /* Process Unlocked */
<> 149:156823d33999 2964 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2965 return HAL_ERROR;
<> 149:156823d33999 2966 }
<> 149:156823d33999 2967 else
<> 149:156823d33999 2968 {
<> 149:156823d33999 2969 /* Process Unlocked */
<> 149:156823d33999 2970 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2971 return HAL_TIMEOUT;
<> 149:156823d33999 2972 }
<> 149:156823d33999 2973 }
<> 149:156823d33999 2974
<> 149:156823d33999 2975 /* Clear ADDR flag */
<> 149:156823d33999 2976 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 2977
<> 149:156823d33999 2978 /* Process Unlocked */
<> 149:156823d33999 2979 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 2980
<> 149:156823d33999 2981 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 2982 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 2983 process unlock */
<> 149:156823d33999 2984 /* Enable ERR interrupt */
<> 149:156823d33999 2985 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
<> 149:156823d33999 2986
<> 149:156823d33999 2987 /* Enable DMA Request */
<> 149:156823d33999 2988 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
<> 149:156823d33999 2989
<> 149:156823d33999 2990 return HAL_OK;
<> 149:156823d33999 2991 }
<> 149:156823d33999 2992 else
<> 149:156823d33999 2993 {
<> 149:156823d33999 2994 return HAL_BUSY;
<> 149:156823d33999 2995 }
<> 149:156823d33999 2996 }
<> 149:156823d33999 2997
<> 149:156823d33999 2998 /**
<> 149:156823d33999 2999 * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
<> 149:156823d33999 3000 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3001 * the configuration information for the specified I2C.
<> 149:156823d33999 3002 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 3003 * in datasheet must be shift at right before call interface
<> 149:156823d33999 3004 * @param MemAddress Internal memory address
<> 149:156823d33999 3005 * @param MemAddSize Size of internal memory address
<> 149:156823d33999 3006 * @param pData Pointer to data buffer
<> 149:156823d33999 3007 * @param Size Amount of data to be read
<> 149:156823d33999 3008 * @retval HAL status
<> 149:156823d33999 3009 */
<> 149:156823d33999 3010 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
<> 149:156823d33999 3011 {
<> 149:156823d33999 3012 uint32_t tickstart = 0x00U;
<> 149:156823d33999 3013
<> 149:156823d33999 3014 /* Init tickstart for timeout management*/
<> 149:156823d33999 3015 tickstart = HAL_GetTick();
<> 149:156823d33999 3016
<> 149:156823d33999 3017 /* Check the parameters */
<> 149:156823d33999 3018 assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
<> 149:156823d33999 3019
<> 149:156823d33999 3020 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 3021 {
<> 149:156823d33999 3022 if((pData == NULL) || (Size == 0U))
<> 149:156823d33999 3023 {
<> 149:156823d33999 3024 return HAL_ERROR;
<> 149:156823d33999 3025 }
<> 149:156823d33999 3026
<> 149:156823d33999 3027 /* Wait until BUSY flag is reset */
<> 149:156823d33999 3028 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 3029 {
<> 149:156823d33999 3030 return HAL_BUSY;
<> 149:156823d33999 3031 }
<> 149:156823d33999 3032
<> 149:156823d33999 3033 /* Process Locked */
<> 149:156823d33999 3034 __HAL_LOCK(hi2c);
<> 149:156823d33999 3035
<> 149:156823d33999 3036 /* Check if the I2C is already enabled */
<> 149:156823d33999 3037 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 3038 {
<> 149:156823d33999 3039 /* Enable I2C peripheral */
<> 149:156823d33999 3040 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 3041 }
<> 149:156823d33999 3042
<> 149:156823d33999 3043 /* Disable Pos */
<> 149:156823d33999 3044 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 3045
<> 149:156823d33999 3046 hi2c->State = HAL_I2C_STATE_BUSY_RX;
<> 149:156823d33999 3047 hi2c->Mode = HAL_I2C_MODE_MEM;
<> 149:156823d33999 3048 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 3049
<> 149:156823d33999 3050 /* Prepare transfer parameters */
<> 149:156823d33999 3051 hi2c->pBuffPtr = pData;
<> 149:156823d33999 3052 hi2c->XferCount = Size;
<> 149:156823d33999 3053 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 3054 hi2c->XferSize = hi2c->XferCount;
<> 149:156823d33999 3055
<> 149:156823d33999 3056 /* Set the I2C DMA transfer complete callback */
<> 149:156823d33999 3057 hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
<> 149:156823d33999 3058
<> 149:156823d33999 3059 /* Set the DMA error callback */
<> 149:156823d33999 3060 hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
<> 149:156823d33999 3061
<> 149:156823d33999 3062 /* Set the unused DMA callbacks to NULL */
<> 149:156823d33999 3063 hi2c->hdmarx->XferHalfCpltCallback = NULL;
<> 149:156823d33999 3064 hi2c->hdmarx->XferAbortCallback = NULL;
<> 149:156823d33999 3065
<> 149:156823d33999 3066 /* Enable the DMA Channel */
<> 149:156823d33999 3067 HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
<> 149:156823d33999 3068
<> 149:156823d33999 3069 /* Send Slave Address and Memory Address */
<> 149:156823d33999 3070 if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 3071 {
<> 149:156823d33999 3072 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 3073 {
<> 149:156823d33999 3074 /* Process Unlocked */
<> 149:156823d33999 3075 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 3076 return HAL_ERROR;
<> 149:156823d33999 3077 }
<> 149:156823d33999 3078 else
<> 149:156823d33999 3079 {
<> 149:156823d33999 3080 /* Process Unlocked */
<> 149:156823d33999 3081 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 3082 return HAL_TIMEOUT;
<> 149:156823d33999 3083 }
<> 149:156823d33999 3084 }
<> 149:156823d33999 3085
<> 149:156823d33999 3086 if(Size == 1U)
<> 149:156823d33999 3087 {
<> 149:156823d33999 3088 /* Disable Acknowledge */
<> 149:156823d33999 3089 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 3090 }
<> 149:156823d33999 3091 else
<> 149:156823d33999 3092 {
<> 149:156823d33999 3093 /* Enable Last DMA bit */
<> 149:156823d33999 3094 SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
<> 149:156823d33999 3095 }
<> 149:156823d33999 3096
<> 149:156823d33999 3097 /* Clear ADDR flag */
<> 149:156823d33999 3098 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 3099
<> 149:156823d33999 3100 /* Process Unlocked */
<> 149:156823d33999 3101 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 3102
<> 149:156823d33999 3103 /* Note : The I2C interrupts must be enabled after unlocking current process
<> 149:156823d33999 3104 to avoid the risk of I2C interrupt handle execution before current
<> 149:156823d33999 3105 process unlock */
<> 149:156823d33999 3106 /* Enable ERR interrupt */
<> 149:156823d33999 3107 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
<> 149:156823d33999 3108
<> 149:156823d33999 3109 /* Enable DMA Request */
<> 149:156823d33999 3110 SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
<> 149:156823d33999 3111
<> 149:156823d33999 3112 return HAL_OK;
<> 149:156823d33999 3113 }
<> 149:156823d33999 3114 else
<> 149:156823d33999 3115 {
<> 149:156823d33999 3116 return HAL_BUSY;
<> 149:156823d33999 3117 }
<> 149:156823d33999 3118 }
<> 149:156823d33999 3119
<> 149:156823d33999 3120 /**
<> 149:156823d33999 3121 * @brief Checks if target device is ready for communication.
<> 149:156823d33999 3122 * @note This function is used with Memory devices
<> 149:156823d33999 3123 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3124 * the configuration information for the specified I2C.
<> 149:156823d33999 3125 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 3126 * in datasheet must be shift at right before call interface
<> 149:156823d33999 3127 * @param Trials Number of trials
<> 149:156823d33999 3128 * @param Timeout Timeout duration
<> 149:156823d33999 3129 * @retval HAL status
<> 149:156823d33999 3130 */
<> 149:156823d33999 3131 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
<> 149:156823d33999 3132 {
<> 149:156823d33999 3133 uint32_t tickstart = 0U, I2C_Trials = 1U;
<> 149:156823d33999 3134
<> 149:156823d33999 3135 /* Get tick */
<> 149:156823d33999 3136 tickstart = HAL_GetTick();
<> 149:156823d33999 3137
<> 149:156823d33999 3138 if(hi2c->State == HAL_I2C_STATE_READY)
<> 149:156823d33999 3139 {
<> 149:156823d33999 3140 /* Wait until BUSY flag is reset */
<> 149:156823d33999 3141 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 3142 {
<> 149:156823d33999 3143 return HAL_BUSY;
<> 149:156823d33999 3144 }
<> 149:156823d33999 3145
<> 149:156823d33999 3146 /* Process Locked */
<> 149:156823d33999 3147 __HAL_LOCK(hi2c);
<> 149:156823d33999 3148
<> 149:156823d33999 3149 /* Check if the I2C is already enabled */
<> 149:156823d33999 3150 if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
<> 149:156823d33999 3151 {
<> 149:156823d33999 3152 /* Enable I2C peripheral */
<> 149:156823d33999 3153 __HAL_I2C_ENABLE(hi2c);
<> 149:156823d33999 3154 }
<> 149:156823d33999 3155
<> 149:156823d33999 3156 /* Disable Pos */
<> 149:156823d33999 3157 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 3158
<> 149:156823d33999 3159 hi2c->State = HAL_I2C_STATE_BUSY;
<> 149:156823d33999 3160 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 3161 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 3162
<> 149:156823d33999 3163 do
<> 149:156823d33999 3164 {
<> 149:156823d33999 3165 /* Generate Start */
<> 149:156823d33999 3166 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 3167
<> 149:156823d33999 3168 /* Wait until SB flag is set */
<> 149:156823d33999 3169 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
<> 149:156823d33999 3170 {
<> 149:156823d33999 3171 return HAL_TIMEOUT;
<> 149:156823d33999 3172 }
<> 149:156823d33999 3173
<> 149:156823d33999 3174 /* Send slave address */
<> 149:156823d33999 3175 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
<> 149:156823d33999 3176
<> 149:156823d33999 3177 /* Wait until ADDR or AF flag are set */
<> 149:156823d33999 3178 /* Get tick */
<> 149:156823d33999 3179 tickstart = HAL_GetTick();
<> 149:156823d33999 3180
<> 149:156823d33999 3181 while((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == RESET) && \
<> 149:156823d33999 3182 (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) && \
<> 149:156823d33999 3183 (hi2c->State != HAL_I2C_STATE_TIMEOUT))
<> 149:156823d33999 3184 {
<> 149:156823d33999 3185 if(Timeout != HAL_MAX_DELAY)
<> 149:156823d33999 3186 {
<> 149:156823d33999 3187 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
<> 149:156823d33999 3188 {
<> 149:156823d33999 3189 hi2c->State = HAL_I2C_STATE_TIMEOUT;
<> 149:156823d33999 3190 }
<> 149:156823d33999 3191 }
<> 149:156823d33999 3192 }
<> 149:156823d33999 3193
<> 149:156823d33999 3194 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 3195
<> 149:156823d33999 3196 /* Check if the ADDR flag has been set */
<> 149:156823d33999 3197 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
<> 149:156823d33999 3198 {
<> 149:156823d33999 3199 /* Generate Stop */
<> 149:156823d33999 3200 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 3201
<> 149:156823d33999 3202 /* Clear ADDR Flag */
<> 149:156823d33999 3203 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 3204
<> 149:156823d33999 3205 /* Wait until BUSY flag is reset */
<> 149:156823d33999 3206 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 3207 {
<> 149:156823d33999 3208 return HAL_TIMEOUT;
<> 149:156823d33999 3209 }
<> 149:156823d33999 3210
<> 149:156823d33999 3211 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 3212
<> 149:156823d33999 3213 /* Process Unlocked */
<> 149:156823d33999 3214 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 3215
<> 149:156823d33999 3216 return HAL_OK;
<> 149:156823d33999 3217 }
<> 149:156823d33999 3218 else
<> 149:156823d33999 3219 {
<> 149:156823d33999 3220 /* Generate Stop */
<> 149:156823d33999 3221 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 3222
<> 149:156823d33999 3223 /* Clear AF Flag */
<> 149:156823d33999 3224 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
<> 149:156823d33999 3225
<> 149:156823d33999 3226 /* Wait until BUSY flag is reset */
<> 149:156823d33999 3227 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
<> 149:156823d33999 3228 {
<> 149:156823d33999 3229 return HAL_TIMEOUT;
<> 149:156823d33999 3230 }
<> 149:156823d33999 3231 }
<> 149:156823d33999 3232 }while(I2C_Trials++ < Trials);
<> 149:156823d33999 3233
<> 149:156823d33999 3234 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 3235
<> 149:156823d33999 3236 /* Process Unlocked */
<> 149:156823d33999 3237 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 3238
<> 149:156823d33999 3239 return HAL_ERROR;
<> 149:156823d33999 3240 }
<> 149:156823d33999 3241 else
<> 149:156823d33999 3242 {
<> 149:156823d33999 3243 return HAL_BUSY;
<> 149:156823d33999 3244 }
<> 149:156823d33999 3245 }
<> 149:156823d33999 3246
<> 149:156823d33999 3247 /**
<> 149:156823d33999 3248 * @brief This function handles I2C event interrupt request.
<> 149:156823d33999 3249 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3250 * the configuration information for the specified I2C.
<> 149:156823d33999 3251 * @retval None
<> 149:156823d33999 3252 */
<> 149:156823d33999 3253 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3254 {
<> 149:156823d33999 3255 uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
<> 149:156823d33999 3256 uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
<> 149:156823d33999 3257 uint32_t itsources = READ_REG(hi2c->Instance->CR2);
<> 149:156823d33999 3258
<> 149:156823d33999 3259 /* Master or Memory mode selected */
<> 149:156823d33999 3260 if((hi2c->Mode == HAL_I2C_MODE_MASTER) || \
<> 149:156823d33999 3261 (hi2c->Mode == HAL_I2C_MODE_MEM))
<> 149:156823d33999 3262 {
<> 149:156823d33999 3263 /* SB Set ----------------------------------------------------------------*/
<> 149:156823d33999 3264 if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
<> 149:156823d33999 3265 {
<> 149:156823d33999 3266 I2C_Master_SB(hi2c);
<> 149:156823d33999 3267 }
<> 149:156823d33999 3268 /* ADD10 Set -------------------------------------------------------------*/
<> 149:156823d33999 3269 else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
<> 149:156823d33999 3270 {
<> 149:156823d33999 3271 I2C_Master_ADD10(hi2c);
<> 149:156823d33999 3272 }
<> 149:156823d33999 3273 /* ADDR Set --------------------------------------------------------------*/
<> 149:156823d33999 3274 else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
<> 149:156823d33999 3275 {
<> 149:156823d33999 3276 I2C_Master_ADDR(hi2c);
<> 149:156823d33999 3277 }
<> 149:156823d33999 3278
<> 149:156823d33999 3279 /* I2C in mode Transmitter -----------------------------------------------*/
<> 149:156823d33999 3280 if((hi2c->EventCount == 0U) && ((sr2itflags & I2C_FLAG_TRA) != RESET))
<> 149:156823d33999 3281 {
<> 149:156823d33999 3282 /* TXE set and BTF reset -----------------------------------------------*/
<> 149:156823d33999 3283 if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
<> 149:156823d33999 3284 {
<> 149:156823d33999 3285 I2C_MasterTransmit_TXE(hi2c);
<> 149:156823d33999 3286 }
<> 149:156823d33999 3287 /* BTF set -------------------------------------------------------------*/
<> 149:156823d33999 3288 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
<> 149:156823d33999 3289 {
<> 149:156823d33999 3290 I2C_MasterTransmit_BTF(hi2c);
<> 149:156823d33999 3291 }
<> 149:156823d33999 3292 }
<> 149:156823d33999 3293 /* I2C in mode Receiver --------------------------------------------------*/
<> 149:156823d33999 3294 else
<> 149:156823d33999 3295 {
<> 149:156823d33999 3296 /* RXNE set and BTF reset -----------------------------------------------*/
<> 149:156823d33999 3297 if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
<> 149:156823d33999 3298 {
<> 149:156823d33999 3299 I2C_MasterReceive_RXNE(hi2c);
<> 149:156823d33999 3300 }
<> 149:156823d33999 3301 /* BTF set -------------------------------------------------------------*/
<> 149:156823d33999 3302 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
<> 149:156823d33999 3303 {
<> 149:156823d33999 3304 I2C_MasterReceive_BTF(hi2c);
<> 149:156823d33999 3305 }
<> 149:156823d33999 3306 }
<> 149:156823d33999 3307 }
<> 149:156823d33999 3308 /* Slave mode selected */
<> 149:156823d33999 3309 else
<> 149:156823d33999 3310 {
<> 149:156823d33999 3311 /* ADDR set --------------------------------------------------------------*/
<> 149:156823d33999 3312 if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
<> 149:156823d33999 3313 {
<> 149:156823d33999 3314 I2C_Slave_ADDR(hi2c);
<> 149:156823d33999 3315 }
<> 149:156823d33999 3316 /* STOPF set --------------------------------------------------------------*/
<> 149:156823d33999 3317 else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
<> 149:156823d33999 3318 {
<> 149:156823d33999 3319 I2C_Slave_STOPF(hi2c);
<> 149:156823d33999 3320 }
<> 149:156823d33999 3321 /* I2C in mode Transmitter -----------------------------------------------*/
<> 149:156823d33999 3322 else if((sr2itflags & I2C_FLAG_TRA) != RESET)
<> 149:156823d33999 3323 {
<> 149:156823d33999 3324 /* TXE set and BTF reset -----------------------------------------------*/
<> 149:156823d33999 3325 if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
<> 149:156823d33999 3326 {
<> 149:156823d33999 3327 I2C_SlaveTransmit_TXE(hi2c);
<> 149:156823d33999 3328 }
<> 149:156823d33999 3329 /* BTF set -------------------------------------------------------------*/
<> 149:156823d33999 3330 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
<> 149:156823d33999 3331 {
<> 149:156823d33999 3332 I2C_SlaveTransmit_BTF(hi2c);
<> 149:156823d33999 3333 }
<> 149:156823d33999 3334 }
<> 149:156823d33999 3335 /* I2C in mode Receiver --------------------------------------------------*/
<> 149:156823d33999 3336 else
<> 149:156823d33999 3337 {
<> 149:156823d33999 3338 /* RXNE set and BTF reset ----------------------------------------------*/
<> 149:156823d33999 3339 if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
<> 149:156823d33999 3340 {
<> 149:156823d33999 3341 I2C_SlaveReceive_RXNE(hi2c);
<> 149:156823d33999 3342 }
<> 149:156823d33999 3343 /* BTF set -------------------------------------------------------------*/
<> 149:156823d33999 3344 else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
<> 149:156823d33999 3345 {
<> 149:156823d33999 3346 I2C_SlaveReceive_BTF(hi2c);
<> 149:156823d33999 3347 }
<> 149:156823d33999 3348 }
<> 149:156823d33999 3349 }
<> 149:156823d33999 3350 }
<> 149:156823d33999 3351
<> 149:156823d33999 3352 /**
<> 149:156823d33999 3353 * @brief This function handles I2C error interrupt request.
<> 149:156823d33999 3354 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3355 * the configuration information for the specified I2C.
<> 149:156823d33999 3356 * @retval None
<> 149:156823d33999 3357 */
<> 149:156823d33999 3358 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3359 {
<> 149:156823d33999 3360 uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
<> 149:156823d33999 3361 uint32_t itsources = READ_REG(hi2c->Instance->CR2);
<> 149:156823d33999 3362
<> 149:156823d33999 3363 /* I2C Bus error interrupt occurred ----------------------------------------*/
<> 149:156823d33999 3364 if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
<> 149:156823d33999 3365 {
<> 149:156823d33999 3366 hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
<> 149:156823d33999 3367
<> 149:156823d33999 3368 /* Clear BERR flag */
<> 149:156823d33999 3369 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
<> 149:156823d33999 3370 }
<> 149:156823d33999 3371
<> 149:156823d33999 3372 /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
<> 149:156823d33999 3373 if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
<> 149:156823d33999 3374 {
<> 149:156823d33999 3375 hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
<> 149:156823d33999 3376
<> 149:156823d33999 3377 /* Clear ARLO flag */
<> 149:156823d33999 3378 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
<> 149:156823d33999 3379 }
<> 149:156823d33999 3380
<> 149:156823d33999 3381 /* I2C Acknowledge failure error interrupt occurred ------------------------*/
<> 149:156823d33999 3382 if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
<> 149:156823d33999 3383 {
<> 149:156823d33999 3384 if((hi2c->Mode == HAL_I2C_MODE_SLAVE) && \
<> 149:156823d33999 3385 (hi2c->XferCount == 0U) && \
<> 149:156823d33999 3386 ((hi2c->State == HAL_I2C_STATE_BUSY_TX) || (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
<> 149:156823d33999 3387 ((hi2c->State == HAL_I2C_STATE_LISTEN) && (hi2c->PreviousState == HAL_I2C_STATE_BUSY_TX))))
<> 149:156823d33999 3388 {
<> 149:156823d33999 3389 I2C_Slave_AF(hi2c);
<> 149:156823d33999 3390 }
<> 149:156823d33999 3391 else
<> 149:156823d33999 3392 {
<> 149:156823d33999 3393 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
<> 149:156823d33999 3394
<> 149:156823d33999 3395 /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
<> 149:156823d33999 3396 if(hi2c->Mode == HAL_I2C_MODE_MASTER)
<> 149:156823d33999 3397 {
<> 149:156823d33999 3398 /* Generate Stop */
<> 149:156823d33999 3399 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 3400 }
<> 149:156823d33999 3401
<> 149:156823d33999 3402 /* Clear AF flag */
<> 149:156823d33999 3403 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
<> 149:156823d33999 3404 }
<> 149:156823d33999 3405 }
<> 149:156823d33999 3406
<> 149:156823d33999 3407 /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
<> 149:156823d33999 3408 if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
<> 149:156823d33999 3409 {
<> 149:156823d33999 3410 hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
<> 149:156823d33999 3411 /* Clear OVR flag */
<> 149:156823d33999 3412 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
<> 149:156823d33999 3413 }
<> 149:156823d33999 3414
<> 149:156823d33999 3415 /* Call the Error Callback in case of Error detected -----------------------*/
<> 149:156823d33999 3416 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
<> 149:156823d33999 3417 {
<> 149:156823d33999 3418 I2C_ITError(hi2c);
<> 149:156823d33999 3419 }
<> 149:156823d33999 3420 }
<> 149:156823d33999 3421
<> 149:156823d33999 3422 /**
<> 149:156823d33999 3423 * @brief Master Tx Transfer completed callback.
<> 149:156823d33999 3424 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3425 * the configuration information for the specified I2C.
<> 149:156823d33999 3426 * @retval None
<> 149:156823d33999 3427 */
<> 149:156823d33999 3428 __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3429 {
<> 149:156823d33999 3430 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 3431 UNUSED(hi2c);
<> 149:156823d33999 3432
<> 149:156823d33999 3433 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 3434 the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
<> 149:156823d33999 3435 */
<> 149:156823d33999 3436 }
<> 149:156823d33999 3437
<> 149:156823d33999 3438 /**
<> 149:156823d33999 3439 * @brief Master Rx Transfer completed callback.
<> 149:156823d33999 3440 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3441 * the configuration information for the specified I2C.
<> 149:156823d33999 3442 * @retval None
<> 149:156823d33999 3443 */
<> 149:156823d33999 3444 __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3445 {
<> 149:156823d33999 3446 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 3447 UNUSED(hi2c);
<> 149:156823d33999 3448
<> 149:156823d33999 3449 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 3450 the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
<> 149:156823d33999 3451 */
<> 149:156823d33999 3452 }
<> 149:156823d33999 3453
<> 149:156823d33999 3454 /** @brief Slave Tx Transfer completed callback.
<> 149:156823d33999 3455 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3456 * the configuration information for the specified I2C.
<> 149:156823d33999 3457 * @retval None
<> 149:156823d33999 3458 */
<> 149:156823d33999 3459 __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3460 {
<> 149:156823d33999 3461 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 3462 UNUSED(hi2c);
<> 149:156823d33999 3463
<> 149:156823d33999 3464 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 3465 the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
<> 149:156823d33999 3466 */
<> 149:156823d33999 3467 }
<> 149:156823d33999 3468
<> 149:156823d33999 3469 /**
<> 149:156823d33999 3470 * @brief Slave Rx Transfer completed callback.
<> 149:156823d33999 3471 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3472 * the configuration information for the specified I2C.
<> 149:156823d33999 3473 * @retval None
<> 149:156823d33999 3474 */
<> 149:156823d33999 3475 __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3476 {
<> 149:156823d33999 3477 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 3478 UNUSED(hi2c);
<> 149:156823d33999 3479
<> 149:156823d33999 3480 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 3481 the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
<> 149:156823d33999 3482 */
<> 149:156823d33999 3483 }
<> 149:156823d33999 3484
<> 149:156823d33999 3485 /**
<> 149:156823d33999 3486 * @brief Slave Address Match callback.
<> 149:156823d33999 3487 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3488 * the configuration information for the specified I2C.
<> 149:156823d33999 3489 * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferDirection_definition
<> 149:156823d33999 3490 * @param AddrMatchCode Address Match Code
<> 149:156823d33999 3491 * @retval None
<> 149:156823d33999 3492 */
<> 149:156823d33999 3493 __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
<> 149:156823d33999 3494 {
<> 149:156823d33999 3495 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 3496 UNUSED(hi2c);
<> 149:156823d33999 3497 UNUSED(TransferDirection);
<> 149:156823d33999 3498 UNUSED(AddrMatchCode);
<> 149:156823d33999 3499
<> 149:156823d33999 3500 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 3501 the HAL_I2C_AddrCallback can be implemented in the user file
<> 149:156823d33999 3502 */
<> 149:156823d33999 3503 }
<> 149:156823d33999 3504
<> 149:156823d33999 3505 /**
<> 149:156823d33999 3506 * @brief Listen Complete callback.
<> 149:156823d33999 3507 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3508 * the configuration information for the specified I2C.
<> 149:156823d33999 3509 * @retval None
<> 149:156823d33999 3510 */
<> 149:156823d33999 3511 __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3512 {
<> 149:156823d33999 3513 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 3514 UNUSED(hi2c);
<> 149:156823d33999 3515
<> 149:156823d33999 3516 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 3517 the HAL_I2C_ListenCpltCallback can be implemented in the user file
<> 149:156823d33999 3518 */
<> 149:156823d33999 3519 }
<> 149:156823d33999 3520
<> 149:156823d33999 3521 /**
<> 149:156823d33999 3522 * @brief Memory Tx Transfer completed callback.
<> 149:156823d33999 3523 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3524 * the configuration information for the specified I2C.
<> 149:156823d33999 3525 * @retval None
<> 149:156823d33999 3526 */
<> 149:156823d33999 3527 __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3528 {
<> 149:156823d33999 3529 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 3530 UNUSED(hi2c);
<> 149:156823d33999 3531
<> 149:156823d33999 3532 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 3533 the HAL_I2C_MemTxCpltCallback can be implemented in the user file
<> 149:156823d33999 3534 */
<> 149:156823d33999 3535 }
<> 149:156823d33999 3536
<> 149:156823d33999 3537 /**
<> 149:156823d33999 3538 * @brief Memory Rx Transfer completed callback.
<> 149:156823d33999 3539 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3540 * the configuration information for the specified I2C.
<> 149:156823d33999 3541 * @retval None
<> 149:156823d33999 3542 */
<> 149:156823d33999 3543 __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3544 {
<> 149:156823d33999 3545 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 3546 UNUSED(hi2c);
<> 149:156823d33999 3547
<> 149:156823d33999 3548 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 3549 the HAL_I2C_MemRxCpltCallback can be implemented in the user file
<> 149:156823d33999 3550 */
<> 149:156823d33999 3551 }
<> 149:156823d33999 3552
<> 149:156823d33999 3553 /**
<> 149:156823d33999 3554 * @brief I2C error callback.
<> 149:156823d33999 3555 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3556 * the configuration information for the specified I2C.
<> 149:156823d33999 3557 * @retval None
<> 149:156823d33999 3558 */
<> 149:156823d33999 3559 __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3560 {
<> 149:156823d33999 3561 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 3562 UNUSED(hi2c);
<> 149:156823d33999 3563
<> 149:156823d33999 3564 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 3565 the HAL_I2C_ErrorCallback can be implemented in the user file
<> 149:156823d33999 3566 */
<> 149:156823d33999 3567 }
<> 149:156823d33999 3568
<> 149:156823d33999 3569 /**
<> 149:156823d33999 3570 * @brief I2C abort callback.
<> 149:156823d33999 3571 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3572 * the configuration information for the specified I2C.
<> 149:156823d33999 3573 * @retval None
<> 149:156823d33999 3574 */
<> 149:156823d33999 3575 __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3576 {
<> 149:156823d33999 3577 /* Prevent unused argument(s) compilation warning */
<> 149:156823d33999 3578 UNUSED(hi2c);
<> 149:156823d33999 3579
<> 149:156823d33999 3580 /* NOTE : This function should not be modified, when the callback is needed,
<> 149:156823d33999 3581 the HAL_I2C_AbortCpltCallback could be implemented in the user file
<> 149:156823d33999 3582 */
<> 149:156823d33999 3583 }
<> 149:156823d33999 3584
<> 149:156823d33999 3585 /**
<> 149:156823d33999 3586 * @}
<> 149:156823d33999 3587 */
<> 149:156823d33999 3588
<> 149:156823d33999 3589 /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
<> 149:156823d33999 3590 * @brief Peripheral State and Errors functions
<> 149:156823d33999 3591 *
<> 149:156823d33999 3592 @verbatim
<> 149:156823d33999 3593 ===============================================================================
<> 149:156823d33999 3594 ##### Peripheral State, Mode and Error functions #####
<> 149:156823d33999 3595 ===============================================================================
<> 149:156823d33999 3596 [..]
<> 149:156823d33999 3597 This subsection permits to get in run-time the status of the peripheral
<> 149:156823d33999 3598 and the data flow.
<> 149:156823d33999 3599
<> 149:156823d33999 3600 @endverbatim
<> 149:156823d33999 3601 * @{
<> 149:156823d33999 3602 */
<> 149:156823d33999 3603
<> 149:156823d33999 3604 /**
<> 149:156823d33999 3605 * @brief Return the I2C handle state.
<> 149:156823d33999 3606 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3607 * the configuration information for the specified I2C.
<> 149:156823d33999 3608 * @retval HAL state
<> 149:156823d33999 3609 */
<> 149:156823d33999 3610 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3611 {
<> 149:156823d33999 3612 /* Return I2C handle state */
<> 149:156823d33999 3613 return hi2c->State;
<> 149:156823d33999 3614 }
<> 149:156823d33999 3615
<> 149:156823d33999 3616 /**
<> 149:156823d33999 3617 * @brief Return the I2C Master, Slave, Memory or no mode.
<> 149:156823d33999 3618 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3619 * the configuration information for I2C module
<> 149:156823d33999 3620 * @retval HAL mode
<> 149:156823d33999 3621 */
<> 149:156823d33999 3622 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3623 {
<> 149:156823d33999 3624 return hi2c->Mode;
<> 149:156823d33999 3625 }
<> 149:156823d33999 3626
<> 149:156823d33999 3627 /**
<> 149:156823d33999 3628 * @brief Return the I2C error code.
<> 149:156823d33999 3629 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3630 * the configuration information for the specified I2C.
<> 149:156823d33999 3631 * @retval I2C Error Code
<> 149:156823d33999 3632 */
<> 149:156823d33999 3633 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3634 {
<> 149:156823d33999 3635 return hi2c->ErrorCode;
<> 149:156823d33999 3636 }
<> 149:156823d33999 3637
<> 149:156823d33999 3638 /**
<> 149:156823d33999 3639 * @}
<> 149:156823d33999 3640 */
<> 149:156823d33999 3641
<> 149:156823d33999 3642 /**
<> 149:156823d33999 3643 * @}
<> 149:156823d33999 3644 */
<> 149:156823d33999 3645
<> 149:156823d33999 3646
<> 149:156823d33999 3647 /** @addtogroup I2C_Private_Functions
<> 149:156823d33999 3648 * @{
<> 149:156823d33999 3649 */
<> 149:156823d33999 3650
<> 149:156823d33999 3651
<> 149:156823d33999 3652 /**
<> 149:156823d33999 3653 * @brief Handle TXE flag for Master
<> 149:156823d33999 3654 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3655 * the configuration information for I2C module
<> 149:156823d33999 3656 * @retval HAL status
<> 149:156823d33999 3657 */
<> 149:156823d33999 3658 static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3659 {
<> 149:156823d33999 3660 if((hi2c->XferSize == 0U) && (hi2c->State == HAL_I2C_STATE_BUSY_TX))
<> 149:156823d33999 3661 {
<> 149:156823d33999 3662 /* Call TxCpltCallback() directly if no stop mode is set */
<> 149:156823d33999 3663 if((hi2c->XferOptions != I2C_FIRST_AND_LAST_FRAME) && (hi2c->XferOptions != I2C_LAST_FRAME) && (hi2c->XferOptions != I2C_NO_OPTION_FRAME))
<> 149:156823d33999 3664 {
<> 149:156823d33999 3665 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 3666
<> 149:156823d33999 3667 hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
<> 149:156823d33999 3668 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 3669 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 3670
<> 149:156823d33999 3671 HAL_I2C_MasterTxCpltCallback(hi2c);
<> 149:156823d33999 3672 }
<> 149:156823d33999 3673 else /* Generate Stop condition then Call TxCpltCallback() */
<> 149:156823d33999 3674 {
<> 149:156823d33999 3675 /* Disable EVT, BUF and ERR interrupt */
<> 149:156823d33999 3676 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 3677
<> 149:156823d33999 3678 /* Generate Stop */
<> 149:156823d33999 3679 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 3680
<> 149:156823d33999 3681 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 3682 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 3683
<> 149:156823d33999 3684 if(hi2c->Mode == HAL_I2C_MODE_MEM)
<> 149:156823d33999 3685 {
<> 149:156823d33999 3686 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 3687 HAL_I2C_MemTxCpltCallback(hi2c);
<> 149:156823d33999 3688 }
<> 149:156823d33999 3689 else
<> 149:156823d33999 3690 {
<> 149:156823d33999 3691 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 3692 HAL_I2C_MasterTxCpltCallback(hi2c);
<> 149:156823d33999 3693 }
<> 149:156823d33999 3694 }
<> 149:156823d33999 3695 }
<> 149:156823d33999 3696 else if((hi2c->State == HAL_I2C_STATE_BUSY_TX) || \
<> 149:156823d33999 3697 ((hi2c->Mode == HAL_I2C_MODE_MEM) && (hi2c->State == HAL_I2C_STATE_BUSY_RX)))
<> 149:156823d33999 3698 {
<> 149:156823d33999 3699 if(hi2c->XferCount == 0U)
<> 149:156823d33999 3700 {
<> 149:156823d33999 3701 /* Disable BUF interrupt */
<> 149:156823d33999 3702 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
<> 149:156823d33999 3703 }
<> 149:156823d33999 3704 else
<> 149:156823d33999 3705 {
<> 149:156823d33999 3706 /* Write data to DR */
<> 149:156823d33999 3707 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
<> 149:156823d33999 3708 hi2c->XferCount--;
<> 149:156823d33999 3709 }
<> 149:156823d33999 3710 }
<> 149:156823d33999 3711 return HAL_OK;
<> 149:156823d33999 3712 }
<> 149:156823d33999 3713
<> 149:156823d33999 3714 /**
<> 149:156823d33999 3715 * @brief Handle BTF flag for Master transmitter
<> 149:156823d33999 3716 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3717 * the configuration information for I2C module
<> 149:156823d33999 3718 * @retval HAL status
<> 149:156823d33999 3719 */
<> 149:156823d33999 3720 static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3721 {
<> 149:156823d33999 3722 if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
<> 149:156823d33999 3723 {
<> 149:156823d33999 3724 if(hi2c->XferCount != 0U)
<> 149:156823d33999 3725 {
<> 149:156823d33999 3726 /* Write data to DR */
<> 149:156823d33999 3727 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
<> 149:156823d33999 3728 hi2c->XferCount--;
<> 149:156823d33999 3729 }
<> 149:156823d33999 3730 else
<> 149:156823d33999 3731 {
<> 149:156823d33999 3732 /* Call TxCpltCallback() directly if no stop mode is set */
<> 149:156823d33999 3733 if((hi2c->XferOptions != I2C_FIRST_AND_LAST_FRAME) && (hi2c->XferOptions != I2C_LAST_FRAME) && (hi2c->XferOptions != I2C_NO_OPTION_FRAME))
<> 149:156823d33999 3734 {
<> 149:156823d33999 3735 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 3736
<> 149:156823d33999 3737 hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
<> 149:156823d33999 3738 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 3739 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 3740
<> 149:156823d33999 3741 HAL_I2C_MasterTxCpltCallback(hi2c);
<> 149:156823d33999 3742 }
<> 149:156823d33999 3743 else /* Generate Stop condition then Call TxCpltCallback() */
<> 149:156823d33999 3744 {
<> 149:156823d33999 3745 /* Disable EVT, BUF and ERR interrupt */
<> 149:156823d33999 3746 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 3747
<> 149:156823d33999 3748 /* Generate Stop */
<> 149:156823d33999 3749 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 3750
<> 149:156823d33999 3751 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 3752 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 3753
<> 149:156823d33999 3754 if(hi2c->Mode == HAL_I2C_MODE_MEM)
<> 149:156823d33999 3755 {
<> 149:156823d33999 3756 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 3757
<> 149:156823d33999 3758 HAL_I2C_MemTxCpltCallback(hi2c);
<> 149:156823d33999 3759 }
<> 149:156823d33999 3760 else
<> 149:156823d33999 3761 {
<> 149:156823d33999 3762 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 3763
<> 149:156823d33999 3764 HAL_I2C_MasterTxCpltCallback(hi2c);
<> 149:156823d33999 3765 }
<> 149:156823d33999 3766 }
<> 149:156823d33999 3767 }
<> 149:156823d33999 3768 }
<> 149:156823d33999 3769 return HAL_OK;
<> 149:156823d33999 3770 }
<> 149:156823d33999 3771
<> 149:156823d33999 3772 /**
<> 149:156823d33999 3773 * @brief Handle RXNE flag for Master
<> 149:156823d33999 3774 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3775 * the configuration information for I2C module
<> 149:156823d33999 3776 * @retval HAL status
<> 149:156823d33999 3777 */
<> 149:156823d33999 3778 static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3779 {
<> 153:fa9ff456f731 3780
<> 149:156823d33999 3781 if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
<> 149:156823d33999 3782 {
<> 153:fa9ff456f731 3783 uint32_t tmp = 0U;
<> 153:fa9ff456f731 3784
<> 153:fa9ff456f731 3785 tmp = hi2c->XferCount;
<> 153:fa9ff456f731 3786 if(tmp > 3U)
<> 149:156823d33999 3787 {
<> 149:156823d33999 3788 /* Read data from DR */
<> 149:156823d33999 3789 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 3790 hi2c->XferCount--;
<> 149:156823d33999 3791 }
<> 153:fa9ff456f731 3792 else if((tmp == 2U) || (tmp == 3U))
<> 149:156823d33999 3793 {
<> 153:fa9ff456f731 3794 /* Disable Acknowledge */
<> 153:fa9ff456f731 3795 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
<> 153:fa9ff456f731 3796
<> 153:fa9ff456f731 3797 /* Enable Pos */
<> 153:fa9ff456f731 3798 hi2c->Instance->CR1 |= I2C_CR1_POS;
<> 153:fa9ff456f731 3799
<> 149:156823d33999 3800 /* Disable BUF interrupt */
<> 149:156823d33999 3801 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
<> 149:156823d33999 3802 }
<> 149:156823d33999 3803 else
<> 149:156823d33999 3804 {
<> 153:fa9ff456f731 3805 /* Disable Acknowledge */
<> 153:fa9ff456f731 3806 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
<> 153:fa9ff456f731 3807
<> 153:fa9ff456f731 3808 if(hi2c->XferOptions == I2C_NEXT_FRAME)
<> 149:156823d33999 3809 {
<> 153:fa9ff456f731 3810 /* Enable Pos */
<> 153:fa9ff456f731 3811 hi2c->Instance->CR1 |= I2C_CR1_POS;
<> 149:156823d33999 3812 }
<> 149:156823d33999 3813
<> 149:156823d33999 3814 /* Disable EVT, BUF and ERR interrupt */
<> 149:156823d33999 3815 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 3816
<> 149:156823d33999 3817 /* Read data from DR */
<> 149:156823d33999 3818 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 3819 hi2c->XferCount--;
<> 149:156823d33999 3820
<> 149:156823d33999 3821 hi2c->State = HAL_I2C_STATE_READY;
AnnaBridge 167:e84263d55307 3822 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 3823
<> 149:156823d33999 3824 if(hi2c->Mode == HAL_I2C_MODE_MEM)
<> 149:156823d33999 3825 {
<> 149:156823d33999 3826 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 3827 HAL_I2C_MemRxCpltCallback(hi2c);
<> 149:156823d33999 3828 }
<> 149:156823d33999 3829 else
<> 149:156823d33999 3830 {
<> 149:156823d33999 3831 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 3832 HAL_I2C_MasterRxCpltCallback(hi2c);
<> 149:156823d33999 3833 }
<> 149:156823d33999 3834 }
<> 149:156823d33999 3835 }
<> 149:156823d33999 3836 return HAL_OK;
<> 149:156823d33999 3837 }
<> 149:156823d33999 3838
<> 149:156823d33999 3839 /**
<> 149:156823d33999 3840 * @brief Handle BTF flag for Master receiver
<> 149:156823d33999 3841 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3842 * the configuration information for I2C module
<> 149:156823d33999 3843 * @retval HAL status
<> 149:156823d33999 3844 */
<> 149:156823d33999 3845 static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3846 {
<> 153:fa9ff456f731 3847 /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
<> 153:fa9ff456f731 3848 uint32_t CurrentXferOptions = hi2c->XferOptions;
<> 153:fa9ff456f731 3849
<> 149:156823d33999 3850 if(hi2c->XferCount == 3U)
<> 149:156823d33999 3851 {
<> 153:fa9ff456f731 3852 if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
<> 149:156823d33999 3853 {
<> 149:156823d33999 3854 /* Disable Acknowledge */
<> 153:fa9ff456f731 3855 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
<> 149:156823d33999 3856 }
<> 149:156823d33999 3857
<> 149:156823d33999 3858 /* Read data from DR */
<> 149:156823d33999 3859 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 3860 hi2c->XferCount--;
<> 149:156823d33999 3861 }
<> 149:156823d33999 3862 else if(hi2c->XferCount == 2U)
<> 149:156823d33999 3863 {
<> 149:156823d33999 3864 /* Prepare next transfer or stop current transfer */
<> 153:fa9ff456f731 3865 if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
<> 149:156823d33999 3866 {
<> 153:fa9ff456f731 3867 /* Disable Acknowledge */
<> 153:fa9ff456f731 3868 hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
<> 149:156823d33999 3869 }
<> 149:156823d33999 3870 else
<> 149:156823d33999 3871 {
<> 153:fa9ff456f731 3872 hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
<> 153:fa9ff456f731 3873
<> 149:156823d33999 3874 /* Generate Stop */
<> 153:fa9ff456f731 3875 hi2c->Instance->CR1 |= I2C_CR1_STOP;
<> 149:156823d33999 3876 }
<> 149:156823d33999 3877
<> 149:156823d33999 3878 /* Read data from DR */
<> 149:156823d33999 3879 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 3880 hi2c->XferCount--;
<> 149:156823d33999 3881
<> 149:156823d33999 3882 /* Read data from DR */
<> 149:156823d33999 3883 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 3884 hi2c->XferCount--;
<> 149:156823d33999 3885
<> 149:156823d33999 3886 /* Disable EVT and ERR interrupt */
<> 149:156823d33999 3887 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
<> 149:156823d33999 3888
<> 149:156823d33999 3889 hi2c->State = HAL_I2C_STATE_READY;
<> 153:fa9ff456f731 3890 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 3891
<> 149:156823d33999 3892 if(hi2c->Mode == HAL_I2C_MODE_MEM)
<> 149:156823d33999 3893 {
<> 149:156823d33999 3894 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 153:fa9ff456f731 3895
<> 149:156823d33999 3896 HAL_I2C_MemRxCpltCallback(hi2c);
<> 149:156823d33999 3897 }
<> 149:156823d33999 3898 else
<> 149:156823d33999 3899 {
<> 149:156823d33999 3900 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 153:fa9ff456f731 3901
<> 149:156823d33999 3902 HAL_I2C_MasterRxCpltCallback(hi2c);
<> 149:156823d33999 3903 }
<> 149:156823d33999 3904 }
<> 149:156823d33999 3905 else
<> 149:156823d33999 3906 {
<> 149:156823d33999 3907 /* Read data from DR */
<> 149:156823d33999 3908 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 3909 hi2c->XferCount--;
<> 149:156823d33999 3910 }
<> 149:156823d33999 3911 return HAL_OK;
<> 149:156823d33999 3912 }
<> 149:156823d33999 3913
<> 149:156823d33999 3914 /**
<> 149:156823d33999 3915 * @brief Handle SB flag for Master
<> 149:156823d33999 3916 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3917 * the configuration information for I2C module
<> 149:156823d33999 3918 * @retval HAL status
<> 149:156823d33999 3919 */
<> 149:156823d33999 3920 static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3921 {
<> 149:156823d33999 3922 if(hi2c->Mode == HAL_I2C_MODE_MEM)
<> 149:156823d33999 3923 {
<> 149:156823d33999 3924 if(hi2c->EventCount == 0U)
<> 149:156823d33999 3925 {
<> 149:156823d33999 3926 /* Send slave address */
<> 149:156823d33999 3927 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
<> 149:156823d33999 3928 }
<> 149:156823d33999 3929 else
<> 149:156823d33999 3930 {
<> 149:156823d33999 3931 hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
<> 149:156823d33999 3932 }
<> 149:156823d33999 3933 }
<> 149:156823d33999 3934 else
<> 149:156823d33999 3935 {
<> 149:156823d33999 3936 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
<> 149:156823d33999 3937 {
<> 149:156823d33999 3938 /* Send slave 7 Bits address */
<> 149:156823d33999 3939 if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
<> 149:156823d33999 3940 {
<> 149:156823d33999 3941 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
<> 149:156823d33999 3942 }
<> 149:156823d33999 3943 else
<> 149:156823d33999 3944 {
<> 149:156823d33999 3945 hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
<> 149:156823d33999 3946 }
<> 149:156823d33999 3947 }
<> 149:156823d33999 3948 else
<> 149:156823d33999 3949 {
<> 149:156823d33999 3950 if(hi2c->EventCount == 0U)
<> 149:156823d33999 3951 {
<> 149:156823d33999 3952 /* Send header of slave address */
<> 149:156823d33999 3953 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
<> 149:156823d33999 3954 }
<> 149:156823d33999 3955 else if(hi2c->EventCount == 1U)
<> 149:156823d33999 3956 {
<> 149:156823d33999 3957 /* Send header of slave address */
<> 149:156823d33999 3958 hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
<> 149:156823d33999 3959 }
<> 149:156823d33999 3960 }
<> 149:156823d33999 3961 }
<> 149:156823d33999 3962
<> 149:156823d33999 3963 return HAL_OK;
<> 149:156823d33999 3964 }
<> 149:156823d33999 3965
<> 149:156823d33999 3966 /**
<> 149:156823d33999 3967 * @brief Handle ADD10 flag for Master
<> 149:156823d33999 3968 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3969 * the configuration information for I2C module
<> 149:156823d33999 3970 * @retval HAL status
<> 149:156823d33999 3971 */
<> 149:156823d33999 3972 static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3973 {
<> 149:156823d33999 3974 /* Send slave address */
<> 149:156823d33999 3975 hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
<> 149:156823d33999 3976
<> 149:156823d33999 3977 return HAL_OK;
<> 149:156823d33999 3978 }
<> 149:156823d33999 3979
<> 149:156823d33999 3980 /**
<> 149:156823d33999 3981 * @brief Handle ADDR flag for Master
<> 149:156823d33999 3982 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 3983 * the configuration information for I2C module
<> 149:156823d33999 3984 * @retval HAL status
<> 149:156823d33999 3985 */
<> 149:156823d33999 3986 static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 3987 {
<> 149:156823d33999 3988 if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
<> 149:156823d33999 3989 {
<> 149:156823d33999 3990 if((hi2c->EventCount == 0U) && (hi2c->Mode == HAL_I2C_MODE_MEM))
<> 149:156823d33999 3991 {
<> 149:156823d33999 3992 /* Clear ADDR flag */
<> 149:156823d33999 3993 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 3994 }
<> 149:156823d33999 3995 else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
<> 149:156823d33999 3996 {
<> 149:156823d33999 3997 /* Clear ADDR flag */
<> 149:156823d33999 3998 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 3999
<> 149:156823d33999 4000 /* Generate Restart */
<> 149:156823d33999 4001 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 4002
<> 149:156823d33999 4003 hi2c->EventCount++;
<> 149:156823d33999 4004 }
<> 149:156823d33999 4005 else
<> 149:156823d33999 4006 {
<> 149:156823d33999 4007 if(hi2c->XferCount == 0U)
<> 149:156823d33999 4008 {
<> 149:156823d33999 4009 /* Clear ADDR flag */
<> 149:156823d33999 4010 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 4011
<> 149:156823d33999 4012 /* Generate Stop */
<> 149:156823d33999 4013 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 4014 }
<> 149:156823d33999 4015 else if(hi2c->XferCount == 1U)
<> 149:156823d33999 4016 {
<> 149:156823d33999 4017 if(hi2c->XferOptions == I2C_NO_OPTION_FRAME)
<> 149:156823d33999 4018 {
<> 149:156823d33999 4019 /* Disable Acknowledge */
<> 149:156823d33999 4020 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4021
<> 149:156823d33999 4022 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
<> 149:156823d33999 4023 {
<> 149:156823d33999 4024 /* Disable Acknowledge */
<> 149:156823d33999 4025 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4026
<> 149:156823d33999 4027 /* Clear ADDR flag */
<> 149:156823d33999 4028 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 4029 }
<> 149:156823d33999 4030 else
<> 149:156823d33999 4031 {
<> 149:156823d33999 4032 /* Clear ADDR flag */
<> 149:156823d33999 4033 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 4034
<> 149:156823d33999 4035 /* Generate Stop */
<> 149:156823d33999 4036 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 4037 }
<> 149:156823d33999 4038 }
<> 149:156823d33999 4039 /* Prepare next transfer or stop current transfer */
<> 149:156823d33999 4040 else if((hi2c->XferOptions != I2C_FIRST_AND_LAST_FRAME) && (hi2c->XferOptions != I2C_LAST_FRAME) \
<> 149:156823d33999 4041 && (hi2c->PreviousState != I2C_STATE_MASTER_BUSY_RX))
<> 149:156823d33999 4042 {
<> 149:156823d33999 4043 if(hi2c->XferOptions != I2C_NEXT_FRAME)
<> 149:156823d33999 4044 {
<> 149:156823d33999 4045 /* Disable Acknowledge */
<> 149:156823d33999 4046 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4047 }
<> 149:156823d33999 4048 else
<> 149:156823d33999 4049 {
<> 149:156823d33999 4050 /* Enable Acknowledge */
<> 149:156823d33999 4051 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4052 }
<> 149:156823d33999 4053
<> 149:156823d33999 4054 /* Clear ADDR flag */
<> 149:156823d33999 4055 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 4056 }
<> 149:156823d33999 4057 else
<> 149:156823d33999 4058 {
<> 149:156823d33999 4059 /* Disable Acknowledge */
<> 149:156823d33999 4060 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4061
<> 149:156823d33999 4062 /* Clear ADDR flag */
<> 149:156823d33999 4063 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 4064
<> 149:156823d33999 4065 /* Generate Stop */
<> 149:156823d33999 4066 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 4067 }
<> 149:156823d33999 4068 }
<> 149:156823d33999 4069 else if(hi2c->XferCount == 2U)
<> 149:156823d33999 4070 {
<> 149:156823d33999 4071 if(hi2c->XferOptions != I2C_NEXT_FRAME)
<> 149:156823d33999 4072 {
<> 149:156823d33999 4073 /* Disable Acknowledge */
<> 149:156823d33999 4074 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4075
<> 149:156823d33999 4076 /* Enable Pos */
<> 149:156823d33999 4077 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
<> 149:156823d33999 4078 }
<> 149:156823d33999 4079 else
<> 149:156823d33999 4080 {
<> 149:156823d33999 4081 /* Enable Acknowledge */
<> 149:156823d33999 4082 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4083 }
<> 149:156823d33999 4084
<> 149:156823d33999 4085 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
<> 149:156823d33999 4086 {
<> 149:156823d33999 4087 /* Enable Last DMA bit */
<> 149:156823d33999 4088 SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
<> 149:156823d33999 4089 }
<> 149:156823d33999 4090
<> 149:156823d33999 4091 /* Clear ADDR flag */
<> 149:156823d33999 4092 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 4093 }
<> 149:156823d33999 4094 else
<> 149:156823d33999 4095 {
<> 149:156823d33999 4096 /* Enable Acknowledge */
<> 149:156823d33999 4097 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4098
<> 149:156823d33999 4099 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
<> 149:156823d33999 4100 {
<> 149:156823d33999 4101 /* Enable Last DMA bit */
<> 149:156823d33999 4102 SET_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
<> 149:156823d33999 4103 }
<> 149:156823d33999 4104
<> 149:156823d33999 4105 /* Clear ADDR flag */
<> 149:156823d33999 4106 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 4107 }
<> 149:156823d33999 4108
<> 149:156823d33999 4109 /* Reset Event counter */
<> 149:156823d33999 4110 hi2c->EventCount = 0U;
<> 149:156823d33999 4111 }
<> 149:156823d33999 4112 }
<> 149:156823d33999 4113 else
<> 149:156823d33999 4114 {
<> 149:156823d33999 4115 /* Clear ADDR flag */
<> 149:156823d33999 4116 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 4117 }
<> 149:156823d33999 4118
<> 149:156823d33999 4119 return HAL_OK;
<> 149:156823d33999 4120 }
<> 149:156823d33999 4121
<> 149:156823d33999 4122 /**
<> 149:156823d33999 4123 * @brief Handle TXE flag for Slave
<> 149:156823d33999 4124 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 4125 * the configuration information for I2C module
<> 149:156823d33999 4126 * @retval HAL status
<> 149:156823d33999 4127 */
<> 149:156823d33999 4128 static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 4129 {
<> 149:156823d33999 4130 if(hi2c->XferCount != 0U)
<> 149:156823d33999 4131 {
<> 149:156823d33999 4132 /* Write data to DR */
<> 149:156823d33999 4133 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
<> 149:156823d33999 4134 hi2c->XferCount--;
<> 149:156823d33999 4135
<> 149:156823d33999 4136 if((hi2c->XferCount == 0U) && (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN))
<> 149:156823d33999 4137 {
<> 149:156823d33999 4138 /* Last Byte is received, disable Interrupt */
<> 149:156823d33999 4139 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
<> 149:156823d33999 4140
<> 149:156823d33999 4141 /* Set state at HAL_I2C_STATE_LISTEN */
<> 149:156823d33999 4142 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
<> 149:156823d33999 4143 hi2c->State = HAL_I2C_STATE_LISTEN;
<> 149:156823d33999 4144
<> 149:156823d33999 4145 /* Call the Tx complete callback to inform upper layer of the end of receive process */
<> 149:156823d33999 4146 HAL_I2C_SlaveTxCpltCallback(hi2c);
<> 149:156823d33999 4147 }
<> 149:156823d33999 4148 }
<> 149:156823d33999 4149 return HAL_OK;
<> 149:156823d33999 4150 }
<> 149:156823d33999 4151
<> 149:156823d33999 4152 /**
<> 149:156823d33999 4153 * @brief Handle BTF flag for Slave transmitter
<> 149:156823d33999 4154 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 4155 * the configuration information for I2C module
<> 149:156823d33999 4156 * @retval HAL status
<> 149:156823d33999 4157 */
<> 149:156823d33999 4158 static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 4159 {
<> 149:156823d33999 4160 if(hi2c->XferCount != 0U)
<> 149:156823d33999 4161 {
<> 149:156823d33999 4162 /* Write data to DR */
<> 149:156823d33999 4163 hi2c->Instance->DR = (*hi2c->pBuffPtr++);
<> 149:156823d33999 4164 hi2c->XferCount--;
<> 149:156823d33999 4165 }
<> 149:156823d33999 4166 return HAL_OK;
<> 149:156823d33999 4167 }
<> 149:156823d33999 4168
<> 149:156823d33999 4169 /**
<> 149:156823d33999 4170 * @brief Handle RXNE flag for Slave
<> 149:156823d33999 4171 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 4172 * the configuration information for I2C module
<> 149:156823d33999 4173 * @retval HAL status
<> 149:156823d33999 4174 */
<> 149:156823d33999 4175 static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 4176 {
<> 149:156823d33999 4177 if(hi2c->XferCount != 0U)
<> 149:156823d33999 4178 {
<> 149:156823d33999 4179 /* Read data from DR */
<> 149:156823d33999 4180 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 4181 hi2c->XferCount--;
<> 149:156823d33999 4182
<> 149:156823d33999 4183 if((hi2c->XferCount == 0U) && (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
<> 149:156823d33999 4184 {
<> 149:156823d33999 4185 /* Last Byte is received, disable Interrupt */
<> 149:156823d33999 4186 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
<> 149:156823d33999 4187
<> 149:156823d33999 4188 /* Set state at HAL_I2C_STATE_LISTEN */
<> 149:156823d33999 4189 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
<> 149:156823d33999 4190 hi2c->State = HAL_I2C_STATE_LISTEN;
<> 149:156823d33999 4191
<> 149:156823d33999 4192 /* Call the Rx complete callback to inform upper layer of the end of receive process */
<> 149:156823d33999 4193 HAL_I2C_SlaveRxCpltCallback(hi2c);
<> 149:156823d33999 4194 }
<> 149:156823d33999 4195 }
<> 149:156823d33999 4196 return HAL_OK;
<> 149:156823d33999 4197 }
<> 149:156823d33999 4198
<> 149:156823d33999 4199 /**
<> 149:156823d33999 4200 * @brief Handle BTF flag for Slave receiver
<> 149:156823d33999 4201 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 4202 * the configuration information for I2C module
<> 149:156823d33999 4203 * @retval HAL status
<> 149:156823d33999 4204 */
<> 149:156823d33999 4205 static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 4206 {
<> 149:156823d33999 4207 if(hi2c->XferCount != 0U)
<> 149:156823d33999 4208 {
<> 149:156823d33999 4209 /* Read data from DR */
<> 149:156823d33999 4210 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 4211 hi2c->XferCount--;
<> 149:156823d33999 4212 }
<> 149:156823d33999 4213 return HAL_OK;
<> 149:156823d33999 4214 }
<> 149:156823d33999 4215
<> 149:156823d33999 4216 /**
<> 149:156823d33999 4217 * @brief Handle ADD flag for Slave
<> 149:156823d33999 4218 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 4219 * the configuration information for I2C module
<> 149:156823d33999 4220 * @retval HAL status
<> 149:156823d33999 4221 */
<> 149:156823d33999 4222 static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 4223 {
<> 149:156823d33999 4224 uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
<> 149:156823d33999 4225 uint16_t SlaveAddrCode = 0U;
<> 149:156823d33999 4226
<> 149:156823d33999 4227 /* Transfer Direction requested by Master */
<> 149:156823d33999 4228 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
<> 149:156823d33999 4229 {
<> 149:156823d33999 4230 TransferDirection = I2C_DIRECTION_TRANSMIT;
<> 149:156823d33999 4231 }
<> 149:156823d33999 4232
<> 149:156823d33999 4233 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
<> 149:156823d33999 4234 {
<> 149:156823d33999 4235 SlaveAddrCode = hi2c->Init.OwnAddress1;
<> 149:156823d33999 4236 }
<> 149:156823d33999 4237 else
<> 149:156823d33999 4238 {
<> 149:156823d33999 4239 SlaveAddrCode = hi2c->Init.OwnAddress2;
<> 149:156823d33999 4240 }
<> 149:156823d33999 4241
<> 149:156823d33999 4242 /* Call Slave Addr callback */
<> 149:156823d33999 4243 HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
<> 149:156823d33999 4244
<> 149:156823d33999 4245 return HAL_OK;
<> 149:156823d33999 4246 }
<> 149:156823d33999 4247
<> 149:156823d33999 4248 /**
<> 149:156823d33999 4249 * @brief Handle STOPF flag for Slave
<> 149:156823d33999 4250 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 4251 * the configuration information for I2C module
<> 149:156823d33999 4252 * @retval HAL status
<> 149:156823d33999 4253 */
<> 149:156823d33999 4254 static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 4255 {
<> 149:156823d33999 4256 /* Disable EVT, BUF and ERR interrupt */
<> 149:156823d33999 4257 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 4258
<> 149:156823d33999 4259 /* Clear STOPF flag */
<> 149:156823d33999 4260 __HAL_I2C_CLEAR_STOPFLAG(hi2c);
<> 149:156823d33999 4261
<> 149:156823d33999 4262 /* Disable Acknowledge */
<> 149:156823d33999 4263 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4264
<> 149:156823d33999 4265 /* If a DMA is ongoing, Update handle size context */
<> 149:156823d33999 4266 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
<> 149:156823d33999 4267 {
<> 149:156823d33999 4268 if((hi2c->State == HAL_I2C_STATE_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
<> 149:156823d33999 4269 {
<> 149:156823d33999 4270 hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx);
<> 149:156823d33999 4271 }
<> 149:156823d33999 4272 else
<> 149:156823d33999 4273 {
<> 149:156823d33999 4274 hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
<> 149:156823d33999 4275 }
<> 149:156823d33999 4276 }
<> 149:156823d33999 4277
<> 149:156823d33999 4278 /* All data are not transferred, so set error code accordingly */
<> 149:156823d33999 4279 if(hi2c->XferCount != 0U)
<> 149:156823d33999 4280 {
<> 149:156823d33999 4281 /* Store Last receive data if any */
<> 149:156823d33999 4282 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
<> 149:156823d33999 4283 {
<> 149:156823d33999 4284 /* Read data from DR */
<> 149:156823d33999 4285 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 4286 hi2c->XferCount--;
<> 149:156823d33999 4287 }
<> 149:156823d33999 4288
<> 149:156823d33999 4289 /* Store Last receive data if any */
<> 149:156823d33999 4290 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
<> 149:156823d33999 4291 {
<> 149:156823d33999 4292 /* Read data from DR */
<> 149:156823d33999 4293 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 4294 hi2c->XferCount--;
<> 149:156823d33999 4295 }
<> 149:156823d33999 4296
<> 149:156823d33999 4297 /* Set ErrorCode corresponding to a Non-Acknowledge */
<> 149:156823d33999 4298 hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
<> 149:156823d33999 4299 }
<> 149:156823d33999 4300
<> 149:156823d33999 4301 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
<> 149:156823d33999 4302 {
<> 149:156823d33999 4303 /* Call the corresponding callback to inform upper layer of End of Transfer */
<> 149:156823d33999 4304 I2C_ITError(hi2c);
<> 149:156823d33999 4305 }
<> 149:156823d33999 4306 else
<> 149:156823d33999 4307 {
<> 149:156823d33999 4308 if((hi2c->State == HAL_I2C_STATE_LISTEN ) || (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) || \
<> 149:156823d33999 4309 (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN))
<> 149:156823d33999 4310 {
<> 149:156823d33999 4311 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 4312 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 4313 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 4314 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 4315
<> 149:156823d33999 4316 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
<> 149:156823d33999 4317 HAL_I2C_ListenCpltCallback(hi2c);
<> 149:156823d33999 4318 }
<> 149:156823d33999 4319 else
<> 149:156823d33999 4320 {
<> 149:156823d33999 4321 if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_BUSY_RX))
<> 149:156823d33999 4322 {
<> 149:156823d33999 4323 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 4324 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 4325 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 4326
<> 149:156823d33999 4327 HAL_I2C_SlaveRxCpltCallback(hi2c);
<> 149:156823d33999 4328 }
<> 149:156823d33999 4329 }
<> 149:156823d33999 4330 }
<> 149:156823d33999 4331 return HAL_OK;
<> 149:156823d33999 4332 }
<> 149:156823d33999 4333
<> 149:156823d33999 4334 /**
<> 149:156823d33999 4335 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 4336 * the configuration information for I2C module
<> 149:156823d33999 4337 * @retval HAL status
<> 149:156823d33999 4338 */
<> 149:156823d33999 4339 static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 4340 {
<> 149:156823d33999 4341 if(((hi2c->XferOptions == I2C_FIRST_AND_LAST_FRAME) || (hi2c->XferOptions == I2C_LAST_FRAME)) && \
<> 149:156823d33999 4342 (hi2c->State == HAL_I2C_STATE_LISTEN))
<> 149:156823d33999 4343 {
<> 149:156823d33999 4344 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 4345
<> 149:156823d33999 4346 /* Disable EVT, BUF and ERR interrupt */
<> 149:156823d33999 4347 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 4348
<> 149:156823d33999 4349 /* Clear AF flag */
<> 149:156823d33999 4350 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
<> 149:156823d33999 4351
<> 149:156823d33999 4352 /* Disable Acknowledge */
<> 149:156823d33999 4353 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4354
<> 149:156823d33999 4355 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 4356 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 4357 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 4358
<> 149:156823d33999 4359 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
<> 149:156823d33999 4360 HAL_I2C_ListenCpltCallback(hi2c);
<> 149:156823d33999 4361 }
<> 149:156823d33999 4362 else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
<> 149:156823d33999 4363 {
<> 149:156823d33999 4364 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 4365 hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
<> 149:156823d33999 4366 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 4367 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 4368
<> 149:156823d33999 4369 /* Disable EVT, BUF and ERR interrupt */
<> 149:156823d33999 4370 __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
<> 149:156823d33999 4371
<> 149:156823d33999 4372 /* Clear AF flag */
<> 149:156823d33999 4373 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
<> 149:156823d33999 4374
<> 149:156823d33999 4375 /* Disable Acknowledge */
<> 149:156823d33999 4376 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4377
<> 149:156823d33999 4378 HAL_I2C_SlaveTxCpltCallback(hi2c);
<> 149:156823d33999 4379 }
<> 149:156823d33999 4380 else
<> 149:156823d33999 4381 {
<> 149:156823d33999 4382 /* Clear AF flag only */
<> 149:156823d33999 4383 /* State Listen, but XferOptions == FIRST or NEXT */
<> 149:156823d33999 4384 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
<> 149:156823d33999 4385 }
<> 149:156823d33999 4386
<> 149:156823d33999 4387 return HAL_OK;
<> 149:156823d33999 4388 }
<> 149:156823d33999 4389
<> 149:156823d33999 4390 /**
<> 149:156823d33999 4391 * @brief I2C interrupts error process
<> 149:156823d33999 4392 * @param hi2c I2C handle.
<> 149:156823d33999 4393 * @retval None
<> 149:156823d33999 4394 */
<> 149:156823d33999 4395 static void I2C_ITError(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 4396 {
<> 149:156823d33999 4397 /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
<> 149:156823d33999 4398 uint32_t CurrentState = hi2c->State;
<> 149:156823d33999 4399
<> 149:156823d33999 4400 if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
<> 149:156823d33999 4401 {
<> 149:156823d33999 4402 /* keep HAL_I2C_STATE_LISTEN */
<> 149:156823d33999 4403 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 4404 hi2c->State = HAL_I2C_STATE_LISTEN;
<> 149:156823d33999 4405 }
<> 149:156823d33999 4406 else
<> 149:156823d33999 4407 {
<> 149:156823d33999 4408 /* If state is an abort treatment on going, don't change state */
<> 149:156823d33999 4409 /* This change will be do later */
<> 149:156823d33999 4410 if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN))
<> 149:156823d33999 4411 {
<> 149:156823d33999 4412 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 4413 }
<> 149:156823d33999 4414 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 4415 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 4416 }
<> 149:156823d33999 4417
<> 149:156823d33999 4418 /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
<> 149:156823d33999 4419 hi2c->Instance->CR1 &= ~I2C_CR1_POS;
<> 149:156823d33999 4420
<> 149:156823d33999 4421 /* Abort DMA transfer */
<> 149:156823d33999 4422 if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
<> 149:156823d33999 4423 {
<> 149:156823d33999 4424 hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
<> 149:156823d33999 4425
<> 149:156823d33999 4426 if(hi2c->hdmatx->State != HAL_DMA_STATE_READY)
<> 149:156823d33999 4427 {
<> 149:156823d33999 4428 /* Set the DMA Abort callback :
<> 149:156823d33999 4429 will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
<> 149:156823d33999 4430 hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
<> 149:156823d33999 4431
<> 149:156823d33999 4432 if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
<> 149:156823d33999 4433 {
<> 149:156823d33999 4434 /* Disable I2C peripheral to prevent dummy data in buffer */
<> 149:156823d33999 4435 __HAL_I2C_DISABLE(hi2c);
<> 149:156823d33999 4436
<> 149:156823d33999 4437 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 4438
<> 149:156823d33999 4439 /* Call Directly XferAbortCallback function in case of error */
<> 149:156823d33999 4440 hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
<> 149:156823d33999 4441 }
<> 149:156823d33999 4442 }
<> 149:156823d33999 4443 else
<> 149:156823d33999 4444 {
<> 149:156823d33999 4445 /* Set the DMA Abort callback :
<> 149:156823d33999 4446 will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
<> 149:156823d33999 4447 hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
<> 149:156823d33999 4448
<> 149:156823d33999 4449 if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
<> 149:156823d33999 4450 {
<> 149:156823d33999 4451 /* Store Last receive data if any */
<> 149:156823d33999 4452 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
<> 149:156823d33999 4453 {
<> 149:156823d33999 4454 /* Read data from DR */
<> 149:156823d33999 4455 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 4456 }
<> 149:156823d33999 4457
<> 149:156823d33999 4458 /* Disable I2C peripheral to prevent dummy data in buffer */
<> 149:156823d33999 4459 __HAL_I2C_DISABLE(hi2c);
<> 149:156823d33999 4460
<> 149:156823d33999 4461 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 4462
<> 149:156823d33999 4463 /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
<> 149:156823d33999 4464 hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
<> 149:156823d33999 4465 }
<> 149:156823d33999 4466 }
<> 149:156823d33999 4467 }
<> 149:156823d33999 4468 else if(hi2c->State == HAL_I2C_STATE_ABORT)
<> 149:156823d33999 4469 {
<> 149:156823d33999 4470 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 4471 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 4472
<> 149:156823d33999 4473 /* Store Last receive data if any */
<> 149:156823d33999 4474 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
<> 149:156823d33999 4475 {
<> 149:156823d33999 4476 /* Read data from DR */
<> 149:156823d33999 4477 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 4478 }
<> 149:156823d33999 4479
<> 149:156823d33999 4480 /* Disable I2C peripheral to prevent dummy data in buffer */
<> 149:156823d33999 4481 __HAL_I2C_DISABLE(hi2c);
<> 149:156823d33999 4482
<> 149:156823d33999 4483 /* Call the corresponding callback to inform upper layer of End of Transfer */
<> 149:156823d33999 4484 HAL_I2C_AbortCpltCallback(hi2c);
<> 149:156823d33999 4485 }
<> 149:156823d33999 4486 else
<> 149:156823d33999 4487 {
<> 149:156823d33999 4488 /* Store Last receive data if any */
<> 149:156823d33999 4489 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
<> 149:156823d33999 4490 {
<> 149:156823d33999 4491 /* Read data from DR */
<> 149:156823d33999 4492 (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
<> 149:156823d33999 4493 }
<> 149:156823d33999 4494
<> 149:156823d33999 4495 /* Call user error callback */
<> 149:156823d33999 4496 HAL_I2C_ErrorCallback(hi2c);
<> 149:156823d33999 4497 }
<> 149:156823d33999 4498 /* STOP Flag is not set after a NACK reception */
<> 149:156823d33999 4499 /* So may inform upper layer that listen phase is stopped */
<> 149:156823d33999 4500 /* during NACK error treatment */
<> 149:156823d33999 4501 if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
<> 149:156823d33999 4502 {
<> 149:156823d33999 4503 hi2c->XferOptions = I2C_NO_OPTION_FRAME;
<> 149:156823d33999 4504 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 4505 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 4506 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 4507
<> 149:156823d33999 4508 /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
<> 149:156823d33999 4509 HAL_I2C_ListenCpltCallback(hi2c);
<> 149:156823d33999 4510 }
<> 149:156823d33999 4511 }
<> 149:156823d33999 4512
<> 149:156823d33999 4513 /**
<> 149:156823d33999 4514 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 4515 * the configuration information for I2C module
<> 149:156823d33999 4516 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 4517 * in datasheet must be shift at right before call interface
<> 149:156823d33999 4518 * @param Timeout Timeout duration
<> 149:156823d33999 4519 * @param Tickstart Tick start value
<> 149:156823d33999 4520 * @retval HAL status
<> 149:156823d33999 4521 */
<> 149:156823d33999 4522 static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
<> 149:156823d33999 4523 {
<> 149:156823d33999 4524 /* Generate Start condition if first transfer */
<> 149:156823d33999 4525 if((hi2c->XferOptions == I2C_FIRST_AND_LAST_FRAME) || (hi2c->XferOptions == I2C_FIRST_FRAME) || (hi2c->XferOptions == I2C_NO_OPTION_FRAME))
<> 149:156823d33999 4526 {
<> 149:156823d33999 4527 /* Generate Start */
<> 149:156823d33999 4528 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 4529 }
<> 149:156823d33999 4530 else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
<> 149:156823d33999 4531 {
<> 149:156823d33999 4532 /* Generate ReStart */
<> 149:156823d33999 4533 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 4534 }
<> 149:156823d33999 4535
<> 149:156823d33999 4536 /* Wait until SB flag is set */
<> 149:156823d33999 4537 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4538 {
<> 149:156823d33999 4539 return HAL_TIMEOUT;
<> 149:156823d33999 4540 }
<> 149:156823d33999 4541
<> 149:156823d33999 4542 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
<> 149:156823d33999 4543 {
<> 149:156823d33999 4544 /* Send slave address */
<> 149:156823d33999 4545 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
<> 149:156823d33999 4546 }
<> 149:156823d33999 4547 else
<> 149:156823d33999 4548 {
<> 149:156823d33999 4549 /* Send header of slave address */
<> 149:156823d33999 4550 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
<> 149:156823d33999 4551
<> 149:156823d33999 4552 /* Wait until ADD10 flag is set */
<> 149:156823d33999 4553 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4554 {
<> 149:156823d33999 4555 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4556 {
<> 149:156823d33999 4557 return HAL_ERROR;
<> 149:156823d33999 4558 }
<> 149:156823d33999 4559 else
<> 149:156823d33999 4560 {
<> 149:156823d33999 4561 return HAL_TIMEOUT;
<> 149:156823d33999 4562 }
<> 149:156823d33999 4563 }
<> 149:156823d33999 4564
<> 149:156823d33999 4565 /* Send slave address */
<> 149:156823d33999 4566 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
<> 149:156823d33999 4567 }
<> 149:156823d33999 4568
<> 149:156823d33999 4569 /* Wait until ADDR flag is set */
<> 149:156823d33999 4570 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4571 {
<> 149:156823d33999 4572 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4573 {
<> 149:156823d33999 4574 return HAL_ERROR;
<> 149:156823d33999 4575 }
<> 149:156823d33999 4576 else
<> 149:156823d33999 4577 {
<> 149:156823d33999 4578 return HAL_TIMEOUT;
<> 149:156823d33999 4579 }
<> 149:156823d33999 4580 }
<> 149:156823d33999 4581
<> 149:156823d33999 4582 return HAL_OK;
<> 149:156823d33999 4583 }
<> 149:156823d33999 4584
<> 149:156823d33999 4585 /**
<> 149:156823d33999 4586 * @brief Master sends target device address for read request.
<> 149:156823d33999 4587 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 4588 * the configuration information for I2C module
<> 149:156823d33999 4589 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 4590 * in datasheet must be shift at right before call interface
<> 149:156823d33999 4591 * @param Timeout Timeout duration
<> 149:156823d33999 4592 * @param Tickstart Tick start value
<> 149:156823d33999 4593 * @retval HAL status
<> 149:156823d33999 4594 */
<> 149:156823d33999 4595 static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
<> 149:156823d33999 4596 {
<> 149:156823d33999 4597 /* Enable Acknowledge */
<> 149:156823d33999 4598 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4599
<> 149:156823d33999 4600 /* Generate Start condition if first transfer */
<> 149:156823d33999 4601 if((hi2c->XferOptions == I2C_FIRST_AND_LAST_FRAME) || (hi2c->XferOptions == I2C_FIRST_FRAME) || (hi2c->XferOptions == I2C_NO_OPTION_FRAME))
<> 149:156823d33999 4602 {
<> 149:156823d33999 4603 /* Generate Start */
<> 149:156823d33999 4604 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 4605 }
<> 149:156823d33999 4606 else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
<> 149:156823d33999 4607 {
<> 149:156823d33999 4608 /* Generate ReStart */
<> 149:156823d33999 4609 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 4610 }
<> 149:156823d33999 4611
<> 149:156823d33999 4612 /* Wait until SB flag is set */
<> 149:156823d33999 4613 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4614 {
<> 149:156823d33999 4615 return HAL_TIMEOUT;
<> 149:156823d33999 4616 }
<> 149:156823d33999 4617
<> 149:156823d33999 4618 if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
<> 149:156823d33999 4619 {
<> 149:156823d33999 4620 /* Send slave address */
<> 149:156823d33999 4621 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
<> 149:156823d33999 4622 }
<> 149:156823d33999 4623 else
<> 149:156823d33999 4624 {
<> 149:156823d33999 4625 /* Send header of slave address */
<> 149:156823d33999 4626 hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
<> 149:156823d33999 4627
<> 149:156823d33999 4628 /* Wait until ADD10 flag is set */
<> 149:156823d33999 4629 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4630 {
<> 149:156823d33999 4631 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4632 {
<> 149:156823d33999 4633 return HAL_ERROR;
<> 149:156823d33999 4634 }
<> 149:156823d33999 4635 else
<> 149:156823d33999 4636 {
<> 149:156823d33999 4637 return HAL_TIMEOUT;
<> 149:156823d33999 4638 }
<> 149:156823d33999 4639 }
<> 149:156823d33999 4640
<> 149:156823d33999 4641 /* Send slave address */
<> 149:156823d33999 4642 hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
<> 149:156823d33999 4643
<> 149:156823d33999 4644 /* Wait until ADDR flag is set */
<> 149:156823d33999 4645 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4646 {
<> 149:156823d33999 4647 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4648 {
<> 149:156823d33999 4649 return HAL_ERROR;
<> 149:156823d33999 4650 }
<> 149:156823d33999 4651 else
<> 149:156823d33999 4652 {
<> 149:156823d33999 4653 return HAL_TIMEOUT;
<> 149:156823d33999 4654 }
<> 149:156823d33999 4655 }
<> 149:156823d33999 4656
<> 149:156823d33999 4657 /* Clear ADDR flag */
<> 149:156823d33999 4658 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 4659
<> 149:156823d33999 4660 /* Generate Restart */
<> 149:156823d33999 4661 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 4662
<> 149:156823d33999 4663 /* Wait until SB flag is set */
<> 149:156823d33999 4664 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4665 {
<> 149:156823d33999 4666 return HAL_TIMEOUT;
<> 149:156823d33999 4667 }
<> 149:156823d33999 4668
<> 149:156823d33999 4669 /* Send header of slave address */
<> 149:156823d33999 4670 hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
<> 149:156823d33999 4671 }
<> 149:156823d33999 4672
<> 149:156823d33999 4673 /* Wait until ADDR flag is set */
<> 149:156823d33999 4674 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4675 {
<> 149:156823d33999 4676 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4677 {
<> 149:156823d33999 4678 return HAL_ERROR;
<> 149:156823d33999 4679 }
<> 149:156823d33999 4680 else
<> 149:156823d33999 4681 {
<> 149:156823d33999 4682 return HAL_TIMEOUT;
<> 149:156823d33999 4683 }
<> 149:156823d33999 4684 }
<> 149:156823d33999 4685
<> 149:156823d33999 4686 return HAL_OK;
<> 149:156823d33999 4687 }
<> 149:156823d33999 4688
<> 149:156823d33999 4689 /**
<> 149:156823d33999 4690 * @brief Master sends target device address followed by internal memory address for write request.
<> 149:156823d33999 4691 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 4692 * the configuration information for I2C module
<> 149:156823d33999 4693 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 4694 * in datasheet must be shift at right before call interface
<> 149:156823d33999 4695 * @param MemAddress Internal memory address
<> 149:156823d33999 4696 * @param MemAddSize Size of internal memory address
<> 149:156823d33999 4697 * @param Timeout Timeout duration
<> 149:156823d33999 4698 * @param Tickstart Tick start value
<> 149:156823d33999 4699 * @retval HAL status
<> 149:156823d33999 4700 */
<> 149:156823d33999 4701 static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
<> 149:156823d33999 4702 {
<> 149:156823d33999 4703 /* Generate Start */
<> 149:156823d33999 4704 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 4705
<> 149:156823d33999 4706 /* Wait until SB flag is set */
<> 149:156823d33999 4707 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4708 {
<> 149:156823d33999 4709 return HAL_TIMEOUT;
<> 149:156823d33999 4710 }
<> 149:156823d33999 4711
<> 149:156823d33999 4712 /* Send slave address */
<> 149:156823d33999 4713 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
<> 149:156823d33999 4714
<> 149:156823d33999 4715 /* Wait until ADDR flag is set */
<> 149:156823d33999 4716 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4717 {
<> 149:156823d33999 4718 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4719 {
<> 149:156823d33999 4720 return HAL_ERROR;
<> 149:156823d33999 4721 }
<> 149:156823d33999 4722 else
<> 149:156823d33999 4723 {
<> 149:156823d33999 4724 return HAL_TIMEOUT;
<> 149:156823d33999 4725 }
<> 149:156823d33999 4726 }
<> 149:156823d33999 4727
<> 149:156823d33999 4728 /* Clear ADDR flag */
<> 149:156823d33999 4729 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 4730
<> 149:156823d33999 4731 /* Wait until TXE flag is set */
<> 149:156823d33999 4732 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4733 {
<> 149:156823d33999 4734 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4735 {
<> 149:156823d33999 4736 /* Generate Stop */
<> 149:156823d33999 4737 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
<> 149:156823d33999 4738 return HAL_ERROR;
<> 149:156823d33999 4739 }
<> 149:156823d33999 4740 else
<> 149:156823d33999 4741 {
<> 149:156823d33999 4742 return HAL_TIMEOUT;
<> 149:156823d33999 4743 }
<> 149:156823d33999 4744 }
<> 149:156823d33999 4745
<> 149:156823d33999 4746 /* If Memory address size is 8Bit */
<> 149:156823d33999 4747 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
<> 149:156823d33999 4748 {
<> 149:156823d33999 4749 /* Send Memory Address */
<> 149:156823d33999 4750 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
<> 149:156823d33999 4751 }
<> 149:156823d33999 4752 /* If Memory address size is 16Bit */
<> 149:156823d33999 4753 else
<> 149:156823d33999 4754 {
<> 149:156823d33999 4755 /* Send MSB of Memory Address */
<> 149:156823d33999 4756 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
<> 149:156823d33999 4757
<> 149:156823d33999 4758 /* Wait until TXE flag is set */
<> 149:156823d33999 4759 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4760 {
<> 149:156823d33999 4761 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4762 {
<> 149:156823d33999 4763 /* Generate Stop */
<> 149:156823d33999 4764 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
<> 149:156823d33999 4765 return HAL_ERROR;
<> 149:156823d33999 4766 }
<> 149:156823d33999 4767 else
<> 149:156823d33999 4768 {
<> 149:156823d33999 4769 return HAL_TIMEOUT;
<> 149:156823d33999 4770 }
<> 149:156823d33999 4771 }
<> 149:156823d33999 4772
<> 149:156823d33999 4773 /* Send LSB of Memory Address */
<> 149:156823d33999 4774 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
<> 149:156823d33999 4775 }
<> 149:156823d33999 4776
<> 149:156823d33999 4777 return HAL_OK;
<> 149:156823d33999 4778 }
<> 149:156823d33999 4779
<> 149:156823d33999 4780 /**
<> 149:156823d33999 4781 * @brief Master sends target device address followed by internal memory address for read request.
<> 149:156823d33999 4782 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 4783 * the configuration information for I2C module
<> 149:156823d33999 4784 * @param DevAddress Target device address: The device 7 bits address value
<> 149:156823d33999 4785 * in datasheet must be shift at right before call interface
<> 149:156823d33999 4786 * @param MemAddress Internal memory address
<> 149:156823d33999 4787 * @param MemAddSize Size of internal memory address
<> 149:156823d33999 4788 * @param Timeout Timeout duration
<> 149:156823d33999 4789 * @param Tickstart Tick start value
<> 149:156823d33999 4790 * @retval HAL status
<> 149:156823d33999 4791 */
<> 149:156823d33999 4792 static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
<> 149:156823d33999 4793 {
<> 149:156823d33999 4794 /* Enable Acknowledge */
<> 149:156823d33999 4795 SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4796
<> 149:156823d33999 4797 /* Generate Start */
<> 149:156823d33999 4798 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 4799
<> 149:156823d33999 4800 /* Wait until SB flag is set */
<> 149:156823d33999 4801 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4802 {
<> 149:156823d33999 4803 return HAL_TIMEOUT;
<> 149:156823d33999 4804 }
<> 149:156823d33999 4805
<> 149:156823d33999 4806 /* Send slave address */
<> 149:156823d33999 4807 hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
<> 149:156823d33999 4808
<> 149:156823d33999 4809 /* Wait until ADDR flag is set */
<> 149:156823d33999 4810 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4811 {
<> 149:156823d33999 4812 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4813 {
<> 149:156823d33999 4814 return HAL_ERROR;
<> 149:156823d33999 4815 }
<> 149:156823d33999 4816 else
<> 149:156823d33999 4817 {
<> 149:156823d33999 4818 return HAL_TIMEOUT;
<> 149:156823d33999 4819 }
<> 149:156823d33999 4820 }
<> 149:156823d33999 4821
<> 149:156823d33999 4822 /* Clear ADDR flag */
<> 149:156823d33999 4823 __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
<> 149:156823d33999 4824
<> 149:156823d33999 4825 /* Wait until TXE flag is set */
<> 149:156823d33999 4826 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4827 {
<> 149:156823d33999 4828 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4829 {
<> 149:156823d33999 4830 /* Generate Stop */
<> 149:156823d33999 4831 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
<> 149:156823d33999 4832 return HAL_ERROR;
<> 149:156823d33999 4833 }
<> 149:156823d33999 4834 else
<> 149:156823d33999 4835 {
<> 149:156823d33999 4836 return HAL_TIMEOUT;
<> 149:156823d33999 4837 }
<> 149:156823d33999 4838 }
<> 149:156823d33999 4839
<> 149:156823d33999 4840 /* If Memory address size is 8Bit */
<> 149:156823d33999 4841 if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
<> 149:156823d33999 4842 {
<> 149:156823d33999 4843 /* Send Memory Address */
<> 149:156823d33999 4844 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
<> 149:156823d33999 4845 }
<> 149:156823d33999 4846 /* If Memory address size is 16Bit */
<> 149:156823d33999 4847 else
<> 149:156823d33999 4848 {
<> 149:156823d33999 4849 /* Send MSB of Memory Address */
<> 149:156823d33999 4850 hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
<> 149:156823d33999 4851
<> 149:156823d33999 4852 /* Wait until TXE flag is set */
<> 149:156823d33999 4853 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4854 {
<> 149:156823d33999 4855 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4856 {
<> 149:156823d33999 4857 /* Generate Stop */
<> 149:156823d33999 4858 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
<> 149:156823d33999 4859 return HAL_ERROR;
<> 149:156823d33999 4860 }
<> 149:156823d33999 4861 else
<> 149:156823d33999 4862 {
<> 149:156823d33999 4863 return HAL_TIMEOUT;
<> 149:156823d33999 4864 }
<> 149:156823d33999 4865 }
<> 149:156823d33999 4866
<> 149:156823d33999 4867 /* Send LSB of Memory Address */
<> 149:156823d33999 4868 hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
<> 149:156823d33999 4869 }
<> 149:156823d33999 4870
<> 149:156823d33999 4871 /* Wait until TXE flag is set */
<> 149:156823d33999 4872 if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4873 {
<> 149:156823d33999 4874 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4875 {
<> 149:156823d33999 4876 /* Generate Stop */
<> 149:156823d33999 4877 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
<> 149:156823d33999 4878 return HAL_ERROR;
<> 149:156823d33999 4879 }
<> 149:156823d33999 4880 else
<> 149:156823d33999 4881 {
<> 149:156823d33999 4882 return HAL_TIMEOUT;
<> 149:156823d33999 4883 }
<> 149:156823d33999 4884 }
<> 149:156823d33999 4885
<> 149:156823d33999 4886 /* Generate Restart */
<> 149:156823d33999 4887 SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
<> 149:156823d33999 4888
<> 149:156823d33999 4889 /* Wait until SB flag is set */
<> 149:156823d33999 4890 if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4891 {
<> 149:156823d33999 4892 return HAL_TIMEOUT;
<> 149:156823d33999 4893 }
<> 149:156823d33999 4894
<> 149:156823d33999 4895 /* Send slave address */
<> 149:156823d33999 4896 hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
<> 149:156823d33999 4897
<> 149:156823d33999 4898 /* Wait until ADDR flag is set */
<> 149:156823d33999 4899 if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
<> 149:156823d33999 4900 {
<> 149:156823d33999 4901 if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
<> 149:156823d33999 4902 {
<> 149:156823d33999 4903 return HAL_ERROR;
<> 149:156823d33999 4904 }
<> 149:156823d33999 4905 else
<> 149:156823d33999 4906 {
<> 149:156823d33999 4907 return HAL_TIMEOUT;
<> 149:156823d33999 4908 }
<> 149:156823d33999 4909 }
<> 149:156823d33999 4910
<> 149:156823d33999 4911 return HAL_OK;
<> 149:156823d33999 4912 }
<> 149:156823d33999 4913
<> 149:156823d33999 4914 /**
<> 149:156823d33999 4915 * @brief DMA I2C process complete callback.
<> 149:156823d33999 4916 * @param hdma DMA handle
<> 149:156823d33999 4917 * @retval None
<> 149:156823d33999 4918 */
<> 149:156823d33999 4919 static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
<> 149:156823d33999 4920 {
<> 149:156823d33999 4921 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 149:156823d33999 4922
<> 149:156823d33999 4923 if((hi2c->State == HAL_I2C_STATE_BUSY_TX) || ((hi2c->State == HAL_I2C_STATE_BUSY_RX) && (hi2c->Mode == HAL_I2C_MODE_SLAVE)))
<> 149:156823d33999 4924 {
<> 149:156823d33999 4925 /* Disable DMA Request */
<> 149:156823d33999 4926 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
<> 149:156823d33999 4927
<> 149:156823d33999 4928 hi2c->XferCount = 0U;
<> 149:156823d33999 4929
<> 149:156823d33999 4930 /* Enable EVT and ERR interrupt */
<> 149:156823d33999 4931 __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
<> 149:156823d33999 4932 }
<> 149:156823d33999 4933 else
<> 149:156823d33999 4934 {
<> 149:156823d33999 4935 /* Disable Acknowledge */
<> 149:156823d33999 4936 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4937
<> 149:156823d33999 4938 /* Generate Stop */
<> 149:156823d33999 4939 SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
<> 149:156823d33999 4940
<> 149:156823d33999 4941 /* Disable Last DMA */
<> 149:156823d33999 4942 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_LAST);
<> 149:156823d33999 4943
<> 149:156823d33999 4944 /* Disable DMA Request */
<> 149:156823d33999 4945 CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN);
<> 149:156823d33999 4946
<> 149:156823d33999 4947 hi2c->XferCount = 0U;
<> 149:156823d33999 4948
<> 149:156823d33999 4949 /* Check if Errors has been detected during transfer */
<> 149:156823d33999 4950 if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
<> 149:156823d33999 4951 {
<> 149:156823d33999 4952 HAL_I2C_ErrorCallback(hi2c);
<> 149:156823d33999 4953 }
<> 149:156823d33999 4954 else
<> 149:156823d33999 4955 {
<> 149:156823d33999 4956 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 4957
<> 149:156823d33999 4958 if(hi2c->Mode == HAL_I2C_MODE_MEM)
<> 149:156823d33999 4959 {
<> 149:156823d33999 4960 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 4961
<> 149:156823d33999 4962 HAL_I2C_MemRxCpltCallback(hi2c);
<> 149:156823d33999 4963 }
<> 149:156823d33999 4964 else
<> 149:156823d33999 4965 {
<> 149:156823d33999 4966 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 4967
<> 149:156823d33999 4968 HAL_I2C_MasterRxCpltCallback(hi2c);
<> 149:156823d33999 4969 }
<> 149:156823d33999 4970 }
<> 149:156823d33999 4971 }
<> 149:156823d33999 4972 }
<> 149:156823d33999 4973
<> 149:156823d33999 4974 /**
<> 149:156823d33999 4975 * @brief DMA I2C communication error callback.
<> 149:156823d33999 4976 * @param hdma DMA handle
<> 149:156823d33999 4977 * @retval None
<> 149:156823d33999 4978 */
<> 149:156823d33999 4979 static void I2C_DMAError(DMA_HandleTypeDef *hdma)
<> 149:156823d33999 4980 {
<> 149:156823d33999 4981 I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 149:156823d33999 4982
<> 149:156823d33999 4983 /* Disable Acknowledge */
<> 149:156823d33999 4984 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 4985
<> 149:156823d33999 4986 hi2c->XferCount = 0U;
<> 149:156823d33999 4987
<> 149:156823d33999 4988 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 4989 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 4990
<> 149:156823d33999 4991 hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
<> 149:156823d33999 4992
<> 149:156823d33999 4993 HAL_I2C_ErrorCallback(hi2c);
<> 149:156823d33999 4994 }
<> 149:156823d33999 4995
<> 149:156823d33999 4996 /**
<> 149:156823d33999 4997 * @brief DMA I2C communication abort callback
<> 149:156823d33999 4998 * (To be called at end of DMA Abort procedure).
<> 149:156823d33999 4999 * @param hdma: DMA handle.
<> 149:156823d33999 5000 * @retval None
<> 149:156823d33999 5001 */
<> 149:156823d33999 5002 static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
<> 149:156823d33999 5003 {
<> 149:156823d33999 5004 I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 149:156823d33999 5005
<> 149:156823d33999 5006 /* Disable Acknowledge */
<> 149:156823d33999 5007 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
<> 149:156823d33999 5008
<> 149:156823d33999 5009 hi2c->XferCount = 0U;
<> 149:156823d33999 5010
<> 149:156823d33999 5011 /* Reset XferAbortCallback */
<> 149:156823d33999 5012 hi2c->hdmatx->XferAbortCallback = NULL;
<> 149:156823d33999 5013 hi2c->hdmarx->XferAbortCallback = NULL;
<> 149:156823d33999 5014
<> 149:156823d33999 5015 /* Check if come from abort from user */
<> 149:156823d33999 5016 if(hi2c->State == HAL_I2C_STATE_ABORT)
<> 149:156823d33999 5017 {
<> 149:156823d33999 5018 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 5019 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 5020 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 5021
<> 149:156823d33999 5022 /* Disable I2C peripheral to prevent dummy data in buffer */
<> 149:156823d33999 5023 __HAL_I2C_DISABLE(hi2c);
<> 149:156823d33999 5024
<> 149:156823d33999 5025 /* Call the corresponding callback to inform upper layer of End of Transfer */
<> 149:156823d33999 5026 HAL_I2C_AbortCpltCallback(hi2c);
<> 149:156823d33999 5027 }
<> 149:156823d33999 5028 else
<> 149:156823d33999 5029 {
<> 149:156823d33999 5030 hi2c->State = HAL_I2C_STATE_READY;
<> 149:156823d33999 5031 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 5032
<> 149:156823d33999 5033 /* Disable I2C peripheral to prevent dummy data in buffer */
<> 149:156823d33999 5034 __HAL_I2C_DISABLE(hi2c);
<> 149:156823d33999 5035
<> 149:156823d33999 5036 /* Call the corresponding callback to inform upper layer of End of Transfer */
<> 149:156823d33999 5037 HAL_I2C_ErrorCallback(hi2c);
<> 149:156823d33999 5038 }
<> 149:156823d33999 5039 }
<> 149:156823d33999 5040
<> 149:156823d33999 5041 /**
<> 149:156823d33999 5042 * @brief This function handles I2C Communication Timeout.
<> 149:156823d33999 5043 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 5044 * the configuration information for I2C module
<> 149:156823d33999 5045 * @param Flag specifies the I2C flag to check.
<> 149:156823d33999 5046 * @param Status The new Flag status (SET or RESET).
<> 149:156823d33999 5047 * @param Timeout Timeout duration
<> 149:156823d33999 5048 * @param Tickstart Tick start value
<> 149:156823d33999 5049 * @retval HAL status
<> 149:156823d33999 5050 */
<> 149:156823d33999 5051 static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
<> 149:156823d33999 5052 {
<> 149:156823d33999 5053 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
<> 149:156823d33999 5054 {
<> 149:156823d33999 5055 /* Check for the Timeout */
<> 149:156823d33999 5056 if(Timeout != HAL_MAX_DELAY)
<> 149:156823d33999 5057 {
<> 149:156823d33999 5058 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
<> 149:156823d33999 5059 {
<> 149:156823d33999 5060 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 5061 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 5062 hi2c->Mode = HAL_I2C_MODE_NONE;
<> 149:156823d33999 5063
<> 149:156823d33999 5064 /* Process Unlocked */
<> 149:156823d33999 5065 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 5066 return HAL_TIMEOUT;
<> 149:156823d33999 5067 }
<> 149:156823d33999 5068 }
<> 149:156823d33999 5069 }
<> 149:156823d33999 5070 return HAL_OK;
<> 149:156823d33999 5071 }
<> 149:156823d33999 5072
<> 149:156823d33999 5073 /**
<> 149:156823d33999 5074 * @brief This function handles I2C Communication Timeout for Master addressing phase.
<> 149:156823d33999 5075 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 5076 * the configuration information for I2C module
<> 149:156823d33999 5077 * @param Flag specifies the I2C flag to check.
<> 149:156823d33999 5078 * @param Timeout Timeout duration
<> 149:156823d33999 5079 * @param Tickstart Tick start value
<> 149:156823d33999 5080 * @retval HAL status
<> 149:156823d33999 5081 */
<> 149:156823d33999 5082 static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
<> 149:156823d33999 5083 {
<> 149:156823d33999 5084 while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
<> 149:156823d33999 5085 {
<> 149:156823d33999 5086 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
<> 149:156823d33999 5087 {
<> 149:156823d33999 5088 /* Generate Stop */
<> 149:156823d33999 5089 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
<> 149:156823d33999 5090
<> 149:156823d33999 5091 /* Clear AF Flag */
<> 149:156823d33999 5092 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
<> 149:156823d33999 5093
<> 149:156823d33999 5094 hi2c->ErrorCode = HAL_I2C_ERROR_AF;
<> 149:156823d33999 5095 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 5096 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 5097
<> 149:156823d33999 5098 /* Process Unlocked */
<> 149:156823d33999 5099 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 5100
<> 149:156823d33999 5101 return HAL_ERROR;
<> 149:156823d33999 5102 }
<> 149:156823d33999 5103
<> 149:156823d33999 5104 /* Check for the Timeout */
<> 149:156823d33999 5105 if(Timeout != HAL_MAX_DELAY)
<> 149:156823d33999 5106 {
<> 149:156823d33999 5107 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
<> 149:156823d33999 5108 {
<> 149:156823d33999 5109 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 5110 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 5111
<> 149:156823d33999 5112 /* Process Unlocked */
<> 149:156823d33999 5113 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 5114
<> 149:156823d33999 5115 return HAL_TIMEOUT;
<> 149:156823d33999 5116 }
<> 149:156823d33999 5117 }
<> 149:156823d33999 5118 }
<> 149:156823d33999 5119 return HAL_OK;
<> 149:156823d33999 5120 }
<> 149:156823d33999 5121
<> 149:156823d33999 5122 /**
<> 149:156823d33999 5123 * @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
<> 149:156823d33999 5124 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 5125 * the configuration information for the specified I2C.
<> 149:156823d33999 5126 * @param Timeout Timeout duration
<> 149:156823d33999 5127 * @param Tickstart Tick start value
<> 149:156823d33999 5128 * @retval HAL status
<> 149:156823d33999 5129 */
<> 149:156823d33999 5130 static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
<> 149:156823d33999 5131 {
<> 149:156823d33999 5132 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
<> 149:156823d33999 5133 {
<> 149:156823d33999 5134 /* Check if a NACK is detected */
<> 149:156823d33999 5135 if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
<> 149:156823d33999 5136 {
<> 149:156823d33999 5137 return HAL_ERROR;
<> 149:156823d33999 5138 }
<> 149:156823d33999 5139
<> 149:156823d33999 5140 /* Check for the Timeout */
<> 149:156823d33999 5141 if(Timeout != HAL_MAX_DELAY)
<> 149:156823d33999 5142 {
<> 149:156823d33999 5143 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
<> 149:156823d33999 5144 {
<> 149:156823d33999 5145 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
<> 149:156823d33999 5146 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 5147 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 5148
<> 149:156823d33999 5149 /* Process Unlocked */
<> 149:156823d33999 5150 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 5151
<> 149:156823d33999 5152 return HAL_TIMEOUT;
<> 149:156823d33999 5153 }
<> 149:156823d33999 5154 }
<> 149:156823d33999 5155 }
<> 149:156823d33999 5156 return HAL_OK;
<> 149:156823d33999 5157 }
<> 149:156823d33999 5158
<> 149:156823d33999 5159 /**
<> 149:156823d33999 5160 * @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
<> 149:156823d33999 5161 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 5162 * the configuration information for the specified I2C.
<> 149:156823d33999 5163 * @param Timeout Timeout duration
<> 149:156823d33999 5164 * @param Tickstart Tick start value
<> 149:156823d33999 5165 * @retval HAL status
<> 149:156823d33999 5166 */
<> 149:156823d33999 5167 static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
<> 149:156823d33999 5168 {
<> 149:156823d33999 5169 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
<> 149:156823d33999 5170 {
<> 149:156823d33999 5171 /* Check if a NACK is detected */
<> 149:156823d33999 5172 if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
<> 149:156823d33999 5173 {
<> 149:156823d33999 5174 return HAL_ERROR;
<> 149:156823d33999 5175 }
<> 149:156823d33999 5176
<> 149:156823d33999 5177 /* Check for the Timeout */
<> 149:156823d33999 5178 if(Timeout != HAL_MAX_DELAY)
<> 149:156823d33999 5179 {
<> 149:156823d33999 5180 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
<> 149:156823d33999 5181 {
<> 149:156823d33999 5182 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
<> 149:156823d33999 5183 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 5184 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 5185
<> 149:156823d33999 5186 /* Process Unlocked */
<> 149:156823d33999 5187 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 5188
<> 149:156823d33999 5189 return HAL_TIMEOUT;
<> 149:156823d33999 5190 }
<> 149:156823d33999 5191 }
<> 149:156823d33999 5192 }
<> 149:156823d33999 5193 return HAL_OK;
<> 149:156823d33999 5194 }
<> 149:156823d33999 5195
<> 149:156823d33999 5196 /**
<> 149:156823d33999 5197 * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
<> 149:156823d33999 5198 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 5199 * the configuration information for the specified I2C.
<> 149:156823d33999 5200 * @param Timeout Timeout duration
<> 149:156823d33999 5201 * @param Tickstart Tick start value
<> 149:156823d33999 5202 * @retval HAL status
<> 149:156823d33999 5203 */
<> 149:156823d33999 5204 static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
<> 149:156823d33999 5205 {
<> 149:156823d33999 5206 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
<> 149:156823d33999 5207 {
<> 149:156823d33999 5208 /* Check if a NACK is detected */
<> 149:156823d33999 5209 if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
<> 149:156823d33999 5210 {
<> 149:156823d33999 5211 return HAL_ERROR;
<> 149:156823d33999 5212 }
<> 149:156823d33999 5213
<> 149:156823d33999 5214 /* Check for the Timeout */
<> 149:156823d33999 5215 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
<> 149:156823d33999 5216 {
<> 149:156823d33999 5217 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
<> 149:156823d33999 5218 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 5219 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 5220
<> 149:156823d33999 5221 /* Process Unlocked */
<> 149:156823d33999 5222 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 5223
<> 149:156823d33999 5224 return HAL_TIMEOUT;
<> 149:156823d33999 5225 }
<> 149:156823d33999 5226 }
<> 149:156823d33999 5227 return HAL_OK;
<> 149:156823d33999 5228 }
<> 149:156823d33999 5229
<> 149:156823d33999 5230 /**
<> 149:156823d33999 5231 * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
<> 149:156823d33999 5232 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 5233 * the configuration information for the specified I2C.
<> 149:156823d33999 5234 * @param Timeout Timeout duration
<> 149:156823d33999 5235 * @param Tickstart Tick start value
<> 149:156823d33999 5236 * @retval HAL status
<> 149:156823d33999 5237 */
<> 149:156823d33999 5238 static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
<> 149:156823d33999 5239 {
<> 149:156823d33999 5240
<> 149:156823d33999 5241 while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
<> 149:156823d33999 5242 {
<> 149:156823d33999 5243 /* Check if a STOPF is detected */
<> 149:156823d33999 5244 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
<> 149:156823d33999 5245 {
<> 149:156823d33999 5246 /* Clear STOP Flag */
<> 149:156823d33999 5247 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
<> 149:156823d33999 5248
<> 149:156823d33999 5249 hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
<> 149:156823d33999 5250 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 5251 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 5252
<> 149:156823d33999 5253 /* Process Unlocked */
<> 149:156823d33999 5254 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 5255
<> 149:156823d33999 5256 return HAL_ERROR;
<> 149:156823d33999 5257 }
<> 149:156823d33999 5258
<> 149:156823d33999 5259 /* Check for the Timeout */
<> 149:156823d33999 5260 if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
<> 149:156823d33999 5261 {
<> 149:156823d33999 5262 hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
<> 149:156823d33999 5263 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 5264
<> 149:156823d33999 5265 /* Process Unlocked */
<> 149:156823d33999 5266 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 5267
<> 149:156823d33999 5268 return HAL_TIMEOUT;
<> 149:156823d33999 5269 }
<> 149:156823d33999 5270 }
<> 149:156823d33999 5271 return HAL_OK;
<> 149:156823d33999 5272 }
<> 149:156823d33999 5273
<> 149:156823d33999 5274 /**
<> 149:156823d33999 5275 * @brief This function handles Acknowledge failed detection during an I2C Communication.
<> 149:156823d33999 5276 * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
<> 149:156823d33999 5277 * the configuration information for the specified I2C.
<> 149:156823d33999 5278 * @retval HAL status
<> 149:156823d33999 5279 */
<> 149:156823d33999 5280 static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
<> 149:156823d33999 5281 {
<> 149:156823d33999 5282 if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
<> 149:156823d33999 5283 {
<> 149:156823d33999 5284 /* Clear NACKF Flag */
<> 149:156823d33999 5285 __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
<> 149:156823d33999 5286
<> 149:156823d33999 5287 hi2c->ErrorCode = HAL_I2C_ERROR_AF;
<> 149:156823d33999 5288 hi2c->PreviousState = I2C_STATE_NONE;
<> 149:156823d33999 5289 hi2c->State= HAL_I2C_STATE_READY;
<> 149:156823d33999 5290
<> 149:156823d33999 5291 /* Process Unlocked */
<> 149:156823d33999 5292 __HAL_UNLOCK(hi2c);
<> 149:156823d33999 5293
<> 149:156823d33999 5294 return HAL_ERROR;
<> 149:156823d33999 5295 }
<> 149:156823d33999 5296 return HAL_OK;
<> 149:156823d33999 5297 }
<> 149:156823d33999 5298 /**
<> 149:156823d33999 5299 * @}
<> 149:156823d33999 5300 */
<> 149:156823d33999 5301
<> 149:156823d33999 5302 #endif /* HAL_I2C_MODULE_ENABLED */
<> 149:156823d33999 5303
<> 149:156823d33999 5304 /**
<> 149:156823d33999 5305 * @}
<> 149:156823d33999 5306 */
<> 149:156823d33999 5307
<> 149:156823d33999 5308 /**
<> 149:156823d33999 5309 * @}
<> 149:156823d33999 5310 */
<> 149:156823d33999 5311
<> 149:156823d33999 5312 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/