João Victor / stm32f4-discovery-CAN-Activation

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targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_crc.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_STM/TARGET_STM32L4/stm32l4xx_hal_crc.h@144:ef7eb2e8f9f7
Child:
167:e84263d55307
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l4xx_hal_crc.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.5.1
<> 144:ef7eb2e8f9f7 6 * @date 31-May-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of CRC HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32L4xx_HAL_CRC_H
<> 144:ef7eb2e8f9f7 40 #define __STM32L4xx_HAL_CRC_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32l4xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32L4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup CRC
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 /** @defgroup CRC_Exported_Types CRC Exported Types
<> 144:ef7eb2e8f9f7 60 * @{
<> 144:ef7eb2e8f9f7 61 */
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /**
<> 144:ef7eb2e8f9f7 64 * @brief CRC HAL State Structure definition
<> 144:ef7eb2e8f9f7 65 */
<> 144:ef7eb2e8f9f7 66 typedef enum
<> 144:ef7eb2e8f9f7 67 {
<> 144:ef7eb2e8f9f7 68 HAL_CRC_STATE_RESET = 0x00, /*!< CRC not yet initialized or disabled */
<> 144:ef7eb2e8f9f7 69 HAL_CRC_STATE_READY = 0x01, /*!< CRC initialized and ready for use */
<> 144:ef7eb2e8f9f7 70 HAL_CRC_STATE_BUSY = 0x02, /*!< CRC internal process is ongoing */
<> 144:ef7eb2e8f9f7 71 HAL_CRC_STATE_TIMEOUT = 0x03, /*!< CRC timeout state */
<> 144:ef7eb2e8f9f7 72 HAL_CRC_STATE_ERROR = 0x04 /*!< CRC error state */
<> 144:ef7eb2e8f9f7 73 }HAL_CRC_StateTypeDef;
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 /**
<> 144:ef7eb2e8f9f7 78 * @brief CRC Init Structure definition
<> 144:ef7eb2e8f9f7 79 */
<> 144:ef7eb2e8f9f7 80 typedef struct
<> 144:ef7eb2e8f9f7 81 {
<> 144:ef7eb2e8f9f7 82 uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used.
<> 144:ef7eb2e8f9f7 83 If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default
<> 144:ef7eb2e8f9f7 84 X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1.
<> 144:ef7eb2e8f9f7 85 In that case, there is no need to set GeneratingPolynomial field.
<> 144:ef7eb2e8f9f7 86 If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set. */
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used.
<> 144:ef7eb2e8f9f7 89 If set to DEFAULT_INIT_VALUE_ENABLE, resort to default
<> 144:ef7eb2e8f9f7 90 0xFFFFFFFF value. In that case, there is no need to set InitValue field.
<> 144:ef7eb2e8f9f7 91 If otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set. */
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial as a 7, 8, 16 or 32-bit long value for a polynomial degree
<> 144:ef7eb2e8f9f7 94 respectively equal to 7, 8, 16 or 32. This field is written in normal representation,
<> 144:ef7eb2e8f9f7 95 e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65.
<> 144:ef7eb2e8f9f7 96 No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE. */
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length.
<> 144:ef7eb2e8f9f7 99 Value can be either one of
<> 144:ef7eb2e8f9f7 100 @arg @ref CRC_POLYLENGTH_32B (32-bit CRC),
<> 144:ef7eb2e8f9f7 101 @arg @ref CRC_POLYLENGTH_16B (16-bit CRC),
<> 144:ef7eb2e8f9f7 102 @arg @ref CRC_POLYLENGTH_8B (8-bit CRC),
<> 144:ef7eb2e8f9f7 103 @arg @ref CRC_POLYLENGTH_7B (7-bit CRC). */
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse
<> 144:ef7eb2e8f9f7 106 is set to DEFAULT_INIT_VALUE_ENABLE. */
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108 uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode.
<> 144:ef7eb2e8f9f7 109 Can be either one of the following values
<> 144:ef7eb2e8f9f7 110 @arg @ref CRC_INPUTDATA_INVERSION_NONE no input data inversion
<> 144:ef7eb2e8f9f7 111 @arg @ref CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2
<> 144:ef7eb2e8f9f7 112 @arg @ref CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C
<> 144:ef7eb2e8f9f7 113 @arg @ref CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode.
<> 144:ef7eb2e8f9f7 116 Can be either
<> 144:ef7eb2e8f9f7 117 @arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion,
<> 144:ef7eb2e8f9f7 118 @arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted into 0x22CC4488 */
<> 144:ef7eb2e8f9f7 119 }CRC_InitTypeDef;
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 /**
<> 144:ef7eb2e8f9f7 124 * @brief CRC Handle Structure definition
<> 144:ef7eb2e8f9f7 125 */
<> 144:ef7eb2e8f9f7 126 typedef struct
<> 144:ef7eb2e8f9f7 127 {
<> 144:ef7eb2e8f9f7 128 CRC_TypeDef *Instance; /*!< Register base address */
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 CRC_InitTypeDef Init; /*!< CRC configuration parameters */
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 HAL_LockTypeDef Lock; /*!< CRC Locking object */
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format.
<> 144:ef7eb2e8f9f7 137 Can be either
<> 144:ef7eb2e8f9f7 138 @arg @ref CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes (8-bit data)
<> 144:ef7eb2e8f9f7 139 @arg @ref CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of half-words (16-bit data)
<> 144:ef7eb2e8f9f7 140 @arg @ref CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words (32-bit data)
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error
<> 144:ef7eb2e8f9f7 143 must occur if InputBufferFormat is not one of the three values listed above */
<> 144:ef7eb2e8f9f7 144 }CRC_HandleTypeDef;
<> 144:ef7eb2e8f9f7 145
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147 /**
<> 144:ef7eb2e8f9f7 148 * @}
<> 144:ef7eb2e8f9f7 149 */
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 152 /** @defgroup CRC_Exported_Constants CRC Exported Constants
<> 144:ef7eb2e8f9f7 153 * @{
<> 144:ef7eb2e8f9f7 154 */
<> 144:ef7eb2e8f9f7 155
<> 144:ef7eb2e8f9f7 156 /** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial
<> 144:ef7eb2e8f9f7 157 * @{
<> 144:ef7eb2e8f9f7 158 */
<> 144:ef7eb2e8f9f7 159 #define DEFAULT_CRC32_POLY 0x04C11DB7 /*!< X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1 */
<> 144:ef7eb2e8f9f7 160 /**
<> 144:ef7eb2e8f9f7 161 * @}
<> 144:ef7eb2e8f9f7 162 */
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 /** @defgroup CRC_Default_InitValue Default CRC computation initialization value
<> 144:ef7eb2e8f9f7 165 * @{
<> 144:ef7eb2e8f9f7 166 */
<> 144:ef7eb2e8f9f7 167 #define DEFAULT_CRC_INITVALUE 0xFFFFFFFF /*!< Initial CRC default value */
<> 144:ef7eb2e8f9f7 168 /**
<> 144:ef7eb2e8f9f7 169 * @}
<> 144:ef7eb2e8f9f7 170 */
<> 144:ef7eb2e8f9f7 171
<> 144:ef7eb2e8f9f7 172 /** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used
<> 144:ef7eb2e8f9f7 173 * @{
<> 144:ef7eb2e8f9f7 174 */
<> 144:ef7eb2e8f9f7 175 #define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00) /*!< Enable default generating polynomial 0x04C11DB7 */
<> 144:ef7eb2e8f9f7 176 #define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01) /*!< Disable default generating polynomial 0x04C11DB7 */
<> 144:ef7eb2e8f9f7 177 /**
<> 144:ef7eb2e8f9f7 178 * @}
<> 144:ef7eb2e8f9f7 179 */
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 /** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used
<> 144:ef7eb2e8f9f7 182 * @{
<> 144:ef7eb2e8f9f7 183 */
<> 144:ef7eb2e8f9f7 184 #define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00) /*!< Enable initial CRC default value */
<> 144:ef7eb2e8f9f7 185 #define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01) /*!< Disable initial CRC default value */
<> 144:ef7eb2e8f9f7 186 /**
<> 144:ef7eb2e8f9f7 187 * @}
<> 144:ef7eb2e8f9f7 188 */
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 /** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the IP
<> 144:ef7eb2e8f9f7 191 * @{
<> 144:ef7eb2e8f9f7 192 */
<> 144:ef7eb2e8f9f7 193 #define CRC_POLYLENGTH_32B ((uint32_t)0x00000000) /*!< Resort to a 32-bit long generating polynomial */
<> 144:ef7eb2e8f9f7 194 #define CRC_POLYLENGTH_16B ((uint32_t)CRC_CR_POLYSIZE_0) /*!< Resort to a 16-bit long generating polynomial */
<> 144:ef7eb2e8f9f7 195 #define CRC_POLYLENGTH_8B ((uint32_t)CRC_CR_POLYSIZE_1) /*!< Resort to a 8-bit long generating polynomial */
<> 144:ef7eb2e8f9f7 196 #define CRC_POLYLENGTH_7B ((uint32_t)CRC_CR_POLYSIZE) /*!< Resort to a 7-bit long generating polynomial */
<> 144:ef7eb2e8f9f7 197 /**
<> 144:ef7eb2e8f9f7 198 * @}
<> 144:ef7eb2e8f9f7 199 */
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 /** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions
<> 144:ef7eb2e8f9f7 202 * @{
<> 144:ef7eb2e8f9f7 203 */
<> 144:ef7eb2e8f9f7 204 #define HAL_CRC_LENGTH_32B 32 /*!< 32-bit long CRC */
<> 144:ef7eb2e8f9f7 205 #define HAL_CRC_LENGTH_16B 16 /*!< 16-bit long CRC */
<> 144:ef7eb2e8f9f7 206 #define HAL_CRC_LENGTH_8B 8 /*!< 8-bit long CRC */
<> 144:ef7eb2e8f9f7 207 #define HAL_CRC_LENGTH_7B 7 /*!< 7-bit long CRC */
<> 144:ef7eb2e8f9f7 208 /**
<> 144:ef7eb2e8f9f7 209 * @}
<> 144:ef7eb2e8f9f7 210 */
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 /** @defgroup CRC_Input_Buffer_Format Input Buffer Format
<> 144:ef7eb2e8f9f7 213 * @{
<> 144:ef7eb2e8f9f7 214 */
<> 144:ef7eb2e8f9f7 215 /* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but
<> 144:ef7eb2e8f9f7 216 * an error is triggered in HAL_CRC_Init() if InputDataFormat field is set
<> 144:ef7eb2e8f9f7 217 * to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for
<> 144:ef7eb2e8f9f7 218 * the CRC APIs to provide a correct result */
<> 144:ef7eb2e8f9f7 219 #define CRC_INPUTDATA_FORMAT_UNDEFINED ((uint32_t)0x00000000) /*!< Undefined input data format */
<> 144:ef7eb2e8f9f7 220 #define CRC_INPUTDATA_FORMAT_BYTES ((uint32_t)0x00000001) /*!< Input data in byte format */
<> 144:ef7eb2e8f9f7 221 #define CRC_INPUTDATA_FORMAT_HALFWORDS ((uint32_t)0x00000002) /*!< Input data in half-word format */
<> 144:ef7eb2e8f9f7 222 #define CRC_INPUTDATA_FORMAT_WORDS ((uint32_t)0x00000003) /*!< Input data in word format */
<> 144:ef7eb2e8f9f7 223 /**
<> 144:ef7eb2e8f9f7 224 * @}
<> 144:ef7eb2e8f9f7 225 */
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /** @defgroup CRC_Aliases CRC API aliases
<> 144:ef7eb2e8f9f7 228 * @{
<> 144:ef7eb2e8f9f7 229 */
<> 144:ef7eb2e8f9f7 230 #define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */
<> 144:ef7eb2e8f9f7 231 #define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */
<> 144:ef7eb2e8f9f7 232 /**
<> 144:ef7eb2e8f9f7 233 * @}
<> 144:ef7eb2e8f9f7 234 */
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 /**
<> 144:ef7eb2e8f9f7 237 * @}
<> 144:ef7eb2e8f9f7 238 */
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 242 /** @defgroup CRC_Exported_Macros CRC Exported Macros
<> 144:ef7eb2e8f9f7 243 * @{
<> 144:ef7eb2e8f9f7 244 */
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 /** @brief Reset CRC handle state.
<> 144:ef7eb2e8f9f7 247 * @param __HANDLE__: CRC handle.
<> 144:ef7eb2e8f9f7 248 * @retval None
<> 144:ef7eb2e8f9f7 249 */
<> 144:ef7eb2e8f9f7 250 #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 /**
<> 144:ef7eb2e8f9f7 253 * @brief Reset CRC Data Register.
<> 144:ef7eb2e8f9f7 254 * @param __HANDLE__: CRC handle
<> 144:ef7eb2e8f9f7 255 * @retval None
<> 144:ef7eb2e8f9f7 256 */
<> 144:ef7eb2e8f9f7 257 #define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 /**
<> 144:ef7eb2e8f9f7 260 * @brief Set CRC INIT non-default value
<> 144:ef7eb2e8f9f7 261 * @param __HANDLE__: CRC handle
<> 144:ef7eb2e8f9f7 262 * @param __INIT__: 32-bit initial value
<> 144:ef7eb2e8f9f7 263 * @retval None
<> 144:ef7eb2e8f9f7 264 */
<> 144:ef7eb2e8f9f7 265 #define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__))
<> 144:ef7eb2e8f9f7 266
<> 144:ef7eb2e8f9f7 267 /**
<> 144:ef7eb2e8f9f7 268 * @brief Store a 8-bit data in the Independent Data(ID) register.
<> 144:ef7eb2e8f9f7 269 * @param __HANDLE__: CRC handle
<> 144:ef7eb2e8f9f7 270 * @param __VALUE__: 8-bit value to be stored in the ID register
<> 144:ef7eb2e8f9f7 271 * @retval None
<> 144:ef7eb2e8f9f7 272 */
<> 144:ef7eb2e8f9f7 273 #define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 /**
<> 144:ef7eb2e8f9f7 276 * @brief Return the 8-bit data stored in the Independent Data(ID) register.
<> 144:ef7eb2e8f9f7 277 * @param __HANDLE__: CRC handle
<> 144:ef7eb2e8f9f7 278 * @retval 8-bit value of the ID register
<> 144:ef7eb2e8f9f7 279 */
<> 144:ef7eb2e8f9f7 280 #define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
<> 144:ef7eb2e8f9f7 281 /**
<> 144:ef7eb2e8f9f7 282 * @}
<> 144:ef7eb2e8f9f7 283 */
<> 144:ef7eb2e8f9f7 284
<> 144:ef7eb2e8f9f7 285
<> 144:ef7eb2e8f9f7 286 /* Private macros --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 287 /** @addtogroup CRC_Private_Macros CRC Private Macros
<> 144:ef7eb2e8f9f7 288 * @{
<> 144:ef7eb2e8f9f7 289 */
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 #define IS_DEFAULT_POLYNOMIAL(DEFAULT) (((DEFAULT) == DEFAULT_POLYNOMIAL_ENABLE) || \
<> 144:ef7eb2e8f9f7 292 ((DEFAULT) == DEFAULT_POLYNOMIAL_DISABLE))
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 #define IS_DEFAULT_INIT_VALUE(VALUE) (((VALUE) == DEFAULT_INIT_VALUE_ENABLE) || \
<> 144:ef7eb2e8f9f7 296 ((VALUE) == DEFAULT_INIT_VALUE_DISABLE))
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 #define IS_CRC_POL_LENGTH(LENGTH) (((LENGTH) == CRC_POLYLENGTH_32B) || \
<> 144:ef7eb2e8f9f7 299 ((LENGTH) == CRC_POLYLENGTH_16B) || \
<> 144:ef7eb2e8f9f7 300 ((LENGTH) == CRC_POLYLENGTH_8B) || \
<> 144:ef7eb2e8f9f7 301 ((LENGTH) == CRC_POLYLENGTH_7B))
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 #define IS_CRC_INPUTDATA_FORMAT(FORMAT) (((FORMAT) == CRC_INPUTDATA_FORMAT_BYTES) || \
<> 144:ef7eb2e8f9f7 304 ((FORMAT) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
<> 144:ef7eb2e8f9f7 305 ((FORMAT) == CRC_INPUTDATA_FORMAT_WORDS))
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 /**
<> 144:ef7eb2e8f9f7 308 * @}
<> 144:ef7eb2e8f9f7 309 */
<> 144:ef7eb2e8f9f7 310
<> 144:ef7eb2e8f9f7 311 /* Include CRC HAL Extended module */
<> 144:ef7eb2e8f9f7 312 #include "stm32l4xx_hal_crc_ex.h"
<> 144:ef7eb2e8f9f7 313
<> 144:ef7eb2e8f9f7 314 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 315 /** @defgroup CRC_Exported_Functions CRC Exported Functions
<> 144:ef7eb2e8f9f7 316 * @{
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /* Initialization and de-initialization functions ****************************/
<> 144:ef7eb2e8f9f7 320 /** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 321 * @{
<> 144:ef7eb2e8f9f7 322 */
<> 144:ef7eb2e8f9f7 323 HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
<> 144:ef7eb2e8f9f7 324 HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc);
<> 144:ef7eb2e8f9f7 325 void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
<> 144:ef7eb2e8f9f7 326 void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
<> 144:ef7eb2e8f9f7 327 /**
<> 144:ef7eb2e8f9f7 328 * @}
<> 144:ef7eb2e8f9f7 329 */
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331 /* Peripheral Control functions ***********************************************/
<> 144:ef7eb2e8f9f7 332 /** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
<> 144:ef7eb2e8f9f7 333 * @{
<> 144:ef7eb2e8f9f7 334 */
<> 144:ef7eb2e8f9f7 335 uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
<> 144:ef7eb2e8f9f7 336 uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
<> 144:ef7eb2e8f9f7 337 /**
<> 144:ef7eb2e8f9f7 338 * @}
<> 144:ef7eb2e8f9f7 339 */
<> 144:ef7eb2e8f9f7 340
<> 144:ef7eb2e8f9f7 341 /* Peripheral State and Error functions ***************************************/
<> 144:ef7eb2e8f9f7 342 /** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
<> 144:ef7eb2e8f9f7 343 * @{
<> 144:ef7eb2e8f9f7 344 */
<> 144:ef7eb2e8f9f7 345 HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
<> 144:ef7eb2e8f9f7 346 /**
<> 144:ef7eb2e8f9f7 347 * @}
<> 144:ef7eb2e8f9f7 348 */
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 /**
<> 144:ef7eb2e8f9f7 351 * @}
<> 144:ef7eb2e8f9f7 352 */
<> 144:ef7eb2e8f9f7 353
<> 144:ef7eb2e8f9f7 354 /**
<> 144:ef7eb2e8f9f7 355 * @}
<> 144:ef7eb2e8f9f7 356 */
<> 144:ef7eb2e8f9f7 357
<> 144:ef7eb2e8f9f7 358 /**
<> 144:ef7eb2e8f9f7 359 * @}
<> 144:ef7eb2e8f9f7 360 */
<> 144:ef7eb2e8f9f7 361
<> 144:ef7eb2e8f9f7 362 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 363 }
<> 144:ef7eb2e8f9f7 364 #endif
<> 144:ef7eb2e8f9f7 365
<> 144:ef7eb2e8f9f7 366 #endif /* __STM32L4xx_HAL_CRC_H */
<> 144:ef7eb2e8f9f7 367
<> 144:ef7eb2e8f9f7 368 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/