Mahesh Phalke / Mbed OS ad7124_mbed_temperature-measure-example

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Dependencies:   platform_drivers AD7124_no_OS adi_console_menu tempsensors_prv

app/ad7124_regs_config_thermocouple.c@5:90166c496b01, 2021-03-19 (annotated)

Committer:
mahphalke
Date:
Fri Mar 19 12:33:00 2021 +0530
Revision:
5:90166c496b01
Parent:
0:08ba94bc5a30 
Bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mahphalke 0:08ba94bc5a30 1 /***************************************************************************//**
mahphalke 0:08ba94bc5a30 2 * @file ad7124_regs_config_thermocouple.c
mahphalke 0:08ba94bc5a30 3 * @brief AD7124 register configuration file for thermocouple sensor interface
mahphalke 0:08ba94bc5a30 4 * @details
mahphalke 0:08ba94bc5a30 5 ********************************************************************************
mahphalke 0:08ba94bc5a30 6 * Copyright (c) 2021 Analog Devices, Inc.
mahphalke 0:08ba94bc5a30 7 * All rights reserved.
mahphalke 0:08ba94bc5a30 8 *
mahphalke 0:08ba94bc5a30 9 * This software is proprietary to Analog Devices, Inc. and its licensors.
mahphalke 0:08ba94bc5a30 10 * By using this software you agree to the terms of the associated
mahphalke 0:08ba94bc5a30 11 * Analog Devices Software License Agreement.
mahphalke 0:08ba94bc5a30 12 *******************************************************************************/
mahphalke 0:08ba94bc5a30 13
mahphalke 0:08ba94bc5a30 14 /******************************************************************************/
mahphalke 0:08ba94bc5a30 15 /***************************** Include Files **********************************/
mahphalke 0:08ba94bc5a30 16 /******************************************************************************/
mahphalke 0:08ba94bc5a30 17
mahphalke 0:08ba94bc5a30 18 #include "ad7124_regs_configs.h"
mahphalke 0:08ba94bc5a30 19
mahphalke 0:08ba94bc5a30 20 /******************************************************************************/
mahphalke 0:08ba94bc5a30 21 /********************* Macros and Constants Definitions ***********************/
mahphalke 0:08ba94bc5a30 22 /******************************************************************************/
mahphalke 0:08ba94bc5a30 23
mahphalke 0:08ba94bc5a30 24 const struct ad7124_st_reg ad7124_regs_config_thermocouple[AD7124_REG_NO] = {
mahphalke 0:08ba94bc5a30 25 { AD7124_STATUS_REG, 0x0, 1, AD7124_R },
mahphalke 0:08ba94bc5a30 26 {
mahphalke 0:08ba94bc5a30 27 AD7124_ADC_CTRL_REG,
mahphalke 0:08ba94bc5a30 28 AD7124_ADC_CTRL_REG_MODE(2) | AD7124_ADC_CTRL_REG_REF_EN | // ADC in Standby mode, Int Ref enabled
mahphalke 0:08ba94bc5a30 29 AD7124_ADC_CTRL_REG_POWER_MODE(2) | // Full power mode
mahphalke 0:08ba94bc5a30 30 AD7124_ADC_CTRL_REG_CS_EN | AD7124_ADC_CTRL_REG_DATA_STATUS, // CS mode enable, Status along data
mahphalke 0:08ba94bc5a30 31 2, AD7124_RW
mahphalke 0:08ba94bc5a30 32 },
mahphalke 0:08ba94bc5a30 33 { AD7124_DATA_REG, 0x0, 3, AD7124_R },
mahphalke 0:08ba94bc5a30 34 { AD7124_IO_CTRL1_REG, 0x0, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 35 { AD7124_IO_CTRL2_REG, 0x0, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 36 { AD7124_ID_REG, 0x0, 1, AD7124_R },
mahphalke 0:08ba94bc5a30 37 { AD7124_ERR_REG, 0x0, 3, AD7124_R },
mahphalke 0:08ba94bc5a30 38 {
mahphalke 0:08ba94bc5a30 39 AD7124_ERREN_REG,
mahphalke 0:08ba94bc5a30 40 AD7124_ERR_REG_SPI_CRC_ERR | AD7124_ERR_REG_SPI_IGNORE_ERR |
mahphalke 0:08ba94bc5a30 41 AD7124_ERREN_REG_ADC_CAL_ERR_EN, // Monitor ADC calibration error
mahphalke 0:08ba94bc5a30 42 3,
mahphalke 0:08ba94bc5a30 43 AD7124_RW
mahphalke 0:08ba94bc5a30 44 },
mahphalke 0:08ba94bc5a30 45 { 0x08, 0x00, 1, AD7124_R },
mahphalke 0:08ba94bc5a30 46 {
mahphalke 0:08ba94bc5a30 47 AD7124_CH0_MAP_REG,
mahphalke 0:08ba94bc5a30 48 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 0:08ba94bc5a30 49 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE1_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE1_AINM),
mahphalke 0:08ba94bc5a30 50 2, AD7124_RW
mahphalke 0:08ba94bc5a30 51 },
mahphalke 0:08ba94bc5a30 52 {
mahphalke 0:08ba94bc5a30 53 AD7124_CH1_MAP_REG,
mahphalke 0:08ba94bc5a30 54 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 0:08ba94bc5a30 55 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE2_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE2_AINM),
mahphalke 0:08ba94bc5a30 56 2, AD7124_RW
mahphalke 0:08ba94bc5a30 57 },
mahphalke 0:08ba94bc5a30 58 {
mahphalke 0:08ba94bc5a30 59 AD7124_CH2_MAP_REG,
mahphalke 0:08ba94bc5a30 60 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 0:08ba94bc5a30 61 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE3_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE3_AINM),
mahphalke 0:08ba94bc5a30 62 2,
mahphalke 0:08ba94bc5a30 63 AD7124_RW
mahphalke 0:08ba94bc5a30 64 },
mahphalke 0:08ba94bc5a30 65 {
mahphalke 0:08ba94bc5a30 66 AD7124_CH3_MAP_REG,
mahphalke 0:08ba94bc5a30 67 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 0:08ba94bc5a30 68 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE4_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE4_AINM),
mahphalke 0:08ba94bc5a30 69 2,
mahphalke 0:08ba94bc5a30 70 AD7124_RW
mahphalke 0:08ba94bc5a30 71 },
mahphalke 0:08ba94bc5a30 72 {
mahphalke 0:08ba94bc5a30 73 AD7124_CH4_MAP_REG,
mahphalke 0:08ba94bc5a30 74 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 0:08ba94bc5a30 75 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE5_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE5_AINM),
mahphalke 0:08ba94bc5a30 76 2,
mahphalke 0:08ba94bc5a30 77 AD7124_RW
mahphalke 0:08ba94bc5a30 78 },
mahphalke 0:08ba94bc5a30 79 {
mahphalke 0:08ba94bc5a30 80 AD7124_CH5_MAP_REG,
mahphalke 0:08ba94bc5a30 81 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 0:08ba94bc5a30 82 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE6_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE6_AINM),
mahphalke 0:08ba94bc5a30 83 2,
mahphalke 0:08ba94bc5a30 84 AD7124_RW
mahphalke 0:08ba94bc5a30 85 },
mahphalke 0:08ba94bc5a30 86 {
mahphalke 0:08ba94bc5a30 87 AD7124_CH6_MAP_REG,
mahphalke 0:08ba94bc5a30 88 AD7124_CH_MAP_REG_SETUP(1) |
mahphalke 5:90166c496b01 89 AD7124_CH_MAP_REG_AINP(CJC_RTD_AINP) | AD7124_CH_MAP_REG_AINM(CJC_RTD_AINM),
mahphalke 0:08ba94bc5a30 90 2, AD7124_RW
mahphalke 0:08ba94bc5a30 91 },
mahphalke 0:08ba94bc5a30 92 {
mahphalke 0:08ba94bc5a30 93 AD7124_CH7_MAP_REG,
mahphalke 0:08ba94bc5a30 94 AD7124_CH_MAP_REG_SETUP(2) |
mahphalke 0:08ba94bc5a30 95 AD7124_CH_MAP_REG_AINP(CJC_PTC_THERMISTOR_AINP) | AD7124_CH_MAP_REG_AINM(CJC_PTC_THERMISTOR_AINM),
mahphalke 0:08ba94bc5a30 96 2, AD7124_RW
mahphalke 0:08ba94bc5a30 97 },
mahphalke 0:08ba94bc5a30 98 { AD7124_CH8_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 99 { AD7124_CH9_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 100 { AD7124_CH10_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 101 { AD7124_CH11_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 102 { AD7124_CH12_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 103 { AD7124_CH13_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 104 { AD7124_CH14_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 105 { AD7124_CH15_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 106
mahphalke 0:08ba94bc5a30 107 {
mahphalke 0:08ba94bc5a30 108 AD7124_CFG0_REG,
mahphalke 0:08ba94bc5a30 109 AD7124_CFG_REG_PGA(THERMOCOUPLE_GAIN_VALUE) | AD7124_CFG_REG_REF_SEL(2) | // Internal Ref
mahphalke 0:08ba94bc5a30 110 AD7124_CFG_REG_BIPOLAR | // Bipolar inputs
mahphalke 0:08ba94bc5a30 111 AD7124_CFG_REG_AINN_BUFM | AD7124_CFG_REG_AIN_BUFP | // Input buffers enabled
mahphalke 0:08ba94bc5a30 112 AD7124_CFG_REG_REF_BUFM | AD7124_CFG_REG_REF_BUFP, // Ref buffers enabled
mahphalke 0:08ba94bc5a30 113 2, AD7124_RW
mahphalke 0:08ba94bc5a30 114 },
mahphalke 0:08ba94bc5a30 115 {
mahphalke 0:08ba94bc5a30 116 AD7124_CFG1_REG,
mahphalke 5:90166c496b01 117 AD7124_CFG_REG_PGA(RTD_2WIRE_GAIN_VALUE) | AD7124_CFG_REG_REF_SEL(0) | // External REFIN
mahphalke 0:08ba94bc5a30 118 AD7124_CFG_REG_BIPOLAR | // Bipolar inputs
mahphalke 0:08ba94bc5a30 119 AD7124_CFG_REG_AINN_BUFM | AD7124_CFG_REG_AIN_BUFP | // Input buffers enabled
mahphalke 0:08ba94bc5a30 120 AD7124_CFG_REG_REF_BUFM | AD7124_CFG_REG_REF_BUFP, // Ref buffers enabled
mahphalke 0:08ba94bc5a30 121 2, AD7124_RW
mahphalke 0:08ba94bc5a30 122 },
mahphalke 0:08ba94bc5a30 123 {
mahphalke 0:08ba94bc5a30 124 AD7124_CFG2_REG,
mahphalke 0:08ba94bc5a30 125 AD7124_CFG_REG_PGA(THERMISTOR_GAIN_VALUE) | AD7124_CFG_REG_REF_SEL(0) | // External REFIN
mahphalke 0:08ba94bc5a30 126 AD7124_CFG_REG_BIPOLAR | // Bipolar inputs
mahphalke 0:08ba94bc5a30 127 AD7124_CFG_REG_AINN_BUFM | AD7124_CFG_REG_AIN_BUFP | // Input buffers enabled
mahphalke 0:08ba94bc5a30 128 AD7124_CFG_REG_REF_BUFM | AD7124_CFG_REG_REF_BUFP, // Ref buffers enabled
mahphalke 0:08ba94bc5a30 129 2, AD7124_RW
mahphalke 0:08ba94bc5a30 130 },
mahphalke 0:08ba94bc5a30 131 { AD7124_CFG3_REG, 0x0860, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 132 { AD7124_CFG4_REG, 0x0860, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 133 { AD7124_CFG5_REG, 0x0860, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 134 { AD7124_CFG6_REG, 0x0860, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 135 { AD7124_CFG7_REG, 0x0860, 2, AD7124_RW },
mahphalke 0:08ba94bc5a30 136
mahphalke 0:08ba94bc5a30 137 {
mahphalke 0:08ba94bc5a30 138 AD7124_FILT0_REG,
mahphalke 0:08ba94bc5a30 139 AD7124_FILT_REG_FS(48) | AD7124_FILT_REG_POST_FILTER(3), // ODR= 50SPS, Post filter= 25SPS
mahphalke 0:08ba94bc5a30 140 3, AD7124_RW
mahphalke 0:08ba94bc5a30 141 },
mahphalke 0:08ba94bc5a30 142 {
mahphalke 0:08ba94bc5a30 143 AD7124_FILT1_REG,
mahphalke 0:08ba94bc5a30 144 AD7124_FILT_REG_FS(48) | AD7124_FILT_REG_POST_FILTER(3), // ODR= 50SPS, Post filter= 25SPS
mahphalke 0:08ba94bc5a30 145 3, AD7124_RW
mahphalke 0:08ba94bc5a30 146 },
mahphalke 0:08ba94bc5a30 147 {
mahphalke 0:08ba94bc5a30 148 AD7124_FILT2_REG,
mahphalke 0:08ba94bc5a30 149 AD7124_FILT_REG_FS(48) | AD7124_FILT_REG_POST_FILTER(3), // ODR= 50SPS, Post filter= 25SPS
mahphalke 0:08ba94bc5a30 150 3, AD7124_RW
mahphalke 0:08ba94bc5a30 151 },
mahphalke 0:08ba94bc5a30 152 { AD7124_FILT3_REG, 0x060180, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 153 { AD7124_FILT4_REG, 0x060180, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 154 { AD7124_FILT5_REG, 0x060180, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 155 { AD7124_FILT6_REG, 0x060180, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 156 { AD7124_FILT7_REG, 0x060180, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 157
mahphalke 0:08ba94bc5a30 158 {AD7124_OFFS0_REG, 0x800000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 159 {AD7124_OFFS1_REG, 0x800000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 160 {AD7124_OFFS2_REG, 0x800000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 161 {AD7124_OFFS3_REG, 0x800000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 162 {AD7124_OFFS4_REG, 0x800000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 163 {AD7124_OFFS5_REG, 0x800000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 164 {AD7124_OFFS6_REG, 0x800000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 165 {AD7124_OFFS7_REG, 0x800000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 166
mahphalke 0:08ba94bc5a30 167 {AD7124_GAIN0_REG, 0x500000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 168 {AD7124_GAIN1_REG, 0x500000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 169 {AD7124_GAIN2_REG, 0x500000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 170 {AD7124_GAIN3_REG, 0x500000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 171 {AD7124_GAIN4_REG, 0x500000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 172 {AD7124_GAIN5_REG, 0x500000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 173 {AD7124_GAIN6_REG, 0x500000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 174 {AD7124_GAIN7_REG, 0x500000, 3, AD7124_RW },
mahphalke 0:08ba94bc5a30 175 };