Revision 600:7d17ca308cd1, committed 2015-07-31

Comitter:

mbed_official

Date:

Fri Jul 31 14:15:09 2015 +0100

Parent:

599:efb83a170500

Child:

601:248b0d2dd755

Commit message:

Synchronized with git revision e4cd8bbd3e05b68e5a7f466c74035a85743d45e0

Full URL: https://github.com/mbedmicro/mbed/commit/e4cd8bbd3e05b68e5a7f466c74035a85743d45e0/

Enable LPC8xx usart when configuring it

Changed in this revision

--- a/targets/hal/TARGET_NXP/TARGET_LPC81X/serial_api.c	Fri Jul 31 14:00:09 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC81X/serial_api.c	Fri Jul 31 14:15:09 2015 +0100
@@ -196,8 +196,18 @@
         default:
             break;
     }
-    
-    obj->uart->CFG = (data_bits << 2)
+
+    // First disable the the usart as described in documentation and then enable while updating CFG
+
+    // 24.6.1 USART Configuration register
+    // Remark: If software needs to change configuration values, the following sequence should
+    // be used: 1) Make sure the USART is not currently sending or receiving data. 2) Disable
+    // the USART by writing a 0 to the Enable bit (0 may be written to the entire register). 3)
+    // Write the new configuration value, with the ENABLE bit set to 1.
+    obj->uart->CFG &= ~(1 << 0);
+
+    obj->uart->CFG = (1 << 0) // this will enable the usart
+                   | (data_bits << 2)
                    | (paritysel << 4)
                    | (stop_bits << 6);
 }

--- a/targets/hal/TARGET_NXP/TARGET_LPC82X/serial_api.c	Fri Jul 31 14:00:09 2015 +0100
+++ b/targets/hal/TARGET_NXP/TARGET_LPC82X/serial_api.c	Fri Jul 31 14:15:09 2015 +0100
@@ -230,7 +230,17 @@
             break;
     }
 
-    obj->uart->CFG = (data_bits << 2)
+    // First disable the the usart as described in documentation and then enable while updating CFG
+
+    // 24.6.1 USART Configuration register
+    // Remark: If software needs to change configuration values, the following sequence should
+    // be used: 1) Make sure the USART is not currently sending or receiving data. 2) Disable
+    // the USART by writing a 0 to the Enable bit (0 may be written to the entire register). 3)
+    // Write the new configuration value, with the ENABLE bit set to 1.
+    obj->uart->CFG &= ~(1 << 0);
+
+    obj->uart->CFG = (1 << 0) // this will enable the usart
+                   | (data_bits << 2)
                    | (paritysel << 4)
                    | (stop_bits << 6);
 }