lzbp li / mbed-stm32l0l1-src-un

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Fork of mbed-stm32l0/l1-src by lzbp li

api/SPI.h@10:3bc89ef62ce7, 2013-06-14 (annotated)

Committer:
emilmont
Date:
Fri Jun 14 17:49:17 2013 +0100
Revision:
10:3bc89ef62ce7
Parent:
9:0ce32e54c9a7
Child:
13:0645d8841f51
Unify mbed library sources

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed Microcontroller Library
emilmont 10:3bc89ef62ce7 2 * Copyright (c) 2006-2013 ARM Limited
emilmont 10:3bc89ef62ce7 3 *
emilmont 10:3bc89ef62ce7 4 * Licensed under the Apache License, Version 2.0 (the "License");
emilmont 10:3bc89ef62ce7 5 * you may not use this file except in compliance with the License.
emilmont 10:3bc89ef62ce7 6 * You may obtain a copy of the License at
emilmont 10:3bc89ef62ce7 7 *
emilmont 10:3bc89ef62ce7 8 * http://www.apache.org/licenses/LICENSE-2.0
emilmont 10:3bc89ef62ce7 9 *
emilmont 10:3bc89ef62ce7 10 * Unless required by applicable law or agreed to in writing, software
emilmont 10:3bc89ef62ce7 11 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 10:3bc89ef62ce7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 10:3bc89ef62ce7 13 * See the License for the specific language governing permissions and
emilmont 10:3bc89ef62ce7 14 * limitations under the License.
emilmont 10:3bc89ef62ce7 15 */
emilmont 10:3bc89ef62ce7 16 #ifndef MBED_SPI_H
emilmont 10:3bc89ef62ce7 17 #define MBED_SPI_H
emilmont 10:3bc89ef62ce7 18
emilmont 10:3bc89ef62ce7 19 #include "platform.h"
emilmont 10:3bc89ef62ce7 20
emilmont 10:3bc89ef62ce7 21 #if DEVICE_SPI
emilmont 10:3bc89ef62ce7 22
emilmont 10:3bc89ef62ce7 23 #include "spi_api.h"
emilmont 10:3bc89ef62ce7 24
emilmont 10:3bc89ef62ce7 25 namespace mbed {
emilmont 10:3bc89ef62ce7 26
emilmont 10:3bc89ef62ce7 27 /** A SPI Master, used for communicating with SPI slave devices
emilmont 10:3bc89ef62ce7 28 *
emilmont 10:3bc89ef62ce7 29 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
emilmont 10:3bc89ef62ce7 30 *
emilmont 10:3bc89ef62ce7 31 * Most SPI devices will also require Chip Select and Reset signals. These
emilmont 10:3bc89ef62ce7 32 * can be controlled using <DigitalOut> pins
emilmont 10:3bc89ef62ce7 33 *
emilmont 10:3bc89ef62ce7 34 * Example:
emilmont 10:3bc89ef62ce7 35 * @code
emilmont 10:3bc89ef62ce7 36 * // Send a byte to a SPI slave, and record the response
emilmont 10:3bc89ef62ce7 37 *
emilmont 10:3bc89ef62ce7 38 * #include "mbed.h"
emilmont 10:3bc89ef62ce7 39 *
emilmont 10:3bc89ef62ce7 40 * SPI device(p5, p6, p7); // mosi, miso, sclk
emilmont 10:3bc89ef62ce7 41 *
emilmont 10:3bc89ef62ce7 42 * int main() {
emilmont 10:3bc89ef62ce7 43 * int response = device.write(0xFF);
emilmont 10:3bc89ef62ce7 44 * }
emilmont 10:3bc89ef62ce7 45 * @endcode
emilmont 10:3bc89ef62ce7 46 */
emilmont 10:3bc89ef62ce7 47 class SPI {
emilmont 10:3bc89ef62ce7 48
emilmont 10:3bc89ef62ce7 49 public:
emilmont 10:3bc89ef62ce7 50
emilmont 10:3bc89ef62ce7 51 /** Create a SPI master connected to the specified pins
emilmont 10:3bc89ef62ce7 52 *
emilmont 10:3bc89ef62ce7 53 * Pin Options:
emilmont 10:3bc89ef62ce7 54 * (5, 6, 7) or (11, 12, 13)
emilmont 10:3bc89ef62ce7 55 *
emilmont 10:3bc89ef62ce7 56 * mosi or miso can be specfied as NC if not used
emilmont 10:3bc89ef62ce7 57 *
emilmont 10:3bc89ef62ce7 58 * @param mosi SPI Master Out, Slave In pin
emilmont 10:3bc89ef62ce7 59 * @param miso SPI Master In, Slave Out pin
emilmont 10:3bc89ef62ce7 60 * @param sclk SPI Clock pin
emilmont 10:3bc89ef62ce7 61 */
emilmont 10:3bc89ef62ce7 62 SPI(PinName mosi, PinName miso, PinName sclk);
emilmont 10:3bc89ef62ce7 63
emilmont 10:3bc89ef62ce7 64 /** Configure the data transmission format
emilmont 10:3bc89ef62ce7 65 *
emilmont 10:3bc89ef62ce7 66 * @param bits Number of bits per SPI frame (4 - 16)
emilmont 10:3bc89ef62ce7 67 * @param mode Clock polarity and phase mode (0 - 3)
emilmont 10:3bc89ef62ce7 68 *
emilmont 10:3bc89ef62ce7 69 * @code
emilmont 10:3bc89ef62ce7 70 * mode | POL PHA
emilmont 10:3bc89ef62ce7 71 * -----+--------
emilmont 10:3bc89ef62ce7 72 * 0 | 0 0
emilmont 10:3bc89ef62ce7 73 * 1 | 0 1
emilmont 10:3bc89ef62ce7 74 * 2 | 1 0
emilmont 10:3bc89ef62ce7 75 * 3 | 1 1
emilmont 10:3bc89ef62ce7 76 * @endcode
emilmont 10:3bc89ef62ce7 77 */
emilmont 10:3bc89ef62ce7 78 void format(int bits, int mode = 0);
emilmont 10:3bc89ef62ce7 79
emilmont 10:3bc89ef62ce7 80 /** Set the spi bus clock frequency
emilmont 10:3bc89ef62ce7 81 *
emilmont 10:3bc89ef62ce7 82 * @param hz SCLK frequency in hz (default = 1MHz)
emilmont 10:3bc89ef62ce7 83 */
emilmont 10:3bc89ef62ce7 84 void frequency(int hz = 1000000);
emilmont 10:3bc89ef62ce7 85
emilmont 10:3bc89ef62ce7 86 /** Write to the SPI Slave and return the response
emilmont 10:3bc89ef62ce7 87 *
emilmont 10:3bc89ef62ce7 88 * @param value Data to be sent to the SPI slave
emilmont 10:3bc89ef62ce7 89 *
emilmont 10:3bc89ef62ce7 90 * @returns
emilmont 10:3bc89ef62ce7 91 * Response from the SPI slave
emilmont 10:3bc89ef62ce7 92 */
emilmont 10:3bc89ef62ce7 93 virtual int write(int value);
emilmont 10:3bc89ef62ce7 94
emilmont 10:3bc89ef62ce7 95 protected:
emilmont 10:3bc89ef62ce7 96 spi_t _spi;
emilmont 10:3bc89ef62ce7 97
emilmont 10:3bc89ef62ce7 98 void aquire(void);
emilmont 10:3bc89ef62ce7 99 static SPI *_owner;
emilmont 10:3bc89ef62ce7 100 int _bits;
emilmont 10:3bc89ef62ce7 101 int _mode;
emilmont 10:3bc89ef62ce7 102 int _hz;
emilmont 10:3bc89ef62ce7 103 };
emilmont 10:3bc89ef62ce7 104
emilmont 10:3bc89ef62ce7 105 } // namespace mbed
emilmont 10:3bc89ef62ce7 106
emilmont 10:3bc89ef62ce7 107 #endif
emilmont 10:3bc89ef62ce7 108
emilmont 10:3bc89ef62ce7 109 #endif