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targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_pwr.c@638:56887a2974b9, 2016-09-08 (annotated)
- Committer:
- lzbpli
- Date:
- Thu Sep 08 02:46:37 2016 +0000
- Revision:
- 638:56887a2974b9
- Parent:
- 489:119543c9f674
????
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 376:cb4d9db17537 | 1 | /** |
mbed_official | 376:cb4d9db17537 | 2 | ****************************************************************************** |
mbed_official | 376:cb4d9db17537 | 3 | * @file stm32l0xx_hal_pwr.c |
mbed_official | 376:cb4d9db17537 | 4 | * @author MCD Application Team |
mbed_official | 489:119543c9f674 | 5 | * @version V1.2.0 |
mbed_official | 489:119543c9f674 | 6 | * @date 06-February-2015 |
mbed_official | 376:cb4d9db17537 | 7 | * @brief PWR HAL module driver. |
mbed_official | 376:cb4d9db17537 | 8 | * |
mbed_official | 376:cb4d9db17537 | 9 | * This file provides firmware functions to manage the following |
mbed_official | 376:cb4d9db17537 | 10 | * functionalities of the Power Controller (PWR) peripheral: |
mbed_official | 376:cb4d9db17537 | 11 | * + Initialization/de-initialization functions |
mbed_official | 376:cb4d9db17537 | 12 | * + Peripheral Control functions |
mbed_official | 376:cb4d9db17537 | 13 | * |
mbed_official | 376:cb4d9db17537 | 14 | ****************************************************************************** |
mbed_official | 376:cb4d9db17537 | 15 | * @attention |
mbed_official | 376:cb4d9db17537 | 16 | * |
mbed_official | 489:119543c9f674 | 17 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
mbed_official | 376:cb4d9db17537 | 18 | * |
mbed_official | 376:cb4d9db17537 | 19 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 376:cb4d9db17537 | 20 | * are permitted provided that the following conditions are met: |
mbed_official | 376:cb4d9db17537 | 21 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 376:cb4d9db17537 | 22 | * this list of conditions and the following disclaimer. |
mbed_official | 376:cb4d9db17537 | 23 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 376:cb4d9db17537 | 24 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 376:cb4d9db17537 | 25 | * and/or other materials provided with the distribution. |
mbed_official | 376:cb4d9db17537 | 26 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 376:cb4d9db17537 | 27 | * may be used to endorse or promote products derived from this software |
mbed_official | 376:cb4d9db17537 | 28 | * without specific prior written permission. |
mbed_official | 376:cb4d9db17537 | 29 | * |
mbed_official | 376:cb4d9db17537 | 30 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 376:cb4d9db17537 | 31 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 376:cb4d9db17537 | 32 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 376:cb4d9db17537 | 33 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 376:cb4d9db17537 | 34 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 376:cb4d9db17537 | 35 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 376:cb4d9db17537 | 36 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 376:cb4d9db17537 | 37 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 376:cb4d9db17537 | 38 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 376:cb4d9db17537 | 39 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 376:cb4d9db17537 | 40 | * |
mbed_official | 376:cb4d9db17537 | 41 | ****************************************************************************** |
mbed_official | 376:cb4d9db17537 | 42 | */ |
mbed_official | 376:cb4d9db17537 | 43 | |
mbed_official | 376:cb4d9db17537 | 44 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 376:cb4d9db17537 | 45 | #include "stm32l0xx_hal.h" |
mbed_official | 376:cb4d9db17537 | 46 | |
mbed_official | 489:119543c9f674 | 47 | #ifdef HAL_PWR_MODULE_ENABLED |
mbed_official | 376:cb4d9db17537 | 48 | /** @addtogroup STM32L0xx_HAL_Driver |
mbed_official | 376:cb4d9db17537 | 49 | * @{ |
mbed_official | 376:cb4d9db17537 | 50 | */ |
mbed_official | 376:cb4d9db17537 | 51 | |
mbed_official | 489:119543c9f674 | 52 | /** @addtogroup PWR |
mbed_official | 376:cb4d9db17537 | 53 | * @{ |
mbed_official | 376:cb4d9db17537 | 54 | */ |
mbed_official | 376:cb4d9db17537 | 55 | |
mbed_official | 489:119543c9f674 | 56 | /** @addtogroup PWR_Private_Defines |
mbed_official | 489:119543c9f674 | 57 | * @{ |
mbed_official | 489:119543c9f674 | 58 | */ |
mbed_official | 489:119543c9f674 | 59 | |
mbed_official | 489:119543c9f674 | 60 | /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask |
mbed_official | 489:119543c9f674 | 61 | * @{ |
mbed_official | 489:119543c9f674 | 62 | */ |
mbed_official | 489:119543c9f674 | 63 | #define PVD_MODE_IT ((uint32_t)0x00010000) |
mbed_official | 489:119543c9f674 | 64 | #define PVD_MODE_EVT ((uint32_t)0x00020000) |
mbed_official | 489:119543c9f674 | 65 | #define PVD_RISING_EDGE ((uint32_t)0x00000001) |
mbed_official | 489:119543c9f674 | 66 | #define PVD_FALLING_EDGE ((uint32_t)0x00000002) |
mbed_official | 489:119543c9f674 | 67 | /** |
mbed_official | 489:119543c9f674 | 68 | * @} |
mbed_official | 489:119543c9f674 | 69 | */ |
mbed_official | 376:cb4d9db17537 | 70 | |
mbed_official | 489:119543c9f674 | 71 | /** |
mbed_official | 489:119543c9f674 | 72 | * @} |
mbed_official | 489:119543c9f674 | 73 | */ |
mbed_official | 489:119543c9f674 | 74 | |
mbed_official | 376:cb4d9db17537 | 75 | |
mbed_official | 489:119543c9f674 | 76 | /** @addtogroup PWR_Exported_Functions |
mbed_official | 376:cb4d9db17537 | 77 | * @{ |
mbed_official | 376:cb4d9db17537 | 78 | */ |
mbed_official | 376:cb4d9db17537 | 79 | |
mbed_official | 489:119543c9f674 | 80 | /** @addtogroup PWR_Exported_Functions_Group1 |
mbed_official | 489:119543c9f674 | 81 | * @brief Initialization and de-initialization functions |
mbed_official | 376:cb4d9db17537 | 82 | * |
mbed_official | 376:cb4d9db17537 | 83 | @verbatim |
mbed_official | 376:cb4d9db17537 | 84 | =============================================================================== |
mbed_official | 376:cb4d9db17537 | 85 | ##### Initialization and de-initialization functions ##### |
mbed_official | 376:cb4d9db17537 | 86 | =============================================================================== |
mbed_official | 376:cb4d9db17537 | 87 | |
mbed_official | 376:cb4d9db17537 | 88 | @endverbatim |
mbed_official | 376:cb4d9db17537 | 89 | * @{ |
mbed_official | 376:cb4d9db17537 | 90 | */ |
mbed_official | 376:cb4d9db17537 | 91 | |
mbed_official | 376:cb4d9db17537 | 92 | /** |
mbed_official | 376:cb4d9db17537 | 93 | * @brief Deinitializes the HAL PWR peripheral registers to their default reset values. |
mbed_official | 376:cb4d9db17537 | 94 | * @retval None |
mbed_official | 376:cb4d9db17537 | 95 | */ |
mbed_official | 376:cb4d9db17537 | 96 | void HAL_PWR_DeInit(void) |
mbed_official | 376:cb4d9db17537 | 97 | { |
mbed_official | 489:119543c9f674 | 98 | __HAL_RCC_PWR_FORCE_RESET(); |
mbed_official | 489:119543c9f674 | 99 | __HAL_RCC_PWR_RELEASE_RESET(); |
mbed_official | 376:cb4d9db17537 | 100 | } |
mbed_official | 376:cb4d9db17537 | 101 | |
mbed_official | 376:cb4d9db17537 | 102 | /** |
mbed_official | 376:cb4d9db17537 | 103 | * @} |
mbed_official | 376:cb4d9db17537 | 104 | */ |
mbed_official | 376:cb4d9db17537 | 105 | |
mbed_official | 489:119543c9f674 | 106 | /** @addtogroup PWR_Exported_Functions_Group2 |
mbed_official | 489:119543c9f674 | 107 | * @brief Low Power modes configuration functions |
mbed_official | 376:cb4d9db17537 | 108 | * |
mbed_official | 376:cb4d9db17537 | 109 | @verbatim |
mbed_official | 376:cb4d9db17537 | 110 | |
mbed_official | 376:cb4d9db17537 | 111 | =============================================================================== |
mbed_official | 376:cb4d9db17537 | 112 | ##### Peripheral Control functions ##### |
mbed_official | 376:cb4d9db17537 | 113 | =============================================================================== |
mbed_official | 376:cb4d9db17537 | 114 | |
mbed_official | 489:119543c9f674 | 115 | *** Backup domain *** |
mbed_official | 489:119543c9f674 | 116 | ========================= |
mbed_official | 489:119543c9f674 | 117 | [..] |
mbed_official | 489:119543c9f674 | 118 | After reset, the backup domain (RTC registers, RTC backup data |
mbed_official | 489:119543c9f674 | 119 | registers) is protected against possible unwanted |
mbed_official | 489:119543c9f674 | 120 | write accesses. |
mbed_official | 489:119543c9f674 | 121 | To enable access to the RTC Domain and RTC registers, proceed as follows: |
mbed_official | 489:119543c9f674 | 122 | (+) Enable the Power Controller (PWR) APB1 interface clock using the |
mbed_official | 489:119543c9f674 | 123 | __HAL_RCC_PWR_CLK_ENABLE() macro. |
mbed_official | 489:119543c9f674 | 124 | (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function. |
mbed_official | 489:119543c9f674 | 125 | |
mbed_official | 376:cb4d9db17537 | 126 | *** PVD configuration *** |
mbed_official | 376:cb4d9db17537 | 127 | ========================= |
mbed_official | 376:cb4d9db17537 | 128 | [..] |
mbed_official | 376:cb4d9db17537 | 129 | (+) The PVD is used to monitor the VDD power supply by comparing it to a |
mbed_official | 376:cb4d9db17537 | 130 | threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). |
mbed_official | 376:cb4d9db17537 | 131 | (+) The PVD can use an external input analog voltage (PVD_IN) which is compared |
mbed_official | 376:cb4d9db17537 | 132 | internally to VREFINT. The PVD_IN (PB7) has to be configured in Analog mode |
mbed_official | 376:cb4d9db17537 | 133 | when PWR_PVDLevel_7 is selected (PLS[2:0] = 111). |
mbed_official | 376:cb4d9db17537 | 134 | |
mbed_official | 376:cb4d9db17537 | 135 | (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower |
mbed_official | 376:cb4d9db17537 | 136 | than the PVD threshold. This event is internally connected to the EXTI |
mbed_official | 376:cb4d9db17537 | 137 | line16 and can generate an interrupt if enabled. This is done through |
mbed_official | 489:119543c9f674 | 138 | __HAL_PWR_PVD_EXTI_ENABLE_IT() macro. |
mbed_official | 376:cb4d9db17537 | 139 | (+) The PVD is stopped in Standby mode. |
mbed_official | 376:cb4d9db17537 | 140 | |
mbed_official | 376:cb4d9db17537 | 141 | *** WakeUp pin configuration *** |
mbed_official | 376:cb4d9db17537 | 142 | ================================ |
mbed_official | 376:cb4d9db17537 | 143 | [..] |
mbed_official | 376:cb4d9db17537 | 144 | (+) WakeUp pin is used to wake up the system from Standby mode. This pin is |
mbed_official | 376:cb4d9db17537 | 145 | forced in input pull-down configuration and is active on rising edges. |
mbed_official | 376:cb4d9db17537 | 146 | (+) There are two WakeUp pins: |
mbed_official | 376:cb4d9db17537 | 147 | WakeUp Pin 1 on PA.00. |
mbed_official | 376:cb4d9db17537 | 148 | WakeUp Pin 2 on PC.13. |
mbed_official | 489:119543c9f674 | 149 | WakeUp Pin 3 on PE.06 . |
mbed_official | 489:119543c9f674 | 150 | |
mbed_official | 376:cb4d9db17537 | 151 | |
mbed_official | 376:cb4d9db17537 | 152 | [..] |
mbed_official | 376:cb4d9db17537 | 153 | *** Main and Backup Regulators configuration *** |
mbed_official | 376:cb4d9db17537 | 154 | ================================================ |
mbed_official | 376:cb4d9db17537 | 155 | |
mbed_official | 376:cb4d9db17537 | 156 | (+) The main internal regulator can be configured to have a tradeoff between |
mbed_official | 376:cb4d9db17537 | 157 | performance and power consumption when the device does not operate at |
mbed_official | 376:cb4d9db17537 | 158 | the maximum frequency. This is done through __HAL_PWR_VOLTAGESCALING_CONFIG() |
mbed_official | 489:119543c9f674 | 159 | macro which configures the two VOS bits in PWR_CR register: |
mbed_official | 489:119543c9f674 | 160 | (++) PWR_REGULATOR_VOLTAGE_SCALE1 (VOS bits = 01), the regulator voltage output Scale 1 mode selected and |
mbed_official | 376:cb4d9db17537 | 161 | the System frequency can go up to 32 MHz. |
mbed_official | 489:119543c9f674 | 162 | (++) PWR_REGULATOR_VOLTAGE_SCALE2 (VOS bits = 10), the regulator voltage output Scale 2 mode selected and |
mbed_official | 376:cb4d9db17537 | 163 | the System frequency can go up to 16 MHz. |
mbed_official | 489:119543c9f674 | 164 | (++) PWR_REGULATOR_VOLTAGE_SCALE3 (VOS bits = 11), the regulator voltage output Scale 3 mode selected and |
mbed_official | 376:cb4d9db17537 | 165 | the System frequency can go up to 4.2 MHz. |
mbed_official | 376:cb4d9db17537 | 166 | |
mbed_official | 376:cb4d9db17537 | 167 | Refer to the datasheets for more details. |
mbed_official | 376:cb4d9db17537 | 168 | |
mbed_official | 376:cb4d9db17537 | 169 | *** Low Power modes configuration *** |
mbed_official | 376:cb4d9db17537 | 170 | ===================================== |
mbed_official | 376:cb4d9db17537 | 171 | [..] |
mbed_official | 376:cb4d9db17537 | 172 | The device features 5 low-power modes: |
mbed_official | 376:cb4d9db17537 | 173 | (+) Low power run mode: regulator in low power mode, limited clock frequency, |
mbed_official | 376:cb4d9db17537 | 174 | limited number of peripherals running. |
mbed_official | 376:cb4d9db17537 | 175 | (+) Sleep mode: Cortex-M0+ core stopped, peripherals kept running. |
mbed_official | 376:cb4d9db17537 | 176 | (+) Low power sleep mode: Cortex-M0+ core stopped, limited clock frequency, |
mbed_official | 376:cb4d9db17537 | 177 | limited number of peripherals running, regulator in low power mode. |
mbed_official | 376:cb4d9db17537 | 178 | (+) Stop mode: All clocks are stopped, regulator running, regulator in low power mode. |
mbed_official | 376:cb4d9db17537 | 179 | (+) Standby mode: VCORE domain powered off |
mbed_official | 376:cb4d9db17537 | 180 | |
mbed_official | 376:cb4d9db17537 | 181 | *** Low power run mode *** |
mbed_official | 376:cb4d9db17537 | 182 | ========================= |
mbed_official | 376:cb4d9db17537 | 183 | [..] |
mbed_official | 376:cb4d9db17537 | 184 | To further reduce the consumption when the system is in Run mode, the regulator can be |
mbed_official | 376:cb4d9db17537 | 185 | configured in low power mode. In this mode, the system frequency should not exceed |
mbed_official | 376:cb4d9db17537 | 186 | MSI frequency range1. |
mbed_official | 376:cb4d9db17537 | 187 | In Low power run mode, all I/O pins keep the same state as in Run mode. |
mbed_official | 376:cb4d9db17537 | 188 | |
mbed_official | 376:cb4d9db17537 | 189 | (+) Entry: |
mbed_official | 376:cb4d9db17537 | 190 | (++) VCORE in range2 |
mbed_official | 489:119543c9f674 | 191 | (++) Decrease the system frequency not to exceed the frequency of MSI frequency range1. |
mbed_official | 376:cb4d9db17537 | 192 | (++) The regulator is forced in low power mode using the HAL_PWREx_EnableLowPowerRunMode() |
mbed_official | 376:cb4d9db17537 | 193 | function. |
mbed_official | 376:cb4d9db17537 | 194 | (+) Exit: |
mbed_official | 376:cb4d9db17537 | 195 | (++) The regulator is forced in Main regulator mode using the HAL_PWREx_DisableLowPowerRunMode() |
mbed_official | 376:cb4d9db17537 | 196 | function. |
mbed_official | 376:cb4d9db17537 | 197 | (++) Increase the system frequency if needed. |
mbed_official | 376:cb4d9db17537 | 198 | |
mbed_official | 376:cb4d9db17537 | 199 | *** Sleep mode *** |
mbed_official | 376:cb4d9db17537 | 200 | ================== |
mbed_official | 376:cb4d9db17537 | 201 | [..] |
mbed_official | 376:cb4d9db17537 | 202 | (+) Entry: |
mbed_official | 376:cb4d9db17537 | 203 | The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFx) |
mbed_official | 376:cb4d9db17537 | 204 | functions with |
mbed_official | 376:cb4d9db17537 | 205 | (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
mbed_official | 376:cb4d9db17537 | 206 | (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
mbed_official | 376:cb4d9db17537 | 207 | |
mbed_official | 376:cb4d9db17537 | 208 | (+) Exit: |
mbed_official | 376:cb4d9db17537 | 209 | (++) Any peripheral interrupt acknowledged by the nested vectored interrupt |
mbed_official | 489:119543c9f674 | 210 | controller (NVIC) can wake up the device from Sleep mode. If the WFE instruction was used to enter sleep mode, |
mbed_official | 489:119543c9f674 | 211 | the MCU exits Sleep mode as soon as an event occurs. |
mbed_official | 376:cb4d9db17537 | 212 | |
mbed_official | 376:cb4d9db17537 | 213 | *** Low power sleep mode *** |
mbed_official | 376:cb4d9db17537 | 214 | ============================ |
mbed_official | 376:cb4d9db17537 | 215 | [..] |
mbed_official | 376:cb4d9db17537 | 216 | (+) Entry: |
mbed_official | 376:cb4d9db17537 | 217 | The Low power sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFx) |
mbed_official | 376:cb4d9db17537 | 218 | functions with |
mbed_official | 376:cb4d9db17537 | 219 | (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
mbed_official | 376:cb4d9db17537 | 220 | (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
mbed_official | 376:cb4d9db17537 | 221 | (+) The Flash memory can be switched off by using the control bits (SLEEP_PD in the FLASH_ACR register. |
mbed_official | 376:cb4d9db17537 | 222 | This reduces power consumption but increases the wake-up time. |
mbed_official | 376:cb4d9db17537 | 223 | |
mbed_official | 376:cb4d9db17537 | 224 | (+) Exit: |
mbed_official | 376:cb4d9db17537 | 225 | (++) If the WFI instruction was used to enter Low power sleep mode, any peripheral interrupt |
mbed_official | 376:cb4d9db17537 | 226 | acknowledged by the nested vectored interrupt controller (NVIC) can wake up the device |
mbed_official | 376:cb4d9db17537 | 227 | from Low power sleep mode. If the WFE instruction was used to enter Low power sleep mode, |
mbed_official | 376:cb4d9db17537 | 228 | the MCU exits Sleep mode as soon as an event occurs. |
mbed_official | 376:cb4d9db17537 | 229 | |
mbed_official | 376:cb4d9db17537 | 230 | *** Stop mode *** |
mbed_official | 376:cb4d9db17537 | 231 | ================= |
mbed_official | 376:cb4d9db17537 | 232 | [..] |
mbed_official | 376:cb4d9db17537 | 233 | The Stop mode is based on the Cortex-M0+ deepsleep mode combined with peripheral |
mbed_official | 376:cb4d9db17537 | 234 | clock gating. The voltage regulator can be configured either in normal or low-power mode. |
mbed_official | 376:cb4d9db17537 | 235 | In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the MSI, the HSI and |
mbed_official | 376:cb4d9db17537 | 236 | the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved. |
mbed_official | 376:cb4d9db17537 | 237 | To get the lowest consumption in Stop mode, the internal Flash memory also enters low |
mbed_official | 376:cb4d9db17537 | 238 | power mode. When the Flash memory is in power-down mode, an additional startup delay is |
mbed_official | 376:cb4d9db17537 | 239 | incurred when waking up from Stop mode. |
mbed_official | 376:cb4d9db17537 | 240 | To minimize the consumption In Stop mode, VREFINT, the BOR, PVD, and temperature |
mbed_official | 376:cb4d9db17537 | 241 | sensor can be switched off before entering Stop mode. They can be switched on again by |
mbed_official | 376:cb4d9db17537 | 242 | software after exiting Stop mode using the ULP bit in the PWR_CR register. |
mbed_official | 376:cb4d9db17537 | 243 | In Stop mode, all I/O pins keep the same state as in Run mode. |
mbed_official | 376:cb4d9db17537 | 244 | |
mbed_official | 376:cb4d9db17537 | 245 | (+) Entry: |
mbed_official | 489:119543c9f674 | 246 | The Stop mode is entered using the HAL_PWR_EnterSTOPMode |
mbed_official | 376:cb4d9db17537 | 247 | function with: |
mbed_official | 376:cb4d9db17537 | 248 | (++) Main regulator ON. |
mbed_official | 376:cb4d9db17537 | 249 | (++) Low Power regulator ON. |
mbed_official | 376:cb4d9db17537 | 250 | (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
mbed_official | 376:cb4d9db17537 | 251 | (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
mbed_official | 376:cb4d9db17537 | 252 | (+) Exit: |
mbed_official | 376:cb4d9db17537 | 253 | (++) By issuing an interrupt or a wakeup event, the MSI or HSI16 RC |
mbed_official | 376:cb4d9db17537 | 254 | oscillator is selected as system clock depending the bit STOPWUCK in the RCC_CFGR |
mbed_official | 376:cb4d9db17537 | 255 | register |
mbed_official | 376:cb4d9db17537 | 256 | |
mbed_official | 376:cb4d9db17537 | 257 | *** Standby mode *** |
mbed_official | 376:cb4d9db17537 | 258 | ==================== |
mbed_official | 376:cb4d9db17537 | 259 | [..] |
mbed_official | 376:cb4d9db17537 | 260 | The Standby mode allows to achieve the lowest power consumption. It is based on the |
mbed_official | 376:cb4d9db17537 | 261 | Cortex-M0+ deepsleep mode, with the voltage regulator disabled. The VCORE domain is |
mbed_official | 376:cb4d9db17537 | 262 | consequently powered off. The PLL, the MSI, the HSI oscillator and the HSE oscillator are |
mbed_official | 376:cb4d9db17537 | 263 | also switched off. SRAM and register contents are lost except for the RTC registers, RTC |
mbed_official | 376:cb4d9db17537 | 264 | backup registers and Standby circuitry. |
mbed_official | 376:cb4d9db17537 | 265 | |
mbed_official | 376:cb4d9db17537 | 266 | To minimize the consumption In Standby mode, VREFINT, the BOR, PVD, and temperature |
mbed_official | 376:cb4d9db17537 | 267 | sensor can be switched off before entering the Standby mode. They can be switched |
mbed_official | 376:cb4d9db17537 | 268 | on again by software after exiting the Standby mode. |
mbed_official | 376:cb4d9db17537 | 269 | function. |
mbed_official | 376:cb4d9db17537 | 270 | |
mbed_official | 376:cb4d9db17537 | 271 | (+) Entry: |
mbed_official | 376:cb4d9db17537 | 272 | (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. |
mbed_official | 376:cb4d9db17537 | 273 | (+) Exit: |
mbed_official | 376:cb4d9db17537 | 274 | (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup, |
mbed_official | 376:cb4d9db17537 | 275 | tamper event, time-stamp event, external reset in NRST pin, IWDG reset. |
mbed_official | 376:cb4d9db17537 | 276 | |
mbed_official | 376:cb4d9db17537 | 277 | *** Auto-wakeup (AWU) from low-power mode *** |
mbed_official | 376:cb4d9db17537 | 278 | ============================================= |
mbed_official | 376:cb4d9db17537 | 279 | [..] |
mbed_official | 376:cb4d9db17537 | 280 | The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC |
mbed_official | 376:cb4d9db17537 | 281 | Wakeup event, a tamper event, a time-stamp event, or a comparator event, |
mbed_official | 376:cb4d9db17537 | 282 | without depending on an external interrupt (Auto-wakeup mode). |
mbed_official | 376:cb4d9db17537 | 283 | |
mbed_official | 376:cb4d9db17537 | 284 | (+) RTC auto-wakeup (AWU) from the Stop mode |
mbed_official | 376:cb4d9db17537 | 285 | (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to: |
mbed_official | 376:cb4d9db17537 | 286 | (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt |
mbed_official | 376:cb4d9db17537 | 287 | or Event modes) using the EXTI_Init() function. |
mbed_official | 376:cb4d9db17537 | 288 | (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function |
mbed_official | 376:cb4d9db17537 | 289 | (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm() |
mbed_official | 376:cb4d9db17537 | 290 | and RTC_AlarmCmd() functions. |
mbed_official | 376:cb4d9db17537 | 291 | (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it |
mbed_official | 376:cb4d9db17537 | 292 | is necessary to: |
mbed_official | 376:cb4d9db17537 | 293 | (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt |
mbed_official | 376:cb4d9db17537 | 294 | or Event modes) using the EXTI_Init() function. |
mbed_official | 376:cb4d9db17537 | 295 | (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig() |
mbed_official | 376:cb4d9db17537 | 296 | function. |
mbed_official | 376:cb4d9db17537 | 297 | (+++) Configure the RTC to detect the tamper or time stamp event using the |
mbed_official | 376:cb4d9db17537 | 298 | RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd() |
mbed_official | 376:cb4d9db17537 | 299 | functions. |
mbed_official | 376:cb4d9db17537 | 300 | (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to: |
mbed_official | 376:cb4d9db17537 | 301 | (+++) Configure the EXTI Line 20 to be sensitive to rising edges (Interrupt |
mbed_official | 376:cb4d9db17537 | 302 | or Event modes) using the EXTI_Init() function. |
mbed_official | 376:cb4d9db17537 | 303 | (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function. |
mbed_official | 376:cb4d9db17537 | 304 | (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(), |
mbed_official | 376:cb4d9db17537 | 305 | RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions. |
mbed_official | 376:cb4d9db17537 | 306 | |
mbed_official | 376:cb4d9db17537 | 307 | (+) RTC auto-wakeup (AWU) from the Standby mode |
mbed_official | 376:cb4d9db17537 | 308 | (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to: |
mbed_official | 376:cb4d9db17537 | 309 | (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function. |
mbed_official | 376:cb4d9db17537 | 310 | (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm() |
mbed_official | 376:cb4d9db17537 | 311 | and RTC_AlarmCmd() functions. |
mbed_official | 376:cb4d9db17537 | 312 | (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it |
mbed_official | 376:cb4d9db17537 | 313 | is necessary to: |
mbed_official | 376:cb4d9db17537 | 314 | (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig() |
mbed_official | 376:cb4d9db17537 | 315 | function. |
mbed_official | 376:cb4d9db17537 | 316 | (+++) Configure the RTC to detect the tamper or time stamp event using the |
mbed_official | 376:cb4d9db17537 | 317 | RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd() |
mbed_official | 376:cb4d9db17537 | 318 | functions. |
mbed_official | 376:cb4d9db17537 | 319 | (++) To wake up from the Standby mode with an RTC WakeUp event, it is necessary to: |
mbed_official | 376:cb4d9db17537 | 320 | (+++) Enable the RTC WakeUp Interrupt using the RTC_ITConfig() function |
mbed_official | 376:cb4d9db17537 | 321 | (+++) Configure the RTC to generate the RTC WakeUp event using the RTC_WakeUpClockConfig(), |
mbed_official | 376:cb4d9db17537 | 322 | RTC_SetWakeUpCounter() and RTC_WakeUpCmd() functions. |
mbed_official | 376:cb4d9db17537 | 323 | |
mbed_official | 376:cb4d9db17537 | 324 | (+) Comparator auto-wakeup (AWU) from the Stop mode |
mbed_official | 376:cb4d9db17537 | 325 | (++) To wake up from the Stop mode with an comparator 1 or comparator 2 wakeup |
mbed_official | 376:cb4d9db17537 | 326 | event, it is necessary to: |
mbed_official | 376:cb4d9db17537 | 327 | (+++) Configure the EXTI Line 21 for comparator 1 or EXTI Line 22 for comparator 2 |
mbed_official | 376:cb4d9db17537 | 328 | to be sensitive to to the selected edges (falling, rising or falling |
mbed_official | 376:cb4d9db17537 | 329 | and rising) (Interrupt or Event modes) using the EXTI_Init() function. |
mbed_official | 376:cb4d9db17537 | 330 | (+++) Configure the comparator to generate the event. |
mbed_official | 376:cb4d9db17537 | 331 | @endverbatim |
mbed_official | 376:cb4d9db17537 | 332 | * @{ |
mbed_official | 376:cb4d9db17537 | 333 | */ |
mbed_official | 376:cb4d9db17537 | 334 | |
mbed_official | 376:cb4d9db17537 | 335 | /** |
mbed_official | 489:119543c9f674 | 336 | * @brief Enables access to the backup domain (RTC registers, RTC |
mbed_official | 489:119543c9f674 | 337 | * backup data registers ). |
mbed_official | 489:119543c9f674 | 338 | * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the |
mbed_official | 489:119543c9f674 | 339 | * Backup Domain Access should be kept enabled. |
mbed_official | 489:119543c9f674 | 340 | * @retval None |
mbed_official | 489:119543c9f674 | 341 | */ |
mbed_official | 489:119543c9f674 | 342 | void HAL_PWR_EnableBkUpAccess(void) |
mbed_official | 489:119543c9f674 | 343 | { |
mbed_official | 489:119543c9f674 | 344 | /* Enable access to RTC and backup registers */ |
mbed_official | 489:119543c9f674 | 345 | SET_BIT(PWR->CR, PWR_CR_DBP); |
mbed_official | 489:119543c9f674 | 346 | } |
mbed_official | 489:119543c9f674 | 347 | |
mbed_official | 489:119543c9f674 | 348 | /** |
mbed_official | 489:119543c9f674 | 349 | * @brief Disables access to the backup domain |
mbed_official | 489:119543c9f674 | 350 | * @note Applies to RTC registers, RTC backup data registers. |
mbed_official | 489:119543c9f674 | 351 | * @note If the HSE divided by 2, 4, 8 or 16 is used as the RTC clock, the |
mbed_official | 489:119543c9f674 | 352 | * Backup Domain Access should be kept enabled. |
mbed_official | 489:119543c9f674 | 353 | * @retval None |
mbed_official | 489:119543c9f674 | 354 | */ |
mbed_official | 489:119543c9f674 | 355 | void HAL_PWR_DisableBkUpAccess(void) |
mbed_official | 489:119543c9f674 | 356 | { |
mbed_official | 489:119543c9f674 | 357 | /* Disable access to RTC and backup registers */ |
mbed_official | 489:119543c9f674 | 358 | CLEAR_BIT(PWR->CR, PWR_CR_DBP); |
mbed_official | 489:119543c9f674 | 359 | } |
mbed_official | 489:119543c9f674 | 360 | |
mbed_official | 489:119543c9f674 | 361 | /** |
mbed_official | 489:119543c9f674 | 362 | * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). |
mbed_official | 489:119543c9f674 | 363 | * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration |
mbed_official | 489:119543c9f674 | 364 | * information for the PVD. |
mbed_official | 489:119543c9f674 | 365 | * @note Refer to the electrical characteristics of your device datasheet for |
mbed_official | 376:cb4d9db17537 | 366 | * more details about the voltage threshold corresponding to each |
mbed_official | 376:cb4d9db17537 | 367 | * detection level. |
mbed_official | 376:cb4d9db17537 | 368 | * @retval None |
mbed_official | 376:cb4d9db17537 | 369 | */ |
mbed_official | 489:119543c9f674 | 370 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) |
mbed_official | 376:cb4d9db17537 | 371 | { |
mbed_official | 376:cb4d9db17537 | 372 | /* Check the parameters */ |
mbed_official | 376:cb4d9db17537 | 373 | assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); |
mbed_official | 489:119543c9f674 | 374 | assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); |
mbed_official | 376:cb4d9db17537 | 375 | |
mbed_official | 376:cb4d9db17537 | 376 | /* Set PLS[7:5] bits according to PVDLevel value */ |
mbed_official | 489:119543c9f674 | 377 | MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); |
mbed_official | 489:119543c9f674 | 378 | |
mbed_official | 489:119543c9f674 | 379 | /* Clear any previous config. Keep it clear if no event or IT mode is selected */ |
mbed_official | 489:119543c9f674 | 380 | __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); |
mbed_official | 489:119543c9f674 | 381 | __HAL_PWR_PVD_EXTI_DISABLE_IT(); |
mbed_official | 489:119543c9f674 | 382 | __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); |
mbed_official | 489:119543c9f674 | 383 | __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); |
mbed_official | 376:cb4d9db17537 | 384 | |
mbed_official | 489:119543c9f674 | 385 | /* Configure interrupt mode */ |
mbed_official | 489:119543c9f674 | 386 | if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) |
mbed_official | 376:cb4d9db17537 | 387 | { |
mbed_official | 489:119543c9f674 | 388 | __HAL_PWR_PVD_EXTI_ENABLE_IT(); |
mbed_official | 376:cb4d9db17537 | 389 | } |
mbed_official | 376:cb4d9db17537 | 390 | |
mbed_official | 489:119543c9f674 | 391 | /* Configure event mode */ |
mbed_official | 489:119543c9f674 | 392 | if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) |
mbed_official | 376:cb4d9db17537 | 393 | { |
mbed_official | 489:119543c9f674 | 394 | __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); |
mbed_official | 376:cb4d9db17537 | 395 | } |
mbed_official | 489:119543c9f674 | 396 | |
mbed_official | 489:119543c9f674 | 397 | /* Configure the edge */ |
mbed_official | 489:119543c9f674 | 398 | if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) |
mbed_official | 376:cb4d9db17537 | 399 | { |
mbed_official | 489:119543c9f674 | 400 | __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); |
mbed_official | 489:119543c9f674 | 401 | } |
mbed_official | 489:119543c9f674 | 402 | |
mbed_official | 489:119543c9f674 | 403 | if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) |
mbed_official | 489:119543c9f674 | 404 | { |
mbed_official | 489:119543c9f674 | 405 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); |
mbed_official | 376:cb4d9db17537 | 406 | } |
mbed_official | 376:cb4d9db17537 | 407 | } |
mbed_official | 376:cb4d9db17537 | 408 | |
mbed_official | 376:cb4d9db17537 | 409 | /** |
mbed_official | 376:cb4d9db17537 | 410 | * @brief Enables the Power Voltage Detector(PVD). |
mbed_official | 376:cb4d9db17537 | 411 | * @retval None |
mbed_official | 376:cb4d9db17537 | 412 | */ |
mbed_official | 376:cb4d9db17537 | 413 | void HAL_PWR_EnablePVD(void) |
mbed_official | 376:cb4d9db17537 | 414 | { |
mbed_official | 376:cb4d9db17537 | 415 | /* Enable the power voltage detector */ |
mbed_official | 489:119543c9f674 | 416 | SET_BIT(PWR->CR, PWR_CR_PVDE); |
mbed_official | 376:cb4d9db17537 | 417 | } |
mbed_official | 376:cb4d9db17537 | 418 | |
mbed_official | 376:cb4d9db17537 | 419 | /** |
mbed_official | 376:cb4d9db17537 | 420 | * @brief Disables the Power Voltage Detector(PVD). |
mbed_official | 376:cb4d9db17537 | 421 | * @retval None |
mbed_official | 376:cb4d9db17537 | 422 | */ |
mbed_official | 376:cb4d9db17537 | 423 | void HAL_PWR_DisablePVD(void) |
mbed_official | 376:cb4d9db17537 | 424 | { |
mbed_official | 376:cb4d9db17537 | 425 | /* Disable the power voltage detector */ |
mbed_official | 489:119543c9f674 | 426 | CLEAR_BIT(PWR->CR, PWR_CR_PVDE); |
mbed_official | 376:cb4d9db17537 | 427 | } |
mbed_official | 376:cb4d9db17537 | 428 | |
mbed_official | 376:cb4d9db17537 | 429 | /** |
mbed_official | 376:cb4d9db17537 | 430 | * @brief Enables the WakeUp PINx functionality. |
mbed_official | 376:cb4d9db17537 | 431 | * @param WakeUpPinx: Specifies the Power Wake-Up pin to enable. |
mbed_official | 376:cb4d9db17537 | 432 | * This parameter can be one of the following values: |
mbed_official | 376:cb4d9db17537 | 433 | * @arg PWR_WAKEUP_PIN1 |
mbed_official | 376:cb4d9db17537 | 434 | * @arg PWR_WAKEUP_PIN2 |
mbed_official | 489:119543c9f674 | 435 | * @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only. |
mbed_official | 376:cb4d9db17537 | 436 | * @retval None |
mbed_official | 376:cb4d9db17537 | 437 | */ |
mbed_official | 376:cb4d9db17537 | 438 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) |
mbed_official | 376:cb4d9db17537 | 439 | { |
mbed_official | 376:cb4d9db17537 | 440 | /* Check the parameter */ |
mbed_official | 376:cb4d9db17537 | 441 | assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); |
mbed_official | 376:cb4d9db17537 | 442 | /* Enable the EWUPx pin */ |
mbed_official | 489:119543c9f674 | 443 | SET_BIT(PWR->CSR, WakeUpPinx); |
mbed_official | 376:cb4d9db17537 | 444 | } |
mbed_official | 376:cb4d9db17537 | 445 | |
mbed_official | 376:cb4d9db17537 | 446 | /** |
mbed_official | 376:cb4d9db17537 | 447 | * @brief Disables the WakeUp PINx functionality. |
mbed_official | 376:cb4d9db17537 | 448 | * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable. |
mbed_official | 376:cb4d9db17537 | 449 | * This parameter can be one of the following values: |
mbed_official | 376:cb4d9db17537 | 450 | * @arg PWR_WAKEUP_PIN1 |
mbed_official | 376:cb4d9db17537 | 451 | * @arg PWR_WAKEUP_PIN2 |
mbed_official | 489:119543c9f674 | 452 | * @arg PWR_WAKEUP_PIN3 for stm32l07xxx and stm32l08xxx devices only. |
mbed_official | 376:cb4d9db17537 | 453 | * @retval None |
mbed_official | 376:cb4d9db17537 | 454 | */ |
mbed_official | 376:cb4d9db17537 | 455 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) |
mbed_official | 376:cb4d9db17537 | 456 | { |
mbed_official | 376:cb4d9db17537 | 457 | /* Check the parameter */ |
mbed_official | 376:cb4d9db17537 | 458 | assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); |
mbed_official | 376:cb4d9db17537 | 459 | /* Disable the EWUPx pin */ |
mbed_official | 489:119543c9f674 | 460 | CLEAR_BIT(PWR->CSR, WakeUpPinx); |
mbed_official | 376:cb4d9db17537 | 461 | } |
mbed_official | 376:cb4d9db17537 | 462 | |
mbed_official | 376:cb4d9db17537 | 463 | /** |
mbed_official | 376:cb4d9db17537 | 464 | * @brief Enters Sleep mode. |
mbed_official | 376:cb4d9db17537 | 465 | * @note In Sleep mode, all I/O pins keep the same state as in Run mode. |
mbed_official | 376:cb4d9db17537 | 466 | * @param Regulator: Specifies the regulator state in SLEEP mode. |
mbed_official | 376:cb4d9db17537 | 467 | * This parameter can be one of the following values: |
mbed_official | 376:cb4d9db17537 | 468 | * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON |
mbed_official | 376:cb4d9db17537 | 469 | * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON |
mbed_official | 376:cb4d9db17537 | 470 | * @param SLEEPEntry: Specifies if SLEEP mode is entered with WFI or WFE instruction. |
mbed_official | 376:cb4d9db17537 | 471 | * When WFI entry is used, tick interrupt have to be disabled if not desired as |
mbed_official | 376:cb4d9db17537 | 472 | * the interrupt wake up source. |
mbed_official | 376:cb4d9db17537 | 473 | * This parameter can be one of the following values: |
mbed_official | 376:cb4d9db17537 | 474 | * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
mbed_official | 376:cb4d9db17537 | 475 | * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
mbed_official | 376:cb4d9db17537 | 476 | * @retval None |
mbed_official | 376:cb4d9db17537 | 477 | */ |
mbed_official | 376:cb4d9db17537 | 478 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) |
mbed_official | 376:cb4d9db17537 | 479 | { |
mbed_official | 376:cb4d9db17537 | 480 | uint32_t tmpreg = 0; |
mbed_official | 376:cb4d9db17537 | 481 | /* Check the parameters */ |
mbed_official | 376:cb4d9db17537 | 482 | assert_param(IS_PWR_REGULATOR(Regulator)); |
mbed_official | 376:cb4d9db17537 | 483 | assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); |
mbed_official | 376:cb4d9db17537 | 484 | |
mbed_official | 489:119543c9f674 | 485 | /* Select the regulator state in Sleep mode ---------------------------------*/ |
mbed_official | 376:cb4d9db17537 | 486 | tmpreg = PWR->CR; |
mbed_official | 489:119543c9f674 | 487 | |
mbed_official | 376:cb4d9db17537 | 488 | /* Clear PDDS and LPDS bits */ |
mbed_official | 489:119543c9f674 | 489 | CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR)); |
mbed_official | 376:cb4d9db17537 | 490 | |
mbed_official | 376:cb4d9db17537 | 491 | /* Set LPSDSR bit according to PWR_Regulator value */ |
mbed_official | 489:119543c9f674 | 492 | SET_BIT(tmpreg, Regulator); |
mbed_official | 376:cb4d9db17537 | 493 | |
mbed_official | 376:cb4d9db17537 | 494 | /* Store the new value */ |
mbed_official | 376:cb4d9db17537 | 495 | PWR->CR = tmpreg; |
mbed_official | 376:cb4d9db17537 | 496 | |
mbed_official | 376:cb4d9db17537 | 497 | /* Clear SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 489:119543c9f674 | 498 | CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); |
mbed_official | 376:cb4d9db17537 | 499 | |
mbed_official | 376:cb4d9db17537 | 500 | /* Select SLEEP mode entry -------------------------------------------------*/ |
mbed_official | 376:cb4d9db17537 | 501 | if(SLEEPEntry == PWR_SLEEPENTRY_WFI) |
mbed_official | 376:cb4d9db17537 | 502 | { |
mbed_official | 376:cb4d9db17537 | 503 | /* Request Wait For Interrupt */ |
mbed_official | 376:cb4d9db17537 | 504 | __WFI(); |
mbed_official | 376:cb4d9db17537 | 505 | } |
mbed_official | 376:cb4d9db17537 | 506 | else |
mbed_official | 376:cb4d9db17537 | 507 | { |
mbed_official | 376:cb4d9db17537 | 508 | /* Request Wait For Event */ |
mbed_official | 376:cb4d9db17537 | 509 | __SEV(); |
mbed_official | 376:cb4d9db17537 | 510 | __WFE(); |
mbed_official | 376:cb4d9db17537 | 511 | __WFE(); |
mbed_official | 376:cb4d9db17537 | 512 | } |
mbed_official | 376:cb4d9db17537 | 513 | } |
mbed_official | 376:cb4d9db17537 | 514 | |
mbed_official | 376:cb4d9db17537 | 515 | /** |
mbed_official | 376:cb4d9db17537 | 516 | * @brief Enters Stop mode. |
mbed_official | 376:cb4d9db17537 | 517 | * @note In Stop mode, all I/O pins keep the same state as in Run mode. |
mbed_official | 376:cb4d9db17537 | 518 | * @note When exiting Stop mode by issuing an interrupt or a wakeup event, |
mbed_official | 376:cb4d9db17537 | 519 | * MSI or HSI16 RCoscillator is selected as system clock depending |
mbed_official | 376:cb4d9db17537 | 520 | * the bit STOPWUCK in the RCC_CFGR register. |
mbed_official | 376:cb4d9db17537 | 521 | * @note When the voltage regulator operates in low power mode, an additional |
mbed_official | 376:cb4d9db17537 | 522 | * startup delay is incurred when waking up from Stop mode. |
mbed_official | 376:cb4d9db17537 | 523 | * By keeping the internal regulator ON during Stop mode, the consumption |
mbed_official | 376:cb4d9db17537 | 524 | * is higher although the startup time is reduced. |
mbed_official | 376:cb4d9db17537 | 525 | * @param Regulator: Specifies the regulator state in Stop mode. |
mbed_official | 376:cb4d9db17537 | 526 | * This parameter can be one of the following values: |
mbed_official | 376:cb4d9db17537 | 527 | * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON |
mbed_official | 376:cb4d9db17537 | 528 | * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON |
mbed_official | 376:cb4d9db17537 | 529 | * @param STOPEntry: Specifies if Stop mode in entered with WFI or WFE instruction. |
mbed_official | 376:cb4d9db17537 | 530 | * This parameter can be one of the following values: |
mbed_official | 376:cb4d9db17537 | 531 | * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction |
mbed_official | 376:cb4d9db17537 | 532 | * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction |
mbed_official | 376:cb4d9db17537 | 533 | * @retval None |
mbed_official | 376:cb4d9db17537 | 534 | */ |
mbed_official | 376:cb4d9db17537 | 535 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) |
mbed_official | 376:cb4d9db17537 | 536 | { |
mbed_official | 376:cb4d9db17537 | 537 | uint32_t tmpreg = 0; |
mbed_official | 376:cb4d9db17537 | 538 | |
mbed_official | 376:cb4d9db17537 | 539 | /* Check the parameters */ |
mbed_official | 376:cb4d9db17537 | 540 | assert_param(IS_PWR_REGULATOR(Regulator)); |
mbed_official | 376:cb4d9db17537 | 541 | assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); |
mbed_official | 376:cb4d9db17537 | 542 | |
mbed_official | 376:cb4d9db17537 | 543 | /* Select the regulator state in Stop mode ---------------------------------*/ |
mbed_official | 376:cb4d9db17537 | 544 | tmpreg = PWR->CR; |
mbed_official | 489:119543c9f674 | 545 | |
mbed_official | 376:cb4d9db17537 | 546 | /* Clear PDDS and LPDS bits */ |
mbed_official | 489:119543c9f674 | 547 | CLEAR_BIT(tmpreg, (PWR_CR_PDDS | PWR_CR_LPSDSR)); |
mbed_official | 376:cb4d9db17537 | 548 | |
mbed_official | 376:cb4d9db17537 | 549 | /* Set LPSDSR bit according to PWR_Regulator value */ |
mbed_official | 489:119543c9f674 | 550 | SET_BIT(tmpreg, Regulator); |
mbed_official | 376:cb4d9db17537 | 551 | |
mbed_official | 376:cb4d9db17537 | 552 | /* Store the new value */ |
mbed_official | 376:cb4d9db17537 | 553 | PWR->CR = tmpreg; |
mbed_official | 376:cb4d9db17537 | 554 | |
mbed_official | 376:cb4d9db17537 | 555 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 489:119543c9f674 | 556 | SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); |
mbed_official | 376:cb4d9db17537 | 557 | |
mbed_official | 376:cb4d9db17537 | 558 | /* Select Stop mode entry --------------------------------------------------*/ |
mbed_official | 376:cb4d9db17537 | 559 | if(STOPEntry == PWR_STOPENTRY_WFI) |
mbed_official | 376:cb4d9db17537 | 560 | { |
mbed_official | 376:cb4d9db17537 | 561 | /* Request Wait For Interrupt */ |
mbed_official | 376:cb4d9db17537 | 562 | __WFI(); |
mbed_official | 376:cb4d9db17537 | 563 | } |
mbed_official | 376:cb4d9db17537 | 564 | else |
mbed_official | 376:cb4d9db17537 | 565 | { |
mbed_official | 376:cb4d9db17537 | 566 | /* Request Wait For Event */ |
mbed_official | 376:cb4d9db17537 | 567 | __SEV(); |
mbed_official | 376:cb4d9db17537 | 568 | __WFE(); |
mbed_official | 376:cb4d9db17537 | 569 | __WFE(); |
mbed_official | 376:cb4d9db17537 | 570 | } |
mbed_official | 376:cb4d9db17537 | 571 | |
mbed_official | 376:cb4d9db17537 | 572 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 489:119543c9f674 | 573 | CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); |
mbed_official | 489:119543c9f674 | 574 | |
mbed_official | 376:cb4d9db17537 | 575 | } |
mbed_official | 376:cb4d9db17537 | 576 | |
mbed_official | 376:cb4d9db17537 | 577 | /** |
mbed_official | 376:cb4d9db17537 | 578 | * @brief Enters Standby mode. |
mbed_official | 376:cb4d9db17537 | 579 | * @note In Standby mode, all I/O pins are high impedance except for: |
mbed_official | 376:cb4d9db17537 | 580 | * - Reset pad (still available) |
mbed_official | 376:cb4d9db17537 | 581 | * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC |
mbed_official | 376:cb4d9db17537 | 582 | * Alarm out, or RTC clock calibration out. |
mbed_official | 376:cb4d9db17537 | 583 | * - RTC_AF2 pin (PC13) if configured for tamper. |
mbed_official | 489:119543c9f674 | 584 | * - WKUP pin 1 (PA00) if enabled. |
mbed_official | 376:cb4d9db17537 | 585 | * - WKUP pin 2 (PC13) if enabled. |
mbed_official | 489:119543c9f674 | 586 | * - WKUP pin 3 (PE06) if enabled, for stm32l07xxx and stm32l08xxx devices only. |
mbed_official | 489:119543c9f674 | 587 | * - WKUP pin 3 (PA02) if enabled, for stm32l031xx devices only. |
mbed_official | 376:cb4d9db17537 | 588 | * @retval None |
mbed_official | 376:cb4d9db17537 | 589 | */ |
mbed_official | 376:cb4d9db17537 | 590 | void HAL_PWR_EnterSTANDBYMode(void) |
mbed_official | 376:cb4d9db17537 | 591 | { |
mbed_official | 376:cb4d9db17537 | 592 | /* Select Standby mode */ |
mbed_official | 489:119543c9f674 | 593 | SET_BIT(PWR->CR, PWR_CR_PDDS); |
mbed_official | 376:cb4d9db17537 | 594 | |
mbed_official | 376:cb4d9db17537 | 595 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
mbed_official | 489:119543c9f674 | 596 | SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk); |
mbed_official | 376:cb4d9db17537 | 597 | |
mbed_official | 376:cb4d9db17537 | 598 | /* This option is used to ensure that store operations are completed */ |
mbed_official | 376:cb4d9db17537 | 599 | #if defined ( __CC_ARM) |
mbed_official | 376:cb4d9db17537 | 600 | __force_stores(); |
mbed_official | 376:cb4d9db17537 | 601 | #endif |
mbed_official | 376:cb4d9db17537 | 602 | /* Request Wait For Interrupt */ |
mbed_official | 376:cb4d9db17537 | 603 | __WFI(); |
mbed_official | 376:cb4d9db17537 | 604 | } |
mbed_official | 376:cb4d9db17537 | 605 | |
mbed_official | 376:cb4d9db17537 | 606 | /** |
mbed_official | 489:119543c9f674 | 607 | * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. |
mbed_official | 489:119543c9f674 | 608 | * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor |
mbed_official | 489:119543c9f674 | 609 | * re-enters SLEEP mode when an interruption handling is over. |
mbed_official | 489:119543c9f674 | 610 | * Setting this bit is useful when the processor is expected to run only on |
mbed_official | 489:119543c9f674 | 611 | * interruptions handling. |
mbed_official | 489:119543c9f674 | 612 | * @retval None |
mbed_official | 489:119543c9f674 | 613 | */ |
mbed_official | 489:119543c9f674 | 614 | void HAL_PWR_EnableSleepOnExit(void) |
mbed_official | 489:119543c9f674 | 615 | { |
mbed_official | 489:119543c9f674 | 616 | /* Set SLEEPONEXIT bit of Cortex System Control Register */ |
mbed_official | 489:119543c9f674 | 617 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); |
mbed_official | 489:119543c9f674 | 618 | } |
mbed_official | 489:119543c9f674 | 619 | |
mbed_official | 489:119543c9f674 | 620 | |
mbed_official | 489:119543c9f674 | 621 | /** |
mbed_official | 489:119543c9f674 | 622 | * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. |
mbed_official | 489:119543c9f674 | 623 | * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor |
mbed_official | 489:119543c9f674 | 624 | * re-enters SLEEP mode when an interruption handling is over. |
mbed_official | 489:119543c9f674 | 625 | * @retval None |
mbed_official | 489:119543c9f674 | 626 | */ |
mbed_official | 489:119543c9f674 | 627 | void HAL_PWR_DisableSleepOnExit(void) |
mbed_official | 489:119543c9f674 | 628 | { |
mbed_official | 489:119543c9f674 | 629 | /* Clear SLEEPONEXIT bit of Cortex System Control Register */ |
mbed_official | 489:119543c9f674 | 630 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); |
mbed_official | 489:119543c9f674 | 631 | } |
mbed_official | 489:119543c9f674 | 632 | |
mbed_official | 489:119543c9f674 | 633 | |
mbed_official | 489:119543c9f674 | 634 | /** |
mbed_official | 489:119543c9f674 | 635 | * @brief Enables CORTEX M0+ SEVONPEND bit. |
mbed_official | 489:119543c9f674 | 636 | * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes |
mbed_official | 489:119543c9f674 | 637 | * WFE to wake up when an interrupt moves from inactive to pended. |
mbed_official | 489:119543c9f674 | 638 | * @retval None |
mbed_official | 489:119543c9f674 | 639 | */ |
mbed_official | 489:119543c9f674 | 640 | void HAL_PWR_EnableSEVOnPend(void) |
mbed_official | 489:119543c9f674 | 641 | { |
mbed_official | 489:119543c9f674 | 642 | /* Set SEVONPEND bit of Cortex System Control Register */ |
mbed_official | 489:119543c9f674 | 643 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); |
mbed_official | 489:119543c9f674 | 644 | } |
mbed_official | 489:119543c9f674 | 645 | |
mbed_official | 489:119543c9f674 | 646 | |
mbed_official | 489:119543c9f674 | 647 | /** |
mbed_official | 489:119543c9f674 | 648 | * @brief Disables CORTEX M0+ SEVONPEND bit. |
mbed_official | 489:119543c9f674 | 649 | * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes |
mbed_official | 489:119543c9f674 | 650 | * WFE to wake up when an interrupt moves from inactive to pended. |
mbed_official | 489:119543c9f674 | 651 | * @retval None |
mbed_official | 489:119543c9f674 | 652 | */ |
mbed_official | 489:119543c9f674 | 653 | void HAL_PWR_DisableSEVOnPend(void) |
mbed_official | 489:119543c9f674 | 654 | { |
mbed_official | 489:119543c9f674 | 655 | /* Clear SEVONPEND bit of Cortex System Control Register */ |
mbed_official | 489:119543c9f674 | 656 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); |
mbed_official | 489:119543c9f674 | 657 | } |
mbed_official | 489:119543c9f674 | 658 | |
mbed_official | 489:119543c9f674 | 659 | /** |
mbed_official | 376:cb4d9db17537 | 660 | * @brief This function handles the PWR PVD interrupt request. |
mbed_official | 376:cb4d9db17537 | 661 | * @note This API should be called under the PVD_IRQHandler(). |
mbed_official | 376:cb4d9db17537 | 662 | * @retval None |
mbed_official | 376:cb4d9db17537 | 663 | */ |
mbed_official | 376:cb4d9db17537 | 664 | void HAL_PWR_PVD_IRQHandler(void) |
mbed_official | 376:cb4d9db17537 | 665 | { |
mbed_official | 376:cb4d9db17537 | 666 | /* Check PWR exti flag */ |
mbed_official | 489:119543c9f674 | 667 | if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) |
mbed_official | 376:cb4d9db17537 | 668 | { |
mbed_official | 376:cb4d9db17537 | 669 | /* PWR PVD interrupt user callback */ |
mbed_official | 376:cb4d9db17537 | 670 | HAL_PWR_PVDCallback(); |
mbed_official | 376:cb4d9db17537 | 671 | |
mbed_official | 376:cb4d9db17537 | 672 | /* Clear PWR Exti pending bit */ |
mbed_official | 489:119543c9f674 | 673 | __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); |
mbed_official | 376:cb4d9db17537 | 674 | } |
mbed_official | 376:cb4d9db17537 | 675 | } |
mbed_official | 376:cb4d9db17537 | 676 | |
mbed_official | 376:cb4d9db17537 | 677 | /** |
mbed_official | 376:cb4d9db17537 | 678 | * @brief PWR PVD interrupt callback |
mbed_official | 376:cb4d9db17537 | 679 | * @retval None |
mbed_official | 376:cb4d9db17537 | 680 | */ |
mbed_official | 376:cb4d9db17537 | 681 | __weak void HAL_PWR_PVDCallback(void) |
mbed_official | 376:cb4d9db17537 | 682 | { |
mbed_official | 376:cb4d9db17537 | 683 | /* NOTE : This function Should not be modified, when the callback is needed, |
mbed_official | 376:cb4d9db17537 | 684 | the HAL_PWR_PVDCallback could be implemented in the user file |
mbed_official | 376:cb4d9db17537 | 685 | */ |
mbed_official | 376:cb4d9db17537 | 686 | } |
mbed_official | 376:cb4d9db17537 | 687 | |
mbed_official | 376:cb4d9db17537 | 688 | /** |
mbed_official | 376:cb4d9db17537 | 689 | * @} |
mbed_official | 376:cb4d9db17537 | 690 | */ |
mbed_official | 376:cb4d9db17537 | 691 | |
mbed_official | 376:cb4d9db17537 | 692 | /** |
mbed_official | 376:cb4d9db17537 | 693 | * @} |
mbed_official | 376:cb4d9db17537 | 694 | */ |
mbed_official | 376:cb4d9db17537 | 695 | |
mbed_official | 376:cb4d9db17537 | 696 | #endif /* HAL_PWR_MODULE_ENABLED */ |
mbed_official | 376:cb4d9db17537 | 697 | /** |
mbed_official | 376:cb4d9db17537 | 698 | * @} |
mbed_official | 376:cb4d9db17537 | 699 | */ |
mbed_official | 376:cb4d9db17537 | 700 | |
mbed_official | 376:cb4d9db17537 | 701 | /** |
mbed_official | 376:cb4d9db17537 | 702 | * @} |
mbed_official | 376:cb4d9db17537 | 703 | */ |
mbed_official | 376:cb4d9db17537 | 704 | |
mbed_official | 376:cb4d9db17537 | 705 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
mbed_official | 489:119543c9f674 | 706 |