mbed-src - mbed library sources

Users » lzbpli » Code » mbed-src

lzbp li / mbed-src

mbed library sources

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim.c@385:be64abf45658, 2014-11-04 (annotated)

Committer:: mbed_official
Date:: Tue Nov 04 09:45:07 2014 +0000
Revision:: 385:be64abf45658
Parent:: targets/cmsis/TARGET_STM/TARGET_NUCLEO_F334R8/stm32f3xx_hal_tim.c@375:3d36234a1087
Child:: 632:7687fb9c4f91

Synchronized with git revision 5a868b18bc02bd5bb19d24424d0a2464cd1930bb

Full URL: https://github.com/mbedmicro/mbed/commit/5a868b18bc02bd5bb19d24424d0a2464cd1930bb/

Targets: Factorisation of NUCLEO_F302R8 and F334R8 cmsis folders

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	237:f3da66175598	1	/**
mbed_official	237:f3da66175598	2	******************************************************************************
mbed_official	237:f3da66175598	3	* @file stm32f3xx_hal_tim.c
mbed_official	237:f3da66175598	4	* @author MCD Application Team
mbed_official	375:3d36234a1087	5	* @version V1.1.0
mbed_official	375:3d36234a1087	6	* @date 12-Sept-2014
mbed_official	237:f3da66175598	7	* @brief TIM HAL module driver.
mbed_official	237:f3da66175598	8	* This file provides firmware functions to manage the following
mbed_official	237:f3da66175598	9	* functionalities of the Timer (TIM) peripheral:
mbed_official	237:f3da66175598	10	* + Time Base Initialization
mbed_official	237:f3da66175598	11	* + Time Base Start
mbed_official	237:f3da66175598	12	* + Time Base Start Interruption
mbed_official	237:f3da66175598	13	* + Time Base Start DMA
mbed_official	237:f3da66175598	14	* + Time Output Compare/PWM Initialization
mbed_official	237:f3da66175598	15	* + Time Output Compare/PWM Channel Configuration
mbed_official	237:f3da66175598	16	* + Time Output Compare/PWM Start
mbed_official	237:f3da66175598	17	* + Time Output Compare/PWM Start Interruption
mbed_official	237:f3da66175598	18	* + Time Output Compare/PWM Start DMA
mbed_official	237:f3da66175598	19	* + Time Input Capture Initialization
mbed_official	237:f3da66175598	20	* + Time Input Capture Channel Configuration
mbed_official	237:f3da66175598	21	* + Time Input Capture Start
mbed_official	237:f3da66175598	22	* + Time Input Capture Start Interruption
mbed_official	237:f3da66175598	23	* + Time Input Capture Start DMA
mbed_official	237:f3da66175598	24	* + Time One Pulse Initialization
mbed_official	237:f3da66175598	25	* + Time One Pulse Channel Configuration
mbed_official	237:f3da66175598	26	* + Time One Pulse Start
mbed_official	237:f3da66175598	27	* + Time Encoder Interface Initialization
mbed_official	237:f3da66175598	28	* + Time Encoder Interface Start
mbed_official	237:f3da66175598	29	* + Time Encoder Interface Start Interruption
mbed_official	237:f3da66175598	30	* + Time Encoder Interface Start DMA
mbed_official	237:f3da66175598	31	* + Commutation Event configuration with Interruption and DMA
mbed_official	237:f3da66175598	32	* + Time OCRef clear configuration
mbed_official	237:f3da66175598	33	* + Time External Clock configuration
mbed_official	237:f3da66175598	34	@verbatim
mbed_official	237:f3da66175598	35	==============================================================================
mbed_official	237:f3da66175598	36	##### TIMER Generic features #####
mbed_official	237:f3da66175598	37	==============================================================================
mbed_official	237:f3da66175598	38	[..] The Timer features include:
mbed_official	237:f3da66175598	39	(#) 16-bit up, down, up/down auto-reload counter.
mbed_official	237:f3da66175598	40	(#) 16-bit programmable prescaler allowing dividing (also on the fly) the
mbed_official	237:f3da66175598	41	counter clock frequency either by any factor between 1 and 65536.
mbed_official	237:f3da66175598	42	(#) Up to 4 independent channels for:
mbed_official	237:f3da66175598	43	(++) Input Capture
mbed_official	237:f3da66175598	44	(++) Output Compare
mbed_official	237:f3da66175598	45	(++) PWM generation (Edge and Center-aligned Mode)
mbed_official	237:f3da66175598	46	(++) One-pulse mode output
mbed_official	237:f3da66175598	47
mbed_official	237:f3da66175598	48	##### How to use this driver #####
mbed_official	237:f3da66175598	49	==============================================================================
mbed_official	237:f3da66175598	50	[..]
mbed_official	237:f3da66175598	51	(#) Initialize the TIM low level resources by implementing the following functions
mbed_official	237:f3da66175598	52	depending from feature used :
mbed_official	237:f3da66175598	53	(++) Time Base : HAL_TIM_Base_MspInit()
mbed_official	237:f3da66175598	54	(++) Input Capture : HAL_TIM_IC_MspInit()
mbed_official	237:f3da66175598	55	(++) Output Compare : HAL_TIM_OC_MspInit()
mbed_official	237:f3da66175598	56	(++) PWM generation : HAL_TIM_PWM_MspInit()
mbed_official	237:f3da66175598	57	(++) One-pulse mode output : HAL_TIM_OnePulse_MspInit()
mbed_official	237:f3da66175598	58	(++) Encoder mode output : HAL_TIM_Encoder_MspInit()
mbed_official	237:f3da66175598	59
mbed_official	237:f3da66175598	60	(#) Initialize the TIM low level resources :
mbed_official	237:f3da66175598	61	(##) Enable the TIM interface clock using __TIMx_CLK_ENABLE();
mbed_official	237:f3da66175598	62	(##) TIM pins configuration
mbed_official	237:f3da66175598	63	(+++) Enable the clock for the TIM GPIOs using the following function:
mbed_official	237:f3da66175598	64	__GPIOx_CLK_ENABLE();
mbed_official	237:f3da66175598	65	(+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
mbed_official	237:f3da66175598	66
mbed_official	237:f3da66175598	67	(#) The external Clock can be configured, if needed (the default clock is the
mbed_official	237:f3da66175598	68	internal clock from the APBx), using the following function:
mbed_official	237:f3da66175598	69	HAL_TIM_ConfigClockSource, the clock configuration should be done before
mbed_official	237:f3da66175598	70	any start function.
mbed_official	237:f3da66175598	71
mbed_official	237:f3da66175598	72	(#) Configure the TIM in the desired functioning mode using one of the
mbed_official	237:f3da66175598	73	Initialization function of this driver:
mbed_official	237:f3da66175598	74	(++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base
mbed_official	237:f3da66175598	75	(++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an
mbed_official	237:f3da66175598	76	Output Compare signal.
mbed_official	237:f3da66175598	77	(++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a
mbed_official	237:f3da66175598	78	PWM signal.
mbed_official	237:f3da66175598	79	(++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an
mbed_official	237:f3da66175598	80	external signal.
mbed_official	237:f3da66175598	81	(++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer
mbed_official	237:f3da66175598	82	in One Pulse Mode.
mbed_official	237:f3da66175598	83	(++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface.
mbed_official	237:f3da66175598	84
mbed_official	237:f3da66175598	85	(#) Activate the TIM peripheral using one of the start functions depending from the feature used:
mbed_official	237:f3da66175598	86	(++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT()
mbed_official	237:f3da66175598	87	(++) Input Capture : HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT()
mbed_official	237:f3da66175598	88	(++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT()
mbed_official	237:f3da66175598	89	(++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT()
mbed_official	237:f3da66175598	90	(++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT()
mbed_official	237:f3da66175598	91	(++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM_Encoder_Start_IT().
mbed_official	237:f3da66175598	92
mbed_official	237:f3da66175598	93	(#) The DMA Burst is managed with the two following functions:
mbed_official	237:f3da66175598	94	HAL_TIM_DMABurst_WriteStart()
mbed_official	237:f3da66175598	95	HAL_TIM_DMABurst_ReadStart()
mbed_official	237:f3da66175598	96
mbed_official	237:f3da66175598	97	@endverbatim
mbed_official	237:f3da66175598	98	******************************************************************************
mbed_official	237:f3da66175598	99	* @attention
mbed_official	237:f3da66175598	100	*
mbed_official	237:f3da66175598	101	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	237:f3da66175598	102	*
mbed_official	237:f3da66175598	103	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	237:f3da66175598	104	* are permitted provided that the following conditions are met:
mbed_official	237:f3da66175598	105	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	237:f3da66175598	106	* this list of conditions and the following disclaimer.
mbed_official	237:f3da66175598	107	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	237:f3da66175598	108	* this list of conditions and the following disclaimer in the documentation
mbed_official	237:f3da66175598	109	* and/or other materials provided with the distribution.
mbed_official	237:f3da66175598	110	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	237:f3da66175598	111	* may be used to endorse or promote products derived from this software
mbed_official	237:f3da66175598	112	* without specific prior written permission.
mbed_official	237:f3da66175598	113	*
mbed_official	237:f3da66175598	114	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	237:f3da66175598	115	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	237:f3da66175598	116	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	237:f3da66175598	117	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	237:f3da66175598	118	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	237:f3da66175598	119	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	237:f3da66175598	120	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	237:f3da66175598	121	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	237:f3da66175598	122	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	237:f3da66175598	123	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	237:f3da66175598	124	*
mbed_official	237:f3da66175598	125	******************************************************************************
mbed_official	237:f3da66175598	126	*/
mbed_official	237:f3da66175598	127
mbed_official	237:f3da66175598	128	/* Includes ------------------------------------------------------------------*/
mbed_official	237:f3da66175598	129	#include "stm32f3xx_hal.h"
mbed_official	237:f3da66175598	130
mbed_official	237:f3da66175598	131	/** @addtogroup STM32F3xx_HAL_Driver
mbed_official	237:f3da66175598	132	* @{
mbed_official	237:f3da66175598	133	*/
mbed_official	237:f3da66175598	134
mbed_official	375:3d36234a1087	135	/** @defgroup TIM TIM HAL module driver
mbed_official	237:f3da66175598	136	* @brief TIM HAL module driver
mbed_official	237:f3da66175598	137	* @{
mbed_official	237:f3da66175598	138	*/
mbed_official	237:f3da66175598	139
mbed_official	237:f3da66175598	140	#ifdef HAL_TIM_MODULE_ENABLED
mbed_official	237:f3da66175598	141
mbed_official	237:f3da66175598	142	/* Private typedef -----------------------------------------------------------*/
mbed_official	237:f3da66175598	143	/* Private define ------------------------------------------------------------*/
mbed_official	237:f3da66175598	144	/* Private macro -------------------------------------------------------------*/
mbed_official	237:f3da66175598	145	/* Private variables ---------------------------------------------------------*/
mbed_official	237:f3da66175598	146	/* Private function prototypes -----------------------------------------------*/
mbed_official	237:f3da66175598	147	static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
mbed_official	237:f3da66175598	148	static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official	237:f3da66175598	149	uint32_t TIM_ICFilter);
mbed_official	237:f3da66175598	150	static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter);
mbed_official	237:f3da66175598	151	static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official	237:f3da66175598	152	uint32_t TIM_ICFilter);
mbed_official	237:f3da66175598	153	static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official	237:f3da66175598	154	uint32_t TIM_ICFilter);
mbed_official	237:f3da66175598	155	static void TIM_ITRx_SetConfig(TIM_TypeDef* TIMx, uint16_t InputTriggerSource);
mbed_official	237:f3da66175598	156	static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma);
mbed_official	237:f3da66175598	157	static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma);
mbed_official	237:f3da66175598	158	/* Private functions ---------------------------------------------------------*/
mbed_official	237:f3da66175598	159
mbed_official	375:3d36234a1087	160	/** @defgroup TIM_Exported_Functions TIM Exported Functions
mbed_official	237:f3da66175598	161	* @{
mbed_official	237:f3da66175598	162	*/
mbed_official	237:f3da66175598	163
mbed_official	375:3d36234a1087	164	/** @defgroup TIM_Exported_Functions_Group1 Time Base functions
mbed_official	237:f3da66175598	165	* @brief Time Base functions
mbed_official	237:f3da66175598	166	*
mbed_official	237:f3da66175598	167	@verbatim
mbed_official	237:f3da66175598	168	==============================================================================
mbed_official	237:f3da66175598	169	##### Time Base functions #####
mbed_official	237:f3da66175598	170	==============================================================================
mbed_official	237:f3da66175598	171	[..]
mbed_official	237:f3da66175598	172	This section provides functions allowing to:
mbed_official	237:f3da66175598	173	(+) Initialize and configure the TIM base.
mbed_official	237:f3da66175598	174	(+) De-initialize the TIM base.
mbed_official	237:f3da66175598	175	(+) Start the Time Base.
mbed_official	237:f3da66175598	176	(+) Stop the Time Base.
mbed_official	237:f3da66175598	177	(+) Start the Time Base and enable interrupt.
mbed_official	237:f3da66175598	178	(+) Stop the Time Base and disable interrupt.
mbed_official	237:f3da66175598	179	(+) Start the Time Base and enable DMA transfer.
mbed_official	237:f3da66175598	180	(+) Stop the Time Base and disable DMA transfer.
mbed_official	237:f3da66175598	181
mbed_official	237:f3da66175598	182	@endverbatim
mbed_official	237:f3da66175598	183	* @{
mbed_official	237:f3da66175598	184	*/
mbed_official	237:f3da66175598	185	/**
mbed_official	237:f3da66175598	186	* @brief Initializes the TIM Time base Unit according to the specified
mbed_official	237:f3da66175598	187	* parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official	237:f3da66175598	188	* @param htim: TIM Base handle
mbed_official	237:f3da66175598	189	* @retval HAL status
mbed_official	237:f3da66175598	190	*/
mbed_official	237:f3da66175598	191	HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	192	{
mbed_official	237:f3da66175598	193	/* Check the TIM handle allocation */
mbed_official	375:3d36234a1087	194	if(htim == HAL_NULL)
mbed_official	237:f3da66175598	195	{
mbed_official	237:f3da66175598	196	return HAL_ERROR;
mbed_official	237:f3da66175598	197	}
mbed_official	237:f3da66175598	198
mbed_official	237:f3da66175598	199	/* Check the parameters */
mbed_official	237:f3da66175598	200	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	201	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official	237:f3da66175598	202	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official	237:f3da66175598	203
mbed_official	237:f3da66175598	204	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	237:f3da66175598	205	{
mbed_official	237:f3da66175598	206	/* Init the low level hardware : GPIO, CLOCK, NVIC */
mbed_official	237:f3da66175598	207	HAL_TIM_Base_MspInit(htim);
mbed_official	237:f3da66175598	208	}
mbed_official	237:f3da66175598	209
mbed_official	237:f3da66175598	210	/* Set the TIM state */
mbed_official	237:f3da66175598	211	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	212
mbed_official	237:f3da66175598	213	/* Set the Time Base configuration */
mbed_official	237:f3da66175598	214	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	237:f3da66175598	215
mbed_official	237:f3da66175598	216	/* Initialize the TIM state*/
mbed_official	237:f3da66175598	217	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	218
mbed_official	237:f3da66175598	219	return HAL_OK;
mbed_official	237:f3da66175598	220	}
mbed_official	237:f3da66175598	221
mbed_official	237:f3da66175598	222	/**
mbed_official	237:f3da66175598	223	* @brief DeInitializes the TIM Base peripheral
mbed_official	237:f3da66175598	224	* @param htim: TIM Base handle
mbed_official	237:f3da66175598	225	* @retval HAL status
mbed_official	237:f3da66175598	226	*/
mbed_official	237:f3da66175598	227	HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	228	{
mbed_official	237:f3da66175598	229	/* Check the parameters */
mbed_official	237:f3da66175598	230	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	231
mbed_official	237:f3da66175598	232	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	233
mbed_official	237:f3da66175598	234	/* Disable the TIM Peripheral Clock */
mbed_official	237:f3da66175598	235	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	236
mbed_official	237:f3da66175598	237	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official	237:f3da66175598	238	HAL_TIM_Base_MspDeInit(htim);
mbed_official	237:f3da66175598	239
mbed_official	237:f3da66175598	240	/* Change TIM state */
mbed_official	237:f3da66175598	241	htim->State = HAL_TIM_STATE_RESET;
mbed_official	237:f3da66175598	242
mbed_official	237:f3da66175598	243	/* Release Lock */
mbed_official	237:f3da66175598	244	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	245
mbed_official	237:f3da66175598	246	return HAL_OK;
mbed_official	237:f3da66175598	247	}
mbed_official	237:f3da66175598	248
mbed_official	237:f3da66175598	249	/**
mbed_official	237:f3da66175598	250	* @brief Initializes the TIM Base MSP.
mbed_official	237:f3da66175598	251	* @param htim: TIM handle
mbed_official	237:f3da66175598	252	* @retval None
mbed_official	237:f3da66175598	253	*/
mbed_official	237:f3da66175598	254	__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	255	{
mbed_official	237:f3da66175598	256	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	257	the HAL_TIM_Base_MspInit could be implemented in the user file
mbed_official	237:f3da66175598	258	*/
mbed_official	237:f3da66175598	259	}
mbed_official	237:f3da66175598	260
mbed_official	237:f3da66175598	261	/**
mbed_official	237:f3da66175598	262	* @brief DeInitializes TIM Base MSP.
mbed_official	237:f3da66175598	263	* @param htim: TIM handle
mbed_official	237:f3da66175598	264	* @retval None
mbed_official	237:f3da66175598	265	*/
mbed_official	237:f3da66175598	266	__weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	267	{
mbed_official	237:f3da66175598	268	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	269	the HAL_TIM_Base_MspDeInit could be implemented in the user file
mbed_official	237:f3da66175598	270	*/
mbed_official	237:f3da66175598	271	}
mbed_official	237:f3da66175598	272
mbed_official	237:f3da66175598	273
mbed_official	237:f3da66175598	274	/**
mbed_official	237:f3da66175598	275	* @brief Starts the TIM Base generation.
mbed_official	237:f3da66175598	276	* @param htim : TIM handle
mbed_official	237:f3da66175598	277	* @retval HAL status
mbed_official	237:f3da66175598	278	*/
mbed_official	237:f3da66175598	279	HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	280	{
mbed_official	237:f3da66175598	281	/* Check the parameters */
mbed_official	237:f3da66175598	282	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	283
mbed_official	237:f3da66175598	284	/* Set the TIM state */
mbed_official	237:f3da66175598	285	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	286
mbed_official	237:f3da66175598	287	/* Enable the Peripheral */
mbed_official	237:f3da66175598	288	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	289
mbed_official	237:f3da66175598	290	/* Change the TIM state*/
mbed_official	237:f3da66175598	291	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	292
mbed_official	237:f3da66175598	293	/* Return function status */
mbed_official	237:f3da66175598	294	return HAL_OK;
mbed_official	237:f3da66175598	295	}
mbed_official	237:f3da66175598	296
mbed_official	237:f3da66175598	297	/**
mbed_official	237:f3da66175598	298	* @brief Stops the TIM Base generation.
mbed_official	237:f3da66175598	299	* @param htim : TIM handle
mbed_official	237:f3da66175598	300	* @retval HAL status
mbed_official	237:f3da66175598	301	*/
mbed_official	237:f3da66175598	302	HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	303	{
mbed_official	237:f3da66175598	304	/* Check the parameters */
mbed_official	237:f3da66175598	305	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	306
mbed_official	237:f3da66175598	307	/* Set the TIM state */
mbed_official	237:f3da66175598	308	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	309
mbed_official	237:f3da66175598	310	/* Disable the Peripheral */
mbed_official	237:f3da66175598	311	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	312
mbed_official	237:f3da66175598	313	/* Change the TIM state*/
mbed_official	237:f3da66175598	314	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	315
mbed_official	237:f3da66175598	316	/* Return function status */
mbed_official	237:f3da66175598	317	return HAL_OK;
mbed_official	237:f3da66175598	318	}
mbed_official	237:f3da66175598	319
mbed_official	237:f3da66175598	320	/**
mbed_official	237:f3da66175598	321	* @brief Starts the TIM Base generation in interrupt mode.
mbed_official	237:f3da66175598	322	* @param htim : TIM handle
mbed_official	237:f3da66175598	323	* @retval HAL status
mbed_official	237:f3da66175598	324	*/
mbed_official	237:f3da66175598	325	HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	326	{
mbed_official	237:f3da66175598	327	/* Check the parameters */
mbed_official	237:f3da66175598	328	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	329
mbed_official	237:f3da66175598	330	/* Enable the TIM Update interrupt */
mbed_official	237:f3da66175598	331	__HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE);
mbed_official	237:f3da66175598	332
mbed_official	237:f3da66175598	333	/* Enable the Peripheral */
mbed_official	237:f3da66175598	334	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	335
mbed_official	237:f3da66175598	336	/* Return function status */
mbed_official	237:f3da66175598	337	return HAL_OK;
mbed_official	237:f3da66175598	338	}
mbed_official	237:f3da66175598	339
mbed_official	237:f3da66175598	340	/**
mbed_official	237:f3da66175598	341	* @brief Stops the TIM Base generation in interrupt mode.
mbed_official	237:f3da66175598	342	* @param htim : TIM handle
mbed_official	237:f3da66175598	343	* @retval HAL status
mbed_official	237:f3da66175598	344	*/
mbed_official	237:f3da66175598	345	HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	346	{
mbed_official	237:f3da66175598	347	/* Check the parameters */
mbed_official	237:f3da66175598	348	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	349	/* Disable the TIM Update interrupt */
mbed_official	237:f3da66175598	350	__HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE);
mbed_official	237:f3da66175598	351
mbed_official	237:f3da66175598	352	/* Disable the Peripheral */
mbed_official	237:f3da66175598	353	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	354
mbed_official	237:f3da66175598	355	/* Return function status */
mbed_official	237:f3da66175598	356	return HAL_OK;
mbed_official	237:f3da66175598	357	}
mbed_official	237:f3da66175598	358
mbed_official	237:f3da66175598	359	/**
mbed_official	237:f3da66175598	360	* @brief Starts the TIM Base generation in DMA mode.
mbed_official	237:f3da66175598	361	* @param htim : TIM handle
mbed_official	237:f3da66175598	362	* @param pData: The source Buffer address.
mbed_official	237:f3da66175598	363	* @param Length: The length of data to be transferred from memory to peripheral.
mbed_official	237:f3da66175598	364	* @retval HAL status
mbed_official	237:f3da66175598	365	*/
mbed_official	237:f3da66175598	366	HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length)
mbed_official	237:f3da66175598	367	{
mbed_official	237:f3da66175598	368	/* Check the parameters */
mbed_official	237:f3da66175598	369	assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	370
mbed_official	237:f3da66175598	371	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	237:f3da66175598	372	{
mbed_official	237:f3da66175598	373	return HAL_BUSY;
mbed_official	237:f3da66175598	374	}
mbed_official	237:f3da66175598	375	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	237:f3da66175598	376	{
mbed_official	237:f3da66175598	377	if((pData == 0 ) && (Length > 0))
mbed_official	237:f3da66175598	378	{
mbed_official	237:f3da66175598	379	return HAL_ERROR;
mbed_official	237:f3da66175598	380	}
mbed_official	237:f3da66175598	381	else
mbed_official	237:f3da66175598	382	{
mbed_official	237:f3da66175598	383	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	384	}
mbed_official	237:f3da66175598	385	}
mbed_official	237:f3da66175598	386	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	387	htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official	237:f3da66175598	388
mbed_official	237:f3da66175598	389	/* Set the DMA error callback */
mbed_official	237:f3da66175598	390	htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	391
mbed_official	237:f3da66175598	392	/* Enable the DMA channel */
mbed_official	237:f3da66175598	393	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length);
mbed_official	237:f3da66175598	394
mbed_official	237:f3da66175598	395	/* Enable the TIM Update DMA request */
mbed_official	237:f3da66175598	396	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE);
mbed_official	237:f3da66175598	397
mbed_official	237:f3da66175598	398	/* Enable the Peripheral */
mbed_official	237:f3da66175598	399	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	400
mbed_official	237:f3da66175598	401	/* Return function status */
mbed_official	237:f3da66175598	402	return HAL_OK;
mbed_official	237:f3da66175598	403	}
mbed_official	237:f3da66175598	404
mbed_official	237:f3da66175598	405	/**
mbed_official	237:f3da66175598	406	* @brief Stops the TIM Base generation in DMA mode.
mbed_official	237:f3da66175598	407	* @param htim : TIM handle
mbed_official	237:f3da66175598	408	* @retval HAL status
mbed_official	237:f3da66175598	409	*/
mbed_official	237:f3da66175598	410	HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	411	{
mbed_official	237:f3da66175598	412	/* Check the parameters */
mbed_official	237:f3da66175598	413	assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	414
mbed_official	237:f3da66175598	415	/* Disable the TIM Update DMA request */
mbed_official	237:f3da66175598	416	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE);
mbed_official	237:f3da66175598	417
mbed_official	237:f3da66175598	418	/* Disable the Peripheral */
mbed_official	237:f3da66175598	419	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	420
mbed_official	237:f3da66175598	421	/* Change the htim state */
mbed_official	237:f3da66175598	422	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	423
mbed_official	237:f3da66175598	424	/* Return function status */
mbed_official	237:f3da66175598	425	return HAL_OK;
mbed_official	237:f3da66175598	426	}
mbed_official	237:f3da66175598	427
mbed_official	237:f3da66175598	428	/**
mbed_official	237:f3da66175598	429	* @}
mbed_official	237:f3da66175598	430	*/
mbed_official	237:f3da66175598	431
mbed_official	375:3d36234a1087	432	/** @defgroup TIM_Exported_Functions_Group2 Time Output Compare functions
mbed_official	237:f3da66175598	433	* @brief Time Output Compare functions
mbed_official	237:f3da66175598	434	*
mbed_official	237:f3da66175598	435	@verbatim
mbed_official	237:f3da66175598	436	==============================================================================
mbed_official	237:f3da66175598	437	##### Time Output Compare functions #####
mbed_official	237:f3da66175598	438	==============================================================================
mbed_official	237:f3da66175598	439	[..]
mbed_official	237:f3da66175598	440	This section provides functions allowing to:
mbed_official	237:f3da66175598	441	(+) Initialize and configure the TIM Output Compare.
mbed_official	237:f3da66175598	442	(+) De-initialize the TIM Output Compare.
mbed_official	237:f3da66175598	443	(+) Start the Time Output Compare.
mbed_official	237:f3da66175598	444	(+) Stop the Time Output Compare.
mbed_official	237:f3da66175598	445	(+) Start the Time Output Compare and enable interrupt.
mbed_official	237:f3da66175598	446	(+) Stop the Time Output Compare and disable interrupt.
mbed_official	237:f3da66175598	447	(+) Start the Time Output Compare and enable DMA transfer.
mbed_official	237:f3da66175598	448	(+) Stop the Time Output Compare and disable DMA transfer.
mbed_official	237:f3da66175598	449
mbed_official	237:f3da66175598	450	@endverbatim
mbed_official	237:f3da66175598	451	* @{
mbed_official	237:f3da66175598	452	*/
mbed_official	237:f3da66175598	453	/**
mbed_official	237:f3da66175598	454	* @brief Initializes the TIM Output Compare according to the specified
mbed_official	237:f3da66175598	455	* parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official	237:f3da66175598	456	* @param htim: TIM Output Compare handle
mbed_official	237:f3da66175598	457	* @retval HAL status
mbed_official	237:f3da66175598	458	*/
mbed_official	237:f3da66175598	459	HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim)
mbed_official	237:f3da66175598	460	{
mbed_official	237:f3da66175598	461	/* Check the TIM handle allocation */
mbed_official	375:3d36234a1087	462	if(htim == HAL_NULL)
mbed_official	237:f3da66175598	463	{
mbed_official	237:f3da66175598	464	return HAL_ERROR;
mbed_official	237:f3da66175598	465	}
mbed_official	237:f3da66175598	466
mbed_official	237:f3da66175598	467	/* Check the parameters */
mbed_official	237:f3da66175598	468	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	469	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official	237:f3da66175598	470	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official	237:f3da66175598	471
mbed_official	237:f3da66175598	472	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	237:f3da66175598	473	{
mbed_official	237:f3da66175598	474	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official	237:f3da66175598	475	HAL_TIM_OC_MspInit(htim);
mbed_official	237:f3da66175598	476	}
mbed_official	237:f3da66175598	477
mbed_official	237:f3da66175598	478	/* Set the TIM state */
mbed_official	237:f3da66175598	479	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	480
mbed_official	237:f3da66175598	481	/* Init the base time for the Output Compare */
mbed_official	237:f3da66175598	482	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	237:f3da66175598	483
mbed_official	237:f3da66175598	484	/* Initialize the TIM state*/
mbed_official	237:f3da66175598	485	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	486
mbed_official	237:f3da66175598	487	return HAL_OK;
mbed_official	237:f3da66175598	488	}
mbed_official	237:f3da66175598	489
mbed_official	237:f3da66175598	490	/**
mbed_official	237:f3da66175598	491	* @brief DeInitializes the TIM peripheral
mbed_official	237:f3da66175598	492	* @param htim: TIM Output Compare handle
mbed_official	237:f3da66175598	493	* @retval HAL status
mbed_official	237:f3da66175598	494	*/
mbed_official	237:f3da66175598	495	HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	496	{
mbed_official	237:f3da66175598	497	/* Check the parameters */
mbed_official	237:f3da66175598	498	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	499
mbed_official	237:f3da66175598	500	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	501
mbed_official	237:f3da66175598	502	/* Disable the TIM Peripheral Clock */
mbed_official	237:f3da66175598	503	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	504
mbed_official	237:f3da66175598	505	/* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official	237:f3da66175598	506	HAL_TIM_OC_MspDeInit(htim);
mbed_official	237:f3da66175598	507
mbed_official	237:f3da66175598	508	/* Change TIM state */
mbed_official	237:f3da66175598	509	htim->State = HAL_TIM_STATE_RESET;
mbed_official	237:f3da66175598	510
mbed_official	237:f3da66175598	511	/* Release Lock */
mbed_official	237:f3da66175598	512	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	513
mbed_official	237:f3da66175598	514	return HAL_OK;
mbed_official	237:f3da66175598	515	}
mbed_official	237:f3da66175598	516
mbed_official	237:f3da66175598	517	/**
mbed_official	237:f3da66175598	518	* @brief Initializes the TIM Output Compare MSP.
mbed_official	237:f3da66175598	519	* @param htim: TIM handle
mbed_official	237:f3da66175598	520	* @retval None
mbed_official	237:f3da66175598	521	*/
mbed_official	237:f3da66175598	522	__weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	523	{
mbed_official	237:f3da66175598	524	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	525	the HAL_TIM_OC_MspInit could be implemented in the user file
mbed_official	237:f3da66175598	526	*/
mbed_official	237:f3da66175598	527	}
mbed_official	237:f3da66175598	528
mbed_official	237:f3da66175598	529	/**
mbed_official	237:f3da66175598	530	* @brief DeInitializes TIM Output Compare MSP.
mbed_official	237:f3da66175598	531	* @param htim: TIM handle
mbed_official	237:f3da66175598	532	* @retval None
mbed_official	237:f3da66175598	533	*/
mbed_official	237:f3da66175598	534	__weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	535	{
mbed_official	237:f3da66175598	536	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	537	the HAL_TIM_OC_MspDeInit could be implemented in the user file
mbed_official	237:f3da66175598	538	*/
mbed_official	237:f3da66175598	539	}
mbed_official	237:f3da66175598	540
mbed_official	237:f3da66175598	541	/**
mbed_official	237:f3da66175598	542	* @brief Starts the TIM Output Compare signal generation.
mbed_official	237:f3da66175598	543	* @param htim : TIM Output Compare handle
mbed_official	237:f3da66175598	544	* @param Channel : TIM Channel to be enabled
mbed_official	237:f3da66175598	545	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	546	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	547	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	548	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	549	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	550	* @retval HAL status
mbed_official	237:f3da66175598	551	*/
mbed_official	237:f3da66175598	552	HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	553	{
mbed_official	237:f3da66175598	554	/* Check the parameters */
mbed_official	237:f3da66175598	555	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	556
mbed_official	237:f3da66175598	557	/* Enable the Output compare channel */
mbed_official	237:f3da66175598	558	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	559
mbed_official	237:f3da66175598	560	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	561	{
mbed_official	237:f3da66175598	562	/* Enable the main output */
mbed_official	237:f3da66175598	563	__HAL_TIM_MOE_ENABLE(htim);
mbed_official	237:f3da66175598	564	}
mbed_official	237:f3da66175598	565
mbed_official	237:f3da66175598	566	/* Enable the Peripheral */
mbed_official	237:f3da66175598	567	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	568
mbed_official	237:f3da66175598	569	/* Return function status */
mbed_official	237:f3da66175598	570	return HAL_OK;
mbed_official	237:f3da66175598	571	}
mbed_official	237:f3da66175598	572
mbed_official	237:f3da66175598	573	/**
mbed_official	237:f3da66175598	574	* @brief Stops the TIM Output Compare signal generation.
mbed_official	237:f3da66175598	575	* @param htim : TIM handle
mbed_official	237:f3da66175598	576	* @param Channel : TIM Channel to be disabled
mbed_official	237:f3da66175598	577	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	578	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	579	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	580	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	581	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	582	* @retval HAL status
mbed_official	237:f3da66175598	583	*/
mbed_official	237:f3da66175598	584	HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	585	{
mbed_official	237:f3da66175598	586	/* Check the parameters */
mbed_official	237:f3da66175598	587	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	588
mbed_official	237:f3da66175598	589	/* Disable the Output compare channel */
mbed_official	237:f3da66175598	590	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	591
mbed_official	237:f3da66175598	592	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	593	{
mbed_official	237:f3da66175598	594	/* Disable the Main Ouput */
mbed_official	237:f3da66175598	595	__HAL_TIM_MOE_DISABLE(htim);
mbed_official	237:f3da66175598	596	}
mbed_official	237:f3da66175598	597
mbed_official	237:f3da66175598	598	/* Disable the Peripheral */
mbed_official	237:f3da66175598	599	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	600
mbed_official	237:f3da66175598	601	/* Return function status */
mbed_official	237:f3da66175598	602	return HAL_OK;
mbed_official	237:f3da66175598	603	}
mbed_official	237:f3da66175598	604
mbed_official	237:f3da66175598	605	/**
mbed_official	237:f3da66175598	606	* @brief Starts the TIM Output Compare signal generation in interrupt mode.
mbed_official	237:f3da66175598	607	* @param htim : TIM OC handle
mbed_official	237:f3da66175598	608	* @param Channel : TIM Channel to be enabled
mbed_official	237:f3da66175598	609	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	610	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	611	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	612	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	613	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	614	* @retval HAL status
mbed_official	237:f3da66175598	615	*/
mbed_official	237:f3da66175598	616	HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	617	{
mbed_official	237:f3da66175598	618	/* Check the parameters */
mbed_official	237:f3da66175598	619	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	620
mbed_official	237:f3da66175598	621	switch (Channel)
mbed_official	237:f3da66175598	622	{
mbed_official	237:f3da66175598	623	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	624	{
mbed_official	237:f3da66175598	625	/* Enable the TIM Capture/Compare 1 interrupt */
mbed_official	237:f3da66175598	626	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	627	}
mbed_official	237:f3da66175598	628	break;
mbed_official	237:f3da66175598	629
mbed_official	237:f3da66175598	630	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	631	{
mbed_official	237:f3da66175598	632	/* Enable the TIM Capture/Compare 2 interrupt */
mbed_official	237:f3da66175598	633	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	634	}
mbed_official	237:f3da66175598	635	break;
mbed_official	237:f3da66175598	636
mbed_official	237:f3da66175598	637	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	638	{
mbed_official	237:f3da66175598	639	/* Enable the TIM Capture/Compare 3 interrupt */
mbed_official	237:f3da66175598	640	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official	237:f3da66175598	641	}
mbed_official	237:f3da66175598	642	break;
mbed_official	237:f3da66175598	643
mbed_official	237:f3da66175598	644	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	645	{
mbed_official	237:f3da66175598	646	/* Enable the TIM Capture/Compare 4 interrupt */
mbed_official	237:f3da66175598	647	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official	237:f3da66175598	648	}
mbed_official	237:f3da66175598	649	break;
mbed_official	237:f3da66175598	650
mbed_official	237:f3da66175598	651	default:
mbed_official	237:f3da66175598	652	break;
mbed_official	237:f3da66175598	653	}
mbed_official	237:f3da66175598	654
mbed_official	237:f3da66175598	655	/* Enable the Output compare channel */
mbed_official	237:f3da66175598	656	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	657
mbed_official	237:f3da66175598	658	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	659	{
mbed_official	237:f3da66175598	660	/* Enable the main output */
mbed_official	237:f3da66175598	661	__HAL_TIM_MOE_ENABLE(htim);
mbed_official	237:f3da66175598	662	}
mbed_official	237:f3da66175598	663
mbed_official	237:f3da66175598	664	/* Enable the Peripheral */
mbed_official	237:f3da66175598	665	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	666
mbed_official	237:f3da66175598	667	/* Return function status */
mbed_official	237:f3da66175598	668	return HAL_OK;
mbed_official	237:f3da66175598	669	}
mbed_official	237:f3da66175598	670
mbed_official	237:f3da66175598	671	/**
mbed_official	237:f3da66175598	672	* @brief Stops the TIM Output Compare signal generation in interrupt mode.
mbed_official	237:f3da66175598	673	* @param htim : TIM Output Compare handle
mbed_official	237:f3da66175598	674	* @param Channel : TIM Channel to be disabled
mbed_official	237:f3da66175598	675	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	676	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	677	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	678	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	679	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	680	* @retval HAL status
mbed_official	237:f3da66175598	681	*/
mbed_official	237:f3da66175598	682	HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	683	{
mbed_official	237:f3da66175598	684	/* Check the parameters */
mbed_official	237:f3da66175598	685	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	686
mbed_official	237:f3da66175598	687	switch (Channel)
mbed_official	237:f3da66175598	688	{
mbed_official	237:f3da66175598	689	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	690	{
mbed_official	237:f3da66175598	691	/* Disable the TIM Capture/Compare 1 interrupt */
mbed_official	237:f3da66175598	692	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	693	}
mbed_official	237:f3da66175598	694	break;
mbed_official	237:f3da66175598	695
mbed_official	237:f3da66175598	696	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	697	{
mbed_official	237:f3da66175598	698	/* Disable the TIM Capture/Compare 2 interrupt */
mbed_official	237:f3da66175598	699	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	700	}
mbed_official	237:f3da66175598	701	break;
mbed_official	237:f3da66175598	702
mbed_official	237:f3da66175598	703	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	704	{
mbed_official	237:f3da66175598	705	/* Disable the TIM Capture/Compare 3 interrupt */
mbed_official	237:f3da66175598	706	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official	237:f3da66175598	707	}
mbed_official	237:f3da66175598	708	break;
mbed_official	237:f3da66175598	709
mbed_official	237:f3da66175598	710	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	711	{
mbed_official	237:f3da66175598	712	/* Disable the TIM Capture/Compare 4 interrupt */
mbed_official	237:f3da66175598	713	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official	237:f3da66175598	714	}
mbed_official	237:f3da66175598	715	break;
mbed_official	237:f3da66175598	716
mbed_official	237:f3da66175598	717	default:
mbed_official	237:f3da66175598	718	break;
mbed_official	237:f3da66175598	719	}
mbed_official	237:f3da66175598	720
mbed_official	237:f3da66175598	721	/* Disable the Output compare channel */
mbed_official	237:f3da66175598	722	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	723
mbed_official	237:f3da66175598	724	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	725	{
mbed_official	237:f3da66175598	726	/* Disable the Main Ouput */
mbed_official	237:f3da66175598	727	__HAL_TIM_MOE_DISABLE(htim);
mbed_official	237:f3da66175598	728	}
mbed_official	237:f3da66175598	729
mbed_official	237:f3da66175598	730	/* Disable the Peripheral */
mbed_official	237:f3da66175598	731	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	732
mbed_official	237:f3da66175598	733	/* Return function status */
mbed_official	237:f3da66175598	734	return HAL_OK;
mbed_official	237:f3da66175598	735	}
mbed_official	237:f3da66175598	736
mbed_official	237:f3da66175598	737	/**
mbed_official	237:f3da66175598	738	* @brief Starts the TIM Output Compare signal generation in DMA mode.
mbed_official	237:f3da66175598	739	* @param htim : TIM Output Compare handle
mbed_official	237:f3da66175598	740	* @param Channel : TIM Channel to be enabled
mbed_official	237:f3da66175598	741	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	742	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	743	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	744	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	745	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	746	* @param pData: The source Buffer address.
mbed_official	237:f3da66175598	747	* @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official	237:f3da66175598	748	* @retval HAL status
mbed_official	237:f3da66175598	749	*/
mbed_official	237:f3da66175598	750	HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
mbed_official	237:f3da66175598	751	{
mbed_official	237:f3da66175598	752	/* Check the parameters */
mbed_official	237:f3da66175598	753	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	754
mbed_official	237:f3da66175598	755	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	237:f3da66175598	756	{
mbed_official	237:f3da66175598	757	return HAL_BUSY;
mbed_official	237:f3da66175598	758	}
mbed_official	237:f3da66175598	759	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	237:f3da66175598	760	{
mbed_official	237:f3da66175598	761	if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official	237:f3da66175598	762	{
mbed_official	237:f3da66175598	763	return HAL_ERROR;
mbed_official	237:f3da66175598	764	}
mbed_official	237:f3da66175598	765	else
mbed_official	237:f3da66175598	766	{
mbed_official	237:f3da66175598	767	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	768	}
mbed_official	237:f3da66175598	769	}
mbed_official	237:f3da66175598	770	switch (Channel)
mbed_official	237:f3da66175598	771	{
mbed_official	237:f3da66175598	772	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	773	{
mbed_official	237:f3da66175598	774	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	775	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	776
mbed_official	237:f3da66175598	777	/* Set the DMA error callback */
mbed_official	237:f3da66175598	778	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	779
mbed_official	237:f3da66175598	780	/* Enable the DMA channel */
mbed_official	237:f3da66175598	781	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official	237:f3da66175598	782
mbed_official	237:f3da66175598	783	/* Enable the TIM Capture/Compare 1 DMA request */
mbed_official	237:f3da66175598	784	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	237:f3da66175598	785	}
mbed_official	237:f3da66175598	786	break;
mbed_official	237:f3da66175598	787
mbed_official	237:f3da66175598	788	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	789	{
mbed_official	237:f3da66175598	790	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	791	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	792
mbed_official	237:f3da66175598	793	/* Set the DMA error callback */
mbed_official	237:f3da66175598	794	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	795
mbed_official	237:f3da66175598	796	/* Enable the DMA channel */
mbed_official	237:f3da66175598	797	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official	237:f3da66175598	798
mbed_official	237:f3da66175598	799	/* Enable the TIM Capture/Compare 2 DMA request */
mbed_official	237:f3da66175598	800	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	237:f3da66175598	801	}
mbed_official	237:f3da66175598	802	break;
mbed_official	237:f3da66175598	803
mbed_official	237:f3da66175598	804	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	805	{
mbed_official	237:f3da66175598	806	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	807	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	808
mbed_official	237:f3da66175598	809	/* Set the DMA error callback */
mbed_official	237:f3da66175598	810	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	811
mbed_official	237:f3da66175598	812	/* Enable the DMA channel */
mbed_official	237:f3da66175598	813	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official	237:f3da66175598	814
mbed_official	237:f3da66175598	815	/* Enable the TIM Capture/Compare 3 DMA request */
mbed_official	237:f3da66175598	816	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	237:f3da66175598	817	}
mbed_official	237:f3da66175598	818	break;
mbed_official	237:f3da66175598	819
mbed_official	237:f3da66175598	820	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	821	{
mbed_official	237:f3da66175598	822	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	823	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	824
mbed_official	237:f3da66175598	825	/* Set the DMA error callback */
mbed_official	237:f3da66175598	826	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	827
mbed_official	237:f3da66175598	828	/* Enable the DMA channel */
mbed_official	237:f3da66175598	829	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official	237:f3da66175598	830
mbed_official	237:f3da66175598	831	/* Enable the TIM Capture/Compare 4 DMA request */
mbed_official	237:f3da66175598	832	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	237:f3da66175598	833	}
mbed_official	237:f3da66175598	834	break;
mbed_official	237:f3da66175598	835
mbed_official	237:f3da66175598	836	default:
mbed_official	237:f3da66175598	837	break;
mbed_official	237:f3da66175598	838	}
mbed_official	237:f3da66175598	839
mbed_official	237:f3da66175598	840	/* Enable the Output compare channel */
mbed_official	237:f3da66175598	841	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	842
mbed_official	237:f3da66175598	843	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	844	{
mbed_official	237:f3da66175598	845	/* Enable the main output */
mbed_official	237:f3da66175598	846	__HAL_TIM_MOE_ENABLE(htim);
mbed_official	237:f3da66175598	847	}
mbed_official	237:f3da66175598	848
mbed_official	237:f3da66175598	849	/* Enable the Peripheral */
mbed_official	237:f3da66175598	850	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	851
mbed_official	237:f3da66175598	852	/* Return function status */
mbed_official	237:f3da66175598	853	return HAL_OK;
mbed_official	237:f3da66175598	854	}
mbed_official	237:f3da66175598	855
mbed_official	237:f3da66175598	856	/**
mbed_official	237:f3da66175598	857	* @brief Stops the TIM Output Compare signal generation in DMA mode.
mbed_official	237:f3da66175598	858	* @param htim : TIM Output Compare handle
mbed_official	237:f3da66175598	859	* @param Channel : TIM Channel to be disabled
mbed_official	237:f3da66175598	860	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	861	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	862	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	863	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	864	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	865	* @retval HAL status
mbed_official	237:f3da66175598	866	*/
mbed_official	237:f3da66175598	867	HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	868	{
mbed_official	237:f3da66175598	869	/* Check the parameters */
mbed_official	237:f3da66175598	870	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	871
mbed_official	237:f3da66175598	872	switch (Channel)
mbed_official	237:f3da66175598	873	{
mbed_official	237:f3da66175598	874	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	875	{
mbed_official	237:f3da66175598	876	/* Disable the TIM Capture/Compare 1 DMA request */
mbed_official	237:f3da66175598	877	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	237:f3da66175598	878	}
mbed_official	237:f3da66175598	879	break;
mbed_official	237:f3da66175598	880
mbed_official	237:f3da66175598	881	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	882	{
mbed_official	237:f3da66175598	883	/* Disable the TIM Capture/Compare 2 DMA request */
mbed_official	237:f3da66175598	884	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	237:f3da66175598	885	}
mbed_official	237:f3da66175598	886	break;
mbed_official	237:f3da66175598	887
mbed_official	237:f3da66175598	888	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	889	{
mbed_official	237:f3da66175598	890	/* Disable the TIM Capture/Compare 3 DMA request */
mbed_official	237:f3da66175598	891	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	237:f3da66175598	892	}
mbed_official	237:f3da66175598	893	break;
mbed_official	237:f3da66175598	894
mbed_official	237:f3da66175598	895	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	896	{
mbed_official	237:f3da66175598	897	/* Disable the TIM Capture/Compare 4 interrupt */
mbed_official	237:f3da66175598	898	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	237:f3da66175598	899	}
mbed_official	237:f3da66175598	900	break;
mbed_official	237:f3da66175598	901
mbed_official	237:f3da66175598	902	default:
mbed_official	237:f3da66175598	903	break;
mbed_official	237:f3da66175598	904	}
mbed_official	237:f3da66175598	905
mbed_official	237:f3da66175598	906	/* Disable the Output compare channel */
mbed_official	237:f3da66175598	907	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	908
mbed_official	237:f3da66175598	909	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	910	{
mbed_official	237:f3da66175598	911	/* Disable the Main Ouput */
mbed_official	237:f3da66175598	912	__HAL_TIM_MOE_DISABLE(htim);
mbed_official	237:f3da66175598	913	}
mbed_official	237:f3da66175598	914
mbed_official	237:f3da66175598	915	/* Disable the Peripheral */
mbed_official	237:f3da66175598	916	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	917
mbed_official	237:f3da66175598	918	/* Change the htim state */
mbed_official	237:f3da66175598	919	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	920
mbed_official	237:f3da66175598	921	/* Return function status */
mbed_official	237:f3da66175598	922	return HAL_OK;
mbed_official	237:f3da66175598	923	}
mbed_official	237:f3da66175598	924
mbed_official	237:f3da66175598	925	/**
mbed_official	237:f3da66175598	926	* @}
mbed_official	237:f3da66175598	927	*/
mbed_official	237:f3da66175598	928
mbed_official	375:3d36234a1087	929	/** @defgroup TIM_Exported_Functions_Group3 Time PWM functions
mbed_official	237:f3da66175598	930	* @brief Time PWM functions
mbed_official	237:f3da66175598	931	*
mbed_official	237:f3da66175598	932	@verbatim
mbed_official	237:f3da66175598	933	==============================================================================
mbed_official	237:f3da66175598	934	##### Time PWM functions #####
mbed_official	237:f3da66175598	935	==============================================================================
mbed_official	237:f3da66175598	936	[..]
mbed_official	237:f3da66175598	937	This section provides functions allowing to:
mbed_official	237:f3da66175598	938	(+) Initialize and configure the TIM OPWM.
mbed_official	237:f3da66175598	939	(+) De-initialize the TIM PWM.
mbed_official	237:f3da66175598	940	(+) Start the Time PWM.
mbed_official	237:f3da66175598	941	(+) Stop the Time PWM.
mbed_official	237:f3da66175598	942	(+) Start the Time PWM and enable interrupt.
mbed_official	237:f3da66175598	943	(+) Stop the Time PWM and disable interrupt.
mbed_official	237:f3da66175598	944	(+) Start the Time PWM and enable DMA transfer.
mbed_official	237:f3da66175598	945	(+) Stop the Time PWM and disable DMA transfer.
mbed_official	237:f3da66175598	946
mbed_official	237:f3da66175598	947	@endverbatim
mbed_official	237:f3da66175598	948	* @{
mbed_official	237:f3da66175598	949	*/
mbed_official	237:f3da66175598	950	/**
mbed_official	237:f3da66175598	951	* @brief Initializes the TIM PWM Time Base according to the specified
mbed_official	237:f3da66175598	952	* parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official	237:f3da66175598	953	* @param htim: TIM handle
mbed_official	237:f3da66175598	954	* @retval HAL status
mbed_official	237:f3da66175598	955	*/
mbed_official	237:f3da66175598	956	HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	957	{
mbed_official	237:f3da66175598	958	/* Check the TIM handle allocation */
mbed_official	375:3d36234a1087	959	if(htim == HAL_NULL)
mbed_official	237:f3da66175598	960	{
mbed_official	237:f3da66175598	961	return HAL_ERROR;
mbed_official	237:f3da66175598	962	}
mbed_official	237:f3da66175598	963
mbed_official	237:f3da66175598	964	/* Check the parameters */
mbed_official	237:f3da66175598	965	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	966	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official	237:f3da66175598	967	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official	237:f3da66175598	968
mbed_official	237:f3da66175598	969	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	237:f3da66175598	970	{
mbed_official	237:f3da66175598	971	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official	237:f3da66175598	972	HAL_TIM_PWM_MspInit(htim);
mbed_official	237:f3da66175598	973	}
mbed_official	237:f3da66175598	974
mbed_official	237:f3da66175598	975	/* Set the TIM state */
mbed_official	237:f3da66175598	976	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	977
mbed_official	237:f3da66175598	978	/* Init the base time for the PWM */
mbed_official	237:f3da66175598	979	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	237:f3da66175598	980
mbed_official	237:f3da66175598	981	/* Initialize the TIM state*/
mbed_official	237:f3da66175598	982	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	983
mbed_official	237:f3da66175598	984	return HAL_OK;
mbed_official	237:f3da66175598	985	}
mbed_official	237:f3da66175598	986
mbed_official	237:f3da66175598	987	/**
mbed_official	237:f3da66175598	988	* @brief DeInitializes the TIM peripheral
mbed_official	237:f3da66175598	989	* @param htim: TIM handle
mbed_official	237:f3da66175598	990	* @retval HAL status
mbed_official	237:f3da66175598	991	*/
mbed_official	237:f3da66175598	992	HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	993	{
mbed_official	237:f3da66175598	994	/* Check the parameters */
mbed_official	237:f3da66175598	995	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	996
mbed_official	237:f3da66175598	997	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	998
mbed_official	237:f3da66175598	999	/* Disable the TIM Peripheral Clock */
mbed_official	237:f3da66175598	1000	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	1001
mbed_official	237:f3da66175598	1002	/* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official	237:f3da66175598	1003	HAL_TIM_PWM_MspDeInit(htim);
mbed_official	237:f3da66175598	1004
mbed_official	237:f3da66175598	1005	/* Change TIM state */
mbed_official	237:f3da66175598	1006	htim->State = HAL_TIM_STATE_RESET;
mbed_official	237:f3da66175598	1007
mbed_official	237:f3da66175598	1008	/* Release Lock */
mbed_official	237:f3da66175598	1009	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	1010
mbed_official	237:f3da66175598	1011	return HAL_OK;
mbed_official	237:f3da66175598	1012	}
mbed_official	237:f3da66175598	1013
mbed_official	237:f3da66175598	1014	/**
mbed_official	237:f3da66175598	1015	* @brief Initializes the TIM PWM MSP.
mbed_official	237:f3da66175598	1016	* @param htim: TIM handle
mbed_official	237:f3da66175598	1017	* @retval None
mbed_official	237:f3da66175598	1018	*/
mbed_official	237:f3da66175598	1019	__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	1020	{
mbed_official	237:f3da66175598	1021	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	1022	the HAL_TIM_PWM_MspInit could be implemented in the user file
mbed_official	237:f3da66175598	1023	*/
mbed_official	237:f3da66175598	1024	}
mbed_official	237:f3da66175598	1025
mbed_official	237:f3da66175598	1026	/**
mbed_official	237:f3da66175598	1027	* @brief DeInitializes TIM PWM MSP.
mbed_official	237:f3da66175598	1028	* @param htim: TIM handle
mbed_official	237:f3da66175598	1029	* @retval None
mbed_official	237:f3da66175598	1030	*/
mbed_official	237:f3da66175598	1031	__weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	1032	{
mbed_official	237:f3da66175598	1033	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	1034	the HAL_TIM_PWM_MspDeInit could be implemented in the user file
mbed_official	237:f3da66175598	1035	*/
mbed_official	237:f3da66175598	1036	}
mbed_official	237:f3da66175598	1037
mbed_official	237:f3da66175598	1038	/**
mbed_official	237:f3da66175598	1039	* @brief Starts the PWM signal generation.
mbed_official	237:f3da66175598	1040	* @param htim : TIM handle
mbed_official	237:f3da66175598	1041	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	1042	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1043	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1044	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1045	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1046	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1047	* @retval HAL status
mbed_official	237:f3da66175598	1048	*/
mbed_official	237:f3da66175598	1049	HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	1050	{
mbed_official	237:f3da66175598	1051	/* Check the parameters */
mbed_official	237:f3da66175598	1052	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1053
mbed_official	237:f3da66175598	1054	/* Enable the Capture compare channel */
mbed_official	237:f3da66175598	1055	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	1056
mbed_official	237:f3da66175598	1057	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	1058	{
mbed_official	237:f3da66175598	1059	/* Enable the main output */
mbed_official	237:f3da66175598	1060	__HAL_TIM_MOE_ENABLE(htim);
mbed_official	237:f3da66175598	1061	}
mbed_official	237:f3da66175598	1062
mbed_official	237:f3da66175598	1063	/* Enable the Peripheral */
mbed_official	237:f3da66175598	1064	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	1065
mbed_official	237:f3da66175598	1066	/* Return function status */
mbed_official	237:f3da66175598	1067	return HAL_OK;
mbed_official	237:f3da66175598	1068	}
mbed_official	237:f3da66175598	1069
mbed_official	237:f3da66175598	1070	/**
mbed_official	237:f3da66175598	1071	* @brief Stops the PWM signal generation.
mbed_official	237:f3da66175598	1072	* @param htim : TIM handle
mbed_official	237:f3da66175598	1073	* @param Channel : TIM Channels to be disabled
mbed_official	237:f3da66175598	1074	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1075	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1076	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1077	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1078	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1079	* @retval HAL status
mbed_official	237:f3da66175598	1080	*/
mbed_official	237:f3da66175598	1081	HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	1082	{
mbed_official	237:f3da66175598	1083	/* Check the parameters */
mbed_official	237:f3da66175598	1084	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1085
mbed_official	237:f3da66175598	1086	/* Disable the Capture compare channel */
mbed_official	237:f3da66175598	1087	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	1088
mbed_official	237:f3da66175598	1089	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	1090	{
mbed_official	237:f3da66175598	1091	/* Disable the Main Ouput */
mbed_official	237:f3da66175598	1092	__HAL_TIM_MOE_DISABLE(htim);
mbed_official	237:f3da66175598	1093	}
mbed_official	237:f3da66175598	1094
mbed_official	237:f3da66175598	1095	/* Disable the Peripheral */
mbed_official	237:f3da66175598	1096	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	1097
mbed_official	237:f3da66175598	1098	/* Change the htim state */
mbed_official	237:f3da66175598	1099	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	1100
mbed_official	237:f3da66175598	1101	/* Return function status */
mbed_official	237:f3da66175598	1102	return HAL_OK;
mbed_official	237:f3da66175598	1103	}
mbed_official	237:f3da66175598	1104
mbed_official	237:f3da66175598	1105	/**
mbed_official	237:f3da66175598	1106	* @brief Starts the PWM signal generation in interrupt mode.
mbed_official	237:f3da66175598	1107	* @param htim : TIM handle
mbed_official	237:f3da66175598	1108	* @param Channel : TIM Channel to be disabled
mbed_official	237:f3da66175598	1109	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1110	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1111	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1112	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1113	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1114	* @retval HAL status
mbed_official	237:f3da66175598	1115	*/
mbed_official	237:f3da66175598	1116	HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	1117	{
mbed_official	237:f3da66175598	1118	/* Check the parameters */
mbed_official	237:f3da66175598	1119	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1120
mbed_official	237:f3da66175598	1121	switch (Channel)
mbed_official	237:f3da66175598	1122	{
mbed_official	237:f3da66175598	1123	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	1124	{
mbed_official	237:f3da66175598	1125	/* Enable the TIM Capture/Compare 1 interrupt */
mbed_official	237:f3da66175598	1126	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	1127	}
mbed_official	237:f3da66175598	1128	break;
mbed_official	237:f3da66175598	1129
mbed_official	237:f3da66175598	1130	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	1131	{
mbed_official	237:f3da66175598	1132	/* Enable the TIM Capture/Compare 2 interrupt */
mbed_official	237:f3da66175598	1133	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	1134	}
mbed_official	237:f3da66175598	1135	break;
mbed_official	237:f3da66175598	1136
mbed_official	237:f3da66175598	1137	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	1138	{
mbed_official	237:f3da66175598	1139	/* Enable the TIM Capture/Compare 3 interrupt */
mbed_official	237:f3da66175598	1140	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official	237:f3da66175598	1141	}
mbed_official	237:f3da66175598	1142	break;
mbed_official	237:f3da66175598	1143
mbed_official	237:f3da66175598	1144	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	1145	{
mbed_official	237:f3da66175598	1146	/* Enable the TIM Capture/Compare 4 interrupt */
mbed_official	237:f3da66175598	1147	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official	237:f3da66175598	1148	}
mbed_official	237:f3da66175598	1149	break;
mbed_official	237:f3da66175598	1150
mbed_official	237:f3da66175598	1151	default:
mbed_official	237:f3da66175598	1152	break;
mbed_official	237:f3da66175598	1153	}
mbed_official	237:f3da66175598	1154
mbed_official	237:f3da66175598	1155	/* Enable the Capture compare channel */
mbed_official	237:f3da66175598	1156	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	1157
mbed_official	237:f3da66175598	1158	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	1159	{
mbed_official	237:f3da66175598	1160	/* Enable the main output */
mbed_official	237:f3da66175598	1161	__HAL_TIM_MOE_ENABLE(htim);
mbed_official	237:f3da66175598	1162	}
mbed_official	237:f3da66175598	1163
mbed_official	237:f3da66175598	1164	/* Enable the Peripheral */
mbed_official	237:f3da66175598	1165	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	1166
mbed_official	237:f3da66175598	1167	/* Return function status */
mbed_official	237:f3da66175598	1168	return HAL_OK;
mbed_official	237:f3da66175598	1169	}
mbed_official	237:f3da66175598	1170
mbed_official	237:f3da66175598	1171	/**
mbed_official	237:f3da66175598	1172	* @brief Stops the PWM signal generation in interrupt mode.
mbed_official	237:f3da66175598	1173	* @param htim : TIM handle
mbed_official	237:f3da66175598	1174	* @param Channel : TIM Channels to be disabled
mbed_official	237:f3da66175598	1175	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1176	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1177	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1178	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1179	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1180	* @retval HAL status
mbed_official	237:f3da66175598	1181	*/
mbed_official	237:f3da66175598	1182	HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	1183	{
mbed_official	237:f3da66175598	1184	/* Check the parameters */
mbed_official	237:f3da66175598	1185	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1186
mbed_official	237:f3da66175598	1187	switch (Channel)
mbed_official	237:f3da66175598	1188	{
mbed_official	237:f3da66175598	1189	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	1190	{
mbed_official	237:f3da66175598	1191	/* Disable the TIM Capture/Compare 1 interrupt */
mbed_official	237:f3da66175598	1192	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	1193	}
mbed_official	237:f3da66175598	1194	break;
mbed_official	237:f3da66175598	1195
mbed_official	237:f3da66175598	1196	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	1197	{
mbed_official	237:f3da66175598	1198	/* Disable the TIM Capture/Compare 2 interrupt */
mbed_official	237:f3da66175598	1199	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	1200	}
mbed_official	237:f3da66175598	1201	break;
mbed_official	237:f3da66175598	1202
mbed_official	237:f3da66175598	1203	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	1204	{
mbed_official	237:f3da66175598	1205	/* Disable the TIM Capture/Compare 3 interrupt */
mbed_official	237:f3da66175598	1206	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official	237:f3da66175598	1207	}
mbed_official	237:f3da66175598	1208	break;
mbed_official	237:f3da66175598	1209
mbed_official	237:f3da66175598	1210	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	1211	{
mbed_official	237:f3da66175598	1212	/* Disable the TIM Capture/Compare 4 interrupt */
mbed_official	237:f3da66175598	1213	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official	237:f3da66175598	1214	}
mbed_official	237:f3da66175598	1215	break;
mbed_official	237:f3da66175598	1216
mbed_official	237:f3da66175598	1217	default:
mbed_official	237:f3da66175598	1218	break;
mbed_official	237:f3da66175598	1219	}
mbed_official	237:f3da66175598	1220
mbed_official	237:f3da66175598	1221	/* Disable the Capture compare channel */
mbed_official	237:f3da66175598	1222	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	1223
mbed_official	237:f3da66175598	1224	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	1225	{
mbed_official	237:f3da66175598	1226	/* Disable the Main Ouput */
mbed_official	237:f3da66175598	1227	__HAL_TIM_MOE_DISABLE(htim);
mbed_official	237:f3da66175598	1228	}
mbed_official	237:f3da66175598	1229
mbed_official	237:f3da66175598	1230	/* Disable the Peripheral */
mbed_official	237:f3da66175598	1231	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	1232
mbed_official	237:f3da66175598	1233	/* Return function status */
mbed_official	237:f3da66175598	1234	return HAL_OK;
mbed_official	237:f3da66175598	1235	}
mbed_official	237:f3da66175598	1236
mbed_official	237:f3da66175598	1237	/**
mbed_official	237:f3da66175598	1238	* @brief Starts the TIM PWM signal generation in DMA mode.
mbed_official	237:f3da66175598	1239	* @param htim : TIM handle
mbed_official	237:f3da66175598	1240	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	1241	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1242	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1243	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1244	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1245	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1246	* @param pData: The source Buffer address.
mbed_official	237:f3da66175598	1247	* @param Length: The length of data to be transferred from memory to TIM peripheral
mbed_official	237:f3da66175598	1248	* @retval HAL status
mbed_official	237:f3da66175598	1249	*/
mbed_official	237:f3da66175598	1250	HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
mbed_official	237:f3da66175598	1251	{
mbed_official	237:f3da66175598	1252	/* Check the parameters */
mbed_official	237:f3da66175598	1253	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1254
mbed_official	237:f3da66175598	1255	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	237:f3da66175598	1256	{
mbed_official	237:f3da66175598	1257	return HAL_BUSY;
mbed_official	237:f3da66175598	1258	}
mbed_official	237:f3da66175598	1259	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	237:f3da66175598	1260	{
mbed_official	237:f3da66175598	1261	if(((uint32_t)pData == 0 ) && (Length > 0))
mbed_official	237:f3da66175598	1262	{
mbed_official	237:f3da66175598	1263	return HAL_ERROR;
mbed_official	237:f3da66175598	1264	}
mbed_official	237:f3da66175598	1265	else
mbed_official	237:f3da66175598	1266	{
mbed_official	237:f3da66175598	1267	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	1268	}
mbed_official	237:f3da66175598	1269	}
mbed_official	237:f3da66175598	1270	switch (Channel)
mbed_official	237:f3da66175598	1271	{
mbed_official	237:f3da66175598	1272	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	1273	{
mbed_official	237:f3da66175598	1274	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	1275	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	1276
mbed_official	237:f3da66175598	1277	/* Set the DMA error callback */
mbed_official	237:f3da66175598	1278	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	1279
mbed_official	237:f3da66175598	1280	/* Enable the DMA channel */
mbed_official	237:f3da66175598	1281	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length);
mbed_official	237:f3da66175598	1282
mbed_official	237:f3da66175598	1283	/* Enable the TIM Capture/Compare 1 DMA request */
mbed_official	237:f3da66175598	1284	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	237:f3da66175598	1285	}
mbed_official	237:f3da66175598	1286	break;
mbed_official	237:f3da66175598	1287
mbed_official	237:f3da66175598	1288	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	1289	{
mbed_official	237:f3da66175598	1290	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	1291	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	1292
mbed_official	237:f3da66175598	1293	/* Set the DMA error callback */
mbed_official	237:f3da66175598	1294	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	1295
mbed_official	237:f3da66175598	1296	/* Enable the DMA channel */
mbed_official	237:f3da66175598	1297	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length);
mbed_official	237:f3da66175598	1298
mbed_official	237:f3da66175598	1299	/* Enable the TIM Capture/Compare 2 DMA request */
mbed_official	237:f3da66175598	1300	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	237:f3da66175598	1301	}
mbed_official	237:f3da66175598	1302	break;
mbed_official	237:f3da66175598	1303
mbed_official	237:f3da66175598	1304	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	1305	{
mbed_official	237:f3da66175598	1306	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	1307	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	1308
mbed_official	237:f3da66175598	1309	/* Set the DMA error callback */
mbed_official	237:f3da66175598	1310	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	1311
mbed_official	237:f3da66175598	1312	/* Enable the DMA channel */
mbed_official	237:f3da66175598	1313	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length);
mbed_official	237:f3da66175598	1314
mbed_official	237:f3da66175598	1315	/* Enable the TIM Output Capture/Compare 3 request */
mbed_official	237:f3da66175598	1316	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	237:f3da66175598	1317	}
mbed_official	237:f3da66175598	1318	break;
mbed_official	237:f3da66175598	1319
mbed_official	237:f3da66175598	1320	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	1321	{
mbed_official	237:f3da66175598	1322	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	1323	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	1324
mbed_official	237:f3da66175598	1325	/* Set the DMA error callback */
mbed_official	237:f3da66175598	1326	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	1327
mbed_official	237:f3da66175598	1328	/* Enable the DMA channel */
mbed_official	237:f3da66175598	1329	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length);
mbed_official	237:f3da66175598	1330
mbed_official	237:f3da66175598	1331	/* Enable the TIM Capture/Compare 4 DMA request */
mbed_official	237:f3da66175598	1332	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	237:f3da66175598	1333	}
mbed_official	237:f3da66175598	1334	break;
mbed_official	237:f3da66175598	1335
mbed_official	237:f3da66175598	1336	default:
mbed_official	237:f3da66175598	1337	break;
mbed_official	237:f3da66175598	1338	}
mbed_official	237:f3da66175598	1339
mbed_official	237:f3da66175598	1340	/* Enable the Capture compare channel */
mbed_official	237:f3da66175598	1341	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	1342
mbed_official	237:f3da66175598	1343	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	1344	{
mbed_official	237:f3da66175598	1345	/* Enable the main output */
mbed_official	237:f3da66175598	1346	__HAL_TIM_MOE_ENABLE(htim);
mbed_official	237:f3da66175598	1347	}
mbed_official	237:f3da66175598	1348
mbed_official	237:f3da66175598	1349	/* Enable the Peripheral */
mbed_official	237:f3da66175598	1350	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	1351
mbed_official	237:f3da66175598	1352	/* Return function status */
mbed_official	237:f3da66175598	1353	return HAL_OK;
mbed_official	237:f3da66175598	1354	}
mbed_official	237:f3da66175598	1355
mbed_official	237:f3da66175598	1356	/**
mbed_official	237:f3da66175598	1357	* @brief Stops the TIM PWM signal generation in DMA mode.
mbed_official	237:f3da66175598	1358	* @param htim : TIM handle
mbed_official	237:f3da66175598	1359	* @param Channel : TIM Channels to be disabled
mbed_official	237:f3da66175598	1360	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1361	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1362	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1363	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1364	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1365	* @retval HAL status
mbed_official	237:f3da66175598	1366	*/
mbed_official	237:f3da66175598	1367	HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	1368	{
mbed_official	237:f3da66175598	1369	/* Check the parameters */
mbed_official	237:f3da66175598	1370	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1371
mbed_official	237:f3da66175598	1372	switch (Channel)
mbed_official	237:f3da66175598	1373	{
mbed_official	237:f3da66175598	1374	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	1375	{
mbed_official	237:f3da66175598	1376	/* Disable the TIM Capture/Compare 1 DMA request */
mbed_official	237:f3da66175598	1377	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	237:f3da66175598	1378	}
mbed_official	237:f3da66175598	1379	break;
mbed_official	237:f3da66175598	1380
mbed_official	237:f3da66175598	1381	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	1382	{
mbed_official	237:f3da66175598	1383	/* Disable the TIM Capture/Compare 2 DMA request */
mbed_official	237:f3da66175598	1384	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	237:f3da66175598	1385	}
mbed_official	237:f3da66175598	1386	break;
mbed_official	237:f3da66175598	1387
mbed_official	237:f3da66175598	1388	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	1389	{
mbed_official	237:f3da66175598	1390	/* Disable the TIM Capture/Compare 3 DMA request */
mbed_official	237:f3da66175598	1391	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	237:f3da66175598	1392	}
mbed_official	237:f3da66175598	1393	break;
mbed_official	237:f3da66175598	1394
mbed_official	237:f3da66175598	1395	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	1396	{
mbed_official	237:f3da66175598	1397	/* Disable the TIM Capture/Compare 4 interrupt */
mbed_official	237:f3da66175598	1398	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	237:f3da66175598	1399	}
mbed_official	237:f3da66175598	1400	break;
mbed_official	237:f3da66175598	1401
mbed_official	237:f3da66175598	1402	default:
mbed_official	237:f3da66175598	1403	break;
mbed_official	237:f3da66175598	1404	}
mbed_official	237:f3da66175598	1405
mbed_official	237:f3da66175598	1406	/* Disable the Capture compare channel */
mbed_official	237:f3da66175598	1407	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	1408
mbed_official	237:f3da66175598	1409	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	1410	{
mbed_official	237:f3da66175598	1411	/* Disable the Main Ouput */
mbed_official	237:f3da66175598	1412	__HAL_TIM_MOE_DISABLE(htim);
mbed_official	237:f3da66175598	1413	}
mbed_official	237:f3da66175598	1414
mbed_official	237:f3da66175598	1415	/* Disable the Peripheral */
mbed_official	237:f3da66175598	1416	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	1417
mbed_official	237:f3da66175598	1418	/* Change the htim state */
mbed_official	237:f3da66175598	1419	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	1420
mbed_official	237:f3da66175598	1421	/* Return function status */
mbed_official	237:f3da66175598	1422	return HAL_OK;
mbed_official	237:f3da66175598	1423	}
mbed_official	237:f3da66175598	1424
mbed_official	237:f3da66175598	1425	/**
mbed_official	237:f3da66175598	1426	* @}
mbed_official	237:f3da66175598	1427	*/
mbed_official	237:f3da66175598	1428
mbed_official	375:3d36234a1087	1429	/** @defgroup TIM_Exported_Functions_Group4 Time Input Capture functions
mbed_official	237:f3da66175598	1430	* @brief Time Input Capture functions
mbed_official	237:f3da66175598	1431	*
mbed_official	237:f3da66175598	1432	@verbatim
mbed_official	237:f3da66175598	1433	==============================================================================
mbed_official	237:f3da66175598	1434	##### Time Input Capture functions #####
mbed_official	237:f3da66175598	1435	==============================================================================
mbed_official	237:f3da66175598	1436	[..]
mbed_official	237:f3da66175598	1437	This section provides functions allowing to:
mbed_official	237:f3da66175598	1438	(+) Initialize and configure the TIM Input Capture.
mbed_official	237:f3da66175598	1439	(+) De-initialize the TIM Input Capture.
mbed_official	237:f3da66175598	1440	(+) Start the Time Input Capture.
mbed_official	237:f3da66175598	1441	(+) Stop the Time Input Capture.
mbed_official	237:f3da66175598	1442	(+) Start the Time Input Capture and enable interrupt.
mbed_official	237:f3da66175598	1443	(+) Stop the Time Input Capture and disable interrupt.
mbed_official	237:f3da66175598	1444	(+) Start the Time Input Capture and enable DMA transfer.
mbed_official	237:f3da66175598	1445	(+) Stop the Time Input Capture and disable DMA transfer.
mbed_official	237:f3da66175598	1446
mbed_official	237:f3da66175598	1447	@endverbatim
mbed_official	237:f3da66175598	1448	* @{
mbed_official	237:f3da66175598	1449	*/
mbed_official	237:f3da66175598	1450	/**
mbed_official	237:f3da66175598	1451	* @brief Initializes the TIM Input Capture Time base according to the specified
mbed_official	237:f3da66175598	1452	* parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official	237:f3da66175598	1453	* @param htim: TIM Input Capture handle
mbed_official	237:f3da66175598	1454	* @retval HAL status
mbed_official	237:f3da66175598	1455	*/
mbed_official	237:f3da66175598	1456	HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	1457	{
mbed_official	237:f3da66175598	1458	/* Check the TIM handle allocation */
mbed_official	375:3d36234a1087	1459	if(htim == HAL_NULL)
mbed_official	237:f3da66175598	1460	{
mbed_official	237:f3da66175598	1461	return HAL_ERROR;
mbed_official	237:f3da66175598	1462	}
mbed_official	237:f3da66175598	1463
mbed_official	237:f3da66175598	1464	/* Check the parameters */
mbed_official	237:f3da66175598	1465	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	1466	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official	237:f3da66175598	1467	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official	237:f3da66175598	1468
mbed_official	237:f3da66175598	1469	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	237:f3da66175598	1470	{
mbed_official	237:f3da66175598	1471	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official	237:f3da66175598	1472	HAL_TIM_IC_MspInit(htim);
mbed_official	237:f3da66175598	1473	}
mbed_official	237:f3da66175598	1474
mbed_official	237:f3da66175598	1475	/* Set the TIM state */
mbed_official	237:f3da66175598	1476	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	1477
mbed_official	237:f3da66175598	1478	/* Init the base time for the input capture */
mbed_official	237:f3da66175598	1479	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	237:f3da66175598	1480
mbed_official	237:f3da66175598	1481	/* Initialize the TIM state*/
mbed_official	237:f3da66175598	1482	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	1483
mbed_official	237:f3da66175598	1484	return HAL_OK;
mbed_official	237:f3da66175598	1485	}
mbed_official	237:f3da66175598	1486
mbed_official	237:f3da66175598	1487	/**
mbed_official	237:f3da66175598	1488	* @brief DeInitializes the TIM peripheral
mbed_official	237:f3da66175598	1489	* @param htim: TIM Input Capture handle
mbed_official	237:f3da66175598	1490	* @retval HAL status
mbed_official	237:f3da66175598	1491	*/
mbed_official	237:f3da66175598	1492	HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	1493	{
mbed_official	237:f3da66175598	1494	/* Check the parameters */
mbed_official	237:f3da66175598	1495	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	1496
mbed_official	237:f3da66175598	1497	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	1498
mbed_official	237:f3da66175598	1499	/* Disable the TIM Peripheral Clock */
mbed_official	237:f3da66175598	1500	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	1501
mbed_official	237:f3da66175598	1502	/* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
mbed_official	237:f3da66175598	1503	HAL_TIM_IC_MspDeInit(htim);
mbed_official	237:f3da66175598	1504
mbed_official	237:f3da66175598	1505	/* Change TIM state */
mbed_official	237:f3da66175598	1506	htim->State = HAL_TIM_STATE_RESET;
mbed_official	237:f3da66175598	1507
mbed_official	237:f3da66175598	1508	/* Release Lock */
mbed_official	237:f3da66175598	1509	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	1510
mbed_official	237:f3da66175598	1511	return HAL_OK;
mbed_official	237:f3da66175598	1512	}
mbed_official	237:f3da66175598	1513
mbed_official	237:f3da66175598	1514	/**
mbed_official	237:f3da66175598	1515	* @brief Initializes the TIM INput Capture MSP.
mbed_official	237:f3da66175598	1516	* @param htim: TIM handle
mbed_official	237:f3da66175598	1517	* @retval None
mbed_official	237:f3da66175598	1518	*/
mbed_official	237:f3da66175598	1519	__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	1520	{
mbed_official	237:f3da66175598	1521	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	1522	the HAL_TIM_IC_MspInit could be implemented in the user file
mbed_official	237:f3da66175598	1523	*/
mbed_official	237:f3da66175598	1524	}
mbed_official	237:f3da66175598	1525
mbed_official	237:f3da66175598	1526	/**
mbed_official	237:f3da66175598	1527	* @brief DeInitializes TIM Input Capture MSP.
mbed_official	237:f3da66175598	1528	* @param htim: TIM handle
mbed_official	237:f3da66175598	1529	* @retval None
mbed_official	237:f3da66175598	1530	*/
mbed_official	237:f3da66175598	1531	__weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	1532	{
mbed_official	237:f3da66175598	1533	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	1534	the HAL_TIM_IC_MspDeInit could be implemented in the user file
mbed_official	237:f3da66175598	1535	*/
mbed_official	237:f3da66175598	1536	}
mbed_official	237:f3da66175598	1537
mbed_official	237:f3da66175598	1538	/**
mbed_official	237:f3da66175598	1539	* @brief Starts the TIM Input Capture measurement.
mbed_official	237:f3da66175598	1540	* @param htim : TIM Input Capture handle
mbed_official	237:f3da66175598	1541	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	1542	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1543	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1544	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1545	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1546	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1547	* @retval HAL status
mbed_official	237:f3da66175598	1548	*/
mbed_official	237:f3da66175598	1549	HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	1550	{
mbed_official	237:f3da66175598	1551	/* Check the parameters */
mbed_official	237:f3da66175598	1552	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1553
mbed_official	237:f3da66175598	1554	/* Enable the Input Capture channel */
mbed_official	237:f3da66175598	1555	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	1556
mbed_official	237:f3da66175598	1557	/* Enable the Peripheral */
mbed_official	237:f3da66175598	1558	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	1559
mbed_official	237:f3da66175598	1560	/* Return function status */
mbed_official	237:f3da66175598	1561	return HAL_OK;
mbed_official	237:f3da66175598	1562	}
mbed_official	237:f3da66175598	1563
mbed_official	237:f3da66175598	1564	/**
mbed_official	237:f3da66175598	1565	* @brief Stops the TIM Input Capture measurement.
mbed_official	237:f3da66175598	1566	* @param htim : TIM handle
mbed_official	237:f3da66175598	1567	* @param Channel : TIM Channels to be disabled
mbed_official	237:f3da66175598	1568	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1569	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1570	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1571	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1572	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1573	* @retval HAL status
mbed_official	237:f3da66175598	1574	*/
mbed_official	237:f3da66175598	1575	HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	1576	{
mbed_official	237:f3da66175598	1577	/* Check the parameters */
mbed_official	237:f3da66175598	1578	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1579
mbed_official	237:f3da66175598	1580	/* Disable the Input Capture channel */
mbed_official	237:f3da66175598	1581	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	1582
mbed_official	237:f3da66175598	1583	/* Disable the Peripheral */
mbed_official	237:f3da66175598	1584	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	1585
mbed_official	237:f3da66175598	1586	/* Return function status */
mbed_official	237:f3da66175598	1587	return HAL_OK;
mbed_official	237:f3da66175598	1588	}
mbed_official	237:f3da66175598	1589
mbed_official	237:f3da66175598	1590	/**
mbed_official	237:f3da66175598	1591	* @brief Starts the TIM Input Capture measurement in interrupt mode.
mbed_official	237:f3da66175598	1592	* @param htim : TIM Input Capture handle
mbed_official	237:f3da66175598	1593	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	1594	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1595	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1596	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1597	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1598	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1599	* @retval HAL status
mbed_official	237:f3da66175598	1600	*/
mbed_official	237:f3da66175598	1601	HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	1602	{
mbed_official	237:f3da66175598	1603	/* Check the parameters */
mbed_official	237:f3da66175598	1604	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1605
mbed_official	237:f3da66175598	1606	switch (Channel)
mbed_official	237:f3da66175598	1607	{
mbed_official	237:f3da66175598	1608	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	1609	{
mbed_official	237:f3da66175598	1610	/* Enable the TIM Capture/Compare 1 interrupt */
mbed_official	237:f3da66175598	1611	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	1612	}
mbed_official	237:f3da66175598	1613	break;
mbed_official	237:f3da66175598	1614
mbed_official	237:f3da66175598	1615	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	1616	{
mbed_official	237:f3da66175598	1617	/* Enable the TIM Capture/Compare 2 interrupt */
mbed_official	237:f3da66175598	1618	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	1619	}
mbed_official	237:f3da66175598	1620	break;
mbed_official	237:f3da66175598	1621
mbed_official	237:f3da66175598	1622	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	1623	{
mbed_official	237:f3da66175598	1624	/* Enable the TIM Capture/Compare 3 interrupt */
mbed_official	237:f3da66175598	1625	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
mbed_official	237:f3da66175598	1626	}
mbed_official	237:f3da66175598	1627	break;
mbed_official	237:f3da66175598	1628
mbed_official	237:f3da66175598	1629	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	1630	{
mbed_official	237:f3da66175598	1631	/* Enable the TIM Capture/Compare 4 interrupt */
mbed_official	237:f3da66175598	1632	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4);
mbed_official	237:f3da66175598	1633	}
mbed_official	237:f3da66175598	1634	break;
mbed_official	237:f3da66175598	1635
mbed_official	237:f3da66175598	1636	default:
mbed_official	237:f3da66175598	1637	break;
mbed_official	237:f3da66175598	1638	}
mbed_official	237:f3da66175598	1639	/* Enable the Input Capture channel */
mbed_official	237:f3da66175598	1640	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	1641
mbed_official	237:f3da66175598	1642	/* Enable the Peripheral */
mbed_official	237:f3da66175598	1643	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	1644
mbed_official	237:f3da66175598	1645	/* Return function status */
mbed_official	237:f3da66175598	1646	return HAL_OK;
mbed_official	237:f3da66175598	1647	}
mbed_official	237:f3da66175598	1648
mbed_official	237:f3da66175598	1649	/**
mbed_official	237:f3da66175598	1650	* @brief Stops the TIM Input Capture measurement in interrupt mode.
mbed_official	237:f3da66175598	1651	* @param htim : TIM handle
mbed_official	237:f3da66175598	1652	* @param Channel : TIM Channels to be disabled
mbed_official	237:f3da66175598	1653	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1654	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1655	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1656	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1657	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1658	* @retval HAL status
mbed_official	237:f3da66175598	1659	*/
mbed_official	237:f3da66175598	1660	HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	1661	{
mbed_official	237:f3da66175598	1662	/* Check the parameters */
mbed_official	237:f3da66175598	1663	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1664
mbed_official	237:f3da66175598	1665	switch (Channel)
mbed_official	237:f3da66175598	1666	{
mbed_official	237:f3da66175598	1667	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	1668	{
mbed_official	237:f3da66175598	1669	/* Disable the TIM Capture/Compare 1 interrupt */
mbed_official	237:f3da66175598	1670	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	1671	}
mbed_official	237:f3da66175598	1672	break;
mbed_official	237:f3da66175598	1673
mbed_official	237:f3da66175598	1674	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	1675	{
mbed_official	237:f3da66175598	1676	/* Disable the TIM Capture/Compare 2 interrupt */
mbed_official	237:f3da66175598	1677	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	1678	}
mbed_official	237:f3da66175598	1679	break;
mbed_official	237:f3da66175598	1680
mbed_official	237:f3da66175598	1681	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	1682	{
mbed_official	237:f3da66175598	1683	/* Disable the TIM Capture/Compare 3 interrupt */
mbed_official	237:f3da66175598	1684	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
mbed_official	237:f3da66175598	1685	}
mbed_official	237:f3da66175598	1686	break;
mbed_official	237:f3da66175598	1687
mbed_official	237:f3da66175598	1688	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	1689	{
mbed_official	237:f3da66175598	1690	/* Disable the TIM Capture/Compare 4 interrupt */
mbed_official	237:f3da66175598	1691	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4);
mbed_official	237:f3da66175598	1692	}
mbed_official	237:f3da66175598	1693	break;
mbed_official	237:f3da66175598	1694
mbed_official	237:f3da66175598	1695	default:
mbed_official	237:f3da66175598	1696	break;
mbed_official	237:f3da66175598	1697	}
mbed_official	237:f3da66175598	1698
mbed_official	237:f3da66175598	1699	/* Disable the Input Capture channel */
mbed_official	237:f3da66175598	1700	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	1701
mbed_official	237:f3da66175598	1702	/* Disable the Peripheral */
mbed_official	237:f3da66175598	1703	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	1704
mbed_official	237:f3da66175598	1705	/* Return function status */
mbed_official	237:f3da66175598	1706	return HAL_OK;
mbed_official	237:f3da66175598	1707	}
mbed_official	237:f3da66175598	1708
mbed_official	237:f3da66175598	1709	/**
mbed_official	237:f3da66175598	1710	* @brief Starts the TIM Input Capture measurement on in DMA mode.
mbed_official	237:f3da66175598	1711	* @param htim : TIM Input Capture handle
mbed_official	237:f3da66175598	1712	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	1713	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1714	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1715	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1716	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1717	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1718	* @param pData: The destination Buffer address.
mbed_official	237:f3da66175598	1719	* @param Length: The length of data to be transferred from TIM peripheral to memory.
mbed_official	237:f3da66175598	1720	* @retval HAL status
mbed_official	237:f3da66175598	1721	*/
mbed_official	237:f3da66175598	1722	HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length)
mbed_official	237:f3da66175598	1723	{
mbed_official	237:f3da66175598	1724	/* Check the parameters */
mbed_official	237:f3da66175598	1725	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1726	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	1727
mbed_official	237:f3da66175598	1728	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	237:f3da66175598	1729	{
mbed_official	237:f3da66175598	1730	return HAL_BUSY;
mbed_official	237:f3da66175598	1731	}
mbed_official	237:f3da66175598	1732	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	237:f3da66175598	1733	{
mbed_official	237:f3da66175598	1734	if((pData == 0 ) && (Length > 0))
mbed_official	237:f3da66175598	1735	{
mbed_official	237:f3da66175598	1736	return HAL_ERROR;
mbed_official	237:f3da66175598	1737	}
mbed_official	237:f3da66175598	1738	else
mbed_official	237:f3da66175598	1739	{
mbed_official	237:f3da66175598	1740	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	1741	}
mbed_official	237:f3da66175598	1742	}
mbed_official	237:f3da66175598	1743
mbed_official	237:f3da66175598	1744	switch (Channel)
mbed_official	237:f3da66175598	1745	{
mbed_official	237:f3da66175598	1746	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	1747	{
mbed_official	237:f3da66175598	1748	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	1749	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	1750
mbed_official	237:f3da66175598	1751	/* Set the DMA error callback */
mbed_official	237:f3da66175598	1752	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	1753
mbed_official	237:f3da66175598	1754	/* Enable the DMA channel */
mbed_official	237:f3da66175598	1755	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length);
mbed_official	237:f3da66175598	1756
mbed_official	237:f3da66175598	1757	/* Enable the TIM Capture/Compare 1 DMA request */
mbed_official	237:f3da66175598	1758	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	237:f3da66175598	1759	}
mbed_official	237:f3da66175598	1760	break;
mbed_official	237:f3da66175598	1761
mbed_official	237:f3da66175598	1762	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	1763	{
mbed_official	237:f3da66175598	1764	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	1765	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	1766
mbed_official	237:f3da66175598	1767	/* Set the DMA error callback */
mbed_official	237:f3da66175598	1768	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	1769
mbed_official	237:f3da66175598	1770	/* Enable the DMA channel */
mbed_official	237:f3da66175598	1771	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length);
mbed_official	237:f3da66175598	1772
mbed_official	237:f3da66175598	1773	/* Enable the TIM Capture/Compare 2 DMA request */
mbed_official	237:f3da66175598	1774	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	237:f3da66175598	1775	}
mbed_official	237:f3da66175598	1776	break;
mbed_official	237:f3da66175598	1777
mbed_official	237:f3da66175598	1778	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	1779	{
mbed_official	237:f3da66175598	1780	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	1781	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	1782
mbed_official	237:f3da66175598	1783	/* Set the DMA error callback */
mbed_official	237:f3da66175598	1784	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	1785
mbed_official	237:f3da66175598	1786	/* Enable the DMA channel */
mbed_official	237:f3da66175598	1787	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length);
mbed_official	237:f3da66175598	1788
mbed_official	237:f3da66175598	1789	/* Enable the TIM Capture/Compare 3 DMA request */
mbed_official	237:f3da66175598	1790	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	237:f3da66175598	1791	}
mbed_official	237:f3da66175598	1792	break;
mbed_official	237:f3da66175598	1793
mbed_official	237:f3da66175598	1794	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	1795	{
mbed_official	237:f3da66175598	1796	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	1797	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	1798
mbed_official	237:f3da66175598	1799	/* Set the DMA error callback */
mbed_official	237:f3da66175598	1800	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	1801
mbed_official	237:f3da66175598	1802	/* Enable the DMA channel */
mbed_official	237:f3da66175598	1803	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length);
mbed_official	237:f3da66175598	1804
mbed_official	237:f3da66175598	1805	/* Enable the TIM Capture/Compare 4 DMA request */
mbed_official	237:f3da66175598	1806	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	237:f3da66175598	1807	}
mbed_official	237:f3da66175598	1808	break;
mbed_official	237:f3da66175598	1809
mbed_official	237:f3da66175598	1810	default:
mbed_official	237:f3da66175598	1811	break;
mbed_official	237:f3da66175598	1812	}
mbed_official	237:f3da66175598	1813
mbed_official	237:f3da66175598	1814	/* Enable the Input Capture channel */
mbed_official	237:f3da66175598	1815	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	1816
mbed_official	237:f3da66175598	1817	/* Enable the Peripheral */
mbed_official	237:f3da66175598	1818	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	1819
mbed_official	237:f3da66175598	1820	/* Return function status */
mbed_official	237:f3da66175598	1821	return HAL_OK;
mbed_official	237:f3da66175598	1822	}
mbed_official	237:f3da66175598	1823
mbed_official	237:f3da66175598	1824	/**
mbed_official	237:f3da66175598	1825	* @brief Stops the TIM Input Capture measurement on in DMA mode.
mbed_official	237:f3da66175598	1826	* @param htim : TIM Input Capture handle
mbed_official	237:f3da66175598	1827	* @param Channel : TIM Channels to be disabled
mbed_official	237:f3da66175598	1828	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1829	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	1830	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	1831	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	1832	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	1833	* @retval HAL status
mbed_official	237:f3da66175598	1834	*/
mbed_official	237:f3da66175598	1835	HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	1836	{
mbed_official	237:f3da66175598	1837	/* Check the parameters */
mbed_official	237:f3da66175598	1838	assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
mbed_official	237:f3da66175598	1839	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	1840
mbed_official	237:f3da66175598	1841	switch (Channel)
mbed_official	237:f3da66175598	1842	{
mbed_official	237:f3da66175598	1843	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	1844	{
mbed_official	237:f3da66175598	1845	/* Disable the TIM Capture/Compare 1 DMA request */
mbed_official	237:f3da66175598	1846	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	237:f3da66175598	1847	}
mbed_official	237:f3da66175598	1848	break;
mbed_official	237:f3da66175598	1849
mbed_official	237:f3da66175598	1850	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	1851	{
mbed_official	237:f3da66175598	1852	/* Disable the TIM Capture/Compare 2 DMA request */
mbed_official	237:f3da66175598	1853	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	237:f3da66175598	1854	}
mbed_official	237:f3da66175598	1855	break;
mbed_official	237:f3da66175598	1856
mbed_official	237:f3da66175598	1857	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	1858	{
mbed_official	237:f3da66175598	1859	/* Disable the TIM Capture/Compare 3 DMA request */
mbed_official	237:f3da66175598	1860	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
mbed_official	237:f3da66175598	1861	}
mbed_official	237:f3da66175598	1862	break;
mbed_official	237:f3da66175598	1863
mbed_official	237:f3da66175598	1864	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	1865	{
mbed_official	237:f3da66175598	1866	/* Disable the TIM Capture/Compare 4 DMA request */
mbed_official	237:f3da66175598	1867	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4);
mbed_official	237:f3da66175598	1868	}
mbed_official	237:f3da66175598	1869	break;
mbed_official	237:f3da66175598	1870
mbed_official	237:f3da66175598	1871	default:
mbed_official	237:f3da66175598	1872	break;
mbed_official	237:f3da66175598	1873	}
mbed_official	237:f3da66175598	1874
mbed_official	237:f3da66175598	1875	/* Disable the Input Capture channel */
mbed_official	237:f3da66175598	1876	TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	1877
mbed_official	237:f3da66175598	1878	/* Disable the Peripheral */
mbed_official	237:f3da66175598	1879	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	1880
mbed_official	237:f3da66175598	1881	/* Change the htim state */
mbed_official	237:f3da66175598	1882	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	1883
mbed_official	237:f3da66175598	1884	/* Return function status */
mbed_official	237:f3da66175598	1885	return HAL_OK;
mbed_official	237:f3da66175598	1886	}
mbed_official	237:f3da66175598	1887	/**
mbed_official	237:f3da66175598	1888	* @}
mbed_official	237:f3da66175598	1889	*/
mbed_official	237:f3da66175598	1890
mbed_official	375:3d36234a1087	1891	/** @defgroup TIM_Exported_Functions_Group5 Time One Pulse functions
mbed_official	237:f3da66175598	1892	* @brief Time One Pulse functions
mbed_official	237:f3da66175598	1893	*
mbed_official	237:f3da66175598	1894	@verbatim
mbed_official	237:f3da66175598	1895	==============================================================================
mbed_official	237:f3da66175598	1896	##### Time One Pulse functions #####
mbed_official	237:f3da66175598	1897	==============================================================================
mbed_official	237:f3da66175598	1898	[..]
mbed_official	237:f3da66175598	1899	This section provides functions allowing to:
mbed_official	237:f3da66175598	1900	(+) Initialize and configure the TIM One Pulse.
mbed_official	237:f3da66175598	1901	(+) De-initialize the TIM One Pulse.
mbed_official	237:f3da66175598	1902	(+) Start the Time One Pulse.
mbed_official	237:f3da66175598	1903	(+) Stop the Time One Pulse.
mbed_official	237:f3da66175598	1904	(+) Start the Time One Pulse and enable interrupt.
mbed_official	237:f3da66175598	1905	(+) Stop the Time One Pulse and disable interrupt.
mbed_official	237:f3da66175598	1906	(+) Start the Time One Pulse and enable DMA transfer.
mbed_official	237:f3da66175598	1907	(+) Stop the Time One Pulse and disable DMA transfer.
mbed_official	237:f3da66175598	1908
mbed_official	237:f3da66175598	1909	@endverbatim
mbed_official	237:f3da66175598	1910	* @{
mbed_official	237:f3da66175598	1911	*/
mbed_official	237:f3da66175598	1912	/**
mbed_official	237:f3da66175598	1913	* @brief Initializes the TIM One Pulse Time Base according to the specified
mbed_official	237:f3da66175598	1914	* parameters in the TIM_HandleTypeDef and create the associated handle.
mbed_official	237:f3da66175598	1915	* @param htim: TIM OnePulse handle
mbed_official	237:f3da66175598	1916	* @param OnePulseMode: Select the One pulse mode.
mbed_official	237:f3da66175598	1917	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	1918	* @arg TIM_OPMODE_SINGLE: Only one pulse will be generated.
mbed_official	237:f3da66175598	1919	* @arg TIM_OPMODE_REPETITIVE: Repetitive pulses wil be generated.
mbed_official	237:f3da66175598	1920	* @retval HAL status
mbed_official	237:f3da66175598	1921	*/
mbed_official	237:f3da66175598	1922	HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode)
mbed_official	237:f3da66175598	1923	{
mbed_official	237:f3da66175598	1924	/* Check the TIM handle allocation */
mbed_official	375:3d36234a1087	1925	if(htim == HAL_NULL)
mbed_official	237:f3da66175598	1926	{
mbed_official	237:f3da66175598	1927	return HAL_ERROR;
mbed_official	237:f3da66175598	1928	}
mbed_official	237:f3da66175598	1929
mbed_official	237:f3da66175598	1930	/* Check the parameters */
mbed_official	237:f3da66175598	1931	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	1932	assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
mbed_official	237:f3da66175598	1933	assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
mbed_official	237:f3da66175598	1934	assert_param(IS_TIM_OPM_MODE(OnePulseMode));
mbed_official	237:f3da66175598	1935
mbed_official	237:f3da66175598	1936	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	237:f3da66175598	1937	{
mbed_official	237:f3da66175598	1938	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official	237:f3da66175598	1939	HAL_TIM_OnePulse_MspInit(htim);
mbed_official	237:f3da66175598	1940	}
mbed_official	237:f3da66175598	1941
mbed_official	237:f3da66175598	1942	/* Set the TIM state */
mbed_official	237:f3da66175598	1943	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	1944
mbed_official	237:f3da66175598	1945	/* Configure the Time base in the One Pulse Mode */
mbed_official	237:f3da66175598	1946	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	237:f3da66175598	1947
mbed_official	237:f3da66175598	1948	/* Reset the OPM Bit */
mbed_official	237:f3da66175598	1949	htim->Instance->CR1 &= ~TIM_CR1_OPM;
mbed_official	237:f3da66175598	1950
mbed_official	237:f3da66175598	1951	/* Configure the OPM Mode */
mbed_official	237:f3da66175598	1952	htim->Instance->CR1 \|= OnePulseMode;
mbed_official	237:f3da66175598	1953
mbed_official	237:f3da66175598	1954	/* Initialize the TIM state*/
mbed_official	237:f3da66175598	1955	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	1956
mbed_official	237:f3da66175598	1957	return HAL_OK;
mbed_official	237:f3da66175598	1958	}
mbed_official	237:f3da66175598	1959
mbed_official	237:f3da66175598	1960	/**
mbed_official	237:f3da66175598	1961	* @brief DeInitializes the TIM One Pulse
mbed_official	237:f3da66175598	1962	* @param htim: TIM One Pulse handle
mbed_official	237:f3da66175598	1963	* @retval HAL status
mbed_official	237:f3da66175598	1964	*/
mbed_official	237:f3da66175598	1965	HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	1966	{
mbed_official	237:f3da66175598	1967	/* Check the parameters */
mbed_official	237:f3da66175598	1968	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	1969
mbed_official	237:f3da66175598	1970	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	1971
mbed_official	237:f3da66175598	1972	/* Disable the TIM Peripheral Clock */
mbed_official	237:f3da66175598	1973	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	1974
mbed_official	237:f3da66175598	1975	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official	237:f3da66175598	1976	HAL_TIM_OnePulse_MspDeInit(htim);
mbed_official	237:f3da66175598	1977
mbed_official	237:f3da66175598	1978	/* Change TIM state */
mbed_official	237:f3da66175598	1979	htim->State = HAL_TIM_STATE_RESET;
mbed_official	237:f3da66175598	1980
mbed_official	237:f3da66175598	1981	/* Release Lock */
mbed_official	237:f3da66175598	1982	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	1983
mbed_official	237:f3da66175598	1984	return HAL_OK;
mbed_official	237:f3da66175598	1985	}
mbed_official	237:f3da66175598	1986
mbed_official	237:f3da66175598	1987	/**
mbed_official	237:f3da66175598	1988	* @brief Initializes the TIM One Pulse MSP.
mbed_official	237:f3da66175598	1989	* @param htim: TIM handle
mbed_official	237:f3da66175598	1990	* @retval None
mbed_official	237:f3da66175598	1991	*/
mbed_official	237:f3da66175598	1992	__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	1993	{
mbed_official	237:f3da66175598	1994	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	1995	the HAL_TIM_OnePulse_MspInit could be implemented in the user file
mbed_official	237:f3da66175598	1996	*/
mbed_official	237:f3da66175598	1997	}
mbed_official	237:f3da66175598	1998
mbed_official	237:f3da66175598	1999	/**
mbed_official	237:f3da66175598	2000	* @brief DeInitializes TIM One Pulse MSP.
mbed_official	237:f3da66175598	2001	* @param htim: TIM handle
mbed_official	237:f3da66175598	2002	* @retval None
mbed_official	237:f3da66175598	2003	*/
mbed_official	237:f3da66175598	2004	__weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	2005	{
mbed_official	237:f3da66175598	2006	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	2007	the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file
mbed_official	237:f3da66175598	2008	*/
mbed_official	237:f3da66175598	2009	}
mbed_official	237:f3da66175598	2010
mbed_official	237:f3da66175598	2011	/**
mbed_official	237:f3da66175598	2012	* @brief Starts the TIM One Pulse signal generation.
mbed_official	237:f3da66175598	2013	* @param htim : TIM One Pulse handle
mbed_official	237:f3da66175598	2014	* @param OutputChannel : TIM Channels to be enabled
mbed_official	237:f3da66175598	2015	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2016	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2017	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2018	* @retval HAL status
mbed_official	237:f3da66175598	2019	*/
mbed_official	237:f3da66175598	2020	HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official	237:f3da66175598	2021	{
mbed_official	237:f3da66175598	2022	/* Enable the Capture compare and the Input Capture channels
mbed_official	237:f3da66175598	2023	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official	237:f3da66175598	2024	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official	237:f3da66175598	2025	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official	237:f3da66175598	2026	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
mbed_official	237:f3da66175598	2027
mbed_official	237:f3da66175598	2028	No need to enable the counter, it's enabled automatically by hardware
mbed_official	237:f3da66175598	2029	(the counter starts in response to a stimulus and generate a pulse */
mbed_official	237:f3da66175598	2030
mbed_official	237:f3da66175598	2031	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2032	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2033
mbed_official	237:f3da66175598	2034	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	2035	{
mbed_official	237:f3da66175598	2036	/* Enable the main output */
mbed_official	237:f3da66175598	2037	__HAL_TIM_MOE_ENABLE(htim);
mbed_official	237:f3da66175598	2038	}
mbed_official	237:f3da66175598	2039
mbed_official	237:f3da66175598	2040	/* Return function status */
mbed_official	237:f3da66175598	2041	return HAL_OK;
mbed_official	237:f3da66175598	2042	}
mbed_official	237:f3da66175598	2043
mbed_official	237:f3da66175598	2044	/**
mbed_official	237:f3da66175598	2045	* @brief Stops the TIM One Pulse signal generation.
mbed_official	237:f3da66175598	2046	* @param htim : TIM One Pulse handle
mbed_official	237:f3da66175598	2047	* @param OutputChannel : TIM Channels to be disable
mbed_official	237:f3da66175598	2048	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2049	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2050	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2051	* @retval HAL status
mbed_official	237:f3da66175598	2052	*/
mbed_official	237:f3da66175598	2053	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official	237:f3da66175598	2054	{
mbed_official	237:f3da66175598	2055	/* Disable the Capture compare and the Input Capture channels
mbed_official	237:f3da66175598	2056	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official	237:f3da66175598	2057	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official	237:f3da66175598	2058	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official	237:f3da66175598	2059	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
mbed_official	237:f3da66175598	2060
mbed_official	237:f3da66175598	2061	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2062	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2063
mbed_official	237:f3da66175598	2064	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	2065	{
mbed_official	237:f3da66175598	2066	/* Disable the Main Ouput */
mbed_official	237:f3da66175598	2067	__HAL_TIM_MOE_DISABLE(htim);
mbed_official	237:f3da66175598	2068	}
mbed_official	237:f3da66175598	2069
mbed_official	237:f3da66175598	2070	/* Disable the Peripheral */
mbed_official	237:f3da66175598	2071	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	2072
mbed_official	237:f3da66175598	2073	/* Return function status */
mbed_official	237:f3da66175598	2074	return HAL_OK;
mbed_official	237:f3da66175598	2075	}
mbed_official	237:f3da66175598	2076
mbed_official	237:f3da66175598	2077	/**
mbed_official	237:f3da66175598	2078	* @brief Starts the TIM One Pulse signal generation in interrupt mode.
mbed_official	237:f3da66175598	2079	* @param htim : TIM One Pulse handle
mbed_official	237:f3da66175598	2080	* @param OutputChannel : TIM Channels to be enabled
mbed_official	237:f3da66175598	2081	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2082	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2083	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2084	* @retval HAL status
mbed_official	237:f3da66175598	2085	*/
mbed_official	237:f3da66175598	2086	HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official	237:f3da66175598	2087	{
mbed_official	237:f3da66175598	2088	/* Enable the Capture compare and the Input Capture channels
mbed_official	237:f3da66175598	2089	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official	237:f3da66175598	2090	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official	237:f3da66175598	2091	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official	237:f3da66175598	2092	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together
mbed_official	237:f3da66175598	2093
mbed_official	237:f3da66175598	2094	No need to enable the counter, it's enabled automatically by hardware
mbed_official	237:f3da66175598	2095	(the counter starts in response to a stimulus and generate a pulse */
mbed_official	237:f3da66175598	2096
mbed_official	237:f3da66175598	2097	/* Enable the TIM Capture/Compare 1 interrupt */
mbed_official	237:f3da66175598	2098	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	2099
mbed_official	237:f3da66175598	2100	/* Enable the TIM Capture/Compare 2 interrupt */
mbed_official	237:f3da66175598	2101	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	2102
mbed_official	237:f3da66175598	2103	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2104	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2105
mbed_official	237:f3da66175598	2106	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	2107	{
mbed_official	237:f3da66175598	2108	/* Enable the main output */
mbed_official	237:f3da66175598	2109	__HAL_TIM_MOE_ENABLE(htim);
mbed_official	237:f3da66175598	2110	}
mbed_official	237:f3da66175598	2111
mbed_official	237:f3da66175598	2112	/* Return function status */
mbed_official	237:f3da66175598	2113	return HAL_OK;
mbed_official	237:f3da66175598	2114	}
mbed_official	237:f3da66175598	2115
mbed_official	237:f3da66175598	2116	/**
mbed_official	237:f3da66175598	2117	* @brief Stops the TIM One Pulse signal generation in interrupt mode.
mbed_official	237:f3da66175598	2118	* @param htim : TIM One Pulse handle
mbed_official	237:f3da66175598	2119	* @param OutputChannel : TIM Channels to be enabled
mbed_official	237:f3da66175598	2120	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2121	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2122	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2123	* @retval HAL status
mbed_official	237:f3da66175598	2124	*/
mbed_official	237:f3da66175598	2125	HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
mbed_official	237:f3da66175598	2126	{
mbed_official	237:f3da66175598	2127	/* Disable the TIM Capture/Compare 1 interrupt */
mbed_official	237:f3da66175598	2128	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	2129
mbed_official	237:f3da66175598	2130	/* Disable the TIM Capture/Compare 2 interrupt */
mbed_official	237:f3da66175598	2131	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	2132
mbed_official	237:f3da66175598	2133	/* Disable the Capture compare and the Input Capture channels
mbed_official	237:f3da66175598	2134	(in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2)
mbed_official	237:f3da66175598	2135	if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and
mbed_official	237:f3da66175598	2136	if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output
mbed_official	237:f3da66175598	2137	in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */
mbed_official	237:f3da66175598	2138	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2139	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2140
mbed_official	237:f3da66175598	2141	if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
mbed_official	237:f3da66175598	2142	{
mbed_official	237:f3da66175598	2143	/* Disable the Main Ouput */
mbed_official	237:f3da66175598	2144	__HAL_TIM_MOE_DISABLE(htim);
mbed_official	237:f3da66175598	2145	}
mbed_official	237:f3da66175598	2146
mbed_official	237:f3da66175598	2147	/* Disable the Peripheral */
mbed_official	237:f3da66175598	2148	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	2149
mbed_official	237:f3da66175598	2150	/* Return function status */
mbed_official	237:f3da66175598	2151	return HAL_OK;
mbed_official	237:f3da66175598	2152	}
mbed_official	237:f3da66175598	2153
mbed_official	237:f3da66175598	2154	/**
mbed_official	237:f3da66175598	2155	* @}
mbed_official	237:f3da66175598	2156	*/
mbed_official	237:f3da66175598	2157
mbed_official	375:3d36234a1087	2158	/** @defgroup TIM_Exported_Functions_Group6 Time Encoder functions
mbed_official	237:f3da66175598	2159	* @brief Time Encoder functions
mbed_official	237:f3da66175598	2160	*
mbed_official	237:f3da66175598	2161	@verbatim
mbed_official	237:f3da66175598	2162	==============================================================================
mbed_official	237:f3da66175598	2163	##### Time Encoder functions #####
mbed_official	237:f3da66175598	2164	==============================================================================
mbed_official	237:f3da66175598	2165	[..]
mbed_official	237:f3da66175598	2166	This section provides functions allowing to:
mbed_official	237:f3da66175598	2167	(+) Initialize and configure the TIM Encoder.
mbed_official	237:f3da66175598	2168	(+) De-initialize the TIM Encoder.
mbed_official	237:f3da66175598	2169	(+) Start the Time Encoder.
mbed_official	237:f3da66175598	2170	(+) Stop the Time Encoder.
mbed_official	237:f3da66175598	2171	(+) Start the Time Encoder and enable interrupt.
mbed_official	237:f3da66175598	2172	(+) Stop the Time Encoder and disable interrupt.
mbed_official	237:f3da66175598	2173	(+) Start the Time Encoder and enable DMA transfer.
mbed_official	237:f3da66175598	2174	(+) Stop the Time Encoder and disable DMA transfer.
mbed_official	237:f3da66175598	2175
mbed_official	237:f3da66175598	2176	@endverbatim
mbed_official	237:f3da66175598	2177	* @{
mbed_official	237:f3da66175598	2178	*/
mbed_official	237:f3da66175598	2179	/**
mbed_official	237:f3da66175598	2180	* @brief Initializes the TIM Encoder Interface and create the associated handle.
mbed_official	237:f3da66175598	2181	* @param htim: TIM Encoder Interface handle
mbed_official	237:f3da66175598	2182	* @param sConfig: TIM Encoder Interface configuration structure
mbed_official	237:f3da66175598	2183	* @retval HAL status
mbed_official	237:f3da66175598	2184	*/
mbed_official	237:f3da66175598	2185	HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef htim, TIM_Encoder_InitTypeDef sConfig)
mbed_official	237:f3da66175598	2186	{
mbed_official	237:f3da66175598	2187	uint32_t tmpsmcr = 0;
mbed_official	237:f3da66175598	2188	uint32_t tmpccmr1 = 0;
mbed_official	237:f3da66175598	2189	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	2190
mbed_official	237:f3da66175598	2191	/* Check the TIM handle allocation */
mbed_official	375:3d36234a1087	2192	if(htim == HAL_NULL)
mbed_official	237:f3da66175598	2193	{
mbed_official	237:f3da66175598	2194	return HAL_ERROR;
mbed_official	237:f3da66175598	2195	}
mbed_official	237:f3da66175598	2196
mbed_official	237:f3da66175598	2197	/* Check the parameters */
mbed_official	237:f3da66175598	2198	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2199	assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode));
mbed_official	237:f3da66175598	2200	assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection));
mbed_official	237:f3da66175598	2201	assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection));
mbed_official	237:f3da66175598	2202	assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
mbed_official	237:f3da66175598	2203	assert_param(IS_TIM_IC_POLARITY(sConfig->IC2Polarity));
mbed_official	237:f3da66175598	2204	assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
mbed_official	237:f3da66175598	2205	assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
mbed_official	237:f3da66175598	2206	assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
mbed_official	237:f3da66175598	2207	assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
mbed_official	237:f3da66175598	2208
mbed_official	237:f3da66175598	2209	if(htim->State == HAL_TIM_STATE_RESET)
mbed_official	237:f3da66175598	2210	{
mbed_official	237:f3da66175598	2211	/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
mbed_official	237:f3da66175598	2212	HAL_TIM_Encoder_MspInit(htim);
mbed_official	237:f3da66175598	2213	}
mbed_official	237:f3da66175598	2214
mbed_official	237:f3da66175598	2215	/* Set the TIM state */
mbed_official	237:f3da66175598	2216	htim->State= HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	2217
mbed_official	237:f3da66175598	2218	/* Reset the SMS bits */
mbed_official	237:f3da66175598	2219	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official	237:f3da66175598	2220
mbed_official	237:f3da66175598	2221	/* Configure the Time base in the Encoder Mode */
mbed_official	237:f3da66175598	2222	TIM_Base_SetConfig(htim->Instance, &htim->Init);
mbed_official	237:f3da66175598	2223
mbed_official	237:f3da66175598	2224	/* Get the TIMx SMCR register value */
mbed_official	237:f3da66175598	2225	tmpsmcr = htim->Instance->SMCR;
mbed_official	237:f3da66175598	2226
mbed_official	237:f3da66175598	2227	/* Get the TIMx CCMR1 register value */
mbed_official	237:f3da66175598	2228	tmpccmr1 = htim->Instance->CCMR1;
mbed_official	237:f3da66175598	2229
mbed_official	237:f3da66175598	2230	/* Get the TIMx CCER register value */
mbed_official	237:f3da66175598	2231	tmpccer = htim->Instance->CCER;
mbed_official	237:f3da66175598	2232
mbed_official	237:f3da66175598	2233	/* Set the encoder Mode */
mbed_official	237:f3da66175598	2234	tmpsmcr \|= sConfig->EncoderMode;
mbed_official	237:f3da66175598	2235
mbed_official	237:f3da66175598	2236	/* Select the Capture Compare 1 and the Capture Compare 2 as input */
mbed_official	237:f3da66175598	2237	tmpccmr1 &= ~(TIM_CCMR1_CC1S \| TIM_CCMR1_CC2S);
mbed_official	237:f3da66175598	2238	tmpccmr1 \|= (sConfig->IC1Selection \| (sConfig->IC2Selection << 8));
mbed_official	237:f3da66175598	2239
mbed_official	237:f3da66175598	2240	/* Set the the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
mbed_official	237:f3da66175598	2241	tmpccmr1 &= ~(TIM_CCMR1_IC1PSC \| TIM_CCMR1_IC2PSC);
mbed_official	237:f3da66175598	2242	tmpccmr1 &= ~(TIM_CCMR1_IC1F \| TIM_CCMR1_IC2F);
mbed_official	237:f3da66175598	2243	tmpccmr1 \|= sConfig->IC1Prescaler \| (sConfig->IC2Prescaler << 8);
mbed_official	237:f3da66175598	2244	tmpccmr1 \|= (sConfig->IC1Filter << 4) \| (sConfig->IC2Filter << 12);
mbed_official	237:f3da66175598	2245
mbed_official	237:f3da66175598	2246	/* Set the TI1 and the TI2 Polarities */
mbed_official	237:f3da66175598	2247	tmpccer &= ~(TIM_CCER_CC1P \| TIM_CCER_CC2P);
mbed_official	237:f3da66175598	2248	tmpccer &= ~(TIM_CCER_CC1NP \| TIM_CCER_CC2NP);
mbed_official	237:f3da66175598	2249	tmpccer \|= sConfig->IC1Polarity \| (sConfig->IC2Polarity << 4);
mbed_official	237:f3da66175598	2250
mbed_official	237:f3da66175598	2251	/* Write to TIMx SMCR */
mbed_official	237:f3da66175598	2252	htim->Instance->SMCR = tmpsmcr;
mbed_official	237:f3da66175598	2253
mbed_official	237:f3da66175598	2254	/* Write to TIMx CCMR1 */
mbed_official	237:f3da66175598	2255	htim->Instance->CCMR1 = tmpccmr1;
mbed_official	237:f3da66175598	2256
mbed_official	237:f3da66175598	2257	/* Write to TIMx CCER */
mbed_official	237:f3da66175598	2258	htim->Instance->CCER = tmpccer;
mbed_official	237:f3da66175598	2259
mbed_official	237:f3da66175598	2260	/* Initialize the TIM state*/
mbed_official	237:f3da66175598	2261	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	2262
mbed_official	237:f3da66175598	2263	return HAL_OK;
mbed_official	237:f3da66175598	2264	}
mbed_official	237:f3da66175598	2265
mbed_official	237:f3da66175598	2266
mbed_official	237:f3da66175598	2267	/**
mbed_official	237:f3da66175598	2268	* @brief DeInitializes the TIM Encoder interface
mbed_official	237:f3da66175598	2269	* @param htim: TIM Encoder handle
mbed_official	237:f3da66175598	2270	* @retval HAL status
mbed_official	237:f3da66175598	2271	*/
mbed_official	237:f3da66175598	2272	HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	2273	{
mbed_official	237:f3da66175598	2274	/* Check the parameters */
mbed_official	237:f3da66175598	2275	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2276
mbed_official	237:f3da66175598	2277	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	2278
mbed_official	237:f3da66175598	2279	/* Disable the TIM Peripheral Clock */
mbed_official	237:f3da66175598	2280	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	2281
mbed_official	237:f3da66175598	2282	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
mbed_official	237:f3da66175598	2283	HAL_TIM_Encoder_MspDeInit(htim);
mbed_official	237:f3da66175598	2284
mbed_official	237:f3da66175598	2285	/* Change TIM state */
mbed_official	237:f3da66175598	2286	htim->State = HAL_TIM_STATE_RESET;
mbed_official	237:f3da66175598	2287
mbed_official	237:f3da66175598	2288	/* Release Lock */
mbed_official	237:f3da66175598	2289	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	2290
mbed_official	237:f3da66175598	2291	return HAL_OK;
mbed_official	237:f3da66175598	2292	}
mbed_official	237:f3da66175598	2293
mbed_official	237:f3da66175598	2294	/**
mbed_official	237:f3da66175598	2295	* @brief Initializes the TIM Encoder Interface MSP.
mbed_official	237:f3da66175598	2296	* @param htim: TIM handle
mbed_official	237:f3da66175598	2297	* @retval None
mbed_official	237:f3da66175598	2298	*/
mbed_official	237:f3da66175598	2299	__weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	2300	{
mbed_official	237:f3da66175598	2301	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	2302	the HAL_TIM_Encoder_MspInit could be implemented in the user file
mbed_official	237:f3da66175598	2303	*/
mbed_official	237:f3da66175598	2304	}
mbed_official	237:f3da66175598	2305
mbed_official	237:f3da66175598	2306	/**
mbed_official	237:f3da66175598	2307	* @brief DeInitializes TIM Encoder Interface MSP.
mbed_official	237:f3da66175598	2308	* @param htim: TIM handle
mbed_official	237:f3da66175598	2309	* @retval None
mbed_official	237:f3da66175598	2310	*/
mbed_official	237:f3da66175598	2311	__weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	2312	{
mbed_official	237:f3da66175598	2313	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	2314	the HAL_TIM_Encoder_MspDeInit could be implemented in the user file
mbed_official	237:f3da66175598	2315	*/
mbed_official	237:f3da66175598	2316	}
mbed_official	237:f3da66175598	2317
mbed_official	237:f3da66175598	2318	/**
mbed_official	237:f3da66175598	2319	* @brief Starts the TIM Encoder Interface.
mbed_official	237:f3da66175598	2320	* @param htim : TIM Encoder Interface handle
mbed_official	237:f3da66175598	2321	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	2322	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2323	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2324	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2325	* @retval HAL status
mbed_official	237:f3da66175598	2326	*/
mbed_official	237:f3da66175598	2327	HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	2328	{
mbed_official	237:f3da66175598	2329	/* Check the parameters */
mbed_official	237:f3da66175598	2330	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2331
mbed_official	237:f3da66175598	2332	/* Enable the encoder interface channels */
mbed_official	237:f3da66175598	2333	switch (Channel)
mbed_official	237:f3da66175598	2334	{
mbed_official	237:f3da66175598	2335	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	2336	{
mbed_official	237:f3da66175598	2337	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2338	break;
mbed_official	237:f3da66175598	2339	}
mbed_official	237:f3da66175598	2340	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	2341	{
mbed_official	237:f3da66175598	2342	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2343	break;
mbed_official	237:f3da66175598	2344	}
mbed_official	237:f3da66175598	2345	default :
mbed_official	237:f3da66175598	2346	{
mbed_official	237:f3da66175598	2347	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2348	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2349	break;
mbed_official	237:f3da66175598	2350	}
mbed_official	237:f3da66175598	2351	}
mbed_official	237:f3da66175598	2352	/* Enable the Peripheral */
mbed_official	237:f3da66175598	2353	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	2354
mbed_official	237:f3da66175598	2355	/* Return function status */
mbed_official	237:f3da66175598	2356	return HAL_OK;
mbed_official	237:f3da66175598	2357	}
mbed_official	237:f3da66175598	2358
mbed_official	237:f3da66175598	2359	/**
mbed_official	237:f3da66175598	2360	* @brief Stops the TIM Encoder Interface.
mbed_official	237:f3da66175598	2361	* @param htim : TIM Encoder Interface handle
mbed_official	237:f3da66175598	2362	* @param Channel : TIM Channels to be disabled
mbed_official	237:f3da66175598	2363	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2364	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2365	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2366	* @retval HAL status
mbed_official	237:f3da66175598	2367	*/
mbed_official	237:f3da66175598	2368	HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	2369	{
mbed_official	237:f3da66175598	2370	/* Check the parameters */
mbed_official	237:f3da66175598	2371	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2372
mbed_official	237:f3da66175598	2373	/* Disable the Input Capture channels 1 and 2
mbed_official	237:f3da66175598	2374	(in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official	237:f3da66175598	2375	switch (Channel)
mbed_official	237:f3da66175598	2376	{
mbed_official	237:f3da66175598	2377	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	2378	{
mbed_official	237:f3da66175598	2379	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2380	break;
mbed_official	237:f3da66175598	2381	}
mbed_official	237:f3da66175598	2382	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	2383	{
mbed_official	237:f3da66175598	2384	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2385	break;
mbed_official	237:f3da66175598	2386	}
mbed_official	237:f3da66175598	2387	default :
mbed_official	237:f3da66175598	2388	{
mbed_official	237:f3da66175598	2389	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2390	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2391	break;
mbed_official	237:f3da66175598	2392	}
mbed_official	237:f3da66175598	2393	}
mbed_official	237:f3da66175598	2394
mbed_official	237:f3da66175598	2395	/* Disable the Peripheral */
mbed_official	237:f3da66175598	2396	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	2397
mbed_official	237:f3da66175598	2398	/* Return function status */
mbed_official	237:f3da66175598	2399	return HAL_OK;
mbed_official	237:f3da66175598	2400	}
mbed_official	237:f3da66175598	2401
mbed_official	237:f3da66175598	2402	/**
mbed_official	237:f3da66175598	2403	* @brief Starts the TIM Encoder Interface in interrupt mode.
mbed_official	237:f3da66175598	2404	* @param htim : TIM Encoder Interface handle
mbed_official	237:f3da66175598	2405	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	2406	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2407	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2408	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2409	* @retval HAL status
mbed_official	237:f3da66175598	2410	*/
mbed_official	237:f3da66175598	2411	HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	2412	{
mbed_official	237:f3da66175598	2413	/* Check the parameters */
mbed_official	237:f3da66175598	2414	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2415
mbed_official	237:f3da66175598	2416	/* Enable the encoder interface channels */
mbed_official	237:f3da66175598	2417	/* Enable the capture compare Interrupts 1 and/or 2 */
mbed_official	237:f3da66175598	2418	switch (Channel)
mbed_official	237:f3da66175598	2419	{
mbed_official	237:f3da66175598	2420	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	2421	{
mbed_official	237:f3da66175598	2422	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2423	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	2424	break;
mbed_official	237:f3da66175598	2425	}
mbed_official	237:f3da66175598	2426	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	2427	{
mbed_official	237:f3da66175598	2428	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2429	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	2430	break;
mbed_official	237:f3da66175598	2431	}
mbed_official	237:f3da66175598	2432	default :
mbed_official	237:f3da66175598	2433	{
mbed_official	237:f3da66175598	2434	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2435	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2436	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	2437	__HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	2438	break;
mbed_official	237:f3da66175598	2439	}
mbed_official	237:f3da66175598	2440	}
mbed_official	237:f3da66175598	2441
mbed_official	237:f3da66175598	2442	/* Enable the Peripheral */
mbed_official	237:f3da66175598	2443	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	2444
mbed_official	237:f3da66175598	2445	/* Return function status */
mbed_official	237:f3da66175598	2446	return HAL_OK;
mbed_official	237:f3da66175598	2447	}
mbed_official	237:f3da66175598	2448
mbed_official	237:f3da66175598	2449	/**
mbed_official	237:f3da66175598	2450	* @brief Stops the TIM Encoder Interface in interrupt mode.
mbed_official	237:f3da66175598	2451	* @param htim : TIM Encoder Interface handle
mbed_official	237:f3da66175598	2452	* @param Channel : TIM Channels to be disabled
mbed_official	237:f3da66175598	2453	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2454	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2455	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2456	* @retval HAL status
mbed_official	237:f3da66175598	2457	*/
mbed_official	237:f3da66175598	2458	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	2459	{
mbed_official	237:f3da66175598	2460	/* Check the parameters */
mbed_official	237:f3da66175598	2461	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2462
mbed_official	237:f3da66175598	2463	/* Disable the Input Capture channels 1 and 2
mbed_official	237:f3da66175598	2464	(in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official	237:f3da66175598	2465	if(Channel == TIM_CHANNEL_1)
mbed_official	237:f3da66175598	2466	{
mbed_official	237:f3da66175598	2467	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2468
mbed_official	237:f3da66175598	2469	/* Disable the capture compare Interrupts 1 */
mbed_official	237:f3da66175598	2470	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	2471	}
mbed_official	237:f3da66175598	2472	else if(Channel == TIM_CHANNEL_2)
mbed_official	237:f3da66175598	2473	{
mbed_official	237:f3da66175598	2474	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2475
mbed_official	237:f3da66175598	2476	/* Disable the capture compare Interrupts 2 */
mbed_official	237:f3da66175598	2477	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	2478	}
mbed_official	237:f3da66175598	2479	else
mbed_official	237:f3da66175598	2480	{
mbed_official	237:f3da66175598	2481	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2482	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2483
mbed_official	237:f3da66175598	2484	/* Disable the capture compare Interrupts 1 and 2 */
mbed_official	237:f3da66175598	2485	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	2486	__HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	2487	}
mbed_official	237:f3da66175598	2488
mbed_official	237:f3da66175598	2489	/* Disable the Peripheral */
mbed_official	237:f3da66175598	2490	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	2491
mbed_official	237:f3da66175598	2492	/* Change the htim state */
mbed_official	237:f3da66175598	2493	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	2494
mbed_official	237:f3da66175598	2495	/* Return function status */
mbed_official	237:f3da66175598	2496	return HAL_OK;
mbed_official	237:f3da66175598	2497	}
mbed_official	237:f3da66175598	2498
mbed_official	237:f3da66175598	2499	/**
mbed_official	237:f3da66175598	2500	* @brief Starts the TIM Encoder Interface in DMA mode.
mbed_official	237:f3da66175598	2501	* @param htim : TIM Encoder Interface handle
mbed_official	237:f3da66175598	2502	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	2503	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2504	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2505	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2506	* @param pData1: The destination Buffer address for IC1.
mbed_official	237:f3da66175598	2507	* @param pData2: The destination Buffer address for IC2.
mbed_official	237:f3da66175598	2508	* @param Length: The length of data to be transferred from TIM peripheral to memory.
mbed_official	237:f3da66175598	2509	* @retval HAL status
mbed_official	237:f3da66175598	2510	*/
mbed_official	237:f3da66175598	2511	HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData1, uint32_t *pData2, uint16_t Length)
mbed_official	237:f3da66175598	2512	{
mbed_official	237:f3da66175598	2513	/* Check the parameters */
mbed_official	237:f3da66175598	2514	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2515
mbed_official	237:f3da66175598	2516	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	237:f3da66175598	2517	{
mbed_official	237:f3da66175598	2518	return HAL_BUSY;
mbed_official	237:f3da66175598	2519	}
mbed_official	237:f3da66175598	2520	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	237:f3da66175598	2521	{
mbed_official	237:f3da66175598	2522	if((((pData1 == 0) \|\| (pData2 == 0) )) && (Length > 0))
mbed_official	237:f3da66175598	2523	{
mbed_official	237:f3da66175598	2524	return HAL_ERROR;
mbed_official	237:f3da66175598	2525	}
mbed_official	237:f3da66175598	2526	else
mbed_official	237:f3da66175598	2527	{
mbed_official	237:f3da66175598	2528	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	2529	}
mbed_official	237:f3da66175598	2530	}
mbed_official	237:f3da66175598	2531
mbed_official	237:f3da66175598	2532	switch (Channel)
mbed_official	237:f3da66175598	2533	{
mbed_official	237:f3da66175598	2534	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	2535	{
mbed_official	237:f3da66175598	2536	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	2537	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	2538
mbed_official	237:f3da66175598	2539	/* Set the DMA error callback */
mbed_official	237:f3da66175598	2540	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	2541
mbed_official	237:f3da66175598	2542	/* Enable the DMA channel */
mbed_official	237:f3da66175598	2543	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t )pData1, Length);
mbed_official	237:f3da66175598	2544
mbed_official	237:f3da66175598	2545	/* Enable the TIM Input Capture DMA request */
mbed_official	237:f3da66175598	2546	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	237:f3da66175598	2547
mbed_official	237:f3da66175598	2548	/* Enable the Peripheral */
mbed_official	237:f3da66175598	2549	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	2550
mbed_official	237:f3da66175598	2551	/* Enable the Capture compare channel */
mbed_official	237:f3da66175598	2552	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2553	}
mbed_official	237:f3da66175598	2554	break;
mbed_official	237:f3da66175598	2555
mbed_official	237:f3da66175598	2556	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	2557	{
mbed_official	237:f3da66175598	2558	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	2559	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	2560
mbed_official	237:f3da66175598	2561	/* Set the DMA error callback */
mbed_official	237:f3da66175598	2562	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError;
mbed_official	237:f3da66175598	2563	/* Enable the DMA channel */
mbed_official	237:f3da66175598	2564	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
mbed_official	237:f3da66175598	2565
mbed_official	237:f3da66175598	2566	/* Enable the TIM Input Capture DMA request */
mbed_official	237:f3da66175598	2567	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	237:f3da66175598	2568
mbed_official	237:f3da66175598	2569	/* Enable the Peripheral */
mbed_official	237:f3da66175598	2570	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	2571
mbed_official	237:f3da66175598	2572	/* Enable the Capture compare channel */
mbed_official	237:f3da66175598	2573	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2574	}
mbed_official	237:f3da66175598	2575	break;
mbed_official	237:f3da66175598	2576
mbed_official	237:f3da66175598	2577	case TIM_CHANNEL_ALL:
mbed_official	237:f3da66175598	2578	{
mbed_official	237:f3da66175598	2579	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	2580	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	2581
mbed_official	237:f3da66175598	2582	/* Set the DMA error callback */
mbed_official	237:f3da66175598	2583	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	2584
mbed_official	237:f3da66175598	2585	/* Enable the DMA channel */
mbed_official	237:f3da66175598	2586	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length);
mbed_official	237:f3da66175598	2587
mbed_official	237:f3da66175598	2588	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	2589	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	2590
mbed_official	237:f3da66175598	2591	/* Set the DMA error callback */
mbed_official	237:f3da66175598	2592	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	2593
mbed_official	237:f3da66175598	2594	/* Enable the DMA channel */
mbed_official	237:f3da66175598	2595	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length);
mbed_official	237:f3da66175598	2596
mbed_official	237:f3da66175598	2597	/* Enable the Peripheral */
mbed_official	237:f3da66175598	2598	__HAL_TIM_ENABLE(htim);
mbed_official	237:f3da66175598	2599
mbed_official	237:f3da66175598	2600	/* Enable the Capture compare channel */
mbed_official	237:f3da66175598	2601	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2602	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
mbed_official	237:f3da66175598	2603
mbed_official	237:f3da66175598	2604	/* Enable the TIM Input Capture DMA request */
mbed_official	237:f3da66175598	2605	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	237:f3da66175598	2606	/* Enable the TIM Input Capture DMA request */
mbed_official	237:f3da66175598	2607	__HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	237:f3da66175598	2608	}
mbed_official	237:f3da66175598	2609	break;
mbed_official	237:f3da66175598	2610
mbed_official	237:f3da66175598	2611	default:
mbed_official	237:f3da66175598	2612	break;
mbed_official	237:f3da66175598	2613	}
mbed_official	237:f3da66175598	2614	/* Return function status */
mbed_official	237:f3da66175598	2615	return HAL_OK;
mbed_official	237:f3da66175598	2616	}
mbed_official	237:f3da66175598	2617
mbed_official	237:f3da66175598	2618	/**
mbed_official	237:f3da66175598	2619	* @brief Stops the TIM Encoder Interface in DMA mode.
mbed_official	237:f3da66175598	2620	* @param htim : TIM Encoder Interface handle
mbed_official	237:f3da66175598	2621	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	2622	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2623	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2624	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2625	* @retval HAL status
mbed_official	237:f3da66175598	2626	*/
mbed_official	237:f3da66175598	2627	HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	2628	{
mbed_official	237:f3da66175598	2629	/* Check the parameters */
mbed_official	237:f3da66175598	2630	assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2631
mbed_official	237:f3da66175598	2632	/* Disable the Input Capture channels 1 and 2
mbed_official	237:f3da66175598	2633	(in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */
mbed_official	237:f3da66175598	2634	if(Channel == TIM_CHANNEL_1)
mbed_official	237:f3da66175598	2635	{
mbed_official	237:f3da66175598	2636	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2637
mbed_official	237:f3da66175598	2638	/* Disable the capture compare DMA Request 1 */
mbed_official	237:f3da66175598	2639	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	237:f3da66175598	2640	}
mbed_official	237:f3da66175598	2641	else if(Channel == TIM_CHANNEL_2)
mbed_official	237:f3da66175598	2642	{
mbed_official	237:f3da66175598	2643	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2644
mbed_official	237:f3da66175598	2645	/* Disable the capture compare DMA Request 2 */
mbed_official	237:f3da66175598	2646	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	237:f3da66175598	2647	}
mbed_official	237:f3da66175598	2648	else
mbed_official	237:f3da66175598	2649	{
mbed_official	237:f3da66175598	2650	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2651	TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
mbed_official	237:f3da66175598	2652
mbed_official	237:f3da66175598	2653	/* Disable the capture compare DMA Request 1 and 2 */
mbed_official	237:f3da66175598	2654	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
mbed_official	237:f3da66175598	2655	__HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
mbed_official	237:f3da66175598	2656	}
mbed_official	237:f3da66175598	2657
mbed_official	237:f3da66175598	2658	/* Disable the Peripheral */
mbed_official	237:f3da66175598	2659	__HAL_TIM_DISABLE(htim);
mbed_official	237:f3da66175598	2660
mbed_official	237:f3da66175598	2661	/* Change the htim state */
mbed_official	237:f3da66175598	2662	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	2663
mbed_official	237:f3da66175598	2664	/* Return function status */
mbed_official	237:f3da66175598	2665	return HAL_OK;
mbed_official	237:f3da66175598	2666	}
mbed_official	237:f3da66175598	2667
mbed_official	237:f3da66175598	2668	/**
mbed_official	237:f3da66175598	2669	* @}
mbed_official	237:f3da66175598	2670	*/
mbed_official	375:3d36234a1087	2671	/** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management
mbed_official	237:f3da66175598	2672	* @brief IRQ handler management
mbed_official	237:f3da66175598	2673	*
mbed_official	237:f3da66175598	2674	@verbatim
mbed_official	237:f3da66175598	2675	==============================================================================
mbed_official	237:f3da66175598	2676	##### IRQ handler management #####
mbed_official	237:f3da66175598	2677	==============================================================================
mbed_official	237:f3da66175598	2678	[..]
mbed_official	237:f3da66175598	2679	This section provides Timer IRQ handler function.
mbed_official	237:f3da66175598	2680
mbed_official	237:f3da66175598	2681	@endverbatim
mbed_official	237:f3da66175598	2682	* @{
mbed_official	237:f3da66175598	2683	*/
mbed_official	237:f3da66175598	2684	/**
mbed_official	237:f3da66175598	2685	* @brief This function handles TIM interrupts requests.
mbed_official	237:f3da66175598	2686	* @param htim: TIM handle
mbed_official	237:f3da66175598	2687	* @retval None
mbed_official	237:f3da66175598	2688	*/
mbed_official	237:f3da66175598	2689	void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	2690	{
mbed_official	237:f3da66175598	2691	/* Capture compare 1 event */
mbed_official	237:f3da66175598	2692	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
mbed_official	237:f3da66175598	2693	{
mbed_official	237:f3da66175598	2694	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC1) !=RESET)
mbed_official	237:f3da66175598	2695	{
mbed_official	237:f3da66175598	2696	{
mbed_official	237:f3da66175598	2697	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
mbed_official	237:f3da66175598	2698	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
mbed_official	237:f3da66175598	2699
mbed_official	237:f3da66175598	2700	/* Input capture event */
mbed_official	237:f3da66175598	2701	if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00)
mbed_official	237:f3da66175598	2702	{
mbed_official	237:f3da66175598	2703	HAL_TIM_IC_CaptureCallback(htim);
mbed_official	237:f3da66175598	2704	}
mbed_official	237:f3da66175598	2705	/* Output compare event */
mbed_official	237:f3da66175598	2706	else
mbed_official	237:f3da66175598	2707	{
mbed_official	237:f3da66175598	2708	HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official	237:f3da66175598	2709	HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official	237:f3da66175598	2710	}
mbed_official	237:f3da66175598	2711	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official	237:f3da66175598	2712	}
mbed_official	237:f3da66175598	2713	}
mbed_official	237:f3da66175598	2714	}
mbed_official	237:f3da66175598	2715	/* Capture compare 2 event */
mbed_official	237:f3da66175598	2716	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
mbed_official	237:f3da66175598	2717	{
mbed_official	237:f3da66175598	2718	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC2) !=RESET)
mbed_official	237:f3da66175598	2719	{
mbed_official	237:f3da66175598	2720	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
mbed_official	237:f3da66175598	2721	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
mbed_official	237:f3da66175598	2722	/* Input capture event */
mbed_official	237:f3da66175598	2723	if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00)
mbed_official	237:f3da66175598	2724	{
mbed_official	237:f3da66175598	2725	HAL_TIM_IC_CaptureCallback(htim);
mbed_official	237:f3da66175598	2726	}
mbed_official	237:f3da66175598	2727	/* Output compare event */
mbed_official	237:f3da66175598	2728	else
mbed_official	237:f3da66175598	2729	{
mbed_official	237:f3da66175598	2730	HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official	237:f3da66175598	2731	HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official	237:f3da66175598	2732	}
mbed_official	237:f3da66175598	2733	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official	237:f3da66175598	2734	}
mbed_official	237:f3da66175598	2735	}
mbed_official	237:f3da66175598	2736	/* Capture compare 3 event */
mbed_official	237:f3da66175598	2737	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
mbed_official	237:f3da66175598	2738	{
mbed_official	237:f3da66175598	2739	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC3) !=RESET)
mbed_official	237:f3da66175598	2740	{
mbed_official	237:f3da66175598	2741	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
mbed_official	237:f3da66175598	2742	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
mbed_official	237:f3da66175598	2743	/* Input capture event */
mbed_official	237:f3da66175598	2744	if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00)
mbed_official	237:f3da66175598	2745	{
mbed_official	237:f3da66175598	2746	HAL_TIM_IC_CaptureCallback(htim);
mbed_official	237:f3da66175598	2747	}
mbed_official	237:f3da66175598	2748	/* Output compare event */
mbed_official	237:f3da66175598	2749	else
mbed_official	237:f3da66175598	2750	{
mbed_official	237:f3da66175598	2751	HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official	237:f3da66175598	2752	HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official	237:f3da66175598	2753	}
mbed_official	237:f3da66175598	2754	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official	237:f3da66175598	2755	}
mbed_official	237:f3da66175598	2756	}
mbed_official	237:f3da66175598	2757	/* Capture compare 4 event */
mbed_official	237:f3da66175598	2758	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
mbed_official	237:f3da66175598	2759	{
mbed_official	237:f3da66175598	2760	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_CC4) !=RESET)
mbed_official	237:f3da66175598	2761	{
mbed_official	237:f3da66175598	2762	__HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
mbed_official	237:f3da66175598	2763	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
mbed_official	237:f3da66175598	2764	/* Input capture event */
mbed_official	237:f3da66175598	2765	if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00)
mbed_official	237:f3da66175598	2766	{
mbed_official	237:f3da66175598	2767	HAL_TIM_IC_CaptureCallback(htim);
mbed_official	237:f3da66175598	2768	}
mbed_official	237:f3da66175598	2769	/* Output compare event */
mbed_official	237:f3da66175598	2770	else
mbed_official	237:f3da66175598	2771	{
mbed_official	237:f3da66175598	2772	HAL_TIM_OC_DelayElapsedCallback(htim);
mbed_official	237:f3da66175598	2773	HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official	237:f3da66175598	2774	}
mbed_official	237:f3da66175598	2775	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official	237:f3da66175598	2776	}
mbed_official	237:f3da66175598	2777	}
mbed_official	237:f3da66175598	2778	/* TIM Update event */
mbed_official	237:f3da66175598	2779	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
mbed_official	237:f3da66175598	2780	{
mbed_official	237:f3da66175598	2781	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_UPDATE) !=RESET)
mbed_official	237:f3da66175598	2782	{
mbed_official	237:f3da66175598	2783	__HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
mbed_official	237:f3da66175598	2784	HAL_TIM_PeriodElapsedCallback(htim);
mbed_official	237:f3da66175598	2785	}
mbed_official	237:f3da66175598	2786	}
mbed_official	237:f3da66175598	2787	/* TIM Break input event */
mbed_official	237:f3da66175598	2788	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET)
mbed_official	237:f3da66175598	2789	{
mbed_official	237:f3da66175598	2790	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_BREAK) !=RESET)
mbed_official	237:f3da66175598	2791	{
mbed_official	237:f3da66175598	2792	__HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK);
mbed_official	237:f3da66175598	2793	HAL_TIMEx_BreakCallback(htim);
mbed_official	237:f3da66175598	2794	}
mbed_official	237:f3da66175598	2795	}
mbed_official	237:f3da66175598	2796	/* TIM Trigger detection event */
mbed_official	237:f3da66175598	2797	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
mbed_official	237:f3da66175598	2798	{
mbed_official	237:f3da66175598	2799	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_TRIGGER) !=RESET)
mbed_official	237:f3da66175598	2800	{
mbed_official	237:f3da66175598	2801	__HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
mbed_official	237:f3da66175598	2802	HAL_TIM_TriggerCallback(htim);
mbed_official	237:f3da66175598	2803	}
mbed_official	237:f3da66175598	2804	}
mbed_official	237:f3da66175598	2805	/* TIM commutation event */
mbed_official	237:f3da66175598	2806	if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET)
mbed_official	237:f3da66175598	2807	{
mbed_official	237:f3da66175598	2808	if(__HAL_TIM_GET_ITSTATUS(htim, TIM_IT_COM) !=RESET)
mbed_official	237:f3da66175598	2809	{
mbed_official	237:f3da66175598	2810	__HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM);
mbed_official	237:f3da66175598	2811	HAL_TIMEx_CommutationCallback(htim);
mbed_official	237:f3da66175598	2812	}
mbed_official	237:f3da66175598	2813	}
mbed_official	237:f3da66175598	2814	}
mbed_official	237:f3da66175598	2815
mbed_official	237:f3da66175598	2816	/**
mbed_official	237:f3da66175598	2817	* @}
mbed_official	237:f3da66175598	2818	*/
mbed_official	237:f3da66175598	2819
mbed_official	375:3d36234a1087	2820	/** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions
mbed_official	237:f3da66175598	2821	* @brief Peripheral Control functions
mbed_official	237:f3da66175598	2822	*
mbed_official	237:f3da66175598	2823	@verbatim
mbed_official	237:f3da66175598	2824	==============================================================================
mbed_official	237:f3da66175598	2825	##### Peripheral Control functions #####
mbed_official	237:f3da66175598	2826	==============================================================================
mbed_official	237:f3da66175598	2827	[..]
mbed_official	237:f3da66175598	2828	This section provides functions allowing to:
mbed_official	237:f3da66175598	2829	(+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode.
mbed_official	237:f3da66175598	2830	(+) Configure External Clock source.
mbed_official	237:f3da66175598	2831	(+) Configure Complementary channels, break features and dead time.
mbed_official	237:f3da66175598	2832	(+) Configure Master and the Slave synchronization.
mbed_official	237:f3da66175598	2833	(+) Configure the DMA Burst Mode.
mbed_official	237:f3da66175598	2834
mbed_official	237:f3da66175598	2835	@endverbatim
mbed_official	237:f3da66175598	2836	* @{
mbed_official	237:f3da66175598	2837	*/
mbed_official	237:f3da66175598	2838
mbed_official	237:f3da66175598	2839	/**
mbed_official	237:f3da66175598	2840	* @brief Initializes the TIM Output Compare Channels according to the specified
mbed_official	237:f3da66175598	2841	* parameters in the TIM_OC_InitTypeDef.
mbed_official	237:f3da66175598	2842	* @param htim: TIM Output Compare handle
mbed_official	237:f3da66175598	2843	* @param sConfig: TIM Output Compare configuration structure
mbed_official	237:f3da66175598	2844	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	2845	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2846	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2847	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2848	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	2849	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	2850	* @retval HAL status
mbed_official	237:f3da66175598	2851	*/
mbed_official	237:f3da66175598	2852	__weak HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel)
mbed_official	237:f3da66175598	2853	{
mbed_official	237:f3da66175598	2854	/* Check the parameters */
mbed_official	237:f3da66175598	2855	assert_param(IS_TIM_CHANNELS(Channel));
mbed_official	237:f3da66175598	2856	assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
mbed_official	237:f3da66175598	2857	assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official	237:f3da66175598	2858	assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
mbed_official	237:f3da66175598	2859	assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
mbed_official	237:f3da66175598	2860	assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
mbed_official	237:f3da66175598	2861
mbed_official	237:f3da66175598	2862	/* Check input state */
mbed_official	237:f3da66175598	2863	__HAL_LOCK(htim);
mbed_official	237:f3da66175598	2864
mbed_official	237:f3da66175598	2865	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	2866
mbed_official	237:f3da66175598	2867	switch (Channel)
mbed_official	237:f3da66175598	2868	{
mbed_official	237:f3da66175598	2869	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	2870	{
mbed_official	237:f3da66175598	2871	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2872	/* Configure the TIM Channel 1 in Output Compare */
mbed_official	237:f3da66175598	2873	TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official	237:f3da66175598	2874	}
mbed_official	237:f3da66175598	2875	break;
mbed_official	237:f3da66175598	2876
mbed_official	237:f3da66175598	2877	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	2878	{
mbed_official	237:f3da66175598	2879	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2880	/* Configure the TIM Channel 2 in Output Compare */
mbed_official	237:f3da66175598	2881	TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official	237:f3da66175598	2882	}
mbed_official	237:f3da66175598	2883	break;
mbed_official	237:f3da66175598	2884
mbed_official	237:f3da66175598	2885	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	2886	{
mbed_official	237:f3da66175598	2887	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2888	/* Configure the TIM Channel 3 in Output Compare */
mbed_official	237:f3da66175598	2889	TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official	237:f3da66175598	2890	}
mbed_official	237:f3da66175598	2891	break;
mbed_official	237:f3da66175598	2892
mbed_official	237:f3da66175598	2893	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	2894	{
mbed_official	237:f3da66175598	2895	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2896	/* Configure the TIM Channel 4 in Output Compare */
mbed_official	237:f3da66175598	2897	TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official	237:f3da66175598	2898	}
mbed_official	237:f3da66175598	2899	break;
mbed_official	237:f3da66175598	2900
mbed_official	237:f3da66175598	2901	default:
mbed_official	237:f3da66175598	2902	break;
mbed_official	237:f3da66175598	2903	}
mbed_official	237:f3da66175598	2904	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	2905
mbed_official	237:f3da66175598	2906	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	2907
mbed_official	237:f3da66175598	2908	return HAL_OK;
mbed_official	237:f3da66175598	2909	}
mbed_official	237:f3da66175598	2910
mbed_official	237:f3da66175598	2911	/**
mbed_official	237:f3da66175598	2912	* @brief Initializes the TIM Input Capture Channels according to the specified
mbed_official	237:f3da66175598	2913	* parameters in the TIM_IC_InitTypeDef.
mbed_official	237:f3da66175598	2914	* @param htim: TIM IC handle
mbed_official	237:f3da66175598	2915	* @param sConfig: TIM Input Capture configuration structure
mbed_official	237:f3da66175598	2916	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	2917	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	2918	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	2919	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	2920	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	2921	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	2922	* @retval HAL status
mbed_official	237:f3da66175598	2923	*/
mbed_official	237:f3da66175598	2924	HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef htim, TIM_IC_InitTypeDef sConfig, uint32_t Channel)
mbed_official	237:f3da66175598	2925	{
mbed_official	237:f3da66175598	2926	/* Check the parameters */
mbed_official	237:f3da66175598	2927	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2928	assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity));
mbed_official	237:f3da66175598	2929	assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection));
mbed_official	237:f3da66175598	2930	assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler));
mbed_official	237:f3da66175598	2931	assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter));
mbed_official	237:f3da66175598	2932
mbed_official	237:f3da66175598	2933	__HAL_LOCK(htim);
mbed_official	237:f3da66175598	2934
mbed_official	237:f3da66175598	2935	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	2936
mbed_official	237:f3da66175598	2937	if (Channel == TIM_CHANNEL_1)
mbed_official	237:f3da66175598	2938	{
mbed_official	237:f3da66175598	2939	/* TI1 Configuration */
mbed_official	237:f3da66175598	2940	TIM_TI1_SetConfig(htim->Instance,
mbed_official	237:f3da66175598	2941	sConfig->ICPolarity,
mbed_official	237:f3da66175598	2942	sConfig->ICSelection,
mbed_official	237:f3da66175598	2943	sConfig->ICFilter);
mbed_official	237:f3da66175598	2944
mbed_official	237:f3da66175598	2945	/* Reset the IC1PSC Bits */
mbed_official	237:f3da66175598	2946	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official	237:f3da66175598	2947
mbed_official	237:f3da66175598	2948	/* Set the IC1PSC value */
mbed_official	237:f3da66175598	2949	htim->Instance->CCMR1 \|= sConfig->ICPrescaler;
mbed_official	237:f3da66175598	2950	}
mbed_official	237:f3da66175598	2951	else if (Channel == TIM_CHANNEL_2)
mbed_official	237:f3da66175598	2952	{
mbed_official	237:f3da66175598	2953	/* TI2 Configuration */
mbed_official	237:f3da66175598	2954	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2955
mbed_official	237:f3da66175598	2956	TIM_TI2_SetConfig(htim->Instance,
mbed_official	237:f3da66175598	2957	sConfig->ICPolarity,
mbed_official	237:f3da66175598	2958	sConfig->ICSelection,
mbed_official	237:f3da66175598	2959	sConfig->ICFilter);
mbed_official	237:f3da66175598	2960
mbed_official	237:f3da66175598	2961	/* Reset the IC2PSC Bits */
mbed_official	237:f3da66175598	2962	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
mbed_official	237:f3da66175598	2963
mbed_official	237:f3da66175598	2964	/* Set the IC2PSC value */
mbed_official	237:f3da66175598	2965	htim->Instance->CCMR1 \|= (sConfig->ICPrescaler << 8);
mbed_official	237:f3da66175598	2966	}
mbed_official	237:f3da66175598	2967	else if (Channel == TIM_CHANNEL_3)
mbed_official	237:f3da66175598	2968	{
mbed_official	237:f3da66175598	2969	/* TI3 Configuration */
mbed_official	237:f3da66175598	2970	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2971
mbed_official	237:f3da66175598	2972	TIM_TI3_SetConfig(htim->Instance,
mbed_official	237:f3da66175598	2973	sConfig->ICPolarity,
mbed_official	237:f3da66175598	2974	sConfig->ICSelection,
mbed_official	237:f3da66175598	2975	sConfig->ICFilter);
mbed_official	237:f3da66175598	2976
mbed_official	237:f3da66175598	2977	/* Reset the IC3PSC Bits */
mbed_official	237:f3da66175598	2978	htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC;
mbed_official	237:f3da66175598	2979
mbed_official	237:f3da66175598	2980	/* Set the IC3PSC value */
mbed_official	237:f3da66175598	2981	htim->Instance->CCMR2 \|= sConfig->ICPrescaler;
mbed_official	237:f3da66175598	2982	}
mbed_official	237:f3da66175598	2983	else
mbed_official	237:f3da66175598	2984	{
mbed_official	237:f3da66175598	2985	/* TI4 Configuration */
mbed_official	237:f3da66175598	2986	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	2987
mbed_official	237:f3da66175598	2988	TIM_TI4_SetConfig(htim->Instance,
mbed_official	237:f3da66175598	2989	sConfig->ICPolarity,
mbed_official	237:f3da66175598	2990	sConfig->ICSelection,
mbed_official	237:f3da66175598	2991	sConfig->ICFilter);
mbed_official	237:f3da66175598	2992
mbed_official	237:f3da66175598	2993	/* Reset the IC4PSC Bits */
mbed_official	237:f3da66175598	2994	htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC;
mbed_official	237:f3da66175598	2995
mbed_official	237:f3da66175598	2996	/* Set the IC4PSC value */
mbed_official	237:f3da66175598	2997	htim->Instance->CCMR2 \|= (sConfig->ICPrescaler << 8);
mbed_official	237:f3da66175598	2998	}
mbed_official	237:f3da66175598	2999
mbed_official	237:f3da66175598	3000	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	3001
mbed_official	237:f3da66175598	3002	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	3003
mbed_official	237:f3da66175598	3004	return HAL_OK;
mbed_official	237:f3da66175598	3005	}
mbed_official	237:f3da66175598	3006
mbed_official	237:f3da66175598	3007	/**
mbed_official	237:f3da66175598	3008	* @brief Initializes the TIM PWM channels according to the specified
mbed_official	237:f3da66175598	3009	* parameters in the TIM_OC_InitTypeDef.
mbed_official	237:f3da66175598	3010	* @param htim: TIM handle
mbed_official	237:f3da66175598	3011	* @param sConfig: TIM PWM configuration structure
mbed_official	237:f3da66175598	3012	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	3013	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3014	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	3015	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	3016	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	3017	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	3018	* @retval HAL status
mbed_official	237:f3da66175598	3019	*/
mbed_official	237:f3da66175598	3020	__weak HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef htim, TIM_OC_InitTypeDef sConfig, uint32_t Channel)
mbed_official	237:f3da66175598	3021	{
mbed_official	237:f3da66175598	3022	__HAL_LOCK(htim);
mbed_official	237:f3da66175598	3023
mbed_official	237:f3da66175598	3024	/* Check the parameters */
mbed_official	237:f3da66175598	3025	assert_param(IS_TIM_CHANNELS(Channel));
mbed_official	237:f3da66175598	3026	assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
mbed_official	237:f3da66175598	3027	assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
mbed_official	237:f3da66175598	3028	assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity));
mbed_official	237:f3da66175598	3029	assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
mbed_official	237:f3da66175598	3030	assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState));
mbed_official	237:f3da66175598	3031	assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState));
mbed_official	237:f3da66175598	3032
mbed_official	237:f3da66175598	3033	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	3034
mbed_official	237:f3da66175598	3035	switch (Channel)
mbed_official	237:f3da66175598	3036	{
mbed_official	237:f3da66175598	3037	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	3038	{
mbed_official	237:f3da66175598	3039	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3040	/* Configure the Channel 1 in PWM mode */
mbed_official	237:f3da66175598	3041	TIM_OC1_SetConfig(htim->Instance, sConfig);
mbed_official	237:f3da66175598	3042
mbed_official	237:f3da66175598	3043	/* Set the Preload enable bit for channel1 */
mbed_official	237:f3da66175598	3044	htim->Instance->CCMR1 \|= TIM_CCMR1_OC1PE;
mbed_official	237:f3da66175598	3045
mbed_official	237:f3da66175598	3046	/* Configure the Output Fast mode */
mbed_official	237:f3da66175598	3047	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
mbed_official	237:f3da66175598	3048	htim->Instance->CCMR1 \|= sConfig->OCFastMode;
mbed_official	237:f3da66175598	3049	}
mbed_official	237:f3da66175598	3050	break;
mbed_official	237:f3da66175598	3051
mbed_official	237:f3da66175598	3052	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	3053	{
mbed_official	237:f3da66175598	3054	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3055	/* Configure the Channel 2 in PWM mode */
mbed_official	237:f3da66175598	3056	TIM_OC2_SetConfig(htim->Instance, sConfig);
mbed_official	237:f3da66175598	3057
mbed_official	237:f3da66175598	3058	/* Set the Preload enable bit for channel2 */
mbed_official	237:f3da66175598	3059	htim->Instance->CCMR1 \|= TIM_CCMR1_OC2PE;
mbed_official	237:f3da66175598	3060
mbed_official	237:f3da66175598	3061	/* Configure the Output Fast mode */
mbed_official	237:f3da66175598	3062	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
mbed_official	237:f3da66175598	3063	htim->Instance->CCMR1 \|= sConfig->OCFastMode << 8;
mbed_official	237:f3da66175598	3064	}
mbed_official	237:f3da66175598	3065	break;
mbed_official	237:f3da66175598	3066
mbed_official	237:f3da66175598	3067	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	3068	{
mbed_official	237:f3da66175598	3069	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3070	/* Configure the Channel 3 in PWM mode */
mbed_official	237:f3da66175598	3071	TIM_OC3_SetConfig(htim->Instance, sConfig);
mbed_official	237:f3da66175598	3072
mbed_official	237:f3da66175598	3073	/* Set the Preload enable bit for channel3 */
mbed_official	237:f3da66175598	3074	htim->Instance->CCMR2 \|= TIM_CCMR2_OC3PE;
mbed_official	237:f3da66175598	3075
mbed_official	237:f3da66175598	3076	/* Configure the Output Fast mode */
mbed_official	237:f3da66175598	3077	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
mbed_official	237:f3da66175598	3078	htim->Instance->CCMR2 \|= sConfig->OCFastMode;
mbed_official	237:f3da66175598	3079	}
mbed_official	237:f3da66175598	3080	break;
mbed_official	237:f3da66175598	3081
mbed_official	237:f3da66175598	3082	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	3083	{
mbed_official	237:f3da66175598	3084	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3085	/* Configure the Channel 4 in PWM mode */
mbed_official	237:f3da66175598	3086	TIM_OC4_SetConfig(htim->Instance, sConfig);
mbed_official	237:f3da66175598	3087
mbed_official	237:f3da66175598	3088	/* Set the Preload enable bit for channel4 */
mbed_official	237:f3da66175598	3089	htim->Instance->CCMR2 \|= TIM_CCMR2_OC4PE;
mbed_official	237:f3da66175598	3090
mbed_official	237:f3da66175598	3091	/* Configure the Output Fast mode */
mbed_official	237:f3da66175598	3092	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
mbed_official	237:f3da66175598	3093	htim->Instance->CCMR2 \|= sConfig->OCFastMode << 8;
mbed_official	237:f3da66175598	3094	}
mbed_official	237:f3da66175598	3095	break;
mbed_official	237:f3da66175598	3096
mbed_official	237:f3da66175598	3097	default:
mbed_official	237:f3da66175598	3098	break;
mbed_official	237:f3da66175598	3099	}
mbed_official	237:f3da66175598	3100
mbed_official	237:f3da66175598	3101	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	3102
mbed_official	237:f3da66175598	3103	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	3104
mbed_official	237:f3da66175598	3105	return HAL_OK;
mbed_official	237:f3da66175598	3106	}
mbed_official	237:f3da66175598	3107
mbed_official	237:f3da66175598	3108	/**
mbed_official	237:f3da66175598	3109	* @brief Initializes the TIM One Pulse Channels according to the specified
mbed_official	237:f3da66175598	3110	* parameters in the TIM_OnePulse_InitTypeDef.
mbed_official	237:f3da66175598	3111	* @param htim: TIM One Pulse handle
mbed_official	237:f3da66175598	3112	* @param sConfig: TIM One Pulse configuration structure
mbed_official	237:f3da66175598	3113	* @param OutputChannel : TIM Channels to be enabled
mbed_official	237:f3da66175598	3114	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3115	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	3116	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	3117	* @param InputChannel : TIM Channels to be enabled
mbed_official	237:f3da66175598	3118	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3119	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	3120	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	3121	* @retval HAL status
mbed_official	237:f3da66175598	3122	*/
mbed_official	237:f3da66175598	3123	HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef htim, TIM_OnePulse_InitTypeDef sConfig, uint32_t OutputChannel, uint32_t InputChannel)
mbed_official	237:f3da66175598	3124	{
mbed_official	237:f3da66175598	3125	TIM_OC_InitTypeDef temp1;
mbed_official	237:f3da66175598	3126
mbed_official	237:f3da66175598	3127	/* Check the parameters */
mbed_official	237:f3da66175598	3128	assert_param(IS_TIM_OPM_CHANNELS(OutputChannel));
mbed_official	237:f3da66175598	3129	assert_param(IS_TIM_OPM_CHANNELS(InputChannel));
mbed_official	237:f3da66175598	3130
mbed_official	237:f3da66175598	3131	if(OutputChannel != InputChannel)
mbed_official	237:f3da66175598	3132	{
mbed_official	237:f3da66175598	3133	__HAL_LOCK(htim);
mbed_official	237:f3da66175598	3134
mbed_official	237:f3da66175598	3135	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	3136
mbed_official	237:f3da66175598	3137	/* Extract the Ouput compare configuration from sConfig structure */
mbed_official	237:f3da66175598	3138	temp1.OCMode = sConfig->OCMode;
mbed_official	237:f3da66175598	3139	temp1.Pulse = sConfig->Pulse;
mbed_official	237:f3da66175598	3140	temp1.OCPolarity = sConfig->OCPolarity;
mbed_official	237:f3da66175598	3141	temp1.OCNPolarity = sConfig->OCNPolarity;
mbed_official	237:f3da66175598	3142	temp1.OCIdleState = sConfig->OCIdleState;
mbed_official	237:f3da66175598	3143	temp1.OCNIdleState = sConfig->OCNIdleState;
mbed_official	237:f3da66175598	3144
mbed_official	237:f3da66175598	3145	switch (OutputChannel)
mbed_official	237:f3da66175598	3146	{
mbed_official	237:f3da66175598	3147	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	3148	{
mbed_official	237:f3da66175598	3149	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3150
mbed_official	237:f3da66175598	3151	TIM_OC1_SetConfig(htim->Instance, &temp1);
mbed_official	237:f3da66175598	3152	}
mbed_official	237:f3da66175598	3153	break;
mbed_official	237:f3da66175598	3154	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	3155	{
mbed_official	237:f3da66175598	3156	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3157
mbed_official	237:f3da66175598	3158	TIM_OC2_SetConfig(htim->Instance, &temp1);
mbed_official	237:f3da66175598	3159	}
mbed_official	237:f3da66175598	3160	break;
mbed_official	237:f3da66175598	3161	default:
mbed_official	237:f3da66175598	3162	break;
mbed_official	237:f3da66175598	3163	}
mbed_official	237:f3da66175598	3164	switch (InputChannel)
mbed_official	237:f3da66175598	3165	{
mbed_official	237:f3da66175598	3166	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	3167	{
mbed_official	237:f3da66175598	3168	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3169
mbed_official	237:f3da66175598	3170	TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity,
mbed_official	237:f3da66175598	3171	sConfig->ICSelection, sConfig->ICFilter);
mbed_official	237:f3da66175598	3172
mbed_official	237:f3da66175598	3173	/* Reset the IC1PSC Bits */
mbed_official	237:f3da66175598	3174	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
mbed_official	237:f3da66175598	3175
mbed_official	237:f3da66175598	3176	/* Select the Trigger source */
mbed_official	237:f3da66175598	3177	htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official	237:f3da66175598	3178	htim->Instance->SMCR \|= TIM_TS_TI1FP1;
mbed_official	237:f3da66175598	3179
mbed_official	237:f3da66175598	3180	/* Select the Slave Mode */
mbed_official	237:f3da66175598	3181	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official	237:f3da66175598	3182	htim->Instance->SMCR \|= TIM_SLAVEMODE_TRIGGER;
mbed_official	237:f3da66175598	3183	}
mbed_official	237:f3da66175598	3184	break;
mbed_official	237:f3da66175598	3185	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	3186	{
mbed_official	237:f3da66175598	3187	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3188
mbed_official	237:f3da66175598	3189	TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity,
mbed_official	237:f3da66175598	3190	sConfig->ICSelection, sConfig->ICFilter);
mbed_official	237:f3da66175598	3191
mbed_official	237:f3da66175598	3192	/* Reset the IC2PSC Bits */
mbed_official	237:f3da66175598	3193	htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC;
mbed_official	237:f3da66175598	3194
mbed_official	237:f3da66175598	3195	/* Select the Trigger source */
mbed_official	237:f3da66175598	3196	htim->Instance->SMCR &= ~TIM_SMCR_TS;
mbed_official	237:f3da66175598	3197	htim->Instance->SMCR \|= TIM_TS_TI2FP2;
mbed_official	237:f3da66175598	3198
mbed_official	237:f3da66175598	3199	/* Select the Slave Mode */
mbed_official	237:f3da66175598	3200	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official	237:f3da66175598	3201	htim->Instance->SMCR \|= TIM_SLAVEMODE_TRIGGER;
mbed_official	237:f3da66175598	3202	}
mbed_official	237:f3da66175598	3203	break;
mbed_official	237:f3da66175598	3204
mbed_official	237:f3da66175598	3205	default:
mbed_official	237:f3da66175598	3206	break;
mbed_official	237:f3da66175598	3207	}
mbed_official	237:f3da66175598	3208
mbed_official	237:f3da66175598	3209	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	3210
mbed_official	237:f3da66175598	3211	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	3212
mbed_official	237:f3da66175598	3213	return HAL_OK;
mbed_official	237:f3da66175598	3214	}
mbed_official	237:f3da66175598	3215	else
mbed_official	237:f3da66175598	3216	{
mbed_official	237:f3da66175598	3217	return HAL_ERROR;
mbed_official	237:f3da66175598	3218	}
mbed_official	237:f3da66175598	3219	}
mbed_official	237:f3da66175598	3220
mbed_official	237:f3da66175598	3221	/**
mbed_official	237:f3da66175598	3222	* @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral
mbed_official	237:f3da66175598	3223	* @param htim: TIM handle
mbed_official	237:f3da66175598	3224	* @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data write
mbed_official	237:f3da66175598	3225	* This parameters can be on of the following values:
mbed_official	237:f3da66175598	3226	* @arg TIM_DMABase_CR1
mbed_official	237:f3da66175598	3227	* @arg TIM_DMABase_CR2
mbed_official	237:f3da66175598	3228	* @arg TIM_DMABase_SMCR
mbed_official	237:f3da66175598	3229	* @arg TIM_DMABase_DIER
mbed_official	237:f3da66175598	3230	* @arg TIM_DMABase_SR
mbed_official	237:f3da66175598	3231	* @arg TIM_DMABase_EGR
mbed_official	237:f3da66175598	3232	* @arg TIM_DMABase_CCMR1
mbed_official	237:f3da66175598	3233	* @arg TIM_DMABase_CCMR2
mbed_official	237:f3da66175598	3234	* @arg TIM_DMABase_CCER
mbed_official	237:f3da66175598	3235	* @arg TIM_DMABase_CNT
mbed_official	237:f3da66175598	3236	* @arg TIM_DMABase_PSC
mbed_official	237:f3da66175598	3237	* @arg TIM_DMABase_ARR
mbed_official	237:f3da66175598	3238	* @arg TIM_DMABase_RCR
mbed_official	237:f3da66175598	3239	* @arg TIM_DMABase_CCR1
mbed_official	237:f3da66175598	3240	* @arg TIM_DMABase_CCR2
mbed_official	237:f3da66175598	3241	* @arg TIM_DMABase_CCR3
mbed_official	237:f3da66175598	3242	* @arg TIM_DMABase_CCR4
mbed_official	237:f3da66175598	3243	* @arg TIM_DMABase_BDTR
mbed_official	237:f3da66175598	3244	* @arg TIM_DMABase_DCR
mbed_official	237:f3da66175598	3245	* @param BurstRequestSrc: TIM DMA Request sources
mbed_official	237:f3da66175598	3246	* This parameters can be on of the following values:
mbed_official	237:f3da66175598	3247	* @arg TIM_DMA_UPDATE: TIM update Interrupt source
mbed_official	237:f3da66175598	3248	* @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official	237:f3da66175598	3249	* @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official	237:f3da66175598	3250	* @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official	237:f3da66175598	3251	* @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official	237:f3da66175598	3252	* @arg TIM_DMA_COM: TIM Commutation DMA source
mbed_official	237:f3da66175598	3253	* @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
mbed_official	237:f3da66175598	3254	* @param BurstBuffer: The Buffer address.
mbed_official	237:f3da66175598	3255	* @param BurstLength: DMA Burst length. This parameter can be one value
mbed_official	237:f3da66175598	3256	* between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official	237:f3da66175598	3257	* @retval HAL status
mbed_official	237:f3da66175598	3258	*/
mbed_official	237:f3da66175598	3259	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
mbed_official	237:f3da66175598	3260	uint32_t* BurstBuffer, uint32_t BurstLength)
mbed_official	237:f3da66175598	3261	{
mbed_official	237:f3da66175598	3262	/* Check the parameters */
mbed_official	237:f3da66175598	3263	assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3264	assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
mbed_official	237:f3da66175598	3265	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official	237:f3da66175598	3266	assert_param(IS_TIM_DMA_LENGTH(BurstLength));
mbed_official	237:f3da66175598	3267
mbed_official	237:f3da66175598	3268	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	237:f3da66175598	3269	{
mbed_official	237:f3da66175598	3270	return HAL_BUSY;
mbed_official	237:f3da66175598	3271	}
mbed_official	237:f3da66175598	3272	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	237:f3da66175598	3273	{
mbed_official	237:f3da66175598	3274	if((BurstBuffer == 0 ) && (BurstLength > 0))
mbed_official	237:f3da66175598	3275	{
mbed_official	237:f3da66175598	3276	return HAL_ERROR;
mbed_official	237:f3da66175598	3277	}
mbed_official	237:f3da66175598	3278	else
mbed_official	237:f3da66175598	3279	{
mbed_official	237:f3da66175598	3280	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	3281	}
mbed_official	237:f3da66175598	3282	}
mbed_official	237:f3da66175598	3283	switch(BurstRequestSrc)
mbed_official	237:f3da66175598	3284	{
mbed_official	237:f3da66175598	3285	case TIM_DMA_UPDATE:
mbed_official	237:f3da66175598	3286	{
mbed_official	237:f3da66175598	3287	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3288	htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official	237:f3da66175598	3289
mbed_official	237:f3da66175598	3290	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3291	htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3292
mbed_official	237:f3da66175598	3293	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3294	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3295	}
mbed_official	237:f3da66175598	3296	break;
mbed_official	237:f3da66175598	3297	case TIM_DMA_CC1:
mbed_official	237:f3da66175598	3298	{
mbed_official	237:f3da66175598	3299	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3300	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	3301
mbed_official	237:f3da66175598	3302	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3303	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3304
mbed_official	237:f3da66175598	3305	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3306	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3307	}
mbed_official	237:f3da66175598	3308	break;
mbed_official	237:f3da66175598	3309	case TIM_DMA_CC2:
mbed_official	237:f3da66175598	3310	{
mbed_official	237:f3da66175598	3311	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3312	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	3313
mbed_official	237:f3da66175598	3314	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3315	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3316
mbed_official	237:f3da66175598	3317	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3318	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3319	}
mbed_official	237:f3da66175598	3320	break;
mbed_official	237:f3da66175598	3321	case TIM_DMA_CC3:
mbed_official	237:f3da66175598	3322	{
mbed_official	237:f3da66175598	3323	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3324	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	3325
mbed_official	237:f3da66175598	3326	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3327	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3328
mbed_official	237:f3da66175598	3329	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3330	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3331	}
mbed_official	237:f3da66175598	3332	break;
mbed_official	237:f3da66175598	3333	case TIM_DMA_CC4:
mbed_official	237:f3da66175598	3334	{
mbed_official	237:f3da66175598	3335	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3336	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMADelayPulseCplt;
mbed_official	237:f3da66175598	3337
mbed_official	237:f3da66175598	3338	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3339	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3340
mbed_official	237:f3da66175598	3341	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3342	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3343	}
mbed_official	237:f3da66175598	3344	break;
mbed_official	237:f3da66175598	3345	case TIM_DMA_COM:
mbed_official	237:f3da66175598	3346	{
mbed_official	237:f3da66175598	3347	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3348	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt;
mbed_official	237:f3da66175598	3349
mbed_official	237:f3da66175598	3350	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3351	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3352
mbed_official	237:f3da66175598	3353	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3354	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3355	}
mbed_official	237:f3da66175598	3356	break;
mbed_official	237:f3da66175598	3357	case TIM_DMA_TRIGGER:
mbed_official	237:f3da66175598	3358	{
mbed_official	237:f3da66175598	3359	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3360	htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
mbed_official	237:f3da66175598	3361
mbed_official	237:f3da66175598	3362	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3363	htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3364
mbed_official	237:f3da66175598	3365	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3366	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3367	}
mbed_official	237:f3da66175598	3368	break;
mbed_official	237:f3da66175598	3369	default:
mbed_official	237:f3da66175598	3370	break;
mbed_official	237:f3da66175598	3371	}
mbed_official	237:f3da66175598	3372	/* configure the DMA Burst Mode */
mbed_official	237:f3da66175598	3373	htim->Instance->DCR = BurstBaseAddress \| BurstLength;
mbed_official	237:f3da66175598	3374
mbed_official	237:f3da66175598	3375	/* Enable the TIM DMA Request */
mbed_official	237:f3da66175598	3376	__HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
mbed_official	237:f3da66175598	3377
mbed_official	237:f3da66175598	3378	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	3379
mbed_official	237:f3da66175598	3380	/* Return function status */
mbed_official	237:f3da66175598	3381	return HAL_OK;
mbed_official	237:f3da66175598	3382	}
mbed_official	237:f3da66175598	3383
mbed_official	237:f3da66175598	3384	/**
mbed_official	237:f3da66175598	3385	* @brief Stops the TIM DMA Burst mode
mbed_official	237:f3da66175598	3386	* @param htim: TIM handle
mbed_official	237:f3da66175598	3387	* @param BurstRequestSrc: TIM DMA Request sources to disable
mbed_official	237:f3da66175598	3388	* @retval HAL status
mbed_official	237:f3da66175598	3389	*/
mbed_official	237:f3da66175598	3390	HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
mbed_official	237:f3da66175598	3391	{
mbed_official	237:f3da66175598	3392	/* Check the parameters */
mbed_official	237:f3da66175598	3393	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official	237:f3da66175598	3394
mbed_official	237:f3da66175598	3395	/* Abort the DMA transfer (at least disable the DMA channel) */
mbed_official	237:f3da66175598	3396	switch(BurstRequestSrc)
mbed_official	237:f3da66175598	3397	{
mbed_official	237:f3da66175598	3398	case TIM_DMA_UPDATE:
mbed_official	237:f3da66175598	3399	{
mbed_official	237:f3da66175598	3400	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]);
mbed_official	237:f3da66175598	3401	}
mbed_official	237:f3da66175598	3402	break;
mbed_official	237:f3da66175598	3403	case TIM_DMA_CC1:
mbed_official	237:f3da66175598	3404	{
mbed_official	237:f3da66175598	3405	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);
mbed_official	237:f3da66175598	3406	}
mbed_official	237:f3da66175598	3407	break;
mbed_official	237:f3da66175598	3408	case TIM_DMA_CC2:
mbed_official	237:f3da66175598	3409	{
mbed_official	237:f3da66175598	3410	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);
mbed_official	237:f3da66175598	3411	}
mbed_official	237:f3da66175598	3412	break;
mbed_official	237:f3da66175598	3413	case TIM_DMA_CC3:
mbed_official	237:f3da66175598	3414	{
mbed_official	237:f3da66175598	3415	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);
mbed_official	237:f3da66175598	3416	}
mbed_official	237:f3da66175598	3417	break;
mbed_official	237:f3da66175598	3418	case TIM_DMA_CC4:
mbed_official	237:f3da66175598	3419	{
mbed_official	237:f3da66175598	3420	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);
mbed_official	237:f3da66175598	3421	}
mbed_official	237:f3da66175598	3422	break;
mbed_official	237:f3da66175598	3423	case TIM_DMA_COM:
mbed_official	237:f3da66175598	3424	{
mbed_official	237:f3da66175598	3425	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]);
mbed_official	237:f3da66175598	3426	}
mbed_official	237:f3da66175598	3427	break;
mbed_official	237:f3da66175598	3428	case TIM_DMA_TRIGGER:
mbed_official	237:f3da66175598	3429	{
mbed_official	237:f3da66175598	3430	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);
mbed_official	237:f3da66175598	3431	}
mbed_official	237:f3da66175598	3432	break;
mbed_official	237:f3da66175598	3433	default:
mbed_official	237:f3da66175598	3434	break;
mbed_official	237:f3da66175598	3435	}
mbed_official	237:f3da66175598	3436
mbed_official	237:f3da66175598	3437	/* Disable the TIM Update DMA request */
mbed_official	237:f3da66175598	3438	__HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
mbed_official	237:f3da66175598	3439
mbed_official	237:f3da66175598	3440	/* Return function status */
mbed_official	237:f3da66175598	3441	return HAL_OK;
mbed_official	237:f3da66175598	3442	}
mbed_official	237:f3da66175598	3443
mbed_official	237:f3da66175598	3444	/**
mbed_official	237:f3da66175598	3445	* @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory
mbed_official	237:f3da66175598	3446	* @param htim: TIM handle
mbed_official	237:f3da66175598	3447	* @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data read
mbed_official	237:f3da66175598	3448	* This parameters can be on of the following values:
mbed_official	237:f3da66175598	3449	* @arg TIM_DMABase_CR1
mbed_official	237:f3da66175598	3450	* @arg TIM_DMABase_CR2
mbed_official	237:f3da66175598	3451	* @arg TIM_DMABase_SMCR
mbed_official	237:f3da66175598	3452	* @arg TIM_DMABase_DIER
mbed_official	237:f3da66175598	3453	* @arg TIM_DMABase_SR
mbed_official	237:f3da66175598	3454	* @arg TIM_DMABase_EGR
mbed_official	237:f3da66175598	3455	* @arg TIM_DMABase_CCMR1
mbed_official	237:f3da66175598	3456	* @arg TIM_DMABase_CCMR2
mbed_official	237:f3da66175598	3457	* @arg TIM_DMABase_CCER
mbed_official	237:f3da66175598	3458	* @arg TIM_DMABase_CNT
mbed_official	237:f3da66175598	3459	* @arg TIM_DMABase_PSC
mbed_official	237:f3da66175598	3460	* @arg TIM_DMABase_ARR
mbed_official	237:f3da66175598	3461	* @arg TIM_DMABase_RCR
mbed_official	237:f3da66175598	3462	* @arg TIM_DMABase_CCR1
mbed_official	237:f3da66175598	3463	* @arg TIM_DMABase_CCR2
mbed_official	237:f3da66175598	3464	* @arg TIM_DMABase_CCR3
mbed_official	237:f3da66175598	3465	* @arg TIM_DMABase_CCR4
mbed_official	237:f3da66175598	3466	* @arg TIM_DMABase_BDTR
mbed_official	237:f3da66175598	3467	* @arg TIM_DMABase_DCR
mbed_official	237:f3da66175598	3468	* @param BurstRequestSrc: TIM DMA Request sources
mbed_official	237:f3da66175598	3469	* This parameters can be on of the following values:
mbed_official	237:f3da66175598	3470	* @arg TIM_DMA_UPDATE: TIM update Interrupt source
mbed_official	237:f3da66175598	3471	* @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official	237:f3da66175598	3472	* @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official	237:f3da66175598	3473	* @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official	237:f3da66175598	3474	* @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official	237:f3da66175598	3475	* @arg TIM_DMA_COM: TIM Commutation DMA source
mbed_official	237:f3da66175598	3476	* @arg TIM_DMA_TRIGGER: TIM Trigger DMA source
mbed_official	237:f3da66175598	3477	* @param BurstBuffer: The Buffer address.
mbed_official	237:f3da66175598	3478	* @param BurstLength: DMA Burst length. This parameter can be one value
mbed_official	237:f3da66175598	3479	* between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official	237:f3da66175598	3480	* @retval HAL status
mbed_official	237:f3da66175598	3481	*/
mbed_official	237:f3da66175598	3482	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc,
mbed_official	237:f3da66175598	3483	uint32_t *BurstBuffer, uint32_t BurstLength)
mbed_official	237:f3da66175598	3484	{
mbed_official	237:f3da66175598	3485	/* Check the parameters */
mbed_official	237:f3da66175598	3486	assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3487	assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
mbed_official	237:f3da66175598	3488	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official	237:f3da66175598	3489	assert_param(IS_TIM_DMA_LENGTH(BurstLength));
mbed_official	237:f3da66175598	3490
mbed_official	237:f3da66175598	3491	if((htim->State == HAL_TIM_STATE_BUSY))
mbed_official	237:f3da66175598	3492	{
mbed_official	237:f3da66175598	3493	return HAL_BUSY;
mbed_official	237:f3da66175598	3494	}
mbed_official	237:f3da66175598	3495	else if((htim->State == HAL_TIM_STATE_READY))
mbed_official	237:f3da66175598	3496	{
mbed_official	237:f3da66175598	3497	if((BurstBuffer == 0 ) && (BurstLength > 0))
mbed_official	237:f3da66175598	3498	{
mbed_official	237:f3da66175598	3499	return HAL_ERROR;
mbed_official	237:f3da66175598	3500	}
mbed_official	237:f3da66175598	3501	else
mbed_official	237:f3da66175598	3502	{
mbed_official	237:f3da66175598	3503	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	3504	}
mbed_official	237:f3da66175598	3505	}
mbed_official	237:f3da66175598	3506	switch(BurstRequestSrc)
mbed_official	237:f3da66175598	3507	{
mbed_official	237:f3da66175598	3508	case TIM_DMA_UPDATE:
mbed_official	237:f3da66175598	3509	{
mbed_official	237:f3da66175598	3510	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3511	htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt;
mbed_official	237:f3da66175598	3512
mbed_official	237:f3da66175598	3513	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3514	htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3515
mbed_official	237:f3da66175598	3516	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3517	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3518	}
mbed_official	237:f3da66175598	3519	break;
mbed_official	237:f3da66175598	3520	case TIM_DMA_CC1:
mbed_official	237:f3da66175598	3521	{
mbed_official	237:f3da66175598	3522	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3523	htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	3524
mbed_official	237:f3da66175598	3525	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3526	htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3527
mbed_official	237:f3da66175598	3528	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3529	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3530	}
mbed_official	237:f3da66175598	3531	break;
mbed_official	237:f3da66175598	3532	case TIM_DMA_CC2:
mbed_official	237:f3da66175598	3533	{
mbed_official	237:f3da66175598	3534	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3535	htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	3536
mbed_official	237:f3da66175598	3537	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3538	htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3539
mbed_official	237:f3da66175598	3540	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3541	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3542	}
mbed_official	237:f3da66175598	3543	break;
mbed_official	237:f3da66175598	3544	case TIM_DMA_CC3:
mbed_official	237:f3da66175598	3545	{
mbed_official	237:f3da66175598	3546	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3547	htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	3548
mbed_official	237:f3da66175598	3549	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3550	htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3551
mbed_official	237:f3da66175598	3552	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3553	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3554	}
mbed_official	237:f3da66175598	3555	break;
mbed_official	237:f3da66175598	3556	case TIM_DMA_CC4:
mbed_official	237:f3da66175598	3557	{
mbed_official	237:f3da66175598	3558	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3559	htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = HAL_TIM_DMACaptureCplt;
mbed_official	237:f3da66175598	3560
mbed_official	237:f3da66175598	3561	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3562	htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3563
mbed_official	237:f3da66175598	3564	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3565	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3566	}
mbed_official	237:f3da66175598	3567	break;
mbed_official	237:f3da66175598	3568	case TIM_DMA_COM:
mbed_official	237:f3da66175598	3569	{
mbed_official	237:f3da66175598	3570	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3571	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = HAL_TIMEx_DMACommutationCplt;
mbed_official	237:f3da66175598	3572
mbed_official	237:f3da66175598	3573	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3574	htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3575
mbed_official	237:f3da66175598	3576	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3577	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3578	}
mbed_official	237:f3da66175598	3579	break;
mbed_official	237:f3da66175598	3580	case TIM_DMA_TRIGGER:
mbed_official	237:f3da66175598	3581	{
mbed_official	237:f3da66175598	3582	/* Set the DMA Period elapsed callback */
mbed_official	237:f3da66175598	3583	htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt;
mbed_official	237:f3da66175598	3584
mbed_official	237:f3da66175598	3585	/* Set the DMA error callback */
mbed_official	237:f3da66175598	3586	htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = HAL_TIM_DMAError ;
mbed_official	237:f3da66175598	3587
mbed_official	237:f3da66175598	3588	/* Enable the DMA channel */
mbed_official	237:f3da66175598	3589	HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1);
mbed_official	237:f3da66175598	3590	}
mbed_official	237:f3da66175598	3591	break;
mbed_official	237:f3da66175598	3592	default:
mbed_official	237:f3da66175598	3593	break;
mbed_official	237:f3da66175598	3594	}
mbed_official	237:f3da66175598	3595
mbed_official	237:f3da66175598	3596	/* configure the DMA Burst Mode */
mbed_official	237:f3da66175598	3597	htim->Instance->DCR = BurstBaseAddress \| BurstLength;
mbed_official	237:f3da66175598	3598
mbed_official	237:f3da66175598	3599	/* Enable the TIM DMA Request */
mbed_official	237:f3da66175598	3600	__HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc);
mbed_official	237:f3da66175598	3601
mbed_official	237:f3da66175598	3602	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	3603
mbed_official	237:f3da66175598	3604	/* Return function status */
mbed_official	237:f3da66175598	3605	return HAL_OK;
mbed_official	237:f3da66175598	3606	}
mbed_official	237:f3da66175598	3607
mbed_official	237:f3da66175598	3608	/**
mbed_official	237:f3da66175598	3609	* @brief Stop the DMA burst reading
mbed_official	237:f3da66175598	3610	* @param htim: TIM handle
mbed_official	237:f3da66175598	3611	* @param BurstRequestSrc: TIM DMA Request sources to disable.
mbed_official	237:f3da66175598	3612	* @retval HAL status
mbed_official	237:f3da66175598	3613	*/
mbed_official	237:f3da66175598	3614	HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc)
mbed_official	237:f3da66175598	3615	{
mbed_official	237:f3da66175598	3616	/* Check the parameters */
mbed_official	237:f3da66175598	3617	assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
mbed_official	237:f3da66175598	3618
mbed_official	237:f3da66175598	3619	/* Abort the DMA transfer (at least disable the DMA channel) */
mbed_official	237:f3da66175598	3620	switch(BurstRequestSrc)
mbed_official	237:f3da66175598	3621	{
mbed_official	237:f3da66175598	3622	case TIM_DMA_UPDATE:
mbed_official	237:f3da66175598	3623	{
mbed_official	237:f3da66175598	3624	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]);
mbed_official	237:f3da66175598	3625	}
mbed_official	237:f3da66175598	3626	break;
mbed_official	237:f3da66175598	3627	case TIM_DMA_CC1:
mbed_official	237:f3da66175598	3628	{
mbed_official	237:f3da66175598	3629	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]);
mbed_official	237:f3da66175598	3630	}
mbed_official	237:f3da66175598	3631	break;
mbed_official	237:f3da66175598	3632	case TIM_DMA_CC2:
mbed_official	237:f3da66175598	3633	{
mbed_official	237:f3da66175598	3634	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]);
mbed_official	237:f3da66175598	3635	}
mbed_official	237:f3da66175598	3636	break;
mbed_official	237:f3da66175598	3637	case TIM_DMA_CC3:
mbed_official	237:f3da66175598	3638	{
mbed_official	237:f3da66175598	3639	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]);
mbed_official	237:f3da66175598	3640	}
mbed_official	237:f3da66175598	3641	break;
mbed_official	237:f3da66175598	3642	case TIM_DMA_CC4:
mbed_official	237:f3da66175598	3643	{
mbed_official	237:f3da66175598	3644	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]);
mbed_official	237:f3da66175598	3645	}
mbed_official	237:f3da66175598	3646	break;
mbed_official	237:f3da66175598	3647	case TIM_DMA_COM:
mbed_official	237:f3da66175598	3648	{
mbed_official	237:f3da66175598	3649	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]);
mbed_official	237:f3da66175598	3650	}
mbed_official	237:f3da66175598	3651	break;
mbed_official	237:f3da66175598	3652	case TIM_DMA_TRIGGER:
mbed_official	237:f3da66175598	3653	{
mbed_official	237:f3da66175598	3654	HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]);
mbed_official	237:f3da66175598	3655	}
mbed_official	237:f3da66175598	3656	break;
mbed_official	237:f3da66175598	3657	default:
mbed_official	237:f3da66175598	3658	break;
mbed_official	237:f3da66175598	3659	}
mbed_official	237:f3da66175598	3660
mbed_official	237:f3da66175598	3661	/* Disable the TIM Update DMA request */
mbed_official	237:f3da66175598	3662	__HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
mbed_official	237:f3da66175598	3663
mbed_official	237:f3da66175598	3664	/* Return function status */
mbed_official	237:f3da66175598	3665	return HAL_OK;
mbed_official	237:f3da66175598	3666	}
mbed_official	237:f3da66175598	3667
mbed_official	237:f3da66175598	3668	/**
mbed_official	237:f3da66175598	3669	* @brief Generate a software event
mbed_official	237:f3da66175598	3670	* @param htim: TIM handle
mbed_official	237:f3da66175598	3671	* @param EventSource: specifies the event source.
mbed_official	237:f3da66175598	3672	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3673	* @arg TIM_EventSource_Update: Timer update Event source
mbed_official	237:f3da66175598	3674	* @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source
mbed_official	237:f3da66175598	3675	* @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source
mbed_official	237:f3da66175598	3676	* @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source
mbed_official	237:f3da66175598	3677	* @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source
mbed_official	237:f3da66175598	3678	* @arg TIM_EventSource_COM: Timer COM event source
mbed_official	237:f3da66175598	3679	* @arg TIM_EventSource_Trigger: Timer Trigger Event source
mbed_official	237:f3da66175598	3680	* @arg TIM_EventSource_Break: Timer Break event source
mbed_official	237:f3da66175598	3681	* @arg TIM_EventSource_Break2: Timer Break2 event source
mbed_official	237:f3da66175598	3682	* @retval None
mbed_official	237:f3da66175598	3683	* @note TIM_EventSource_Break2 isn't relevant for STM32F37xx and STM32F38xx
mbed_official	237:f3da66175598	3684	* devices
mbed_official	237:f3da66175598	3685	*/
mbed_official	237:f3da66175598	3686
mbed_official	237:f3da66175598	3687	HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource)
mbed_official	237:f3da66175598	3688	{
mbed_official	237:f3da66175598	3689	/* Check the parameters */
mbed_official	237:f3da66175598	3690	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3691	assert_param(IS_TIM_EVENT_SOURCE(EventSource));
mbed_official	237:f3da66175598	3692
mbed_official	237:f3da66175598	3693	/* Process Locked */
mbed_official	237:f3da66175598	3694	__HAL_LOCK(htim);
mbed_official	237:f3da66175598	3695
mbed_official	237:f3da66175598	3696	/* Change the TIM state */
mbed_official	237:f3da66175598	3697	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	3698
mbed_official	237:f3da66175598	3699	/* Set the event sources */
mbed_official	237:f3da66175598	3700	htim->Instance->EGR = EventSource;
mbed_official	237:f3da66175598	3701
mbed_official	237:f3da66175598	3702	/* Change the TIM state */
mbed_official	237:f3da66175598	3703	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	3704
mbed_official	237:f3da66175598	3705	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	3706
mbed_official	237:f3da66175598	3707	/* Return function status */
mbed_official	237:f3da66175598	3708	return HAL_OK;
mbed_official	237:f3da66175598	3709	}
mbed_official	237:f3da66175598	3710
mbed_official	237:f3da66175598	3711	/**
mbed_official	237:f3da66175598	3712	* @brief Configures the OCRef clear feature
mbed_official	237:f3da66175598	3713	* @param htim: TIM handle
mbed_official	237:f3da66175598	3714	* @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that
mbed_official	237:f3da66175598	3715	* contains the OCREF clear feature and parameters for the TIM peripheral.
mbed_official	237:f3da66175598	3716	* @param Channel: specifies the TIM Channel
mbed_official	237:f3da66175598	3717	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3718	* @arg TIM_Channel_1: TIM Channel 1
mbed_official	237:f3da66175598	3719	* @arg TIM_Channel_2: TIM Channel 2
mbed_official	237:f3da66175598	3720	* @arg TIM_Channel_3: TIM Channel 3
mbed_official	237:f3da66175598	3721	* @arg TIM_Channel_4: TIM Channel 4
mbed_official	237:f3da66175598	3722	* @retval HAL status
mbed_official	237:f3da66175598	3723	*/
mbed_official	237:f3da66175598	3724	__weak HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef htim, TIM_ClearInputConfigTypeDef sClearInputConfig, uint32_t Channel)
mbed_official	237:f3da66175598	3725	{
mbed_official	237:f3da66175598	3726	/* Check the parameters */
mbed_official	237:f3da66175598	3727	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3728	assert_param(IS_TIM_CHANNELS(Channel));
mbed_official	237:f3da66175598	3729	assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource));
mbed_official	237:f3da66175598	3730
mbed_official	237:f3da66175598	3731	/* Process Locked */
mbed_official	237:f3da66175598	3732	__HAL_LOCK(htim);
mbed_official	237:f3da66175598	3733
mbed_official	237:f3da66175598	3734	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	3735
mbed_official	237:f3da66175598	3736	if(sClearInputConfig->ClearInputSource == TIM_CLEARINPUTSOURCE_ETR)
mbed_official	237:f3da66175598	3737	{
mbed_official	237:f3da66175598	3738	/* Check the parameters */
mbed_official	237:f3da66175598	3739	assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity));
mbed_official	237:f3da66175598	3740	assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler));
mbed_official	237:f3da66175598	3741	assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter));
mbed_official	237:f3da66175598	3742
mbed_official	237:f3da66175598	3743	TIM_ETR_SetConfig(htim->Instance,
mbed_official	237:f3da66175598	3744	sClearInputConfig->ClearInputPrescaler,
mbed_official	237:f3da66175598	3745	sClearInputConfig->ClearInputPolarity,
mbed_official	237:f3da66175598	3746	sClearInputConfig->ClearInputFilter);
mbed_official	237:f3da66175598	3747	}
mbed_official	237:f3da66175598	3748
mbed_official	237:f3da66175598	3749	switch (Channel)
mbed_official	237:f3da66175598	3750	{
mbed_official	237:f3da66175598	3751	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	3752	{
mbed_official	237:f3da66175598	3753	if(sClearInputConfig->ClearInputState != RESET)
mbed_official	237:f3da66175598	3754	{
mbed_official	237:f3da66175598	3755	/* Enable the Ocref clear feature for Channel 1 */
mbed_official	237:f3da66175598	3756	htim->Instance->CCMR1 \|= TIM_CCMR1_OC1CE;
mbed_official	237:f3da66175598	3757	}
mbed_official	237:f3da66175598	3758	else
mbed_official	237:f3da66175598	3759	{
mbed_official	237:f3da66175598	3760	/* Disable the Ocref clear feature for Channel 1 */
mbed_official	237:f3da66175598	3761	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE;
mbed_official	237:f3da66175598	3762	}
mbed_official	237:f3da66175598	3763	}
mbed_official	237:f3da66175598	3764	break;
mbed_official	237:f3da66175598	3765	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	3766	{
mbed_official	237:f3da66175598	3767	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3768	if(sClearInputConfig->ClearInputState != RESET)
mbed_official	237:f3da66175598	3769	{
mbed_official	237:f3da66175598	3770	/* Enable the Ocref clear feature for Channel 2 */
mbed_official	237:f3da66175598	3771	htim->Instance->CCMR1 \|= TIM_CCMR1_OC2CE;
mbed_official	237:f3da66175598	3772	}
mbed_official	237:f3da66175598	3773	else
mbed_official	237:f3da66175598	3774	{
mbed_official	237:f3da66175598	3775	/* Disable the Ocref clear feature for Channel 2 */
mbed_official	237:f3da66175598	3776	htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE;
mbed_official	237:f3da66175598	3777	}
mbed_official	237:f3da66175598	3778	}
mbed_official	237:f3da66175598	3779	break;
mbed_official	237:f3da66175598	3780	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	3781	{
mbed_official	237:f3da66175598	3782	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3783	if(sClearInputConfig->ClearInputState != RESET)
mbed_official	237:f3da66175598	3784	{
mbed_official	237:f3da66175598	3785	/* Enable the Ocref clear feature for Channel 3 */
mbed_official	237:f3da66175598	3786	htim->Instance->CCMR2 \|= TIM_CCMR2_OC3CE;
mbed_official	237:f3da66175598	3787	}
mbed_official	237:f3da66175598	3788	else
mbed_official	237:f3da66175598	3789	{
mbed_official	237:f3da66175598	3790	/* Disable the Ocref clear feature for Channel 3 */
mbed_official	237:f3da66175598	3791	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE;
mbed_official	237:f3da66175598	3792	}
mbed_official	237:f3da66175598	3793	}
mbed_official	237:f3da66175598	3794	break;
mbed_official	237:f3da66175598	3795	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	3796	{
mbed_official	237:f3da66175598	3797	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3798	if(sClearInputConfig->ClearInputState != RESET)
mbed_official	237:f3da66175598	3799	{
mbed_official	237:f3da66175598	3800	/* Enable the Ocref clear feature for Channel 4 */
mbed_official	237:f3da66175598	3801	htim->Instance->CCMR2 \|= TIM_CCMR2_OC4CE;
mbed_official	237:f3da66175598	3802	}
mbed_official	237:f3da66175598	3803	else
mbed_official	237:f3da66175598	3804	{
mbed_official	237:f3da66175598	3805	/* Disable the Ocref clear feature for Channel 4 */
mbed_official	237:f3da66175598	3806	htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE;
mbed_official	237:f3da66175598	3807	}
mbed_official	237:f3da66175598	3808	}
mbed_official	237:f3da66175598	3809	break;
mbed_official	237:f3da66175598	3810	default:
mbed_official	237:f3da66175598	3811	break;
mbed_official	237:f3da66175598	3812	}
mbed_official	237:f3da66175598	3813
mbed_official	237:f3da66175598	3814	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	3815
mbed_official	237:f3da66175598	3816	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	3817
mbed_official	237:f3da66175598	3818	return HAL_OK;
mbed_official	237:f3da66175598	3819	}
mbed_official	237:f3da66175598	3820
mbed_official	237:f3da66175598	3821	/**
mbed_official	237:f3da66175598	3822	* @brief Configures the clock source to be used
mbed_official	237:f3da66175598	3823	* @param htim: TIM handle
mbed_official	237:f3da66175598	3824	* @param sClockSourceConfig: pointer to a TIM_ClockConfigTypeDef structure that
mbed_official	237:f3da66175598	3825	* contains the clock source information for the TIM peripheral.
mbed_official	237:f3da66175598	3826	* @retval HAL status
mbed_official	237:f3da66175598	3827	*/
mbed_official	237:f3da66175598	3828	HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef htim, TIM_ClockConfigTypeDef sClockSourceConfig)
mbed_official	237:f3da66175598	3829	{
mbed_official	237:f3da66175598	3830	uint32_t tmpsmcr = 0;
mbed_official	237:f3da66175598	3831
mbed_official	237:f3da66175598	3832	/* Process Locked */
mbed_official	237:f3da66175598	3833	__HAL_LOCK(htim);
mbed_official	237:f3da66175598	3834
mbed_official	237:f3da66175598	3835	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	3836
mbed_official	237:f3da66175598	3837	/* Check the parameters */
mbed_official	237:f3da66175598	3838	assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
mbed_official	237:f3da66175598	3839	assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
mbed_official	237:f3da66175598	3840	assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
mbed_official	237:f3da66175598	3841	assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
mbed_official	237:f3da66175598	3842
mbed_official	237:f3da66175598	3843	/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
mbed_official	237:f3da66175598	3844	tmpsmcr = htim->Instance->SMCR;
mbed_official	237:f3da66175598	3845	tmpsmcr &= ~(TIM_SMCR_SMS \| TIM_SMCR_TS);
mbed_official	237:f3da66175598	3846	tmpsmcr &= ~(TIM_SMCR_ETF \| TIM_SMCR_ETPS \| TIM_SMCR_ECE \| TIM_SMCR_ETP);
mbed_official	237:f3da66175598	3847	htim->Instance->SMCR = tmpsmcr;
mbed_official	237:f3da66175598	3848
mbed_official	237:f3da66175598	3849	switch (sClockSourceConfig->ClockSource)
mbed_official	237:f3da66175598	3850	{
mbed_official	237:f3da66175598	3851	case TIM_CLOCKSOURCE_INTERNAL:
mbed_official	237:f3da66175598	3852	{
mbed_official	237:f3da66175598	3853	assert_param(IS_TIM_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3854	/* Disable slave mode to clock the prescaler directly with the internal clock */
mbed_official	237:f3da66175598	3855	htim->Instance->SMCR &= ~TIM_SMCR_SMS;
mbed_official	237:f3da66175598	3856	}
mbed_official	237:f3da66175598	3857	break;
mbed_official	237:f3da66175598	3858
mbed_official	237:f3da66175598	3859	case TIM_CLOCKSOURCE_ETRMODE1:
mbed_official	237:f3da66175598	3860	{
mbed_official	237:f3da66175598	3861	/* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/
mbed_official	237:f3da66175598	3862	assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3863
mbed_official	237:f3da66175598	3864	/* Configure the ETR Clock source */
mbed_official	237:f3da66175598	3865	TIM_ETR_SetConfig(htim->Instance,
mbed_official	237:f3da66175598	3866	sClockSourceConfig->ClockPrescaler,
mbed_official	237:f3da66175598	3867	sClockSourceConfig->ClockPolarity,
mbed_official	237:f3da66175598	3868	sClockSourceConfig->ClockFilter);
mbed_official	237:f3da66175598	3869	/* Get the TIMx SMCR register value */
mbed_official	237:f3da66175598	3870	tmpsmcr = htim->Instance->SMCR;
mbed_official	237:f3da66175598	3871	/* Reset the SMS and TS Bits */
mbed_official	237:f3da66175598	3872	tmpsmcr &= ~(TIM_SMCR_SMS \| TIM_SMCR_TS);
mbed_official	237:f3da66175598	3873	/* Select the External clock mode1 and the ETRF trigger */
mbed_official	237:f3da66175598	3874	tmpsmcr \|= (TIM_SLAVEMODE_EXTERNAL1 \| TIM_CLOCKSOURCE_ETRMODE1);
mbed_official	237:f3da66175598	3875	/* Write to TIMx SMCR */
mbed_official	237:f3da66175598	3876	htim->Instance->SMCR = tmpsmcr;
mbed_official	237:f3da66175598	3877	}
mbed_official	237:f3da66175598	3878	break;
mbed_official	237:f3da66175598	3879
mbed_official	237:f3da66175598	3880	case TIM_CLOCKSOURCE_ETRMODE2:
mbed_official	237:f3da66175598	3881	{
mbed_official	237:f3da66175598	3882	/* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/
mbed_official	237:f3da66175598	3883	assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3884
mbed_official	237:f3da66175598	3885	/* Configure the ETR Clock source */
mbed_official	237:f3da66175598	3886	TIM_ETR_SetConfig(htim->Instance,
mbed_official	237:f3da66175598	3887	sClockSourceConfig->ClockPrescaler,
mbed_official	237:f3da66175598	3888	sClockSourceConfig->ClockPolarity,
mbed_official	237:f3da66175598	3889	sClockSourceConfig->ClockFilter);
mbed_official	237:f3da66175598	3890	/* Enable the External clock mode2 */
mbed_official	237:f3da66175598	3891	htim->Instance->SMCR \|= TIM_SMCR_ECE;
mbed_official	237:f3da66175598	3892	}
mbed_official	237:f3da66175598	3893	break;
mbed_official	237:f3da66175598	3894
mbed_official	237:f3da66175598	3895	case TIM_CLOCKSOURCE_TI1:
mbed_official	237:f3da66175598	3896	{
mbed_official	237:f3da66175598	3897	/* Check whether or not the timer instance supports external clock mode 1 */
mbed_official	237:f3da66175598	3898	assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3899
mbed_official	237:f3da66175598	3900	TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official	237:f3da66175598	3901	sClockSourceConfig->ClockPolarity,
mbed_official	237:f3da66175598	3902	sClockSourceConfig->ClockFilter);
mbed_official	237:f3da66175598	3903	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
mbed_official	237:f3da66175598	3904	}
mbed_official	237:f3da66175598	3905	break;
mbed_official	237:f3da66175598	3906	case TIM_CLOCKSOURCE_TI2:
mbed_official	237:f3da66175598	3907	{
mbed_official	237:f3da66175598	3908	/* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/
mbed_official	237:f3da66175598	3909	assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3910
mbed_official	237:f3da66175598	3911	TIM_TI2_ConfigInputStage(htim->Instance,
mbed_official	237:f3da66175598	3912	sClockSourceConfig->ClockPolarity,
mbed_official	237:f3da66175598	3913	sClockSourceConfig->ClockFilter);
mbed_official	237:f3da66175598	3914	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
mbed_official	237:f3da66175598	3915	}
mbed_official	237:f3da66175598	3916	break;
mbed_official	237:f3da66175598	3917	case TIM_CLOCKSOURCE_TI1ED:
mbed_official	237:f3da66175598	3918	{
mbed_official	237:f3da66175598	3919	/* Check whether or not the timer instance supports external clock mode 1 */
mbed_official	237:f3da66175598	3920	assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3921
mbed_official	237:f3da66175598	3922	TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official	237:f3da66175598	3923	sClockSourceConfig->ClockPolarity,
mbed_official	237:f3da66175598	3924	sClockSourceConfig->ClockFilter);
mbed_official	237:f3da66175598	3925	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
mbed_official	237:f3da66175598	3926	}
mbed_official	237:f3da66175598	3927	break;
mbed_official	237:f3da66175598	3928	case TIM_CLOCKSOURCE_ITR0:
mbed_official	237:f3da66175598	3929	{
mbed_official	237:f3da66175598	3930	/* Check whether or not the timer instance supports external clock mode 1 */
mbed_official	237:f3da66175598	3931	assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3932
mbed_official	237:f3da66175598	3933	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0);
mbed_official	237:f3da66175598	3934	}
mbed_official	237:f3da66175598	3935	break;
mbed_official	237:f3da66175598	3936	case TIM_CLOCKSOURCE_ITR1:
mbed_official	237:f3da66175598	3937	{
mbed_official	237:f3da66175598	3938	/* Check whether or not the timer instance supports external clock mode 1 */
mbed_official	237:f3da66175598	3939	assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3940
mbed_official	237:f3da66175598	3941	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1);
mbed_official	237:f3da66175598	3942	}
mbed_official	237:f3da66175598	3943	break;
mbed_official	237:f3da66175598	3944	case TIM_CLOCKSOURCE_ITR2:
mbed_official	237:f3da66175598	3945	{
mbed_official	237:f3da66175598	3946	/* Check whether or not the timer instance supports external clock mode 1 */
mbed_official	237:f3da66175598	3947	assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3948
mbed_official	237:f3da66175598	3949	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2);
mbed_official	237:f3da66175598	3950	}
mbed_official	237:f3da66175598	3951	break;
mbed_official	237:f3da66175598	3952	case TIM_CLOCKSOURCE_ITR3:
mbed_official	237:f3da66175598	3953	{
mbed_official	237:f3da66175598	3954	/* Check whether or not the timer instance supports external clock mode 1 */
mbed_official	237:f3da66175598	3955	assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3956
mbed_official	237:f3da66175598	3957	TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3);
mbed_official	237:f3da66175598	3958	}
mbed_official	237:f3da66175598	3959	break;
mbed_official	237:f3da66175598	3960
mbed_official	237:f3da66175598	3961	default:
mbed_official	237:f3da66175598	3962	break;
mbed_official	237:f3da66175598	3963	}
mbed_official	237:f3da66175598	3964	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	3965
mbed_official	237:f3da66175598	3966	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	3967
mbed_official	237:f3da66175598	3968	return HAL_OK;
mbed_official	237:f3da66175598	3969	}
mbed_official	237:f3da66175598	3970
mbed_official	237:f3da66175598	3971	/**
mbed_official	237:f3da66175598	3972	* @brief Selects the signal connected to the TI1 input: direct from CH1_input
mbed_official	237:f3da66175598	3973	* or a XOR combination between CH1_input, CH2_input & CH3_input
mbed_official	237:f3da66175598	3974	* @param htim: TIM handle.
mbed_official	237:f3da66175598	3975	* @param TI1_Selection: Indicate whether or not channel 1 is connected to the
mbed_official	237:f3da66175598	3976	* output of a XOR gate.
mbed_official	237:f3da66175598	3977	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	3978	* @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input
mbed_official	237:f3da66175598	3979	* @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3
mbed_official	237:f3da66175598	3980	* pins are connected to the TI1 input (XOR combination)
mbed_official	237:f3da66175598	3981	* @retval HAL status
mbed_official	237:f3da66175598	3982	*/
mbed_official	237:f3da66175598	3983	HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection)
mbed_official	237:f3da66175598	3984	{
mbed_official	237:f3da66175598	3985	uint32_t tmpcr2 = 0;
mbed_official	237:f3da66175598	3986
mbed_official	237:f3da66175598	3987	/* Check the parameters */
mbed_official	237:f3da66175598	3988	assert_param(IS_TIM_XOR_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	3989	assert_param(IS_TIM_TI1SELECTION(TI1_Selection));
mbed_official	237:f3da66175598	3990
mbed_official	237:f3da66175598	3991	/* Get the TIMx CR2 register value */
mbed_official	237:f3da66175598	3992	tmpcr2 = htim->Instance->CR2;
mbed_official	237:f3da66175598	3993
mbed_official	237:f3da66175598	3994	/* Reset the TI1 selection */
mbed_official	237:f3da66175598	3995	tmpcr2 &= ~TIM_CR2_TI1S;
mbed_official	237:f3da66175598	3996
mbed_official	237:f3da66175598	3997	/* Set the the TI1 selection */
mbed_official	237:f3da66175598	3998	tmpcr2 \|= TI1_Selection;
mbed_official	237:f3da66175598	3999
mbed_official	237:f3da66175598	4000	/* Write to TIMxCR2 */
mbed_official	237:f3da66175598	4001	htim->Instance->CR2 = tmpcr2;
mbed_official	237:f3da66175598	4002
mbed_official	237:f3da66175598	4003	return HAL_OK;
mbed_official	237:f3da66175598	4004	}
mbed_official	237:f3da66175598	4005
mbed_official	237:f3da66175598	4006	/**
mbed_official	237:f3da66175598	4007	* @brief Configures the TIM in Slave mode
mbed_official	237:f3da66175598	4008	* @param htim: TIM handle.
mbed_official	237:f3da66175598	4009	* @param sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that
mbed_official	237:f3da66175598	4010	* contains the selected trigger (internal trigger input, filtered
mbed_official	237:f3da66175598	4011	* timer input or external trigger input) and the ) and the Slave
mbed_official	237:f3da66175598	4012	* mode (Disable, Reset, Gated, Trigger, External clock mode 1).
mbed_official	237:f3da66175598	4013	* @retval HAL status
mbed_official	237:f3da66175598	4014	*/
mbed_official	237:f3da66175598	4015	HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef htim, TIM_SlaveConfigTypeDef sSlaveConfig)
mbed_official	237:f3da66175598	4016	{
mbed_official	237:f3da66175598	4017	uint32_t tmpsmcr = 0;
mbed_official	237:f3da66175598	4018	uint32_t tmpccmr1 = 0;
mbed_official	237:f3da66175598	4019	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	4020
mbed_official	237:f3da66175598	4021	/* Check the parameters */
mbed_official	237:f3da66175598	4022	assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4023	assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode));
mbed_official	237:f3da66175598	4024	assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger));
mbed_official	237:f3da66175598	4025
mbed_official	237:f3da66175598	4026	__HAL_LOCK(htim);
mbed_official	237:f3da66175598	4027
mbed_official	237:f3da66175598	4028	htim->State = HAL_TIM_STATE_BUSY;
mbed_official	237:f3da66175598	4029
mbed_official	237:f3da66175598	4030	/* Get the TIMx SMCR register value */
mbed_official	237:f3da66175598	4031	tmpsmcr = htim->Instance->SMCR;
mbed_official	237:f3da66175598	4032
mbed_official	237:f3da66175598	4033	/* Reset the Trigger Selection Bits */
mbed_official	237:f3da66175598	4034	tmpsmcr &= ~TIM_SMCR_TS;
mbed_official	237:f3da66175598	4035	/* Set the Input Trigger source */
mbed_official	237:f3da66175598	4036	tmpsmcr \|= sSlaveConfig->InputTrigger;
mbed_official	237:f3da66175598	4037
mbed_official	237:f3da66175598	4038	/* Reset the slave mode Bits */
mbed_official	237:f3da66175598	4039	tmpsmcr &= ~TIM_SMCR_SMS;
mbed_official	237:f3da66175598	4040	/* Set the slave mode */
mbed_official	237:f3da66175598	4041	tmpsmcr \|= sSlaveConfig->SlaveMode;
mbed_official	237:f3da66175598	4042
mbed_official	237:f3da66175598	4043	/* Write to TIMx SMCR */
mbed_official	237:f3da66175598	4044	htim->Instance->SMCR = tmpsmcr;
mbed_official	237:f3da66175598	4045
mbed_official	237:f3da66175598	4046	/* Configure the trigger prescaler, filter, and polarity */
mbed_official	237:f3da66175598	4047	switch (sSlaveConfig->InputTrigger)
mbed_official	237:f3da66175598	4048	{
mbed_official	237:f3da66175598	4049	case TIM_TS_ETRF:
mbed_official	237:f3da66175598	4050	{
mbed_official	237:f3da66175598	4051	/* Check the parameters */
mbed_official	237:f3da66175598	4052	assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4053	assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler));
mbed_official	237:f3da66175598	4054	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official	237:f3da66175598	4055	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official	237:f3da66175598	4056	/* Configure the ETR Trigger source */
mbed_official	237:f3da66175598	4057	TIM_ETR_SetConfig(htim->Instance,
mbed_official	237:f3da66175598	4058	sSlaveConfig->TriggerPrescaler,
mbed_official	237:f3da66175598	4059	sSlaveConfig->TriggerPolarity,
mbed_official	237:f3da66175598	4060	sSlaveConfig->TriggerFilter);
mbed_official	237:f3da66175598	4061	}
mbed_official	237:f3da66175598	4062	break;
mbed_official	237:f3da66175598	4063
mbed_official	237:f3da66175598	4064	case TIM_TS_TI1F_ED:
mbed_official	237:f3da66175598	4065	{
mbed_official	237:f3da66175598	4066	/* Check the parameters */
mbed_official	237:f3da66175598	4067	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4068	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official	237:f3da66175598	4069	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official	237:f3da66175598	4070
mbed_official	237:f3da66175598	4071	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	237:f3da66175598	4072	tmpccer = htim->Instance->CCER;
mbed_official	237:f3da66175598	4073	htim->Instance->CCER &= ~TIM_CCER_CC1E;
mbed_official	237:f3da66175598	4074	tmpccmr1 = htim->Instance->CCMR1;
mbed_official	237:f3da66175598	4075
mbed_official	237:f3da66175598	4076	/* Set the filter */
mbed_official	237:f3da66175598	4077	tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official	237:f3da66175598	4078	tmpccmr1 \|= ((sSlaveConfig->TriggerFilter) << 4);
mbed_official	237:f3da66175598	4079
mbed_official	237:f3da66175598	4080	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	237:f3da66175598	4081	htim->Instance->CCMR1 = tmpccmr1;
mbed_official	237:f3da66175598	4082	htim->Instance->CCER = tmpccer;
mbed_official	237:f3da66175598	4083
mbed_official	237:f3da66175598	4084	}
mbed_official	237:f3da66175598	4085	break;
mbed_official	237:f3da66175598	4086
mbed_official	237:f3da66175598	4087	case TIM_TS_TI1FP1:
mbed_official	237:f3da66175598	4088	{
mbed_official	237:f3da66175598	4089	/* Check the parameters */
mbed_official	237:f3da66175598	4090	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4091	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official	237:f3da66175598	4092	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official	237:f3da66175598	4093
mbed_official	237:f3da66175598	4094	/* Configure TI1 Filter and Polarity */
mbed_official	237:f3da66175598	4095	TIM_TI1_ConfigInputStage(htim->Instance,
mbed_official	237:f3da66175598	4096	sSlaveConfig->TriggerPolarity,
mbed_official	237:f3da66175598	4097	sSlaveConfig->TriggerFilter);
mbed_official	237:f3da66175598	4098	}
mbed_official	237:f3da66175598	4099	break;
mbed_official	237:f3da66175598	4100
mbed_official	237:f3da66175598	4101	case TIM_TS_TI2FP2:
mbed_official	237:f3da66175598	4102	{
mbed_official	237:f3da66175598	4103	/* Check the parameters */
mbed_official	237:f3da66175598	4104	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4105	assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity));
mbed_official	237:f3da66175598	4106	assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter));
mbed_official	237:f3da66175598	4107
mbed_official	237:f3da66175598	4108	/* Configure TI2 Filter and Polarity */
mbed_official	237:f3da66175598	4109	TIM_TI2_ConfigInputStage(htim->Instance,
mbed_official	237:f3da66175598	4110	sSlaveConfig->TriggerPolarity,
mbed_official	237:f3da66175598	4111	sSlaveConfig->TriggerFilter);
mbed_official	237:f3da66175598	4112	}
mbed_official	237:f3da66175598	4113	break;
mbed_official	237:f3da66175598	4114
mbed_official	237:f3da66175598	4115	case TIM_TS_ITR0:
mbed_official	237:f3da66175598	4116	{
mbed_official	237:f3da66175598	4117	/* Check the parameter */
mbed_official	237:f3da66175598	4118	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4119	}
mbed_official	237:f3da66175598	4120	break;
mbed_official	237:f3da66175598	4121
mbed_official	237:f3da66175598	4122	case TIM_TS_ITR1:
mbed_official	237:f3da66175598	4123	{
mbed_official	237:f3da66175598	4124	/* Check the parameter */
mbed_official	237:f3da66175598	4125	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4126	}
mbed_official	237:f3da66175598	4127	break;
mbed_official	237:f3da66175598	4128
mbed_official	237:f3da66175598	4129	case TIM_TS_ITR2:
mbed_official	237:f3da66175598	4130	{
mbed_official	237:f3da66175598	4131	/* Check the parameter */
mbed_official	237:f3da66175598	4132	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4133	}
mbed_official	237:f3da66175598	4134	break;
mbed_official	237:f3da66175598	4135
mbed_official	237:f3da66175598	4136	case TIM_TS_ITR3:
mbed_official	237:f3da66175598	4137	{
mbed_official	237:f3da66175598	4138	/* Check the parameter */
mbed_official	237:f3da66175598	4139	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4140	}
mbed_official	237:f3da66175598	4141	break;
mbed_official	237:f3da66175598	4142
mbed_official	237:f3da66175598	4143	default:
mbed_official	237:f3da66175598	4144	break;
mbed_official	237:f3da66175598	4145	}
mbed_official	237:f3da66175598	4146
mbed_official	237:f3da66175598	4147	htim->State = HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	4148
mbed_official	237:f3da66175598	4149	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	4150
mbed_official	237:f3da66175598	4151	return HAL_OK;
mbed_official	237:f3da66175598	4152	}
mbed_official	237:f3da66175598	4153
mbed_official	237:f3da66175598	4154	/**
mbed_official	237:f3da66175598	4155	* @brief Read the captured value from Capture Compare unit
mbed_official	237:f3da66175598	4156	* @param htim: TIM handle.
mbed_official	237:f3da66175598	4157	* @param Channel : TIM Channels to be enabled
mbed_official	237:f3da66175598	4158	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	4159	* @arg TIM_CHANNEL_1: TIM Channel 1 selected
mbed_official	237:f3da66175598	4160	* @arg TIM_CHANNEL_2: TIM Channel 2 selected
mbed_official	237:f3da66175598	4161	* @arg TIM_CHANNEL_3: TIM Channel 3 selected
mbed_official	237:f3da66175598	4162	* @arg TIM_CHANNEL_4: TIM Channel 4 selected
mbed_official	237:f3da66175598	4163	* @retval Captured value
mbed_official	237:f3da66175598	4164	*/
mbed_official	237:f3da66175598	4165	uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel)
mbed_official	237:f3da66175598	4166	{
mbed_official	237:f3da66175598	4167	uint32_t tmpreg = 0;
mbed_official	237:f3da66175598	4168
mbed_official	237:f3da66175598	4169	__HAL_LOCK(htim);
mbed_official	237:f3da66175598	4170
mbed_official	237:f3da66175598	4171	switch (Channel)
mbed_official	237:f3da66175598	4172	{
mbed_official	237:f3da66175598	4173	case TIM_CHANNEL_1:
mbed_official	237:f3da66175598	4174	{
mbed_official	237:f3da66175598	4175	/* Check the parameters */
mbed_official	237:f3da66175598	4176	assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4177
mbed_official	237:f3da66175598	4178	/* Return the capture 1 value */
mbed_official	237:f3da66175598	4179	tmpreg = htim->Instance->CCR1;
mbed_official	237:f3da66175598	4180
mbed_official	237:f3da66175598	4181	break;
mbed_official	237:f3da66175598	4182	}
mbed_official	237:f3da66175598	4183	case TIM_CHANNEL_2:
mbed_official	237:f3da66175598	4184	{
mbed_official	237:f3da66175598	4185	/* Check the parameters */
mbed_official	237:f3da66175598	4186	assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4187
mbed_official	237:f3da66175598	4188	/* Return the capture 2 value */
mbed_official	237:f3da66175598	4189	tmpreg = htim->Instance->CCR2;
mbed_official	237:f3da66175598	4190
mbed_official	237:f3da66175598	4191	break;
mbed_official	237:f3da66175598	4192	}
mbed_official	237:f3da66175598	4193
mbed_official	237:f3da66175598	4194	case TIM_CHANNEL_3:
mbed_official	237:f3da66175598	4195	{
mbed_official	237:f3da66175598	4196	/* Check the parameters */
mbed_official	237:f3da66175598	4197	assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4198
mbed_official	237:f3da66175598	4199	/* Return the capture 3 value */
mbed_official	237:f3da66175598	4200	tmpreg = htim->Instance->CCR3;
mbed_official	237:f3da66175598	4201
mbed_official	237:f3da66175598	4202	break;
mbed_official	237:f3da66175598	4203	}
mbed_official	237:f3da66175598	4204
mbed_official	237:f3da66175598	4205	case TIM_CHANNEL_4:
mbed_official	237:f3da66175598	4206	{
mbed_official	237:f3da66175598	4207	/* Check the parameters */
mbed_official	237:f3da66175598	4208	assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
mbed_official	237:f3da66175598	4209
mbed_official	237:f3da66175598	4210	/* Return the capture 4 value */
mbed_official	237:f3da66175598	4211	tmpreg = htim->Instance->CCR4;
mbed_official	237:f3da66175598	4212
mbed_official	237:f3da66175598	4213	break;
mbed_official	237:f3da66175598	4214	}
mbed_official	237:f3da66175598	4215
mbed_official	237:f3da66175598	4216	default:
mbed_official	237:f3da66175598	4217	break;
mbed_official	237:f3da66175598	4218	}
mbed_official	237:f3da66175598	4219
mbed_official	237:f3da66175598	4220	__HAL_UNLOCK(htim);
mbed_official	237:f3da66175598	4221	return tmpreg;
mbed_official	237:f3da66175598	4222	}
mbed_official	237:f3da66175598	4223
mbed_official	237:f3da66175598	4224	/**
mbed_official	237:f3da66175598	4225	* @}
mbed_official	237:f3da66175598	4226	*/
mbed_official	237:f3da66175598	4227
mbed_official	375:3d36234a1087	4228	/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions
mbed_official	237:f3da66175598	4229	* @brief TIM Callbacks functions
mbed_official	237:f3da66175598	4230	*
mbed_official	237:f3da66175598	4231	@verbatim
mbed_official	237:f3da66175598	4232	==============================================================================
mbed_official	237:f3da66175598	4233	##### TIM Callbacks functions #####
mbed_official	237:f3da66175598	4234	==============================================================================
mbed_official	237:f3da66175598	4235	[..]
mbed_official	237:f3da66175598	4236	This section provides TIM callback functions:
mbed_official	237:f3da66175598	4237	(+) Timer Period elapsed callback
mbed_official	237:f3da66175598	4238	(+) Timer Output Compare callback
mbed_official	237:f3da66175598	4239	(+) Timer Input capture callback
mbed_official	237:f3da66175598	4240	(+) Timer Trigger callback
mbed_official	237:f3da66175598	4241	(+) Timer Error callback
mbed_official	237:f3da66175598	4242
mbed_official	237:f3da66175598	4243	@endverbatim
mbed_official	237:f3da66175598	4244	* @{
mbed_official	237:f3da66175598	4245	*/
mbed_official	237:f3da66175598	4246
mbed_official	237:f3da66175598	4247	/**
mbed_official	237:f3da66175598	4248	* @brief Period elapsed callback in non blocking mode
mbed_official	237:f3da66175598	4249	* @param htim : TIM handle
mbed_official	237:f3da66175598	4250	* @retval None
mbed_official	237:f3da66175598	4251	*/
mbed_official	237:f3da66175598	4252	__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4253	{
mbed_official	237:f3da66175598	4254	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	4255	the __HAL_TIM_PeriodElapsedCallback could be implemented in the user file
mbed_official	237:f3da66175598	4256	*/
mbed_official	237:f3da66175598	4257
mbed_official	237:f3da66175598	4258	}
mbed_official	237:f3da66175598	4259	/**
mbed_official	237:f3da66175598	4260	* @brief Output Compare callback in non blocking mode
mbed_official	237:f3da66175598	4261	* @param htim : TIM OC handle
mbed_official	237:f3da66175598	4262	* @retval None
mbed_official	237:f3da66175598	4263	*/
mbed_official	237:f3da66175598	4264	__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4265	{
mbed_official	237:f3da66175598	4266	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	4267	the __HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
mbed_official	237:f3da66175598	4268	*/
mbed_official	237:f3da66175598	4269	}
mbed_official	237:f3da66175598	4270	/**
mbed_official	237:f3da66175598	4271	* @brief Input Capture callback in non blocking mode
mbed_official	237:f3da66175598	4272	* @param htim : TIM IC handle
mbed_official	237:f3da66175598	4273	* @retval None
mbed_official	237:f3da66175598	4274	*/
mbed_official	237:f3da66175598	4275	__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4276	{
mbed_official	237:f3da66175598	4277	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	4278	the __HAL_TIM_IC_CaptureCallback could be implemented in the user file
mbed_official	237:f3da66175598	4279	*/
mbed_official	237:f3da66175598	4280	}
mbed_official	237:f3da66175598	4281
mbed_official	237:f3da66175598	4282	/**
mbed_official	237:f3da66175598	4283	* @brief PWM Pulse finished callback in non blocking mode
mbed_official	237:f3da66175598	4284	* @param htim : TIM handle
mbed_official	237:f3da66175598	4285	* @retval None
mbed_official	237:f3da66175598	4286	*/
mbed_official	237:f3da66175598	4287	__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4288	{
mbed_official	237:f3da66175598	4289	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	4290	the __HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
mbed_official	237:f3da66175598	4291	*/
mbed_official	237:f3da66175598	4292	}
mbed_official	237:f3da66175598	4293
mbed_official	237:f3da66175598	4294	/**
mbed_official	237:f3da66175598	4295	* @brief Hall Trigger detection callback in non blocking mode
mbed_official	237:f3da66175598	4296	* @param htim : TIM handle
mbed_official	237:f3da66175598	4297	* @retval None
mbed_official	237:f3da66175598	4298	*/
mbed_official	237:f3da66175598	4299	__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4300	{
mbed_official	237:f3da66175598	4301	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	4302	the HAL_TIM_TriggerCallback could be implemented in the user file
mbed_official	237:f3da66175598	4303	*/
mbed_official	237:f3da66175598	4304	}
mbed_official	237:f3da66175598	4305
mbed_official	237:f3da66175598	4306	/**
mbed_official	237:f3da66175598	4307	* @brief Timer error callback in non blocking mode
mbed_official	237:f3da66175598	4308	* @param htim : TIM handle
mbed_official	237:f3da66175598	4309	* @retval None
mbed_official	237:f3da66175598	4310	*/
mbed_official	237:f3da66175598	4311	__weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4312	{
mbed_official	237:f3da66175598	4313	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	237:f3da66175598	4314	the HAL_TIM_ErrorCallback could be implemented in the user file
mbed_official	237:f3da66175598	4315	*/
mbed_official	237:f3da66175598	4316	}
mbed_official	237:f3da66175598	4317
mbed_official	237:f3da66175598	4318	/**
mbed_official	237:f3da66175598	4319	* @}
mbed_official	237:f3da66175598	4320	*/
mbed_official	237:f3da66175598	4321
mbed_official	375:3d36234a1087	4322	/** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions
mbed_official	237:f3da66175598	4323	* @brief Peripheral State functions
mbed_official	237:f3da66175598	4324	*
mbed_official	237:f3da66175598	4325	@verbatim
mbed_official	237:f3da66175598	4326	==============================================================================
mbed_official	237:f3da66175598	4327	##### Peripheral State functions #####
mbed_official	237:f3da66175598	4328	==============================================================================
mbed_official	237:f3da66175598	4329	[..]
mbed_official	237:f3da66175598	4330	This subsection permit to get in run-time the status of the peripheral
mbed_official	237:f3da66175598	4331	and the data flow.
mbed_official	237:f3da66175598	4332
mbed_official	237:f3da66175598	4333	@endverbatim
mbed_official	237:f3da66175598	4334	* @{
mbed_official	237:f3da66175598	4335	*/
mbed_official	237:f3da66175598	4336
mbed_official	237:f3da66175598	4337	/**
mbed_official	237:f3da66175598	4338	* @brief Return the TIM Base state
mbed_official	237:f3da66175598	4339	* @param htim: TIM Base handle
mbed_official	237:f3da66175598	4340	* @retval HAL state
mbed_official	237:f3da66175598	4341	*/
mbed_official	237:f3da66175598	4342	HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4343	{
mbed_official	237:f3da66175598	4344	return htim->State;
mbed_official	237:f3da66175598	4345	}
mbed_official	237:f3da66175598	4346
mbed_official	237:f3da66175598	4347	/**
mbed_official	237:f3da66175598	4348	* @brief Return the TIM OC state
mbed_official	237:f3da66175598	4349	* @param htim: TIM Ouput Compare handle
mbed_official	237:f3da66175598	4350	* @retval HAL state
mbed_official	237:f3da66175598	4351	*/
mbed_official	237:f3da66175598	4352	HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4353	{
mbed_official	237:f3da66175598	4354	return htim->State;
mbed_official	237:f3da66175598	4355	}
mbed_official	237:f3da66175598	4356
mbed_official	237:f3da66175598	4357	/**
mbed_official	237:f3da66175598	4358	* @brief Return the TIM PWM state
mbed_official	237:f3da66175598	4359	* @param htim: TIM handle
mbed_official	237:f3da66175598	4360	* @retval HAL state
mbed_official	237:f3da66175598	4361	*/
mbed_official	237:f3da66175598	4362	HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4363	{
mbed_official	237:f3da66175598	4364	return htim->State;
mbed_official	237:f3da66175598	4365	}
mbed_official	237:f3da66175598	4366
mbed_official	237:f3da66175598	4367	/**
mbed_official	237:f3da66175598	4368	* @brief Return the TIM Input Capture state
mbed_official	237:f3da66175598	4369	* @param htim: TIM IC handle
mbed_official	237:f3da66175598	4370	* @retval HAL state
mbed_official	237:f3da66175598	4371	*/
mbed_official	237:f3da66175598	4372	HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4373	{
mbed_official	237:f3da66175598	4374	return htim->State;
mbed_official	237:f3da66175598	4375	}
mbed_official	237:f3da66175598	4376
mbed_official	237:f3da66175598	4377	/**
mbed_official	237:f3da66175598	4378	* @brief Return the TIM One Pulse Mode state
mbed_official	237:f3da66175598	4379	* @param htim: TIM OPM handle
mbed_official	237:f3da66175598	4380	* @retval HAL state
mbed_official	237:f3da66175598	4381	*/
mbed_official	237:f3da66175598	4382	HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4383	{
mbed_official	237:f3da66175598	4384	return htim->State;
mbed_official	237:f3da66175598	4385	}
mbed_official	237:f3da66175598	4386
mbed_official	237:f3da66175598	4387	/**
mbed_official	237:f3da66175598	4388	* @brief Return the TIM Encoder Mode state
mbed_official	237:f3da66175598	4389	* @param htim: TIM Encoder handle
mbed_official	237:f3da66175598	4390	* @retval HAL state
mbed_official	237:f3da66175598	4391	*/
mbed_official	237:f3da66175598	4392	HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim)
mbed_official	237:f3da66175598	4393	{
mbed_official	237:f3da66175598	4394	return htim->State;
mbed_official	237:f3da66175598	4395	}
mbed_official	237:f3da66175598	4396
mbed_official	237:f3da66175598	4397	/**
mbed_official	237:f3da66175598	4398	* @}
mbed_official	237:f3da66175598	4399	*/
mbed_official	237:f3da66175598	4400
mbed_official	237:f3da66175598	4401	/**
mbed_official	237:f3da66175598	4402	* @brief TIM DMA error callback
mbed_official	237:f3da66175598	4403	* @param hdma : pointer to DMA handle.
mbed_official	237:f3da66175598	4404	* @retval None
mbed_official	237:f3da66175598	4405	*/
mbed_official	237:f3da66175598	4406	void HAL_TIM_DMAError(DMA_HandleTypeDef *hdma)
mbed_official	237:f3da66175598	4407	{
mbed_official	237:f3da66175598	4408	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	237:f3da66175598	4409
mbed_official	237:f3da66175598	4410	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	4411
mbed_official	237:f3da66175598	4412	HAL_TIM_ErrorCallback(htim);
mbed_official	237:f3da66175598	4413	}
mbed_official	237:f3da66175598	4414
mbed_official	237:f3da66175598	4415	/**
mbed_official	237:f3da66175598	4416	* @brief TIM DMA Delay Pulse complete callback.
mbed_official	237:f3da66175598	4417	* @param hdma : pointer to DMA handle.
mbed_official	237:f3da66175598	4418	* @retval None
mbed_official	237:f3da66175598	4419	*/
mbed_official	237:f3da66175598	4420	void HAL_TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma)
mbed_official	237:f3da66175598	4421	{
mbed_official	237:f3da66175598	4422	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	237:f3da66175598	4423
mbed_official	237:f3da66175598	4424	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	4425
mbed_official	237:f3da66175598	4426	if (hdma == htim->hdma[TIM_DMA_ID_CC1])
mbed_official	237:f3da66175598	4427	{
mbed_official	237:f3da66175598	4428	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
mbed_official	237:f3da66175598	4429	}
mbed_official	237:f3da66175598	4430	else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
mbed_official	237:f3da66175598	4431	{
mbed_official	237:f3da66175598	4432	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
mbed_official	237:f3da66175598	4433	}
mbed_official	237:f3da66175598	4434	else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
mbed_official	237:f3da66175598	4435	{
mbed_official	237:f3da66175598	4436	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
mbed_official	237:f3da66175598	4437	}
mbed_official	237:f3da66175598	4438	else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
mbed_official	237:f3da66175598	4439	{
mbed_official	237:f3da66175598	4440	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
mbed_official	237:f3da66175598	4441	}
mbed_official	237:f3da66175598	4442
mbed_official	237:f3da66175598	4443	HAL_TIM_PWM_PulseFinishedCallback(htim);
mbed_official	237:f3da66175598	4444
mbed_official	237:f3da66175598	4445	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official	237:f3da66175598	4446	}
mbed_official	237:f3da66175598	4447	/**
mbed_official	237:f3da66175598	4448	* @brief TIM DMA Capture complete callback.
mbed_official	237:f3da66175598	4449	* @param hdma : pointer to DMA handle.
mbed_official	237:f3da66175598	4450	* @retval None
mbed_official	237:f3da66175598	4451	*/
mbed_official	237:f3da66175598	4452	void HAL_TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma)
mbed_official	237:f3da66175598	4453	{
mbed_official	237:f3da66175598	4454	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	237:f3da66175598	4455
mbed_official	237:f3da66175598	4456	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	4457
mbed_official	237:f3da66175598	4458	if (hdma == htim->hdma[TIM_DMA_ID_CC1])
mbed_official	237:f3da66175598	4459	{
mbed_official	237:f3da66175598	4460	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
mbed_official	237:f3da66175598	4461	}
mbed_official	237:f3da66175598	4462	else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
mbed_official	237:f3da66175598	4463	{
mbed_official	237:f3da66175598	4464	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
mbed_official	237:f3da66175598	4465	}
mbed_official	237:f3da66175598	4466	else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
mbed_official	237:f3da66175598	4467	{
mbed_official	237:f3da66175598	4468	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
mbed_official	237:f3da66175598	4469	}
mbed_official	237:f3da66175598	4470	else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
mbed_official	237:f3da66175598	4471	{
mbed_official	237:f3da66175598	4472	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
mbed_official	237:f3da66175598	4473	}
mbed_official	237:f3da66175598	4474
mbed_official	237:f3da66175598	4475	HAL_TIM_IC_CaptureCallback(htim);
mbed_official	237:f3da66175598	4476
mbed_official	237:f3da66175598	4477	htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
mbed_official	237:f3da66175598	4478	}
mbed_official	237:f3da66175598	4479
mbed_official	237:f3da66175598	4480	/**
mbed_official	237:f3da66175598	4481	* @brief TIM DMA Period Elapse complete callback.
mbed_official	237:f3da66175598	4482	* @param hdma : pointer to DMA handle.
mbed_official	237:f3da66175598	4483	* @retval None
mbed_official	237:f3da66175598	4484	*/
mbed_official	237:f3da66175598	4485	static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma)
mbed_official	237:f3da66175598	4486	{
mbed_official	237:f3da66175598	4487	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	237:f3da66175598	4488
mbed_official	237:f3da66175598	4489	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	4490
mbed_official	237:f3da66175598	4491	HAL_TIM_PeriodElapsedCallback(htim);
mbed_official	237:f3da66175598	4492	}
mbed_official	237:f3da66175598	4493
mbed_official	237:f3da66175598	4494	/**
mbed_official	237:f3da66175598	4495	* @brief TIM DMA Trigger callback.
mbed_official	237:f3da66175598	4496	* @param hdma : pointer to DMA handle.
mbed_official	237:f3da66175598	4497	* @retval None
mbed_official	237:f3da66175598	4498	*/
mbed_official	237:f3da66175598	4499	static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma)
mbed_official	237:f3da66175598	4500	{
mbed_official	237:f3da66175598	4501	TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	237:f3da66175598	4502
mbed_official	237:f3da66175598	4503	htim->State= HAL_TIM_STATE_READY;
mbed_official	237:f3da66175598	4504
mbed_official	237:f3da66175598	4505	HAL_TIM_TriggerCallback(htim);
mbed_official	237:f3da66175598	4506	}
mbed_official	237:f3da66175598	4507
mbed_official	237:f3da66175598	4508	/**
mbed_official	237:f3da66175598	4509	* @brief Time Base configuration
mbed_official	237:f3da66175598	4510	* @param TIMx: TIM periheral
mbed_official	237:f3da66175598	4511	* @param Structure: TIM Base configuration structure
mbed_official	237:f3da66175598	4512	* @retval None
mbed_official	237:f3da66175598	4513	*/
mbed_official	237:f3da66175598	4514	void TIM_Base_SetConfig(TIM_TypeDef TIMx, TIM_Base_InitTypeDef Structure)
mbed_official	237:f3da66175598	4515	{
mbed_official	237:f3da66175598	4516	uint32_t tmpcr1 = 0;
mbed_official	237:f3da66175598	4517	tmpcr1 = TIMx->CR1;
mbed_official	237:f3da66175598	4518
mbed_official	237:f3da66175598	4519	/* Set TIM Time Base Unit parameters ---------------------------------------*/
mbed_official	237:f3da66175598	4520	if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
mbed_official	237:f3da66175598	4521	{
mbed_official	237:f3da66175598	4522	/* Select the Counter Mode */
mbed_official	237:f3da66175598	4523	tmpcr1 &= ~(TIM_CR1_DIR \| TIM_CR1_CMS);
mbed_official	237:f3da66175598	4524	tmpcr1 \|= Structure->CounterMode;
mbed_official	237:f3da66175598	4525	}
mbed_official	237:f3da66175598	4526
mbed_official	237:f3da66175598	4527	if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
mbed_official	237:f3da66175598	4528	{
mbed_official	237:f3da66175598	4529	/* Set the clock division */
mbed_official	237:f3da66175598	4530	tmpcr1 &= ~TIM_CR1_CKD;
mbed_official	237:f3da66175598	4531	tmpcr1 \|= (uint32_t)Structure->ClockDivision;
mbed_official	237:f3da66175598	4532	}
mbed_official	237:f3da66175598	4533
mbed_official	237:f3da66175598	4534	TIMx->CR1 = tmpcr1;
mbed_official	237:f3da66175598	4535
mbed_official	237:f3da66175598	4536	/* Set the Autoreload value */
mbed_official	237:f3da66175598	4537	TIMx->ARR = (uint32_t)Structure->Period ;
mbed_official	237:f3da66175598	4538
mbed_official	237:f3da66175598	4539	/* Set the Prescaler value */
mbed_official	237:f3da66175598	4540	TIMx->PSC = (uint32_t)Structure->Prescaler;
mbed_official	237:f3da66175598	4541
mbed_official	237:f3da66175598	4542	if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
mbed_official	237:f3da66175598	4543	{
mbed_official	237:f3da66175598	4544	/* Set the Repetition Counter value */
mbed_official	237:f3da66175598	4545	TIMx->RCR = Structure->RepetitionCounter;
mbed_official	237:f3da66175598	4546	}
mbed_official	237:f3da66175598	4547
mbed_official	237:f3da66175598	4548	/* Generate an update event to reload the Prescaler
mbed_official	237:f3da66175598	4549	and the repetition counter(only for TIM1 and TIM8) value immediatly */
mbed_official	237:f3da66175598	4550	TIMx->EGR = TIM_EGR_UG;
mbed_official	237:f3da66175598	4551	}
mbed_official	237:f3da66175598	4552
mbed_official	237:f3da66175598	4553	/**
mbed_official	237:f3da66175598	4554	* @brief Time Ouput Compare 1 configuration
mbed_official	237:f3da66175598	4555	* @param TIMx to select the TIM peripheral
mbed_official	237:f3da66175598	4556	* @param OC_Config: The ouput configuration structure
mbed_official	237:f3da66175598	4557	* @retval None
mbed_official	237:f3da66175598	4558	*/
mbed_official	237:f3da66175598	4559	void TIM_OC1_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
mbed_official	237:f3da66175598	4560	{
mbed_official	237:f3da66175598	4561	uint32_t tmpccmrx = 0;
mbed_official	237:f3da66175598	4562	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	4563	uint32_t tmpcr2 = 0;
mbed_official	237:f3da66175598	4564
mbed_official	237:f3da66175598	4565	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	237:f3da66175598	4566	TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official	237:f3da66175598	4567
mbed_official	237:f3da66175598	4568	/* Get the TIMx CCER register value */
mbed_official	237:f3da66175598	4569	tmpccer = TIMx->CCER;
mbed_official	237:f3da66175598	4570	/* Get the TIMx CR2 register value */
mbed_official	237:f3da66175598	4571	tmpcr2 = TIMx->CR2;
mbed_official	237:f3da66175598	4572
mbed_official	237:f3da66175598	4573	/* Get the TIMx CCMR1 register value */
mbed_official	237:f3da66175598	4574	tmpccmrx = TIMx->CCMR1;
mbed_official	237:f3da66175598	4575
mbed_official	237:f3da66175598	4576	/* Reset the Output Compare Mode Bits */
mbed_official	237:f3da66175598	4577	tmpccmrx &= ~TIM_CCMR1_OC1M;
mbed_official	237:f3da66175598	4578	tmpccmrx &= ~TIM_CCMR1_CC1S;
mbed_official	237:f3da66175598	4579	/* Select the Output Compare Mode */
mbed_official	237:f3da66175598	4580	tmpccmrx \|= OC_Config->OCMode;
mbed_official	237:f3da66175598	4581
mbed_official	237:f3da66175598	4582	/* Reset the Output Polarity level */
mbed_official	237:f3da66175598	4583	tmpccer &= ~TIM_CCER_CC1P;
mbed_official	237:f3da66175598	4584	/* Set the Output Compare Polarity */
mbed_official	237:f3da66175598	4585	tmpccer \|= OC_Config->OCPolarity;
mbed_official	237:f3da66175598	4586
mbed_official	237:f3da66175598	4587	if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
mbed_official	237:f3da66175598	4588	{
mbed_official	237:f3da66175598	4589	/* Check parameters */
mbed_official	237:f3da66175598	4590	assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
mbed_official	237:f3da66175598	4591
mbed_official	237:f3da66175598	4592	/* Reset the Output N Polarity level */
mbed_official	237:f3da66175598	4593	tmpccer &= ~TIM_CCER_CC1NP;
mbed_official	237:f3da66175598	4594	/* Set the Output N Polarity */
mbed_official	237:f3da66175598	4595	tmpccer \|= OC_Config->OCNPolarity;
mbed_official	237:f3da66175598	4596	/* Reset the Output N State */
mbed_official	237:f3da66175598	4597	tmpccer &= ~TIM_CCER_CC1NE;
mbed_official	237:f3da66175598	4598	}
mbed_official	237:f3da66175598	4599
mbed_official	237:f3da66175598	4600	if(IS_TIM_BREAK_INSTANCE(TIMx))
mbed_official	237:f3da66175598	4601	{
mbed_official	237:f3da66175598	4602	/* Check parameters */
mbed_official	237:f3da66175598	4603	assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official	237:f3da66175598	4604	assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official	237:f3da66175598	4605
mbed_official	237:f3da66175598	4606	/* Reset the Output Compare and Output Compare N IDLE State */
mbed_official	237:f3da66175598	4607	tmpcr2 &= ~TIM_CR2_OIS1;
mbed_official	237:f3da66175598	4608	tmpcr2 &= ~TIM_CR2_OIS1N;
mbed_official	237:f3da66175598	4609	/* Set the Output Idle state */
mbed_official	237:f3da66175598	4610	tmpcr2 \|= OC_Config->OCIdleState;
mbed_official	237:f3da66175598	4611	/* Set the Output N Idle state */
mbed_official	237:f3da66175598	4612	tmpcr2 \|= OC_Config->OCNIdleState;
mbed_official	237:f3da66175598	4613	}
mbed_official	237:f3da66175598	4614	/* Write to TIMx CR2 */
mbed_official	237:f3da66175598	4615	TIMx->CR2 = tmpcr2;
mbed_official	237:f3da66175598	4616
mbed_official	237:f3da66175598	4617	/* Write to TIMx CCMR1 */
mbed_official	237:f3da66175598	4618	TIMx->CCMR1 = tmpccmrx;
mbed_official	237:f3da66175598	4619
mbed_official	237:f3da66175598	4620	/* Set the Capture Compare Register value */
mbed_official	237:f3da66175598	4621	TIMx->CCR1 = OC_Config->Pulse;
mbed_official	237:f3da66175598	4622
mbed_official	237:f3da66175598	4623	/* Write to TIMx CCER */
mbed_official	237:f3da66175598	4624	TIMx->CCER = tmpccer;
mbed_official	237:f3da66175598	4625	}
mbed_official	237:f3da66175598	4626
mbed_official	237:f3da66175598	4627	/**
mbed_official	237:f3da66175598	4628	* @brief Time Ouput Compare 2 configuration
mbed_official	237:f3da66175598	4629	* @param TIMx to select the TIM peripheral
mbed_official	237:f3da66175598	4630	* @param OC_Config: The ouput configuration structure
mbed_official	237:f3da66175598	4631	* @retval None
mbed_official	237:f3da66175598	4632	*/
mbed_official	237:f3da66175598	4633	void TIM_OC2_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
mbed_official	237:f3da66175598	4634	{
mbed_official	237:f3da66175598	4635	uint32_t tmpccmrx = 0;
mbed_official	237:f3da66175598	4636	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	4637	uint32_t tmpcr2 = 0;
mbed_official	237:f3da66175598	4638
mbed_official	237:f3da66175598	4639	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	237:f3da66175598	4640	TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official	237:f3da66175598	4641
mbed_official	237:f3da66175598	4642	/* Get the TIMx CCER register value */
mbed_official	237:f3da66175598	4643	tmpccer = TIMx->CCER;
mbed_official	237:f3da66175598	4644	/* Get the TIMx CR2 register value */
mbed_official	237:f3da66175598	4645	tmpcr2 = TIMx->CR2;
mbed_official	237:f3da66175598	4646
mbed_official	237:f3da66175598	4647	/* Get the TIMx CCMR1 register value */
mbed_official	237:f3da66175598	4648	tmpccmrx = TIMx->CCMR1;
mbed_official	237:f3da66175598	4649
mbed_official	237:f3da66175598	4650	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	237:f3da66175598	4651	tmpccmrx &= ~TIM_CCMR1_OC2M;
mbed_official	237:f3da66175598	4652	tmpccmrx &= ~TIM_CCMR1_CC2S;
mbed_official	237:f3da66175598	4653
mbed_official	237:f3da66175598	4654	/* Select the Output Compare Mode */
mbed_official	237:f3da66175598	4655	tmpccmrx \|= (OC_Config->OCMode << 8);
mbed_official	237:f3da66175598	4656
mbed_official	237:f3da66175598	4657	/* Reset the Output Polarity level */
mbed_official	237:f3da66175598	4658	tmpccer &= ~TIM_CCER_CC2P;
mbed_official	237:f3da66175598	4659	/* Set the Output Compare Polarity */
mbed_official	237:f3da66175598	4660	tmpccer \|= (OC_Config->OCPolarity << 4);
mbed_official	237:f3da66175598	4661
mbed_official	237:f3da66175598	4662	if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
mbed_official	237:f3da66175598	4663	{
mbed_official	237:f3da66175598	4664	assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
mbed_official	237:f3da66175598	4665	assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official	237:f3da66175598	4666	assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official	237:f3da66175598	4667
mbed_official	237:f3da66175598	4668	/* Reset the Output N Polarity level */
mbed_official	237:f3da66175598	4669	tmpccer &= ~TIM_CCER_CC2NP;
mbed_official	237:f3da66175598	4670	/* Set the Output N Polarity */
mbed_official	237:f3da66175598	4671	tmpccer \|= (OC_Config->OCNPolarity << 4);
mbed_official	237:f3da66175598	4672	/* Reset the Output N State */
mbed_official	237:f3da66175598	4673	tmpccer &= ~TIM_CCER_CC2NE;
mbed_official	237:f3da66175598	4674
mbed_official	237:f3da66175598	4675	}
mbed_official	237:f3da66175598	4676
mbed_official	237:f3da66175598	4677	if(IS_TIM_BREAK_INSTANCE(TIMx))
mbed_official	237:f3da66175598	4678	{
mbed_official	237:f3da66175598	4679	/* Check parameters */
mbed_official	237:f3da66175598	4680	assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official	237:f3da66175598	4681	assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official	237:f3da66175598	4682
mbed_official	237:f3da66175598	4683	/* Reset the Output Compare and Output Compare N IDLE State */
mbed_official	237:f3da66175598	4684	tmpcr2 &= ~TIM_CR2_OIS2;
mbed_official	237:f3da66175598	4685	tmpcr2 &= ~TIM_CR2_OIS2N;
mbed_official	237:f3da66175598	4686	/* Set the Output Idle state */
mbed_official	237:f3da66175598	4687	tmpcr2 \|= (OC_Config->OCIdleState << 2);
mbed_official	237:f3da66175598	4688	/* Set the Output N Idle state */
mbed_official	237:f3da66175598	4689	tmpcr2 \|= (OC_Config->OCNIdleState << 2);
mbed_official	237:f3da66175598	4690	}
mbed_official	237:f3da66175598	4691
mbed_official	237:f3da66175598	4692	/* Write to TIMx CR2 */
mbed_official	237:f3da66175598	4693	TIMx->CR2 = tmpcr2;
mbed_official	237:f3da66175598	4694
mbed_official	237:f3da66175598	4695	/* Write to TIMx CCMR1 */
mbed_official	237:f3da66175598	4696	TIMx->CCMR1 = tmpccmrx;
mbed_official	237:f3da66175598	4697
mbed_official	237:f3da66175598	4698	/* Set the Capture Compare Register value */
mbed_official	237:f3da66175598	4699	TIMx->CCR2 = OC_Config->Pulse;
mbed_official	237:f3da66175598	4700
mbed_official	237:f3da66175598	4701	/* Write to TIMx CCER */
mbed_official	237:f3da66175598	4702	TIMx->CCER = tmpccer;
mbed_official	237:f3da66175598	4703	}
mbed_official	237:f3da66175598	4704
mbed_official	237:f3da66175598	4705	/**
mbed_official	237:f3da66175598	4706	* @brief Time Ouput Compare 3 configuration
mbed_official	237:f3da66175598	4707	* @param TIMx to select the TIM peripheral
mbed_official	237:f3da66175598	4708	* @param OC_Config: The ouput configuration structure
mbed_official	237:f3da66175598	4709	* @retval None
mbed_official	237:f3da66175598	4710	*/
mbed_official	237:f3da66175598	4711	void TIM_OC3_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
mbed_official	237:f3da66175598	4712	{
mbed_official	237:f3da66175598	4713	uint32_t tmpccmrx = 0;
mbed_official	237:f3da66175598	4714	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	4715	uint32_t tmpcr2 = 0;
mbed_official	237:f3da66175598	4716
mbed_official	237:f3da66175598	4717	/* Disable the Channel 3: Reset the CC2E Bit */
mbed_official	237:f3da66175598	4718	TIMx->CCER &= ~TIM_CCER_CC3E;
mbed_official	237:f3da66175598	4719
mbed_official	237:f3da66175598	4720	/* Get the TIMx CCER register value */
mbed_official	237:f3da66175598	4721	tmpccer = TIMx->CCER;
mbed_official	237:f3da66175598	4722	/* Get the TIMx CR2 register value */
mbed_official	237:f3da66175598	4723	tmpcr2 = TIMx->CR2;
mbed_official	237:f3da66175598	4724
mbed_official	237:f3da66175598	4725	/* Get the TIMx CCMR2 register value */
mbed_official	237:f3da66175598	4726	tmpccmrx = TIMx->CCMR2;
mbed_official	237:f3da66175598	4727
mbed_official	237:f3da66175598	4728	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	237:f3da66175598	4729	tmpccmrx &= ~TIM_CCMR2_OC3M;
mbed_official	237:f3da66175598	4730	tmpccmrx &= ~TIM_CCMR2_CC3S;
mbed_official	237:f3da66175598	4731	/* Select the Output Compare Mode */
mbed_official	237:f3da66175598	4732	tmpccmrx \|= OC_Config->OCMode;
mbed_official	237:f3da66175598	4733
mbed_official	237:f3da66175598	4734	/* Reset the Output Polarity level */
mbed_official	237:f3da66175598	4735	tmpccer &= ~TIM_CCER_CC3P;
mbed_official	237:f3da66175598	4736	/* Set the Output Compare Polarity */
mbed_official	237:f3da66175598	4737	tmpccer \|= (OC_Config->OCPolarity << 8);
mbed_official	237:f3da66175598	4738
mbed_official	237:f3da66175598	4739	if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
mbed_official	237:f3da66175598	4740	{
mbed_official	237:f3da66175598	4741	assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
mbed_official	237:f3da66175598	4742	assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official	237:f3da66175598	4743	assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official	237:f3da66175598	4744
mbed_official	237:f3da66175598	4745	/* Reset the Output N Polarity level */
mbed_official	237:f3da66175598	4746	tmpccer &= ~TIM_CCER_CC3NP;
mbed_official	237:f3da66175598	4747	/* Set the Output N Polarity */
mbed_official	237:f3da66175598	4748	tmpccer \|= (OC_Config->OCNPolarity << 8);
mbed_official	237:f3da66175598	4749	/* Reset the Output N State */
mbed_official	237:f3da66175598	4750	tmpccer &= ~TIM_CCER_CC3NE;
mbed_official	237:f3da66175598	4751	}
mbed_official	237:f3da66175598	4752
mbed_official	237:f3da66175598	4753	if(IS_TIM_BREAK_INSTANCE(TIMx))
mbed_official	237:f3da66175598	4754	{
mbed_official	237:f3da66175598	4755	/* Check parameters */
mbed_official	237:f3da66175598	4756	assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
mbed_official	237:f3da66175598	4757	assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official	237:f3da66175598	4758
mbed_official	237:f3da66175598	4759	/* Reset the Output Compare and Output Compare N IDLE State */
mbed_official	237:f3da66175598	4760	tmpcr2 &= ~TIM_CR2_OIS3;
mbed_official	237:f3da66175598	4761	tmpcr2 &= ~TIM_CR2_OIS3N;
mbed_official	237:f3da66175598	4762	/* Set the Output Idle state */
mbed_official	237:f3da66175598	4763	tmpcr2 \|= (OC_Config->OCIdleState << 4);
mbed_official	237:f3da66175598	4764	/* Set the Output N Idle state */
mbed_official	237:f3da66175598	4765	tmpcr2 \|= (OC_Config->OCNIdleState << 4);
mbed_official	237:f3da66175598	4766	}
mbed_official	237:f3da66175598	4767
mbed_official	237:f3da66175598	4768	/* Write to TIMx CR2 */
mbed_official	237:f3da66175598	4769	TIMx->CR2 = tmpcr2;
mbed_official	237:f3da66175598	4770
mbed_official	237:f3da66175598	4771	/* Write to TIMx CCMR2 */
mbed_official	237:f3da66175598	4772	TIMx->CCMR2 = tmpccmrx;
mbed_official	237:f3da66175598	4773
mbed_official	237:f3da66175598	4774	/* Set the Capture Compare Register value */
mbed_official	237:f3da66175598	4775	TIMx->CCR3 = OC_Config->Pulse;
mbed_official	237:f3da66175598	4776
mbed_official	237:f3da66175598	4777	/* Write to TIMx CCER */
mbed_official	237:f3da66175598	4778	TIMx->CCER = tmpccer;
mbed_official	237:f3da66175598	4779	}
mbed_official	237:f3da66175598	4780
mbed_official	237:f3da66175598	4781	/**
mbed_official	237:f3da66175598	4782	* @brief Time Ouput Compare 4 configuration
mbed_official	237:f3da66175598	4783	* @param TIMx to select the TIM peripheral
mbed_official	237:f3da66175598	4784	* @param OC_Config: The ouput configuration structure
mbed_official	237:f3da66175598	4785	* @retval None
mbed_official	237:f3da66175598	4786	*/
mbed_official	237:f3da66175598	4787	void TIM_OC4_SetConfig(TIM_TypeDef TIMx, TIM_OC_InitTypeDef OC_Config)
mbed_official	237:f3da66175598	4788	{
mbed_official	237:f3da66175598	4789	uint32_t tmpccmrx = 0;
mbed_official	237:f3da66175598	4790	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	4791	uint32_t tmpcr2 = 0;
mbed_official	237:f3da66175598	4792
mbed_official	237:f3da66175598	4793	/* Disable the Channel 4: Reset the CC4E Bit */
mbed_official	237:f3da66175598	4794	TIMx->CCER &= ~TIM_CCER_CC4E;
mbed_official	237:f3da66175598	4795
mbed_official	237:f3da66175598	4796	/* Get the TIMx CCER register value */
mbed_official	237:f3da66175598	4797	tmpccer = TIMx->CCER;
mbed_official	237:f3da66175598	4798	/* Get the TIMx CR2 register value */
mbed_official	237:f3da66175598	4799	tmpcr2 = TIMx->CR2;
mbed_official	237:f3da66175598	4800
mbed_official	237:f3da66175598	4801	/* Get the TIMx CCMR2 register value */
mbed_official	237:f3da66175598	4802	tmpccmrx = TIMx->CCMR2;
mbed_official	237:f3da66175598	4803
mbed_official	237:f3da66175598	4804	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	237:f3da66175598	4805	tmpccmrx &= ~TIM_CCMR2_OC4M;
mbed_official	237:f3da66175598	4806	tmpccmrx &= ~TIM_CCMR2_CC4S;
mbed_official	237:f3da66175598	4807
mbed_official	237:f3da66175598	4808	/* Select the Output Compare Mode */
mbed_official	237:f3da66175598	4809	tmpccmrx \|= (OC_Config->OCMode << 8);
mbed_official	237:f3da66175598	4810
mbed_official	237:f3da66175598	4811	/* Reset the Output Polarity level */
mbed_official	237:f3da66175598	4812	tmpccer &= ~TIM_CCER_CC4P;
mbed_official	237:f3da66175598	4813	/* Set the Output Compare Polarity */
mbed_official	237:f3da66175598	4814	tmpccer \|= (OC_Config->OCPolarity << 12);
mbed_official	237:f3da66175598	4815
mbed_official	237:f3da66175598	4816	if(IS_TIM_BREAK_INSTANCE(TIMx))
mbed_official	237:f3da66175598	4817	{
mbed_official	237:f3da66175598	4818	assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
mbed_official	237:f3da66175598	4819
mbed_official	237:f3da66175598	4820	/* Reset the Output Compare IDLE State */
mbed_official	237:f3da66175598	4821	tmpcr2 &= ~TIM_CR2_OIS4;
mbed_official	237:f3da66175598	4822	/* Set the Output Idle state */
mbed_official	237:f3da66175598	4823	tmpcr2 \|= (OC_Config->OCIdleState << 6);
mbed_official	237:f3da66175598	4824	}
mbed_official	237:f3da66175598	4825
mbed_official	237:f3da66175598	4826	/* Write to TIMx CR2 */
mbed_official	237:f3da66175598	4827	TIMx->CR2 = tmpcr2;
mbed_official	237:f3da66175598	4828
mbed_official	237:f3da66175598	4829	/* Write to TIMx CCMR2 */
mbed_official	237:f3da66175598	4830	TIMx->CCMR2 = tmpccmrx;
mbed_official	237:f3da66175598	4831
mbed_official	237:f3da66175598	4832	/* Set the Capture Compare Register value */
mbed_official	237:f3da66175598	4833	TIMx->CCR4 = OC_Config->Pulse;
mbed_official	237:f3da66175598	4834
mbed_official	237:f3da66175598	4835	/* Write to TIMx CCER */
mbed_official	237:f3da66175598	4836	TIMx->CCER = tmpccer;
mbed_official	237:f3da66175598	4837	}
mbed_official	237:f3da66175598	4838
mbed_official	237:f3da66175598	4839	/**
mbed_official	237:f3da66175598	4840	* @brief Configure the TI1 as Input.
mbed_official	237:f3da66175598	4841	* @param TIMx to select the TIM peripheral.
mbed_official	237:f3da66175598	4842	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	237:f3da66175598	4843	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	4844	* @arg TIM_ICPolarity_Rising
mbed_official	237:f3da66175598	4845	* @arg TIM_ICPolarity_Falling
mbed_official	237:f3da66175598	4846	* @arg TIM_ICPolarity_BothEdge
mbed_official	237:f3da66175598	4847	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	237:f3da66175598	4848	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	4849	* @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1.
mbed_official	237:f3da66175598	4850	* @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2.
mbed_official	237:f3da66175598	4851	* @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC.
mbed_official	237:f3da66175598	4852	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	237:f3da66175598	4853	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	237:f3da66175598	4854	* @retval None
mbed_official	237:f3da66175598	4855	* @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1
mbed_official	237:f3da66175598	4856	* (on channel2 path) is used as the input signal. Therefore CCMR1 must be
mbed_official	237:f3da66175598	4857	* protected against un-initialized filter and polarity values.
mbed_official	237:f3da66175598	4858	*/
mbed_official	237:f3da66175598	4859	void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official	237:f3da66175598	4860	uint32_t TIM_ICFilter)
mbed_official	237:f3da66175598	4861	{
mbed_official	237:f3da66175598	4862	uint32_t tmpccmr1 = 0;
mbed_official	237:f3da66175598	4863	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	4864
mbed_official	237:f3da66175598	4865	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	237:f3da66175598	4866	TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official	237:f3da66175598	4867	tmpccmr1 = TIMx->CCMR1;
mbed_official	237:f3da66175598	4868	tmpccer = TIMx->CCER;
mbed_official	237:f3da66175598	4869
mbed_official	237:f3da66175598	4870	/* Select the Input */
mbed_official	237:f3da66175598	4871	if(IS_TIM_CC2_INSTANCE(TIMx) != RESET)
mbed_official	237:f3da66175598	4872	{
mbed_official	237:f3da66175598	4873	tmpccmr1 &= ~TIM_CCMR1_CC1S;
mbed_official	237:f3da66175598	4874	tmpccmr1 \|= TIM_ICSelection;
mbed_official	237:f3da66175598	4875	}
mbed_official	237:f3da66175598	4876	else
mbed_official	237:f3da66175598	4877	{
mbed_official	237:f3da66175598	4878	tmpccmr1 \|= TIM_CCMR1_CC1S_0;
mbed_official	237:f3da66175598	4879	}
mbed_official	237:f3da66175598	4880
mbed_official	237:f3da66175598	4881	/* Set the filter */
mbed_official	237:f3da66175598	4882	tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official	237:f3da66175598	4883	tmpccmr1 \|= ((TIM_ICFilter << 4) & TIM_CCMR1_IC1F);
mbed_official	237:f3da66175598	4884
mbed_official	237:f3da66175598	4885	/* Select the Polarity and set the CC1E Bit */
mbed_official	237:f3da66175598	4886	tmpccer &= ~(TIM_CCER_CC1P \| TIM_CCER_CC1NP);
mbed_official	237:f3da66175598	4887	tmpccer \|= (TIM_ICPolarity & (TIM_CCER_CC1P \| TIM_CCER_CC1NP));
mbed_official	237:f3da66175598	4888
mbed_official	237:f3da66175598	4889	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	237:f3da66175598	4890	TIMx->CCMR1 = tmpccmr1;
mbed_official	237:f3da66175598	4891	TIMx->CCER = tmpccer;
mbed_official	237:f3da66175598	4892	}
mbed_official	237:f3da66175598	4893
mbed_official	237:f3da66175598	4894	/**
mbed_official	237:f3da66175598	4895	* @brief Configure the Polarity and Filter for TI1.
mbed_official	237:f3da66175598	4896	* @param TIMx to select the TIM peripheral.
mbed_official	237:f3da66175598	4897	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	237:f3da66175598	4898	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	4899	* @arg TIM_ICPolarity_Rising
mbed_official	237:f3da66175598	4900	* @arg TIM_ICPolarity_Falling
mbed_official	237:f3da66175598	4901	* @arg TIM_ICPolarity_BothEdge
mbed_official	237:f3da66175598	4902	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	237:f3da66175598	4903	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	237:f3da66175598	4904	* @retval None
mbed_official	237:f3da66175598	4905	*/
mbed_official	237:f3da66175598	4906	static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
mbed_official	237:f3da66175598	4907	{
mbed_official	237:f3da66175598	4908	uint32_t tmpccmr1 = 0;
mbed_official	237:f3da66175598	4909	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	4910
mbed_official	237:f3da66175598	4911	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	237:f3da66175598	4912	tmpccer = TIMx->CCER;
mbed_official	237:f3da66175598	4913	TIMx->CCER &= ~TIM_CCER_CC1E;
mbed_official	237:f3da66175598	4914	tmpccmr1 = TIMx->CCMR1;
mbed_official	237:f3da66175598	4915
mbed_official	237:f3da66175598	4916	/* Set the filter */
mbed_official	237:f3da66175598	4917	tmpccmr1 &= ~TIM_CCMR1_IC1F;
mbed_official	237:f3da66175598	4918	tmpccmr1 \|= (TIM_ICFilter << 4);
mbed_official	237:f3da66175598	4919
mbed_official	237:f3da66175598	4920	/* Select the Polarity and set the CC1E Bit */
mbed_official	237:f3da66175598	4921	tmpccer &= ~(TIM_CCER_CC1P \| TIM_CCER_CC1NP);
mbed_official	237:f3da66175598	4922	tmpccer \|= TIM_ICPolarity;
mbed_official	237:f3da66175598	4923
mbed_official	237:f3da66175598	4924	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	237:f3da66175598	4925	TIMx->CCMR1 = tmpccmr1;
mbed_official	237:f3da66175598	4926	TIMx->CCER = tmpccer;
mbed_official	237:f3da66175598	4927	}
mbed_official	237:f3da66175598	4928
mbed_official	237:f3da66175598	4929	/**
mbed_official	237:f3da66175598	4930	* @brief Configure the TI2 as Input.
mbed_official	237:f3da66175598	4931	* @param TIMx to select the TIM peripheral
mbed_official	237:f3da66175598	4932	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	237:f3da66175598	4933	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	4934	* @arg TIM_ICPolarity_Rising
mbed_official	237:f3da66175598	4935	* @arg TIM_ICPolarity_Falling
mbed_official	237:f3da66175598	4936	* @arg TIM_ICPolarity_BothEdge
mbed_official	237:f3da66175598	4937	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	237:f3da66175598	4938	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	4939	* @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2.
mbed_official	237:f3da66175598	4940	* @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1.
mbed_official	237:f3da66175598	4941	* @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC.
mbed_official	237:f3da66175598	4942	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	237:f3da66175598	4943	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	237:f3da66175598	4944	* @retval None
mbed_official	237:f3da66175598	4945	* @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2
mbed_official	237:f3da66175598	4946	* (on channel1 path) is used as the input signal. Therefore CCMR1 must be
mbed_official	237:f3da66175598	4947	* protected against un-initialized filter and polarity values.
mbed_official	237:f3da66175598	4948	*/
mbed_official	237:f3da66175598	4949	static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official	237:f3da66175598	4950	uint32_t TIM_ICFilter)
mbed_official	237:f3da66175598	4951	{
mbed_official	237:f3da66175598	4952	uint32_t tmpccmr1 = 0;
mbed_official	237:f3da66175598	4953	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	4954
mbed_official	237:f3da66175598	4955	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	237:f3da66175598	4956	TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official	237:f3da66175598	4957	tmpccmr1 = TIMx->CCMR1;
mbed_official	237:f3da66175598	4958	tmpccer = TIMx->CCER;
mbed_official	237:f3da66175598	4959
mbed_official	237:f3da66175598	4960	/* Select the Input */
mbed_official	237:f3da66175598	4961	tmpccmr1 &= ~TIM_CCMR1_CC2S;
mbed_official	237:f3da66175598	4962	tmpccmr1 \|= (TIM_ICSelection << 8);
mbed_official	237:f3da66175598	4963
mbed_official	237:f3da66175598	4964	/* Set the filter */
mbed_official	237:f3da66175598	4965	tmpccmr1 &= ~TIM_CCMR1_IC2F;
mbed_official	237:f3da66175598	4966	tmpccmr1 \|= ((TIM_ICFilter << 12) & TIM_CCMR1_IC2F);
mbed_official	237:f3da66175598	4967
mbed_official	237:f3da66175598	4968	/* Select the Polarity and set the CC2E Bit */
mbed_official	237:f3da66175598	4969	tmpccer &= ~(TIM_CCER_CC2P \| TIM_CCER_CC2NP);
mbed_official	237:f3da66175598	4970	tmpccer \|= ((TIM_ICPolarity << 4) & (TIM_CCER_CC2P \| TIM_CCER_CC2NP));
mbed_official	237:f3da66175598	4971
mbed_official	237:f3da66175598	4972	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	237:f3da66175598	4973	TIMx->CCMR1 = tmpccmr1 ;
mbed_official	237:f3da66175598	4974	TIMx->CCER = tmpccer;
mbed_official	237:f3da66175598	4975	}
mbed_official	237:f3da66175598	4976
mbed_official	237:f3da66175598	4977	/**
mbed_official	237:f3da66175598	4978	* @brief Configure the Polarity and Filter for TI2.
mbed_official	237:f3da66175598	4979	* @param TIMx to select the TIM peripheral.
mbed_official	237:f3da66175598	4980	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	237:f3da66175598	4981	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	4982	* @arg TIM_ICPolarity_Rising
mbed_official	237:f3da66175598	4983	* @arg TIM_ICPolarity_Falling
mbed_official	237:f3da66175598	4984	* @arg TIM_ICPolarity_BothEdge
mbed_official	237:f3da66175598	4985	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	237:f3da66175598	4986	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	237:f3da66175598	4987	* @retval None
mbed_official	237:f3da66175598	4988	*/
mbed_official	237:f3da66175598	4989	static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
mbed_official	237:f3da66175598	4990	{
mbed_official	237:f3da66175598	4991	uint32_t tmpccmr1 = 0;
mbed_official	237:f3da66175598	4992	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	4993
mbed_official	237:f3da66175598	4994	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	237:f3da66175598	4995	TIMx->CCER &= ~TIM_CCER_CC2E;
mbed_official	237:f3da66175598	4996	tmpccmr1 = TIMx->CCMR1;
mbed_official	237:f3da66175598	4997	tmpccer = TIMx->CCER;
mbed_official	237:f3da66175598	4998
mbed_official	237:f3da66175598	4999	/* Set the filter */
mbed_official	237:f3da66175598	5000	tmpccmr1 &= ~TIM_CCMR1_IC2F;
mbed_official	237:f3da66175598	5001	tmpccmr1 \|= (TIM_ICFilter << 12);
mbed_official	237:f3da66175598	5002
mbed_official	237:f3da66175598	5003	/* Select the Polarity and set the CC2E Bit */
mbed_official	237:f3da66175598	5004	tmpccer &= ~(TIM_CCER_CC2P \| TIM_CCER_CC2NP);
mbed_official	237:f3da66175598	5005	tmpccer \|= (TIM_ICPolarity << 4);
mbed_official	237:f3da66175598	5006
mbed_official	237:f3da66175598	5007	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	237:f3da66175598	5008	TIMx->CCMR1 = tmpccmr1 ;
mbed_official	237:f3da66175598	5009	TIMx->CCER = tmpccer;
mbed_official	237:f3da66175598	5010	}
mbed_official	237:f3da66175598	5011
mbed_official	237:f3da66175598	5012	/**
mbed_official	237:f3da66175598	5013	* @brief Configure the TI3 as Input.
mbed_official	237:f3da66175598	5014	* @param TIMx to select the TIM peripheral
mbed_official	237:f3da66175598	5015	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	237:f3da66175598	5016	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	5017	* @arg TIM_ICPolarity_Rising
mbed_official	237:f3da66175598	5018	* @arg TIM_ICPolarity_Falling
mbed_official	237:f3da66175598	5019	* @arg TIM_ICPolarity_BothEdge
mbed_official	237:f3da66175598	5020	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	237:f3da66175598	5021	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	5022	* @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3.
mbed_official	237:f3da66175598	5023	* @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4.
mbed_official	237:f3da66175598	5024	* @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC.
mbed_official	237:f3da66175598	5025	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	237:f3da66175598	5026	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	237:f3da66175598	5027	* @retval None
mbed_official	237:f3da66175598	5028	* @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4
mbed_official	237:f3da66175598	5029	* (on channel1 path) is used as the input signal. Therefore CCMR2 must be
mbed_official	237:f3da66175598	5030	* protected against un-initialized filter and polarity values.
mbed_official	237:f3da66175598	5031	*/
mbed_official	237:f3da66175598	5032	static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official	237:f3da66175598	5033	uint32_t TIM_ICFilter)
mbed_official	237:f3da66175598	5034	{
mbed_official	237:f3da66175598	5035	uint32_t tmpccmr2 = 0;
mbed_official	237:f3da66175598	5036	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	5037
mbed_official	237:f3da66175598	5038	/* Disable the Channel 3: Reset the CC3E Bit */
mbed_official	237:f3da66175598	5039	TIMx->CCER &= ~TIM_CCER_CC3E;
mbed_official	237:f3da66175598	5040	tmpccmr2 = TIMx->CCMR2;
mbed_official	237:f3da66175598	5041	tmpccer = TIMx->CCER;
mbed_official	237:f3da66175598	5042
mbed_official	237:f3da66175598	5043	/* Select the Input */
mbed_official	237:f3da66175598	5044	tmpccmr2 &= ~TIM_CCMR2_CC3S;
mbed_official	237:f3da66175598	5045	tmpccmr2 \|= TIM_ICSelection;
mbed_official	237:f3da66175598	5046
mbed_official	237:f3da66175598	5047	/* Set the filter */
mbed_official	237:f3da66175598	5048	tmpccmr2 &= ~TIM_CCMR2_IC3F;
mbed_official	237:f3da66175598	5049	tmpccmr2 \|= ((TIM_ICFilter << 4) & TIM_CCMR2_IC3F);
mbed_official	237:f3da66175598	5050
mbed_official	237:f3da66175598	5051	/* Select the Polarity and set the CC3E Bit */
mbed_official	237:f3da66175598	5052	tmpccer &= ~(TIM_CCER_CC3P \| TIM_CCER_CC3NP);
mbed_official	237:f3da66175598	5053	tmpccer \|= ((TIM_ICPolarity << 8) & (TIM_CCER_CC3P \| TIM_CCER_CC3NP));
mbed_official	237:f3da66175598	5054
mbed_official	237:f3da66175598	5055	/* Write to TIMx CCMR2 and CCER registers */
mbed_official	237:f3da66175598	5056	TIMx->CCMR2 = tmpccmr2;
mbed_official	237:f3da66175598	5057	TIMx->CCER = tmpccer;
mbed_official	237:f3da66175598	5058	}
mbed_official	237:f3da66175598	5059
mbed_official	237:f3da66175598	5060	/**
mbed_official	237:f3da66175598	5061	* @brief Configure the TI4 as Input.
mbed_official	237:f3da66175598	5062	* @param TIMx to select the TIM peripheral
mbed_official	237:f3da66175598	5063	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	237:f3da66175598	5064	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	5065	* @arg TIM_ICPolarity_Rising
mbed_official	237:f3da66175598	5066	* @arg TIM_ICPolarity_Falling
mbed_official	237:f3da66175598	5067	* @arg TIM_ICPolarity_BothEdge
mbed_official	237:f3da66175598	5068	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	237:f3da66175598	5069	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	5070	* @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4.
mbed_official	237:f3da66175598	5071	* @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3.
mbed_official	237:f3da66175598	5072	* @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC.
mbed_official	237:f3da66175598	5073	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	237:f3da66175598	5074	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	237:f3da66175598	5075	* @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3
mbed_official	237:f3da66175598	5076	* (on channel1 path) is used as the input signal. Therefore CCMR2 must be
mbed_official	237:f3da66175598	5077	* protected against un-initialized filter and polarity values.
mbed_official	237:f3da66175598	5078	* @retval None
mbed_official	237:f3da66175598	5079	*/
mbed_official	237:f3da66175598	5080	static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection,
mbed_official	237:f3da66175598	5081	uint32_t TIM_ICFilter)
mbed_official	237:f3da66175598	5082	{
mbed_official	237:f3da66175598	5083	uint32_t tmpccmr2 = 0;
mbed_official	237:f3da66175598	5084	uint32_t tmpccer = 0;
mbed_official	237:f3da66175598	5085
mbed_official	237:f3da66175598	5086	/* Disable the Channel 4: Reset the CC4E Bit */
mbed_official	237:f3da66175598	5087	TIMx->CCER &= ~TIM_CCER_CC4E;
mbed_official	237:f3da66175598	5088	tmpccmr2 = TIMx->CCMR2;
mbed_official	237:f3da66175598	5089	tmpccer = TIMx->CCER;
mbed_official	237:f3da66175598	5090
mbed_official	237:f3da66175598	5091	/* Select the Input */
mbed_official	237:f3da66175598	5092	tmpccmr2 &= ~TIM_CCMR2_CC4S;
mbed_official	237:f3da66175598	5093	tmpccmr2 \|= (TIM_ICSelection << 8);
mbed_official	237:f3da66175598	5094
mbed_official	237:f3da66175598	5095	/* Set the filter */
mbed_official	237:f3da66175598	5096	tmpccmr2 &= ~TIM_CCMR2_IC4F;
mbed_official	237:f3da66175598	5097	tmpccmr2 \|= ((TIM_ICFilter << 12) & TIM_CCMR2_IC4F);
mbed_official	237:f3da66175598	5098
mbed_official	237:f3da66175598	5099	/* Select the Polarity and set the CC4E Bit */
mbed_official	237:f3da66175598	5100	tmpccer &= ~(TIM_CCER_CC4P \| TIM_CCER_CC4NP);
mbed_official	237:f3da66175598	5101	tmpccer \|= ((TIM_ICPolarity << 12) & (TIM_CCER_CC4P \| TIM_CCER_CC4NP));
mbed_official	237:f3da66175598	5102
mbed_official	237:f3da66175598	5103	/* Write to TIMx CCMR2 and CCER registers */
mbed_official	237:f3da66175598	5104	TIMx->CCMR2 = tmpccmr2;
mbed_official	237:f3da66175598	5105	TIMx->CCER = tmpccer ;
mbed_official	237:f3da66175598	5106	}
mbed_official	237:f3da66175598	5107
mbed_official	237:f3da66175598	5108	/**
mbed_official	237:f3da66175598	5109	* @brief Selects the Input Trigger source
mbed_official	237:f3da66175598	5110	* @param TIMx to select the TIM peripheral
mbed_official	237:f3da66175598	5111	* @param InputTriggerSource: The Input Trigger source.
mbed_official	237:f3da66175598	5112	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	5113	* @arg TIM_TS_ITR0: Internal Trigger 0
mbed_official	237:f3da66175598	5114	* @arg TIM_TS_ITR1: Internal Trigger 1
mbed_official	237:f3da66175598	5115	* @arg TIM_TS_ITR2: Internal Trigger 2
mbed_official	237:f3da66175598	5116	* @arg TIM_TS_ITR3: Internal Trigger 3
mbed_official	237:f3da66175598	5117	* @arg TIM_TS_TI1F_ED: TI1 Edge Detector
mbed_official	237:f3da66175598	5118	* @arg TIM_TS_TI1FP1: Filtered Timer Input 1
mbed_official	237:f3da66175598	5119	* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
mbed_official	237:f3da66175598	5120	* @arg TIM_TS_ETRF: External Trigger input
mbed_official	237:f3da66175598	5121	* @retval None
mbed_official	237:f3da66175598	5122	*/
mbed_official	237:f3da66175598	5123	static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t InputTriggerSource)
mbed_official	237:f3da66175598	5124	{
mbed_official	237:f3da66175598	5125	uint32_t tmpsmcr = 0;
mbed_official	237:f3da66175598	5126
mbed_official	237:f3da66175598	5127	/* Get the TIMx SMCR register value */
mbed_official	237:f3da66175598	5128	tmpsmcr = TIMx->SMCR;
mbed_official	237:f3da66175598	5129	/* Reset the TS Bits */
mbed_official	237:f3da66175598	5130	tmpsmcr &= ~TIM_SMCR_TS;
mbed_official	237:f3da66175598	5131	/* Set the Input Trigger source and the slave mode*/
mbed_official	237:f3da66175598	5132	tmpsmcr \|= InputTriggerSource \| TIM_SLAVEMODE_EXTERNAL1;
mbed_official	237:f3da66175598	5133	/* Write to TIMx SMCR */
mbed_official	237:f3da66175598	5134	TIMx->SMCR = tmpsmcr;
mbed_official	237:f3da66175598	5135	}
mbed_official	237:f3da66175598	5136	/**
mbed_official	237:f3da66175598	5137	* @brief Configures the TIMx External Trigger (ETR).
mbed_official	237:f3da66175598	5138	* @param TIMx to select the TIM peripheral
mbed_official	237:f3da66175598	5139	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official	237:f3da66175598	5140	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	5141	* @arg TIM_ExtTRGPSC_DIV1: ETRP Prescaler OFF.
mbed_official	237:f3da66175598	5142	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official	237:f3da66175598	5143	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official	237:f3da66175598	5144	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official	237:f3da66175598	5145	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official	237:f3da66175598	5146	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	5147	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official	237:f3da66175598	5148	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official	237:f3da66175598	5149	* @param ExtTRGFilter: External Trigger Filter.
mbed_official	237:f3da66175598	5150	* This parameter must be a value between 0x00 and 0x0F
mbed_official	237:f3da66175598	5151	* @retval None
mbed_official	237:f3da66175598	5152	*/
mbed_official	237:f3da66175598	5153	void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
mbed_official	237:f3da66175598	5154	uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
mbed_official	237:f3da66175598	5155	{
mbed_official	237:f3da66175598	5156	uint32_t tmpsmcr = 0;
mbed_official	237:f3da66175598	5157
mbed_official	237:f3da66175598	5158	tmpsmcr = TIMx->SMCR;
mbed_official	237:f3da66175598	5159
mbed_official	237:f3da66175598	5160	/* Reset the ETR Bits */
mbed_official	237:f3da66175598	5161	tmpsmcr &= ~(TIM_SMCR_ETF \| TIM_SMCR_ETPS \| TIM_SMCR_ECE \| TIM_SMCR_ETP);
mbed_official	237:f3da66175598	5162
mbed_official	237:f3da66175598	5163	/* Set the Prescaler, the Filter value and the Polarity */
mbed_official	237:f3da66175598	5164	tmpsmcr \|= (uint32_t)(TIM_ExtTRGPrescaler \| (TIM_ExtTRGPolarity \| (ExtTRGFilter << 8)));
mbed_official	237:f3da66175598	5165
mbed_official	237:f3da66175598	5166	/* Write to TIMx SMCR */
mbed_official	237:f3da66175598	5167	TIMx->SMCR = tmpsmcr;
mbed_official	237:f3da66175598	5168	}
mbed_official	237:f3da66175598	5169
mbed_official	237:f3da66175598	5170	/**
mbed_official	237:f3da66175598	5171	* @brief Enables or disables the TIM Capture Compare Channel x.
mbed_official	237:f3da66175598	5172	* @param TIMx to select the TIM peripheral
mbed_official	237:f3da66175598	5173	* @param Channel: specifies the TIM Channel
mbed_official	237:f3da66175598	5174	* This parameter can be one of the following values:
mbed_official	237:f3da66175598	5175	* @arg TIM_Channel_1: TIM Channel 1
mbed_official	237:f3da66175598	5176	* @arg TIM_Channel_2: TIM Channel 2
mbed_official	237:f3da66175598	5177	* @arg TIM_Channel_3: TIM Channel 3
mbed_official	237:f3da66175598	5178	* @arg TIM_Channel_4: TIM Channel 4
mbed_official	237:f3da66175598	5179	* @param ChannelState: specifies the TIM Channel CCxE bit new state.
mbed_official	237:f3da66175598	5180	* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_Disable.
mbed_official	237:f3da66175598	5181	* @retval None
mbed_official	237:f3da66175598	5182	*/
mbed_official	237:f3da66175598	5183	void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState)
mbed_official	237:f3da66175598	5184	{
mbed_official	237:f3da66175598	5185	uint32_t tmp = 0;
mbed_official	237:f3da66175598	5186
mbed_official	237:f3da66175598	5187	/* Check the parameters */
mbed_official	237:f3da66175598	5188	assert_param(IS_TIM_CC1_INSTANCE(TIMx));
mbed_official	237:f3da66175598	5189	assert_param(IS_TIM_CHANNELS(Channel));
mbed_official	237:f3da66175598	5190
mbed_official	237:f3da66175598	5191	tmp = TIM_CCER_CC1E << Channel;
mbed_official	237:f3da66175598	5192
mbed_official	237:f3da66175598	5193	/* Reset the CCxE Bit */
mbed_official	237:f3da66175598	5194	TIMx->CCER &= ~tmp;
mbed_official	237:f3da66175598	5195
mbed_official	237:f3da66175598	5196	/* Set or reset the CCxE Bit */
mbed_official	237:f3da66175598	5197	TIMx->CCER \|= (uint32_t)(ChannelState << Channel);
mbed_official	237:f3da66175598	5198	}
mbed_official	237:f3da66175598	5199
mbed_official	237:f3da66175598	5200
mbed_official	237:f3da66175598	5201	/**
mbed_official	237:f3da66175598	5202	* @}
mbed_official	237:f3da66175598	5203	*/
mbed_official	237:f3da66175598	5204
mbed_official	237:f3da66175598	5205	#endif /* HAL_TIM_MODULE_ENABLED */
mbed_official	237:f3da66175598	5206	/**
mbed_official	237:f3da66175598	5207	* @}
mbed_official	237:f3da66175598	5208	*/
mbed_official	237:f3da66175598	5209
mbed_official	237:f3da66175598	5210	/**
mbed_official	237:f3da66175598	5211	* @}
mbed_official	237:f3da66175598	5212	*/
mbed_official	237:f3da66175598	5213	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

Repository toolbox

Export to desktop IDE

Repository details

Type:	Library
Created:	13 Dec 2016
Imports:	0
Forks:	0
Commits:	637
Dependents:	0
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_tim.c@385:be64abf45658, 2014-11-04 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning