mbed-src - mbed library sources

Users » lzbpli » Code » mbed-src

mbed library sources

targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc_ex.c@636:b0d178e9fa10, 2016-07-07 (annotated)

Committer:: lzbpli
Date:: Thu Jul 07 06:48:59 2016 +0000
Revision:: 636:b0d178e9fa10
Parent:: 634:ac7d6880524d

l053

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	330:c80ac197fa6a	1	/**
mbed_official	330:c80ac197fa6a	2	******************************************************************************
mbed_official	330:c80ac197fa6a	3	* @file stm32f3xx_hal_adc_ex.c
mbed_official	330:c80ac197fa6a	4	* @author MCD Application Team
mbed_official	634:ac7d6880524d	5	* @version V1.1.0
mbed_official	634:ac7d6880524d	6	* @date 12-Sept-2014
mbed_official	330:c80ac197fa6a	7	* @brief This file provides firmware functions to manage the following
mbed_official	330:c80ac197fa6a	8	* functionalities of the Analog to Digital Convertor (ADC)
mbed_official	330:c80ac197fa6a	9	* peripheral:
mbed_official	330:c80ac197fa6a	10	* + Initialization and de-initialization functions
mbed_official	330:c80ac197fa6a	11	* ++ Initialization and Configuration of ADC
mbed_official	330:c80ac197fa6a	12	* + Operation functions
mbed_official	330:c80ac197fa6a	13	* ++ Start, stop, get result of conversions of regular and injected
mbed_official	330:c80ac197fa6a	14	* groups, using 3 possible modes: polling, interruption or DMA.
mbed_official	330:c80ac197fa6a	15	* ++ Multimode feature (available on devices with 2 ADCs or more)
mbed_official	330:c80ac197fa6a	16	* ++ Calibration (ADC automatic self-calibration)
mbed_official	330:c80ac197fa6a	17	* + Control functions
mbed_official	330:c80ac197fa6a	18	* ++ Configure channels on regular group
mbed_official	330:c80ac197fa6a	19	* ++ Configure channels on injected group
mbed_official	330:c80ac197fa6a	20	* ++ Configure the analog watchdog
mbed_official	330:c80ac197fa6a	21	* + State functions
mbed_official	330:c80ac197fa6a	22	* ++ ADC state machine management
mbed_official	330:c80ac197fa6a	23	* ++ Interrupts and flags management
mbed_official	330:c80ac197fa6a	24	*
mbed_official	330:c80ac197fa6a	25	@verbatim
mbed_official	330:c80ac197fa6a	26	==============================================================================
mbed_official	330:c80ac197fa6a	27	##### ADC specific features #####
mbed_official	330:c80ac197fa6a	28	==============================================================================
mbed_official	330:c80ac197fa6a	29	[..]
mbed_official	330:c80ac197fa6a	30	(#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution (available only on
mbed_official	330:c80ac197fa6a	31	STM32F30xxC devices).
mbed_official	330:c80ac197fa6a	32
mbed_official	330:c80ac197fa6a	33	(#) Interrupt generation at the end of regular conversion, end of injected
mbed_official	330:c80ac197fa6a	34	conversion, and in case of analog watchdog or overrun events.
mbed_official	330:c80ac197fa6a	35
mbed_official	330:c80ac197fa6a	36	(#) Single and continuous conversion modes.
mbed_official	330:c80ac197fa6a	37
mbed_official	330:c80ac197fa6a	38	(#) Scan mode for automatic conversion of channel 0 to channel 'n'.
mbed_official	330:c80ac197fa6a	39
mbed_official	330:c80ac197fa6a	40	(#) Data alignment with in-built data coherency.
mbed_official	330:c80ac197fa6a	41
mbed_official	330:c80ac197fa6a	42	(#) Channel-wise programmable sampling time.
mbed_official	330:c80ac197fa6a	43
mbed_official	330:c80ac197fa6a	44	(#) ADC conversion Regular or Injected groups.
mbed_official	330:c80ac197fa6a	45
mbed_official	330:c80ac197fa6a	46	(#) External trigger (timer or EXTI) with configurable polarity for both
mbed_official	330:c80ac197fa6a	47	regular and injected groups.
mbed_official	330:c80ac197fa6a	48
mbed_official	330:c80ac197fa6a	49	(#) DMA request generation for transfer of conversions data of regular group.
mbed_official	330:c80ac197fa6a	50
mbed_official	330:c80ac197fa6a	51	(#) Multimode Dual mode (available on devices with 2 ADCs or more).
mbed_official	330:c80ac197fa6a	52
mbed_official	330:c80ac197fa6a	53	(#) Configurable DMA data storage in Multimode Dual mode (available on devices
mbed_official	330:c80ac197fa6a	54	with 2 DCs or more).
mbed_official	330:c80ac197fa6a	55
mbed_official	330:c80ac197fa6a	56	(#) Configurable delay between conversions in Dual interleaved mode (available
mbed_official	330:c80ac197fa6a	57	on devices with 2 DCs or more).
mbed_official	330:c80ac197fa6a	58
mbed_official	330:c80ac197fa6a	59	(#) ADC calibration
mbed_official	330:c80ac197fa6a	60
mbed_official	330:c80ac197fa6a	61	(#) ADC channels selectable single/differential input (available only on
mbed_official	330:c80ac197fa6a	62	STM32F30xxC devices)
mbed_official	330:c80ac197fa6a	63
mbed_official	330:c80ac197fa6a	64	(#) ADC Injected sequencer&channels configuration context queue (available
mbed_official	330:c80ac197fa6a	65	only on STM32F30xxC devices)
mbed_official	330:c80ac197fa6a	66
mbed_official	330:c80ac197fa6a	67	(#) ADC offset on injected and regular groups (offset on regular group
mbed_official	330:c80ac197fa6a	68	available only on STM32F30xxC devices)
mbed_official	330:c80ac197fa6a	69
mbed_official	330:c80ac197fa6a	70	(#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
mbed_official	330:c80ac197fa6a	71	slower speed.
mbed_official	330:c80ac197fa6a	72
mbed_official	330:c80ac197fa6a	73	(#) ADC input range: from Vref (connected to Vssa) to Vref+ (connected to
mbed_official	330:c80ac197fa6a	74	Vdda or to an external voltage reference).
mbed_official	330:c80ac197fa6a	75
mbed_official	330:c80ac197fa6a	76
mbed_official	330:c80ac197fa6a	77	##### How to use this driver #####
mbed_official	330:c80ac197fa6a	78	==============================================================================
mbed_official	330:c80ac197fa6a	79	[..]
mbed_official	330:c80ac197fa6a	80
mbed_official	330:c80ac197fa6a	81	(#) Enable the ADC interface
mbed_official	330:c80ac197fa6a	82	As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured
mbed_official	330:c80ac197fa6a	83	at RCC top level: clock source and clock prescaler.
mbed_official	330:c80ac197fa6a	84
mbed_official	330:c80ac197fa6a	85	For STM32F30x/STM32F33x devices:
mbed_official	330:c80ac197fa6a	86	Two possible clock sources: synchronous clock derived from AHB clock
mbed_official	330:c80ac197fa6a	87	or asynchronous clock derived from ADC dedicated PLL 72MHz.
mbed_official	330:c80ac197fa6a	88	- synchronous clock is configured using macro __ADCx_CLK_ENABLE()
mbed_official	330:c80ac197fa6a	89	- asynchronous clock is configured using macro __HAL_RCC_ADCx_CONFIG()
mbed_official	330:c80ac197fa6a	90	or function HAL_RCCEx_PeriphCLKConfig().
mbed_official	330:c80ac197fa6a	91
mbed_official	330:c80ac197fa6a	92	For example, in case of device with a single ADC:
mbed_official	330:c80ac197fa6a	93	__ADC1_CLK_ENABLE() (mandatory)
mbed_official	330:c80ac197fa6a	94	__HAL_RCC_ADC1_CONFIG(RCC_ADC1PLLCLK_DIV1); (optional)
mbed_official	330:c80ac197fa6a	95
mbed_official	330:c80ac197fa6a	96	For example, in case of device with several ADCs:
mbed_official	330:c80ac197fa6a	97	if((hadc->Instance == ADC1) \|\| (hadc->Instance == ADC2))
mbed_official	330:c80ac197fa6a	98	{
mbed_official	330:c80ac197fa6a	99	__ADC12_CLK_ENABLE() (mandatory)
mbed_official	330:c80ac197fa6a	100	__HAL_RCC_ADC12_CONFIG(RCC_ADC12PLLCLK_DIV1); (optional)
mbed_official	330:c80ac197fa6a	101	}
mbed_official	330:c80ac197fa6a	102	else
mbed_official	330:c80ac197fa6a	103	{
mbed_official	330:c80ac197fa6a	104	__ADC34_CLK_ENABLE() (mandatory)
mbed_official	330:c80ac197fa6a	105	__HAL_RCC_ADC34_CONFIG(RCC_ADC34PLLCLK_DIV1); (optional)
mbed_official	330:c80ac197fa6a	106	}
mbed_official	330:c80ac197fa6a	107
mbed_official	330:c80ac197fa6a	108	For STM32F37x devices:
mbed_official	330:c80ac197fa6a	109	Only one clock source: APB2 clock.
mbed_official	330:c80ac197fa6a	110	Example:
mbed_official	330:c80ac197fa6a	111	__HAL_RCC_ADC1_CONFIG(RCC_ADC1PCLK2_DIV2);
mbed_official	330:c80ac197fa6a	112
mbed_official	330:c80ac197fa6a	113	(#) ADC pins configuration
mbed_official	330:c80ac197fa6a	114	(++) Enable the clock for the ADC GPIOs using the following function:
mbed_official	330:c80ac197fa6a	115	__GPIOx_CLK_ENABLE();
mbed_official	330:c80ac197fa6a	116	(++) Configure these ADC pins in analog mode using HAL_GPIO_Init();
mbed_official	330:c80ac197fa6a	117
mbed_official	330:c80ac197fa6a	118	(#) Configure the ADC parameters (conversion resolution, data alignment,
mbed_official	330:c80ac197fa6a	119	continuous mode, ...) using the HAL_ADC_Init() function.
mbed_official	330:c80ac197fa6a	120
mbed_official	330:c80ac197fa6a	121	(#) Activate the ADC peripheral using one of the start functions:
mbed_official	330:c80ac197fa6a	122	HAL_ADC_Start(), HAL_ADC_Start_IT(), HAL_ADC_Start_DMA()
mbed_official	330:c80ac197fa6a	123	HAL_ADCEx_InjectedStart(), HAL_ADCEx_InjectedStart_IT() or
mbed_official	330:c80ac197fa6a	124	HAL_ADC_MultiModeStart_DMA().
mbed_official	330:c80ac197fa6a	125
mbed_official	330:c80ac197fa6a	126	* Channels to regular group configuration *
mbed_official	330:c80ac197fa6a	127	============================================
mbed_official	330:c80ac197fa6a	128	[..]
mbed_official	330:c80ac197fa6a	129	(+) To configure the ADC regular group features, use
mbed_official	330:c80ac197fa6a	130	HAL_ADC_Init() and HAL_ADC_ConfigChannel() functions.
mbed_official	330:c80ac197fa6a	131	(+) To activate the continuous mode, use the HAL_ADC_Init() function.
mbed_official	330:c80ac197fa6a	132	(+) To read the ADC converted values, use the HAL_ADC_GetValue() function.
mbed_official	330:c80ac197fa6a	133
mbed_official	330:c80ac197fa6a	134	* Multimode ADCs configuration *
mbed_official	330:c80ac197fa6a	135	======================================================
mbed_official	330:c80ac197fa6a	136	[..]
mbed_official	330:c80ac197fa6a	137	(+) Multimode feature is available on devices with 2 ADCs or more.
mbed_official	330:c80ac197fa6a	138	(+) Refer to "Channels to regular group" description to
mbed_official	330:c80ac197fa6a	139	configure the ADC1 and ADC2 regular groups.
mbed_official	330:c80ac197fa6a	140	(+) Select the Multi mode ADC features (dual mode
mbed_official	330:c80ac197fa6a	141	simultaneous, interleaved, ...) and configure the DMA mode using
mbed_official	330:c80ac197fa6a	142	HAL_ADCEx_MultiModeConfigChannel() functions.
mbed_official	330:c80ac197fa6a	143	(+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue()
mbed_official	330:c80ac197fa6a	144	function.
mbed_official	330:c80ac197fa6a	145
mbed_official	330:c80ac197fa6a	146	* DMA for regular configuration *
mbed_official	330:c80ac197fa6a	147	=============================================================
mbed_official	330:c80ac197fa6a	148	[..]
mbed_official	330:c80ac197fa6a	149	(+) To enable the DMA mode for regular group, use the
mbed_official	330:c80ac197fa6a	150	HAL_ADC_Start_DMA() function.
mbed_official	330:c80ac197fa6a	151	(+) To enable the generation of DMA requests continuously at the end of
mbed_official	330:c80ac197fa6a	152	the last DMA transfer, use the HAL_ADC_Init() function.
mbed_official	330:c80ac197fa6a	153
mbed_official	330:c80ac197fa6a	154	* Channels to injected group configuration *
mbed_official	330:c80ac197fa6a	155	=============================================
mbed_official	330:c80ac197fa6a	156	[..]
mbed_official	330:c80ac197fa6a	157	(+) To configure the ADC Injected channels group features, use
mbed_official	330:c80ac197fa6a	158	HAL_ADCEx_InjectedConfigChannel() functions.
mbed_official	330:c80ac197fa6a	159	(+) To activate the continuous mode, use the HAL_ADC_Init() function.
mbed_official	330:c80ac197fa6a	160	(+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue()
mbed_official	330:c80ac197fa6a	161	function.
mbed_official	330:c80ac197fa6a	162
mbed_official	330:c80ac197fa6a	163	@endverbatim
mbed_official	330:c80ac197fa6a	164	******************************************************************************
mbed_official	330:c80ac197fa6a	165	* @attention
mbed_official	330:c80ac197fa6a	166	*
mbed_official	634:ac7d6880524d	167	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	330:c80ac197fa6a	168	*
mbed_official	330:c80ac197fa6a	169	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	330:c80ac197fa6a	170	* are permitted provided that the following conditions are met:
mbed_official	330:c80ac197fa6a	171	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	330:c80ac197fa6a	172	* this list of conditions and the following disclaimer.
mbed_official	330:c80ac197fa6a	173	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	330:c80ac197fa6a	174	* this list of conditions and the following disclaimer in the documentation
mbed_official	330:c80ac197fa6a	175	* and/or other materials provided with the distribution.
mbed_official	330:c80ac197fa6a	176	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	330:c80ac197fa6a	177	* may be used to endorse or promote products derived from this software
mbed_official	330:c80ac197fa6a	178	* without specific prior written permission.
mbed_official	330:c80ac197fa6a	179	*
mbed_official	330:c80ac197fa6a	180	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	330:c80ac197fa6a	181	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	330:c80ac197fa6a	182	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	330:c80ac197fa6a	183	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	330:c80ac197fa6a	184	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	330:c80ac197fa6a	185	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	330:c80ac197fa6a	186	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	330:c80ac197fa6a	187	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	330:c80ac197fa6a	188	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	330:c80ac197fa6a	189	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	330:c80ac197fa6a	190	*
mbed_official	330:c80ac197fa6a	191	******************************************************************************
mbed_official	330:c80ac197fa6a	192	*/
mbed_official	330:c80ac197fa6a	193
mbed_official	330:c80ac197fa6a	194	/* Includes ------------------------------------------------------------------*/
mbed_official	330:c80ac197fa6a	195	#include "stm32f3xx_hal.h"
mbed_official	330:c80ac197fa6a	196
mbed_official	330:c80ac197fa6a	197	/** @addtogroup STM32F3xx_HAL_Driver
mbed_official	330:c80ac197fa6a	198	* @{
mbed_official	330:c80ac197fa6a	199	*/
mbed_official	330:c80ac197fa6a	200
mbed_official	330:c80ac197fa6a	201	/** @defgroup ADCEx ADC Extended HAL module driver
mbed_official	330:c80ac197fa6a	202	* @brief ADC Extended HAL module driver
mbed_official	330:c80ac197fa6a	203	* @{
mbed_official	330:c80ac197fa6a	204	*/
mbed_official	330:c80ac197fa6a	205
mbed_official	330:c80ac197fa6a	206	#ifdef HAL_ADC_MODULE_ENABLED
mbed_official	330:c80ac197fa6a	207
mbed_official	330:c80ac197fa6a	208	/* Private typedef -----------------------------------------------------------*/
mbed_official	330:c80ac197fa6a	209	/* Private define ------------------------------------------------------------*/
mbed_official	330:c80ac197fa6a	210	/** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
mbed_official	330:c80ac197fa6a	211	* @{
mbed_official	330:c80ac197fa6a	212	*/
mbed_official	330:c80ac197fa6a	213	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	214	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	215	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	216	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	217	/* Fixed timeout values for ADC calibration, enable settling time, disable */
mbed_official	330:c80ac197fa6a	218	/* settling time. */
mbed_official	330:c80ac197fa6a	219	/* Values defined to be higher than worst cases: low clock frequency, */
mbed_official	330:c80ac197fa6a	220	/* maximum prescalers. */
mbed_official	330:c80ac197fa6a	221	/* Ex of profile low frequency : Clock source at 0.5 MHz, ADC clock */
mbed_official	330:c80ac197fa6a	222	/* prescaler 256 (devices STM32F30xx), sampling time 7.5 ADC clock cycles, */
mbed_official	330:c80ac197fa6a	223	/* resolution 12 bits. */
mbed_official	330:c80ac197fa6a	224	/* Unit: ms */
mbed_official	330:c80ac197fa6a	225	#define ADC_CALIBRATION_TIMEOUT ((uint32_t) 10)
mbed_official	330:c80ac197fa6a	226	#define ADC_ENABLE_TIMEOUT ((uint32_t) 2)
mbed_official	330:c80ac197fa6a	227	#define ADC_DISABLE_TIMEOUT ((uint32_t) 2)
mbed_official	330:c80ac197fa6a	228	#define ADC_STOP_CONVERSION_TIMEOUT ((uint32_t) 11)
mbed_official	330:c80ac197fa6a	229
mbed_official	330:c80ac197fa6a	230	/* Timeout to wait for current conversion on going to be completed. */
mbed_official	330:c80ac197fa6a	231	/* Timeout fixed to worst case, for 1 channel. */
mbed_official	330:c80ac197fa6a	232	/* - maximum sampling time (601.5 adc_clk) */
mbed_official	330:c80ac197fa6a	233	/* - ADC resolution (Tsar 12 bits= 12.5 adc_clk) */
mbed_official	330:c80ac197fa6a	234	/* - ADC clock (from PLL with prescaler 256 (devices STM32F30xx)) */
mbed_official	330:c80ac197fa6a	235	/* Unit: cycles of CPU clock. */
mbed_official	330:c80ac197fa6a	236	#define ADC_CONVERSION_TIME_MAX_CPU_CYCLES ((uint32_t) 156928)
mbed_official	330:c80ac197fa6a	237
mbed_official	330:c80ac197fa6a	238	/* Delay for ADC stabilization time (ADC voltage regulator start-up time) */
mbed_official	330:c80ac197fa6a	239	/* Maximum delay is 10us (refer to device datasheet, param. TADCVREG_STUP). */
mbed_official	330:c80ac197fa6a	240	/* Delay in CPU cycles, fixed to worst case: maximum CPU frequency 72MHz to */
mbed_official	330:c80ac197fa6a	241	/* have the minimum number of CPU cycles to fulfill this delay. */
mbed_official	330:c80ac197fa6a	242	#define ADC_STAB_DELAY_CPU_CYCLES ((uint32_t)720)
mbed_official	330:c80ac197fa6a	243
mbed_official	330:c80ac197fa6a	244	/* Delay for temperature sensor stabilization time. */
mbed_official	330:c80ac197fa6a	245	/* Maximum delay is 10us (refer device datasheet, parameter tSTART). */
mbed_official	330:c80ac197fa6a	246	/* Delay in CPU cycles, fixed to worst case: maximum CPU frequency 72MHz to */
mbed_official	330:c80ac197fa6a	247	/* have the minimum number of CPU cycles to fulfill this delay. */
mbed_official	330:c80ac197fa6a	248	#define ADC_TEMPSENSOR_DELAY_CPU_CYCLES ((uint32_t)720)
mbed_official	330:c80ac197fa6a	249
mbed_official	330:c80ac197fa6a	250	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	251	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	252	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	253	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	254
mbed_official	330:c80ac197fa6a	255	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	256	/* Fixed timeout values for ADC calibration, enable settling time. */
mbed_official	330:c80ac197fa6a	257	/* Values defined to be higher than worst cases: low clocks freq, */
mbed_official	330:c80ac197fa6a	258	/* maximum prescalers. */
mbed_official	330:c80ac197fa6a	259	/* ex: On STM32F303C, clock source PLL=1MHz, presc. RCC_ADC12PLLCLK_DIV256 */
mbed_official	330:c80ac197fa6a	260	/* Unit: ms */
mbed_official	330:c80ac197fa6a	261	#define ADC_CALIBRATION_TIMEOUT ((uint32_t) 10)
mbed_official	330:c80ac197fa6a	262	#define ADC_ENABLE_TIMEOUT ((uint32_t) 10)
mbed_official	330:c80ac197fa6a	263
mbed_official	330:c80ac197fa6a	264	/* Delay for ADC stabilization time. */
mbed_official	330:c80ac197fa6a	265	/* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */
mbed_official	330:c80ac197fa6a	266	/* Delay in CPU cycles, fixed to worst case: maximum CPU frequency 48MHz to */
mbed_official	330:c80ac197fa6a	267	/* have the minimum number of CPU cycles to fulfill this delay. */
mbed_official	330:c80ac197fa6a	268	#define ADC_STAB_DELAY_CPU_CYCLES ((uint32_t)72)
mbed_official	330:c80ac197fa6a	269
mbed_official	330:c80ac197fa6a	270	/* Maximum number of CPU cycles corresponding to 1 ADC cycle */
mbed_official	330:c80ac197fa6a	271	/* Value fixed to worst case: clock prescalers slowing down ADC clock to */
mbed_official	330:c80ac197fa6a	272	/* minimum frequency */
mbed_official	330:c80ac197fa6a	273	/* - AHB prescaler: 16 */
mbed_official	330:c80ac197fa6a	274	/* - ADC prescaler: 8 */
mbed_official	330:c80ac197fa6a	275	/* Unit: cycles of CPU clock. */
mbed_official	330:c80ac197fa6a	276	#define ADC_CYCLE_WORST_CASE_CPU_CYCLES ((uint32_t) 128)
mbed_official	330:c80ac197fa6a	277
mbed_official	330:c80ac197fa6a	278	/* ADC conversion cycles (unit: ADC clock cycles) */
mbed_official	330:c80ac197fa6a	279	/* (selected sampling time + conversion time of 12.5 ADC clock cycles, with */
mbed_official	330:c80ac197fa6a	280	/* resolution 12 bits) */
mbed_official	330:c80ac197fa6a	281	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_1CYCLE5 ((uint32_t) 14)
mbed_official	330:c80ac197fa6a	282	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_7CYCLES5 ((uint32_t) 20)
mbed_official	330:c80ac197fa6a	283	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_13CYCLES5 ((uint32_t) 26)
mbed_official	330:c80ac197fa6a	284	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_28CYCLES5 ((uint32_t) 41)
mbed_official	330:c80ac197fa6a	285	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_41CYCLES5 ((uint32_t) 54)
mbed_official	330:c80ac197fa6a	286	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_55CYCLES5 ((uint32_t) 68)
mbed_official	330:c80ac197fa6a	287	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_71CYCLES5 ((uint32_t) 84)
mbed_official	330:c80ac197fa6a	288	#define ADC_CONVERSIONCLOCKCYCLES_SAMPLETIME_239CYCLES5 ((uint32_t)252)
mbed_official	330:c80ac197fa6a	289	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	290	/**
mbed_official	330:c80ac197fa6a	291	* @}
mbed_official	330:c80ac197fa6a	292	*/
mbed_official	330:c80ac197fa6a	293
mbed_official	330:c80ac197fa6a	294	/* Private macro -------------------------------------------------------------*/
mbed_official	330:c80ac197fa6a	295	/* Private variables ---------------------------------------------------------*/
mbed_official	330:c80ac197fa6a	296	/* Private function prototypes -----------------------------------------------*/
mbed_official	330:c80ac197fa6a	297	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	298	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	299	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	300	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	301	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
mbed_official	330:c80ac197fa6a	302	static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc);
mbed_official	330:c80ac197fa6a	303	static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc, uint32_t ConversionGroup);
mbed_official	330:c80ac197fa6a	304	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	305	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	306	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	307	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	308
mbed_official	330:c80ac197fa6a	309	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	310	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
mbed_official	330:c80ac197fa6a	311	static HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc);
mbed_official	330:c80ac197fa6a	312	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	313
mbed_official	330:c80ac197fa6a	314	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
mbed_official	330:c80ac197fa6a	315	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
mbed_official	330:c80ac197fa6a	316	static void ADC_DMAError(DMA_HandleTypeDef *hdma);
mbed_official	330:c80ac197fa6a	317
mbed_official	330:c80ac197fa6a	318	/* Exported functions --------------------------------------------------------*/
mbed_official	330:c80ac197fa6a	319
mbed_official	330:c80ac197fa6a	320	/** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
mbed_official	330:c80ac197fa6a	321	* @{
mbed_official	330:c80ac197fa6a	322	*/
mbed_official	330:c80ac197fa6a	323
mbed_official	330:c80ac197fa6a	324	/** @defgroup ADCEx_Exported_Functions_Group1 Extended Initialization and de-initialization functions
mbed_official	330:c80ac197fa6a	325	* @brief Extended Initialization and Configuration functions
mbed_official	330:c80ac197fa6a	326	*
mbed_official	330:c80ac197fa6a	327	@verbatim
mbed_official	330:c80ac197fa6a	328	===============================================================================
mbed_official	330:c80ac197fa6a	329	##### Initialization and de-initialization functions #####
mbed_official	330:c80ac197fa6a	330	===============================================================================
mbed_official	330:c80ac197fa6a	331	[..] This section provides functions allowing to:
mbed_official	330:c80ac197fa6a	332	(+) Initialize and configure the ADC.
mbed_official	330:c80ac197fa6a	333	(+) De-initialize the ADC.
mbed_official	330:c80ac197fa6a	334
mbed_official	330:c80ac197fa6a	335	@endverbatim
mbed_official	330:c80ac197fa6a	336	* @{
mbed_official	330:c80ac197fa6a	337	*/
mbed_official	330:c80ac197fa6a	338
mbed_official	330:c80ac197fa6a	339	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	340	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	341	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	342	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	343	/**
mbed_official	330:c80ac197fa6a	344	* @brief Initializes the ADC peripheral and regular group according to
mbed_official	330:c80ac197fa6a	345	* parameters specified in structure "ADC_InitTypeDef".
mbed_official	330:c80ac197fa6a	346	* @note As prerequisite, ADC clock must be configured at RCC top level
mbed_official	330:c80ac197fa6a	347	* depending on both possible clock sources: AHB clock or PLL clock.
mbed_official	330:c80ac197fa6a	348	* See commented example code below that can be copied and uncommented
mbed_official	330:c80ac197fa6a	349	* into HAL_ADC_MspInit().
mbed_official	330:c80ac197fa6a	350	* @note Possibility to update parameters on the fly:
mbed_official	330:c80ac197fa6a	351	* This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
mbed_official	330:c80ac197fa6a	352	* coming from ADC state reset. Following calls to this function can
mbed_official	330:c80ac197fa6a	353	* be used to reconfigure some parameters of ADC_InitTypeDef
mbed_official	330:c80ac197fa6a	354	* structure on the fly, without modifying MSP configuration. If ADC
mbed_official	330:c80ac197fa6a	355	* MSP has to be modified again, HAL_ADC_DeInit() must be called
mbed_official	330:c80ac197fa6a	356	* before HAL_ADC_Init().
mbed_official	330:c80ac197fa6a	357	* The setting of these parameters is conditioned to ADC state.
mbed_official	330:c80ac197fa6a	358	* For parameters constraints, see comments of structure
mbed_official	330:c80ac197fa6a	359	* "ADC_InitTypeDef".
mbed_official	330:c80ac197fa6a	360	* @note This function configures the ADC within 2 scopes: scope of entire
mbed_official	330:c80ac197fa6a	361	* ADC and scope of regular group. For parameters details, see comments
mbed_official	330:c80ac197fa6a	362	* of structure "ADC_InitTypeDef".
mbed_official	330:c80ac197fa6a	363	* @note For devices with several ADCs: parameters related to common ADC
mbed_official	330:c80ac197fa6a	364	* registers (ADC clock mode) are set only if all ADCs sharing the
mbed_official	330:c80ac197fa6a	365	* same common group are disabled.
mbed_official	330:c80ac197fa6a	366	* If this is not the case, these common parameters setting are
mbed_official	330:c80ac197fa6a	367	* bypassed without error reporting: it can be the intended behaviour in
mbed_official	330:c80ac197fa6a	368	* case of update of a parameter of ADC_InitTypeDef on the fly,
mbed_official	330:c80ac197fa6a	369	* without disabling the other ADCs sharing the same common group.
mbed_official	330:c80ac197fa6a	370	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	371	* @retval HAL status
mbed_official	330:c80ac197fa6a	372	*/
mbed_official	330:c80ac197fa6a	373	HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	374	{
mbed_official	330:c80ac197fa6a	375	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	376	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	330:c80ac197fa6a	377	ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
mbed_official	330:c80ac197fa6a	378	uint32_t tmpCFGR = 0;
mbed_official	330:c80ac197fa6a	379	uint32_t WaitLoopIndex = 0;
mbed_official	330:c80ac197fa6a	380
mbed_official	330:c80ac197fa6a	381	/* Check ADC handle */
mbed_official	634:ac7d6880524d	382	if(hadc == HAL_NULL)
mbed_official	330:c80ac197fa6a	383	{
mbed_official	330:c80ac197fa6a	384	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	385	}
mbed_official	330:c80ac197fa6a	386
mbed_official	330:c80ac197fa6a	387	/* Check the parameters */
mbed_official	330:c80ac197fa6a	388	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	389	assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
mbed_official	330:c80ac197fa6a	390	assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
mbed_official	330:c80ac197fa6a	391	assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
mbed_official	330:c80ac197fa6a	392	assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
mbed_official	330:c80ac197fa6a	393	assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
mbed_official	330:c80ac197fa6a	394	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official	330:c80ac197fa6a	395	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
mbed_official	330:c80ac197fa6a	396	assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion));
mbed_official	330:c80ac197fa6a	397	assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
mbed_official	330:c80ac197fa6a	398	assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
mbed_official	330:c80ac197fa6a	399	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
mbed_official	330:c80ac197fa6a	400	assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
mbed_official	330:c80ac197fa6a	401	assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
mbed_official	330:c80ac197fa6a	402	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
mbed_official	330:c80ac197fa6a	403
mbed_official	330:c80ac197fa6a	404
mbed_official	330:c80ac197fa6a	405	/* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
mbed_official	330:c80ac197fa6a	406	/* at RCC top level depending on both possible clock sources: */
mbed_official	330:c80ac197fa6a	407	/* PLL clock or AHB clock. */
mbed_official	330:c80ac197fa6a	408	/* For example: */
mbed_official	330:c80ac197fa6a	409	/* if((hadc->Instance == ADC1) \|\| (hadc->Instance == ADC2)) */
mbed_official	330:c80ac197fa6a	410	/* { */
mbed_official	330:c80ac197fa6a	411	/* __ADC12_CLK_ENABLE(); */
mbed_official	330:c80ac197fa6a	412	/* __HAL_RCC_ADC12_CONFIG(RCC_ADC12PLLCLK_DIV1); */
mbed_official	330:c80ac197fa6a	413	/* } */
mbed_official	330:c80ac197fa6a	414	/* else */
mbed_official	330:c80ac197fa6a	415	/* { */
mbed_official	330:c80ac197fa6a	416	/* __ADC34_CLK_ENABLE(); */
mbed_official	330:c80ac197fa6a	417	/* __HAL_RCC_ADC34_CONFIG(RCC_ADC34PLLCLK_DIV1); */
mbed_official	330:c80ac197fa6a	418	/* } */
mbed_official	330:c80ac197fa6a	419
mbed_official	330:c80ac197fa6a	420
mbed_official	330:c80ac197fa6a	421	/* Actions performed only if ADC is coming from state reset: */
mbed_official	330:c80ac197fa6a	422	/* - Initialization of ADC MSP */
mbed_official	330:c80ac197fa6a	423	/* - ADC voltage regulator enable */
mbed_official	330:c80ac197fa6a	424	if (hadc->State == HAL_ADC_STATE_RESET)
mbed_official	330:c80ac197fa6a	425	{
mbed_official	330:c80ac197fa6a	426	/* Init the low level hardware */
mbed_official	330:c80ac197fa6a	427	HAL_ADC_MspInit(hadc);
mbed_official	330:c80ac197fa6a	428
mbed_official	330:c80ac197fa6a	429	/* Enable voltage regulator (if disabled at this step) */
mbed_official	330:c80ac197fa6a	430	if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN_0))
mbed_official	330:c80ac197fa6a	431	{
mbed_official	330:c80ac197fa6a	432	/* Note: The software must wait for the startup time of the ADC voltage */
mbed_official	330:c80ac197fa6a	433	/* regulator before launching a calibration or enabling the ADC. */
mbed_official	330:c80ac197fa6a	434	/* This temporization must be implemented by software and is */
mbed_official	330:c80ac197fa6a	435	/* equal to 10 us in the worst case process/temperature/power */
mbed_official	330:c80ac197fa6a	436	/* supply. */
mbed_official	330:c80ac197fa6a	437
mbed_official	330:c80ac197fa6a	438	/* Disable the ADC (if not already disabled) */
mbed_official	330:c80ac197fa6a	439	tmpHALStatus = ADC_Disable(hadc);
mbed_official	330:c80ac197fa6a	440
mbed_official	330:c80ac197fa6a	441	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	442	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	443	{
mbed_official	330:c80ac197fa6a	444	/* Initialize the ADC state */
mbed_official	330:c80ac197fa6a	445	hadc->State = HAL_ADC_STATE_BUSY;
mbed_official	330:c80ac197fa6a	446
mbed_official	330:c80ac197fa6a	447	/* Set the intermediate state before moving the ADC voltage regulator */
mbed_official	330:c80ac197fa6a	448	/* to state enable. */
mbed_official	330:c80ac197fa6a	449	hadc->Instance->CR &= ~(ADC_CR_ADVREGEN);
mbed_official	330:c80ac197fa6a	450	/* Set ADVREGEN bits to 0x01 */
mbed_official	330:c80ac197fa6a	451	hadc->Instance->CR \|= ADC_CR_ADVREGEN_0;
mbed_official	330:c80ac197fa6a	452
mbed_official	330:c80ac197fa6a	453	/* Delay for ADC stabilization time. */
mbed_official	330:c80ac197fa6a	454	/* Delay fixed to worst case: maximum CPU frequency */
mbed_official	330:c80ac197fa6a	455	while(WaitLoopIndex < ADC_STAB_DELAY_CPU_CYCLES)
mbed_official	330:c80ac197fa6a	456	{
mbed_official	330:c80ac197fa6a	457	WaitLoopIndex++;
mbed_official	330:c80ac197fa6a	458	}
mbed_official	330:c80ac197fa6a	459	}
mbed_official	330:c80ac197fa6a	460	}
mbed_official	330:c80ac197fa6a	461	}
mbed_official	330:c80ac197fa6a	462
mbed_official	330:c80ac197fa6a	463	/* Verification that ADC voltage regulator is correctly enabled, whatever */
mbed_official	330:c80ac197fa6a	464	/* ADC coming from state reset or not (if any potential problem of */
mbed_official	330:c80ac197fa6a	465	/* clocking, voltage regulator would not be enabled). */
mbed_official	330:c80ac197fa6a	466	if ((hadc->Instance->CR & ADC_CR_ADVREGEN) != ADC_CR_ADVREGEN_0)
mbed_official	330:c80ac197fa6a	467	{
mbed_official	330:c80ac197fa6a	468	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	469	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	470
mbed_official	330:c80ac197fa6a	471	/* Set ADC error code to ADC IP internal error */
mbed_official	330:c80ac197fa6a	472	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	330:c80ac197fa6a	473
mbed_official	330:c80ac197fa6a	474	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	475	}
mbed_official	330:c80ac197fa6a	476
mbed_official	330:c80ac197fa6a	477
mbed_official	330:c80ac197fa6a	478	/* Configuration of ADC parameters if previous preliminary actions are */
mbed_official	330:c80ac197fa6a	479	/* correctly completed. */
mbed_official	330:c80ac197fa6a	480	/* and if there is no conversion on going on regular group (ADC can be */
mbed_official	330:c80ac197fa6a	481	/* enabled anyway, in case of call of this function to update a parameter */
mbed_official	330:c80ac197fa6a	482	/* on the fly). */
mbed_official	330:c80ac197fa6a	483	if ((hadc->State != HAL_ADC_STATE_ERROR) &&
mbed_official	330:c80ac197fa6a	484	(__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) )
mbed_official	330:c80ac197fa6a	485	{
mbed_official	330:c80ac197fa6a	486	/* Initialize the ADC state */
mbed_official	330:c80ac197fa6a	487	hadc->State = HAL_ADC_STATE_BUSY;
mbed_official	330:c80ac197fa6a	488
mbed_official	330:c80ac197fa6a	489	/* Configuration of common ADC parameters */
mbed_official	330:c80ac197fa6a	490
mbed_official	330:c80ac197fa6a	491	/* Pointer to the common control register to which is belonging hadc */
mbed_official	330:c80ac197fa6a	492	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	330:c80ac197fa6a	493	/* control registers) */
mbed_official	330:c80ac197fa6a	494	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	330:c80ac197fa6a	495
mbed_official	330:c80ac197fa6a	496	/* Set handle of the other ADC sharing the same common register */
mbed_official	330:c80ac197fa6a	497	__HAL_ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
mbed_official	330:c80ac197fa6a	498
mbed_official	330:c80ac197fa6a	499
mbed_official	330:c80ac197fa6a	500	/* Parameters update conditioned to ADC state: */
mbed_official	330:c80ac197fa6a	501	/* Parameters that can be updated only when ADC is disabled: */
mbed_official	330:c80ac197fa6a	502	/* - Multimode clock configuration */
mbed_official	330:c80ac197fa6a	503	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	634:ac7d6880524d	504	( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) \|\|
mbed_official	330:c80ac197fa6a	505	(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
mbed_official	330:c80ac197fa6a	506	{
mbed_official	330:c80ac197fa6a	507	/* Reset configuration of ADC common register CCR: */
mbed_official	330:c80ac197fa6a	508	/* - ADC clock mode: CKMODE */
mbed_official	330:c80ac197fa6a	509	/* Some parameters of this register are not reset, since they are set */
mbed_official	330:c80ac197fa6a	510	/* by other functions and must be kept in case of usage of this */
mbed_official	330:c80ac197fa6a	511	/* function on the fly (update of a parameter of ADC_InitTypeDef */
mbed_official	330:c80ac197fa6a	512	/* without needing to reconfigure all other ADC groups/channels */
mbed_official	330:c80ac197fa6a	513	/* parameters): */
mbed_official	330:c80ac197fa6a	514	/* - multimode related parameters: MDMA, DMACFG, DELAY, MULTI (set */
mbed_official	330:c80ac197fa6a	515	/* into HAL_ADCEx_MultiModeConfigChannel() ) */
mbed_official	330:c80ac197fa6a	516	/* - internal measurement paths: Vbat, temperature sensor, Vref */
mbed_official	330:c80ac197fa6a	517	/* (set into HAL_ADC_ConfigChannel() or */
mbed_official	330:c80ac197fa6a	518	/* HAL_ADCEx_InjectedConfigChannel() ) */
mbed_official	330:c80ac197fa6a	519	tmpADC_Common->CCR &= ~(ADC_CCR_CKMODE);
mbed_official	330:c80ac197fa6a	520
mbed_official	330:c80ac197fa6a	521	/* Configuration of common ADC clock: clock source PLL or AHB with */
mbed_official	330:c80ac197fa6a	522	/* selectable prescaler */
mbed_official	330:c80ac197fa6a	523	tmpADC_Common->CCR \|= hadc->Init.ClockPrescaler;
mbed_official	330:c80ac197fa6a	524	}
mbed_official	330:c80ac197fa6a	525
mbed_official	330:c80ac197fa6a	526	/* Configuration of ADC: */
mbed_official	330:c80ac197fa6a	527	/* - resolution */
mbed_official	330:c80ac197fa6a	528	/* - data alignment */
mbed_official	330:c80ac197fa6a	529	/* - external trigger to start conversion */
mbed_official	330:c80ac197fa6a	530	/* - external trigger polarity */
mbed_official	330:c80ac197fa6a	531	/* - continuous conversion mode */
mbed_official	330:c80ac197fa6a	532	/* - overrun */
mbed_official	330:c80ac197fa6a	533	/* - discontinuous mode */
mbed_official	330:c80ac197fa6a	534	hadc->Instance->CFGR &= ~( ADC_CFGR_DISCNUM \|
mbed_official	330:c80ac197fa6a	535	ADC_CFGR_DISCEN \|
mbed_official	330:c80ac197fa6a	536	ADC_CFGR_CONT \|
mbed_official	330:c80ac197fa6a	537	ADC_CFGR_OVRMOD \|
mbed_official	330:c80ac197fa6a	538	ADC_CFGR_EXTSEL \|
mbed_official	330:c80ac197fa6a	539	ADC_CFGR_EXTEN \|
mbed_official	330:c80ac197fa6a	540	ADC_CFGR_ALIGN \|
mbed_official	330:c80ac197fa6a	541	ADC_CFGR_RES );
mbed_official	330:c80ac197fa6a	542
mbed_official	330:c80ac197fa6a	543	tmpCFGR \|= ( __HAL_ADC_CFGR_CONTINUOUS(hadc->Init.ContinuousConvMode) \|
mbed_official	330:c80ac197fa6a	544	__HAL_ADC_CFGR_OVERRUN(hadc->Init.Overrun) \|
mbed_official	330:c80ac197fa6a	545	hadc->Init.DataAlign \|
mbed_official	330:c80ac197fa6a	546	hadc->Init.Resolution );
mbed_official	330:c80ac197fa6a	547
mbed_official	330:c80ac197fa6a	548	/* Enable discontinuous mode only if continuous mode is disabled */
mbed_official	330:c80ac197fa6a	549	if ((hadc->Init.DiscontinuousConvMode == ENABLE) &&
mbed_official	330:c80ac197fa6a	550	(hadc->Init.ContinuousConvMode == DISABLE) )
mbed_official	330:c80ac197fa6a	551	{
mbed_official	330:c80ac197fa6a	552	/* Enable the selected ADC regular discontinuous mode */
mbed_official	330:c80ac197fa6a	553	/* Set the number of channels to be converted in discontinuous mode */
mbed_official	330:c80ac197fa6a	554	tmpCFGR \|= ( ADC_CFGR_DISCEN \|
mbed_official	330:c80ac197fa6a	555	__HAL_ADC_CFGR_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion) );
mbed_official	330:c80ac197fa6a	556	}
mbed_official	330:c80ac197fa6a	557
mbed_official	330:c80ac197fa6a	558	/* Enable external trigger if trigger selection is different of software */
mbed_official	330:c80ac197fa6a	559	/* start. */
mbed_official	330:c80ac197fa6a	560	/* Note: This configuration keeps the hardware feature of parameter */
mbed_official	330:c80ac197fa6a	561	/* ExternalTrigConvEdge "trigger edge none" equivalent to */
mbed_official	330:c80ac197fa6a	562	/* software start. */
mbed_official	330:c80ac197fa6a	563	if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
mbed_official	330:c80ac197fa6a	564	{
mbed_official	330:c80ac197fa6a	565	tmpCFGR \|= ( __HAL_ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) \|
mbed_official	330:c80ac197fa6a	566	hadc->Init.ExternalTrigConvEdge );
mbed_official	330:c80ac197fa6a	567	}
mbed_official	330:c80ac197fa6a	568
mbed_official	330:c80ac197fa6a	569	/* Parameters update conditioned to ADC state: */
mbed_official	330:c80ac197fa6a	570	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	330:c80ac197fa6a	571	/* conversion on going on regular and injected groups: */
mbed_official	330:c80ac197fa6a	572	/* - DMA continuous request */
mbed_official	330:c80ac197fa6a	573	/* - LowPowerAutoWait feature */
mbed_official	330:c80ac197fa6a	574	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
mbed_official	330:c80ac197fa6a	575	{
mbed_official	330:c80ac197fa6a	576	hadc->Instance->CFGR &= ~( ADC_CFGR_AUTDLY \|
mbed_official	330:c80ac197fa6a	577	ADC_CFGR_DMACFG );
mbed_official	330:c80ac197fa6a	578
mbed_official	330:c80ac197fa6a	579	tmpCFGR \|= ( __HAL_ADC_CFGR_AUTOWAIT(hadc->Init.LowPowerAutoWait) \|
mbed_official	330:c80ac197fa6a	580	__HAL_ADC_CFGR_DMACONTREQ(hadc->Init.DMAContinuousRequests) );
mbed_official	330:c80ac197fa6a	581	}
mbed_official	330:c80ac197fa6a	582
mbed_official	330:c80ac197fa6a	583	/* Update ADC configuration register with previous settings */
mbed_official	330:c80ac197fa6a	584	hadc->Instance->CFGR \|= tmpCFGR;
mbed_official	330:c80ac197fa6a	585
mbed_official	330:c80ac197fa6a	586
mbed_official	330:c80ac197fa6a	587	/* Configuration of regular group sequencer: */
mbed_official	330:c80ac197fa6a	588	/* - if scan mode is disabled, regular channels sequence length is set to */
mbed_official	330:c80ac197fa6a	589	/* 0x00: 1 channel converted (channel on regular rank 1) */
mbed_official	330:c80ac197fa6a	590	/* Parameter "NbrOfConversion" is discarded. */
mbed_official	330:c80ac197fa6a	591	/* Note: Scan mode is not present by hardware on this device, but */
mbed_official	330:c80ac197fa6a	592	/* emulated by software for alignment over all STM32 devices. */
mbed_official	330:c80ac197fa6a	593	/* - if scan mode is enabled, regular channels sequence length is set to */
mbed_official	330:c80ac197fa6a	594	/* parameter "NbrOfConversion" */
mbed_official	330:c80ac197fa6a	595	hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
mbed_official	330:c80ac197fa6a	596	if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE)
mbed_official	330:c80ac197fa6a	597	{
mbed_official	330:c80ac197fa6a	598	/* Set number of ranks in regular group sequencer */
mbed_official	330:c80ac197fa6a	599	hadc->Instance->SQR1 \|= (hadc->Init.NbrOfConversion - (uint8_t)1);
mbed_official	330:c80ac197fa6a	600	}
mbed_official	330:c80ac197fa6a	601
mbed_official	330:c80ac197fa6a	602	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	603	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	604
mbed_official	330:c80ac197fa6a	605	/* Initialize the ADC state */
mbed_official	330:c80ac197fa6a	606	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	607
mbed_official	330:c80ac197fa6a	608	}
mbed_official	330:c80ac197fa6a	609	else
mbed_official	330:c80ac197fa6a	610	{
mbed_official	330:c80ac197fa6a	611	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	612	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	613
mbed_official	330:c80ac197fa6a	614	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	615	}
mbed_official	330:c80ac197fa6a	616
mbed_official	330:c80ac197fa6a	617
mbed_official	330:c80ac197fa6a	618	/* Return function status */
mbed_official	330:c80ac197fa6a	619	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	620	}
mbed_official	330:c80ac197fa6a	621	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	622	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	623	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	624	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	625
mbed_official	330:c80ac197fa6a	626	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	627	/**
mbed_official	330:c80ac197fa6a	628	* @brief Initializes the ADC peripheral and regular group according to
mbed_official	330:c80ac197fa6a	629	* parameters specified in structure "ADC_InitTypeDef".
mbed_official	330:c80ac197fa6a	630	* @note As prerequisite, ADC clock must be configured at RCC top level
mbed_official	330:c80ac197fa6a	631	* (clock source APB2).
mbed_official	330:c80ac197fa6a	632	* See commented example code below that can be copied and uncommented
mbed_official	330:c80ac197fa6a	633	* into HAL_ADC_MspInit().
mbed_official	330:c80ac197fa6a	634	* @note Possibility to update parameters on the fly:
mbed_official	330:c80ac197fa6a	635	* This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
mbed_official	330:c80ac197fa6a	636	* coming from ADC state reset. Following calls to this function can
mbed_official	330:c80ac197fa6a	637	* be used to reconfigure some parameters of ADC_InitTypeDef
mbed_official	330:c80ac197fa6a	638	* structure on the fly, without modifying MSP configuration. If ADC
mbed_official	330:c80ac197fa6a	639	* MSP has to be modified again, HAL_ADC_DeInit() must be called
mbed_official	330:c80ac197fa6a	640	* before HAL_ADC_Init().
mbed_official	330:c80ac197fa6a	641	* The setting of these parameters is conditioned to ADC state.
mbed_official	330:c80ac197fa6a	642	* For parameters constraints, see comments of structure
mbed_official	330:c80ac197fa6a	643	* "ADC_InitTypeDef".
mbed_official	330:c80ac197fa6a	644	* @note This function configures the ADC within 2 scopes: scope of entire
mbed_official	330:c80ac197fa6a	645	* ADC and scope of regular group. For parameters details, see comments
mbed_official	330:c80ac197fa6a	646	* of structure "ADC_InitTypeDef".
mbed_official	330:c80ac197fa6a	647	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	648	* @retval HAL status
mbed_official	330:c80ac197fa6a	649	*/
mbed_official	330:c80ac197fa6a	650	HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	651	{
mbed_official	330:c80ac197fa6a	652	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	653
mbed_official	330:c80ac197fa6a	654	/* Check ADC handle */
mbed_official	634:ac7d6880524d	655	if(hadc == HAL_NULL)
mbed_official	330:c80ac197fa6a	656	{
mbed_official	330:c80ac197fa6a	657	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	658	}
mbed_official	330:c80ac197fa6a	659
mbed_official	330:c80ac197fa6a	660	/* Check the parameters */
mbed_official	330:c80ac197fa6a	661	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	662	assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
mbed_official	330:c80ac197fa6a	663	assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
mbed_official	330:c80ac197fa6a	664	assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
mbed_official	330:c80ac197fa6a	665	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official	330:c80ac197fa6a	666	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
mbed_official	330:c80ac197fa6a	667	assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion));
mbed_official	330:c80ac197fa6a	668	assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
mbed_official	330:c80ac197fa6a	669
mbed_official	330:c80ac197fa6a	670	/* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
mbed_official	330:c80ac197fa6a	671	/* at RCC top level. */
mbed_official	330:c80ac197fa6a	672	/* For example: */
mbed_official	330:c80ac197fa6a	673	/* __ADC1_CLK_ENABLE(); */
mbed_official	330:c80ac197fa6a	674
mbed_official	330:c80ac197fa6a	675
mbed_official	330:c80ac197fa6a	676	/* Actions performed only if ADC is coming from state reset: */
mbed_official	330:c80ac197fa6a	677	/* - Initialization of ADC MSP */
mbed_official	330:c80ac197fa6a	678	if (hadc->State == HAL_ADC_STATE_RESET)
mbed_official	330:c80ac197fa6a	679	{
mbed_official	330:c80ac197fa6a	680	/* Init the low level hardware */
mbed_official	330:c80ac197fa6a	681	HAL_ADC_MspInit(hadc);
mbed_official	330:c80ac197fa6a	682	}
mbed_official	330:c80ac197fa6a	683
mbed_official	330:c80ac197fa6a	684	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	685	/* Disable ADC peripheral */
mbed_official	330:c80ac197fa6a	686	/* Note: In case of ADC already enabled, precaution to not launch an */
mbed_official	330:c80ac197fa6a	687	/* unwanted conversion while modifying register CR2 by writing 1 to */
mbed_official	330:c80ac197fa6a	688	/* bit ADON. */
mbed_official	330:c80ac197fa6a	689	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	330:c80ac197fa6a	690
mbed_official	330:c80ac197fa6a	691
mbed_official	330:c80ac197fa6a	692	/* Configuration of ADC parameters if previous preliminary actions are */
mbed_official	330:c80ac197fa6a	693	/* correctly completed. */
mbed_official	330:c80ac197fa6a	694	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	695	{
mbed_official	330:c80ac197fa6a	696	/* Initialize the ADC state */
mbed_official	330:c80ac197fa6a	697	hadc->State = HAL_ADC_STATE_BUSY;
mbed_official	330:c80ac197fa6a	698
mbed_official	330:c80ac197fa6a	699	/* Set ADC parameters */
mbed_official	330:c80ac197fa6a	700
mbed_official	330:c80ac197fa6a	701	/* Configuration of ADC: */
mbed_official	330:c80ac197fa6a	702	/* - data alignment */
mbed_official	330:c80ac197fa6a	703	/* - external trigger to start conversion */
mbed_official	330:c80ac197fa6a	704	/* - external trigger polarity (always set to 1, because needed for all */
mbed_official	330:c80ac197fa6a	705	/* triggers: external trigger of SW start) */
mbed_official	330:c80ac197fa6a	706	/* - continuous conversion mode */
mbed_official	330:c80ac197fa6a	707	hadc->Instance->CR2 &= ~( ADC_CR2_ALIGN \|
mbed_official	330:c80ac197fa6a	708	ADC_CR2_EXTSEL \|
mbed_official	330:c80ac197fa6a	709	ADC_CR2_EXTTRIG \|
mbed_official	330:c80ac197fa6a	710	ADC_CR2_CONT );
mbed_official	330:c80ac197fa6a	711
mbed_official	330:c80ac197fa6a	712	hadc->Instance->CR2 \|= ( hadc->Init.DataAlign \|
mbed_official	330:c80ac197fa6a	713	hadc->Init.ExternalTrigConv \|
mbed_official	330:c80ac197fa6a	714	ADC_CR2_EXTTRIG \|
mbed_official	330:c80ac197fa6a	715	__HAL_ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode) );
mbed_official	330:c80ac197fa6a	716
mbed_official	330:c80ac197fa6a	717	/* Configuration of ADC: */
mbed_official	330:c80ac197fa6a	718	/* - scan mode */
mbed_official	330:c80ac197fa6a	719	/* - discontinuous mode disable/enable */
mbed_official	330:c80ac197fa6a	720	/* - discontinuous mode number of conversions */
mbed_official	330:c80ac197fa6a	721	hadc->Instance->CR1 &= ~( ADC_CR1_SCAN \|
mbed_official	330:c80ac197fa6a	722	ADC_CR1_DISCEN \|
mbed_official	330:c80ac197fa6a	723	ADC_CR1_DISCNUM );
mbed_official	330:c80ac197fa6a	724
mbed_official	330:c80ac197fa6a	725	hadc->Instance->CR1 \|= ( __HAL_ADC_CR1_SCAN(hadc->Init.ScanConvMode) );
mbed_official	330:c80ac197fa6a	726
mbed_official	330:c80ac197fa6a	727	/* Enable discontinuous mode only if continuous mode is disabled */
mbed_official	330:c80ac197fa6a	728	if ((hadc->Init.DiscontinuousConvMode == ENABLE) &&
mbed_official	330:c80ac197fa6a	729	(hadc->Init.ContinuousConvMode == DISABLE) )
mbed_official	330:c80ac197fa6a	730	{
mbed_official	330:c80ac197fa6a	731	/* Enable the selected ADC regular discontinuous mode */
mbed_official	330:c80ac197fa6a	732	hadc->Instance->CR1 \|= (ADC_CR1_DISCEN);
mbed_official	330:c80ac197fa6a	733
mbed_official	330:c80ac197fa6a	734	/* Set the number of channels to be converted in discontinuous mode */
mbed_official	330:c80ac197fa6a	735	hadc->Instance->CR1 \|= __HAL_ADC_CR1_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion);
mbed_official	330:c80ac197fa6a	736	}
mbed_official	330:c80ac197fa6a	737
mbed_official	330:c80ac197fa6a	738	/* Configuration of regular group sequencer: */
mbed_official	330:c80ac197fa6a	739	/* - if scan mode is disabled, regular channels sequence length is set to */
mbed_official	330:c80ac197fa6a	740	/* 0x00: 1 channel converted (channel on regular rank 1) */
mbed_official	330:c80ac197fa6a	741	/* Parameter "NbrOfConversion" is discarded. */
mbed_official	330:c80ac197fa6a	742	/* Note: Scan mode is present by hardware on this device and, if */
mbed_official	330:c80ac197fa6a	743	/* disabled, discards automatically nb of conversions. Anyway, nb of */
mbed_official	330:c80ac197fa6a	744	/* conversions is forced to 0x00 for alignment over all STM32 devices. */
mbed_official	330:c80ac197fa6a	745	/* - if scan mode is enabled, regular channels sequence length is set to */
mbed_official	330:c80ac197fa6a	746	/* parameter "NbrOfConversion" */
mbed_official	330:c80ac197fa6a	747	hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
mbed_official	330:c80ac197fa6a	748	if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE)
mbed_official	330:c80ac197fa6a	749	{
mbed_official	330:c80ac197fa6a	750	/* Set number of ranks in regular group sequencer */
mbed_official	330:c80ac197fa6a	751	hadc->Instance->SQR1 \|= __HAL_ADC_SQR1_L(hadc->Init.NbrOfConversion);
mbed_official	330:c80ac197fa6a	752	}
mbed_official	330:c80ac197fa6a	753
mbed_official	330:c80ac197fa6a	754	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	755	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	756
mbed_official	330:c80ac197fa6a	757	/* Initialize the ADC state */
mbed_official	330:c80ac197fa6a	758	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	759	}
mbed_official	330:c80ac197fa6a	760
mbed_official	330:c80ac197fa6a	761	/* Return function status */
mbed_official	330:c80ac197fa6a	762	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	763	}
mbed_official	330:c80ac197fa6a	764	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	765
mbed_official	330:c80ac197fa6a	766	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	767	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	768	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	769	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	770	/**
mbed_official	330:c80ac197fa6a	771	* @brief Deinitialize the ADC peripheral registers to their default reset
mbed_official	330:c80ac197fa6a	772	* values, with deinitialization of the ADC MSP.
mbed_official	330:c80ac197fa6a	773	* @note For devices with several ADCs: reset of ADC common registers is done
mbed_official	330:c80ac197fa6a	774	* only if all ADCs sharing the same common group are disabled.
mbed_official	330:c80ac197fa6a	775	* If this is not the case, reset of these common parameters reset is
mbed_official	330:c80ac197fa6a	776	* bypassed without error reporting: it can be the intended behaviour in
mbed_official	330:c80ac197fa6a	777	* case of reset of a single ADC while the other ADCs sharing the same
mbed_official	330:c80ac197fa6a	778	* common group is still running.
mbed_official	330:c80ac197fa6a	779	* @note For devices with several ADCs: Global reset of all ADCs sharing a
mbed_official	330:c80ac197fa6a	780	* common group is possible.
mbed_official	330:c80ac197fa6a	781	* As this function is intended to reset a single ADC, to not impact
mbed_official	330:c80ac197fa6a	782	* other ADCs, instructions for global reset of multiple ADCs have been
mbed_official	330:c80ac197fa6a	783	* let commented below.
mbed_official	330:c80ac197fa6a	784	* If needed, the example code can be copied and uncommented into
mbed_official	330:c80ac197fa6a	785	* function HAL_ADC_MspDeInit().
mbed_official	330:c80ac197fa6a	786	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	787	* @retval HAL status
mbed_official	330:c80ac197fa6a	788	*/
mbed_official	330:c80ac197fa6a	789	HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	790	{
mbed_official	330:c80ac197fa6a	791	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	792	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	330:c80ac197fa6a	793	ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
mbed_official	330:c80ac197fa6a	794
mbed_official	330:c80ac197fa6a	795	/* Check ADC handle */
mbed_official	634:ac7d6880524d	796	if(hadc == HAL_NULL)
mbed_official	330:c80ac197fa6a	797	{
mbed_official	330:c80ac197fa6a	798	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	799	}
mbed_official	330:c80ac197fa6a	800
mbed_official	330:c80ac197fa6a	801	/* Check the parameters */
mbed_official	330:c80ac197fa6a	802	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	803
mbed_official	330:c80ac197fa6a	804	/* Change ADC state */
mbed_official	330:c80ac197fa6a	805	hadc->State = HAL_ADC_STATE_BUSY;
mbed_official	330:c80ac197fa6a	806
mbed_official	330:c80ac197fa6a	807	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	808	tmpHALStatus = ADC_ConversionStop(hadc, REGULAR_INJECTED_GROUP);
mbed_official	330:c80ac197fa6a	809
mbed_official	330:c80ac197fa6a	810	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	330:c80ac197fa6a	811	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	812	{
mbed_official	330:c80ac197fa6a	813	/* Flush register JSQR: queue sequencer reset when injected queue */
mbed_official	330:c80ac197fa6a	814	/* sequencer is enabled and ADC disabled */
mbed_official	330:c80ac197fa6a	815	/* Enable injected queue sequencer after injected conversion stop */
mbed_official	330:c80ac197fa6a	816	hadc->Instance->CFGR \|= ADC_CFGR_JQM;
mbed_official	330:c80ac197fa6a	817
mbed_official	330:c80ac197fa6a	818	/* Disable the ADC peripheral */
mbed_official	330:c80ac197fa6a	819	tmpHALStatus = ADC_Disable(hadc);
mbed_official	330:c80ac197fa6a	820
mbed_official	330:c80ac197fa6a	821	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	822	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	823	{
mbed_official	330:c80ac197fa6a	824	/* Change ADC state */
mbed_official	330:c80ac197fa6a	825	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	826	}
mbed_official	330:c80ac197fa6a	827	else
mbed_official	330:c80ac197fa6a	828	{
mbed_official	330:c80ac197fa6a	829	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	830	}
mbed_official	330:c80ac197fa6a	831	}
mbed_official	330:c80ac197fa6a	832
mbed_official	330:c80ac197fa6a	833
mbed_official	330:c80ac197fa6a	834	/* Configuration of ADC parameters if previous preliminary actions are */
mbed_official	330:c80ac197fa6a	835	/* correctly completed. */
mbed_official	330:c80ac197fa6a	836	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	837	{
mbed_official	330:c80ac197fa6a	838
mbed_official	330:c80ac197fa6a	839	/* ========== Reset ADC registers ========== */
mbed_official	330:c80ac197fa6a	840	/* Reset register IER */
mbed_official	330:c80ac197fa6a	841	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD3 \| ADC_IT_AWD2 \| ADC_IT_AWD1 \|
mbed_official	330:c80ac197fa6a	842	ADC_IT_JQOVF \| ADC_IT_OVR \|
mbed_official	330:c80ac197fa6a	843	ADC_IT_JEOS \| ADC_IT_JEOC \|
mbed_official	330:c80ac197fa6a	844	ADC_IT_EOS \| ADC_IT_EOC \|
mbed_official	330:c80ac197fa6a	845	ADC_IT_EOSMP \| ADC_IT_RDY ) );
mbed_official	330:c80ac197fa6a	846
mbed_official	330:c80ac197fa6a	847	/* Reset register ISR */
mbed_official	330:c80ac197fa6a	848	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD3 \| ADC_FLAG_AWD2 \| ADC_FLAG_AWD1 \|
mbed_official	330:c80ac197fa6a	849	ADC_FLAG_JQOVF \| ADC_FLAG_OVR \|
mbed_official	330:c80ac197fa6a	850	ADC_FLAG_JEOS \| ADC_FLAG_JEOC \|
mbed_official	330:c80ac197fa6a	851	ADC_FLAG_EOS \| ADC_FLAG_EOC \|
mbed_official	330:c80ac197fa6a	852	ADC_FLAG_EOSMP \| ADC_FLAG_RDY ) );
mbed_official	330:c80ac197fa6a	853
mbed_official	330:c80ac197fa6a	854	/* Reset register CR */
mbed_official	330:c80ac197fa6a	855	/* Bits ADC_CR_JADSTP, ADC_CR_ADSTP, ADC_CR_JADSTART, ADC_CR_ADSTART are */
mbed_official	330:c80ac197fa6a	856	/* in access mode "read-set": no direct reset applicable. */
mbed_official	330:c80ac197fa6a	857	/* Reset Calibration mode to default setting (single ended): */
mbed_official	330:c80ac197fa6a	858	/* Disable voltage regulator: */
mbed_official	330:c80ac197fa6a	859	/* Note: Voltage regulator disable is conditioned to ADC state disabled: */
mbed_official	330:c80ac197fa6a	860	/* already done above. */
mbed_official	330:c80ac197fa6a	861	/* Note: Voltage regulator disable is intended for power saving. */
mbed_official	330:c80ac197fa6a	862	/* Sequence to disable voltage regulator: */
mbed_official	330:c80ac197fa6a	863	/* 1. Set the intermediate state before moving the ADC voltage regulator */
mbed_official	330:c80ac197fa6a	864	/* to disable state. */
mbed_official	330:c80ac197fa6a	865	hadc->Instance->CR &= ~(ADC_CR_ADVREGEN \| ADC_CR_ADCALDIF);
mbed_official	330:c80ac197fa6a	866	/* 2. Set ADVREGEN bits to 0x10 */
mbed_official	330:c80ac197fa6a	867	hadc->Instance->CR \|= ADC_CR_ADVREGEN_1;
mbed_official	330:c80ac197fa6a	868
mbed_official	330:c80ac197fa6a	869	/* Reset register CFGR */
mbed_official	330:c80ac197fa6a	870	hadc->Instance->CFGR &= ~(ADC_CFGR_AWD1CH \| ADC_CFGR_JAUTO \| ADC_CFGR_JAWD1EN \|
mbed_official	330:c80ac197fa6a	871	ADC_CFGR_AWD1EN \| ADC_CFGR_AWD1SGL \| ADC_CFGR_JQM \|
mbed_official	330:c80ac197fa6a	872	ADC_CFGR_JDISCEN \| ADC_CFGR_DISCNUM \| ADC_CFGR_DISCEN \|
mbed_official	330:c80ac197fa6a	873	ADC_CFGR_AUTDLY \| ADC_CFGR_CONT \| ADC_CFGR_OVRMOD \|
mbed_official	330:c80ac197fa6a	874	ADC_CFGR_EXTEN \| ADC_CFGR_EXTSEL \| ADC_CFGR_ALIGN \|
mbed_official	330:c80ac197fa6a	875	ADC_CFGR_RES \| ADC_CFGR_DMACFG \| ADC_CFGR_DMAEN );
mbed_official	330:c80ac197fa6a	876
mbed_official	330:c80ac197fa6a	877	/* Reset register SMPR1 */
mbed_official	330:c80ac197fa6a	878	hadc->Instance->SMPR1 &= ~(ADC_SMPR1_SMP9 \| ADC_SMPR1_SMP8 \| ADC_SMPR1_SMP7 \|
mbed_official	330:c80ac197fa6a	879	ADC_SMPR1_SMP6 \| ADC_SMPR1_SMP5 \| ADC_SMPR1_SMP4 \|
mbed_official	330:c80ac197fa6a	880	ADC_SMPR1_SMP3 \| ADC_SMPR1_SMP2 \| ADC_SMPR1_SMP1 );
mbed_official	330:c80ac197fa6a	881
mbed_official	330:c80ac197fa6a	882	/* Reset register SMPR2 */
mbed_official	330:c80ac197fa6a	883	hadc->Instance->SMPR2 &= ~(ADC_SMPR2_SMP18 \| ADC_SMPR2_SMP17 \| ADC_SMPR2_SMP16 \|
mbed_official	330:c80ac197fa6a	884	ADC_SMPR2_SMP15 \| ADC_SMPR2_SMP14 \| ADC_SMPR2_SMP13 \|
mbed_official	330:c80ac197fa6a	885	ADC_SMPR2_SMP12 \| ADC_SMPR2_SMP11 \| ADC_SMPR2_SMP10 );
mbed_official	330:c80ac197fa6a	886
mbed_official	330:c80ac197fa6a	887	/* Reset register TR1 */
mbed_official	330:c80ac197fa6a	888	hadc->Instance->TR1 &= ~(ADC_TR1_HT1 \| ADC_TR1_LT1);
mbed_official	330:c80ac197fa6a	889
mbed_official	330:c80ac197fa6a	890	/* Reset register TR2 */
mbed_official	330:c80ac197fa6a	891	hadc->Instance->TR2 &= ~(ADC_TR2_HT2 \| ADC_TR2_LT2);
mbed_official	330:c80ac197fa6a	892
mbed_official	330:c80ac197fa6a	893	/* Reset register TR3 */
mbed_official	330:c80ac197fa6a	894	hadc->Instance->TR3 &= ~(ADC_TR3_HT3 \| ADC_TR3_LT3);
mbed_official	330:c80ac197fa6a	895
mbed_official	330:c80ac197fa6a	896	/* Reset register SQR1 */
mbed_official	330:c80ac197fa6a	897	hadc->Instance->SQR1 &= ~(ADC_SQR1_SQ4 \| ADC_SQR1_SQ3 \| ADC_SQR1_SQ2 \|
mbed_official	330:c80ac197fa6a	898	ADC_SQR1_SQ1 \| ADC_SQR1_L);
mbed_official	330:c80ac197fa6a	899
mbed_official	330:c80ac197fa6a	900	/* Reset register SQR2 */
mbed_official	330:c80ac197fa6a	901	hadc->Instance->SQR2 &= ~(ADC_SQR2_SQ9 \| ADC_SQR2_SQ8 \| ADC_SQR2_SQ7 \|
mbed_official	330:c80ac197fa6a	902	ADC_SQR2_SQ6 \| ADC_SQR2_SQ5);
mbed_official	330:c80ac197fa6a	903
mbed_official	330:c80ac197fa6a	904	/* Reset register SQR3 */
mbed_official	330:c80ac197fa6a	905	hadc->Instance->SQR3 &= ~(ADC_SQR3_SQ14 \| ADC_SQR3_SQ13 \| ADC_SQR3_SQ12 \|
mbed_official	330:c80ac197fa6a	906	ADC_SQR3_SQ11 \| ADC_SQR3_SQ10);
mbed_official	330:c80ac197fa6a	907
mbed_official	330:c80ac197fa6a	908	/* Reset register SQR4 */
mbed_official	330:c80ac197fa6a	909	hadc->Instance->SQR4 &= ~(ADC_SQR4_SQ16 \| ADC_SQR4_SQ15);
mbed_official	330:c80ac197fa6a	910
mbed_official	330:c80ac197fa6a	911	/* Reset register DR */
mbed_official	330:c80ac197fa6a	912	/* bits in access mode read only, no direct reset applicable*/
mbed_official	330:c80ac197fa6a	913
mbed_official	330:c80ac197fa6a	914	/* Reset register OFR1 */
mbed_official	330:c80ac197fa6a	915	hadc->Instance->OFR1 &= ~(ADC_OFR1_OFFSET1_EN \| ADC_OFR1_OFFSET1_CH \| ADC_OFR1_OFFSET1);
mbed_official	330:c80ac197fa6a	916	/* Reset register OFR2 */
mbed_official	330:c80ac197fa6a	917	hadc->Instance->OFR2 &= ~(ADC_OFR2_OFFSET2_EN \| ADC_OFR2_OFFSET2_CH \| ADC_OFR2_OFFSET2);
mbed_official	330:c80ac197fa6a	918	/* Reset register OFR3 */
mbed_official	330:c80ac197fa6a	919	hadc->Instance->OFR3 &= ~(ADC_OFR3_OFFSET3_EN \| ADC_OFR3_OFFSET3_CH \| ADC_OFR3_OFFSET3);
mbed_official	330:c80ac197fa6a	920	/* Reset register OFR4 */
mbed_official	330:c80ac197fa6a	921	hadc->Instance->OFR4 &= ~(ADC_OFR4_OFFSET4_EN \| ADC_OFR4_OFFSET4_CH \| ADC_OFR4_OFFSET4);
mbed_official	330:c80ac197fa6a	922
mbed_official	330:c80ac197fa6a	923	/* Reset registers JDR1, JDR2, JDR3, JDR4 */
mbed_official	330:c80ac197fa6a	924	/* bits in access mode read only, no direct reset applicable*/
mbed_official	330:c80ac197fa6a	925
mbed_official	330:c80ac197fa6a	926	/* Reset register AWD2CR */
mbed_official	330:c80ac197fa6a	927	hadc->Instance->AWD2CR &= ~(ADC_AWD2CR_AWD2CH);
mbed_official	330:c80ac197fa6a	928
mbed_official	330:c80ac197fa6a	929	/* Reset register AWD3CR */
mbed_official	330:c80ac197fa6a	930	hadc->Instance->AWD3CR &= ~(ADC_AWD3CR_AWD3CH);
mbed_official	330:c80ac197fa6a	931
mbed_official	330:c80ac197fa6a	932	/* Reset register DIFSEL */
mbed_official	330:c80ac197fa6a	933	hadc->Instance->DIFSEL &= ~(ADC_DIFSEL_DIFSEL);
mbed_official	330:c80ac197fa6a	934
mbed_official	330:c80ac197fa6a	935	/* Reset register CALFACT */
mbed_official	330:c80ac197fa6a	936	hadc->Instance->CALFACT &= ~(ADC_CALFACT_CALFACT_D \| ADC_CALFACT_CALFACT_S);
mbed_official	330:c80ac197fa6a	937
mbed_official	330:c80ac197fa6a	938
mbed_official	330:c80ac197fa6a	939
mbed_official	330:c80ac197fa6a	940
mbed_official	330:c80ac197fa6a	941
mbed_official	330:c80ac197fa6a	942
mbed_official	330:c80ac197fa6a	943	/* ========== Reset common ADC registers ========== */
mbed_official	330:c80ac197fa6a	944
mbed_official	330:c80ac197fa6a	945	/* Pointer to the common control register to which is belonging hadc */
mbed_official	330:c80ac197fa6a	946	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	330:c80ac197fa6a	947	/* control registers) */
mbed_official	330:c80ac197fa6a	948	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	330:c80ac197fa6a	949
mbed_official	330:c80ac197fa6a	950	/* Set handle of the other ADC sharing the same common register */
mbed_official	330:c80ac197fa6a	951	__HAL_ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
mbed_official	330:c80ac197fa6a	952
mbed_official	330:c80ac197fa6a	953	/* Software is allowed to change common parameters only when all ADCs of */
mbed_official	330:c80ac197fa6a	954	/* the common group are disabled. */
mbed_official	330:c80ac197fa6a	955	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	634:ac7d6880524d	956	( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) \|\|
mbed_official	330:c80ac197fa6a	957	(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
mbed_official	330:c80ac197fa6a	958	{
mbed_official	330:c80ac197fa6a	959	/* Reset configuration of ADC common register CCR:
mbed_official	330:c80ac197fa6a	960	- clock mode: CKMODE
mbed_official	330:c80ac197fa6a	961	- multimode related parameters: MDMA, DMACFG, DELAY, MULTI (set into
mbed_official	330:c80ac197fa6a	962	HAL_ADCEx_MultiModeConfigChannel() )
mbed_official	330:c80ac197fa6a	963	- internal measurement paths: Vbat, temperature sensor, Vref (set into
mbed_official	330:c80ac197fa6a	964	HAL_ADC_ConfigChannel() or HAL_ADCEx_InjectedConfigChannel() )
mbed_official	330:c80ac197fa6a	965	*/
mbed_official	330:c80ac197fa6a	966	tmpADC_Common->CCR &= ~( ADC_CCR_CKMODE \|
mbed_official	330:c80ac197fa6a	967	ADC_CCR_VBATEN \|
mbed_official	330:c80ac197fa6a	968	ADC_CCR_TSEN \|
mbed_official	330:c80ac197fa6a	969	ADC_CCR_VREFEN \|
mbed_official	330:c80ac197fa6a	970	ADC_CCR_DMACFG \|
mbed_official	330:c80ac197fa6a	971	ADC_CCR_DMACFG \|
mbed_official	330:c80ac197fa6a	972	ADC_CCR_DELAY \|
mbed_official	330:c80ac197fa6a	973	ADC_CCR_MULTI );
mbed_official	330:c80ac197fa6a	974
mbed_official	330:c80ac197fa6a	975	/* Other ADC common registers (CSR, CDR) are in access mode read only,
mbed_official	330:c80ac197fa6a	976	no direct reset applicable */
mbed_official	330:c80ac197fa6a	977	}
mbed_official	330:c80ac197fa6a	978
mbed_official	330:c80ac197fa6a	979
mbed_official	330:c80ac197fa6a	980	/* ========== Hard reset of ADC peripheral ========== */
mbed_official	330:c80ac197fa6a	981	/* Performs a global reset of the entire ADC peripheral: ADC state is */
mbed_official	330:c80ac197fa6a	982	/* forced to a similar state after device power-on. */
mbed_official	330:c80ac197fa6a	983	/* Caution: */
mbed_official	330:c80ac197fa6a	984	/* These settings impact both ADC of common group: ADC1&ADC2, ADC3&ADC4 */
mbed_official	330:c80ac197fa6a	985	/* if available (ADC2, ADC3, ADC4 availability depends on STM32 product) */
mbed_official	330:c80ac197fa6a	986	/* As this function is intended to reset a single ADC, instructions for */
mbed_official	330:c80ac197fa6a	987	/* global reset of multiple ADC have been let commented below. */
mbed_official	330:c80ac197fa6a	988	/* */
mbed_official	330:c80ac197fa6a	989	/* If global reset of common ADC is corresponding to the current */
mbed_official	330:c80ac197fa6a	990	/* application, copy-paste and uncomment the following reset code into */
mbed_official	330:c80ac197fa6a	991	/* function "void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)": */
mbed_official	330:c80ac197fa6a	992	/* */
mbed_official	330:c80ac197fa6a	993	/* ADC clock reset */
mbed_official	330:c80ac197fa6a	994	/* if((hadc->Instance == ADC1) \|\| (hadc->Instance == ADC2)) */
mbed_official	330:c80ac197fa6a	995	/* { */
mbed_official	330:c80ac197fa6a	996	/* __ADC12_FORCE_RESET(); */
mbed_official	330:c80ac197fa6a	997	/* __ADC12_RELEASE_RESET(); */
mbed_official	330:c80ac197fa6a	998	/* } */
mbed_official	330:c80ac197fa6a	999	/* else */
mbed_official	330:c80ac197fa6a	1000	/* { */
mbed_official	330:c80ac197fa6a	1001	/* __ADC34_FORCE_RESET(); */
mbed_official	330:c80ac197fa6a	1002	/* __ADC34_RELEASE_RESET(); */
mbed_official	330:c80ac197fa6a	1003	/* } */
mbed_official	330:c80ac197fa6a	1004	/* */
mbed_official	330:c80ac197fa6a	1005	/* ADC clock disable of both possible clock sources: AHB clock and */
mbed_official	330:c80ac197fa6a	1006	/* PLL clock. */
mbed_official	330:c80ac197fa6a	1007	/* if((hadc->Instance == ADC1) \|\| (hadc->Instance == ADC2)) */
mbed_official	330:c80ac197fa6a	1008	/* { */
mbed_official	330:c80ac197fa6a	1009	/* __HAL_RCC_ADC12_CONFIG(RCC_ADC12PLLCLK_OFF); */
mbed_official	330:c80ac197fa6a	1010	/* __ADC12_CLK_DISABLE(); */
mbed_official	330:c80ac197fa6a	1011	/* } */
mbed_official	330:c80ac197fa6a	1012	/* else */
mbed_official	330:c80ac197fa6a	1013	/* { */
mbed_official	330:c80ac197fa6a	1014	/* __HAL_RCC_ADC34_CONFIG(RCC_ADC12PLLCLK_OFF); */
mbed_official	330:c80ac197fa6a	1015	/* __ADC34_CLK_DISABLE(); */
mbed_official	330:c80ac197fa6a	1016	/* } */
mbed_official	330:c80ac197fa6a	1017
mbed_official	330:c80ac197fa6a	1018	/* DeInit the low level hardware */
mbed_official	330:c80ac197fa6a	1019	HAL_ADC_MspDeInit(hadc);
mbed_official	330:c80ac197fa6a	1020
mbed_official	330:c80ac197fa6a	1021	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	1022	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	1023
mbed_official	330:c80ac197fa6a	1024	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1025	hadc->State = HAL_ADC_STATE_RESET;
mbed_official	330:c80ac197fa6a	1026	}
mbed_official	330:c80ac197fa6a	1027
mbed_official	330:c80ac197fa6a	1028	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1029	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1030
mbed_official	330:c80ac197fa6a	1031	/* Return function status */
mbed_official	330:c80ac197fa6a	1032	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	1033	}
mbed_official	330:c80ac197fa6a	1034	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	1035	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	1036	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	1037	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	1038
mbed_official	330:c80ac197fa6a	1039	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	1040	/**
mbed_official	330:c80ac197fa6a	1041	* @brief Deinitialize the ADC peripheral registers to its default reset values.
mbed_official	330:c80ac197fa6a	1042	* @note To not impact other ADCs, reset of common ADC registers have been
mbed_official	330:c80ac197fa6a	1043	* left commented below.
mbed_official	330:c80ac197fa6a	1044	* If needed, the example code can be copied and uncommented into
mbed_official	330:c80ac197fa6a	1045	* function HAL_ADC_MspDeInit().
mbed_official	330:c80ac197fa6a	1046	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1047	* @retval HAL status
mbed_official	330:c80ac197fa6a	1048	*/
mbed_official	330:c80ac197fa6a	1049	HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	1050	{
mbed_official	330:c80ac197fa6a	1051	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	1052
mbed_official	330:c80ac197fa6a	1053	/* Check ADC handle */
mbed_official	634:ac7d6880524d	1054	if(hadc == HAL_NULL)
mbed_official	330:c80ac197fa6a	1055	{
mbed_official	330:c80ac197fa6a	1056	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	1057	}
mbed_official	330:c80ac197fa6a	1058
mbed_official	330:c80ac197fa6a	1059	/* Check the parameters */
mbed_official	330:c80ac197fa6a	1060	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	1061
mbed_official	330:c80ac197fa6a	1062	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1063	hadc->State = HAL_ADC_STATE_BUSY;
mbed_official	330:c80ac197fa6a	1064
mbed_official	330:c80ac197fa6a	1065	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	1066	/* Disable ADC peripheral */
mbed_official	330:c80ac197fa6a	1067	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	330:c80ac197fa6a	1068
mbed_official	330:c80ac197fa6a	1069
mbed_official	330:c80ac197fa6a	1070	/* Configuration of ADC parameters if previous preliminary actions are */
mbed_official	330:c80ac197fa6a	1071	/* correctly completed. */
mbed_official	330:c80ac197fa6a	1072	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	1073	{
mbed_official	330:c80ac197fa6a	1074	/* ========== Reset ADC registers ========== */
mbed_official	330:c80ac197fa6a	1075	/* Reset register SR */
mbed_official	330:c80ac197fa6a	1076	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD \| ADC_FLAG_JEOC \| ADC_FLAG_EOC \|
mbed_official	330:c80ac197fa6a	1077	ADC_FLAG_JSTRT \| ADC_FLAG_STRT));
mbed_official	330:c80ac197fa6a	1078
mbed_official	330:c80ac197fa6a	1079	/* Reset register CR1 */
mbed_official	330:c80ac197fa6a	1080	hadc->Instance->CR1 &= ~(ADC_CR1_AWDEN \| ADC_CR1_JAWDEN \| ADC_CR1_DISCNUM \|
mbed_official	330:c80ac197fa6a	1081	ADC_CR1_JDISCEN \| ADC_CR1_DISCEN \| ADC_CR1_JAUTO \|
mbed_official	330:c80ac197fa6a	1082	ADC_CR1_AWDSGL \| ADC_CR1_SCAN \| ADC_CR1_JEOCIE \|
mbed_official	330:c80ac197fa6a	1083	ADC_CR1_AWDIE \| ADC_CR1_EOCIE \| ADC_CR1_AWDCH);
mbed_official	330:c80ac197fa6a	1084
mbed_official	330:c80ac197fa6a	1085	/* Reset register CR2 */
mbed_official	330:c80ac197fa6a	1086	hadc->Instance->CR2 &= ~(ADC_CR2_TSVREFE \| ADC_CR2_SWSTART \| ADC_CR2_JSWSTART \|
mbed_official	330:c80ac197fa6a	1087	ADC_CR2_EXTTRIG \| ADC_CR2_EXTSEL \| ADC_CR2_JEXTTRIG \|
mbed_official	330:c80ac197fa6a	1088	ADC_CR2_JEXTSEL \| ADC_CR2_ALIGN \| ADC_CR2_DMA \|
mbed_official	330:c80ac197fa6a	1089	ADC_CR2_RSTCAL \| ADC_CR2_CAL \| ADC_CR2_CONT \|
mbed_official	330:c80ac197fa6a	1090	ADC_CR2_ADON );
mbed_official	330:c80ac197fa6a	1091
mbed_official	330:c80ac197fa6a	1092	/* Reset register SMPR1 */
mbed_official	330:c80ac197fa6a	1093	hadc->Instance->SMPR1 &= ~(ADC_SMPR1_SMP17 \| ADC_SMPR1_SMP16 \| ADC_SMPR1_SMP15 \|
mbed_official	330:c80ac197fa6a	1094	ADC_SMPR1_SMP14 \| ADC_SMPR1_SMP13 \| ADC_SMPR1_SMP12 \|
mbed_official	330:c80ac197fa6a	1095	ADC_SMPR1_SMP11 \|ADC_SMPR1_SMP10);
mbed_official	330:c80ac197fa6a	1096
mbed_official	330:c80ac197fa6a	1097	/* Reset register SMPR2 */
mbed_official	330:c80ac197fa6a	1098	hadc->Instance->SMPR2 &= ~(ADC_SMPR2_SMP9 \| ADC_SMPR2_SMP8 \| ADC_SMPR2_SMP7 \|
mbed_official	330:c80ac197fa6a	1099	ADC_SMPR2_SMP6 \| ADC_SMPR2_SMP5 \| ADC_SMPR2_SMP4 \|
mbed_official	330:c80ac197fa6a	1100	ADC_SMPR2_SMP3 \| ADC_SMPR2_SMP2 \| ADC_SMPR2_SMP1 \|
mbed_official	330:c80ac197fa6a	1101	ADC_SMPR2_SMP0);
mbed_official	330:c80ac197fa6a	1102
mbed_official	330:c80ac197fa6a	1103	/* Reset register JOFR1 */
mbed_official	330:c80ac197fa6a	1104	hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1);
mbed_official	330:c80ac197fa6a	1105	/* Reset register JOFR2 */
mbed_official	330:c80ac197fa6a	1106	hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2);
mbed_official	330:c80ac197fa6a	1107	/* Reset register JOFR3 */
mbed_official	330:c80ac197fa6a	1108	hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3);
mbed_official	330:c80ac197fa6a	1109	/* Reset register JOFR4 */
mbed_official	330:c80ac197fa6a	1110	hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4);
mbed_official	330:c80ac197fa6a	1111
mbed_official	330:c80ac197fa6a	1112	/* Reset register HTR */
mbed_official	330:c80ac197fa6a	1113	hadc->Instance->HTR &= ~(ADC_HTR_HT);
mbed_official	330:c80ac197fa6a	1114	/* Reset register LTR */
mbed_official	330:c80ac197fa6a	1115	hadc->Instance->LTR &= ~(ADC_LTR_LT);
mbed_official	330:c80ac197fa6a	1116
mbed_official	330:c80ac197fa6a	1117	/* Reset register SQR1 */
mbed_official	330:c80ac197fa6a	1118	hadc->Instance->SQR1 &= ~(ADC_SQR1_L \|
mbed_official	330:c80ac197fa6a	1119	ADC_SQR1_SQ16 \| ADC_SQR1_SQ15 \|
mbed_official	330:c80ac197fa6a	1120	ADC_SQR1_SQ14 \| ADC_SQR1_SQ13 );
mbed_official	330:c80ac197fa6a	1121
mbed_official	330:c80ac197fa6a	1122	/* Reset register SQR1 */
mbed_official	330:c80ac197fa6a	1123	hadc->Instance->SQR1 &= ~(ADC_SQR1_L \|
mbed_official	330:c80ac197fa6a	1124	ADC_SQR1_SQ16 \| ADC_SQR1_SQ15 \|
mbed_official	330:c80ac197fa6a	1125	ADC_SQR1_SQ14 \| ADC_SQR1_SQ13 );
mbed_official	330:c80ac197fa6a	1126
mbed_official	330:c80ac197fa6a	1127	/* Reset register SQR2 */
mbed_official	330:c80ac197fa6a	1128	hadc->Instance->SQR2 &= ~(ADC_SQR2_SQ12 \| ADC_SQR2_SQ11 \| ADC_SQR2_SQ10 \|
mbed_official	330:c80ac197fa6a	1129	ADC_SQR2_SQ9 \| ADC_SQR2_SQ8 \| ADC_SQR2_SQ7 );
mbed_official	330:c80ac197fa6a	1130
mbed_official	330:c80ac197fa6a	1131	/* Reset register SQR3 */
mbed_official	330:c80ac197fa6a	1132	hadc->Instance->SQR3 &= ~(ADC_SQR3_SQ6 \| ADC_SQR3_SQ5 \| ADC_SQR3_SQ4 \|
mbed_official	330:c80ac197fa6a	1133	ADC_SQR3_SQ3 \| ADC_SQR3_SQ2 \| ADC_SQR3_SQ1 );
mbed_official	330:c80ac197fa6a	1134
mbed_official	330:c80ac197fa6a	1135	/* Reset register JSQR */
mbed_official	330:c80ac197fa6a	1136	hadc->Instance->JSQR &= ~(ADC_JSQR_JL \|
mbed_official	330:c80ac197fa6a	1137	ADC_JSQR_JSQ4 \| ADC_JSQR_JSQ3 \|
mbed_official	330:c80ac197fa6a	1138	ADC_JSQR_JSQ2 \| ADC_JSQR_JSQ1 );
mbed_official	330:c80ac197fa6a	1139
mbed_official	330:c80ac197fa6a	1140	/* Reset register JSQR */
mbed_official	330:c80ac197fa6a	1141	hadc->Instance->JSQR &= ~(ADC_JSQR_JL \|
mbed_official	330:c80ac197fa6a	1142	ADC_JSQR_JSQ4 \| ADC_JSQR_JSQ3 \|
mbed_official	330:c80ac197fa6a	1143	ADC_JSQR_JSQ2 \| ADC_JSQR_JSQ1 );
mbed_official	330:c80ac197fa6a	1144
mbed_official	330:c80ac197fa6a	1145	/* Reset register DR */
mbed_official	330:c80ac197fa6a	1146	/* bits in access mode read only, no direct reset applicable*/
mbed_official	330:c80ac197fa6a	1147
mbed_official	330:c80ac197fa6a	1148	/* Reset registers JDR1, JDR2, JDR3, JDR4 */
mbed_official	330:c80ac197fa6a	1149	/* bits in access mode read only, no direct reset applicable*/
mbed_official	330:c80ac197fa6a	1150
mbed_official	330:c80ac197fa6a	1151	/* Reset VBAT measurement path, in case of enabled before by selecting */
mbed_official	330:c80ac197fa6a	1152	/* channel ADC_CHANNEL_VBAT. */
mbed_official	330:c80ac197fa6a	1153	SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_VBAT);
mbed_official	330:c80ac197fa6a	1154
mbed_official	330:c80ac197fa6a	1155
mbed_official	330:c80ac197fa6a	1156	/* ========== Hard reset ADC peripheral ========== */
mbed_official	330:c80ac197fa6a	1157	/* Performs a global reset of the entire ADC peripheral: ADC state is */
mbed_official	330:c80ac197fa6a	1158	/* forced to a similar state after device power-on. */
mbed_official	330:c80ac197fa6a	1159	/* If needed, copy-paste and uncomment the following reset code into */
mbed_official	330:c80ac197fa6a	1160	/* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */
mbed_official	330:c80ac197fa6a	1161	/* */
mbed_official	330:c80ac197fa6a	1162	/* __ADC1_FORCE_RESET(); */
mbed_official	330:c80ac197fa6a	1163	/* __ADC1_RELEASE_RESET(); */
mbed_official	330:c80ac197fa6a	1164
mbed_official	330:c80ac197fa6a	1165	/* DeInit the low level hardware */
mbed_official	330:c80ac197fa6a	1166	HAL_ADC_MspDeInit(hadc);
mbed_official	330:c80ac197fa6a	1167
mbed_official	330:c80ac197fa6a	1168	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	1169	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	1170
mbed_official	330:c80ac197fa6a	1171	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1172	hadc->State = HAL_ADC_STATE_RESET;
mbed_official	330:c80ac197fa6a	1173
mbed_official	330:c80ac197fa6a	1174	}
mbed_official	330:c80ac197fa6a	1175
mbed_official	330:c80ac197fa6a	1176	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1177	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1178
mbed_official	330:c80ac197fa6a	1179	/* Return function status */
mbed_official	330:c80ac197fa6a	1180	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	1181	}
mbed_official	330:c80ac197fa6a	1182	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	1183
mbed_official	330:c80ac197fa6a	1184	/**
mbed_official	330:c80ac197fa6a	1185	* @}
mbed_official	330:c80ac197fa6a	1186	*/
mbed_official	330:c80ac197fa6a	1187
mbed_official	330:c80ac197fa6a	1188	/** @defgroup ADCEx_Exported_Functions_Group2 Extended Input and Output operation functions
mbed_official	330:c80ac197fa6a	1189	* @brief Extended IO operation functions
mbed_official	330:c80ac197fa6a	1190	*
mbed_official	330:c80ac197fa6a	1191	@verbatim
mbed_official	330:c80ac197fa6a	1192	===============================================================================
mbed_official	330:c80ac197fa6a	1193	##### IO operation functions #####
mbed_official	330:c80ac197fa6a	1194	===============================================================================
mbed_official	330:c80ac197fa6a	1195	[..] This section provides functions allowing to:
mbed_official	330:c80ac197fa6a	1196	(+) Start conversion of regular group.
mbed_official	330:c80ac197fa6a	1197	(+) Stop conversion of regular group.
mbed_official	330:c80ac197fa6a	1198	(+) Poll for conversion complete on regular group.
mbed_official	330:c80ac197fa6a	1199	(+) Poll for conversion event.
mbed_official	330:c80ac197fa6a	1200	(+) Get result of regular channel conversion.
mbed_official	330:c80ac197fa6a	1201	(+) Start conversion of regular group and enable interruptions.
mbed_official	330:c80ac197fa6a	1202	(+) Stop conversion of regular group and disable interruptions.
mbed_official	330:c80ac197fa6a	1203	(+) Handle ADC interrupt request
mbed_official	330:c80ac197fa6a	1204	(+) Start conversion of regular group and enable DMA transfer.
mbed_official	330:c80ac197fa6a	1205	(+) Stop conversion of regular group and disable ADC DMA transfer.
mbed_official	330:c80ac197fa6a	1206
mbed_official	330:c80ac197fa6a	1207	(+) Start conversion of injected group.
mbed_official	330:c80ac197fa6a	1208	(+) Stop conversion of injected group.
mbed_official	330:c80ac197fa6a	1209	(+) Poll for conversion complete on injected group.
mbed_official	330:c80ac197fa6a	1210	(+) Get result of injected channel conversion.
mbed_official	330:c80ac197fa6a	1211	(+) Start conversion of injected group and enable interruptions.
mbed_official	330:c80ac197fa6a	1212	(+) Stop conversion of injected group and disable interruptions.
mbed_official	330:c80ac197fa6a	1213
mbed_official	330:c80ac197fa6a	1214	(+) Start multimode and enable DMA transfer.
mbed_official	330:c80ac197fa6a	1215	(+) Stop multimode and disable ADC DMA transfer.
mbed_official	330:c80ac197fa6a	1216	(+) Get result of multimode conversion.
mbed_official	330:c80ac197fa6a	1217
mbed_official	330:c80ac197fa6a	1218	(+) Perform the ADC self-calibration for single or differential ending.
mbed_official	330:c80ac197fa6a	1219	(+) Get calibration factors for single or differential ending.
mbed_official	330:c80ac197fa6a	1220	(+) Set calibration factors for single or differential ending.
mbed_official	330:c80ac197fa6a	1221
mbed_official	330:c80ac197fa6a	1222	@endverbatim
mbed_official	330:c80ac197fa6a	1223	* @{
mbed_official	330:c80ac197fa6a	1224	*/
mbed_official	330:c80ac197fa6a	1225
mbed_official	330:c80ac197fa6a	1226	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	1227	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	1228	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	1229	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	1230	/**
mbed_official	330:c80ac197fa6a	1231	* @brief Enables ADC, starts conversion of regular group.
mbed_official	330:c80ac197fa6a	1232	* Interruptions enabled in this function: None.
mbed_official	330:c80ac197fa6a	1233	* @note: Case of multimode enabled (for devices with several ADCs): if ADC
mbed_official	330:c80ac197fa6a	1234	* is slave, ADC is enabled only (conversion is not started). If ADC
mbed_official	330:c80ac197fa6a	1235	* is master, ADC is enabled and multimode conversion is started.
mbed_official	330:c80ac197fa6a	1236	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1237	* @retval HAL status
mbed_official	330:c80ac197fa6a	1238	*/
mbed_official	330:c80ac197fa6a	1239	HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	1240	{
mbed_official	330:c80ac197fa6a	1241	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	1242
mbed_official	330:c80ac197fa6a	1243	/* Check the parameters */
mbed_official	330:c80ac197fa6a	1244	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	1245
mbed_official	330:c80ac197fa6a	1246	/* Process locked */
mbed_official	330:c80ac197fa6a	1247	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	1248
mbed_official	330:c80ac197fa6a	1249	/* Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	1250	tmpHALStatus = ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	1251
mbed_official	330:c80ac197fa6a	1252	/* Start conversion if ADC is effectively enabled */
mbed_official	330:c80ac197fa6a	1253	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	1254	{
mbed_official	330:c80ac197fa6a	1255	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	330:c80ac197fa6a	1256	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	330:c80ac197fa6a	1257	{
mbed_official	330:c80ac197fa6a	1258	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1259	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	330:c80ac197fa6a	1260	}
mbed_official	330:c80ac197fa6a	1261	else
mbed_official	330:c80ac197fa6a	1262	{
mbed_official	330:c80ac197fa6a	1263	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1264	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	330:c80ac197fa6a	1265	}
mbed_official	330:c80ac197fa6a	1266
mbed_official	330:c80ac197fa6a	1267	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	1268	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	1269
mbed_official	330:c80ac197fa6a	1270	/* Clear regular group conversion flag and overrun flag */
mbed_official	330:c80ac197fa6a	1271	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	330:c80ac197fa6a	1272	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
mbed_official	330:c80ac197fa6a	1273
mbed_official	330:c80ac197fa6a	1274	/* Enable conversion of regular group. */
mbed_official	330:c80ac197fa6a	1275	/* If software start has been selected, conversion starts immediately. */
mbed_official	330:c80ac197fa6a	1276	/* If external trigger has been selected, conversion will start at next */
mbed_official	330:c80ac197fa6a	1277	/* trigger event. */
mbed_official	330:c80ac197fa6a	1278	/* Case of multimode enabled (for devices with several ADCs): if ADC is */
mbed_official	330:c80ac197fa6a	1279	/* slave, ADC is enabled only (conversion is not started). If ADC is */
mbed_official	330:c80ac197fa6a	1280	/* master, ADC is enabled and conversion is started. */
mbed_official	330:c80ac197fa6a	1281	if (__HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) )
mbed_official	330:c80ac197fa6a	1282	{
mbed_official	330:c80ac197fa6a	1283	hadc->Instance->CR \|= ADC_CR_ADSTART;
mbed_official	330:c80ac197fa6a	1284	}
mbed_official	330:c80ac197fa6a	1285	}
mbed_official	330:c80ac197fa6a	1286
mbed_official	330:c80ac197fa6a	1287	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1288	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1289
mbed_official	330:c80ac197fa6a	1290	/* Return function status */
mbed_official	330:c80ac197fa6a	1291	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	1292	}
mbed_official	330:c80ac197fa6a	1293	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	1294	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	1295	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	1296	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	1297
mbed_official	330:c80ac197fa6a	1298	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	1299	/**
mbed_official	330:c80ac197fa6a	1300	* @brief Enables ADC, starts conversion of regular group.
mbed_official	330:c80ac197fa6a	1301	* Interruptions enabled in this function: None.
mbed_official	330:c80ac197fa6a	1302	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1303	* @retval HAL status
mbed_official	330:c80ac197fa6a	1304	*/
mbed_official	330:c80ac197fa6a	1305	HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	1306	{
mbed_official	330:c80ac197fa6a	1307	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	1308
mbed_official	330:c80ac197fa6a	1309	/* Check the parameters */
mbed_official	330:c80ac197fa6a	1310	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	1311
mbed_official	330:c80ac197fa6a	1312	/* Process locked */
mbed_official	330:c80ac197fa6a	1313	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	1314
mbed_official	330:c80ac197fa6a	1315	/* Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	1316	tmpHALStatus = ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	1317
mbed_official	330:c80ac197fa6a	1318	/* Start conversion if ADC is effectively enabled */
mbed_official	330:c80ac197fa6a	1319	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	1320	{
mbed_official	330:c80ac197fa6a	1321	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	330:c80ac197fa6a	1322	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	330:c80ac197fa6a	1323	{
mbed_official	330:c80ac197fa6a	1324	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1325	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	330:c80ac197fa6a	1326	}
mbed_official	330:c80ac197fa6a	1327	else
mbed_official	330:c80ac197fa6a	1328	{
mbed_official	330:c80ac197fa6a	1329	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1330	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	330:c80ac197fa6a	1331	}
mbed_official	330:c80ac197fa6a	1332
mbed_official	330:c80ac197fa6a	1333	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	1334	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	1335
mbed_official	330:c80ac197fa6a	1336	/* Clear regular group conversion flag and overrun flag */
mbed_official	330:c80ac197fa6a	1337	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	330:c80ac197fa6a	1338	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
mbed_official	330:c80ac197fa6a	1339
mbed_official	330:c80ac197fa6a	1340	/* Start conversion of regular group if software start has been selected. */
mbed_official	330:c80ac197fa6a	1341	/* If external trigger has been selected, conversion will start at next */
mbed_official	330:c80ac197fa6a	1342	/* trigger event. */
mbed_official	330:c80ac197fa6a	1343	/* Note: Alternate trigger for single conversion could be to force an */
mbed_official	330:c80ac197fa6a	1344	/* additional set of bit ADON "hadc->Instance->CR2 \|= ADC_CR2_ADON;"*/
mbed_official	330:c80ac197fa6a	1345	if (__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc))
mbed_official	330:c80ac197fa6a	1346	{
mbed_official	330:c80ac197fa6a	1347	/* Start ADC conversion on regular group */
mbed_official	330:c80ac197fa6a	1348	hadc->Instance->CR2 \|= ADC_CR2_SWSTART;
mbed_official	330:c80ac197fa6a	1349	}
mbed_official	330:c80ac197fa6a	1350	}
mbed_official	330:c80ac197fa6a	1351
mbed_official	330:c80ac197fa6a	1352	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1353	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1354
mbed_official	330:c80ac197fa6a	1355	/* Return function status */
mbed_official	330:c80ac197fa6a	1356	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	1357	}
mbed_official	330:c80ac197fa6a	1358	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	1359
mbed_official	330:c80ac197fa6a	1360	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	1361	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	1362	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	1363	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	1364	/**
mbed_official	330:c80ac197fa6a	1365	* @brief Stop ADC conversion of regular group (and injected group in
mbed_official	330:c80ac197fa6a	1366	* case of auto_injection mode), disable ADC peripheral.
mbed_official	330:c80ac197fa6a	1367	* @note: ADC peripheral disable is forcing interruption of potential
mbed_official	330:c80ac197fa6a	1368	* conversion on injected group. If injected group is under use, it
mbed_official	330:c80ac197fa6a	1369	* should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
mbed_official	330:c80ac197fa6a	1370	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1371	* @retval HAL status.
mbed_official	330:c80ac197fa6a	1372	*/
mbed_official	330:c80ac197fa6a	1373	HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	1374	{
mbed_official	330:c80ac197fa6a	1375	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	1376
mbed_official	330:c80ac197fa6a	1377	/* Check the parameters */
mbed_official	330:c80ac197fa6a	1378	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	1379
mbed_official	330:c80ac197fa6a	1380	/* Process locked */
mbed_official	330:c80ac197fa6a	1381	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	1382
mbed_official	330:c80ac197fa6a	1383	/* 1. Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	1384	tmpHALStatus = ADC_ConversionStop(hadc, REGULAR_INJECTED_GROUP);
mbed_official	330:c80ac197fa6a	1385
mbed_official	330:c80ac197fa6a	1386	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	330:c80ac197fa6a	1387	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	1388	{
mbed_official	330:c80ac197fa6a	1389	/* 2. Disable the ADC peripheral */
mbed_official	330:c80ac197fa6a	1390	tmpHALStatus = ADC_Disable(hadc);
mbed_official	330:c80ac197fa6a	1391
mbed_official	330:c80ac197fa6a	1392	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	1393	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	1394	{
mbed_official	330:c80ac197fa6a	1395	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1396	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	1397	}
mbed_official	330:c80ac197fa6a	1398	}
mbed_official	330:c80ac197fa6a	1399
mbed_official	330:c80ac197fa6a	1400	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1401	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1402
mbed_official	330:c80ac197fa6a	1403	/* Return function status */
mbed_official	330:c80ac197fa6a	1404	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	1405	}
mbed_official	330:c80ac197fa6a	1406	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	1407	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	1408	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	1409	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	1410
mbed_official	330:c80ac197fa6a	1411	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	1412	/**
mbed_official	330:c80ac197fa6a	1413	* @brief Stop ADC conversion of regular group (and injected channels in
mbed_official	330:c80ac197fa6a	1414	* case of auto_injection mode), disable ADC peripheral.
mbed_official	330:c80ac197fa6a	1415	* @note: ADC peripheral disable is forcing interruption of potential
mbed_official	330:c80ac197fa6a	1416	* conversion on injected group. If injected group is under use, it
mbed_official	330:c80ac197fa6a	1417	* should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
mbed_official	330:c80ac197fa6a	1418	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1419	* @retval HAL status.
mbed_official	330:c80ac197fa6a	1420	*/
mbed_official	330:c80ac197fa6a	1421	HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	1422	{
mbed_official	330:c80ac197fa6a	1423	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	1424
mbed_official	330:c80ac197fa6a	1425	/* Check the parameters */
mbed_official	330:c80ac197fa6a	1426	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	1427
mbed_official	330:c80ac197fa6a	1428	/* Process locked */
mbed_official	330:c80ac197fa6a	1429	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	1430
mbed_official	330:c80ac197fa6a	1431	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	1432	/* Disable ADC peripheral */
mbed_official	330:c80ac197fa6a	1433	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	330:c80ac197fa6a	1434
mbed_official	330:c80ac197fa6a	1435	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	1436	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	1437	{
mbed_official	330:c80ac197fa6a	1438	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1439	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	1440	}
mbed_official	330:c80ac197fa6a	1441
mbed_official	330:c80ac197fa6a	1442	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1443	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1444
mbed_official	330:c80ac197fa6a	1445	/* Return function status */
mbed_official	330:c80ac197fa6a	1446	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	1447	}
mbed_official	330:c80ac197fa6a	1448	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	1449
mbed_official	330:c80ac197fa6a	1450	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	1451	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	1452	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	1453	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	1454	/**
mbed_official	330:c80ac197fa6a	1455	* @brief Wait for regular group conversion to be completed.
mbed_official	330:c80ac197fa6a	1456	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1457	* @param Timeout: Timeout value in millisecond.
mbed_official	330:c80ac197fa6a	1458	* @retval HAL status
mbed_official	330:c80ac197fa6a	1459	*/
mbed_official	330:c80ac197fa6a	1460	HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
mbed_official	330:c80ac197fa6a	1461	{
mbed_official	330:c80ac197fa6a	1462	uint32_t tickstart;
mbed_official	330:c80ac197fa6a	1463	uint32_t tmp_Flag_EOC;
mbed_official	330:c80ac197fa6a	1464
mbed_official	330:c80ac197fa6a	1465	/* Check the parameters */
mbed_official	330:c80ac197fa6a	1466	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	1467
mbed_official	330:c80ac197fa6a	1468	/* If end of conversion selected to end of sequence */
mbed_official	330:c80ac197fa6a	1469	if (hadc->Init.EOCSelection == EOC_SEQ_CONV)
mbed_official	330:c80ac197fa6a	1470	{
mbed_official	330:c80ac197fa6a	1471	tmp_Flag_EOC = ADC_FLAG_EOS;
mbed_official	330:c80ac197fa6a	1472	}
mbed_official	330:c80ac197fa6a	1473	/* If end of conversion selected to end of each conversion */
mbed_official	330:c80ac197fa6a	1474	else /* EOC_SINGLE_CONV */
mbed_official	330:c80ac197fa6a	1475	{
mbed_official	330:c80ac197fa6a	1476	tmp_Flag_EOC = (ADC_FLAG_EOC \| ADC_FLAG_EOS);
mbed_official	330:c80ac197fa6a	1477	}
mbed_official	330:c80ac197fa6a	1478
mbed_official	330:c80ac197fa6a	1479	/* Get timeout */
mbed_official	330:c80ac197fa6a	1480	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	1481
mbed_official	330:c80ac197fa6a	1482	/* Wait until End of Conversion flag is raised */
mbed_official	330:c80ac197fa6a	1483	while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
mbed_official	330:c80ac197fa6a	1484	{
mbed_official	330:c80ac197fa6a	1485	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	330:c80ac197fa6a	1486	if(Timeout != HAL_MAX_DELAY)
mbed_official	330:c80ac197fa6a	1487	{
mbed_official	330:c80ac197fa6a	1488	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	330:c80ac197fa6a	1489	{
mbed_official	330:c80ac197fa6a	1490	/* Update ADC state machine to timeout */
mbed_official	330:c80ac197fa6a	1491	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	330:c80ac197fa6a	1492
mbed_official	330:c80ac197fa6a	1493	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1494	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1495
mbed_official	330:c80ac197fa6a	1496	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	1497	}
mbed_official	330:c80ac197fa6a	1498	}
mbed_official	330:c80ac197fa6a	1499	}
mbed_official	330:c80ac197fa6a	1500
mbed_official	330:c80ac197fa6a	1501	/* Clear end of conversion flag of regular group if low power feature */
mbed_official	330:c80ac197fa6a	1502	/* "LowPowerAutoWait " is disabled, to not interfere with this feature */
mbed_official	330:c80ac197fa6a	1503	/* until data register is read using function HAL_ADC_GetValue(). */
mbed_official	330:c80ac197fa6a	1504	if (hadc->Init.LowPowerAutoWait == DISABLE)
mbed_official	330:c80ac197fa6a	1505	{
mbed_official	330:c80ac197fa6a	1506	/* Clear regular group conversion flag */
mbed_official	330:c80ac197fa6a	1507	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS));
mbed_official	330:c80ac197fa6a	1508	}
mbed_official	330:c80ac197fa6a	1509
mbed_official	330:c80ac197fa6a	1510	/* Update state machine on conversion status if not in error state */
mbed_official	330:c80ac197fa6a	1511	if(hadc->State != HAL_ADC_STATE_ERROR)
mbed_official	330:c80ac197fa6a	1512	{
mbed_official	330:c80ac197fa6a	1513	/* Update ADC state machine */
mbed_official	330:c80ac197fa6a	1514	if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
mbed_official	330:c80ac197fa6a	1515	{
mbed_official	330:c80ac197fa6a	1516	/* Check if a conversion is ready on injected group */
mbed_official	330:c80ac197fa6a	1517	if(hadc->State == HAL_ADC_STATE_EOC_INJ)
mbed_official	330:c80ac197fa6a	1518	{
mbed_official	330:c80ac197fa6a	1519	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1520	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	330:c80ac197fa6a	1521	}
mbed_official	330:c80ac197fa6a	1522	else
mbed_official	330:c80ac197fa6a	1523	{
mbed_official	330:c80ac197fa6a	1524	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1525	hadc->State = HAL_ADC_STATE_EOC_REG;
mbed_official	330:c80ac197fa6a	1526	}
mbed_official	330:c80ac197fa6a	1527	}
mbed_official	330:c80ac197fa6a	1528	}
mbed_official	330:c80ac197fa6a	1529
mbed_official	330:c80ac197fa6a	1530	/* Return ADC state */
mbed_official	330:c80ac197fa6a	1531	return HAL_OK;
mbed_official	330:c80ac197fa6a	1532	}
mbed_official	330:c80ac197fa6a	1533	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	1534	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	1535	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	1536	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	1537
mbed_official	330:c80ac197fa6a	1538	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	1539	/**
mbed_official	330:c80ac197fa6a	1540	* @brief Wait for regular group conversion to be completed.
mbed_official	330:c80ac197fa6a	1541	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1542	* @param Timeout: Timeout value in millisecond.
mbed_official	330:c80ac197fa6a	1543	* @retval HAL status
mbed_official	330:c80ac197fa6a	1544	*/
mbed_official	330:c80ac197fa6a	1545	HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
mbed_official	330:c80ac197fa6a	1546	{
mbed_official	330:c80ac197fa6a	1547	uint32_t tickstart;
mbed_official	330:c80ac197fa6a	1548
mbed_official	330:c80ac197fa6a	1549	/* Variables for polling in case of scan mode enabled */
mbed_official	330:c80ac197fa6a	1550	uint32_t Conversion_Timeout_CPU_cycles_max =0;
mbed_official	330:c80ac197fa6a	1551	uint32_t Conversion_Timeout_CPU_cycles =0;
mbed_official	330:c80ac197fa6a	1552
mbed_official	330:c80ac197fa6a	1553	/* Check the parameters */
mbed_official	330:c80ac197fa6a	1554	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	1555
mbed_official	330:c80ac197fa6a	1556	/* Get timeout */
mbed_official	330:c80ac197fa6a	1557	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	1558
mbed_official	330:c80ac197fa6a	1559	/* Polling for end of conversion: differentiation if single/sequence */
mbed_official	330:c80ac197fa6a	1560	/* conversion. */
mbed_official	330:c80ac197fa6a	1561	/* - If single conversion for regular group (Scan mode disabled or enabled */
mbed_official	330:c80ac197fa6a	1562	/* with NbrOfConversion =1), flag EOC is used to determine the */
mbed_official	330:c80ac197fa6a	1563	/* conversion completion. */
mbed_official	330:c80ac197fa6a	1564	/* - If sequence conversion for regular group, flag EOC is set only a the */
mbed_official	330:c80ac197fa6a	1565	/* end of the sequence. To poll for each conversion, the maximum */
mbed_official	330:c80ac197fa6a	1566	/* conversion time is calculated from ADC conversion time (selected */
mbed_official	330:c80ac197fa6a	1567	/* sampling time + conversion time of 12.5 ADC clock cycles) and */
mbed_official	330:c80ac197fa6a	1568	/* APB2/ADC clock prescalers (depending on settings, conversion time */
mbed_official	330:c80ac197fa6a	1569	/* range can be from 28 to 32256 CPU cycles). */
mbed_official	330:c80ac197fa6a	1570	if ((HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_SCAN)) &&
mbed_official	330:c80ac197fa6a	1571	((hadc->Instance->SQR1 & ADC_SQR1_L) == RESET) )
mbed_official	330:c80ac197fa6a	1572	{
mbed_official	330:c80ac197fa6a	1573	/* Wait until End of Conversion flag is raised */
mbed_official	330:c80ac197fa6a	1574	while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_EOC))
mbed_official	330:c80ac197fa6a	1575	{
mbed_official	330:c80ac197fa6a	1576	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	330:c80ac197fa6a	1577	if(Timeout != HAL_MAX_DELAY)
mbed_official	330:c80ac197fa6a	1578	{
mbed_official	330:c80ac197fa6a	1579	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	330:c80ac197fa6a	1580	{
mbed_official	330:c80ac197fa6a	1581	/* Update ADC state machine to timeout */
mbed_official	330:c80ac197fa6a	1582	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	330:c80ac197fa6a	1583
mbed_official	330:c80ac197fa6a	1584	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1585	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1586
mbed_official	330:c80ac197fa6a	1587	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	1588	}
mbed_official	330:c80ac197fa6a	1589	}
mbed_official	330:c80ac197fa6a	1590	}
mbed_official	330:c80ac197fa6a	1591	}
mbed_official	330:c80ac197fa6a	1592	else
mbed_official	330:c80ac197fa6a	1593	{
mbed_official	330:c80ac197fa6a	1594	/* Computation of CPU cycles corresponding to ADC conversion cycles */
mbed_official	330:c80ac197fa6a	1595	/* Retrieve ADC clock prescaler and ADC maximum conversion cycles on all */
mbed_official	330:c80ac197fa6a	1596	/* channels. */
mbed_official	330:c80ac197fa6a	1597	Conversion_Timeout_CPU_cycles_max = __HAL_ADC_CLOCK_PRECSALER_RANGE() ;
mbed_official	330:c80ac197fa6a	1598	Conversion_Timeout_CPU_cycles_max *= __HAL_ADC_CONVCYCLES_MAX_RANGE(hadc);
mbed_official	330:c80ac197fa6a	1599
mbed_official	330:c80ac197fa6a	1600	/* Maximum conversion cycles taking in account offset of 34 CPU cycles: */
mbed_official	330:c80ac197fa6a	1601	/* number of CPU cycles for processing of conversion cycles estimation. */
mbed_official	330:c80ac197fa6a	1602	Conversion_Timeout_CPU_cycles = 34;
mbed_official	330:c80ac197fa6a	1603
mbed_official	330:c80ac197fa6a	1604	/* Poll with maximum conversion time */
mbed_official	330:c80ac197fa6a	1605	while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
mbed_official	330:c80ac197fa6a	1606	{
mbed_official	330:c80ac197fa6a	1607	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	330:c80ac197fa6a	1608	if(Timeout != HAL_MAX_DELAY)
mbed_official	330:c80ac197fa6a	1609	{
mbed_official	330:c80ac197fa6a	1610	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	330:c80ac197fa6a	1611	{
mbed_official	330:c80ac197fa6a	1612	/* Update ADC state machine to timeout */
mbed_official	330:c80ac197fa6a	1613	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	330:c80ac197fa6a	1614
mbed_official	330:c80ac197fa6a	1615	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1616	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1617
mbed_official	330:c80ac197fa6a	1618	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	1619	}
mbed_official	330:c80ac197fa6a	1620	}
mbed_official	330:c80ac197fa6a	1621	Conversion_Timeout_CPU_cycles ++;
mbed_official	330:c80ac197fa6a	1622	}
mbed_official	330:c80ac197fa6a	1623	}
mbed_official	330:c80ac197fa6a	1624
mbed_official	330:c80ac197fa6a	1625	/* Clear regular group conversion flag */
mbed_official	330:c80ac197fa6a	1626	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT \| ADC_FLAG_EOC);
mbed_official	330:c80ac197fa6a	1627
mbed_official	330:c80ac197fa6a	1628	/* Update state machine on conversion status if not in error state */
mbed_official	330:c80ac197fa6a	1629	if(hadc->State != HAL_ADC_STATE_ERROR)
mbed_official	330:c80ac197fa6a	1630	{
mbed_official	330:c80ac197fa6a	1631	/* Update ADC state machine */
mbed_official	330:c80ac197fa6a	1632	if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
mbed_official	330:c80ac197fa6a	1633	{
mbed_official	330:c80ac197fa6a	1634	/* Check if a conversion is ready on injected group */
mbed_official	330:c80ac197fa6a	1635	if(hadc->State == HAL_ADC_STATE_EOC_INJ)
mbed_official	330:c80ac197fa6a	1636	{
mbed_official	330:c80ac197fa6a	1637	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1638	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	330:c80ac197fa6a	1639	}
mbed_official	330:c80ac197fa6a	1640	else
mbed_official	330:c80ac197fa6a	1641	{
mbed_official	330:c80ac197fa6a	1642	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1643	hadc->State = HAL_ADC_STATE_EOC_REG;
mbed_official	330:c80ac197fa6a	1644	}
mbed_official	330:c80ac197fa6a	1645	}
mbed_official	330:c80ac197fa6a	1646	}
mbed_official	330:c80ac197fa6a	1647
mbed_official	330:c80ac197fa6a	1648	/* Return ADC state */
mbed_official	330:c80ac197fa6a	1649	return HAL_OK;
mbed_official	330:c80ac197fa6a	1650	}
mbed_official	330:c80ac197fa6a	1651	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	1652
mbed_official	330:c80ac197fa6a	1653	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	1654	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	1655	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	1656	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	1657	/**
mbed_official	330:c80ac197fa6a	1658	* @brief Poll for conversion event.
mbed_official	330:c80ac197fa6a	1659	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1660	* @param EventType: the ADC event type.
mbed_official	330:c80ac197fa6a	1661	* This parameter can be one of the following values:
mbed_official	330:c80ac197fa6a	1662	* @arg AWD_EVENT: ADC Analog watchdog 1 event (main analog watchdog, present on all STM32 devices)
mbed_official	330:c80ac197fa6a	1663	* @arg AWD2_EVENT: ADC Analog watchdog 2 event (additional analog watchdog, present only on STM32F3 devices)
mbed_official	330:c80ac197fa6a	1664	* @arg AWD3_EVENT: ADC Analog watchdog 3 event (additional analog watchdog, present only on STM32F3 devices)
mbed_official	330:c80ac197fa6a	1665	* @arg OVR_EVENT: ADC Overrun event
mbed_official	330:c80ac197fa6a	1666	* @arg JQOVF_EVENT: ADC Injected context queue overflow event
mbed_official	330:c80ac197fa6a	1667	* @param Timeout: Timeout value in millisecond.
mbed_official	330:c80ac197fa6a	1668	* @retval HAL status
mbed_official	330:c80ac197fa6a	1669	*/
mbed_official	330:c80ac197fa6a	1670	HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
mbed_official	330:c80ac197fa6a	1671	{
mbed_official	330:c80ac197fa6a	1672	uint32_t tickstart;
mbed_official	330:c80ac197fa6a	1673
mbed_official	330:c80ac197fa6a	1674	/* Check the parameters */
mbed_official	330:c80ac197fa6a	1675	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	1676	assert_param(IS_ADC_EVENT_TYPE(EventType));
mbed_official	330:c80ac197fa6a	1677
mbed_official	330:c80ac197fa6a	1678	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	1679
mbed_official	330:c80ac197fa6a	1680	/* Check selected event flag */
mbed_official	330:c80ac197fa6a	1681	while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
mbed_official	330:c80ac197fa6a	1682	{
mbed_official	330:c80ac197fa6a	1683	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	330:c80ac197fa6a	1684	if(Timeout != HAL_MAX_DELAY)
mbed_official	330:c80ac197fa6a	1685	{
mbed_official	330:c80ac197fa6a	1686	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	330:c80ac197fa6a	1687	{
mbed_official	330:c80ac197fa6a	1688	/* Update ADC state machine to timeout */
mbed_official	330:c80ac197fa6a	1689	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	330:c80ac197fa6a	1690
mbed_official	330:c80ac197fa6a	1691	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1692	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1693
mbed_official	330:c80ac197fa6a	1694	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	1695	}
mbed_official	330:c80ac197fa6a	1696	}
mbed_official	330:c80ac197fa6a	1697	}
mbed_official	330:c80ac197fa6a	1698
mbed_official	330:c80ac197fa6a	1699
mbed_official	330:c80ac197fa6a	1700	switch(EventType)
mbed_official	330:c80ac197fa6a	1701	{
mbed_official	330:c80ac197fa6a	1702	/* Analog watchdog (level out of window) event */
mbed_official	330:c80ac197fa6a	1703	/* Note: In case of several analog watchdog enabled, if needed to know */
mbed_official	330:c80ac197fa6a	1704	/* which one triggered and on which ADCx, test ADC state of Analog Watchdog */
mbed_official	330:c80ac197fa6a	1705	/* flags HAL_ADC_STATE_AWD/2/3 function. */
mbed_official	330:c80ac197fa6a	1706	/* For example: "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD) " */
mbed_official	330:c80ac197fa6a	1707	/* "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD2)" */
mbed_official	330:c80ac197fa6a	1708	/* "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD3)" */
mbed_official	330:c80ac197fa6a	1709	/* Check analog watchdog 1 flag */
mbed_official	330:c80ac197fa6a	1710	case AWD_EVENT:
mbed_official	330:c80ac197fa6a	1711	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1712	hadc->State = HAL_ADC_STATE_AWD;
mbed_official	330:c80ac197fa6a	1713
mbed_official	330:c80ac197fa6a	1714	/* Clear ADC analog watchdog flag */
mbed_official	330:c80ac197fa6a	1715	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1);
mbed_official	330:c80ac197fa6a	1716	break;
mbed_official	330:c80ac197fa6a	1717
mbed_official	330:c80ac197fa6a	1718	/* Check analog watchdog 2 flag */
mbed_official	330:c80ac197fa6a	1719	case AWD2_EVENT:
mbed_official	330:c80ac197fa6a	1720	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1721	hadc->State = HAL_ADC_STATE_AWD2;
mbed_official	330:c80ac197fa6a	1722
mbed_official	330:c80ac197fa6a	1723	/* Clear ADC analog watchdog flag */
mbed_official	330:c80ac197fa6a	1724	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD2);
mbed_official	330:c80ac197fa6a	1725	break;
mbed_official	330:c80ac197fa6a	1726
mbed_official	330:c80ac197fa6a	1727	/* Check analog watchdog 3 flag */
mbed_official	330:c80ac197fa6a	1728	case AWD3_EVENT:
mbed_official	330:c80ac197fa6a	1729	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1730	hadc->State = HAL_ADC_STATE_AWD3;
mbed_official	330:c80ac197fa6a	1731
mbed_official	330:c80ac197fa6a	1732	/* Clear ADC analog watchdog flag */
mbed_official	330:c80ac197fa6a	1733	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD3);
mbed_official	330:c80ac197fa6a	1734	break;
mbed_official	330:c80ac197fa6a	1735
mbed_official	330:c80ac197fa6a	1736	/* Injected context queue overflow event */
mbed_official	330:c80ac197fa6a	1737	case JQOVF_EVENT:
mbed_official	330:c80ac197fa6a	1738	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1739	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	1740
mbed_official	330:c80ac197fa6a	1741	/* Set ADC error code to Injected context queue overflow */
mbed_official	330:c80ac197fa6a	1742	hadc->ErrorCode \|= HAL_ADC_ERROR_JQOVF;
mbed_official	330:c80ac197fa6a	1743
mbed_official	330:c80ac197fa6a	1744	/* Clear ADC Injected context queue overflow flag */
mbed_official	330:c80ac197fa6a	1745	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JQOVF);
mbed_official	330:c80ac197fa6a	1746	break;
mbed_official	330:c80ac197fa6a	1747
mbed_official	330:c80ac197fa6a	1748	/* Overrun event */
mbed_official	330:c80ac197fa6a	1749	default: /* Case OVR_EVENT */
mbed_official	330:c80ac197fa6a	1750	/* If overrun is set to overwrite previous data, overrun event is not */
mbed_official	330:c80ac197fa6a	1751	/* considered as an error. */
mbed_official	330:c80ac197fa6a	1752	/* (cf ref manual "Managing conversions without using the DMA and without */
mbed_official	330:c80ac197fa6a	1753	/* overrun ") */
mbed_official	330:c80ac197fa6a	1754	if (hadc->Init.Overrun == OVR_DATA_PRESERVED)
mbed_official	330:c80ac197fa6a	1755	{
mbed_official	330:c80ac197fa6a	1756	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1757	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	1758
mbed_official	330:c80ac197fa6a	1759	/* Set ADC error code to overrun */
mbed_official	330:c80ac197fa6a	1760	hadc->ErrorCode \|= HAL_ADC_ERROR_OVR;
mbed_official	330:c80ac197fa6a	1761	}
mbed_official	330:c80ac197fa6a	1762
mbed_official	330:c80ac197fa6a	1763	/* Clear ADC Overrun flag */
mbed_official	330:c80ac197fa6a	1764	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
mbed_official	330:c80ac197fa6a	1765	break;
mbed_official	330:c80ac197fa6a	1766	}
mbed_official	330:c80ac197fa6a	1767
mbed_official	330:c80ac197fa6a	1768	/* Return ADC state */
mbed_official	330:c80ac197fa6a	1769	return HAL_OK;
mbed_official	330:c80ac197fa6a	1770	}
mbed_official	330:c80ac197fa6a	1771	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	1772	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	1773	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	1774	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	1775
mbed_official	330:c80ac197fa6a	1776	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	1777	/**
mbed_official	330:c80ac197fa6a	1778	* @brief Poll for conversion event.
mbed_official	330:c80ac197fa6a	1779	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1780	* @param EventType: the ADC event type.
mbed_official	330:c80ac197fa6a	1781	* This parameter can be one of the following values:
mbed_official	330:c80ac197fa6a	1782	* @arg AWD_EVENT: ADC Analog watchdog event.
mbed_official	330:c80ac197fa6a	1783	* @param Timeout: Timeout value in millisecond.
mbed_official	330:c80ac197fa6a	1784	* @retval HAL status
mbed_official	330:c80ac197fa6a	1785	*/
mbed_official	330:c80ac197fa6a	1786	HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
mbed_official	330:c80ac197fa6a	1787	{
mbed_official	330:c80ac197fa6a	1788	uint32_t tickstart;
mbed_official	330:c80ac197fa6a	1789
mbed_official	330:c80ac197fa6a	1790	/* Check the parameters */
mbed_official	330:c80ac197fa6a	1791	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	1792	assert_param(IS_ADC_EVENT_TYPE(EventType));
mbed_official	330:c80ac197fa6a	1793
mbed_official	330:c80ac197fa6a	1794	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	1795
mbed_official	330:c80ac197fa6a	1796	/* Check selected event flag */
mbed_official	330:c80ac197fa6a	1797	while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
mbed_official	330:c80ac197fa6a	1798	{
mbed_official	330:c80ac197fa6a	1799	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	330:c80ac197fa6a	1800	if(Timeout != HAL_MAX_DELAY)
mbed_official	330:c80ac197fa6a	1801	{
mbed_official	330:c80ac197fa6a	1802	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	330:c80ac197fa6a	1803	{
mbed_official	330:c80ac197fa6a	1804	/* Update ADC state machine to timeout */
mbed_official	330:c80ac197fa6a	1805	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	330:c80ac197fa6a	1806
mbed_official	330:c80ac197fa6a	1807	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1808	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1809
mbed_official	330:c80ac197fa6a	1810	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	1811	}
mbed_official	330:c80ac197fa6a	1812	}
mbed_official	330:c80ac197fa6a	1813	}
mbed_official	330:c80ac197fa6a	1814
mbed_official	330:c80ac197fa6a	1815	/* Analog watchdog (level out of window) event */
mbed_official	330:c80ac197fa6a	1816	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1817	hadc->State = HAL_ADC_STATE_AWD;
mbed_official	330:c80ac197fa6a	1818
mbed_official	330:c80ac197fa6a	1819	/* Clear ADC analog watchdog flag */
mbed_official	330:c80ac197fa6a	1820	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
mbed_official	330:c80ac197fa6a	1821
mbed_official	330:c80ac197fa6a	1822	/* Return ADC state */
mbed_official	330:c80ac197fa6a	1823	return HAL_OK;
mbed_official	330:c80ac197fa6a	1824	}
mbed_official	330:c80ac197fa6a	1825	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	1826
mbed_official	330:c80ac197fa6a	1827	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	1828	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	1829	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	1830	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	1831	/**
mbed_official	330:c80ac197fa6a	1832	* @brief Enables ADC, starts conversion of regular group with interruption.
mbed_official	330:c80ac197fa6a	1833	* Interruptions enabled in this function: EOC (end of conversion),
mbed_official	330:c80ac197fa6a	1834	* overrun (if available).
mbed_official	330:c80ac197fa6a	1835	* Each of these interruptions has its dedicated callback function.
mbed_official	330:c80ac197fa6a	1836	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	330:c80ac197fa6a	1837	* function must be called for ADC slave first, then ADC master.
mbed_official	330:c80ac197fa6a	1838	* For ADC slave, ADC is enabled only (conversion is not started).
mbed_official	330:c80ac197fa6a	1839	* For ADC master, ADC is enabled and multimode conversion is started.
mbed_official	330:c80ac197fa6a	1840	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1841	* @retval HAL status
mbed_official	330:c80ac197fa6a	1842	*/
mbed_official	330:c80ac197fa6a	1843	HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	1844	{
mbed_official	330:c80ac197fa6a	1845	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	1846
mbed_official	330:c80ac197fa6a	1847	/* Check the parameters */
mbed_official	330:c80ac197fa6a	1848	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	1849
mbed_official	330:c80ac197fa6a	1850	/* Process locked */
mbed_official	330:c80ac197fa6a	1851	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	1852
mbed_official	330:c80ac197fa6a	1853	/* Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	1854	tmpHALStatus = ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	1855
mbed_official	330:c80ac197fa6a	1856	/* Start conversion if ADC is effectively enabled */
mbed_official	330:c80ac197fa6a	1857	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	1858	{
mbed_official	330:c80ac197fa6a	1859	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	330:c80ac197fa6a	1860	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	330:c80ac197fa6a	1861	{
mbed_official	330:c80ac197fa6a	1862	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1863	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	330:c80ac197fa6a	1864	}
mbed_official	330:c80ac197fa6a	1865	else
mbed_official	330:c80ac197fa6a	1866	{
mbed_official	330:c80ac197fa6a	1867	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1868	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	330:c80ac197fa6a	1869	}
mbed_official	330:c80ac197fa6a	1870
mbed_official	330:c80ac197fa6a	1871	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	1872	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	1873
mbed_official	330:c80ac197fa6a	1874	/* Clear regular group conversion flag and overrun flag */
mbed_official	330:c80ac197fa6a	1875	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	330:c80ac197fa6a	1876	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
mbed_official	330:c80ac197fa6a	1877
mbed_official	330:c80ac197fa6a	1878	/* Enable ADC end of conversion interrupt */
mbed_official	330:c80ac197fa6a	1879	/* Enable ADC overrun interrupt */
mbed_official	330:c80ac197fa6a	1880	switch(hadc->Init.EOCSelection)
mbed_official	330:c80ac197fa6a	1881	{
mbed_official	330:c80ac197fa6a	1882	case EOC_SEQ_CONV:
mbed_official	330:c80ac197fa6a	1883	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
mbed_official	330:c80ac197fa6a	1884	__HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS \| ADC_IT_OVR));
mbed_official	330:c80ac197fa6a	1885	break;
mbed_official	330:c80ac197fa6a	1886	/* case EOC_SINGLE_CONV */
mbed_official	330:c80ac197fa6a	1887	default:
mbed_official	330:c80ac197fa6a	1888	__HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_EOS \| ADC_IT_OVR));
mbed_official	330:c80ac197fa6a	1889	break;
mbed_official	330:c80ac197fa6a	1890	}
mbed_official	330:c80ac197fa6a	1891
mbed_official	330:c80ac197fa6a	1892	/* Enable conversion of regular group. */
mbed_official	330:c80ac197fa6a	1893	/* If software start has been selected, conversion starts immediately. */
mbed_official	330:c80ac197fa6a	1894	/* If external trigger has been selected, conversion will start at next */
mbed_official	330:c80ac197fa6a	1895	/* trigger event. */
mbed_official	330:c80ac197fa6a	1896	/* Case of multimode enabled (for devices with several ADCs): if ADC is */
mbed_official	330:c80ac197fa6a	1897	/* slave, ADC is enabled only (conversion is not started). If ADC is */
mbed_official	330:c80ac197fa6a	1898	/* master, ADC is enabled and conversion is started. */
mbed_official	330:c80ac197fa6a	1899	if (__HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) )
mbed_official	330:c80ac197fa6a	1900	{
mbed_official	330:c80ac197fa6a	1901	hadc->Instance->CR \|= ADC_CR_ADSTART;
mbed_official	330:c80ac197fa6a	1902	}
mbed_official	330:c80ac197fa6a	1903	}
mbed_official	330:c80ac197fa6a	1904
mbed_official	330:c80ac197fa6a	1905	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1906	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1907
mbed_official	330:c80ac197fa6a	1908	/* Return function status */
mbed_official	330:c80ac197fa6a	1909	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	1910	}
mbed_official	330:c80ac197fa6a	1911	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	1912	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	1913	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	1914	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	1915
mbed_official	330:c80ac197fa6a	1916	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	1917	/**
mbed_official	330:c80ac197fa6a	1918	* @brief Enables ADC, starts conversion of regular group with interruption.
mbed_official	330:c80ac197fa6a	1919	* Interruptions enabled in this function: EOC (end of conversion),
mbed_official	330:c80ac197fa6a	1920	* overrun (if available).
mbed_official	330:c80ac197fa6a	1921	* Each of these interruptions has its dedicated callback function.
mbed_official	330:c80ac197fa6a	1922	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1923	* @retval HAL status
mbed_official	330:c80ac197fa6a	1924	*/
mbed_official	330:c80ac197fa6a	1925	HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	1926	{
mbed_official	330:c80ac197fa6a	1927	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	1928
mbed_official	330:c80ac197fa6a	1929	/* Check the parameters */
mbed_official	330:c80ac197fa6a	1930	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	1931
mbed_official	330:c80ac197fa6a	1932	/* Process locked */
mbed_official	330:c80ac197fa6a	1933	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	1934
mbed_official	330:c80ac197fa6a	1935	/* Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	1936	tmpHALStatus = ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	1937
mbed_official	330:c80ac197fa6a	1938	/* Start conversion if ADC is effectively enabled */
mbed_official	330:c80ac197fa6a	1939	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	1940	{
mbed_official	330:c80ac197fa6a	1941	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	330:c80ac197fa6a	1942	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	330:c80ac197fa6a	1943	{
mbed_official	330:c80ac197fa6a	1944	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1945	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	330:c80ac197fa6a	1946	}
mbed_official	330:c80ac197fa6a	1947	else
mbed_official	330:c80ac197fa6a	1948	{
mbed_official	330:c80ac197fa6a	1949	/* Change ADC state */
mbed_official	330:c80ac197fa6a	1950	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	330:c80ac197fa6a	1951	}
mbed_official	330:c80ac197fa6a	1952
mbed_official	330:c80ac197fa6a	1953	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	1954	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	1955
mbed_official	330:c80ac197fa6a	1956	/* Clear regular group conversion flag and overrun flag */
mbed_official	330:c80ac197fa6a	1957	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	330:c80ac197fa6a	1958	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
mbed_official	330:c80ac197fa6a	1959
mbed_official	330:c80ac197fa6a	1960	/* Enable end of conversion interrupt for regular group */
mbed_official	330:c80ac197fa6a	1961	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC);
mbed_official	330:c80ac197fa6a	1962
mbed_official	330:c80ac197fa6a	1963	/* Start conversion of regular group if software start has been selected. */
mbed_official	330:c80ac197fa6a	1964	/* If external trigger has been selected, conversion will start at next */
mbed_official	330:c80ac197fa6a	1965	/* trigger event. */
mbed_official	330:c80ac197fa6a	1966	if (__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc))
mbed_official	330:c80ac197fa6a	1967	{
mbed_official	330:c80ac197fa6a	1968	/* Start ADC conversion on regular group */
mbed_official	330:c80ac197fa6a	1969	hadc->Instance->CR2 \|= ADC_CR2_SWSTART;
mbed_official	330:c80ac197fa6a	1970	}
mbed_official	330:c80ac197fa6a	1971	}
mbed_official	330:c80ac197fa6a	1972
mbed_official	330:c80ac197fa6a	1973	/* Process unlocked */
mbed_official	330:c80ac197fa6a	1974	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	1975
mbed_official	330:c80ac197fa6a	1976	/* Return function status */
mbed_official	330:c80ac197fa6a	1977	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	1978	}
mbed_official	330:c80ac197fa6a	1979	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	1980
mbed_official	330:c80ac197fa6a	1981	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	1982	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	1983	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	1984	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	1985	/**
mbed_official	330:c80ac197fa6a	1986	* @brief Stop ADC conversion of regular group (and injected group in
mbed_official	330:c80ac197fa6a	1987	* case of auto_injection mode), disable interruption of
mbed_official	330:c80ac197fa6a	1988	* end-of-conversion, disable ADC peripheral.
mbed_official	330:c80ac197fa6a	1989	* @note: ADC peripheral disable is forcing interruption of potential
mbed_official	330:c80ac197fa6a	1990	* conversion on injected group. If injected group is under use, it
mbed_official	330:c80ac197fa6a	1991	* should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
mbed_official	330:c80ac197fa6a	1992	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	1993	* @retval HAL status.
mbed_official	330:c80ac197fa6a	1994	*/
mbed_official	330:c80ac197fa6a	1995	HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	1996	{
mbed_official	330:c80ac197fa6a	1997	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	1998
mbed_official	330:c80ac197fa6a	1999	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2000	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2001
mbed_official	330:c80ac197fa6a	2002	/* Process locked */
mbed_official	330:c80ac197fa6a	2003	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	2004
mbed_official	330:c80ac197fa6a	2005	/* 1. Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	2006	tmpHALStatus = ADC_ConversionStop(hadc, REGULAR_INJECTED_GROUP);
mbed_official	330:c80ac197fa6a	2007
mbed_official	330:c80ac197fa6a	2008	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	330:c80ac197fa6a	2009	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	2010	{
mbed_official	330:c80ac197fa6a	2011	/* Disable ADC end of conversion interrupt for regular group */
mbed_official	330:c80ac197fa6a	2012	/* Disable ADC overrun interrupt */
mbed_official	330:c80ac197fa6a	2013	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_EOS \| ADC_IT_OVR));
mbed_official	330:c80ac197fa6a	2014
mbed_official	330:c80ac197fa6a	2015	/* 2. Disable the ADC peripheral */
mbed_official	330:c80ac197fa6a	2016	tmpHALStatus = ADC_Disable(hadc);
mbed_official	330:c80ac197fa6a	2017
mbed_official	330:c80ac197fa6a	2018	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	2019	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	2020	{
mbed_official	330:c80ac197fa6a	2021	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2022	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	2023	}
mbed_official	330:c80ac197fa6a	2024	}
mbed_official	330:c80ac197fa6a	2025
mbed_official	330:c80ac197fa6a	2026	/* Process unlocked */
mbed_official	330:c80ac197fa6a	2027	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	2028
mbed_official	330:c80ac197fa6a	2029	/* Return function status */
mbed_official	330:c80ac197fa6a	2030	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	2031	}
mbed_official	330:c80ac197fa6a	2032	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	2033	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	2034	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	2035	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	2036
mbed_official	330:c80ac197fa6a	2037	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	2038	/**
mbed_official	330:c80ac197fa6a	2039	* @brief Stop ADC conversion of regular group (and injected group in
mbed_official	330:c80ac197fa6a	2040	* case of auto_injection mode), disable interrution of
mbed_official	330:c80ac197fa6a	2041	* end-of-conversion, disable ADC peripheral.
mbed_official	330:c80ac197fa6a	2042	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2043	* @retval None
mbed_official	330:c80ac197fa6a	2044	*/
mbed_official	330:c80ac197fa6a	2045	HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	2046	{
mbed_official	330:c80ac197fa6a	2047	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	2048
mbed_official	330:c80ac197fa6a	2049	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2050	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2051
mbed_official	330:c80ac197fa6a	2052	/* Process locked */
mbed_official	330:c80ac197fa6a	2053	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	2054
mbed_official	330:c80ac197fa6a	2055	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	2056	/* Disable ADC peripheral */
mbed_official	330:c80ac197fa6a	2057	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	330:c80ac197fa6a	2058
mbed_official	330:c80ac197fa6a	2059	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	2060	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	2061	{
mbed_official	330:c80ac197fa6a	2062	/* Disable ADC end of conversion interrupt for regular group */
mbed_official	330:c80ac197fa6a	2063	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
mbed_official	330:c80ac197fa6a	2064
mbed_official	330:c80ac197fa6a	2065	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2066	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	2067	}
mbed_official	330:c80ac197fa6a	2068
mbed_official	330:c80ac197fa6a	2069	/* Process unlocked */
mbed_official	330:c80ac197fa6a	2070	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	2071
mbed_official	330:c80ac197fa6a	2072	/* Return function status */
mbed_official	330:c80ac197fa6a	2073	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	2074	}
mbed_official	330:c80ac197fa6a	2075	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	2076
mbed_official	330:c80ac197fa6a	2077	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	2078	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	2079	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	2080	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	2081	/**
mbed_official	330:c80ac197fa6a	2082	* @brief Enables ADC, starts conversion of regular group and transfers result
mbed_official	330:c80ac197fa6a	2083	* through DMA.
mbed_official	330:c80ac197fa6a	2084	* Interruptions enabled in this function:
mbed_official	330:c80ac197fa6a	2085	* overrun (if available), DMA half transfer, DMA transfer complete.
mbed_official	330:c80ac197fa6a	2086	* Each of these interruptions has its dedicated callback function.
mbed_official	330:c80ac197fa6a	2087	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	330:c80ac197fa6a	2088	* function is for single-ADC mode only. For multimode, use the
mbed_official	330:c80ac197fa6a	2089	* dedicated MultimodeStart function.
mbed_official	330:c80ac197fa6a	2090	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2091	* @param pData: The destination Buffer address.
mbed_official	330:c80ac197fa6a	2092	* @param Length: The length of data to be transferred from ADC peripheral to memory.
mbed_official	330:c80ac197fa6a	2093	* @retval None
mbed_official	330:c80ac197fa6a	2094	*/
mbed_official	330:c80ac197fa6a	2095	HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
mbed_official	330:c80ac197fa6a	2096	{
mbed_official	330:c80ac197fa6a	2097	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	2098
mbed_official	330:c80ac197fa6a	2099	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2100	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2101
mbed_official	330:c80ac197fa6a	2102	/* Process locked */
mbed_official	330:c80ac197fa6a	2103	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	2104
mbed_official	330:c80ac197fa6a	2105	/* Verification if multimode is disabled (for devices with several ADC) */
mbed_official	330:c80ac197fa6a	2106	/* If multimode is enabled, dedicated function multimode conversion */
mbed_official	330:c80ac197fa6a	2107	/* start DMA must be used. */
mbed_official	330:c80ac197fa6a	2108	if(__HAL_ADC_COMMON_CCR_MULTI(hadc) == RESET)
mbed_official	330:c80ac197fa6a	2109	{
mbed_official	330:c80ac197fa6a	2110
mbed_official	330:c80ac197fa6a	2111	/* Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	2112	tmpHALStatus = ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	2113
mbed_official	330:c80ac197fa6a	2114	/* Start conversion if ADC is effectively enabled */
mbed_official	330:c80ac197fa6a	2115	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	2116	{
mbed_official	330:c80ac197fa6a	2117	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	330:c80ac197fa6a	2118	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	330:c80ac197fa6a	2119	{
mbed_official	330:c80ac197fa6a	2120	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2121	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	330:c80ac197fa6a	2122	}
mbed_official	330:c80ac197fa6a	2123	else
mbed_official	330:c80ac197fa6a	2124	{
mbed_official	330:c80ac197fa6a	2125	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2126	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	330:c80ac197fa6a	2127	}
mbed_official	330:c80ac197fa6a	2128
mbed_official	330:c80ac197fa6a	2129	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	2130	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	2131
mbed_official	330:c80ac197fa6a	2132
mbed_official	330:c80ac197fa6a	2133	/* Set the DMA transfer complete callback */
mbed_official	330:c80ac197fa6a	2134	hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
mbed_official	330:c80ac197fa6a	2135
mbed_official	330:c80ac197fa6a	2136	/* Set the DMA half transfer complete callback */
mbed_official	330:c80ac197fa6a	2137	hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
mbed_official	330:c80ac197fa6a	2138
mbed_official	330:c80ac197fa6a	2139	/* Set the DMA error callback */
mbed_official	330:c80ac197fa6a	2140	hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
mbed_official	330:c80ac197fa6a	2141
mbed_official	330:c80ac197fa6a	2142
mbed_official	330:c80ac197fa6a	2143	/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
mbed_official	330:c80ac197fa6a	2144	/* start (in case of SW start): */
mbed_official	330:c80ac197fa6a	2145
mbed_official	330:c80ac197fa6a	2146	/* Clear regular group conversion flag and overrun flag */
mbed_official	330:c80ac197fa6a	2147	/* (To ensure of no unknown state from potential previous ADC */
mbed_official	330:c80ac197fa6a	2148	/* operations) */
mbed_official	330:c80ac197fa6a	2149	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
mbed_official	330:c80ac197fa6a	2150
mbed_official	330:c80ac197fa6a	2151	/* Enable ADC overrun interrupt */
mbed_official	330:c80ac197fa6a	2152	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
mbed_official	330:c80ac197fa6a	2153
mbed_official	330:c80ac197fa6a	2154	/* Enable ADC DMA mode */
mbed_official	330:c80ac197fa6a	2155	hadc->Instance->CFGR \|= ADC_CFGR_DMAEN;
mbed_official	330:c80ac197fa6a	2156
mbed_official	330:c80ac197fa6a	2157	/* Start the DMA channel */
mbed_official	330:c80ac197fa6a	2158	HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
mbed_official	330:c80ac197fa6a	2159
mbed_official	330:c80ac197fa6a	2160	/* Enable conversion of regular group. */
mbed_official	330:c80ac197fa6a	2161	/* If software start has been selected, conversion starts immediately. */
mbed_official	330:c80ac197fa6a	2162	/* If external trigger has been selected, conversion will start at next */
mbed_official	330:c80ac197fa6a	2163	/* trigger event. */
mbed_official	330:c80ac197fa6a	2164	hadc->Instance->CR \|= ADC_CR_ADSTART;
mbed_official	330:c80ac197fa6a	2165
mbed_official	330:c80ac197fa6a	2166	}
mbed_official	330:c80ac197fa6a	2167	}
mbed_official	330:c80ac197fa6a	2168	else
mbed_official	330:c80ac197fa6a	2169	{
mbed_official	330:c80ac197fa6a	2170	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	2171	}
mbed_official	330:c80ac197fa6a	2172
mbed_official	330:c80ac197fa6a	2173	/* Process unlocked */
mbed_official	330:c80ac197fa6a	2174	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	2175
mbed_official	330:c80ac197fa6a	2176	/* Return function status */
mbed_official	330:c80ac197fa6a	2177	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	2178	}
mbed_official	330:c80ac197fa6a	2179	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	2180	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	2181	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	2182	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	2183
mbed_official	330:c80ac197fa6a	2184	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	2185	/**
mbed_official	330:c80ac197fa6a	2186	* @brief Enables ADC, starts conversion of regular group and transfers result
mbed_official	330:c80ac197fa6a	2187	* through DMA.
mbed_official	330:c80ac197fa6a	2188	* Interruptions enabled in this function:
mbed_official	330:c80ac197fa6a	2189	* overrun (if available), DMA half transfer, DMA transfer complete.
mbed_official	330:c80ac197fa6a	2190	* Each of these interruptions has its dedicated callback function.
mbed_official	330:c80ac197fa6a	2191	* @note For devices with several ADCs: This function is for single-ADC mode
mbed_official	330:c80ac197fa6a	2192	* only. For multimode, use the dedicated MultimodeStart function.
mbed_official	330:c80ac197fa6a	2193	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2194	* @param pData: The destination Buffer address.
mbed_official	330:c80ac197fa6a	2195	* @param Length: The length of data to be transferred from ADC peripheral to memory.
mbed_official	330:c80ac197fa6a	2196	* @retval None
mbed_official	330:c80ac197fa6a	2197	*/
mbed_official	330:c80ac197fa6a	2198	HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
mbed_official	330:c80ac197fa6a	2199	{
mbed_official	330:c80ac197fa6a	2200	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	2201
mbed_official	330:c80ac197fa6a	2202	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2203	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2204
mbed_official	330:c80ac197fa6a	2205	/* Process locked */
mbed_official	330:c80ac197fa6a	2206	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	2207
mbed_official	330:c80ac197fa6a	2208	/* Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	2209	tmpHALStatus = ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	2210
mbed_official	330:c80ac197fa6a	2211	/* Start conversion if ADC is effectively enabled */
mbed_official	330:c80ac197fa6a	2212	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	2213	{
mbed_official	330:c80ac197fa6a	2214	/* State machine update: Check if an injected conversion is ongoing */
mbed_official	330:c80ac197fa6a	2215	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	330:c80ac197fa6a	2216	{
mbed_official	330:c80ac197fa6a	2217	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2218	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	330:c80ac197fa6a	2219	}
mbed_official	330:c80ac197fa6a	2220	else
mbed_official	330:c80ac197fa6a	2221	{
mbed_official	330:c80ac197fa6a	2222	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2223	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	330:c80ac197fa6a	2224	}
mbed_official	330:c80ac197fa6a	2225
mbed_official	330:c80ac197fa6a	2226	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	2227	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	2228
mbed_official	330:c80ac197fa6a	2229
mbed_official	330:c80ac197fa6a	2230	/* Set the DMA transfer complete callback */
mbed_official	330:c80ac197fa6a	2231	hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
mbed_official	330:c80ac197fa6a	2232
mbed_official	330:c80ac197fa6a	2233	/* Set the DMA half transfer complete callback */
mbed_official	330:c80ac197fa6a	2234	hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
mbed_official	330:c80ac197fa6a	2235
mbed_official	330:c80ac197fa6a	2236	/* Set the DMA error callback */
mbed_official	330:c80ac197fa6a	2237	hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
mbed_official	330:c80ac197fa6a	2238
mbed_official	330:c80ac197fa6a	2239
mbed_official	330:c80ac197fa6a	2240	/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
mbed_official	330:c80ac197fa6a	2241	/* start (in case of SW start): */
mbed_official	330:c80ac197fa6a	2242
mbed_official	330:c80ac197fa6a	2243	/* Clear regular group conversion flag and overrun flag */
mbed_official	330:c80ac197fa6a	2244	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	330:c80ac197fa6a	2245	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
mbed_official	330:c80ac197fa6a	2246
mbed_official	330:c80ac197fa6a	2247	/* Enable ADC DMA mode */
mbed_official	330:c80ac197fa6a	2248	hadc->Instance->CR2 \|= ADC_CR2_DMA;
mbed_official	330:c80ac197fa6a	2249
mbed_official	330:c80ac197fa6a	2250	/* Start the DMA channel */
mbed_official	330:c80ac197fa6a	2251	HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
mbed_official	330:c80ac197fa6a	2252
mbed_official	330:c80ac197fa6a	2253	/* Start conversion of regular group if software start has been selected. */
mbed_official	330:c80ac197fa6a	2254	/* If external trigger has been selected, conversion will start at next */
mbed_official	330:c80ac197fa6a	2255	/* trigger event. */
mbed_official	330:c80ac197fa6a	2256	/* Note: Alternate trigger for single conversion could be to force an */
mbed_official	330:c80ac197fa6a	2257	/* additional set of bit ADON "hadc->Instance->CR2 \|= ADC_CR2_ADON;"*/
mbed_official	330:c80ac197fa6a	2258	if (__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc))
mbed_official	330:c80ac197fa6a	2259	{
mbed_official	330:c80ac197fa6a	2260	/* Start ADC conversion on regular group */
mbed_official	330:c80ac197fa6a	2261	hadc->Instance->CR2 \|= ADC_CR2_SWSTART;
mbed_official	330:c80ac197fa6a	2262	}
mbed_official	330:c80ac197fa6a	2263	}
mbed_official	330:c80ac197fa6a	2264
mbed_official	330:c80ac197fa6a	2265	/* Process unlocked */
mbed_official	330:c80ac197fa6a	2266	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	2267
mbed_official	330:c80ac197fa6a	2268	/* Return function status */
mbed_official	330:c80ac197fa6a	2269	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	2270	}
mbed_official	330:c80ac197fa6a	2271	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	2272
mbed_official	330:c80ac197fa6a	2273	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	2274	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	2275	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	2276	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	2277	/**
mbed_official	330:c80ac197fa6a	2278	* @brief Stop ADC conversion of regular group (and injected channels in
mbed_official	330:c80ac197fa6a	2279	* case of auto_injection mode), disable ADC DMA transfer, disable
mbed_official	330:c80ac197fa6a	2280	* ADC peripheral.
mbed_official	330:c80ac197fa6a	2281	* Each of these interruptions has its dedicated callback function.
mbed_official	330:c80ac197fa6a	2282	* @note: ADC peripheral disable is forcing interruption of potential
mbed_official	330:c80ac197fa6a	2283	* conversion on injected group. If injected group is under use, it
mbed_official	330:c80ac197fa6a	2284	* should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
mbed_official	330:c80ac197fa6a	2285	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	330:c80ac197fa6a	2286	* function is for single-ADC mode only. For multimode, use the
mbed_official	330:c80ac197fa6a	2287	* dedicated MultimodeStop function.
mbed_official	330:c80ac197fa6a	2288	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2289	* @retval HAL status.
mbed_official	330:c80ac197fa6a	2290	*/
mbed_official	330:c80ac197fa6a	2291	HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	2292	{
mbed_official	330:c80ac197fa6a	2293	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	2294
mbed_official	330:c80ac197fa6a	2295	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2296	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2297
mbed_official	330:c80ac197fa6a	2298	/* Process locked */
mbed_official	330:c80ac197fa6a	2299	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	2300
mbed_official	330:c80ac197fa6a	2301	/* 1. Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	2302	tmpHALStatus = ADC_ConversionStop(hadc, REGULAR_INJECTED_GROUP);
mbed_official	330:c80ac197fa6a	2303
mbed_official	330:c80ac197fa6a	2304	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	330:c80ac197fa6a	2305	if (tmpHALStatus == HAL_OK)
mbed_official	330:c80ac197fa6a	2306	{
mbed_official	330:c80ac197fa6a	2307	/* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
mbed_official	330:c80ac197fa6a	2308	hadc->Instance->CFGR &= ~ADC_CFGR_DMAEN;
mbed_official	330:c80ac197fa6a	2309
mbed_official	330:c80ac197fa6a	2310	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
mbed_official	330:c80ac197fa6a	2311	/* while DMA transfer is on going) */
mbed_official	330:c80ac197fa6a	2312	tmpHALStatus = HAL_DMA_Abort(hadc->DMA_Handle);
mbed_official	330:c80ac197fa6a	2313
mbed_official	330:c80ac197fa6a	2314	/* Check if DMA channel effectively disabled */
mbed_official	330:c80ac197fa6a	2315	if (tmpHALStatus != HAL_OK)
mbed_official	330:c80ac197fa6a	2316	{
mbed_official	330:c80ac197fa6a	2317	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	2318	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	2319	}
mbed_official	330:c80ac197fa6a	2320
mbed_official	330:c80ac197fa6a	2321	/* Disable ADC overrun interrupt */
mbed_official	330:c80ac197fa6a	2322	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
mbed_official	330:c80ac197fa6a	2323
mbed_official	330:c80ac197fa6a	2324	/* 2. Disable the ADC peripheral */
mbed_official	330:c80ac197fa6a	2325	/* Update "tmpHALStatus" only if DMA channel disabling passed, to keep in */
mbed_official	330:c80ac197fa6a	2326	/* memory a potential failing status. */
mbed_official	330:c80ac197fa6a	2327	if (tmpHALStatus == HAL_OK)
mbed_official	330:c80ac197fa6a	2328	{
mbed_official	330:c80ac197fa6a	2329	tmpHALStatus = ADC_Disable(hadc);
mbed_official	330:c80ac197fa6a	2330	}
mbed_official	330:c80ac197fa6a	2331	else
mbed_official	330:c80ac197fa6a	2332	{
mbed_official	330:c80ac197fa6a	2333	ADC_Disable(hadc);
mbed_official	330:c80ac197fa6a	2334	}
mbed_official	330:c80ac197fa6a	2335
mbed_official	330:c80ac197fa6a	2336	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	2337	if (tmpHALStatus == HAL_OK)
mbed_official	330:c80ac197fa6a	2338	{
mbed_official	330:c80ac197fa6a	2339	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2340	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	2341	}
mbed_official	330:c80ac197fa6a	2342
mbed_official	330:c80ac197fa6a	2343	}
mbed_official	330:c80ac197fa6a	2344
mbed_official	330:c80ac197fa6a	2345	/* Process unlocked */
mbed_official	330:c80ac197fa6a	2346	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	2347
mbed_official	330:c80ac197fa6a	2348	/* Return function status */
mbed_official	330:c80ac197fa6a	2349	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	2350	}
mbed_official	330:c80ac197fa6a	2351	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	2352	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	2353	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	2354	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	2355
mbed_official	330:c80ac197fa6a	2356	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	2357	/**
mbed_official	330:c80ac197fa6a	2358	* @brief Stop ADC conversion of regular group (and injected group in
mbed_official	330:c80ac197fa6a	2359	* case of auto_injection mode), disable ADC DMA transfer, disable
mbed_official	330:c80ac197fa6a	2360	* ADC peripheral.
mbed_official	330:c80ac197fa6a	2361	* @note: ADC peripheral disable is forcing interruption of potential
mbed_official	330:c80ac197fa6a	2362	* conversion on injected group. If injected group is under use, it
mbed_official	330:c80ac197fa6a	2363	* should be preliminarily stopped using HAL_ADCEx_InjectedStop function.
mbed_official	330:c80ac197fa6a	2364	* @note For devices with several ADCs: This function is for single-ADC mode
mbed_official	330:c80ac197fa6a	2365	* only. For multimode, use the dedicated MultimodeStop function.
mbed_official	330:c80ac197fa6a	2366	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2367	* @retval HAL status.
mbed_official	330:c80ac197fa6a	2368	*/
mbed_official	330:c80ac197fa6a	2369	HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	2370	{
mbed_official	330:c80ac197fa6a	2371	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	2372
mbed_official	330:c80ac197fa6a	2373	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2374	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2375
mbed_official	330:c80ac197fa6a	2376	/* Process locked */
mbed_official	330:c80ac197fa6a	2377	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	2378
mbed_official	330:c80ac197fa6a	2379	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	2380	/* Disable ADC peripheral */
mbed_official	330:c80ac197fa6a	2381	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	330:c80ac197fa6a	2382
mbed_official	330:c80ac197fa6a	2383	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	2384	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	2385	{
mbed_official	330:c80ac197fa6a	2386	/* Disable ADC DMA mode */
mbed_official	330:c80ac197fa6a	2387	hadc->Instance->CR2 &= ~ADC_CR2_DMA;
mbed_official	330:c80ac197fa6a	2388
mbed_official	330:c80ac197fa6a	2389	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
mbed_official	330:c80ac197fa6a	2390	/* while DMA transfer is on going) */
mbed_official	330:c80ac197fa6a	2391	tmpHALStatus = HAL_DMA_Abort(hadc->DMA_Handle);
mbed_official	330:c80ac197fa6a	2392
mbed_official	330:c80ac197fa6a	2393	/* Check if DMA channel effectively disabled */
mbed_official	330:c80ac197fa6a	2394	if (tmpHALStatus == HAL_OK)
mbed_official	330:c80ac197fa6a	2395	{
mbed_official	330:c80ac197fa6a	2396	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2397	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	2398	}
mbed_official	330:c80ac197fa6a	2399	else
mbed_official	330:c80ac197fa6a	2400	{
mbed_official	330:c80ac197fa6a	2401	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	2402	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	2403	}
mbed_official	330:c80ac197fa6a	2404	}
mbed_official	330:c80ac197fa6a	2405
mbed_official	330:c80ac197fa6a	2406	/* Process unlocked */
mbed_official	330:c80ac197fa6a	2407	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	2408
mbed_official	330:c80ac197fa6a	2409	/* Return function status */
mbed_official	330:c80ac197fa6a	2410	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	2411	}
mbed_official	330:c80ac197fa6a	2412	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	2413
mbed_official	330:c80ac197fa6a	2414	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	2415	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	2416	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	2417	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	2418	/**
mbed_official	330:c80ac197fa6a	2419	* @brief Get ADC regular group conversion result.
mbed_official	330:c80ac197fa6a	2420	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2421	* @retval Converted value
mbed_official	330:c80ac197fa6a	2422	*/
mbed_official	330:c80ac197fa6a	2423	uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	2424	{
mbed_official	330:c80ac197fa6a	2425	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2426	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2427
mbed_official	330:c80ac197fa6a	2428	/* Note: EOC flag is automatically cleared by hardware when reading */
mbed_official	330:c80ac197fa6a	2429	/* register DR. Additionally, clear flag EOS by software. */
mbed_official	330:c80ac197fa6a	2430
mbed_official	330:c80ac197fa6a	2431	/* Clear regular group conversion flag */
mbed_official	330:c80ac197fa6a	2432	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS) );
mbed_official	330:c80ac197fa6a	2433
mbed_official	330:c80ac197fa6a	2434	/* Return ADC converted value */
mbed_official	330:c80ac197fa6a	2435	return hadc->Instance->DR;
mbed_official	330:c80ac197fa6a	2436	}
mbed_official	330:c80ac197fa6a	2437	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	2438	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	2439	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	2440	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	2441
mbed_official	330:c80ac197fa6a	2442	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	2443	/**
mbed_official	330:c80ac197fa6a	2444	* @brief Get ADC regular group conversion result.
mbed_official	330:c80ac197fa6a	2445	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2446	* @retval Converted value
mbed_official	330:c80ac197fa6a	2447	*/
mbed_official	330:c80ac197fa6a	2448	uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	2449	{
mbed_official	330:c80ac197fa6a	2450	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2451	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2452
mbed_official	330:c80ac197fa6a	2453	/* Note: EOC flag is not cleared here by software because automatically */
mbed_official	330:c80ac197fa6a	2454	/* cleared by hardware when reading register DR. */
mbed_official	330:c80ac197fa6a	2455
mbed_official	330:c80ac197fa6a	2456	/* Return ADC converted value */
mbed_official	330:c80ac197fa6a	2457	return hadc->Instance->DR;
mbed_official	330:c80ac197fa6a	2458	}
mbed_official	330:c80ac197fa6a	2459	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	2460
mbed_official	330:c80ac197fa6a	2461	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	2462	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	2463	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	2464	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	2465	/**
mbed_official	330:c80ac197fa6a	2466	* @brief Handles ADC interrupt request.
mbed_official	330:c80ac197fa6a	2467	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2468	* @retval None
mbed_official	330:c80ac197fa6a	2469	*/
mbed_official	330:c80ac197fa6a	2470	void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	2471	{
mbed_official	330:c80ac197fa6a	2472	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2473	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2474	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official	330:c80ac197fa6a	2475	assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
mbed_official	330:c80ac197fa6a	2476
mbed_official	330:c80ac197fa6a	2477	/* ========== Check End of Conversion flag for regular group ========== */
mbed_official	330:c80ac197fa6a	2478	if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) \|\|
mbed_official	330:c80ac197fa6a	2479	(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) )
mbed_official	330:c80ac197fa6a	2480	{
mbed_official	330:c80ac197fa6a	2481	/* Update state machine on conversion status if not in error state */
mbed_official	330:c80ac197fa6a	2482	if(hadc->State != HAL_ADC_STATE_ERROR)
mbed_official	330:c80ac197fa6a	2483	{
mbed_official	330:c80ac197fa6a	2484	/* Check if an injected conversion is ready */
mbed_official	330:c80ac197fa6a	2485	if(hadc->State == HAL_ADC_STATE_EOC_INJ)
mbed_official	330:c80ac197fa6a	2486	{
mbed_official	330:c80ac197fa6a	2487	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2488	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	330:c80ac197fa6a	2489	}
mbed_official	330:c80ac197fa6a	2490	else
mbed_official	330:c80ac197fa6a	2491	{
mbed_official	330:c80ac197fa6a	2492	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2493	hadc->State = HAL_ADC_STATE_EOC_REG;
mbed_official	330:c80ac197fa6a	2494	}
mbed_official	330:c80ac197fa6a	2495	}
mbed_official	330:c80ac197fa6a	2496
mbed_official	330:c80ac197fa6a	2497	/* Disable interruption if no further conversion upcoming by regular */
mbed_official	330:c80ac197fa6a	2498	/* external trigger or by continuous mode, */
mbed_official	330:c80ac197fa6a	2499	/* and if scan sequence if completed. */
mbed_official	330:c80ac197fa6a	2500	if(__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official	330:c80ac197fa6a	2501	(hadc->Init.ContinuousConvMode == DISABLE) )
mbed_official	330:c80ac197fa6a	2502	{
mbed_official	330:c80ac197fa6a	2503	/* If End of Sequence is reached, disable interrupts */
mbed_official	330:c80ac197fa6a	2504	if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
mbed_official	330:c80ac197fa6a	2505	{
mbed_official	330:c80ac197fa6a	2506	/* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
mbed_official	330:c80ac197fa6a	2507	/* ADSTART==0 (no conversion on going) */
mbed_official	330:c80ac197fa6a	2508	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
mbed_official	330:c80ac197fa6a	2509	{
mbed_official	330:c80ac197fa6a	2510	/* Disable ADC end of sequence conversion interrupt */
mbed_official	330:c80ac197fa6a	2511	/* Note: Overrun interrupt was enabled with EOC interrupt in */
mbed_official	330:c80ac197fa6a	2512	/* HAL_Start_IT(), but is not disabled here because can be used */
mbed_official	330:c80ac197fa6a	2513	/* by overrun IRQ process below. */
mbed_official	330:c80ac197fa6a	2514	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC \| ADC_IT_EOS);
mbed_official	330:c80ac197fa6a	2515	}
mbed_official	330:c80ac197fa6a	2516	else
mbed_official	330:c80ac197fa6a	2517	{
mbed_official	330:c80ac197fa6a	2518	/* Change ADC state to error state */
mbed_official	330:c80ac197fa6a	2519	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	2520
mbed_official	330:c80ac197fa6a	2521	/* Set ADC error code to ADC IP internal error */
mbed_official	330:c80ac197fa6a	2522	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	330:c80ac197fa6a	2523	}
mbed_official	330:c80ac197fa6a	2524	}
mbed_official	330:c80ac197fa6a	2525	}
mbed_official	330:c80ac197fa6a	2526
mbed_official	330:c80ac197fa6a	2527	/* Conversion complete callback */
mbed_official	330:c80ac197fa6a	2528	/* Note: into callback, to determine if conversion has been triggered */
mbed_official	330:c80ac197fa6a	2529	/* from EOC or EOS, possibility to use: */
mbed_official	330:c80ac197fa6a	2530	/* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */
mbed_official	330:c80ac197fa6a	2531	HAL_ADC_ConvCpltCallback(hadc);
mbed_official	330:c80ac197fa6a	2532
mbed_official	330:c80ac197fa6a	2533
mbed_official	330:c80ac197fa6a	2534	/* Clear regular group conversion flag */
mbed_official	330:c80ac197fa6a	2535	/* Note: in case of overrun set to OVR_DATA_PRESERVED, end of conversion */
mbed_official	330:c80ac197fa6a	2536	/* flags clear induces the release of the preserved data. */
mbed_official	330:c80ac197fa6a	2537	/* Therefore, if the preserved data value is needed, it must be */
mbed_official	330:c80ac197fa6a	2538	/* read preliminarily into HAL_ADC_ConvCpltCallback(). */
mbed_official	330:c80ac197fa6a	2539	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS) );
mbed_official	330:c80ac197fa6a	2540	}
mbed_official	330:c80ac197fa6a	2541
mbed_official	330:c80ac197fa6a	2542
mbed_official	330:c80ac197fa6a	2543	/* ========== Check End of Conversion flag for injected group ========== */
mbed_official	330:c80ac197fa6a	2544	if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC)) \|\|
mbed_official	330:c80ac197fa6a	2545	(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOS)) )
mbed_official	330:c80ac197fa6a	2546	{
mbed_official	330:c80ac197fa6a	2547	/* Update state machine on conversion status if not in error state */
mbed_official	330:c80ac197fa6a	2548	if(hadc->State != HAL_ADC_STATE_ERROR)
mbed_official	330:c80ac197fa6a	2549	{
mbed_official	330:c80ac197fa6a	2550	/* Check if a regular conversion is ready */
mbed_official	330:c80ac197fa6a	2551	if(hadc->State == HAL_ADC_STATE_EOC_REG)
mbed_official	330:c80ac197fa6a	2552	{
mbed_official	330:c80ac197fa6a	2553	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2554	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	330:c80ac197fa6a	2555	}
mbed_official	330:c80ac197fa6a	2556	else
mbed_official	330:c80ac197fa6a	2557	{
mbed_official	330:c80ac197fa6a	2558	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2559	hadc->State = HAL_ADC_STATE_EOC_INJ;
mbed_official	330:c80ac197fa6a	2560	}
mbed_official	330:c80ac197fa6a	2561	}
mbed_official	330:c80ac197fa6a	2562
mbed_official	330:c80ac197fa6a	2563	/* Disable interruption if no further conversion upcoming by injected */
mbed_official	330:c80ac197fa6a	2564	/* external trigger or by automatic injected conversion with regular */
mbed_official	330:c80ac197fa6a	2565	/* group having no further conversion upcoming (same conditions as */
mbed_official	330:c80ac197fa6a	2566	/* regular group interruption disabling above), */
mbed_official	330:c80ac197fa6a	2567	/* and if injected scan sequence is completed. */
mbed_official	330:c80ac197fa6a	2568	if(__HAL_ADC_IS_SOFTWARE_START_INJECTED(hadc) \|\|
mbed_official	330:c80ac197fa6a	2569	(HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO) &&
mbed_official	330:c80ac197fa6a	2570	(__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official	330:c80ac197fa6a	2571	(hadc->Init.ContinuousConvMode == DISABLE) ) ) )
mbed_official	330:c80ac197fa6a	2572	{
mbed_official	330:c80ac197fa6a	2573	/* If End of Sequence is reached, disable interrupts */
mbed_official	330:c80ac197fa6a	2574	if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS))
mbed_official	330:c80ac197fa6a	2575	{
mbed_official	330:c80ac197fa6a	2576	/* Allowed to modify bits ADC_IT_JEOC/ADC_IT_JEOS only if bit */
mbed_official	330:c80ac197fa6a	2577	/* JADSTART==0 (no conversion on going) */
mbed_official	330:c80ac197fa6a	2578	if (__HAL_ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
mbed_official	330:c80ac197fa6a	2579	{
mbed_official	330:c80ac197fa6a	2580	/* Disable ADC end of sequence conversion interrupt */
mbed_official	330:c80ac197fa6a	2581	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC \| ADC_IT_JEOS);
mbed_official	330:c80ac197fa6a	2582	}
mbed_official	330:c80ac197fa6a	2583	else
mbed_official	330:c80ac197fa6a	2584	{
mbed_official	330:c80ac197fa6a	2585	/* Change ADC state to error state */
mbed_official	330:c80ac197fa6a	2586	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	2587
mbed_official	330:c80ac197fa6a	2588	/* Set ADC error code to ADC IP internal error */
mbed_official	330:c80ac197fa6a	2589	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	330:c80ac197fa6a	2590	}
mbed_official	330:c80ac197fa6a	2591	}
mbed_official	330:c80ac197fa6a	2592	}
mbed_official	330:c80ac197fa6a	2593
mbed_official	330:c80ac197fa6a	2594	/* Conversion complete callback */
mbed_official	330:c80ac197fa6a	2595	/* Note: into callback, to determine if conversion has been triggered */
mbed_official	330:c80ac197fa6a	2596	/* from JEOC or JEOS, possibility to use: */
mbed_official	330:c80ac197fa6a	2597	/* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_JEOS)) " */
mbed_official	330:c80ac197fa6a	2598	HAL_ADCEx_InjectedConvCpltCallback(hadc);
mbed_official	330:c80ac197fa6a	2599
mbed_official	330:c80ac197fa6a	2600	/* Clear injected group conversion flag */
mbed_official	330:c80ac197fa6a	2601	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC \| ADC_FLAG_JEOS);
mbed_official	330:c80ac197fa6a	2602	}
mbed_official	330:c80ac197fa6a	2603
mbed_official	330:c80ac197fa6a	2604
mbed_official	330:c80ac197fa6a	2605	/* ========== Check Analog watchdog flags ========== */
mbed_official	330:c80ac197fa6a	2606	if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD1) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD1)) \|\|
mbed_official	330:c80ac197fa6a	2607	(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD2) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD2)) \|\|
mbed_official	330:c80ac197fa6a	2608	(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD3) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD3)) )
mbed_official	330:c80ac197fa6a	2609	{
mbed_official	330:c80ac197fa6a	2610
mbed_official	330:c80ac197fa6a	2611	if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD1) != RESET)
mbed_official	330:c80ac197fa6a	2612	{
mbed_official	330:c80ac197fa6a	2613	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2614	hadc->State = HAL_ADC_STATE_AWD;
mbed_official	330:c80ac197fa6a	2615
mbed_official	330:c80ac197fa6a	2616	/* Clear ADC Analog watchdog flag */
mbed_official	330:c80ac197fa6a	2617	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1);
mbed_official	330:c80ac197fa6a	2618	}
mbed_official	330:c80ac197fa6a	2619	else if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD2) != RESET)
mbed_official	330:c80ac197fa6a	2620	{
mbed_official	330:c80ac197fa6a	2621	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2622	hadc->State = HAL_ADC_STATE_AWD2;
mbed_official	330:c80ac197fa6a	2623
mbed_official	330:c80ac197fa6a	2624	/* Clear ADC Analog watchdog flag */
mbed_official	330:c80ac197fa6a	2625	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD2);
mbed_official	330:c80ac197fa6a	2626	}
mbed_official	330:c80ac197fa6a	2627	else if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD3) != RESET)
mbed_official	330:c80ac197fa6a	2628	{
mbed_official	330:c80ac197fa6a	2629	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2630	hadc->State = HAL_ADC_STATE_AWD3;
mbed_official	330:c80ac197fa6a	2631
mbed_official	330:c80ac197fa6a	2632	/* Clear ADC Analog watchdog flag */
mbed_official	330:c80ac197fa6a	2633	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD3);
mbed_official	330:c80ac197fa6a	2634	}
mbed_official	330:c80ac197fa6a	2635	else
mbed_official	330:c80ac197fa6a	2636	{
mbed_official	330:c80ac197fa6a	2637	/* Change ADC state to error state */
mbed_official	330:c80ac197fa6a	2638	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	2639	}
mbed_official	330:c80ac197fa6a	2640
mbed_official	330:c80ac197fa6a	2641	/* Level out of window callback */
mbed_official	330:c80ac197fa6a	2642	/* Note: In case of several analog watchdog enabled, if needed to know */
mbed_official	330:c80ac197fa6a	2643	/* which one triggered and on which ADCx, either: */
mbed_official	330:c80ac197fa6a	2644	/* Test Analog Watchdog flags ADC_FLAG_AWD1/2/3 into function */
mbed_official	330:c80ac197fa6a	2645	/* HAL_ADC_LevelOutOfWindowCallback(). */
mbed_official	330:c80ac197fa6a	2646	/* For example: "if (__HAL_ADC_GET_FLAG(&hadc1, ADC_FLAG_AWD1) != RESET)" */
mbed_official	330:c80ac197fa6a	2647	/* "if (__HAL_ADC_GET_FLAG(&hadc1, ADC_FLAG_AWD2) != RESET)" */
mbed_official	330:c80ac197fa6a	2648	/* "if (__HAL_ADC_GET_FLAG(&hadc1, ADC_FLAG_AWD3) != RESET)" */
mbed_official	330:c80ac197fa6a	2649	/* Test ADC state of Analog Watchdog flags HAL_ADC_STATE_AWD/2/3 into */
mbed_official	330:c80ac197fa6a	2650	/* HAL_ADC_LevelOutOfWindowCallback(). */
mbed_official	330:c80ac197fa6a	2651	/* For example: "if (HAL_ADC_GetState(&hadc1) == HAL_ADC_STATE_AWD) " */
mbed_official	330:c80ac197fa6a	2652	/* "if (HAL_ADC_GetState(&hadc1) == HAL_ADC_STATE_AWD2)" */
mbed_official	330:c80ac197fa6a	2653	/* "if (HAL_ADC_GetState(&hadc1) == HAL_ADC_STATE_AWD3)" */
mbed_official	330:c80ac197fa6a	2654	HAL_ADC_LevelOutOfWindowCallback(hadc);
mbed_official	330:c80ac197fa6a	2655	}
mbed_official	330:c80ac197fa6a	2656
mbed_official	330:c80ac197fa6a	2657
mbed_official	330:c80ac197fa6a	2658	/* ========== Check Overrun flag ========== */
mbed_official	330:c80ac197fa6a	2659	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
mbed_official	330:c80ac197fa6a	2660	{
mbed_official	330:c80ac197fa6a	2661	/* If overrun is set to overwrite previous data (default setting), */
mbed_official	330:c80ac197fa6a	2662	/* overrun event is not considered as an error. */
mbed_official	330:c80ac197fa6a	2663	/* (cf ref manual "Managing conversions without using the DMA and without */
mbed_official	330:c80ac197fa6a	2664	/* overrun ") */
mbed_official	330:c80ac197fa6a	2665	/* Exception for usage with DMA overrun event always considered as an */
mbed_official	330:c80ac197fa6a	2666	/* error. */
mbed_official	330:c80ac197fa6a	2667	if ((hadc->Init.Overrun == OVR_DATA_PRESERVED) \|\|
mbed_official	330:c80ac197fa6a	2668	HAL_IS_BIT_SET(hadc->Instance->CFGR, ADC_CFGR_DMAEN) )
mbed_official	330:c80ac197fa6a	2669	{
mbed_official	330:c80ac197fa6a	2670	/* Change ADC state to error state */
mbed_official	330:c80ac197fa6a	2671	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	2672
mbed_official	330:c80ac197fa6a	2673	/* Set ADC error code to overrun */
mbed_official	330:c80ac197fa6a	2674	hadc->ErrorCode \|= HAL_ADC_ERROR_OVR;
mbed_official	330:c80ac197fa6a	2675
mbed_official	330:c80ac197fa6a	2676	/* Error callback */
mbed_official	330:c80ac197fa6a	2677	HAL_ADC_ErrorCallback(hadc);
mbed_official	330:c80ac197fa6a	2678	}
mbed_official	330:c80ac197fa6a	2679
mbed_official	330:c80ac197fa6a	2680	/* Clear the Overrun flag */
mbed_official	330:c80ac197fa6a	2681	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
mbed_official	330:c80ac197fa6a	2682
mbed_official	330:c80ac197fa6a	2683	}
mbed_official	330:c80ac197fa6a	2684
mbed_official	330:c80ac197fa6a	2685
mbed_official	330:c80ac197fa6a	2686	/* ========== Check Injected context queue overflow flag ========== */
mbed_official	330:c80ac197fa6a	2687	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JQOVF) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JQOVF))
mbed_official	330:c80ac197fa6a	2688	{
mbed_official	330:c80ac197fa6a	2689	/* Change ADC state to overrun state */
mbed_official	330:c80ac197fa6a	2690	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	2691
mbed_official	330:c80ac197fa6a	2692	/* Set ADC error code to Injected context queue overflow */
mbed_official	330:c80ac197fa6a	2693	hadc->ErrorCode \|= HAL_ADC_ERROR_JQOVF;
mbed_official	330:c80ac197fa6a	2694
mbed_official	330:c80ac197fa6a	2695	/* Clear the Injected context queue overflow flag */
mbed_official	330:c80ac197fa6a	2696	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JQOVF);
mbed_official	330:c80ac197fa6a	2697
mbed_official	330:c80ac197fa6a	2698	/* Error callback */
mbed_official	330:c80ac197fa6a	2699	HAL_ADCEx_InjectedQueueOverflowCallback(hadc);
mbed_official	330:c80ac197fa6a	2700	}
mbed_official	330:c80ac197fa6a	2701
mbed_official	330:c80ac197fa6a	2702	}
mbed_official	330:c80ac197fa6a	2703	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	2704	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	2705	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	2706	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	2707
mbed_official	330:c80ac197fa6a	2708	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	2709	/**
mbed_official	330:c80ac197fa6a	2710	* @brief Handles ADC interrupt request
mbed_official	330:c80ac197fa6a	2711	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2712	* @retval None
mbed_official	330:c80ac197fa6a	2713	*/
mbed_official	330:c80ac197fa6a	2714	void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	2715	{
mbed_official	330:c80ac197fa6a	2716	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2717	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2718	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official	330:c80ac197fa6a	2719	assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion));
mbed_official	330:c80ac197fa6a	2720
mbed_official	330:c80ac197fa6a	2721
mbed_official	330:c80ac197fa6a	2722	/* ========== Check End of Conversion flag for regular group ========== */
mbed_official	330:c80ac197fa6a	2723	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC))
mbed_official	330:c80ac197fa6a	2724	{
mbed_official	330:c80ac197fa6a	2725	/* Check if an injected conversion is ready */
mbed_official	330:c80ac197fa6a	2726	if(hadc->State == HAL_ADC_STATE_EOC_INJ)
mbed_official	330:c80ac197fa6a	2727	{
mbed_official	330:c80ac197fa6a	2728	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2729	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	330:c80ac197fa6a	2730	}
mbed_official	330:c80ac197fa6a	2731	else
mbed_official	330:c80ac197fa6a	2732	{
mbed_official	330:c80ac197fa6a	2733	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2734	hadc->State = HAL_ADC_STATE_EOC_REG;
mbed_official	330:c80ac197fa6a	2735	}
mbed_official	330:c80ac197fa6a	2736
mbed_official	330:c80ac197fa6a	2737	/* Disable interruption if no further conversion upcoming regular */
mbed_official	330:c80ac197fa6a	2738	/* external trigger or by continuous mode */
mbed_official	330:c80ac197fa6a	2739	if(__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official	330:c80ac197fa6a	2740	(hadc->Init.ContinuousConvMode == DISABLE) )
mbed_official	330:c80ac197fa6a	2741	{
mbed_official	330:c80ac197fa6a	2742	/* Disable ADC end of single conversion interrupt */
mbed_official	330:c80ac197fa6a	2743	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
mbed_official	330:c80ac197fa6a	2744	}
mbed_official	330:c80ac197fa6a	2745
mbed_official	330:c80ac197fa6a	2746	/* Conversion complete callback */
mbed_official	330:c80ac197fa6a	2747	HAL_ADC_ConvCpltCallback(hadc);
mbed_official	330:c80ac197fa6a	2748
mbed_official	330:c80ac197fa6a	2749	/* Clear regular group conversion flag */
mbed_official	330:c80ac197fa6a	2750	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT \| ADC_FLAG_EOC);
mbed_official	330:c80ac197fa6a	2751	}
mbed_official	330:c80ac197fa6a	2752
mbed_official	330:c80ac197fa6a	2753
mbed_official	330:c80ac197fa6a	2754	/* ========== Check End of Conversion flag for injected group ========== */
mbed_official	330:c80ac197fa6a	2755	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC))
mbed_official	330:c80ac197fa6a	2756	{
mbed_official	330:c80ac197fa6a	2757	/* Check if a regular conversion is ready */
mbed_official	330:c80ac197fa6a	2758	if(hadc->State == HAL_ADC_STATE_EOC_REG)
mbed_official	330:c80ac197fa6a	2759	{
mbed_official	330:c80ac197fa6a	2760	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2761	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	330:c80ac197fa6a	2762	}
mbed_official	330:c80ac197fa6a	2763	else
mbed_official	330:c80ac197fa6a	2764	{
mbed_official	330:c80ac197fa6a	2765	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2766	hadc->State = HAL_ADC_STATE_EOC_INJ;
mbed_official	330:c80ac197fa6a	2767	}
mbed_official	330:c80ac197fa6a	2768
mbed_official	330:c80ac197fa6a	2769	/* Disable interruption if no further conversion upcoming injected */
mbed_official	330:c80ac197fa6a	2770	/* external trigger or by automatic injected conversion with regular */
mbed_official	330:c80ac197fa6a	2771	/* group having no further conversion upcoming (same conditions as */
mbed_official	330:c80ac197fa6a	2772	/* regular group interruption disabling above). */
mbed_official	330:c80ac197fa6a	2773	if(__HAL_ADC_IS_SOFTWARE_START_INJECTED(hadc) \|\|
mbed_official	330:c80ac197fa6a	2774	(HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
mbed_official	330:c80ac197fa6a	2775	(__HAL_ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
mbed_official	330:c80ac197fa6a	2776	(hadc->Init.ContinuousConvMode == DISABLE) ) ) )
mbed_official	330:c80ac197fa6a	2777	{
mbed_official	330:c80ac197fa6a	2778	/* Disable ADC end of single conversion interrupt */
mbed_official	330:c80ac197fa6a	2779	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
mbed_official	330:c80ac197fa6a	2780	}
mbed_official	330:c80ac197fa6a	2781
mbed_official	330:c80ac197fa6a	2782	/* Conversion complete callback */
mbed_official	330:c80ac197fa6a	2783	HAL_ADCEx_InjectedConvCpltCallback(hadc);
mbed_official	330:c80ac197fa6a	2784
mbed_official	330:c80ac197fa6a	2785	/* Clear injected group conversion flag (and regular conversion flag raised simultaneously) */
mbed_official	330:c80ac197fa6a	2786	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT \| ADC_FLAG_JEOC \| ADC_FLAG_EOC));
mbed_official	330:c80ac197fa6a	2787	}
mbed_official	330:c80ac197fa6a	2788
mbed_official	330:c80ac197fa6a	2789
mbed_official	330:c80ac197fa6a	2790	/* ========== Check Analog watchdog flags ========== */
mbed_official	330:c80ac197fa6a	2791	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
mbed_official	330:c80ac197fa6a	2792	{
mbed_official	330:c80ac197fa6a	2793	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2794	hadc->State = HAL_ADC_STATE_AWD;
mbed_official	330:c80ac197fa6a	2795
mbed_official	330:c80ac197fa6a	2796	/* Clear the ADCx's Analog watchdog flag */
mbed_official	330:c80ac197fa6a	2797	__HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_AWD);
mbed_official	330:c80ac197fa6a	2798
mbed_official	330:c80ac197fa6a	2799	/* Level out of window callback */
mbed_official	330:c80ac197fa6a	2800	HAL_ADC_LevelOutOfWindowCallback(hadc);
mbed_official	330:c80ac197fa6a	2801	}
mbed_official	330:c80ac197fa6a	2802
mbed_official	330:c80ac197fa6a	2803	}
mbed_official	330:c80ac197fa6a	2804	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	2805
mbed_official	330:c80ac197fa6a	2806
mbed_official	330:c80ac197fa6a	2807	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	2808	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	2809	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	2810	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	2811	/**
mbed_official	330:c80ac197fa6a	2812	* @brief Perform an ADC automatic self-calibration
mbed_official	330:c80ac197fa6a	2813	* Calibration prerequisite: ADC must be disabled (execute this
mbed_official	330:c80ac197fa6a	2814	* function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
mbed_official	330:c80ac197fa6a	2815	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2816	* @param SingleDiff: Selection of single-ended or differential input
mbed_official	330:c80ac197fa6a	2817	* This parameter can be one of the following values:
mbed_official	330:c80ac197fa6a	2818	* @arg ADC_SINGLE_ENDED: Channel in mode input single ended
mbed_official	330:c80ac197fa6a	2819	* @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended
mbed_official	330:c80ac197fa6a	2820	* @retval HAL status
mbed_official	330:c80ac197fa6a	2821	*/
mbed_official	330:c80ac197fa6a	2822	HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
mbed_official	330:c80ac197fa6a	2823	{
mbed_official	330:c80ac197fa6a	2824	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	2825	uint32_t tickstart;
mbed_official	330:c80ac197fa6a	2826
mbed_official	330:c80ac197fa6a	2827	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2828	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2829	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
mbed_official	330:c80ac197fa6a	2830
mbed_official	330:c80ac197fa6a	2831	/* Process locked */
mbed_official	330:c80ac197fa6a	2832	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	2833
mbed_official	330:c80ac197fa6a	2834	/* Calibration prerequisite: ADC must be disabled. */
mbed_official	330:c80ac197fa6a	2835
mbed_official	330:c80ac197fa6a	2836	/* Disable the ADC (if not already disabled) */
mbed_official	330:c80ac197fa6a	2837	tmpHALStatus = ADC_Disable(hadc);
mbed_official	330:c80ac197fa6a	2838
mbed_official	330:c80ac197fa6a	2839	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	2840	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	2841	{
mbed_official	330:c80ac197fa6a	2842	/* Change ADC state */
mbed_official	330:c80ac197fa6a	2843	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	2844
mbed_official	330:c80ac197fa6a	2845	/* Select calibration mode single ended or differential ended */
mbed_official	330:c80ac197fa6a	2846	hadc->Instance->CR &= (~ADC_CR_ADCALDIF);
mbed_official	330:c80ac197fa6a	2847	if (SingleDiff == ADC_DIFFERENTIAL_ENDED)
mbed_official	330:c80ac197fa6a	2848	{
mbed_official	330:c80ac197fa6a	2849	hadc->Instance->CR \|= ADC_CR_ADCALDIF;
mbed_official	330:c80ac197fa6a	2850	}
mbed_official	330:c80ac197fa6a	2851
mbed_official	330:c80ac197fa6a	2852	/* Start ADC calibration */
mbed_official	330:c80ac197fa6a	2853	hadc->Instance->CR \|= ADC_CR_ADCAL;
mbed_official	330:c80ac197fa6a	2854
mbed_official	330:c80ac197fa6a	2855	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	2856
mbed_official	330:c80ac197fa6a	2857	/* Wait for calibration completion */
mbed_official	330:c80ac197fa6a	2858	while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL))
mbed_official	330:c80ac197fa6a	2859	{
mbed_official	330:c80ac197fa6a	2860	if((HAL_GetTick()-tickstart) > ADC_CALIBRATION_TIMEOUT)
mbed_official	330:c80ac197fa6a	2861	{
mbed_official	330:c80ac197fa6a	2862	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	2863	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	2864
mbed_official	330:c80ac197fa6a	2865	/* Process unlocked */
mbed_official	330:c80ac197fa6a	2866	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	2867
mbed_official	330:c80ac197fa6a	2868	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	2869	}
mbed_official	330:c80ac197fa6a	2870	}
mbed_official	330:c80ac197fa6a	2871	}
mbed_official	330:c80ac197fa6a	2872	else
mbed_official	330:c80ac197fa6a	2873	{
mbed_official	330:c80ac197fa6a	2874	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	2875	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	2876	}
mbed_official	330:c80ac197fa6a	2877
mbed_official	330:c80ac197fa6a	2878	/* Process unlocked */
mbed_official	330:c80ac197fa6a	2879	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	2880
mbed_official	330:c80ac197fa6a	2881	/* Return function status */
mbed_official	330:c80ac197fa6a	2882	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	2883	}
mbed_official	330:c80ac197fa6a	2884	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	2885	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	2886	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	2887	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	2888
mbed_official	330:c80ac197fa6a	2889	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	2890	/**
mbed_official	330:c80ac197fa6a	2891	* @brief Perform an ADC automatic self-calibration
mbed_official	330:c80ac197fa6a	2892	* Calibration prerequisite: ADC must be disabled (execute this
mbed_official	330:c80ac197fa6a	2893	* function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
mbed_official	330:c80ac197fa6a	2894	* During calibration process, ADC is enabled. ADC is let enabled at
mbed_official	330:c80ac197fa6a	2895	* the completion of this function.
mbed_official	330:c80ac197fa6a	2896	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2897	* @retval HAL status
mbed_official	330:c80ac197fa6a	2898	*/
mbed_official	330:c80ac197fa6a	2899	HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	2900	{
mbed_official	330:c80ac197fa6a	2901	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	2902	uint32_t WaitLoopIndex = 0;
mbed_official	330:c80ac197fa6a	2903	uint32_t tickstart;
mbed_official	330:c80ac197fa6a	2904
mbed_official	330:c80ac197fa6a	2905	/* Check the parameters */
mbed_official	330:c80ac197fa6a	2906	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	2907
mbed_official	330:c80ac197fa6a	2908	/* Process locked */
mbed_official	330:c80ac197fa6a	2909	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	2910
mbed_official	330:c80ac197fa6a	2911	/* 1. Calibration prerequisite: */
mbed_official	330:c80ac197fa6a	2912	/* - ADC must be disabled for at least two ADC clock cycles in disable */
mbed_official	330:c80ac197fa6a	2913	/* mode before ADC enable */
mbed_official	330:c80ac197fa6a	2914	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	2915	/* Disable ADC peripheral */
mbed_official	330:c80ac197fa6a	2916	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	330:c80ac197fa6a	2917
mbed_official	330:c80ac197fa6a	2918	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	2919	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	2920	{
mbed_official	330:c80ac197fa6a	2921
mbed_official	330:c80ac197fa6a	2922	/* Wait two ADC clock cycles */
mbed_official	330:c80ac197fa6a	2923	while(WaitLoopIndex < ADC_CYCLE_WORST_CASE_CPU_CYCLES *2)
mbed_official	330:c80ac197fa6a	2924	{
mbed_official	330:c80ac197fa6a	2925	WaitLoopIndex++;
mbed_official	330:c80ac197fa6a	2926	}
mbed_official	330:c80ac197fa6a	2927
mbed_official	330:c80ac197fa6a	2928	/* 2. Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	2929	ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	2930
mbed_official	330:c80ac197fa6a	2931
mbed_official	330:c80ac197fa6a	2932	/* 3. Resets ADC calibration registers */
mbed_official	330:c80ac197fa6a	2933	hadc->Instance->CR2 \|= ADC_CR2_RSTCAL;
mbed_official	330:c80ac197fa6a	2934
mbed_official	330:c80ac197fa6a	2935	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	2936
mbed_official	330:c80ac197fa6a	2937	/* Wait for calibration reset completion */
mbed_official	330:c80ac197fa6a	2938	while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_RSTCAL))
mbed_official	330:c80ac197fa6a	2939	{
mbed_official	330:c80ac197fa6a	2940	if((HAL_GetTick()-tickstart) > ADC_CALIBRATION_TIMEOUT)
mbed_official	330:c80ac197fa6a	2941	{
mbed_official	330:c80ac197fa6a	2942	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	2943	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	2944
mbed_official	330:c80ac197fa6a	2945	/* Process unlocked */
mbed_official	330:c80ac197fa6a	2946	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	2947
mbed_official	330:c80ac197fa6a	2948	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	2949	}
mbed_official	330:c80ac197fa6a	2950	}
mbed_official	330:c80ac197fa6a	2951
mbed_official	330:c80ac197fa6a	2952
mbed_official	330:c80ac197fa6a	2953	/* 4. Start ADC calibration */
mbed_official	330:c80ac197fa6a	2954	hadc->Instance->CR2 \|= ADC_CR2_CAL;
mbed_official	330:c80ac197fa6a	2955
mbed_official	330:c80ac197fa6a	2956	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	2957
mbed_official	330:c80ac197fa6a	2958	/* Wait for calibration completion */
mbed_official	330:c80ac197fa6a	2959	while(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_CAL))
mbed_official	330:c80ac197fa6a	2960	{
mbed_official	330:c80ac197fa6a	2961	if((HAL_GetTick()-tickstart) > ADC_CALIBRATION_TIMEOUT)
mbed_official	330:c80ac197fa6a	2962	{
mbed_official	330:c80ac197fa6a	2963	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	2964	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	2965
mbed_official	330:c80ac197fa6a	2966	/* Process unlocked */
mbed_official	330:c80ac197fa6a	2967	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	2968
mbed_official	330:c80ac197fa6a	2969	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	2970	}
mbed_official	330:c80ac197fa6a	2971	}
mbed_official	330:c80ac197fa6a	2972
mbed_official	330:c80ac197fa6a	2973	}
mbed_official	330:c80ac197fa6a	2974
mbed_official	330:c80ac197fa6a	2975	/* Process unlocked */
mbed_official	330:c80ac197fa6a	2976	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	2977
mbed_official	330:c80ac197fa6a	2978	/* Return function status */
mbed_official	330:c80ac197fa6a	2979	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	2980	}
mbed_official	330:c80ac197fa6a	2981
mbed_official	330:c80ac197fa6a	2982	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	2983
mbed_official	330:c80ac197fa6a	2984	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	2985	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	2986	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	2987	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	2988	/**
mbed_official	330:c80ac197fa6a	2989	* @brief Get the calibration factor from automatic conversion result
mbed_official	330:c80ac197fa6a	2990	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	2991	* @param SingleDiff: Selection of single-ended or differential input
mbed_official	330:c80ac197fa6a	2992	* This parameter can be one of the following values:
mbed_official	330:c80ac197fa6a	2993	* @arg ADC_SINGLE_ENDED: Channel in mode input single ended
mbed_official	330:c80ac197fa6a	2994	* @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended
mbed_official	330:c80ac197fa6a	2995	* @retval Converted value
mbed_official	330:c80ac197fa6a	2996	*/
mbed_official	330:c80ac197fa6a	2997	uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff)
mbed_official	330:c80ac197fa6a	2998	{
mbed_official	330:c80ac197fa6a	2999	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3000	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3001	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
mbed_official	330:c80ac197fa6a	3002
mbed_official	330:c80ac197fa6a	3003	/* Return the selected ADC calibration value */
mbed_official	330:c80ac197fa6a	3004	if (SingleDiff == ADC_DIFFERENTIAL_ENDED)
mbed_official	330:c80ac197fa6a	3005	{
mbed_official	330:c80ac197fa6a	3006	return __HAL_ADC_CALFACT_DIFF_GET(hadc->Instance->CALFACT);
mbed_official	330:c80ac197fa6a	3007	}
mbed_official	330:c80ac197fa6a	3008	else
mbed_official	330:c80ac197fa6a	3009	{
mbed_official	330:c80ac197fa6a	3010	return ((hadc->Instance->CALFACT) & 0x0000007F);
mbed_official	330:c80ac197fa6a	3011	}
mbed_official	330:c80ac197fa6a	3012	}
mbed_official	330:c80ac197fa6a	3013	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	3014	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	3015	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	3016	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	3017
mbed_official	330:c80ac197fa6a	3018	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	3019	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	3020	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	3021	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	3022	/**
mbed_official	330:c80ac197fa6a	3023	* @brief Set the calibration factor to overwrite automatic conversion result. ADC must be enabled and no conversion on going.
mbed_official	330:c80ac197fa6a	3024	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	3025	* @param SingleDiff: Selection of single-ended or differential input
mbed_official	330:c80ac197fa6a	3026	* This parameter can be one of the following values:
mbed_official	330:c80ac197fa6a	3027	* @arg ADC_SINGLE_ENDED: Channel in mode input single ended
mbed_official	330:c80ac197fa6a	3028	* @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended
mbed_official	330:c80ac197fa6a	3029	* @param CalibrationFactor: Calibration factor (coded on 7 bits maximum)
mbed_official	330:c80ac197fa6a	3030	* @retval HAL state
mbed_official	330:c80ac197fa6a	3031	*/
mbed_official	330:c80ac197fa6a	3032	HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor)
mbed_official	330:c80ac197fa6a	3033	{
mbed_official	330:c80ac197fa6a	3034	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	3035
mbed_official	330:c80ac197fa6a	3036	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3037	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3038	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
mbed_official	330:c80ac197fa6a	3039	assert_param(IS_ADC_CALFACT(CalibrationFactor));
mbed_official	330:c80ac197fa6a	3040
mbed_official	330:c80ac197fa6a	3041	/* Process locked */
mbed_official	330:c80ac197fa6a	3042	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	3043
mbed_official	330:c80ac197fa6a	3044	/* Verification of hardware constraints before modifying the calibration */
mbed_official	330:c80ac197fa6a	3045	/* factors register: ADC must be enabled, no conversion on going. */
mbed_official	330:c80ac197fa6a	3046	if ( (__HAL_ADC_IS_ENABLED(hadc) != RESET) &&
mbed_official	330:c80ac197fa6a	3047	(__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) )
mbed_official	330:c80ac197fa6a	3048	{
mbed_official	330:c80ac197fa6a	3049	/* Set the selected ADC calibration value */
mbed_official	330:c80ac197fa6a	3050	if (SingleDiff == ADC_DIFFERENTIAL_ENDED)
mbed_official	330:c80ac197fa6a	3051	{
mbed_official	330:c80ac197fa6a	3052	hadc->Instance->CALFACT &= ~ADC_CALFACT_CALFACT_D;
mbed_official	330:c80ac197fa6a	3053	hadc->Instance->CALFACT \|= __HAL_ADC_CALFACT_DIFF_SET(CalibrationFactor);
mbed_official	330:c80ac197fa6a	3054	}
mbed_official	330:c80ac197fa6a	3055	else
mbed_official	330:c80ac197fa6a	3056	{
mbed_official	330:c80ac197fa6a	3057	hadc->Instance->CALFACT &= ~ADC_CALFACT_CALFACT_S;
mbed_official	330:c80ac197fa6a	3058	hadc->Instance->CALFACT \|= CalibrationFactor;
mbed_official	330:c80ac197fa6a	3059	}
mbed_official	330:c80ac197fa6a	3060	}
mbed_official	330:c80ac197fa6a	3061	else
mbed_official	330:c80ac197fa6a	3062	{
mbed_official	330:c80ac197fa6a	3063	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	3064	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	3065
mbed_official	330:c80ac197fa6a	3066	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	3067	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	3068	}
mbed_official	330:c80ac197fa6a	3069
mbed_official	330:c80ac197fa6a	3070	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3071	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3072
mbed_official	330:c80ac197fa6a	3073	/* Return function status */
mbed_official	330:c80ac197fa6a	3074	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	3075	}
mbed_official	330:c80ac197fa6a	3076	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	3077	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	3078	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	3079	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	3080
mbed_official	330:c80ac197fa6a	3081	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	3082	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	3083	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	3084	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	3085	/**
mbed_official	330:c80ac197fa6a	3086	* @brief Enables ADC, starts conversion of injected group.
mbed_official	330:c80ac197fa6a	3087	* Interruptions enabled in this function: None.
mbed_official	330:c80ac197fa6a	3088	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	330:c80ac197fa6a	3089	* function must be called for ADC slave first, then ADC master.
mbed_official	330:c80ac197fa6a	3090	* For ADC slave, ADC is enabled only (conversion is not started).
mbed_official	330:c80ac197fa6a	3091	* For ADC master, ADC is enabled and multimode conversion is started.
mbed_official	330:c80ac197fa6a	3092	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	3093	* @retval HAL status
mbed_official	330:c80ac197fa6a	3094	*/
mbed_official	330:c80ac197fa6a	3095	HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	3096	{
mbed_official	330:c80ac197fa6a	3097	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	3098
mbed_official	330:c80ac197fa6a	3099	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3100	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3101
mbed_official	330:c80ac197fa6a	3102	/* Process locked */
mbed_official	330:c80ac197fa6a	3103	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	3104
mbed_official	330:c80ac197fa6a	3105	/* Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	3106	tmpHALStatus = ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	3107
mbed_official	330:c80ac197fa6a	3108	/* Start conversion if ADC is effectively enabled */
mbed_official	330:c80ac197fa6a	3109	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3110	{
mbed_official	330:c80ac197fa6a	3111	/* Check if a regular conversion is ongoing */
mbed_official	330:c80ac197fa6a	3112	if(hadc->State == HAL_ADC_STATE_BUSY_REG)
mbed_official	330:c80ac197fa6a	3113	{
mbed_official	330:c80ac197fa6a	3114	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3115	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	330:c80ac197fa6a	3116	}
mbed_official	330:c80ac197fa6a	3117	else
mbed_official	330:c80ac197fa6a	3118	{
mbed_official	330:c80ac197fa6a	3119	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3120	hadc->State = HAL_ADC_STATE_BUSY_INJ;
mbed_official	330:c80ac197fa6a	3121	}
mbed_official	330:c80ac197fa6a	3122
mbed_official	330:c80ac197fa6a	3123	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	3124	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	3125
mbed_official	330:c80ac197fa6a	3126	/* Clear injected group conversion flag */
mbed_official	330:c80ac197fa6a	3127	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	330:c80ac197fa6a	3128	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC \| ADC_FLAG_JEOS));
mbed_official	330:c80ac197fa6a	3129
mbed_official	330:c80ac197fa6a	3130	/* Enable conversion of injected group, if automatic injected conversion */
mbed_official	330:c80ac197fa6a	3131	/* is disabled. */
mbed_official	330:c80ac197fa6a	3132	/* If software start has been selected, conversion starts immediately. */
mbed_official	330:c80ac197fa6a	3133	/* If external trigger has been selected, conversion will start at next */
mbed_official	330:c80ac197fa6a	3134	/* trigger event. */
mbed_official	330:c80ac197fa6a	3135	/* Case of multimode enabled (for devices with several ADCs): if ADC is */
mbed_official	330:c80ac197fa6a	3136	/* slave, ADC is enabled only (conversion is not started). If ADC is */
mbed_official	330:c80ac197fa6a	3137	/* master, ADC is enabled and conversion is started. */
mbed_official	330:c80ac197fa6a	3138	if (
mbed_official	330:c80ac197fa6a	3139	HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO) &&
mbed_official	330:c80ac197fa6a	3140	__HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) )
mbed_official	330:c80ac197fa6a	3141	{
mbed_official	330:c80ac197fa6a	3142	hadc->Instance->CR \|= ADC_CR_JADSTART;
mbed_official	330:c80ac197fa6a	3143	}
mbed_official	330:c80ac197fa6a	3144	}
mbed_official	330:c80ac197fa6a	3145
mbed_official	330:c80ac197fa6a	3146	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3147	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3148
mbed_official	330:c80ac197fa6a	3149	/* Return function status */
mbed_official	330:c80ac197fa6a	3150	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	3151	}
mbed_official	330:c80ac197fa6a	3152	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	3153	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	3154	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	3155	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	3156
mbed_official	330:c80ac197fa6a	3157	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	3158	/**
mbed_official	330:c80ac197fa6a	3159	* @brief Enables ADC, starts conversion of injected group.
mbed_official	330:c80ac197fa6a	3160	* Interruptions enabled in this function: None.
mbed_official	330:c80ac197fa6a	3161	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	3162	* @retval HAL status
mbed_official	330:c80ac197fa6a	3163	*/
mbed_official	330:c80ac197fa6a	3164	HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	3165	{
mbed_official	330:c80ac197fa6a	3166	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	3167
mbed_official	330:c80ac197fa6a	3168	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3169	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3170
mbed_official	330:c80ac197fa6a	3171	/* Process locked */
mbed_official	330:c80ac197fa6a	3172	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	3173
mbed_official	330:c80ac197fa6a	3174	/* Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	3175	tmpHALStatus = ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	3176
mbed_official	330:c80ac197fa6a	3177	/* Start conversion if ADC is effectively enabled */
mbed_official	330:c80ac197fa6a	3178	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3179	{
mbed_official	330:c80ac197fa6a	3180	/* Check if a regular conversion is ongoing */
mbed_official	330:c80ac197fa6a	3181	if(hadc->State == HAL_ADC_STATE_BUSY_REG)
mbed_official	330:c80ac197fa6a	3182	{
mbed_official	330:c80ac197fa6a	3183	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3184	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	330:c80ac197fa6a	3185	}
mbed_official	330:c80ac197fa6a	3186	else
mbed_official	330:c80ac197fa6a	3187	{
mbed_official	330:c80ac197fa6a	3188	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3189	hadc->State = HAL_ADC_STATE_BUSY_INJ;
mbed_official	330:c80ac197fa6a	3190	}
mbed_official	330:c80ac197fa6a	3191
mbed_official	330:c80ac197fa6a	3192	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	3193	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	3194
mbed_official	330:c80ac197fa6a	3195	/* Clear injected group conversion flag */
mbed_official	330:c80ac197fa6a	3196	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	330:c80ac197fa6a	3197	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
mbed_official	330:c80ac197fa6a	3198
mbed_official	330:c80ac197fa6a	3199	/* Start conversion of injected group if software start has been selected */
mbed_official	330:c80ac197fa6a	3200	/* and if automatic injected conversion is disabled. */
mbed_official	330:c80ac197fa6a	3201	/* If external trigger has been selected, conversion will start at next */
mbed_official	330:c80ac197fa6a	3202	/* trigger event. */
mbed_official	330:c80ac197fa6a	3203	/* If automatic injected conversion is enabled, conversion will start */
mbed_official	330:c80ac197fa6a	3204	/* after next regular group conversion. */
mbed_official	330:c80ac197fa6a	3205	if (__HAL_ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
mbed_official	330:c80ac197fa6a	3206	HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
mbed_official	330:c80ac197fa6a	3207	{
mbed_official	330:c80ac197fa6a	3208	/* Enable ADC software conversion for injected channels */
mbed_official	330:c80ac197fa6a	3209	hadc->Instance->CR2 \|= ADC_CR2_JSWSTART;
mbed_official	330:c80ac197fa6a	3210	}
mbed_official	330:c80ac197fa6a	3211	}
mbed_official	330:c80ac197fa6a	3212
mbed_official	330:c80ac197fa6a	3213	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3214	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3215
mbed_official	330:c80ac197fa6a	3216	/* Return function status */
mbed_official	330:c80ac197fa6a	3217	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	3218	}
mbed_official	330:c80ac197fa6a	3219	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	3220
mbed_official	330:c80ac197fa6a	3221	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	3222	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	3223	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	3224	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	3225	/**
mbed_official	330:c80ac197fa6a	3226	* @brief Stop conversion of injected channels. Disable ADC peripheral if
mbed_official	330:c80ac197fa6a	3227	* no regular conversion is on going.
mbed_official	330:c80ac197fa6a	3228	* @note If ADC must be disabled with this function and if regular conversion
mbed_official	330:c80ac197fa6a	3229	* is on going, function HAL_ADC_Stop must be used preliminarily.
mbed_official	330:c80ac197fa6a	3230	* @note In case of auto-injection mode, HAL_ADC_Stop must be used.
mbed_official	330:c80ac197fa6a	3231	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	330:c80ac197fa6a	3232	* function must be called for ADC master first, then ADC slave.
mbed_official	330:c80ac197fa6a	3233	* For ADC master, conversion is stopped and ADC is disabled.
mbed_official	330:c80ac197fa6a	3234	* For ADC slave, ADC is disabled only (conversion stop of ADC master
mbed_official	330:c80ac197fa6a	3235	* has already stopped conversion of ADC slave).
mbed_official	330:c80ac197fa6a	3236	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	3237	* @retval None
mbed_official	330:c80ac197fa6a	3238	*/
mbed_official	330:c80ac197fa6a	3239	HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	3240	{
mbed_official	330:c80ac197fa6a	3241	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	3242
mbed_official	330:c80ac197fa6a	3243	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3244	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3245
mbed_official	330:c80ac197fa6a	3246	/* Process locked */
mbed_official	330:c80ac197fa6a	3247	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	3248
mbed_official	330:c80ac197fa6a	3249	/* 1. Stop potential conversion on going on injected group only. */
mbed_official	330:c80ac197fa6a	3250	tmpHALStatus = ADC_ConversionStop(hadc, INJECTED_GROUP);
mbed_official	330:c80ac197fa6a	3251
mbed_official	330:c80ac197fa6a	3252	/* Disable ADC peripheral if injected conversions are effectively stopped */
mbed_official	330:c80ac197fa6a	3253	/* and if no conversion on the other group (regular group) is intended to */
mbed_official	330:c80ac197fa6a	3254	/* continue. */
mbed_official	330:c80ac197fa6a	3255	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3256	{
mbed_official	330:c80ac197fa6a	3257	if((__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) &&
mbed_official	330:c80ac197fa6a	3258	(hadc->State != HAL_ADC_STATE_BUSY_REG) &&
mbed_official	330:c80ac197fa6a	3259	(hadc->State != HAL_ADC_STATE_BUSY_INJ_REG) )
mbed_official	330:c80ac197fa6a	3260	{
mbed_official	330:c80ac197fa6a	3261	/* 2. Disable the ADC peripheral */
mbed_official	330:c80ac197fa6a	3262	tmpHALStatus = ADC_Disable(hadc);
mbed_official	330:c80ac197fa6a	3263
mbed_official	330:c80ac197fa6a	3264	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	3265	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3266	{
mbed_official	330:c80ac197fa6a	3267	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3268	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	3269	}
mbed_official	330:c80ac197fa6a	3270	}
mbed_official	330:c80ac197fa6a	3271	/* Conversion on injected group is stopped, but ADC not disabled since */
mbed_official	330:c80ac197fa6a	3272	/* conversion on regular group is still running. */
mbed_official	330:c80ac197fa6a	3273	else
mbed_official	330:c80ac197fa6a	3274	{
mbed_official	330:c80ac197fa6a	3275	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	330:c80ac197fa6a	3276	}
mbed_official	330:c80ac197fa6a	3277	}
mbed_official	330:c80ac197fa6a	3278
mbed_official	330:c80ac197fa6a	3279	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3280	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3281
mbed_official	330:c80ac197fa6a	3282	/* Return function status */
mbed_official	330:c80ac197fa6a	3283	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	3284	}
mbed_official	330:c80ac197fa6a	3285	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	3286	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	3287	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	3288	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	3289
mbed_official	330:c80ac197fa6a	3290	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	3291	/**
mbed_official	330:c80ac197fa6a	3292	* @brief Stop conversion of injected channels. Disable ADC peripheral if
mbed_official	330:c80ac197fa6a	3293	* no regular conversion is on going.
mbed_official	330:c80ac197fa6a	3294	* @note If ADC must be disabled with this function and if regular conversion
mbed_official	330:c80ac197fa6a	3295	* is on going, function HAL_ADC_Stop must be used preliminarily.
mbed_official	330:c80ac197fa6a	3296	* @note In case of auto-injection mode, HAL_ADC_Stop must be used.
mbed_official	330:c80ac197fa6a	3297	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	3298	* @retval None
mbed_official	330:c80ac197fa6a	3299	*/
mbed_official	330:c80ac197fa6a	3300	HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	3301	{
mbed_official	330:c80ac197fa6a	3302	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	3303
mbed_official	330:c80ac197fa6a	3304	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3305	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3306
mbed_official	330:c80ac197fa6a	3307	/* Process locked */
mbed_official	330:c80ac197fa6a	3308	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	3309
mbed_official	330:c80ac197fa6a	3310	/* Stop potential conversion and disable ADC peripheral */
mbed_official	330:c80ac197fa6a	3311	/* Conditioned to: */
mbed_official	330:c80ac197fa6a	3312	/* - No conversion on the other group (regular group) is intended to */
mbed_official	330:c80ac197fa6a	3313	/* continue (injected and regular groups stop conversion and ADC disable */
mbed_official	330:c80ac197fa6a	3314	/* are common) */
mbed_official	330:c80ac197fa6a	3315	/* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
mbed_official	330:c80ac197fa6a	3316	if((hadc->State != HAL_ADC_STATE_BUSY_REG) &&
mbed_official	330:c80ac197fa6a	3317	(hadc->State != HAL_ADC_STATE_BUSY_INJ_REG) &&
mbed_official	330:c80ac197fa6a	3318	HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
mbed_official	330:c80ac197fa6a	3319	{
mbed_official	330:c80ac197fa6a	3320	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	3321	/* Disable ADC peripheral */
mbed_official	330:c80ac197fa6a	3322	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	330:c80ac197fa6a	3323
mbed_official	330:c80ac197fa6a	3324	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	3325	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3326	{
mbed_official	330:c80ac197fa6a	3327	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3328	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	3329	}
mbed_official	330:c80ac197fa6a	3330	}
mbed_official	330:c80ac197fa6a	3331	else
mbed_official	330:c80ac197fa6a	3332	{
mbed_official	330:c80ac197fa6a	3333	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	3334	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	3335
mbed_official	330:c80ac197fa6a	3336	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	3337	}
mbed_official	330:c80ac197fa6a	3338
mbed_official	330:c80ac197fa6a	3339	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3340	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3341
mbed_official	330:c80ac197fa6a	3342	/* Return function status */
mbed_official	330:c80ac197fa6a	3343	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	3344	}
mbed_official	330:c80ac197fa6a	3345	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	3346
mbed_official	330:c80ac197fa6a	3347	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	3348	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	3349	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	3350	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	3351	/**
mbed_official	330:c80ac197fa6a	3352	* @brief Wait for injected group conversion to be completed.
mbed_official	330:c80ac197fa6a	3353	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	3354	* @param Timeout: Timeout value in millisecond.
mbed_official	330:c80ac197fa6a	3355	* @retval HAL status
mbed_official	330:c80ac197fa6a	3356	*/
mbed_official	330:c80ac197fa6a	3357	HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
mbed_official	330:c80ac197fa6a	3358	{
mbed_official	330:c80ac197fa6a	3359	uint32_t tickstart;
mbed_official	330:c80ac197fa6a	3360	uint32_t tmp_Flag_EOC;
mbed_official	330:c80ac197fa6a	3361
mbed_official	330:c80ac197fa6a	3362	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3363	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3364
mbed_official	330:c80ac197fa6a	3365	/* If end of conversion selected to end of sequence */
mbed_official	330:c80ac197fa6a	3366	if (hadc->Init.EOCSelection == EOC_SEQ_CONV)
mbed_official	330:c80ac197fa6a	3367	{
mbed_official	330:c80ac197fa6a	3368	tmp_Flag_EOC = ADC_FLAG_JEOS;
mbed_official	330:c80ac197fa6a	3369	}
mbed_official	330:c80ac197fa6a	3370	/* If end of conversion selected to end of each conversion */
mbed_official	330:c80ac197fa6a	3371	else /* EOC_SINGLE_CONV */
mbed_official	330:c80ac197fa6a	3372	{
mbed_official	330:c80ac197fa6a	3373	tmp_Flag_EOC = (ADC_FLAG_JEOC \| ADC_FLAG_JEOS);
mbed_official	330:c80ac197fa6a	3374	}
mbed_official	330:c80ac197fa6a	3375
mbed_official	330:c80ac197fa6a	3376	/* Get timeout */
mbed_official	330:c80ac197fa6a	3377	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	3378
mbed_official	330:c80ac197fa6a	3379	/* Wait until End of Conversion flag is raised */
mbed_official	330:c80ac197fa6a	3380	while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
mbed_official	330:c80ac197fa6a	3381	{
mbed_official	330:c80ac197fa6a	3382	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	330:c80ac197fa6a	3383	if(Timeout != HAL_MAX_DELAY)
mbed_official	330:c80ac197fa6a	3384	{
mbed_official	330:c80ac197fa6a	3385	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	330:c80ac197fa6a	3386	{
mbed_official	330:c80ac197fa6a	3387	/* Update ADC state machine to timeout */
mbed_official	330:c80ac197fa6a	3388	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	330:c80ac197fa6a	3389
mbed_official	330:c80ac197fa6a	3390	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3391	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3392
mbed_official	330:c80ac197fa6a	3393	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	3394	}
mbed_official	330:c80ac197fa6a	3395	}
mbed_official	330:c80ac197fa6a	3396	}
mbed_official	330:c80ac197fa6a	3397
mbed_official	330:c80ac197fa6a	3398	/* Clear end of conversion flag of injected group if low power feature */
mbed_official	330:c80ac197fa6a	3399	/* "Auto Wait" is disabled, to not interfere with this feature until data */
mbed_official	330:c80ac197fa6a	3400	/* register is read using function HAL_ADC_GetValue(). */
mbed_official	330:c80ac197fa6a	3401	if (hadc->Init.LowPowerAutoWait == DISABLE)
mbed_official	330:c80ac197fa6a	3402	{
mbed_official	330:c80ac197fa6a	3403	/* Clear injected group conversion flag */
mbed_official	330:c80ac197fa6a	3404	__HAL_ADC_CLEAR_FLAG(hadc,(ADC_FLAG_JEOC \| ADC_FLAG_JEOS));
mbed_official	330:c80ac197fa6a	3405	}
mbed_official	330:c80ac197fa6a	3406
mbed_official	330:c80ac197fa6a	3407
mbed_official	330:c80ac197fa6a	3408	/* Update ADC state machine */
mbed_official	330:c80ac197fa6a	3409	if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
mbed_official	330:c80ac197fa6a	3410	{
mbed_official	330:c80ac197fa6a	3411	/* Check if a conversion is ready on regular group */
mbed_official	330:c80ac197fa6a	3412	if(hadc->State == HAL_ADC_STATE_EOC_REG)
mbed_official	330:c80ac197fa6a	3413	{
mbed_official	330:c80ac197fa6a	3414	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3415	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	330:c80ac197fa6a	3416	}
mbed_official	330:c80ac197fa6a	3417	else
mbed_official	330:c80ac197fa6a	3418	{
mbed_official	330:c80ac197fa6a	3419	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3420	hadc->State = HAL_ADC_STATE_EOC_INJ;
mbed_official	330:c80ac197fa6a	3421	}
mbed_official	330:c80ac197fa6a	3422	}
mbed_official	330:c80ac197fa6a	3423
mbed_official	330:c80ac197fa6a	3424	/* Return ADC state */
mbed_official	330:c80ac197fa6a	3425	return HAL_OK;
mbed_official	330:c80ac197fa6a	3426	}
mbed_official	330:c80ac197fa6a	3427	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	3428	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	3429	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	3430	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	3431
mbed_official	330:c80ac197fa6a	3432	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	3433	/**
mbed_official	330:c80ac197fa6a	3434	* @brief Wait for injected group conversion to be completed.
mbed_official	330:c80ac197fa6a	3435	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	3436	* @param Timeout: Timeout value in millisecond.
mbed_official	330:c80ac197fa6a	3437	* @retval HAL status
mbed_official	330:c80ac197fa6a	3438	*/
mbed_official	330:c80ac197fa6a	3439	HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
mbed_official	330:c80ac197fa6a	3440	{
mbed_official	330:c80ac197fa6a	3441	uint32_t tickstart;
mbed_official	330:c80ac197fa6a	3442
mbed_official	330:c80ac197fa6a	3443	/* Variables for polling in case of scan mode enabled */
mbed_official	330:c80ac197fa6a	3444	uint32_t Conversion_Timeout_CPU_cycles_max =0;
mbed_official	330:c80ac197fa6a	3445	uint32_t Conversion_Timeout_CPU_cycles =0;
mbed_official	330:c80ac197fa6a	3446
mbed_official	330:c80ac197fa6a	3447	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3448	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3449
mbed_official	330:c80ac197fa6a	3450	/* Get timeout */
mbed_official	330:c80ac197fa6a	3451	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	3452
mbed_official	330:c80ac197fa6a	3453	/* Polling for end of conversion: differentiation if single/sequence */
mbed_official	330:c80ac197fa6a	3454	/* conversion. */
mbed_official	330:c80ac197fa6a	3455	/* For injected group, flag JEOC is set only at the end of the sequence, */
mbed_official	330:c80ac197fa6a	3456	/* not for each conversion within the sequence. */
mbed_official	330:c80ac197fa6a	3457	/* - If single conversion for injected group (scan mode disabled or */
mbed_official	330:c80ac197fa6a	3458	/* InjectedNbrOfConversion ==1), flag jEOC is used to determine the */
mbed_official	330:c80ac197fa6a	3459	/* conversion completion. */
mbed_official	330:c80ac197fa6a	3460	/* - If sequence conversion for injected group (scan mode enabled and */
mbed_official	330:c80ac197fa6a	3461	/* InjectedNbrOfConversion >=2), flag JEOC is set only at the end of the */
mbed_official	330:c80ac197fa6a	3462	/* sequence. */
mbed_official	330:c80ac197fa6a	3463	/* To poll for each conversion, the maximum conversion time is computed */
mbed_official	330:c80ac197fa6a	3464	/* from ADC conversion time (selected sampling time + conversion time of */
mbed_official	330:c80ac197fa6a	3465	/* 12.5 ADC clock cycles) and APB2/ADC clock prescalers (depending on */
mbed_official	330:c80ac197fa6a	3466	/* settings, conversion time range can be from 28 to 32256 CPU cycles). */
mbed_official	330:c80ac197fa6a	3467	if ((hadc->Instance->JSQR & ADC_JSQR_JL) == RESET)
mbed_official	330:c80ac197fa6a	3468	{
mbed_official	330:c80ac197fa6a	3469	/* Wait until End of Conversion flag is raised */
mbed_official	330:c80ac197fa6a	3470	while(HAL_IS_BIT_CLR(hadc->Instance->SR, ADC_FLAG_JEOC))
mbed_official	330:c80ac197fa6a	3471	{
mbed_official	330:c80ac197fa6a	3472	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	330:c80ac197fa6a	3473	if(Timeout != HAL_MAX_DELAY)
mbed_official	330:c80ac197fa6a	3474	{
mbed_official	330:c80ac197fa6a	3475	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	330:c80ac197fa6a	3476	{
mbed_official	330:c80ac197fa6a	3477	/* Update ADC state machine to timeout */
mbed_official	330:c80ac197fa6a	3478	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	330:c80ac197fa6a	3479
mbed_official	330:c80ac197fa6a	3480	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3481	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3482
mbed_official	330:c80ac197fa6a	3483	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	3484	}
mbed_official	330:c80ac197fa6a	3485	}
mbed_official	330:c80ac197fa6a	3486	}
mbed_official	330:c80ac197fa6a	3487	}
mbed_official	330:c80ac197fa6a	3488	else
mbed_official	330:c80ac197fa6a	3489	{
mbed_official	330:c80ac197fa6a	3490	/* Calculation of CPU cycles corresponding to ADC conversion cycles. */
mbed_official	330:c80ac197fa6a	3491	/* Retrieve ADC clock prescaler and ADC maximum conversion cycles on all */
mbed_official	330:c80ac197fa6a	3492	/* channels. */
mbed_official	330:c80ac197fa6a	3493	Conversion_Timeout_CPU_cycles_max = __HAL_ADC_CLOCK_PRECSALER_RANGE() ;
mbed_official	330:c80ac197fa6a	3494	Conversion_Timeout_CPU_cycles_max *= __HAL_ADC_CONVCYCLES_MAX_RANGE(hadc);
mbed_official	330:c80ac197fa6a	3495
mbed_official	330:c80ac197fa6a	3496	/* Maximum conversion cycles taking in account offset of 34 CPU cycles: */
mbed_official	330:c80ac197fa6a	3497	/* number of CPU cycles for processing of conversion cycles estimation. */
mbed_official	330:c80ac197fa6a	3498	Conversion_Timeout_CPU_cycles = 34;
mbed_official	330:c80ac197fa6a	3499
mbed_official	330:c80ac197fa6a	3500	/* Poll with maximum conversion time */
mbed_official	330:c80ac197fa6a	3501	while(Conversion_Timeout_CPU_cycles < Conversion_Timeout_CPU_cycles_max)
mbed_official	330:c80ac197fa6a	3502	{
mbed_official	330:c80ac197fa6a	3503	/* Check if timeout is disabled (set to infinite wait) */
mbed_official	330:c80ac197fa6a	3504	if(Timeout != HAL_MAX_DELAY)
mbed_official	330:c80ac197fa6a	3505	{
mbed_official	330:c80ac197fa6a	3506	if((Timeout == 0) \|\| ((HAL_GetTick()-tickstart) > Timeout))
mbed_official	330:c80ac197fa6a	3507	{
mbed_official	330:c80ac197fa6a	3508	/* Update ADC state machine to timeout */
mbed_official	330:c80ac197fa6a	3509	hadc->State = HAL_ADC_STATE_TIMEOUT;
mbed_official	330:c80ac197fa6a	3510
mbed_official	330:c80ac197fa6a	3511	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3512	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3513
mbed_official	330:c80ac197fa6a	3514	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	3515	}
mbed_official	330:c80ac197fa6a	3516	}
mbed_official	330:c80ac197fa6a	3517	Conversion_Timeout_CPU_cycles ++;
mbed_official	330:c80ac197fa6a	3518	}
mbed_official	330:c80ac197fa6a	3519	}
mbed_official	330:c80ac197fa6a	3520
mbed_official	330:c80ac197fa6a	3521
mbed_official	330:c80ac197fa6a	3522	/* Clear injected group conversion flag (and regular conversion flag raised simultaneously) */
mbed_official	330:c80ac197fa6a	3523	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT \| ADC_FLAG_JEOC \| ADC_FLAG_EOC);
mbed_official	330:c80ac197fa6a	3524
mbed_official	330:c80ac197fa6a	3525	/* Check if a regular conversion is ready */
mbed_official	330:c80ac197fa6a	3526	if(hadc->State == HAL_ADC_STATE_EOC_REG)
mbed_official	330:c80ac197fa6a	3527	{
mbed_official	330:c80ac197fa6a	3528	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3529	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	330:c80ac197fa6a	3530	}
mbed_official	330:c80ac197fa6a	3531	else
mbed_official	330:c80ac197fa6a	3532	{
mbed_official	330:c80ac197fa6a	3533	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3534	hadc->State = HAL_ADC_STATE_EOC_INJ;
mbed_official	330:c80ac197fa6a	3535	}
mbed_official	330:c80ac197fa6a	3536
mbed_official	330:c80ac197fa6a	3537	/* Return ADC state */
mbed_official	330:c80ac197fa6a	3538	return HAL_OK;
mbed_official	330:c80ac197fa6a	3539	}
mbed_official	330:c80ac197fa6a	3540	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	3541
mbed_official	330:c80ac197fa6a	3542	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	3543	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	3544	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	3545	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	3546	/**
mbed_official	330:c80ac197fa6a	3547	* @brief Enables ADC, starts conversion of injected group with interruption.
mbed_official	330:c80ac197fa6a	3548	* Interruptions enabled in this function: JEOC (end of conversion).
mbed_official	330:c80ac197fa6a	3549	* Each of these interruptions has its dedicated callback function.
mbed_official	330:c80ac197fa6a	3550	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	330:c80ac197fa6a	3551	* function must be called for ADC slave first, then ADC master.
mbed_official	330:c80ac197fa6a	3552	* For ADC slave, ADC is enabled only (conversion is not started).
mbed_official	330:c80ac197fa6a	3553	* For ADC master, ADC is enabled and multimode conversion is started.
mbed_official	330:c80ac197fa6a	3554	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	3555	* @retval HAL status.
mbed_official	330:c80ac197fa6a	3556	*/
mbed_official	330:c80ac197fa6a	3557	HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	3558	{
mbed_official	330:c80ac197fa6a	3559	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	3560
mbed_official	330:c80ac197fa6a	3561	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3562	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3563
mbed_official	330:c80ac197fa6a	3564	/* Process locked */
mbed_official	330:c80ac197fa6a	3565	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	3566
mbed_official	330:c80ac197fa6a	3567	/* Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	3568	tmpHALStatus = ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	3569
mbed_official	330:c80ac197fa6a	3570	/* Start conversion if ADC is effectively enabled */
mbed_official	330:c80ac197fa6a	3571	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3572	{
mbed_official	330:c80ac197fa6a	3573	/* Check if a regular conversion is ongoing */
mbed_official	330:c80ac197fa6a	3574	if(hadc->State == HAL_ADC_STATE_BUSY_REG)
mbed_official	330:c80ac197fa6a	3575	{
mbed_official	330:c80ac197fa6a	3576	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3577	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	330:c80ac197fa6a	3578	}
mbed_official	330:c80ac197fa6a	3579	else
mbed_official	330:c80ac197fa6a	3580	{
mbed_official	330:c80ac197fa6a	3581	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3582	hadc->State = HAL_ADC_STATE_BUSY_INJ;
mbed_official	330:c80ac197fa6a	3583	}
mbed_official	330:c80ac197fa6a	3584
mbed_official	330:c80ac197fa6a	3585	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	3586	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	3587
mbed_official	330:c80ac197fa6a	3588	/* Clear injected group conversion flag */
mbed_official	330:c80ac197fa6a	3589	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	330:c80ac197fa6a	3590	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC \| ADC_FLAG_JEOS));
mbed_official	330:c80ac197fa6a	3591
mbed_official	330:c80ac197fa6a	3592	/* Enable ADC Injected context queue overflow interrupt if this feature */
mbed_official	330:c80ac197fa6a	3593	/* is enabled. */
mbed_official	330:c80ac197fa6a	3594	if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != RESET)
mbed_official	330:c80ac197fa6a	3595	{
mbed_official	330:c80ac197fa6a	3596	__HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF);
mbed_official	330:c80ac197fa6a	3597	}
mbed_official	330:c80ac197fa6a	3598
mbed_official	330:c80ac197fa6a	3599	/* Enable ADC end of conversion interrupt */
mbed_official	330:c80ac197fa6a	3600	switch(hadc->Init.EOCSelection)
mbed_official	330:c80ac197fa6a	3601	{
mbed_official	330:c80ac197fa6a	3602	case EOC_SEQ_CONV:
mbed_official	330:c80ac197fa6a	3603	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
mbed_official	330:c80ac197fa6a	3604	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
mbed_official	330:c80ac197fa6a	3605	break;
mbed_official	330:c80ac197fa6a	3606	/* case EOC_SINGLE_CONV */
mbed_official	330:c80ac197fa6a	3607	default:
mbed_official	330:c80ac197fa6a	3608	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC \| ADC_IT_JEOS);
mbed_official	330:c80ac197fa6a	3609	break;
mbed_official	330:c80ac197fa6a	3610	}
mbed_official	330:c80ac197fa6a	3611
mbed_official	330:c80ac197fa6a	3612	/* Enable conversion of injected group, if automatic injected conversion */
mbed_official	330:c80ac197fa6a	3613	/* is disabled. */
mbed_official	330:c80ac197fa6a	3614	/* If software start has been selected, conversion starts immediately. */
mbed_official	330:c80ac197fa6a	3615	/* If external trigger has been selected, conversion will start at next */
mbed_official	330:c80ac197fa6a	3616	/* trigger event. */
mbed_official	330:c80ac197fa6a	3617	/* Case of multimode enabled (for devices with several ADCs): if ADC is */
mbed_official	330:c80ac197fa6a	3618	/* slave, ADC is enabled only (conversion is not started). If ADC is */
mbed_official	330:c80ac197fa6a	3619	/* master, ADC is enabled and conversion is started. */
mbed_official	330:c80ac197fa6a	3620	if (
mbed_official	330:c80ac197fa6a	3621	HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO) &&
mbed_official	330:c80ac197fa6a	3622	__HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc) )
mbed_official	330:c80ac197fa6a	3623	{
mbed_official	330:c80ac197fa6a	3624	hadc->Instance->CR \|= ADC_CR_JADSTART;
mbed_official	330:c80ac197fa6a	3625	}
mbed_official	330:c80ac197fa6a	3626	}
mbed_official	330:c80ac197fa6a	3627
mbed_official	330:c80ac197fa6a	3628	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3629	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3630
mbed_official	330:c80ac197fa6a	3631	/* Return function status */
mbed_official	330:c80ac197fa6a	3632	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	3633	}
mbed_official	330:c80ac197fa6a	3634	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	3635	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	3636	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	3637	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	3638
mbed_official	330:c80ac197fa6a	3639	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	3640	/**
mbed_official	330:c80ac197fa6a	3641	* @brief Enables ADC, starts conversion of injected group with interruption.
mbed_official	330:c80ac197fa6a	3642	* Interruptions enabled in this function: JEOC (end of conversion),
mbed_official	330:c80ac197fa6a	3643	* overrun (if available).
mbed_official	330:c80ac197fa6a	3644	* Each of these interruptions has its dedicated callback function.
mbed_official	330:c80ac197fa6a	3645	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	3646	* @retval HAL status.
mbed_official	330:c80ac197fa6a	3647	*/
mbed_official	330:c80ac197fa6a	3648	HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	3649	{
mbed_official	330:c80ac197fa6a	3650	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	3651
mbed_official	330:c80ac197fa6a	3652	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3653	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3654
mbed_official	330:c80ac197fa6a	3655	/* Process locked */
mbed_official	330:c80ac197fa6a	3656	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	3657
mbed_official	330:c80ac197fa6a	3658	/* Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	3659	tmpHALStatus = ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	3660
mbed_official	330:c80ac197fa6a	3661	/* Start conversion if ADC is effectively enabled */
mbed_official	330:c80ac197fa6a	3662	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3663	{
mbed_official	330:c80ac197fa6a	3664	/* Check if a regular conversion is ongoing */
mbed_official	330:c80ac197fa6a	3665	if(hadc->State == HAL_ADC_STATE_BUSY_REG)
mbed_official	330:c80ac197fa6a	3666	{
mbed_official	330:c80ac197fa6a	3667	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3668	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	330:c80ac197fa6a	3669	}
mbed_official	330:c80ac197fa6a	3670	else
mbed_official	330:c80ac197fa6a	3671	{
mbed_official	330:c80ac197fa6a	3672	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3673	hadc->State = HAL_ADC_STATE_BUSY_INJ;
mbed_official	330:c80ac197fa6a	3674	}
mbed_official	330:c80ac197fa6a	3675
mbed_official	330:c80ac197fa6a	3676	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	3677	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	3678
mbed_official	330:c80ac197fa6a	3679	/* Clear injected group conversion flag */
mbed_official	330:c80ac197fa6a	3680	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	330:c80ac197fa6a	3681	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
mbed_official	330:c80ac197fa6a	3682
mbed_official	330:c80ac197fa6a	3683	/* Enable end of conversion interrupt for injected channels */
mbed_official	330:c80ac197fa6a	3684	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
mbed_official	330:c80ac197fa6a	3685
mbed_official	330:c80ac197fa6a	3686	/* Start conversion of injected group if software start has been selected */
mbed_official	330:c80ac197fa6a	3687	/* and if automatic injected conversion is disabled. */
mbed_official	330:c80ac197fa6a	3688	/* If external trigger has been selected, conversion will start at next */
mbed_official	330:c80ac197fa6a	3689	/* trigger event. */
mbed_official	330:c80ac197fa6a	3690	/* If automatic injected conversion is enabled, conversion will start */
mbed_official	330:c80ac197fa6a	3691	/* after next regular group conversion. */
mbed_official	330:c80ac197fa6a	3692	if (__HAL_ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
mbed_official	330:c80ac197fa6a	3693	HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
mbed_official	330:c80ac197fa6a	3694	{
mbed_official	330:c80ac197fa6a	3695	/* Enable ADC software conversion for injected channels */
mbed_official	330:c80ac197fa6a	3696	hadc->Instance->CR2 \|= ADC_CR2_JSWSTART;
mbed_official	330:c80ac197fa6a	3697	}
mbed_official	330:c80ac197fa6a	3698	}
mbed_official	330:c80ac197fa6a	3699
mbed_official	330:c80ac197fa6a	3700	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3701	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3702
mbed_official	330:c80ac197fa6a	3703	/* Return function status */
mbed_official	330:c80ac197fa6a	3704	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	3705	}
mbed_official	330:c80ac197fa6a	3706	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	3707
mbed_official	330:c80ac197fa6a	3708	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	3709	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	3710	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	3711	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	3712	/**
mbed_official	330:c80ac197fa6a	3713	* @brief Stop conversion of injected channels, disable interruption of
mbed_official	330:c80ac197fa6a	3714	* end-of-conversion. Disable ADC peripheral if no regular conversion
mbed_official	330:c80ac197fa6a	3715	* is on going.
mbed_official	330:c80ac197fa6a	3716	* @note If ADC must be disabled with this function and if regular conversion
mbed_official	330:c80ac197fa6a	3717	* is on going, function HAL_ADC_Stop must be used preliminarily.
mbed_official	330:c80ac197fa6a	3718	* @note: Case of multimode enabled (for devices with several ADCs): This
mbed_official	330:c80ac197fa6a	3719	* function must be called for ADC master first, then ADC slave.
mbed_official	330:c80ac197fa6a	3720	* For ADC master, conversion is stopped and ADC is disabled.
mbed_official	330:c80ac197fa6a	3721	* For ADC slave, ADC is disabled only (conversion stop of ADC master
mbed_official	330:c80ac197fa6a	3722	* has already stopped conversion of ADC slave).
mbed_official	330:c80ac197fa6a	3723	* @note In case of auto-injection mode, HAL_ADC_Stop must be used.
mbed_official	330:c80ac197fa6a	3724	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	3725	* @retval None
mbed_official	330:c80ac197fa6a	3726	*/
mbed_official	330:c80ac197fa6a	3727	HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	3728	{
mbed_official	330:c80ac197fa6a	3729	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	3730
mbed_official	330:c80ac197fa6a	3731	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3732	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3733
mbed_official	330:c80ac197fa6a	3734	/* Process locked */
mbed_official	330:c80ac197fa6a	3735	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	3736
mbed_official	330:c80ac197fa6a	3737	/* 1. Stop potential conversion on going on injected group only. */
mbed_official	330:c80ac197fa6a	3738	tmpHALStatus = ADC_ConversionStop(hadc, INJECTED_GROUP);
mbed_official	330:c80ac197fa6a	3739
mbed_official	330:c80ac197fa6a	3740	/* Disable ADC peripheral if injected conversions are effectively stopped */
mbed_official	330:c80ac197fa6a	3741	/* and if no conversion on the other group (regular group) is intended to */
mbed_official	330:c80ac197fa6a	3742	/* continue. */
mbed_official	330:c80ac197fa6a	3743	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3744	{
mbed_official	330:c80ac197fa6a	3745	/* Disable ADC end of conversion interrupt for injected channels */
mbed_official	330:c80ac197fa6a	3746	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC \| ADC_IT_JEOS));
mbed_official	330:c80ac197fa6a	3747
mbed_official	330:c80ac197fa6a	3748	if((__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) &&
mbed_official	330:c80ac197fa6a	3749	(hadc->State != HAL_ADC_STATE_BUSY_REG) &&
mbed_official	330:c80ac197fa6a	3750	(hadc->State != HAL_ADC_STATE_BUSY_INJ_REG) )
mbed_official	330:c80ac197fa6a	3751	{
mbed_official	330:c80ac197fa6a	3752	/* 2. Disable the ADC peripheral */
mbed_official	330:c80ac197fa6a	3753	tmpHALStatus = ADC_Disable(hadc);
mbed_official	330:c80ac197fa6a	3754
mbed_official	330:c80ac197fa6a	3755	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	3756	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3757	{
mbed_official	330:c80ac197fa6a	3758	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3759	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	3760	}
mbed_official	330:c80ac197fa6a	3761	}
mbed_official	330:c80ac197fa6a	3762	/* Conversion on injected group is stopped, but ADC not disabled since */
mbed_official	330:c80ac197fa6a	3763	/* conversion on regular group is still running. */
mbed_official	330:c80ac197fa6a	3764	else
mbed_official	330:c80ac197fa6a	3765	{
mbed_official	330:c80ac197fa6a	3766	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	330:c80ac197fa6a	3767	}
mbed_official	330:c80ac197fa6a	3768	}
mbed_official	330:c80ac197fa6a	3769
mbed_official	330:c80ac197fa6a	3770	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3771	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3772
mbed_official	330:c80ac197fa6a	3773	/* Return function status */
mbed_official	330:c80ac197fa6a	3774	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	3775	}
mbed_official	330:c80ac197fa6a	3776	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	3777	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	3778	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	3779	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	3780
mbed_official	330:c80ac197fa6a	3781	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	3782	/**
mbed_official	330:c80ac197fa6a	3783	* @brief Stop conversion of injected channels, disable interruption of
mbed_official	330:c80ac197fa6a	3784	* end-of-conversion. Disable ADC peripheral if no regular conversion
mbed_official	330:c80ac197fa6a	3785	* is on going.
mbed_official	330:c80ac197fa6a	3786	* @note If ADC must be disabled with this function and if regular conversion
mbed_official	330:c80ac197fa6a	3787	* is on going, function HAL_ADC_Stop must be used preliminarily.
mbed_official	330:c80ac197fa6a	3788	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	3789	* @retval None
mbed_official	330:c80ac197fa6a	3790	*/
mbed_official	330:c80ac197fa6a	3791	HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	3792	{
mbed_official	330:c80ac197fa6a	3793	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	3794
mbed_official	330:c80ac197fa6a	3795	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3796	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3797
mbed_official	330:c80ac197fa6a	3798	/* Process locked */
mbed_official	330:c80ac197fa6a	3799	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	3800
mbed_official	330:c80ac197fa6a	3801	/* Stop potential conversion and disable ADC peripheral */
mbed_official	330:c80ac197fa6a	3802	/* Conditioned to: */
mbed_official	330:c80ac197fa6a	3803	/* - No conversion on the other group (regular group) is intended to */
mbed_official	330:c80ac197fa6a	3804	/* continue (injected and regular groups stop conversion and ADC disable */
mbed_official	330:c80ac197fa6a	3805	/* are common) */
mbed_official	330:c80ac197fa6a	3806	/* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
mbed_official	330:c80ac197fa6a	3807	if((hadc->State != HAL_ADC_STATE_BUSY_REG) &&
mbed_official	330:c80ac197fa6a	3808	(hadc->State != HAL_ADC_STATE_BUSY_INJ_REG) &&
mbed_official	330:c80ac197fa6a	3809	HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
mbed_official	330:c80ac197fa6a	3810	{
mbed_official	330:c80ac197fa6a	3811	/* Stop potential conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	3812	/* Disable ADC peripheral */
mbed_official	330:c80ac197fa6a	3813	tmpHALStatus = ADC_ConversionStop_Disable(hadc);
mbed_official	330:c80ac197fa6a	3814
mbed_official	330:c80ac197fa6a	3815	/* Check if ADC is effectively disabled */
mbed_official	330:c80ac197fa6a	3816	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3817	{
mbed_official	330:c80ac197fa6a	3818	/* Disable ADC end of conversion interrupt for injected channels */
mbed_official	330:c80ac197fa6a	3819	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
mbed_official	330:c80ac197fa6a	3820
mbed_official	330:c80ac197fa6a	3821	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3822	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	3823	}
mbed_official	330:c80ac197fa6a	3824	}
mbed_official	330:c80ac197fa6a	3825	else
mbed_official	330:c80ac197fa6a	3826	{
mbed_official	330:c80ac197fa6a	3827	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	3828	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	3829
mbed_official	330:c80ac197fa6a	3830	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	3831	}
mbed_official	330:c80ac197fa6a	3832
mbed_official	330:c80ac197fa6a	3833	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3834	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3835
mbed_official	330:c80ac197fa6a	3836	/* Return function status */
mbed_official	330:c80ac197fa6a	3837	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	3838	}
mbed_official	330:c80ac197fa6a	3839	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	3840
mbed_official	330:c80ac197fa6a	3841	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	3842	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	3843	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx)
mbed_official	330:c80ac197fa6a	3844	/**
mbed_official	330:c80ac197fa6a	3845	* @brief Enables ADC, starts conversion of regular group and transfers result
mbed_official	330:c80ac197fa6a	3846	* through DMA.
mbed_official	330:c80ac197fa6a	3847	* Multimode must have been previously configured using
mbed_official	330:c80ac197fa6a	3848	* HAL_ADCEx_MultiModeConfigChannel() function.
mbed_official	330:c80ac197fa6a	3849	* Interruptions enabled in this function:
mbed_official	330:c80ac197fa6a	3850	* overrun, DMA half transfer, DMA transfer complete.
mbed_official	330:c80ac197fa6a	3851	* Each of these interruptions has its dedicated callback function.
mbed_official	330:c80ac197fa6a	3852	* @note: ADC slave can be enabled preliminarily using single-mode
mbed_official	330:c80ac197fa6a	3853	* HAL_ADC_Start() function.
mbed_official	330:c80ac197fa6a	3854	* @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
mbed_official	330:c80ac197fa6a	3855	* @param pData: The destination Buffer address.
mbed_official	330:c80ac197fa6a	3856	* @param Length: The length of data to be transferred from ADC peripheral to memory.
mbed_official	330:c80ac197fa6a	3857	* @retval None
mbed_official	330:c80ac197fa6a	3858	*/
mbed_official	330:c80ac197fa6a	3859	HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
mbed_official	330:c80ac197fa6a	3860	{
mbed_official	330:c80ac197fa6a	3861	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	3862	ADC_HandleTypeDef tmphadcSlave;
mbed_official	330:c80ac197fa6a	3863	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	330:c80ac197fa6a	3864
mbed_official	330:c80ac197fa6a	3865	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3866	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3867	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
mbed_official	330:c80ac197fa6a	3868	assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
mbed_official	330:c80ac197fa6a	3869	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
mbed_official	330:c80ac197fa6a	3870
mbed_official	330:c80ac197fa6a	3871	/* Process locked */
mbed_official	330:c80ac197fa6a	3872	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	3873
mbed_official	330:c80ac197fa6a	3874	/* Set a temporary handle of the ADC slave associated to the ADC master */
mbed_official	330:c80ac197fa6a	3875	/* (Depending on STM32F3 product, there may be up to 2 ADC slaves) */
mbed_official	330:c80ac197fa6a	3876	__HAL_ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
mbed_official	330:c80ac197fa6a	3877
mbed_official	634:ac7d6880524d	3878	if (tmphadcSlave.Instance == HAL_NULL)
mbed_official	330:c80ac197fa6a	3879	{
mbed_official	330:c80ac197fa6a	3880	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	3881	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	3882
mbed_official	330:c80ac197fa6a	3883	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3884	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3885
mbed_official	330:c80ac197fa6a	3886	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	3887	}
mbed_official	330:c80ac197fa6a	3888
mbed_official	330:c80ac197fa6a	3889
mbed_official	330:c80ac197fa6a	3890	/* Enable the ADC peripherals: master and slave (in case if not already */
mbed_official	330:c80ac197fa6a	3891	/* enabled previously) */
mbed_official	330:c80ac197fa6a	3892	tmpHALStatus = ADC_Enable(hadc);
mbed_official	330:c80ac197fa6a	3893	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3894	{
mbed_official	330:c80ac197fa6a	3895	tmpHALStatus = ADC_Enable(&tmphadcSlave);
mbed_official	330:c80ac197fa6a	3896	}
mbed_official	330:c80ac197fa6a	3897
mbed_official	330:c80ac197fa6a	3898	/* Start conversion all ADCs of multimode are effectively enabled */
mbed_official	330:c80ac197fa6a	3899	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3900	{
mbed_official	330:c80ac197fa6a	3901	/* State machine update (ADC master): Check if an injected conversion is */
mbed_official	330:c80ac197fa6a	3902	/* ongoing. */
mbed_official	330:c80ac197fa6a	3903	if(hadc->State == HAL_ADC_STATE_BUSY_INJ)
mbed_official	330:c80ac197fa6a	3904	{
mbed_official	330:c80ac197fa6a	3905	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3906	hadc->State = HAL_ADC_STATE_BUSY_INJ_REG;
mbed_official	330:c80ac197fa6a	3907	}
mbed_official	330:c80ac197fa6a	3908	else
mbed_official	330:c80ac197fa6a	3909	{
mbed_official	330:c80ac197fa6a	3910	/* Change ADC state */
mbed_official	330:c80ac197fa6a	3911	hadc->State = HAL_ADC_STATE_BUSY_REG;
mbed_official	330:c80ac197fa6a	3912	}
mbed_official	330:c80ac197fa6a	3913
mbed_official	330:c80ac197fa6a	3914	/* Set ADC error code to none */
mbed_official	330:c80ac197fa6a	3915	__HAL_ADC_CLEAR_ERRORCODE(hadc);
mbed_official	330:c80ac197fa6a	3916
mbed_official	330:c80ac197fa6a	3917
mbed_official	330:c80ac197fa6a	3918	/* Set the DMA transfer complete callback */
mbed_official	330:c80ac197fa6a	3919	hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
mbed_official	330:c80ac197fa6a	3920
mbed_official	330:c80ac197fa6a	3921	/* Set the DMA half transfer complete callback */
mbed_official	330:c80ac197fa6a	3922	hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
mbed_official	330:c80ac197fa6a	3923
mbed_official	330:c80ac197fa6a	3924	/* Set the DMA error callback */
mbed_official	330:c80ac197fa6a	3925	hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
mbed_official	330:c80ac197fa6a	3926
mbed_official	330:c80ac197fa6a	3927	/* Pointer to the common control register to which is belonging hadc */
mbed_official	330:c80ac197fa6a	3928	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	330:c80ac197fa6a	3929	/* control registers) */
mbed_official	330:c80ac197fa6a	3930	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	330:c80ac197fa6a	3931
mbed_official	330:c80ac197fa6a	3932
mbed_official	330:c80ac197fa6a	3933	/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
mbed_official	330:c80ac197fa6a	3934	/* start (in case of SW start): */
mbed_official	330:c80ac197fa6a	3935
mbed_official	330:c80ac197fa6a	3936	/* Clear regular group conversion flag and overrun flag */
mbed_official	330:c80ac197fa6a	3937	/* (To ensure of no unknown state from potential previous ADC operations) */
mbed_official	330:c80ac197fa6a	3938	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC \| ADC_FLAG_EOS \| ADC_FLAG_OVR));
mbed_official	330:c80ac197fa6a	3939
mbed_official	330:c80ac197fa6a	3940	/* Enable ADC overrun interrupt */
mbed_official	330:c80ac197fa6a	3941	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
mbed_official	330:c80ac197fa6a	3942
mbed_official	330:c80ac197fa6a	3943	/* Start the DMA channel */
mbed_official	330:c80ac197fa6a	3944	HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
mbed_official	330:c80ac197fa6a	3945
mbed_official	330:c80ac197fa6a	3946	/* Enable conversion of regular group. */
mbed_official	330:c80ac197fa6a	3947	/* If software start has been selected, conversion starts immediately. */
mbed_official	330:c80ac197fa6a	3948	/* If external trigger has been selected, conversion will start at next */
mbed_official	330:c80ac197fa6a	3949	/* trigger event. */
mbed_official	330:c80ac197fa6a	3950	hadc->Instance->CR \|= ADC_CR_ADSTART;
mbed_official	330:c80ac197fa6a	3951
mbed_official	330:c80ac197fa6a	3952	}
mbed_official	330:c80ac197fa6a	3953
mbed_official	330:c80ac197fa6a	3954	/* Process unlocked */
mbed_official	330:c80ac197fa6a	3955	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	3956
mbed_official	330:c80ac197fa6a	3957	/* Return function status */
mbed_official	330:c80ac197fa6a	3958	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	3959	}
mbed_official	330:c80ac197fa6a	3960
mbed_official	330:c80ac197fa6a	3961	/**
mbed_official	330:c80ac197fa6a	3962	* @brief Stop ADC conversion of regular group (and injected channels in
mbed_official	330:c80ac197fa6a	3963	* case of auto_injection mode), disable ADC DMA transfer, disable
mbed_official	330:c80ac197fa6a	3964	* ADC peripheral.
mbed_official	330:c80ac197fa6a	3965	* @note Multimode is kept enabled after this function. To disable multimode
mbed_official	330:c80ac197fa6a	3966	* (set with HAL_ADCEx_MultiModeConfigChannel(), ADC must be
mbed_official	330:c80ac197fa6a	3967	* reinitialized using HAL_ADC_Init() or HAL_ADC_ReInit().
mbed_official	330:c80ac197fa6a	3968	* @note In case of DMA configured in circular mode, function
mbed_official	330:c80ac197fa6a	3969	* HAL_ADC_Stop_DMA must be called after this function with handle of
mbed_official	330:c80ac197fa6a	3970	* ADC slave, to properly disable the DMA channel.
mbed_official	330:c80ac197fa6a	3971	* @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
mbed_official	330:c80ac197fa6a	3972	* @retval None
mbed_official	330:c80ac197fa6a	3973	*/
mbed_official	330:c80ac197fa6a	3974	HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	3975	{
mbed_official	330:c80ac197fa6a	3976	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	3977	uint32_t tickstart;
mbed_official	330:c80ac197fa6a	3978	ADC_HandleTypeDef tmphadcSlave;
mbed_official	330:c80ac197fa6a	3979	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	330:c80ac197fa6a	3980
mbed_official	330:c80ac197fa6a	3981	/* Check the parameters */
mbed_official	330:c80ac197fa6a	3982	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	3983
mbed_official	330:c80ac197fa6a	3984	/* Process locked */
mbed_official	330:c80ac197fa6a	3985	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	3986
mbed_official	330:c80ac197fa6a	3987
mbed_official	330:c80ac197fa6a	3988	/* 1. Stop potential multimode conversion on going, on regular and injected groups */
mbed_official	330:c80ac197fa6a	3989	tmpHALStatus = ADC_ConversionStop(hadc, REGULAR_INJECTED_GROUP);
mbed_official	330:c80ac197fa6a	3990
mbed_official	330:c80ac197fa6a	3991	/* Disable ADC peripheral if conversions are effectively stopped */
mbed_official	330:c80ac197fa6a	3992	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	3993	{
mbed_official	330:c80ac197fa6a	3994	/* Set a temporary handle of the ADC slave associated to the ADC master */
mbed_official	330:c80ac197fa6a	3995	/* (Depending on STM32F3 product, there may be up to 2 ADC slaves) */
mbed_official	330:c80ac197fa6a	3996	__HAL_ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
mbed_official	330:c80ac197fa6a	3997
mbed_official	634:ac7d6880524d	3998	if (tmphadcSlave.Instance == HAL_NULL)
mbed_official	330:c80ac197fa6a	3999	{
mbed_official	330:c80ac197fa6a	4000	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	4001	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	4002
mbed_official	330:c80ac197fa6a	4003	/* Process unlocked */
mbed_official	330:c80ac197fa6a	4004	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	4005
mbed_official	330:c80ac197fa6a	4006	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	4007	}
mbed_official	330:c80ac197fa6a	4008
mbed_official	330:c80ac197fa6a	4009	/* Procedure to disable the ADC peripheral: wait for conversions */
mbed_official	330:c80ac197fa6a	4010	/* effectively stopped (ADC master and ADC slave), then disable ADC */
mbed_official	330:c80ac197fa6a	4011
mbed_official	330:c80ac197fa6a	4012	/* 1. Wait until ADSTP=0 for ADC master and ADC slave*/
mbed_official	330:c80ac197fa6a	4013	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	4014
mbed_official	330:c80ac197fa6a	4015	while(__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) \|\|
mbed_official	330:c80ac197fa6a	4016	__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSlave) )
mbed_official	330:c80ac197fa6a	4017	{
mbed_official	330:c80ac197fa6a	4018	if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
mbed_official	330:c80ac197fa6a	4019	{
mbed_official	330:c80ac197fa6a	4020	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	4021	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	4022
mbed_official	330:c80ac197fa6a	4023	/* Process unlocked */
mbed_official	330:c80ac197fa6a	4024	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	4025
mbed_official	330:c80ac197fa6a	4026	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	4027	}
mbed_official	330:c80ac197fa6a	4028	}
mbed_official	330:c80ac197fa6a	4029
mbed_official	330:c80ac197fa6a	4030
mbed_official	330:c80ac197fa6a	4031	/* Pointer to the common control register to which is belonging hadc */
mbed_official	330:c80ac197fa6a	4032	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	330:c80ac197fa6a	4033	/* control registers) */
mbed_official	330:c80ac197fa6a	4034	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	330:c80ac197fa6a	4035
mbed_official	330:c80ac197fa6a	4036	/* Reset configuration of ADC DMA continuous request for dual mode */
mbed_official	330:c80ac197fa6a	4037	tmpADC_Common->CCR &= ~ADC_CCR_DMACFG;
mbed_official	330:c80ac197fa6a	4038
mbed_official	330:c80ac197fa6a	4039	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
mbed_official	330:c80ac197fa6a	4040	/* while DMA transfer is on going) */
mbed_official	330:c80ac197fa6a	4041	/* Note: DMA channel of ADC slave should stopped after this function with */
mbed_official	330:c80ac197fa6a	4042	/* function HAL_ADC_Stop_DMA. */
mbed_official	330:c80ac197fa6a	4043	tmpHALStatus = HAL_DMA_Abort(hadc->DMA_Handle);
mbed_official	330:c80ac197fa6a	4044
mbed_official	330:c80ac197fa6a	4045	/* Check if DMA channel effectively disabled */
mbed_official	330:c80ac197fa6a	4046	if (tmpHALStatus != HAL_OK)
mbed_official	330:c80ac197fa6a	4047	{
mbed_official	330:c80ac197fa6a	4048	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	4049	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	4050	}
mbed_official	330:c80ac197fa6a	4051
mbed_official	330:c80ac197fa6a	4052	/* Disable ADC overrun interrupt */
mbed_official	330:c80ac197fa6a	4053	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
mbed_official	330:c80ac197fa6a	4054
mbed_official	330:c80ac197fa6a	4055
mbed_official	330:c80ac197fa6a	4056
mbed_official	330:c80ac197fa6a	4057	/* 2. Disable the ADC peripherals: master and slave */
mbed_official	330:c80ac197fa6a	4058	/* Update "tmpHALStatus" only if DMA channel disabling passed, to keep in */
mbed_official	330:c80ac197fa6a	4059	/* memory a potential failing status. */
mbed_official	330:c80ac197fa6a	4060	if (tmpHALStatus != HAL_ERROR)
mbed_official	330:c80ac197fa6a	4061	{
mbed_official	330:c80ac197fa6a	4062	/* Check if ADC are effectively disabled */
mbed_official	330:c80ac197fa6a	4063	if ((ADC_Disable(hadc) != HAL_ERROR) &&
mbed_official	330:c80ac197fa6a	4064	(ADC_Disable(&tmphadcSlave) != HAL_ERROR) )
mbed_official	330:c80ac197fa6a	4065	{
mbed_official	330:c80ac197fa6a	4066	tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	4067
mbed_official	330:c80ac197fa6a	4068	/* Change ADC state (ADC master) */
mbed_official	330:c80ac197fa6a	4069	hadc->State = HAL_ADC_STATE_READY;
mbed_official	330:c80ac197fa6a	4070	}
mbed_official	330:c80ac197fa6a	4071	}
mbed_official	330:c80ac197fa6a	4072	else
mbed_official	330:c80ac197fa6a	4073	{
mbed_official	330:c80ac197fa6a	4074	ADC_Disable(hadc);
mbed_official	330:c80ac197fa6a	4075	ADC_Disable(&tmphadcSlave);
mbed_official	330:c80ac197fa6a	4076	}
mbed_official	330:c80ac197fa6a	4077
mbed_official	330:c80ac197fa6a	4078	}
mbed_official	330:c80ac197fa6a	4079
mbed_official	330:c80ac197fa6a	4080	/* Process unlocked */
mbed_official	330:c80ac197fa6a	4081	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	4082
mbed_official	330:c80ac197fa6a	4083	/* Return function status */
mbed_official	330:c80ac197fa6a	4084	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	4085	}
mbed_official	330:c80ac197fa6a	4086
mbed_official	330:c80ac197fa6a	4087	/**
mbed_official	330:c80ac197fa6a	4088	* @brief Returns the last ADC Master&Slave regular conversions results data
mbed_official	330:c80ac197fa6a	4089	* in the selected multi mode.
mbed_official	330:c80ac197fa6a	4090	* @param hadc: ADC handle of ADC master (handle of ADC slave must not be used)
mbed_official	330:c80ac197fa6a	4091	* @retval The converted data value.
mbed_official	330:c80ac197fa6a	4092	*/
mbed_official	330:c80ac197fa6a	4093	uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	4094	{
mbed_official	330:c80ac197fa6a	4095	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	330:c80ac197fa6a	4096
mbed_official	330:c80ac197fa6a	4097	/* Check the parameters */
mbed_official	330:c80ac197fa6a	4098	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	4099
mbed_official	330:c80ac197fa6a	4100	/* Pointer to the common control register to which is belonging hadc */
mbed_official	330:c80ac197fa6a	4101	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	330:c80ac197fa6a	4102	/* control registers) */
mbed_official	330:c80ac197fa6a	4103	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	330:c80ac197fa6a	4104
mbed_official	330:c80ac197fa6a	4105	/* Return the multi mode conversion value */
mbed_official	330:c80ac197fa6a	4106	return tmpADC_Common->CDR;
mbed_official	330:c80ac197fa6a	4107	}
mbed_official	330:c80ac197fa6a	4108	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	4109	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	4110	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx */
mbed_official	330:c80ac197fa6a	4111
mbed_official	330:c80ac197fa6a	4112	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	4113	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	4114	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	4115	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	4116	/**
mbed_official	330:c80ac197fa6a	4117	* @brief Get ADC injected group conversion result.
mbed_official	330:c80ac197fa6a	4118	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	4119	* @param InjectedRank: the converted ADC injected rank.
mbed_official	330:c80ac197fa6a	4120	* This parameter can be one of the following values:
mbed_official	330:c80ac197fa6a	4121	* @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
mbed_official	330:c80ac197fa6a	4122	* @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
mbed_official	330:c80ac197fa6a	4123	* @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
mbed_official	330:c80ac197fa6a	4124	* @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
mbed_official	330:c80ac197fa6a	4125	* @retval None
mbed_official	330:c80ac197fa6a	4126	*/
mbed_official	330:c80ac197fa6a	4127	uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
mbed_official	330:c80ac197fa6a	4128	{
mbed_official	330:c80ac197fa6a	4129	uint32_t tmp_jdr = 0;
mbed_official	330:c80ac197fa6a	4130
mbed_official	330:c80ac197fa6a	4131	/* Check the parameters */
mbed_official	330:c80ac197fa6a	4132	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	4133	assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
mbed_official	330:c80ac197fa6a	4134
mbed_official	330:c80ac197fa6a	4135	/* Clear injected group conversion flag to have similar behaviour as */
mbed_official	330:c80ac197fa6a	4136	/* regular group: reading data register also clears end of conversion flag, */
mbed_official	330:c80ac197fa6a	4137	/* and in case of usage of ADC feature "LowPowerAutoWait". */
mbed_official	330:c80ac197fa6a	4138	__HAL_ADC_CLEAR_FLAG(hadc,(ADC_FLAG_JEOC \| ADC_FLAG_JEOS));
mbed_official	330:c80ac197fa6a	4139
mbed_official	330:c80ac197fa6a	4140	/* Get ADC converted value */
mbed_official	330:c80ac197fa6a	4141	switch(InjectedRank)
mbed_official	330:c80ac197fa6a	4142	{
mbed_official	330:c80ac197fa6a	4143	case ADC_INJECTED_RANK_4:
mbed_official	330:c80ac197fa6a	4144	tmp_jdr = hadc->Instance->JDR4;
mbed_official	330:c80ac197fa6a	4145	break;
mbed_official	330:c80ac197fa6a	4146	case ADC_INJECTED_RANK_3:
mbed_official	330:c80ac197fa6a	4147	tmp_jdr = hadc->Instance->JDR3;
mbed_official	330:c80ac197fa6a	4148	break;
mbed_official	330:c80ac197fa6a	4149	case ADC_INJECTED_RANK_2:
mbed_official	330:c80ac197fa6a	4150	tmp_jdr = hadc->Instance->JDR2;
mbed_official	330:c80ac197fa6a	4151	break;
mbed_official	330:c80ac197fa6a	4152	case ADC_INJECTED_RANK_1:
mbed_official	330:c80ac197fa6a	4153	default:
mbed_official	330:c80ac197fa6a	4154	tmp_jdr = hadc->Instance->JDR1;
mbed_official	330:c80ac197fa6a	4155	break;
mbed_official	330:c80ac197fa6a	4156	}
mbed_official	330:c80ac197fa6a	4157
mbed_official	330:c80ac197fa6a	4158	/* Return ADC converted value */
mbed_official	330:c80ac197fa6a	4159	return tmp_jdr;
mbed_official	330:c80ac197fa6a	4160	}
mbed_official	330:c80ac197fa6a	4161	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	4162	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	4163	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	4164	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	4165
mbed_official	330:c80ac197fa6a	4166	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	4167	/**
mbed_official	330:c80ac197fa6a	4168	* @brief Get ADC injected group conversion result.
mbed_official	330:c80ac197fa6a	4169	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	4170	* @param InjectedRank: the converted ADC injected rank.
mbed_official	330:c80ac197fa6a	4171	* This parameter can be one of the following values:
mbed_official	330:c80ac197fa6a	4172	* @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
mbed_official	330:c80ac197fa6a	4173	* @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
mbed_official	330:c80ac197fa6a	4174	* @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
mbed_official	330:c80ac197fa6a	4175	* @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
mbed_official	330:c80ac197fa6a	4176	* @retval None
mbed_official	330:c80ac197fa6a	4177	*/
mbed_official	330:c80ac197fa6a	4178	uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
mbed_official	330:c80ac197fa6a	4179	{
mbed_official	330:c80ac197fa6a	4180	uint32_t tmp_jdr = 0;
mbed_official	330:c80ac197fa6a	4181
mbed_official	330:c80ac197fa6a	4182	/* Check the parameters */
mbed_official	330:c80ac197fa6a	4183	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	4184	assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
mbed_official	330:c80ac197fa6a	4185
mbed_official	330:c80ac197fa6a	4186	/* Clear injected group conversion flag to have similar behaviour as */
mbed_official	330:c80ac197fa6a	4187	/* regular group: reading data register also clears end of conversion flag. */
mbed_official	330:c80ac197fa6a	4188	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
mbed_official	330:c80ac197fa6a	4189
mbed_official	330:c80ac197fa6a	4190	/* Get ADC converted value */
mbed_official	330:c80ac197fa6a	4191	switch(InjectedRank)
mbed_official	330:c80ac197fa6a	4192	{
mbed_official	330:c80ac197fa6a	4193	case ADC_INJECTED_RANK_4:
mbed_official	330:c80ac197fa6a	4194	tmp_jdr = hadc->Instance->JDR4;
mbed_official	330:c80ac197fa6a	4195	break;
mbed_official	330:c80ac197fa6a	4196	case ADC_INJECTED_RANK_3:
mbed_official	330:c80ac197fa6a	4197	tmp_jdr = hadc->Instance->JDR3;
mbed_official	330:c80ac197fa6a	4198	break;
mbed_official	330:c80ac197fa6a	4199	case ADC_INJECTED_RANK_2:
mbed_official	330:c80ac197fa6a	4200	tmp_jdr = hadc->Instance->JDR2;
mbed_official	330:c80ac197fa6a	4201	break;
mbed_official	330:c80ac197fa6a	4202	case ADC_INJECTED_RANK_1:
mbed_official	330:c80ac197fa6a	4203	default:
mbed_official	330:c80ac197fa6a	4204	tmp_jdr = hadc->Instance->JDR1;
mbed_official	330:c80ac197fa6a	4205	break;
mbed_official	330:c80ac197fa6a	4206	}
mbed_official	330:c80ac197fa6a	4207
mbed_official	330:c80ac197fa6a	4208	/* Return ADC converted value */
mbed_official	330:c80ac197fa6a	4209	return tmp_jdr;
mbed_official	330:c80ac197fa6a	4210	}
mbed_official	330:c80ac197fa6a	4211	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	4212
mbed_official	330:c80ac197fa6a	4213	/**
mbed_official	330:c80ac197fa6a	4214	* @brief Injected conversion complete callback in non blocking mode
mbed_official	330:c80ac197fa6a	4215	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	4216	* @retval None
mbed_official	330:c80ac197fa6a	4217	*/
mbed_official	330:c80ac197fa6a	4218	__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	4219	{
mbed_official	330:c80ac197fa6a	4220	/* NOTE : This function Should not be modified, when the callback is needed,
mbed_official	330:c80ac197fa6a	4221	the HAL_ADCEx_InjectedConvCpltCallback could be implemented in the user file
mbed_official	330:c80ac197fa6a	4222	*/
mbed_official	330:c80ac197fa6a	4223	}
mbed_official	330:c80ac197fa6a	4224
mbed_official	330:c80ac197fa6a	4225	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	4226	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	4227	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	4228	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	4229	/**
mbed_official	330:c80ac197fa6a	4230	* @brief Injected context queue overflow flag callback.
mbed_official	330:c80ac197fa6a	4231	* @note: This callback is called if injected context queue is enabled
mbed_official	330:c80ac197fa6a	4232	(parameter "QueueInjectedContext" in injected channel configuration)
mbed_official	330:c80ac197fa6a	4233	and if a new injected context is set when queue is full (maximum 2
mbed_official	330:c80ac197fa6a	4234	contexts).
mbed_official	330:c80ac197fa6a	4235	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	4236	* @retval None
mbed_official	330:c80ac197fa6a	4237	*/
mbed_official	330:c80ac197fa6a	4238	__weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	4239	{
mbed_official	330:c80ac197fa6a	4240	/* NOTE : This function should not be modified. When the callback is needed,
mbed_official	330:c80ac197fa6a	4241	function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented
mbed_official	330:c80ac197fa6a	4242	in the user file.
mbed_official	330:c80ac197fa6a	4243	*/
mbed_official	330:c80ac197fa6a	4244	}
mbed_official	330:c80ac197fa6a	4245	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	4246	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	4247	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	4248	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	4249
mbed_official	330:c80ac197fa6a	4250	/**
mbed_official	330:c80ac197fa6a	4251	* @}
mbed_official	330:c80ac197fa6a	4252	*/
mbed_official	330:c80ac197fa6a	4253
mbed_official	330:c80ac197fa6a	4254	/** @defgroup ADCEx_Exported_Functions_Group3 Extended Peripheral Control functions
mbed_official	330:c80ac197fa6a	4255	* @brief Extended Peripheral Control functions
mbed_official	330:c80ac197fa6a	4256	*
mbed_official	330:c80ac197fa6a	4257	@verbatim
mbed_official	330:c80ac197fa6a	4258	===============================================================================
mbed_official	330:c80ac197fa6a	4259	##### Peripheral Control functions #####
mbed_official	330:c80ac197fa6a	4260	===============================================================================
mbed_official	330:c80ac197fa6a	4261	[..] This section provides functions allowing to:
mbed_official	330:c80ac197fa6a	4262	(+) Configure channels on regular group
mbed_official	330:c80ac197fa6a	4263	(+) Configure channels on injected group
mbed_official	330:c80ac197fa6a	4264	(+) Configure multimode
mbed_official	330:c80ac197fa6a	4265	(+) Configure the analog watchdog
mbed_official	330:c80ac197fa6a	4266
mbed_official	330:c80ac197fa6a	4267	@endverbatim
mbed_official	330:c80ac197fa6a	4268	* @{
mbed_official	330:c80ac197fa6a	4269	*/
mbed_official	330:c80ac197fa6a	4270
mbed_official	330:c80ac197fa6a	4271
mbed_official	330:c80ac197fa6a	4272	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	4273	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	4274	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	4275	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	4276	/**
mbed_official	330:c80ac197fa6a	4277	* @brief Configures the the selected channel to be linked to the regular
mbed_official	330:c80ac197fa6a	4278	* group.
mbed_official	330:c80ac197fa6a	4279	* @note In case of usage of internal measurement channels:
mbed_official	330:c80ac197fa6a	4280	* Vbat/VrefInt/TempSensor.
mbed_official	330:c80ac197fa6a	4281	* The recommended sampling time is at least:
mbed_official	330:c80ac197fa6a	4282	* - For devices STM32F37x: 17.1us for temperature sensor
mbed_official	330:c80ac197fa6a	4283	* - For the other STM32F3 devices: 2.2us for each of channels
mbed_official	330:c80ac197fa6a	4284	* Vbat/VrefInt/TempSensor.
mbed_official	330:c80ac197fa6a	4285	* These internal paths can be be disabled using function
mbed_official	330:c80ac197fa6a	4286	* HAL_ADC_DeInit().
mbed_official	330:c80ac197fa6a	4287	* @note Possibility to update parameters on the fly:
mbed_official	330:c80ac197fa6a	4288	* This function initializes channel into regular group, following
mbed_official	330:c80ac197fa6a	4289	* calls to this function can be used to reconfigure some parameters
mbed_official	330:c80ac197fa6a	4290	* of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
mbed_official	330:c80ac197fa6a	4291	* the ADC.
mbed_official	330:c80ac197fa6a	4292	* The setting of these parameters is conditioned to ADC state.
mbed_official	330:c80ac197fa6a	4293	* For parameters constraints, see comments of structure
mbed_official	330:c80ac197fa6a	4294	* "ADC_ChannelConfTypeDef".
mbed_official	330:c80ac197fa6a	4295	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	4296	* @param sConfig: Structure ADC channel for regular group.
mbed_official	330:c80ac197fa6a	4297	* @retval HAL status
mbed_official	330:c80ac197fa6a	4298	*/
mbed_official	330:c80ac197fa6a	4299	HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
mbed_official	330:c80ac197fa6a	4300	{
mbed_official	330:c80ac197fa6a	4301	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	4302	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	330:c80ac197fa6a	4303	ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
mbed_official	330:c80ac197fa6a	4304	uint32_t tmpOffsetShifted;
mbed_official	330:c80ac197fa6a	4305	uint32_t WaitLoopIndex = 0;
mbed_official	330:c80ac197fa6a	4306
mbed_official	330:c80ac197fa6a	4307	/* Check the parameters */
mbed_official	330:c80ac197fa6a	4308	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	4309	assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
mbed_official	330:c80ac197fa6a	4310	assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
mbed_official	330:c80ac197fa6a	4311	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfig->SingleDiff));
mbed_official	330:c80ac197fa6a	4312	assert_param(IS_ADC_OFFSET_NUMBER(sConfig->OffsetNumber));
mbed_official	330:c80ac197fa6a	4313	assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), sConfig->Offset));
mbed_official	330:c80ac197fa6a	4314
mbed_official	330:c80ac197fa6a	4315
mbed_official	330:c80ac197fa6a	4316	/* Verification of channel number: Channels 1 to 14 are available in */
mbed_official	330:c80ac197fa6a	4317	/* differential mode. Channels 15, 16, 17, 18 can be used only in */
mbed_official	330:c80ac197fa6a	4318	/* single-ended mode. */
mbed_official	330:c80ac197fa6a	4319	if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED)
mbed_official	330:c80ac197fa6a	4320	{
mbed_official	330:c80ac197fa6a	4321	assert_param(IS_ADC_CHANNEL(sConfig->Channel));
mbed_official	330:c80ac197fa6a	4322	}
mbed_official	330:c80ac197fa6a	4323	else
mbed_official	330:c80ac197fa6a	4324	{
mbed_official	330:c80ac197fa6a	4325	assert_param(IS_ADC_DIFF_CHANNEL(sConfig->Channel));
mbed_official	330:c80ac197fa6a	4326	}
mbed_official	330:c80ac197fa6a	4327
mbed_official	330:c80ac197fa6a	4328	/* Process locked */
mbed_official	330:c80ac197fa6a	4329	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	4330
mbed_official	330:c80ac197fa6a	4331
mbed_official	330:c80ac197fa6a	4332	/* Parameters update conditioned to ADC state: */
mbed_official	330:c80ac197fa6a	4333	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	330:c80ac197fa6a	4334	/* conversion on going on regular group: */
mbed_official	330:c80ac197fa6a	4335	/* - Channel number */
mbed_official	330:c80ac197fa6a	4336	/* - Channel rank */
mbed_official	330:c80ac197fa6a	4337	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
mbed_official	330:c80ac197fa6a	4338	{
mbed_official	330:c80ac197fa6a	4339	/* Regular sequence configuration */
mbed_official	330:c80ac197fa6a	4340	/* For Rank 1 to 4 */
mbed_official	330:c80ac197fa6a	4341	if (sConfig->Rank < 5)
mbed_official	330:c80ac197fa6a	4342	{
mbed_official	330:c80ac197fa6a	4343	/* Clear the old SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4344	hadc->Instance->SQR1 &= ~__HAL_ADC_SQR1_RK(ADC_SQR2_SQ5, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4345
mbed_official	330:c80ac197fa6a	4346	/* Set the SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4347	hadc->Instance->SQR1 \|= __HAL_ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4348	}
mbed_official	330:c80ac197fa6a	4349	/* For Rank 5 to 9 */
mbed_official	330:c80ac197fa6a	4350	else if (sConfig->Rank < 10)
mbed_official	330:c80ac197fa6a	4351	{
mbed_official	330:c80ac197fa6a	4352	/* Clear the old SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4353	hadc->Instance->SQR2 &= ~__HAL_ADC_SQR2_RK(ADC_SQR2_SQ5, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4354
mbed_official	330:c80ac197fa6a	4355	/* Set the SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4356	hadc->Instance->SQR2 \|= __HAL_ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4357	}
mbed_official	330:c80ac197fa6a	4358	/* For Rank 10 to 14 */
mbed_official	330:c80ac197fa6a	4359	else if (sConfig->Rank < 15)
mbed_official	330:c80ac197fa6a	4360	{
mbed_official	330:c80ac197fa6a	4361	/* Clear the old SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4362	hadc->Instance->SQR3 &= ~__HAL_ADC_SQR3_RK(ADC_SQR3_SQ10, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4363
mbed_official	330:c80ac197fa6a	4364	/* Set the SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4365	hadc->Instance->SQR3 \|= __HAL_ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4366	}
mbed_official	330:c80ac197fa6a	4367	/* For Rank 15 to 16 */
mbed_official	330:c80ac197fa6a	4368	else
mbed_official	330:c80ac197fa6a	4369	{
mbed_official	330:c80ac197fa6a	4370	/* Clear the old SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4371	hadc->Instance->SQR4 &= ~__HAL_ADC_SQR4_RK(ADC_SQR4_SQ15, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4372
mbed_official	330:c80ac197fa6a	4373	/* Set the SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4374	hadc->Instance->SQR4 \|= __HAL_ADC_SQR4_RK(sConfig->Channel, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4375	}
mbed_official	330:c80ac197fa6a	4376
mbed_official	330:c80ac197fa6a	4377
mbed_official	330:c80ac197fa6a	4378	/* Parameters update conditioned to ADC state: */
mbed_official	330:c80ac197fa6a	4379	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	330:c80ac197fa6a	4380	/* conversion on going on regular group: */
mbed_official	330:c80ac197fa6a	4381	/* - Channel sampling time */
mbed_official	330:c80ac197fa6a	4382	/* - Channel offset */
mbed_official	330:c80ac197fa6a	4383	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
mbed_official	330:c80ac197fa6a	4384	{
mbed_official	330:c80ac197fa6a	4385	/* Channel sampling time configuration */
mbed_official	330:c80ac197fa6a	4386	/* For channels 10 to 18 */
mbed_official	330:c80ac197fa6a	4387	if (sConfig->Channel > ADC_CHANNEL_10)
mbed_official	330:c80ac197fa6a	4388	{
mbed_official	330:c80ac197fa6a	4389	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	4390	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR1_SMP0, sConfig->Channel);
mbed_official	330:c80ac197fa6a	4391
mbed_official	330:c80ac197fa6a	4392	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	4393	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
mbed_official	330:c80ac197fa6a	4394	}
mbed_official	330:c80ac197fa6a	4395	else /* For channels 0 to 9 */
mbed_official	330:c80ac197fa6a	4396	{
mbed_official	330:c80ac197fa6a	4397	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	4398	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR2_SMP10, sConfig->Channel);
mbed_official	330:c80ac197fa6a	4399
mbed_official	330:c80ac197fa6a	4400	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	4401	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
mbed_official	330:c80ac197fa6a	4402	}
mbed_official	330:c80ac197fa6a	4403
mbed_official	330:c80ac197fa6a	4404
mbed_official	330:c80ac197fa6a	4405	/* Configure the offset: offset enable/disable, channel, offset value */
mbed_official	330:c80ac197fa6a	4406
mbed_official	330:c80ac197fa6a	4407	/* Shift the offset in function of the selected ADC resolution. */
mbed_official	330:c80ac197fa6a	4408	/* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
mbed_official	330:c80ac197fa6a	4409	tmpOffsetShifted = __HAL_ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfig->Offset);
mbed_official	330:c80ac197fa6a	4410
mbed_official	330:c80ac197fa6a	4411	switch (sConfig->OffsetNumber)
mbed_official	330:c80ac197fa6a	4412	{
mbed_official	330:c80ac197fa6a	4413	case ADC_OFFSET_1:
mbed_official	330:c80ac197fa6a	4414	/* Configure offset register 1: */
mbed_official	330:c80ac197fa6a	4415	/* - Enable offset */
mbed_official	330:c80ac197fa6a	4416	/* - Set channel number */
mbed_official	330:c80ac197fa6a	4417	/* - Set offset value */
mbed_official	330:c80ac197fa6a	4418	hadc->Instance->OFR1 &= ~( ADC_OFR1_OFFSET1_CH \|
mbed_official	330:c80ac197fa6a	4419	ADC_OFR1_OFFSET1 );
mbed_official	330:c80ac197fa6a	4420	hadc->Instance->OFR1 \|= ( ADC_OFR1_OFFSET1_EN \|
mbed_official	330:c80ac197fa6a	4421	__HAL_ADC_OFR_CHANNEL(sConfig->Channel) \|
mbed_official	330:c80ac197fa6a	4422	tmpOffsetShifted );
mbed_official	330:c80ac197fa6a	4423	break;
mbed_official	330:c80ac197fa6a	4424
mbed_official	330:c80ac197fa6a	4425	case ADC_OFFSET_2:
mbed_official	330:c80ac197fa6a	4426	/* Configure offset register 2: */
mbed_official	330:c80ac197fa6a	4427	/* - Enable offset */
mbed_official	330:c80ac197fa6a	4428	/* - Set channel number */
mbed_official	330:c80ac197fa6a	4429	/* - Set offset value */
mbed_official	330:c80ac197fa6a	4430	hadc->Instance->OFR2 &= ~( ADC_OFR2_OFFSET2_CH \|
mbed_official	330:c80ac197fa6a	4431	ADC_OFR2_OFFSET2 );
mbed_official	330:c80ac197fa6a	4432	hadc->Instance->OFR2 \|= ( ADC_OFR2_OFFSET2_EN \|
mbed_official	330:c80ac197fa6a	4433	__HAL_ADC_OFR_CHANNEL(sConfig->Channel) \|
mbed_official	330:c80ac197fa6a	4434	tmpOffsetShifted );
mbed_official	330:c80ac197fa6a	4435	break;
mbed_official	330:c80ac197fa6a	4436
mbed_official	330:c80ac197fa6a	4437	case ADC_OFFSET_3:
mbed_official	330:c80ac197fa6a	4438	/* Configure offset register 3: */
mbed_official	330:c80ac197fa6a	4439	/* - Enable offset */
mbed_official	330:c80ac197fa6a	4440	/* - Set channel number */
mbed_official	330:c80ac197fa6a	4441	/* - Set offset value */
mbed_official	330:c80ac197fa6a	4442	hadc->Instance->OFR3 &= ~( ADC_OFR3_OFFSET3_CH \|
mbed_official	330:c80ac197fa6a	4443	ADC_OFR3_OFFSET3 );
mbed_official	330:c80ac197fa6a	4444	hadc->Instance->OFR3 \|= ( ADC_OFR3_OFFSET3_EN \|
mbed_official	330:c80ac197fa6a	4445	__HAL_ADC_OFR_CHANNEL(sConfig->Channel) \|
mbed_official	330:c80ac197fa6a	4446	tmpOffsetShifted );
mbed_official	330:c80ac197fa6a	4447	break;
mbed_official	330:c80ac197fa6a	4448
mbed_official	330:c80ac197fa6a	4449	case ADC_OFFSET_4:
mbed_official	330:c80ac197fa6a	4450	/* Configure offset register 1: */
mbed_official	330:c80ac197fa6a	4451	/* - Enable offset */
mbed_official	330:c80ac197fa6a	4452	/* - Set channel number */
mbed_official	330:c80ac197fa6a	4453	/* - Set offset value */
mbed_official	330:c80ac197fa6a	4454	hadc->Instance->OFR4 &= ~( ADC_OFR4_OFFSET4_CH \|
mbed_official	330:c80ac197fa6a	4455	ADC_OFR4_OFFSET4 );
mbed_official	330:c80ac197fa6a	4456	hadc->Instance->OFR4 \|= ( ADC_OFR4_OFFSET4_EN \|
mbed_official	330:c80ac197fa6a	4457	__HAL_ADC_OFR_CHANNEL(sConfig->Channel) \|
mbed_official	330:c80ac197fa6a	4458	tmpOffsetShifted );
mbed_official	330:c80ac197fa6a	4459	break;
mbed_official	330:c80ac197fa6a	4460
mbed_official	330:c80ac197fa6a	4461	/* Case ADC_OFFSET_NONE */
mbed_official	330:c80ac197fa6a	4462	default :
mbed_official	330:c80ac197fa6a	4463	/* Scan OFR1, OFR2, OFR3, OFR4 to check if the selected channel is enabled. If this is the case, offset OFRx is disabled. */
mbed_official	330:c80ac197fa6a	4464	if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == __HAL_ADC_OFR_CHANNEL(sConfig->Channel))
mbed_official	330:c80ac197fa6a	4465	{
mbed_official	330:c80ac197fa6a	4466	/* Disable offset OFR1*/
mbed_official	330:c80ac197fa6a	4467	hadc->Instance->OFR1 &= ~ADC_OFR1_OFFSET1_EN;
mbed_official	330:c80ac197fa6a	4468	}
mbed_official	330:c80ac197fa6a	4469	if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == __HAL_ADC_OFR_CHANNEL(sConfig->Channel))
mbed_official	330:c80ac197fa6a	4470	{
mbed_official	330:c80ac197fa6a	4471	/* Disable offset OFR2*/
mbed_official	330:c80ac197fa6a	4472	hadc->Instance->OFR2 &= ~ADC_OFR2_OFFSET2_EN;
mbed_official	330:c80ac197fa6a	4473	}
mbed_official	330:c80ac197fa6a	4474	if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == __HAL_ADC_OFR_CHANNEL(sConfig->Channel))
mbed_official	330:c80ac197fa6a	4475	{
mbed_official	330:c80ac197fa6a	4476	/* Disable offset OFR3*/
mbed_official	330:c80ac197fa6a	4477	hadc->Instance->OFR3 &= ~ADC_OFR3_OFFSET3_EN;
mbed_official	330:c80ac197fa6a	4478	}
mbed_official	330:c80ac197fa6a	4479	if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == __HAL_ADC_OFR_CHANNEL(sConfig->Channel))
mbed_official	330:c80ac197fa6a	4480	{
mbed_official	330:c80ac197fa6a	4481	/* Disable offset OFR4*/
mbed_official	330:c80ac197fa6a	4482	hadc->Instance->OFR4 &= ~ADC_OFR4_OFFSET4_EN;
mbed_official	330:c80ac197fa6a	4483	}
mbed_official	330:c80ac197fa6a	4484	break;
mbed_official	330:c80ac197fa6a	4485	}
mbed_official	330:c80ac197fa6a	4486
mbed_official	330:c80ac197fa6a	4487	}
mbed_official	330:c80ac197fa6a	4488
mbed_official	330:c80ac197fa6a	4489
mbed_official	330:c80ac197fa6a	4490	/* Parameters update conditioned to ADC state: */
mbed_official	330:c80ac197fa6a	4491	/* Parameters that can be updated only when ADC is disabled: */
mbed_official	330:c80ac197fa6a	4492	/* - Single or differential mode */
mbed_official	330:c80ac197fa6a	4493	/* - Internal measurement channels: Vbat/VrefInt/TempSensor */
mbed_official	330:c80ac197fa6a	4494	if (__HAL_ADC_IS_ENABLED(hadc) == RESET)
mbed_official	330:c80ac197fa6a	4495	{
mbed_official	330:c80ac197fa6a	4496	/* Configuration of differential mode */
mbed_official	330:c80ac197fa6a	4497	if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED)
mbed_official	330:c80ac197fa6a	4498	{
mbed_official	330:c80ac197fa6a	4499	/* Disable differential mode (default mode: single-ended) */
mbed_official	330:c80ac197fa6a	4500	hadc->Instance->DIFSEL &= ~(__HAL_ADC_DIFSEL_CHANNEL(sConfig->Channel));
mbed_official	330:c80ac197fa6a	4501	}
mbed_official	330:c80ac197fa6a	4502	else
mbed_official	330:c80ac197fa6a	4503	{
mbed_official	330:c80ac197fa6a	4504	/* Enable differential mode */
mbed_official	330:c80ac197fa6a	4505	hadc->Instance->DIFSEL \|= __HAL_ADC_DIFSEL_CHANNEL(sConfig->Channel);
mbed_official	330:c80ac197fa6a	4506
mbed_official	330:c80ac197fa6a	4507	/* Sampling time configuration of channel ADC_IN+1 (negative input) */
mbed_official	330:c80ac197fa6a	4508	/* For channels 10 to 18 */
mbed_official	330:c80ac197fa6a	4509	if (sConfig->Channel > ADC_CHANNEL_10)
mbed_official	330:c80ac197fa6a	4510	{
mbed_official	330:c80ac197fa6a	4511	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	4512	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR1_SMP0, (sConfig->Channel +1));
mbed_official	330:c80ac197fa6a	4513
mbed_official	330:c80ac197fa6a	4514	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	4515	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfig->SamplingTime, (sConfig->Channel +1));
mbed_official	330:c80ac197fa6a	4516	}
mbed_official	330:c80ac197fa6a	4517	else /* For channels 0 to 9 */
mbed_official	330:c80ac197fa6a	4518	{
mbed_official	330:c80ac197fa6a	4519	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	4520	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR2_SMP10, (sConfig->Channel +1));
mbed_official	330:c80ac197fa6a	4521
mbed_official	330:c80ac197fa6a	4522	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	4523	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfig->SamplingTime, (sConfig->Channel +1));
mbed_official	330:c80ac197fa6a	4524	}
mbed_official	330:c80ac197fa6a	4525	}
mbed_official	330:c80ac197fa6a	4526
mbed_official	330:c80ac197fa6a	4527
mbed_official	330:c80ac197fa6a	4528	/* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
mbed_official	330:c80ac197fa6a	4529	/* internal measurement paths enable: If internal channel selected, */
mbed_official	330:c80ac197fa6a	4530	/* enable dedicated internal buffers and path. */
mbed_official	330:c80ac197fa6a	4531	/* Note: these internal measurement paths can be disabled using */
mbed_official	330:c80ac197fa6a	4532	/* HAL_ADC_DeInit(). */
mbed_official	330:c80ac197fa6a	4533
mbed_official	330:c80ac197fa6a	4534	/* Configuration of common ADC parameters */
mbed_official	330:c80ac197fa6a	4535	/* Pointer to the common control register to which is belonging hadc */
mbed_official	330:c80ac197fa6a	4536	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	330:c80ac197fa6a	4537	/* control registers) */
mbed_official	330:c80ac197fa6a	4538	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	330:c80ac197fa6a	4539
mbed_official	330:c80ac197fa6a	4540	/* If the requested internal measurement path has already been enabled, */
mbed_official	330:c80ac197fa6a	4541	/* bypass the configuration processing. */
mbed_official	330:c80ac197fa6a	4542	if (( (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) &&
mbed_official	330:c80ac197fa6a	4543	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) \|\|
mbed_official	330:c80ac197fa6a	4544	( (sConfig->Channel == ADC_CHANNEL_VBAT) &&
mbed_official	330:c80ac197fa6a	4545	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) \|\|
mbed_official	330:c80ac197fa6a	4546	( (sConfig->Channel == ADC_CHANNEL_VREFINT) &&
mbed_official	330:c80ac197fa6a	4547	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VREFEN)))
mbed_official	330:c80ac197fa6a	4548	)
mbed_official	330:c80ac197fa6a	4549	{
mbed_official	330:c80ac197fa6a	4550	/* Configuration of common ADC parameters (continuation) */
mbed_official	330:c80ac197fa6a	4551	/* Set handle of the other ADC sharing the same common register */
mbed_official	330:c80ac197fa6a	4552	__HAL_ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
mbed_official	330:c80ac197fa6a	4553
mbed_official	330:c80ac197fa6a	4554	/* Software is allowed to change common parameters only when all ADCs */
mbed_official	330:c80ac197fa6a	4555	/* of the common group are disabled. */
mbed_official	330:c80ac197fa6a	4556	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	634:ac7d6880524d	4557	( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) \|\|
mbed_official	330:c80ac197fa6a	4558	(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
mbed_official	330:c80ac197fa6a	4559	{
mbed_official	330:c80ac197fa6a	4560	/* If Channel_16 is selected, enable Temp. sensor measurement path */
mbed_official	330:c80ac197fa6a	4561	/* Note: Temp. sensor internal channels available on ADC1 only */
mbed_official	330:c80ac197fa6a	4562	if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1))
mbed_official	330:c80ac197fa6a	4563	{
mbed_official	330:c80ac197fa6a	4564	tmpADC_Common->CCR \|= ADC_CCR_TSEN;
mbed_official	330:c80ac197fa6a	4565
mbed_official	330:c80ac197fa6a	4566	/* Delay for temperature sensor stabilization time */
mbed_official	330:c80ac197fa6a	4567	while(WaitLoopIndex < ADC_TEMPSENSOR_DELAY_CPU_CYCLES)
mbed_official	330:c80ac197fa6a	4568	{
mbed_official	330:c80ac197fa6a	4569	WaitLoopIndex++;
mbed_official	330:c80ac197fa6a	4570	}
mbed_official	330:c80ac197fa6a	4571	}
mbed_official	330:c80ac197fa6a	4572	/* If Channel_17 is selected, enable VBAT measurement path */
mbed_official	330:c80ac197fa6a	4573	/* Note: VBAT internal channels available on ADC1 only */
mbed_official	330:c80ac197fa6a	4574	else if ((sConfig->Channel == ADC_CHANNEL_VBAT) && (hadc->Instance == ADC1))
mbed_official	330:c80ac197fa6a	4575	{
mbed_official	330:c80ac197fa6a	4576	tmpADC_Common->CCR \|= ADC_CCR_VBATEN;
mbed_official	330:c80ac197fa6a	4577	}
mbed_official	330:c80ac197fa6a	4578	/* If Channel_18 is selected, enable VREFINT measurement path */
mbed_official	330:c80ac197fa6a	4579	/* Note: VrefInt internal channels available on all ADCs, but only */
mbed_official	330:c80ac197fa6a	4580	/* one ADC is allowed to be connected to VrefInt at the same */
mbed_official	330:c80ac197fa6a	4581	/* time. */
mbed_official	330:c80ac197fa6a	4582	else if (sConfig->Channel == ADC_CHANNEL_VREFINT)
mbed_official	330:c80ac197fa6a	4583	{
mbed_official	330:c80ac197fa6a	4584	tmpADC_Common->CCR \|= ADC_CCR_VREFEN;
mbed_official	330:c80ac197fa6a	4585	}
mbed_official	330:c80ac197fa6a	4586	}
mbed_official	330:c80ac197fa6a	4587	/* If the requested internal measurement path has already been */
mbed_official	330:c80ac197fa6a	4588	/* enabled and other ADC of the common group are enabled, internal */
mbed_official	330:c80ac197fa6a	4589	/* measurement paths cannot be enabled. */
mbed_official	330:c80ac197fa6a	4590	else
mbed_official	330:c80ac197fa6a	4591	{
mbed_official	330:c80ac197fa6a	4592	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	4593	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	4594
mbed_official	330:c80ac197fa6a	4595	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	4596	}
mbed_official	330:c80ac197fa6a	4597	}
mbed_official	330:c80ac197fa6a	4598
mbed_official	330:c80ac197fa6a	4599	}
mbed_official	330:c80ac197fa6a	4600
mbed_official	330:c80ac197fa6a	4601	}
mbed_official	330:c80ac197fa6a	4602	/* If a conversion is on going on regular group, no update on regular */
mbed_official	330:c80ac197fa6a	4603	/* channel could be done on neither of the channel configuration structure */
mbed_official	330:c80ac197fa6a	4604	/* parameters. */
mbed_official	330:c80ac197fa6a	4605	else
mbed_official	330:c80ac197fa6a	4606	{
mbed_official	330:c80ac197fa6a	4607	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	4608	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	4609
mbed_official	330:c80ac197fa6a	4610	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	4611	}
mbed_official	330:c80ac197fa6a	4612
mbed_official	330:c80ac197fa6a	4613	/* Process unlocked */
mbed_official	330:c80ac197fa6a	4614	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	4615
mbed_official	330:c80ac197fa6a	4616	/* Return function status */
mbed_official	330:c80ac197fa6a	4617	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	4618	}
mbed_official	330:c80ac197fa6a	4619	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	4620	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	4621	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	4622	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	4623
mbed_official	330:c80ac197fa6a	4624	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	4625	/**
mbed_official	330:c80ac197fa6a	4626	* @brief Configures the the selected channel to be linked to the regular
mbed_official	330:c80ac197fa6a	4627	* group.
mbed_official	330:c80ac197fa6a	4628	* @note In case of usage of internal measurement channels:
mbed_official	330:c80ac197fa6a	4629	* Vbat/VrefInt/TempSensor.
mbed_official	330:c80ac197fa6a	4630	* The recommended sampling time is at least:
mbed_official	330:c80ac197fa6a	4631	* - For devices STM32F37x: 17.1us for temperature sensor
mbed_official	330:c80ac197fa6a	4632	* - For the other STM32F3 devices: 2.2us for each of channels
mbed_official	330:c80ac197fa6a	4633	* Vbat/VrefInt/TempSensor.
mbed_official	330:c80ac197fa6a	4634	* These internal paths can be be disabled using function
mbed_official	330:c80ac197fa6a	4635	* HAL_ADC_DeInit().
mbed_official	330:c80ac197fa6a	4636	* @note Possibility to update parameters on the fly:
mbed_official	330:c80ac197fa6a	4637	* This function initializes channel into regular group, following
mbed_official	330:c80ac197fa6a	4638	* calls to this function can be used to reconfigure some parameters
mbed_official	330:c80ac197fa6a	4639	* of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
mbed_official	330:c80ac197fa6a	4640	* the ADC.
mbed_official	330:c80ac197fa6a	4641	* The setting of these parameters is conditioned to ADC state.
mbed_official	330:c80ac197fa6a	4642	* For parameters constraints, see comments of structure
mbed_official	330:c80ac197fa6a	4643	* "ADC_ChannelConfTypeDef".
mbed_official	330:c80ac197fa6a	4644	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	4645	* @param sConfig: Structure of ADC channel for regular group.
mbed_official	330:c80ac197fa6a	4646	* @retval HAL status
mbed_official	330:c80ac197fa6a	4647	*/
mbed_official	330:c80ac197fa6a	4648	HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
mbed_official	330:c80ac197fa6a	4649	{
mbed_official	330:c80ac197fa6a	4650	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	4651
mbed_official	330:c80ac197fa6a	4652	/* Check the parameters */
mbed_official	330:c80ac197fa6a	4653	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	4654	assert_param(IS_ADC_CHANNEL(sConfig->Channel));
mbed_official	330:c80ac197fa6a	4655	assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
mbed_official	330:c80ac197fa6a	4656	assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
mbed_official	330:c80ac197fa6a	4657
mbed_official	330:c80ac197fa6a	4658	/* Process locked */
mbed_official	330:c80ac197fa6a	4659	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	4660
mbed_official	330:c80ac197fa6a	4661
mbed_official	330:c80ac197fa6a	4662	/* Regular sequence configuration */
mbed_official	330:c80ac197fa6a	4663	/* For Rank 1 to 6 */
mbed_official	330:c80ac197fa6a	4664	if (sConfig->Rank < 7)
mbed_official	330:c80ac197fa6a	4665	{
mbed_official	330:c80ac197fa6a	4666	/* Clear the old SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4667	hadc->Instance->SQR3 &= ~__HAL_ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4668
mbed_official	330:c80ac197fa6a	4669	/* Set the SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4670	hadc->Instance->SQR3 \|= __HAL_ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4671	}
mbed_official	330:c80ac197fa6a	4672	/* For Rank 7 to 12 */
mbed_official	330:c80ac197fa6a	4673	else if (sConfig->Rank < 13)
mbed_official	330:c80ac197fa6a	4674	{
mbed_official	330:c80ac197fa6a	4675	/* Clear the old SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4676	hadc->Instance->SQR2 &= ~__HAL_ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4677
mbed_official	330:c80ac197fa6a	4678	/* Set the SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4679	hadc->Instance->SQR2 \|= __HAL_ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4680	}
mbed_official	330:c80ac197fa6a	4681	/* For Rank 13 to 16 */
mbed_official	330:c80ac197fa6a	4682	else
mbed_official	330:c80ac197fa6a	4683	{
mbed_official	330:c80ac197fa6a	4684	/* Clear the old SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4685	hadc->Instance->SQR1 &= ~__HAL_ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4686
mbed_official	330:c80ac197fa6a	4687	/* Set the SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4688	hadc->Instance->SQR1 \|= __HAL_ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
mbed_official	330:c80ac197fa6a	4689	}
mbed_official	330:c80ac197fa6a	4690
mbed_official	330:c80ac197fa6a	4691	/* Channel sampling time configuration */
mbed_official	330:c80ac197fa6a	4692	/* For channels 10 to 18 */
mbed_official	330:c80ac197fa6a	4693	if (sConfig->Channel > ADC_CHANNEL_10)
mbed_official	330:c80ac197fa6a	4694	{
mbed_official	330:c80ac197fa6a	4695	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	4696	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
mbed_official	330:c80ac197fa6a	4697
mbed_official	330:c80ac197fa6a	4698	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	4699	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
mbed_official	330:c80ac197fa6a	4700	}
mbed_official	330:c80ac197fa6a	4701	else /* For channels 0 to 9 */
mbed_official	330:c80ac197fa6a	4702	{
mbed_official	330:c80ac197fa6a	4703	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	4704	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
mbed_official	330:c80ac197fa6a	4705
mbed_official	330:c80ac197fa6a	4706	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	4707	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
mbed_official	330:c80ac197fa6a	4708	}
mbed_official	330:c80ac197fa6a	4709
mbed_official	330:c80ac197fa6a	4710	/* if ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor / VREFINT measurement path */
mbed_official	330:c80ac197fa6a	4711	if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) \|\| (sConfig->Channel == ADC_CHANNEL_VREFINT))
mbed_official	330:c80ac197fa6a	4712	{
mbed_official	330:c80ac197fa6a	4713	hadc->Instance->CR2 \|= ADC_CR2_TSVREFE;
mbed_official	330:c80ac197fa6a	4714	}
mbed_official	330:c80ac197fa6a	4715
mbed_official	330:c80ac197fa6a	4716	/* if ADC1 Channel_17 is selected, enable VBAT measurement path */
mbed_official	330:c80ac197fa6a	4717	else if (sConfig->Channel == ADC_CHANNEL_VBAT)
mbed_official	330:c80ac197fa6a	4718	{
mbed_official	330:c80ac197fa6a	4719	SYSCFG->CFGR1 \|= SYSCFG_CFGR1_VBAT;
mbed_official	330:c80ac197fa6a	4720	}
mbed_official	330:c80ac197fa6a	4721
mbed_official	330:c80ac197fa6a	4722
mbed_official	330:c80ac197fa6a	4723	/* Process unlocked */
mbed_official	330:c80ac197fa6a	4724	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	4725
mbed_official	330:c80ac197fa6a	4726	/* Return function status */
mbed_official	330:c80ac197fa6a	4727	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	4728	}
mbed_official	330:c80ac197fa6a	4729	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	4730
mbed_official	330:c80ac197fa6a	4731	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	4732	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	4733	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	4734	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	4735	/**
mbed_official	330:c80ac197fa6a	4736	* @brief Configures the ADC injected group and the selected channel to be
mbed_official	330:c80ac197fa6a	4737	* linked to the injected group.
mbed_official	330:c80ac197fa6a	4738	* @note Possibility to update parameters on the fly:
mbed_official	330:c80ac197fa6a	4739	* This function initializes injected group, following calls to this
mbed_official	330:c80ac197fa6a	4740	* function can be used to reconfigure some parameters of structure
mbed_official	330:c80ac197fa6a	4741	* "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
mbed_official	330:c80ac197fa6a	4742	* The setting of these parameters is conditioned to ADC state.
mbed_official	330:c80ac197fa6a	4743	* For parameters constraints, see comments of structure
mbed_official	330:c80ac197fa6a	4744	* "ADC_InjectionConfTypeDef".
mbed_official	330:c80ac197fa6a	4745	* @note In case of usage of internal measurement channels:
mbed_official	330:c80ac197fa6a	4746	* Vbat/VrefInt/TempSensor.
mbed_official	330:c80ac197fa6a	4747	* The recommended sampling time is at least:
mbed_official	330:c80ac197fa6a	4748	* - For devices STM32F37x: 17.1us for temperature sensor
mbed_official	330:c80ac197fa6a	4749	* - For the other STM32F3 devices: 2.2us for each of channels
mbed_official	330:c80ac197fa6a	4750	* Vbat/VrefInt/TempSensor.
mbed_official	330:c80ac197fa6a	4751	* These internal paths can be be disabled using function
mbed_official	330:c80ac197fa6a	4752	* HAL_ADC_DeInit().
mbed_official	330:c80ac197fa6a	4753	* @note To reset injected sequencer, function HAL_ADCEx_InjectedStop() can
mbed_official	330:c80ac197fa6a	4754	* be used.
mbed_official	330:c80ac197fa6a	4755	* @note Caution: For Injected Context Queue use: a context must be fully
mbed_official	330:c80ac197fa6a	4756	* defined before start of injected conversion: all channels configured
mbed_official	330:c80ac197fa6a	4757	* consecutively for the same ADC instance. Therefore, Number of calls of
mbed_official	330:c80ac197fa6a	4758	* HAL_ADCEx_InjectedConfigChannel() must correspond to value of parameter
mbed_official	330:c80ac197fa6a	4759	* InjectedNbrOfConversion for each context.
mbed_official	330:c80ac197fa6a	4760	* - Example 1: If 1 context intended to be used (or not use of this feature:
mbed_official	330:c80ac197fa6a	4761	* QueueInjectedContext=DISABLE) and usage of the 3 first injected ranks
mbed_official	330:c80ac197fa6a	4762	* (InjectedNbrOfConversion=3), HAL_ADCEx_InjectedConfigChannel() must be
mbed_official	330:c80ac197fa6a	4763	* called once for each channel (3 times) before launching a conversion.
mbed_official	330:c80ac197fa6a	4764	* This function must not be called to configure the 4th injected channel:
mbed_official	330:c80ac197fa6a	4765	* it would start a new context into context queue.
mbed_official	330:c80ac197fa6a	4766	* - Example 2: If 2 contexts intended to be used and usage of the 3 first
mbed_official	330:c80ac197fa6a	4767	* injected ranks (InjectedNbrOfConversion=3),
mbed_official	330:c80ac197fa6a	4768	* HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and
mbed_official	330:c80ac197fa6a	4769	* for each context (3 channels x 2 contexts = 6 calls). Conversion can
mbed_official	330:c80ac197fa6a	4770	* start once the 1st context is set. The 2nd context can be set on the fly.
mbed_official	330:c80ac197fa6a	4771	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	4772	* @param sConfigInjected: Structure of ADC injected group and ADC channel for
mbed_official	330:c80ac197fa6a	4773	* injected group.
mbed_official	330:c80ac197fa6a	4774	* @retval None
mbed_official	330:c80ac197fa6a	4775	*/
mbed_official	330:c80ac197fa6a	4776	HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
mbed_official	330:c80ac197fa6a	4777	{
mbed_official	330:c80ac197fa6a	4778	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	4779	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	330:c80ac197fa6a	4780	ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
mbed_official	330:c80ac197fa6a	4781	uint32_t tmpOffsetShifted;
mbed_official	330:c80ac197fa6a	4782	uint32_t WaitLoopIndex = 0;
mbed_official	330:c80ac197fa6a	4783
mbed_official	330:c80ac197fa6a	4784	/* Injected context queue feature: temporary JSQR variables defined in */
mbed_official	330:c80ac197fa6a	4785	/* static to be passed over calls of this function */
mbed_official	330:c80ac197fa6a	4786	static uint32_t tmp_JSQR_ContextQueueBeingBuilt_ADCInstance = 0;
mbed_official	330:c80ac197fa6a	4787	static uint32_t tmp_JSQR_ContextQueueBeingBuilt_Channel_Count = 0;
mbed_official	330:c80ac197fa6a	4788	static uint32_t tmp_JSQR_ContextQueueBeingBuilt;
mbed_official	330:c80ac197fa6a	4789
mbed_official	330:c80ac197fa6a	4790	/* Check the parameters */
mbed_official	330:c80ac197fa6a	4791	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	4792	assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
mbed_official	330:c80ac197fa6a	4793	assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
mbed_official	330:c80ac197fa6a	4794	assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff));
mbed_official	330:c80ac197fa6a	4795	assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
mbed_official	330:c80ac197fa6a	4796	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
mbed_official	330:c80ac197fa6a	4797	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
mbed_official	330:c80ac197fa6a	4798	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext));
mbed_official	330:c80ac197fa6a	4799	assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
mbed_official	330:c80ac197fa6a	4800	assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
mbed_official	330:c80ac197fa6a	4801	assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber));
mbed_official	330:c80ac197fa6a	4802	assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
mbed_official	330:c80ac197fa6a	4803
mbed_official	330:c80ac197fa6a	4804	/* Verification of channel number: Channels 1 to 14 are available in */
mbed_official	330:c80ac197fa6a	4805	/* differential mode. Channels 15, 16, 17, 18 can be used only in */
mbed_official	330:c80ac197fa6a	4806	/* single-ended mode. */
mbed_official	330:c80ac197fa6a	4807	if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
mbed_official	330:c80ac197fa6a	4808	{
mbed_official	330:c80ac197fa6a	4809	assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
mbed_official	330:c80ac197fa6a	4810	}
mbed_official	330:c80ac197fa6a	4811	else
mbed_official	330:c80ac197fa6a	4812	{
mbed_official	330:c80ac197fa6a	4813	assert_param(IS_ADC_DIFF_CHANNEL(sConfigInjected->InjectedChannel));
mbed_official	330:c80ac197fa6a	4814	}
mbed_official	330:c80ac197fa6a	4815
mbed_official	330:c80ac197fa6a	4816	/* Process locked */
mbed_official	330:c80ac197fa6a	4817	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	4818
mbed_official	330:c80ac197fa6a	4819
mbed_official	330:c80ac197fa6a	4820	/* Configuration of Injected group sequencer. */
mbed_official	330:c80ac197fa6a	4821	/* Hardware constraint: Must fully define injected context register JSQR */
mbed_official	330:c80ac197fa6a	4822	/* before make it entering into injected sequencer queue. */
mbed_official	330:c80ac197fa6a	4823	/* */
mbed_official	330:c80ac197fa6a	4824	/* - if scan mode is disabled: */
mbed_official	330:c80ac197fa6a	4825	/* * Injected channels sequence length is set to 0x00: 1 channel */
mbed_official	330:c80ac197fa6a	4826	/* converted (channel on injected rank 1) */
mbed_official	330:c80ac197fa6a	4827	/* Parameter "InjectedNbrOfConversion" is discarded. */
mbed_official	330:c80ac197fa6a	4828	/* * Injected context register JSQR setting is simple: register is fully */
mbed_official	330:c80ac197fa6a	4829	/* defined on one call of this function (for injected rank 1) and can */
mbed_official	330:c80ac197fa6a	4830	/* be entered into queue directly. */
mbed_official	330:c80ac197fa6a	4831	/* - if scan mode is enabled: */
mbed_official	330:c80ac197fa6a	4832	/* * Injected channels sequence length is set to parameter */
mbed_official	330:c80ac197fa6a	4833	/* "InjectedNbrOfConversion". */
mbed_official	330:c80ac197fa6a	4834	/* * Injected context register JSQR setting more complex: register is */
mbed_official	330:c80ac197fa6a	4835	/* fully defined over successive calls of this function, for each */
mbed_official	330:c80ac197fa6a	4836	/* injected channel rank. It is entered into queue only when all */
mbed_official	330:c80ac197fa6a	4837	/* injected ranks have been set. */
mbed_official	330:c80ac197fa6a	4838	/* Note: Scan mode is not present by hardware on this device, but used */
mbed_official	330:c80ac197fa6a	4839	/* by software for alignment over all STM32 devices. */
mbed_official	330:c80ac197fa6a	4840
mbed_official	330:c80ac197fa6a	4841	if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) \|\|
mbed_official	330:c80ac197fa6a	4842	(sConfigInjected->InjectedNbrOfConversion == 1) )
mbed_official	330:c80ac197fa6a	4843	{
mbed_official	330:c80ac197fa6a	4844	/* Configuration of context register JSQR: */
mbed_official	330:c80ac197fa6a	4845	/* - number of ranks in injected group sequencer: fixed to 1st rank */
mbed_official	330:c80ac197fa6a	4846	/* (scan mode disabled, only rank 1 used) */
mbed_official	330:c80ac197fa6a	4847	/* - external trigger to start conversion */
mbed_official	330:c80ac197fa6a	4848	/* - external trigger polarity */
mbed_official	330:c80ac197fa6a	4849	/* - channel set to rank 1 (scan mode disabled, only rank 1 used) */
mbed_official	330:c80ac197fa6a	4850
mbed_official	330:c80ac197fa6a	4851	if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
mbed_official	330:c80ac197fa6a	4852	{
mbed_official	330:c80ac197fa6a	4853	tmp_JSQR_ContextQueueBeingBuilt = 0;
mbed_official	330:c80ac197fa6a	4854
mbed_official	330:c80ac197fa6a	4855	/* Enable external trigger if trigger selection is different of */
mbed_official	330:c80ac197fa6a	4856	/* software start. */
mbed_official	330:c80ac197fa6a	4857	/* Note: This configuration keeps the hardware feature of parameter */
mbed_official	330:c80ac197fa6a	4858	/* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
mbed_official	330:c80ac197fa6a	4859	/* software start. */
mbed_official	330:c80ac197fa6a	4860	if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
mbed_official	330:c80ac197fa6a	4861	{
mbed_official	330:c80ac197fa6a	4862	tmp_JSQR_ContextQueueBeingBuilt \|= ( __HAL_ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1) \|
mbed_official	330:c80ac197fa6a	4863	__HAL_ADC_JSQR_JEXTSEL(hadc, sConfigInjected->ExternalTrigInjecConv) \|
mbed_official	330:c80ac197fa6a	4864	sConfigInjected->ExternalTrigInjecConvEdge );
mbed_official	330:c80ac197fa6a	4865	}
mbed_official	330:c80ac197fa6a	4866	else
mbed_official	330:c80ac197fa6a	4867	{
mbed_official	330:c80ac197fa6a	4868	tmp_JSQR_ContextQueueBeingBuilt \|= ( __HAL_ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1) );
mbed_official	330:c80ac197fa6a	4869	}
mbed_official	330:c80ac197fa6a	4870
mbed_official	330:c80ac197fa6a	4871	hadc->Instance->JSQR = tmp_JSQR_ContextQueueBeingBuilt;
mbed_official	330:c80ac197fa6a	4872
mbed_official	330:c80ac197fa6a	4873	}
mbed_official	330:c80ac197fa6a	4874	/* If another injected rank than rank1 was intended to be set, and could */
mbed_official	330:c80ac197fa6a	4875	/* not due to ScanConvMode disabled, error is reported. */
mbed_official	330:c80ac197fa6a	4876	else
mbed_official	330:c80ac197fa6a	4877	{
mbed_official	330:c80ac197fa6a	4878	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	4879	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	4880
mbed_official	330:c80ac197fa6a	4881	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	4882	}
mbed_official	330:c80ac197fa6a	4883
mbed_official	330:c80ac197fa6a	4884	}
mbed_official	330:c80ac197fa6a	4885	else
mbed_official	330:c80ac197fa6a	4886	{
mbed_official	330:c80ac197fa6a	4887	/* Case of scan mode enabled, several channels to set into injected group */
mbed_official	330:c80ac197fa6a	4888	/* sequencer. */
mbed_official	330:c80ac197fa6a	4889	/* Procedure to define injected context register JSQR over successive */
mbed_official	330:c80ac197fa6a	4890	/* calls of this function, for each injected channel rank: */
mbed_official	330:c80ac197fa6a	4891
mbed_official	330:c80ac197fa6a	4892	/* 1. Start new context and set parameters related to all injected */
mbed_official	330:c80ac197fa6a	4893	/* channels: injected sequence length and trigger */
mbed_official	330:c80ac197fa6a	4894	if (tmp_JSQR_ContextQueueBeingBuilt_Channel_Count == 0)
mbed_official	330:c80ac197fa6a	4895	{
mbed_official	330:c80ac197fa6a	4896	/* Memorize ADC instance on the context being built */
mbed_official	330:c80ac197fa6a	4897	tmp_JSQR_ContextQueueBeingBuilt_ADCInstance = (uint32_t)hadc->Instance;
mbed_official	330:c80ac197fa6a	4898	/* Initialize number of channels that will be configured on the context */
mbed_official	330:c80ac197fa6a	4899	/* being built */
mbed_official	330:c80ac197fa6a	4900	tmp_JSQR_ContextQueueBeingBuilt_Channel_Count = sConfigInjected->InjectedNbrOfConversion;
mbed_official	330:c80ac197fa6a	4901	/* Initialize value that will be set into register JSQR */
mbed_official	330:c80ac197fa6a	4902	tmp_JSQR_ContextQueueBeingBuilt = (uint32_t)0x00000000;
mbed_official	330:c80ac197fa6a	4903
mbed_official	330:c80ac197fa6a	4904	/* Configuration of context register JSQR: */
mbed_official	330:c80ac197fa6a	4905	/* - number of ranks in injected group sequencer */
mbed_official	330:c80ac197fa6a	4906	/* - external trigger to start conversion */
mbed_official	330:c80ac197fa6a	4907	/* - external trigger polarity */
mbed_official	330:c80ac197fa6a	4908	tmp_JSQR_ContextQueueBeingBuilt = 0;
mbed_official	330:c80ac197fa6a	4909
mbed_official	330:c80ac197fa6a	4910	/* Enable external trigger if trigger selection is different of */
mbed_official	330:c80ac197fa6a	4911	/* software start. */
mbed_official	330:c80ac197fa6a	4912	/* Note: This configuration keeps the hardware feature of parameter */
mbed_official	330:c80ac197fa6a	4913	/* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
mbed_official	330:c80ac197fa6a	4914	/* software start. */
mbed_official	330:c80ac197fa6a	4915	if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
mbed_official	330:c80ac197fa6a	4916	{
mbed_official	330:c80ac197fa6a	4917	tmp_JSQR_ContextQueueBeingBuilt \|= ((sConfigInjected->InjectedNbrOfConversion - (uint32_t)1) \|
mbed_official	330:c80ac197fa6a	4918	__HAL_ADC_JSQR_JEXTSEL(hadc, sConfigInjected->ExternalTrigInjecConv) \|
mbed_official	330:c80ac197fa6a	4919	sConfigInjected->ExternalTrigInjecConvEdge );
mbed_official	330:c80ac197fa6a	4920	}
mbed_official	330:c80ac197fa6a	4921	else
mbed_official	330:c80ac197fa6a	4922	{
mbed_official	330:c80ac197fa6a	4923	tmp_JSQR_ContextQueueBeingBuilt \|= ((sConfigInjected->InjectedNbrOfConversion - (uint32_t)1) );
mbed_official	330:c80ac197fa6a	4924	}
mbed_official	330:c80ac197fa6a	4925
mbed_official	330:c80ac197fa6a	4926	}
mbed_official	330:c80ac197fa6a	4927
mbed_official	330:c80ac197fa6a	4928	/* Verification that context being built is still targeting the same ADC */
mbed_official	330:c80ac197fa6a	4929	/* instance. If ADC instance mixing during context being built, ADC state */
mbed_official	330:c80ac197fa6a	4930	/* changed to error */
mbed_official	330:c80ac197fa6a	4931	if ((uint32_t)hadc->Instance == tmp_JSQR_ContextQueueBeingBuilt_ADCInstance)
mbed_official	330:c80ac197fa6a	4932	{
mbed_official	330:c80ac197fa6a	4933	/* 2. Continue setting of context under definition with parameter */
mbed_official	330:c80ac197fa6a	4934	/* related to each channel: channel rank sequence */
mbed_official	330:c80ac197fa6a	4935	/* Clear the old JSQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4936	tmp_JSQR_ContextQueueBeingBuilt &= ~__HAL_ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank);
mbed_official	330:c80ac197fa6a	4937
mbed_official	330:c80ac197fa6a	4938	/* Set the JSQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	4939	tmp_JSQR_ContextQueueBeingBuilt \|= __HAL_ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank);
mbed_official	330:c80ac197fa6a	4940
mbed_official	330:c80ac197fa6a	4941	/* Decrease channel count after setting into temporary JSQR variable */
mbed_official	330:c80ac197fa6a	4942	tmp_JSQR_ContextQueueBeingBuilt_Channel_Count --;
mbed_official	330:c80ac197fa6a	4943
mbed_official	330:c80ac197fa6a	4944	/* 3. End of context setting: If last channel set, then write context */
mbed_official	330:c80ac197fa6a	4945	/* into register JSQR and make it enter into queue */
mbed_official	330:c80ac197fa6a	4946	if (tmp_JSQR_ContextQueueBeingBuilt_Channel_Count == 0)
mbed_official	330:c80ac197fa6a	4947	{
mbed_official	330:c80ac197fa6a	4948	hadc->Instance->JSQR = tmp_JSQR_ContextQueueBeingBuilt;
mbed_official	330:c80ac197fa6a	4949
mbed_official	330:c80ac197fa6a	4950	/* Reset context channels count for next context configuration */
mbed_official	330:c80ac197fa6a	4951	tmp_JSQR_ContextQueueBeingBuilt_Channel_Count =0;
mbed_official	330:c80ac197fa6a	4952	}
mbed_official	330:c80ac197fa6a	4953	}
mbed_official	330:c80ac197fa6a	4954	else
mbed_official	330:c80ac197fa6a	4955	{
mbed_official	330:c80ac197fa6a	4956	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	4957	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	4958
mbed_official	330:c80ac197fa6a	4959	/* Process unlocked */
mbed_official	330:c80ac197fa6a	4960	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	4961
mbed_official	330:c80ac197fa6a	4962	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	4963	}
mbed_official	330:c80ac197fa6a	4964	}
mbed_official	330:c80ac197fa6a	4965
mbed_official	330:c80ac197fa6a	4966
mbed_official	330:c80ac197fa6a	4967	/* Parameters update conditioned to ADC state: */
mbed_official	330:c80ac197fa6a	4968	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	330:c80ac197fa6a	4969	/* conversion on going on injected group: */
mbed_official	330:c80ac197fa6a	4970	/* - Injected context queue: Queue disable (active context is kept) or */
mbed_official	330:c80ac197fa6a	4971	/* enable (context decremented, up to 2 contexts queued) */
mbed_official	330:c80ac197fa6a	4972	/* - Injected discontinuous mode: can be enabled only if auto-injected */
mbed_official	330:c80ac197fa6a	4973	/* mode is disabled. */
mbed_official	330:c80ac197fa6a	4974	if (__HAL_ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET)
mbed_official	330:c80ac197fa6a	4975	{
mbed_official	330:c80ac197fa6a	4976	hadc->Instance->CFGR &= ~(ADC_CFGR_JQM \|
mbed_official	330:c80ac197fa6a	4977	ADC_CFGR_JDISCEN );
mbed_official	330:c80ac197fa6a	4978
mbed_official	330:c80ac197fa6a	4979	/* If auto-injected mode is disabled: no constraint */
mbed_official	330:c80ac197fa6a	4980	if (sConfigInjected->AutoInjectedConv == DISABLE)
mbed_official	330:c80ac197fa6a	4981	{
mbed_official	330:c80ac197fa6a	4982	hadc->Instance->CFGR \|= (__HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext) \|
mbed_official	330:c80ac197fa6a	4983	__HAL_ADC_CFGR_INJECT_DISCCONTINUOUS(sConfigInjected->InjectedDiscontinuousConvMode) );
mbed_official	330:c80ac197fa6a	4984	}
mbed_official	330:c80ac197fa6a	4985	/* If auto-injected mode is enabled: Injected discontinuous setting is */
mbed_official	330:c80ac197fa6a	4986	/* discarded. */
mbed_official	330:c80ac197fa6a	4987	else
mbed_official	330:c80ac197fa6a	4988	{
mbed_official	330:c80ac197fa6a	4989	hadc->Instance->CFGR \|= __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext);
mbed_official	330:c80ac197fa6a	4990
mbed_official	330:c80ac197fa6a	4991	/* If injected discontinuous mode was intended to be set and could not */
mbed_official	330:c80ac197fa6a	4992	/* due to auto-injected enabled, error is reported. */
mbed_official	330:c80ac197fa6a	4993	if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
mbed_official	330:c80ac197fa6a	4994	{
mbed_official	330:c80ac197fa6a	4995	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	4996	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	4997
mbed_official	330:c80ac197fa6a	4998	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	4999	}
mbed_official	330:c80ac197fa6a	5000	}
mbed_official	330:c80ac197fa6a	5001
mbed_official	330:c80ac197fa6a	5002	}
mbed_official	330:c80ac197fa6a	5003
mbed_official	330:c80ac197fa6a	5004
mbed_official	330:c80ac197fa6a	5005	/* Parameters update conditioned to ADC state: */
mbed_official	330:c80ac197fa6a	5006	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	330:c80ac197fa6a	5007	/* conversion on going on regular and injected groups: */
mbed_official	330:c80ac197fa6a	5008	/* - Automatic injected conversion: can be enabled if injected group */
mbed_official	330:c80ac197fa6a	5009	/* external triggers are disabled. */
mbed_official	330:c80ac197fa6a	5010	/* - Channel sampling time */
mbed_official	330:c80ac197fa6a	5011	/* - Channel offset */
mbed_official	330:c80ac197fa6a	5012	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
mbed_official	330:c80ac197fa6a	5013	{
mbed_official	330:c80ac197fa6a	5014	/* Configure Automatic injected conversion */
mbed_official	330:c80ac197fa6a	5015	hadc->Instance->CFGR &= ~(ADC_CFGR_JAUTO);
mbed_official	330:c80ac197fa6a	5016
mbed_official	330:c80ac197fa6a	5017	/* If injected group external triggers are disabled (set to injected */
mbed_official	330:c80ac197fa6a	5018	/* software start): no constraint */
mbed_official	330:c80ac197fa6a	5019	if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
mbed_official	330:c80ac197fa6a	5020	{
mbed_official	330:c80ac197fa6a	5021	hadc->Instance->CFGR \|= __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION(sConfigInjected->AutoInjectedConv);
mbed_official	330:c80ac197fa6a	5022	}
mbed_official	330:c80ac197fa6a	5023	/* If Automatic injected conversion was intended to be set and could not */
mbed_official	330:c80ac197fa6a	5024	/* due to injected group external triggers enabled, error is reported. */
mbed_official	330:c80ac197fa6a	5025	else
mbed_official	330:c80ac197fa6a	5026	{
mbed_official	330:c80ac197fa6a	5027	if (sConfigInjected->AutoInjectedConv == ENABLE)
mbed_official	330:c80ac197fa6a	5028	{
mbed_official	330:c80ac197fa6a	5029	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	5030	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	5031
mbed_official	330:c80ac197fa6a	5032	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	5033	}
mbed_official	330:c80ac197fa6a	5034	}
mbed_official	330:c80ac197fa6a	5035
mbed_official	330:c80ac197fa6a	5036
mbed_official	330:c80ac197fa6a	5037	/* Sampling time configuration of the selected channel */
mbed_official	330:c80ac197fa6a	5038	/* if ADC_Channel_10 ... ADC_Channel_18 is selected */
mbed_official	330:c80ac197fa6a	5039	if (sConfigInjected->InjectedChannel > ADC_CHANNEL_10)
mbed_official	330:c80ac197fa6a	5040	{
mbed_official	330:c80ac197fa6a	5041	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	5042	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR1_SMP0, sConfigInjected->InjectedChannel);
mbed_official	330:c80ac197fa6a	5043
mbed_official	330:c80ac197fa6a	5044	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	5045	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
mbed_official	330:c80ac197fa6a	5046	}
mbed_official	330:c80ac197fa6a	5047	else /* ADC_Channel include in ADC_Channel_[0..9] */
mbed_official	330:c80ac197fa6a	5048	{
mbed_official	330:c80ac197fa6a	5049	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	5050	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel);
mbed_official	330:c80ac197fa6a	5051
mbed_official	330:c80ac197fa6a	5052	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	5053	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
mbed_official	330:c80ac197fa6a	5054	}
mbed_official	330:c80ac197fa6a	5055
mbed_official	330:c80ac197fa6a	5056	/* Configure the offset: offset enable/disable, channel, offset value */
mbed_official	330:c80ac197fa6a	5057
mbed_official	330:c80ac197fa6a	5058	/* Shift the offset in function of the selected ADC resolution. */
mbed_official	330:c80ac197fa6a	5059	/* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
mbed_official	330:c80ac197fa6a	5060	tmpOffsetShifted = __HAL_ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset);
mbed_official	330:c80ac197fa6a	5061
mbed_official	330:c80ac197fa6a	5062	switch (sConfigInjected->InjectedOffsetNumber)
mbed_official	330:c80ac197fa6a	5063	{
mbed_official	330:c80ac197fa6a	5064	case ADC_OFFSET_1:
mbed_official	330:c80ac197fa6a	5065	/* Configure offset register 1: */
mbed_official	330:c80ac197fa6a	5066	/* - Enable offset */
mbed_official	330:c80ac197fa6a	5067	/* - Set channel number */
mbed_official	330:c80ac197fa6a	5068	/* - Set offset value */
mbed_official	330:c80ac197fa6a	5069	hadc->Instance->OFR1 &= ~( ADC_OFR1_OFFSET1_CH \|
mbed_official	330:c80ac197fa6a	5070	ADC_OFR1_OFFSET1 );
mbed_official	330:c80ac197fa6a	5071	hadc->Instance->OFR1 \|= ( ADC_OFR1_OFFSET1_EN \|
mbed_official	330:c80ac197fa6a	5072	__HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \|
mbed_official	330:c80ac197fa6a	5073	tmpOffsetShifted );
mbed_official	330:c80ac197fa6a	5074	break;
mbed_official	330:c80ac197fa6a	5075
mbed_official	330:c80ac197fa6a	5076	case ADC_OFFSET_2:
mbed_official	330:c80ac197fa6a	5077	/* Configure offset register 2: */
mbed_official	330:c80ac197fa6a	5078	/* - Enable offset */
mbed_official	330:c80ac197fa6a	5079	/* - Set channel number */
mbed_official	330:c80ac197fa6a	5080	/* - Set offset value */
mbed_official	330:c80ac197fa6a	5081	hadc->Instance->OFR2 &= ~( ADC_OFR2_OFFSET2_CH \|
mbed_official	330:c80ac197fa6a	5082	ADC_OFR2_OFFSET2 );
mbed_official	330:c80ac197fa6a	5083	hadc->Instance->OFR2 \|= ( ADC_OFR2_OFFSET2_EN \|
mbed_official	330:c80ac197fa6a	5084	__HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \|
mbed_official	330:c80ac197fa6a	5085	tmpOffsetShifted );
mbed_official	330:c80ac197fa6a	5086	break;
mbed_official	330:c80ac197fa6a	5087
mbed_official	330:c80ac197fa6a	5088	case ADC_OFFSET_3:
mbed_official	330:c80ac197fa6a	5089	/* Configure offset register 3: */
mbed_official	330:c80ac197fa6a	5090	/* - Enable offset */
mbed_official	330:c80ac197fa6a	5091	/* - Set channel number */
mbed_official	330:c80ac197fa6a	5092	/* - Set offset value */
mbed_official	330:c80ac197fa6a	5093	hadc->Instance->OFR3 &= ~( ADC_OFR3_OFFSET3_CH \|
mbed_official	330:c80ac197fa6a	5094	ADC_OFR3_OFFSET3 );
mbed_official	330:c80ac197fa6a	5095	hadc->Instance->OFR3 \|= ( ADC_OFR3_OFFSET3_EN \|
mbed_official	330:c80ac197fa6a	5096	__HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \|
mbed_official	330:c80ac197fa6a	5097	tmpOffsetShifted );
mbed_official	330:c80ac197fa6a	5098	break;
mbed_official	330:c80ac197fa6a	5099
mbed_official	330:c80ac197fa6a	5100	case ADC_OFFSET_4:
mbed_official	330:c80ac197fa6a	5101	/* Configure offset register 1: */
mbed_official	330:c80ac197fa6a	5102	/* - Enable offset */
mbed_official	330:c80ac197fa6a	5103	/* - Set channel number */
mbed_official	330:c80ac197fa6a	5104	/* - Set offset value */
mbed_official	330:c80ac197fa6a	5105	hadc->Instance->OFR4 &= ~( ADC_OFR4_OFFSET4_CH \|
mbed_official	330:c80ac197fa6a	5106	ADC_OFR4_OFFSET4 );
mbed_official	330:c80ac197fa6a	5107	hadc->Instance->OFR4 \|= ( ADC_OFR4_OFFSET4_EN \|
mbed_official	330:c80ac197fa6a	5108	__HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) \|
mbed_official	330:c80ac197fa6a	5109	tmpOffsetShifted );
mbed_official	330:c80ac197fa6a	5110	break;
mbed_official	330:c80ac197fa6a	5111
mbed_official	330:c80ac197fa6a	5112	/* Case ADC_OFFSET_NONE */
mbed_official	330:c80ac197fa6a	5113	default :
mbed_official	330:c80ac197fa6a	5114	/* Scan OFR1, OFR2, OFR3, OFR4 to check if the selected channel is enabled. If this is the case, offset OFRx is disabled. */
mbed_official	330:c80ac197fa6a	5115	if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == __HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
mbed_official	330:c80ac197fa6a	5116	{
mbed_official	330:c80ac197fa6a	5117	/* Disable offset OFR1*/
mbed_official	330:c80ac197fa6a	5118	hadc->Instance->OFR1 &= ~ADC_OFR1_OFFSET1_EN;
mbed_official	330:c80ac197fa6a	5119	}
mbed_official	330:c80ac197fa6a	5120	if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == __HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
mbed_official	330:c80ac197fa6a	5121	{
mbed_official	330:c80ac197fa6a	5122	/* Disable offset OFR2*/
mbed_official	330:c80ac197fa6a	5123	hadc->Instance->OFR2 &= ~ADC_OFR2_OFFSET2_EN;
mbed_official	330:c80ac197fa6a	5124	}
mbed_official	330:c80ac197fa6a	5125	if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == __HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
mbed_official	330:c80ac197fa6a	5126	{
mbed_official	330:c80ac197fa6a	5127	/* Disable offset OFR3*/
mbed_official	330:c80ac197fa6a	5128	hadc->Instance->OFR3 &= ~ADC_OFR3_OFFSET3_EN;
mbed_official	330:c80ac197fa6a	5129	}
mbed_official	330:c80ac197fa6a	5130	if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == __HAL_ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel))
mbed_official	330:c80ac197fa6a	5131	{
mbed_official	330:c80ac197fa6a	5132	/* Disable offset OFR4*/
mbed_official	330:c80ac197fa6a	5133	hadc->Instance->OFR4 &= ~ADC_OFR4_OFFSET4_EN;
mbed_official	330:c80ac197fa6a	5134	}
mbed_official	330:c80ac197fa6a	5135	break;
mbed_official	330:c80ac197fa6a	5136	}
mbed_official	330:c80ac197fa6a	5137
mbed_official	330:c80ac197fa6a	5138	}
mbed_official	330:c80ac197fa6a	5139
mbed_official	330:c80ac197fa6a	5140
mbed_official	330:c80ac197fa6a	5141	/* Parameters update conditioned to ADC state: */
mbed_official	330:c80ac197fa6a	5142	/* Parameters that can be updated only when ADC is disabled: */
mbed_official	330:c80ac197fa6a	5143	/* - Single or differential mode */
mbed_official	330:c80ac197fa6a	5144	/* - Internal measurement channels: Vbat/VrefInt/TempSensor */
mbed_official	330:c80ac197fa6a	5145	if (__HAL_ADC_IS_ENABLED(hadc) == RESET)
mbed_official	330:c80ac197fa6a	5146	{
mbed_official	330:c80ac197fa6a	5147	/* Configuration of differential mode */
mbed_official	330:c80ac197fa6a	5148	if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
mbed_official	330:c80ac197fa6a	5149	{
mbed_official	330:c80ac197fa6a	5150	/* Disable differential mode (default mode: single-ended) */
mbed_official	330:c80ac197fa6a	5151	hadc->Instance->DIFSEL &= ~(__HAL_ADC_DIFSEL_CHANNEL(sConfigInjected->InjectedChannel));
mbed_official	330:c80ac197fa6a	5152	}
mbed_official	330:c80ac197fa6a	5153	else
mbed_official	330:c80ac197fa6a	5154	{
mbed_official	330:c80ac197fa6a	5155	/* Enable differential mode */
mbed_official	330:c80ac197fa6a	5156	hadc->Instance->DIFSEL \|= __HAL_ADC_DIFSEL_CHANNEL(sConfigInjected->InjectedChannel);
mbed_official	330:c80ac197fa6a	5157
mbed_official	330:c80ac197fa6a	5158	/* Sampling time configuration of channel ADC_IN+1 (negative input) */
mbed_official	330:c80ac197fa6a	5159	/* For channels 10 to 18 */
mbed_official	330:c80ac197fa6a	5160	if (sConfigInjected->InjectedChannel > ADC_CHANNEL_10)
mbed_official	330:c80ac197fa6a	5161	{
mbed_official	330:c80ac197fa6a	5162	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	5163	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR1_SMP0, (sConfigInjected->InjectedChannel +1));
mbed_official	330:c80ac197fa6a	5164
mbed_official	330:c80ac197fa6a	5165	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	5166	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfigInjected->InjectedSamplingTime, (sConfigInjected->InjectedChannel +1));
mbed_official	330:c80ac197fa6a	5167	}
mbed_official	330:c80ac197fa6a	5168	else /* For channels 0 to 9 */
mbed_official	330:c80ac197fa6a	5169	{
mbed_official	330:c80ac197fa6a	5170	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	5171	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR2_SMP10, (sConfigInjected->InjectedChannel +1));
mbed_official	330:c80ac197fa6a	5172
mbed_official	330:c80ac197fa6a	5173	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	5174	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfigInjected->InjectedSamplingTime, (sConfigInjected->InjectedChannel +1));
mbed_official	330:c80ac197fa6a	5175	}
mbed_official	330:c80ac197fa6a	5176	}
mbed_official	330:c80ac197fa6a	5177
mbed_official	330:c80ac197fa6a	5178
mbed_official	330:c80ac197fa6a	5179	/* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
mbed_official	330:c80ac197fa6a	5180	/* internal measurement paths enable: If internal channel selected, */
mbed_official	330:c80ac197fa6a	5181	/* enable dedicated internal buffers and path. */
mbed_official	330:c80ac197fa6a	5182	/* Note: these internal measurement paths can be disabled using */
mbed_official	330:c80ac197fa6a	5183	/* HAL_ADC_deInit(). */
mbed_official	330:c80ac197fa6a	5184
mbed_official	330:c80ac197fa6a	5185	/* Configuration of common ADC parameters */
mbed_official	330:c80ac197fa6a	5186	/* Pointer to the common control register to which is belonging hadc */
mbed_official	330:c80ac197fa6a	5187	/* (Depending on STM32F3 product, there may be up to 4 ADC and 2 common */
mbed_official	330:c80ac197fa6a	5188	/* control registers) */
mbed_official	330:c80ac197fa6a	5189	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	330:c80ac197fa6a	5190
mbed_official	330:c80ac197fa6a	5191	/* If the requested internal measurement path has already been enabled, */
mbed_official	330:c80ac197fa6a	5192	/* bypass the configuration processing. */
mbed_official	330:c80ac197fa6a	5193	if (( (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) &&
mbed_official	330:c80ac197fa6a	5194	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) \|\|
mbed_official	330:c80ac197fa6a	5195	( (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) &&
mbed_official	330:c80ac197fa6a	5196	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) \|\|
mbed_official	330:c80ac197fa6a	5197	( (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) &&
mbed_official	330:c80ac197fa6a	5198	(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VREFEN)))
mbed_official	330:c80ac197fa6a	5199	)
mbed_official	330:c80ac197fa6a	5200	{
mbed_official	330:c80ac197fa6a	5201	/* Configuration of common ADC parameters (continuation) */
mbed_official	330:c80ac197fa6a	5202	/* Set handle of the other ADC sharing the same common register */
mbed_official	330:c80ac197fa6a	5203	__HAL_ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
mbed_official	330:c80ac197fa6a	5204
mbed_official	330:c80ac197fa6a	5205	/* Software is allowed to change common parameters only when all ADCs */
mbed_official	330:c80ac197fa6a	5206	/* of the common group are disabled. */
mbed_official	330:c80ac197fa6a	5207	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	634:ac7d6880524d	5208	( (tmphadcSharingSameCommonRegister.Instance == HAL_NULL) \|\|
mbed_official	330:c80ac197fa6a	5209	(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) ))
mbed_official	330:c80ac197fa6a	5210	{
mbed_official	330:c80ac197fa6a	5211	/* If Channel_16 is selected, enable Temp. sensor measurement path */
mbed_official	330:c80ac197fa6a	5212	/* Note: Temp. sensor internal channels available on ADC1 only */
mbed_official	330:c80ac197fa6a	5213	if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) && (hadc->Instance == ADC1))
mbed_official	330:c80ac197fa6a	5214	{
mbed_official	330:c80ac197fa6a	5215	tmpADC_Common->CCR \|= ADC_CCR_TSEN;
mbed_official	330:c80ac197fa6a	5216
mbed_official	330:c80ac197fa6a	5217	/* Delay for temperature sensor stabilization time */
mbed_official	330:c80ac197fa6a	5218	while(WaitLoopIndex < ADC_TEMPSENSOR_DELAY_CPU_CYCLES)
mbed_official	330:c80ac197fa6a	5219	{
mbed_official	330:c80ac197fa6a	5220	WaitLoopIndex++;
mbed_official	330:c80ac197fa6a	5221	}
mbed_official	330:c80ac197fa6a	5222	}
mbed_official	330:c80ac197fa6a	5223	/* If Channel_17 is selected, enable VBAT measurement path */
mbed_official	330:c80ac197fa6a	5224	/* Note: VBAT internal channels available on ADC1 only */
mbed_official	330:c80ac197fa6a	5225	else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) && (hadc->Instance == ADC1))
mbed_official	330:c80ac197fa6a	5226	{
mbed_official	330:c80ac197fa6a	5227	tmpADC_Common->CCR \|= ADC_CCR_VBATEN;
mbed_official	330:c80ac197fa6a	5228	}
mbed_official	330:c80ac197fa6a	5229	/* If Channel_18 is selected, enable VREFINT measurement path */
mbed_official	330:c80ac197fa6a	5230	/* Note: VrefInt internal channels available on all ADCs, but only */
mbed_official	330:c80ac197fa6a	5231	/* one ADC is allowed to be connected to VrefInt at the same */
mbed_official	330:c80ac197fa6a	5232	/* time. */
mbed_official	330:c80ac197fa6a	5233	else if (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)
mbed_official	330:c80ac197fa6a	5234	{
mbed_official	330:c80ac197fa6a	5235	tmpADC_Common->CCR \|= ADC_CCR_VREFEN;
mbed_official	330:c80ac197fa6a	5236	}
mbed_official	330:c80ac197fa6a	5237	}
mbed_official	330:c80ac197fa6a	5238	/* If the requested internal measurement path has already been enabled */
mbed_official	330:c80ac197fa6a	5239	/* and other ADC of the common group are enabled, internal */
mbed_official	330:c80ac197fa6a	5240	/* measurement paths cannot be enabled. */
mbed_official	330:c80ac197fa6a	5241	else
mbed_official	330:c80ac197fa6a	5242	{
mbed_official	330:c80ac197fa6a	5243	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	5244	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	5245
mbed_official	330:c80ac197fa6a	5246	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	5247	}
mbed_official	330:c80ac197fa6a	5248	}
mbed_official	330:c80ac197fa6a	5249
mbed_official	330:c80ac197fa6a	5250	}
mbed_official	330:c80ac197fa6a	5251
mbed_official	330:c80ac197fa6a	5252	/* Process unlocked */
mbed_official	330:c80ac197fa6a	5253	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	5254
mbed_official	330:c80ac197fa6a	5255	/* Return function status */
mbed_official	330:c80ac197fa6a	5256	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	5257	}
mbed_official	330:c80ac197fa6a	5258	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	5259	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	5260	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	5261	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	5262
mbed_official	330:c80ac197fa6a	5263	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	5264	/**
mbed_official	330:c80ac197fa6a	5265	* @brief Configures the ADC injected group and the selected channel to be
mbed_official	330:c80ac197fa6a	5266	* linked to the injected group.
mbed_official	330:c80ac197fa6a	5267	* @note Possibility to update parameters on the fly:
mbed_official	330:c80ac197fa6a	5268	* This function initializes injected group, following calls to this
mbed_official	330:c80ac197fa6a	5269	* function can be used to reconfigure some parameters of structure
mbed_official	330:c80ac197fa6a	5270	* "ADC_InjectionConfTypeDef" on the fly, without reseting the ADC.
mbed_official	330:c80ac197fa6a	5271	* The setting of these parameters is conditioned to ADC state:
mbed_official	330:c80ac197fa6a	5272	* this function must be called when ADC is not under conversion.
mbed_official	330:c80ac197fa6a	5273	* @note In case of usage of internal measurement channels:
mbed_official	330:c80ac197fa6a	5274	* Vbat/VrefInt/TempSensor.
mbed_official	330:c80ac197fa6a	5275	* The recommended sampling time is at least:
mbed_official	330:c80ac197fa6a	5276	* - For devices STM32F37x: 17.1us for temperature sensor
mbed_official	330:c80ac197fa6a	5277	* - For the other STM32F3 devices: 2.2us for each of channels
mbed_official	330:c80ac197fa6a	5278	* Vbat/VrefInt/TempSensor.
mbed_official	330:c80ac197fa6a	5279	* These internal paths can be be disabled using function
mbed_official	330:c80ac197fa6a	5280	* HAL_ADC_DeInit().
mbed_official	330:c80ac197fa6a	5281	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	5282	* @param sConfigInjected: Structure of ADC injected group and ADC channel for
mbed_official	330:c80ac197fa6a	5283	* injected group.
mbed_official	330:c80ac197fa6a	5284	* @retval None
mbed_official	330:c80ac197fa6a	5285	*/
mbed_official	330:c80ac197fa6a	5286	HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
mbed_official	330:c80ac197fa6a	5287	{
mbed_official	330:c80ac197fa6a	5288	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	5289
mbed_official	330:c80ac197fa6a	5290	/* Check the parameters */
mbed_official	330:c80ac197fa6a	5291	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	5292	assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
mbed_official	330:c80ac197fa6a	5293	assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
mbed_official	330:c80ac197fa6a	5294	assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
mbed_official	330:c80ac197fa6a	5295	assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
mbed_official	330:c80ac197fa6a	5296	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
mbed_official	330:c80ac197fa6a	5297	assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
mbed_official	330:c80ac197fa6a	5298	assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv));
mbed_official	330:c80ac197fa6a	5299	assert_param(IS_ADC_RANGE(sConfigInjected->InjectedOffset));
mbed_official	330:c80ac197fa6a	5300
mbed_official	330:c80ac197fa6a	5301	/* Process locked */
mbed_official	330:c80ac197fa6a	5302	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	5303
mbed_official	330:c80ac197fa6a	5304
mbed_official	330:c80ac197fa6a	5305	/* Configuration of injected group sequencer: */
mbed_official	330:c80ac197fa6a	5306	/* - if scan mode is disabled, injected channels sequence length is set to */
mbed_official	330:c80ac197fa6a	5307	/* 0x00: 1 channel converted (channel on regular rank 1) */
mbed_official	330:c80ac197fa6a	5308	/* Parameter "InjectedNbrOfConversion" is discarded. */
mbed_official	330:c80ac197fa6a	5309	/* Note: Scan mode is present by hardware on this device and, if */
mbed_official	330:c80ac197fa6a	5310	/* disabled, discards automatically nb of conversions. Anyway, nb of */
mbed_official	330:c80ac197fa6a	5311	/* conversions is forced to 0x00 for alignment over all STM32 devices. */
mbed_official	330:c80ac197fa6a	5312	/* - if scan mode is enabled, injected channels sequence length is set to */
mbed_official	330:c80ac197fa6a	5313	/* parameter ""InjectedNbrOfConversion". */
mbed_official	330:c80ac197fa6a	5314	if (hadc->Init.ScanConvMode == ADC_SCAN_DISABLE)
mbed_official	330:c80ac197fa6a	5315	{
mbed_official	330:c80ac197fa6a	5316	if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
mbed_official	330:c80ac197fa6a	5317	{
mbed_official	330:c80ac197fa6a	5318	/* Clear the old SQx bits for all injected ranks */
mbed_official	330:c80ac197fa6a	5319	hadc->Instance->JSQR &= ~ (ADC_JSQR_JL \|
mbed_official	330:c80ac197fa6a	5320	ADC_JSQR_JSQ4 \|
mbed_official	330:c80ac197fa6a	5321	ADC_JSQR_JSQ3 \|
mbed_official	330:c80ac197fa6a	5322	ADC_JSQR_JSQ2 \|
mbed_official	330:c80ac197fa6a	5323	ADC_JSQR_JSQ1 );
mbed_official	330:c80ac197fa6a	5324
mbed_official	330:c80ac197fa6a	5325	/* Set the SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	5326	hadc->Instance->JSQR \|= __HAL_ADC_JSQR_RK(sConfigInjected->InjectedChannel,
mbed_official	330:c80ac197fa6a	5327	ADC_INJECTED_RANK_1,
mbed_official	330:c80ac197fa6a	5328	0x01);
mbed_official	330:c80ac197fa6a	5329	}
mbed_official	330:c80ac197fa6a	5330	/* If another injected rank than rank1 was intended to be set, and could */
mbed_official	330:c80ac197fa6a	5331	/* not due to ScanConvMode disabled, error is reported. */
mbed_official	330:c80ac197fa6a	5332	else
mbed_official	330:c80ac197fa6a	5333	{
mbed_official	330:c80ac197fa6a	5334	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	5335	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	5336
mbed_official	330:c80ac197fa6a	5337	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	5338	}
mbed_official	330:c80ac197fa6a	5339	}
mbed_official	330:c80ac197fa6a	5340	else
mbed_official	330:c80ac197fa6a	5341	{
mbed_official	330:c80ac197fa6a	5342	/* Clear the old SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	5343	hadc->Instance->JSQR &= ~ (ADC_JSQR_JL \|
mbed_official	330:c80ac197fa6a	5344	__HAL_ADC_JSQR_RK(ADC_JSQR_JSQ1,
mbed_official	330:c80ac197fa6a	5345	sConfigInjected->InjectedRank,
mbed_official	330:c80ac197fa6a	5346	sConfigInjected->InjectedNbrOfConversion) );
mbed_official	330:c80ac197fa6a	5347
mbed_official	330:c80ac197fa6a	5348	/* Since injected channels rank conv. order depends on total number of */
mbed_official	330:c80ac197fa6a	5349	/* injected conversions, selected rank must be below or equal to total */
mbed_official	330:c80ac197fa6a	5350	/* number of injected conversions to be updated. */
mbed_official	330:c80ac197fa6a	5351	if (sConfigInjected->InjectedRank <= sConfigInjected->InjectedNbrOfConversion)
mbed_official	330:c80ac197fa6a	5352	{
mbed_official	330:c80ac197fa6a	5353	/* Set the SQx bits for the selected rank */
mbed_official	330:c80ac197fa6a	5354	hadc->Instance->JSQR \|= (__HAL_ADC_JSQR_JL(sConfigInjected->InjectedNbrOfConversion) \|
mbed_official	330:c80ac197fa6a	5355	__HAL_ADC_JSQR_RK(sConfigInjected->InjectedChannel,
mbed_official	330:c80ac197fa6a	5356	sConfigInjected->InjectedRank,
mbed_official	330:c80ac197fa6a	5357	sConfigInjected->InjectedNbrOfConversion) );
mbed_official	330:c80ac197fa6a	5358	}
mbed_official	330:c80ac197fa6a	5359	}
mbed_official	330:c80ac197fa6a	5360
mbed_official	330:c80ac197fa6a	5361
mbed_official	330:c80ac197fa6a	5362	/* Configuration of injected group: external trigger */
mbed_official	330:c80ac197fa6a	5363	/* - external trigger to start conversion */
mbed_official	330:c80ac197fa6a	5364	/* - external trigger polarity */
mbed_official	330:c80ac197fa6a	5365	/* If Automatic injected conversion disabled: always set to 1, */
mbed_official	330:c80ac197fa6a	5366	/* because needed for all triggers: external trigger of SW start) */
mbed_official	330:c80ac197fa6a	5367	/* Hardware constraint: ADC must be disabled */
mbed_official	330:c80ac197fa6a	5368	/* Note: In case of ADC already enabled, caution to not launch an unwanted */
mbed_official	330:c80ac197fa6a	5369	/* conversion while modifying register CR2 by writing 1 to bit ADON */
mbed_official	330:c80ac197fa6a	5370	/* These settings are modified only if required parameters are different as */
mbed_official	330:c80ac197fa6a	5371	/* current setting */
mbed_official	330:c80ac197fa6a	5372	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	330:c80ac197fa6a	5373	((hadc->Instance->CR2 & ADC_CR2_JEXTSEL) != sConfigInjected->ExternalTrigInjecConv) )
mbed_official	330:c80ac197fa6a	5374	{
mbed_official	330:c80ac197fa6a	5375	hadc->Instance->CR2 &= ~( ADC_CR2_JEXTSEL \|
mbed_official	330:c80ac197fa6a	5376	ADC_CR2_JEXTTRIG \|
mbed_official	330:c80ac197fa6a	5377	ADC_CR2_ADON );
mbed_official	330:c80ac197fa6a	5378
mbed_official	330:c80ac197fa6a	5379	/* If automatic injected conversion is intended to be enabled and */
mbed_official	330:c80ac197fa6a	5380	/* conditions are fulfilled (injected group external triggers are */
mbed_official	330:c80ac197fa6a	5381	/* disabled), then keep injected external trigger JEXTTRIG cleared */
mbed_official	330:c80ac197fa6a	5382	if (!((sConfigInjected->AutoInjectedConv == ENABLE) &&
mbed_official	330:c80ac197fa6a	5383	(sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)))
mbed_official	330:c80ac197fa6a	5384	{
mbed_official	330:c80ac197fa6a	5385	hadc->Instance->CR2 \|= ( sConfigInjected->ExternalTrigInjecConv \|
mbed_official	330:c80ac197fa6a	5386	ADC_CR2_JEXTTRIG );
mbed_official	330:c80ac197fa6a	5387	}
mbed_official	330:c80ac197fa6a	5388	else
mbed_official	330:c80ac197fa6a	5389	{
mbed_official	330:c80ac197fa6a	5390	hadc->Instance->CR2 \|= ( sConfigInjected->ExternalTrigInjecConv );
mbed_official	330:c80ac197fa6a	5391	}
mbed_official	330:c80ac197fa6a	5392	}
mbed_official	330:c80ac197fa6a	5393
mbed_official	330:c80ac197fa6a	5394
mbed_official	330:c80ac197fa6a	5395	/* Configuration of injected group */
mbed_official	330:c80ac197fa6a	5396	/* - Automatic injected conversion */
mbed_official	330:c80ac197fa6a	5397	/* - Injected discontinuous mode */
mbed_official	330:c80ac197fa6a	5398	hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO \|
mbed_official	330:c80ac197fa6a	5399	ADC_CR1_JDISCEN );
mbed_official	330:c80ac197fa6a	5400
mbed_official	330:c80ac197fa6a	5401	/* Automatic injected conversion can be enabled if injected group */
mbed_official	330:c80ac197fa6a	5402	/* external triggers are disabled. */
mbed_official	330:c80ac197fa6a	5403	if (sConfigInjected->AutoInjectedConv == ENABLE)
mbed_official	330:c80ac197fa6a	5404	{
mbed_official	330:c80ac197fa6a	5405	if (sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
mbed_official	330:c80ac197fa6a	5406	{
mbed_official	330:c80ac197fa6a	5407	hadc->Instance->CR1 \|= ADC_CR1_JAUTO;
mbed_official	330:c80ac197fa6a	5408	}
mbed_official	330:c80ac197fa6a	5409	else
mbed_official	330:c80ac197fa6a	5410	{
mbed_official	330:c80ac197fa6a	5411	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	5412	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	5413
mbed_official	330:c80ac197fa6a	5414	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	5415	}
mbed_official	330:c80ac197fa6a	5416	}
mbed_official	330:c80ac197fa6a	5417
mbed_official	330:c80ac197fa6a	5418	/* Injected discontinuous can be enabled only if auto-injected mode is */
mbed_official	330:c80ac197fa6a	5419	/* disabled. */
mbed_official	330:c80ac197fa6a	5420	if (sConfigInjected->InjectedDiscontinuousConvMode == ENABLE)
mbed_official	330:c80ac197fa6a	5421	{
mbed_official	330:c80ac197fa6a	5422	if (sConfigInjected->AutoInjectedConv == DISABLE)
mbed_official	330:c80ac197fa6a	5423	{
mbed_official	330:c80ac197fa6a	5424	hadc->Instance->CR1 \|= ADC_CR1_JDISCEN;
mbed_official	330:c80ac197fa6a	5425	}
mbed_official	330:c80ac197fa6a	5426	else
mbed_official	330:c80ac197fa6a	5427	{
mbed_official	330:c80ac197fa6a	5428	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	5429	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	5430
mbed_official	330:c80ac197fa6a	5431	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	5432	}
mbed_official	330:c80ac197fa6a	5433	}
mbed_official	330:c80ac197fa6a	5434
mbed_official	330:c80ac197fa6a	5435
mbed_official	330:c80ac197fa6a	5436	/* Channel sampling time configuration */
mbed_official	330:c80ac197fa6a	5437	/* For channels 10 to 18 */
mbed_official	330:c80ac197fa6a	5438	if (sConfigInjected->InjectedChannel > ADC_CHANNEL_10)
mbed_official	330:c80ac197fa6a	5439	{
mbed_official	330:c80ac197fa6a	5440	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	5441	hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel);
mbed_official	330:c80ac197fa6a	5442
mbed_official	330:c80ac197fa6a	5443	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	5444	hadc->Instance->SMPR1 \|= __HAL_ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
mbed_official	330:c80ac197fa6a	5445	}
mbed_official	330:c80ac197fa6a	5446	else /* For channels 0 to 9 */
mbed_official	330:c80ac197fa6a	5447	{
mbed_official	330:c80ac197fa6a	5448	/* Clear the old sample time */
mbed_official	330:c80ac197fa6a	5449	hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel);
mbed_official	330:c80ac197fa6a	5450
mbed_official	330:c80ac197fa6a	5451	/* Set the new sample time */
mbed_official	330:c80ac197fa6a	5452	hadc->Instance->SMPR2 \|= __HAL_ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
mbed_official	330:c80ac197fa6a	5453	}
mbed_official	330:c80ac197fa6a	5454
mbed_official	330:c80ac197fa6a	5455	/* Configure the offset: offset enable/disable, InjectedChannel, offset value */
mbed_official	330:c80ac197fa6a	5456	switch(sConfigInjected->InjectedRank)
mbed_official	330:c80ac197fa6a	5457	{
mbed_official	330:c80ac197fa6a	5458	case 1:
mbed_official	330:c80ac197fa6a	5459	/* Set injected channel 1 offset */
mbed_official	330:c80ac197fa6a	5460	hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1);
mbed_official	330:c80ac197fa6a	5461	hadc->Instance->JOFR1 \|= sConfigInjected->InjectedOffset;
mbed_official	330:c80ac197fa6a	5462	break;
mbed_official	330:c80ac197fa6a	5463	case 2:
mbed_official	330:c80ac197fa6a	5464	/* Set injected channel 2 offset */
mbed_official	330:c80ac197fa6a	5465	hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2);
mbed_official	330:c80ac197fa6a	5466	hadc->Instance->JOFR2 \|= sConfigInjected->InjectedOffset;
mbed_official	330:c80ac197fa6a	5467	break;
mbed_official	330:c80ac197fa6a	5468	case 3:
mbed_official	330:c80ac197fa6a	5469	/* Set injected channel 3 offset */
mbed_official	330:c80ac197fa6a	5470	hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3);
mbed_official	330:c80ac197fa6a	5471	hadc->Instance->JOFR3 \|= sConfigInjected->InjectedOffset;
mbed_official	330:c80ac197fa6a	5472	break;
mbed_official	330:c80ac197fa6a	5473	default:
mbed_official	330:c80ac197fa6a	5474	/* Set injected channel 4 offset */
mbed_official	330:c80ac197fa6a	5475	hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4);
mbed_official	330:c80ac197fa6a	5476	hadc->Instance->JOFR4 \|= sConfigInjected->InjectedOffset;
mbed_official	330:c80ac197fa6a	5477	break;
mbed_official	330:c80ac197fa6a	5478	}
mbed_official	330:c80ac197fa6a	5479
mbed_official	330:c80ac197fa6a	5480	/* if ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor / VREFINT measurement path */
mbed_official	330:c80ac197fa6a	5481	if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) \|\| (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT))
mbed_official	330:c80ac197fa6a	5482	{
mbed_official	330:c80ac197fa6a	5483	hadc->Instance->CR2 \|= ADC_CR2_TSVREFE;
mbed_official	330:c80ac197fa6a	5484	}
mbed_official	330:c80ac197fa6a	5485	/* if ADC1 Channel_17 is selected, enable VBAT measurement path */
mbed_official	330:c80ac197fa6a	5486	else if (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)
mbed_official	330:c80ac197fa6a	5487	{
mbed_official	330:c80ac197fa6a	5488	SYSCFG->CFGR1 \|= SYSCFG_CFGR1_VBAT;
mbed_official	330:c80ac197fa6a	5489	}
mbed_official	330:c80ac197fa6a	5490
mbed_official	330:c80ac197fa6a	5491	/* Process unlocked */
mbed_official	330:c80ac197fa6a	5492	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	5493
mbed_official	330:c80ac197fa6a	5494	/* Return function status */
mbed_official	330:c80ac197fa6a	5495	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	5496	}
mbed_official	330:c80ac197fa6a	5497	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	5498
mbed_official	330:c80ac197fa6a	5499	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	5500	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	5501	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	5502	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	5503	/**
mbed_official	330:c80ac197fa6a	5504	* @brief Configures the analog watchdog.
mbed_official	330:c80ac197fa6a	5505	* @note Possibility to update parameters on the fly:
mbed_official	330:c80ac197fa6a	5506	* This function initializes the selected analog watchdog, following
mbed_official	330:c80ac197fa6a	5507	* calls to this function can be used to reconfigure some parameters
mbed_official	330:c80ac197fa6a	5508	* of structure "ADC_AnalogWDGConfTypeDef" on the fly, without reseting
mbed_official	330:c80ac197fa6a	5509	* the ADC.
mbed_official	330:c80ac197fa6a	5510	* The setting of these parameters is conditioned to ADC state.
mbed_official	330:c80ac197fa6a	5511	* For parameters constraints, see comments of structure
mbed_official	330:c80ac197fa6a	5512	* "ADC_AnalogWDGConfTypeDef".
mbed_official	330:c80ac197fa6a	5513	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	5514	* @param AnalogWDGConfig: Structure of ADC analog watchdog configuration
mbed_official	330:c80ac197fa6a	5515	* @retval HAL status
mbed_official	330:c80ac197fa6a	5516	*/
mbed_official	330:c80ac197fa6a	5517	HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
mbed_official	330:c80ac197fa6a	5518	{
mbed_official	330:c80ac197fa6a	5519	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	5520
mbed_official	330:c80ac197fa6a	5521	uint32_t tmpAWDHighThresholdShifted;
mbed_official	330:c80ac197fa6a	5522	uint32_t tmpAWDLowThresholdShifted;
mbed_official	330:c80ac197fa6a	5523
mbed_official	330:c80ac197fa6a	5524	uint32_t tmpADCFlagAWD2orAWD3;
mbed_official	330:c80ac197fa6a	5525	uint32_t tmpADCITAWD2orAWD3;
mbed_official	330:c80ac197fa6a	5526
mbed_official	330:c80ac197fa6a	5527	/* Check the parameters */
mbed_official	330:c80ac197fa6a	5528	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	5529	assert_param(IS_ADC_ANALOG_WATCHDOG_NUMBER(AnalogWDGConfig->WatchdogNumber));
mbed_official	330:c80ac197fa6a	5530	assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
mbed_official	330:c80ac197fa6a	5531	assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
mbed_official	330:c80ac197fa6a	5532	assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
mbed_official	330:c80ac197fa6a	5533
mbed_official	330:c80ac197fa6a	5534	/* Verify if threshold is within the selected ADC resolution */
mbed_official	330:c80ac197fa6a	5535	assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
mbed_official	330:c80ac197fa6a	5536	assert_param(IS_ADC_RANGE(__HAL_ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
mbed_official	330:c80ac197fa6a	5537
mbed_official	330:c80ac197fa6a	5538	/* Process locked */
mbed_official	330:c80ac197fa6a	5539	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	5540
mbed_official	330:c80ac197fa6a	5541	/* Parameters update conditioned to ADC state: */
mbed_official	330:c80ac197fa6a	5542	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	330:c80ac197fa6a	5543	/* conversion on going on regular and injected groups: */
mbed_official	330:c80ac197fa6a	5544	/* - Analog watchdog channels */
mbed_official	330:c80ac197fa6a	5545	/* - Analog watchdog thresholds */
mbed_official	330:c80ac197fa6a	5546	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET)
mbed_official	330:c80ac197fa6a	5547	{
mbed_official	330:c80ac197fa6a	5548
mbed_official	330:c80ac197fa6a	5549	/* Analog watchdogs configuration */
mbed_official	330:c80ac197fa6a	5550	if(AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_1)
mbed_official	330:c80ac197fa6a	5551	{
mbed_official	330:c80ac197fa6a	5552	/* Configuration of analog watchdog: */
mbed_official	330:c80ac197fa6a	5553	/* - Set the analog watchdog enable mode: regular and/or injected */
mbed_official	330:c80ac197fa6a	5554	/* groups, one or overall group of channels. */
mbed_official	330:c80ac197fa6a	5555	/* - Set the Analog watchdog channel (is not used if watchdog */
mbed_official	330:c80ac197fa6a	5556	/* mode "all channels": ADC_CFGR_AWD1SGL=0). */
mbed_official	330:c80ac197fa6a	5557	hadc->Instance->CFGR &= ~( ADC_CFGR_AWD1SGL \|
mbed_official	330:c80ac197fa6a	5558	ADC_CFGR_JAWD1EN \|
mbed_official	330:c80ac197fa6a	5559	ADC_CFGR_AWD1EN \|
mbed_official	330:c80ac197fa6a	5560	ADC_CFGR_AWD1CH );
mbed_official	330:c80ac197fa6a	5561
mbed_official	330:c80ac197fa6a	5562	hadc->Instance->CFGR \|= ( AnalogWDGConfig->WatchdogMode \|
mbed_official	330:c80ac197fa6a	5563	__HAL_ADC_CFGR_AWD1CH(AnalogWDGConfig->Channel) );
mbed_official	330:c80ac197fa6a	5564
mbed_official	330:c80ac197fa6a	5565	/* Shift the offset in function of the selected ADC resolution: */
mbed_official	330:c80ac197fa6a	5566	/* Thresholds have to be left-aligned on bit 11, the LSB (right bits) */
mbed_official	330:c80ac197fa6a	5567	/* are set to 0 */
mbed_official	330:c80ac197fa6a	5568	tmpAWDHighThresholdShifted = __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
mbed_official	330:c80ac197fa6a	5569	tmpAWDLowThresholdShifted = __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
mbed_official	330:c80ac197fa6a	5570
mbed_official	330:c80ac197fa6a	5571	/* Set the high and low thresholds */
mbed_official	330:c80ac197fa6a	5572	hadc->Instance->TR1 &= ~(ADC_TR1_HT1 \| ADC_TR1_LT1);
mbed_official	330:c80ac197fa6a	5573	hadc->Instance->TR1 \|= ( __HAL_ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) \|
mbed_official	330:c80ac197fa6a	5574	tmpAWDLowThresholdShifted );
mbed_official	330:c80ac197fa6a	5575
mbed_official	330:c80ac197fa6a	5576	/* Clear the ADC Analog watchdog flag (in case of let enabled by */
mbed_official	330:c80ac197fa6a	5577	/* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */
mbed_official	330:c80ac197fa6a	5578	/* or HAL_ADC_PollForEvent(). */
mbed_official	330:c80ac197fa6a	5579	__HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD1);
mbed_official	330:c80ac197fa6a	5580
mbed_official	330:c80ac197fa6a	5581	/* Configure ADC Analog watchdog interrupt */
mbed_official	330:c80ac197fa6a	5582	if(AnalogWDGConfig->ITMode == ENABLE)
mbed_official	330:c80ac197fa6a	5583	{
mbed_official	330:c80ac197fa6a	5584	/* Enable the ADC Analog watchdog interrupt */
mbed_official	330:c80ac197fa6a	5585	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD1);
mbed_official	330:c80ac197fa6a	5586	}
mbed_official	330:c80ac197fa6a	5587	else
mbed_official	330:c80ac197fa6a	5588	{
mbed_official	330:c80ac197fa6a	5589	/* Disable the ADC Analog watchdog interrupt */
mbed_official	330:c80ac197fa6a	5590	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD1);
mbed_official	330:c80ac197fa6a	5591	}
mbed_official	330:c80ac197fa6a	5592
mbed_official	330:c80ac197fa6a	5593	}
mbed_official	330:c80ac197fa6a	5594	/* Case of ADC_ANALOGWATCHDOG_2 and ADC_ANALOGWATCHDOG_3 */
mbed_official	330:c80ac197fa6a	5595	else
mbed_official	330:c80ac197fa6a	5596	{
mbed_official	330:c80ac197fa6a	5597	/* Shift the threshold in function of the selected ADC resolution */
mbed_official	330:c80ac197fa6a	5598	/* have to be left-aligned on bit 7, the LSB (right bits) are set to 0 */
mbed_official	330:c80ac197fa6a	5599	tmpAWDHighThresholdShifted = __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold);
mbed_official	330:c80ac197fa6a	5600	tmpAWDLowThresholdShifted = __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold);
mbed_official	330:c80ac197fa6a	5601
mbed_official	330:c80ac197fa6a	5602	if (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_2)
mbed_official	330:c80ac197fa6a	5603	{
mbed_official	330:c80ac197fa6a	5604	/* Set the Analog watchdog channel or group of channels. This also */
mbed_official	330:c80ac197fa6a	5605	/* enables the watchdog. */
mbed_official	330:c80ac197fa6a	5606	/* Note: Conditionnal register reset, because several channels can be */
mbed_official	330:c80ac197fa6a	5607	/* set by successive calls of this function. */
mbed_official	330:c80ac197fa6a	5608	if (AnalogWDGConfig->WatchdogMode != ADC_ANALOGWATCHDOG_NONE)
mbed_official	330:c80ac197fa6a	5609	{
mbed_official	330:c80ac197fa6a	5610	hadc->Instance->AWD2CR \|= __HAL_ADC_CFGR_AWD23CR(AnalogWDGConfig->Channel);
mbed_official	330:c80ac197fa6a	5611	}
mbed_official	330:c80ac197fa6a	5612	else
mbed_official	330:c80ac197fa6a	5613	{
mbed_official	330:c80ac197fa6a	5614	hadc->Instance->AWD2CR &= ~ADC_AWD2CR_AWD2CH;
mbed_official	330:c80ac197fa6a	5615	}
mbed_official	330:c80ac197fa6a	5616
mbed_official	330:c80ac197fa6a	5617	/* Set the high and low thresholds */
mbed_official	330:c80ac197fa6a	5618	hadc->Instance->TR2 &= ~(ADC_TR2_HT2 \| ADC_TR2_LT2);
mbed_official	330:c80ac197fa6a	5619	hadc->Instance->TR2 \|= ( __HAL_ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) \|
mbed_official	330:c80ac197fa6a	5620	tmpAWDLowThresholdShifted );
mbed_official	330:c80ac197fa6a	5621
mbed_official	330:c80ac197fa6a	5622	/* Set temporary variable to flag and IT of AWD2 or AWD3 for further */
mbed_official	330:c80ac197fa6a	5623	/* settings. */
mbed_official	330:c80ac197fa6a	5624	tmpADCFlagAWD2orAWD3 = ADC_FLAG_AWD2;
mbed_official	330:c80ac197fa6a	5625	tmpADCITAWD2orAWD3 = ADC_IT_AWD2;
mbed_official	330:c80ac197fa6a	5626	}
mbed_official	330:c80ac197fa6a	5627	/* (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_3) */
mbed_official	330:c80ac197fa6a	5628	else
mbed_official	330:c80ac197fa6a	5629	{
mbed_official	330:c80ac197fa6a	5630	/* Set the Analog watchdog channel or group of channels. This also */
mbed_official	330:c80ac197fa6a	5631	/* enables the watchdog. */
mbed_official	330:c80ac197fa6a	5632	/* Note: Conditionnal register reset, because several channels can be */
mbed_official	330:c80ac197fa6a	5633	/* set by successive calls of this function. */
mbed_official	330:c80ac197fa6a	5634	if (AnalogWDGConfig->WatchdogMode != ADC_ANALOGWATCHDOG_NONE)
mbed_official	330:c80ac197fa6a	5635	{
mbed_official	330:c80ac197fa6a	5636	hadc->Instance->AWD3CR \|= __HAL_ADC_CFGR_AWD23CR(AnalogWDGConfig->Channel);
mbed_official	330:c80ac197fa6a	5637	}
mbed_official	330:c80ac197fa6a	5638	else
mbed_official	330:c80ac197fa6a	5639	{
mbed_official	330:c80ac197fa6a	5640	hadc->Instance->AWD3CR &= ~ADC_AWD3CR_AWD3CH;
mbed_official	330:c80ac197fa6a	5641	}
mbed_official	330:c80ac197fa6a	5642
mbed_official	330:c80ac197fa6a	5643	/* Set the high and low thresholds */
mbed_official	330:c80ac197fa6a	5644	hadc->Instance->TR3 &= ~(ADC_TR3_HT3 \| ADC_TR3_LT3);
mbed_official	330:c80ac197fa6a	5645	hadc->Instance->TR3 \|= ( __HAL_ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) \|
mbed_official	330:c80ac197fa6a	5646	tmpAWDLowThresholdShifted );
mbed_official	330:c80ac197fa6a	5647
mbed_official	330:c80ac197fa6a	5648	/* Set temporary variable to flag and IT of AWD2 or AWD3 for further */
mbed_official	330:c80ac197fa6a	5649	/* settings. */
mbed_official	330:c80ac197fa6a	5650	tmpADCFlagAWD2orAWD3 = ADC_FLAG_AWD3;
mbed_official	330:c80ac197fa6a	5651	tmpADCITAWD2orAWD3 = ADC_IT_AWD3;
mbed_official	330:c80ac197fa6a	5652	}
mbed_official	330:c80ac197fa6a	5653
mbed_official	330:c80ac197fa6a	5654	/* Clear the ADC Analog watchdog flag (in case of let enabled by */
mbed_official	330:c80ac197fa6a	5655	/* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */
mbed_official	330:c80ac197fa6a	5656	/* or HAL_ADC_PollForEvent(). */
mbed_official	330:c80ac197fa6a	5657	__HAL_ADC_CLEAR_FLAG(hadc, tmpADCFlagAWD2orAWD3);
mbed_official	330:c80ac197fa6a	5658
mbed_official	330:c80ac197fa6a	5659	/* Configure ADC Analog watchdog interrupt */
mbed_official	330:c80ac197fa6a	5660	if(AnalogWDGConfig->ITMode == ENABLE)
mbed_official	330:c80ac197fa6a	5661	{
mbed_official	330:c80ac197fa6a	5662	__HAL_ADC_ENABLE_IT(hadc, tmpADCITAWD2orAWD3);
mbed_official	330:c80ac197fa6a	5663	}
mbed_official	330:c80ac197fa6a	5664	else
mbed_official	330:c80ac197fa6a	5665	{
mbed_official	330:c80ac197fa6a	5666	__HAL_ADC_DISABLE_IT(hadc, tmpADCITAWD2orAWD3);
mbed_official	330:c80ac197fa6a	5667	}
mbed_official	330:c80ac197fa6a	5668	}
mbed_official	330:c80ac197fa6a	5669
mbed_official	330:c80ac197fa6a	5670	}
mbed_official	330:c80ac197fa6a	5671	/* If a conversion is on going on regular or injected groups, no update */
mbed_official	330:c80ac197fa6a	5672	/* could be done on neither of the AWD configuration structure parameters. */
mbed_official	330:c80ac197fa6a	5673	else
mbed_official	330:c80ac197fa6a	5674	{
mbed_official	330:c80ac197fa6a	5675	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	5676	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	5677
mbed_official	330:c80ac197fa6a	5678	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	5679	}
mbed_official	330:c80ac197fa6a	5680
mbed_official	330:c80ac197fa6a	5681
mbed_official	330:c80ac197fa6a	5682	/* Process unlocked */
mbed_official	330:c80ac197fa6a	5683	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	5684
mbed_official	330:c80ac197fa6a	5685	/* Return function status */
mbed_official	330:c80ac197fa6a	5686	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	5687	}
mbed_official	330:c80ac197fa6a	5688	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	5689	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	5690	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	5691	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	5692
mbed_official	330:c80ac197fa6a	5693	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	5694	/**
mbed_official	330:c80ac197fa6a	5695	* @brief Configures the analog watchdog.
mbed_official	330:c80ac197fa6a	5696	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	5697	* @param AnalogWDGConfig: Structure of ADC analog watchdog configuration
mbed_official	330:c80ac197fa6a	5698	* @retval HAL status
mbed_official	330:c80ac197fa6a	5699	*/
mbed_official	330:c80ac197fa6a	5700	HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
mbed_official	330:c80ac197fa6a	5701	{
mbed_official	330:c80ac197fa6a	5702	/* Check the parameters */
mbed_official	330:c80ac197fa6a	5703	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	5704	assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
mbed_official	330:c80ac197fa6a	5705	assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
mbed_official	330:c80ac197fa6a	5706	assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
mbed_official	330:c80ac197fa6a	5707	assert_param(IS_ADC_RANGE(AnalogWDGConfig->HighThreshold));
mbed_official	330:c80ac197fa6a	5708	assert_param(IS_ADC_RANGE(AnalogWDGConfig->LowThreshold));
mbed_official	330:c80ac197fa6a	5709
mbed_official	330:c80ac197fa6a	5710	/* Process locked */
mbed_official	330:c80ac197fa6a	5711	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	5712
mbed_official	330:c80ac197fa6a	5713	/* Analog watchdog configuration */
mbed_official	330:c80ac197fa6a	5714
mbed_official	330:c80ac197fa6a	5715	/* Configure ADC Analog watchdog interrupt */
mbed_official	330:c80ac197fa6a	5716	if(AnalogWDGConfig->ITMode == ENABLE)
mbed_official	330:c80ac197fa6a	5717	{
mbed_official	330:c80ac197fa6a	5718	/* Enable the ADC Analog watchdog interrupt */
mbed_official	330:c80ac197fa6a	5719	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
mbed_official	330:c80ac197fa6a	5720	}
mbed_official	330:c80ac197fa6a	5721	else
mbed_official	330:c80ac197fa6a	5722	{
mbed_official	330:c80ac197fa6a	5723	/* Disable the ADC Analog watchdog interrupt */
mbed_official	330:c80ac197fa6a	5724	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
mbed_official	330:c80ac197fa6a	5725	}
mbed_official	330:c80ac197fa6a	5726
mbed_official	330:c80ac197fa6a	5727	/* Configuration of analog watchdog: */
mbed_official	330:c80ac197fa6a	5728	/* - Set the analog watchdog enable mode: regular and/or injected groups, */
mbed_official	330:c80ac197fa6a	5729	/* one or all channels. */
mbed_official	330:c80ac197fa6a	5730	/* - Set the Analog watchdog channel (is not used if watchdog */
mbed_official	330:c80ac197fa6a	5731	/* mode "all channels": ADC_CFGR_AWD1SGL=0). */
mbed_official	330:c80ac197fa6a	5732	hadc->Instance->CR1 &= ~( ADC_CR1_AWDSGL \|
mbed_official	330:c80ac197fa6a	5733	ADC_CR1_JAWDEN \|
mbed_official	330:c80ac197fa6a	5734	ADC_CR1_AWDEN \|
mbed_official	330:c80ac197fa6a	5735	ADC_CR1_AWDCH );
mbed_official	330:c80ac197fa6a	5736
mbed_official	330:c80ac197fa6a	5737	hadc->Instance->CR1 \|= ( AnalogWDGConfig->WatchdogMode \|
mbed_official	330:c80ac197fa6a	5738	AnalogWDGConfig->Channel );
mbed_official	330:c80ac197fa6a	5739
mbed_official	330:c80ac197fa6a	5740	/* Set the high threshold */
mbed_official	330:c80ac197fa6a	5741	hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
mbed_official	330:c80ac197fa6a	5742
mbed_official	330:c80ac197fa6a	5743	/* Set the low threshold */
mbed_official	330:c80ac197fa6a	5744	hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
mbed_official	330:c80ac197fa6a	5745
mbed_official	330:c80ac197fa6a	5746	/* Process unlocked */
mbed_official	330:c80ac197fa6a	5747	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	5748
mbed_official	330:c80ac197fa6a	5749	/* Return function status */
mbed_official	330:c80ac197fa6a	5750	return HAL_OK;
mbed_official	330:c80ac197fa6a	5751	}
mbed_official	330:c80ac197fa6a	5752	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	5753
mbed_official	330:c80ac197fa6a	5754
mbed_official	330:c80ac197fa6a	5755	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	5756	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	5757	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx)
mbed_official	330:c80ac197fa6a	5758	/**
mbed_official	330:c80ac197fa6a	5759	* @brief Enable ADC multimode and configure multimode parameters
mbed_official	330:c80ac197fa6a	5760	* @note Possibility to update parameters on the fly:
mbed_official	330:c80ac197fa6a	5761	* This function initializes multimode parameters, following
mbed_official	330:c80ac197fa6a	5762	* calls to this function can be used to reconfigure some parameters
mbed_official	330:c80ac197fa6a	5763	* of structure "ADC_MultiModeTypeDef" on the fly, without reseting
mbed_official	330:c80ac197fa6a	5764	* the ADCs (both ADCs of the common group).
mbed_official	330:c80ac197fa6a	5765	* The setting of these parameters is conditioned to ADC state.
mbed_official	330:c80ac197fa6a	5766	* For parameters constraints, see comments of structure
mbed_official	330:c80ac197fa6a	5767	* "ADC_MultiModeTypeDef".
mbed_official	330:c80ac197fa6a	5768	* @note To change back configuration from multimode to single mode, ADC must
mbed_official	330:c80ac197fa6a	5769	* be reset (using function HAL_ADC_Init() ).
mbed_official	330:c80ac197fa6a	5770	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	5771	* @param multimode : Structure of ADC multimode configuration
mbed_official	330:c80ac197fa6a	5772	* @retval HAL status
mbed_official	330:c80ac197fa6a	5773	*/
mbed_official	330:c80ac197fa6a	5774	HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
mbed_official	330:c80ac197fa6a	5775	{
mbed_official	330:c80ac197fa6a	5776	HAL_StatusTypeDef tmpHALStatus = HAL_OK;
mbed_official	330:c80ac197fa6a	5777	ADC_Common_TypeDef *tmpADC_Common;
mbed_official	330:c80ac197fa6a	5778	ADC_HandleTypeDef tmphadcSharingSameCommonRegister;
mbed_official	330:c80ac197fa6a	5779
mbed_official	330:c80ac197fa6a	5780	/* Check the parameters */
mbed_official	330:c80ac197fa6a	5781	assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	5782	assert_param(IS_ADC_MODE(multimode->Mode));
mbed_official	330:c80ac197fa6a	5783	assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode));
mbed_official	330:c80ac197fa6a	5784	assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
mbed_official	330:c80ac197fa6a	5785
mbed_official	330:c80ac197fa6a	5786	/* Process locked */
mbed_official	330:c80ac197fa6a	5787	__HAL_LOCK(hadc);
mbed_official	330:c80ac197fa6a	5788
mbed_official	330:c80ac197fa6a	5789
mbed_official	330:c80ac197fa6a	5790	/* Set handle of the other ADC sharing the same common register */
mbed_official	330:c80ac197fa6a	5791	__HAL_ADC_COMMON_ADC_OTHER(hadc, &tmphadcSharingSameCommonRegister);
mbed_official	330:c80ac197fa6a	5792
mbed_official	330:c80ac197fa6a	5793	/* Parameters update conditioned to ADC state: */
mbed_official	330:c80ac197fa6a	5794	/* Parameters that can be updated when ADC is disabled or enabled without */
mbed_official	330:c80ac197fa6a	5795	/* conversion on going on regular group: */
mbed_official	330:c80ac197fa6a	5796	/* - Multimode DMA configuration */
mbed_official	330:c80ac197fa6a	5797	/* - Multimode DMA mode */
mbed_official	330:c80ac197fa6a	5798	/* Parameters that can be updated only when ADC is disabled: */
mbed_official	330:c80ac197fa6a	5799	/* - Multimode mode selection */
mbed_official	330:c80ac197fa6a	5800	/* - Multimode delay */
mbed_official	330:c80ac197fa6a	5801	/* To optimize code, all multimode settings can be set when both ADCs of */
mbed_official	330:c80ac197fa6a	5802	/* the common group are in state: disabled. */
mbed_official	330:c80ac197fa6a	5803	if ((__HAL_ADC_IS_ENABLED(hadc) == RESET) &&
mbed_official	330:c80ac197fa6a	5804	(__HAL_ADC_IS_ENABLED(&tmphadcSharingSameCommonRegister) == RESET) )
mbed_official	330:c80ac197fa6a	5805	{
mbed_official	330:c80ac197fa6a	5806
mbed_official	330:c80ac197fa6a	5807	/* Pointer to the common control register to which is belonging hadc */
mbed_official	330:c80ac197fa6a	5808	/* (Depending on STM32F3 product, there may have up to 4 ADC and 2 common */
mbed_official	330:c80ac197fa6a	5809	/* control registers) */
mbed_official	330:c80ac197fa6a	5810	tmpADC_Common = __HAL_ADC_COMMON_REGISTER(hadc);
mbed_official	330:c80ac197fa6a	5811
mbed_official	330:c80ac197fa6a	5812	/* Configuration of ADC common group ADC1&ADC2, ADC3&ADC4 if available */
mbed_official	330:c80ac197fa6a	5813	/* (ADC2, ADC3, ADC4 availability depends on STM32 product) */
mbed_official	330:c80ac197fa6a	5814	/* - set the selected multimode */
mbed_official	330:c80ac197fa6a	5815	/* - DMA access mode */
mbed_official	330:c80ac197fa6a	5816	/* - Set delay between two sampling phases */
mbed_official	330:c80ac197fa6a	5817	/* Note: Delay range depends on selected resolution: */
mbed_official	330:c80ac197fa6a	5818	/* from 1 to 12 clock cycles for 12 bits */
mbed_official	330:c80ac197fa6a	5819	/* from 1 to 10 clock cycles for 10 bits, */
mbed_official	330:c80ac197fa6a	5820	/* from 1 to 8 clock cycles for 8 bits */
mbed_official	330:c80ac197fa6a	5821	/* from 1 to 6 clock cycles for 6 bits */
mbed_official	330:c80ac197fa6a	5822	/* If a higher delay is selected, it will be clamped to maximum delay */
mbed_official	330:c80ac197fa6a	5823	/* range */
mbed_official	330:c80ac197fa6a	5824	tmpADC_Common->CCR &= ~( ADC_CCR_MULTI \|
mbed_official	330:c80ac197fa6a	5825	ADC_CCR_MDMA \|
mbed_official	330:c80ac197fa6a	5826	ADC_CCR_DELAY \|
mbed_official	330:c80ac197fa6a	5827	ADC_CCR_DMACFG );
mbed_official	330:c80ac197fa6a	5828
mbed_official	330:c80ac197fa6a	5829	tmpADC_Common->CCR \|= ( multimode->Mode \|
mbed_official	330:c80ac197fa6a	5830	multimode->DMAAccessMode \|
mbed_official	330:c80ac197fa6a	5831	multimode->TwoSamplingDelay \|
mbed_official	330:c80ac197fa6a	5832	__HAL_ADC_CCR_MULTI_DMACONTREQ(hadc->Init.DMAContinuousRequests) );
mbed_official	330:c80ac197fa6a	5833	}
mbed_official	330:c80ac197fa6a	5834	/* If one of the ADC sharing the same common group is enabled, no update */
mbed_official	330:c80ac197fa6a	5835	/* could be done on neither of the multimode structure parameters. */
mbed_official	330:c80ac197fa6a	5836	else
mbed_official	330:c80ac197fa6a	5837	{
mbed_official	330:c80ac197fa6a	5838	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	5839	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	5840
mbed_official	330:c80ac197fa6a	5841	tmpHALStatus = HAL_ERROR;
mbed_official	330:c80ac197fa6a	5842	}
mbed_official	330:c80ac197fa6a	5843
mbed_official	330:c80ac197fa6a	5844
mbed_official	330:c80ac197fa6a	5845	/* Process unlocked */
mbed_official	330:c80ac197fa6a	5846	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	5847
mbed_official	330:c80ac197fa6a	5848	/* Return function status */
mbed_official	330:c80ac197fa6a	5849	return tmpHALStatus;
mbed_official	330:c80ac197fa6a	5850	}
mbed_official	330:c80ac197fa6a	5851	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	5852	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	5853	/* STM32F303x8 \|\| STM32F328xx \|\| STM32F334x8 */
mbed_official	330:c80ac197fa6a	5854
mbed_official	330:c80ac197fa6a	5855	/**
mbed_official	330:c80ac197fa6a	5856	* @}
mbed_official	330:c80ac197fa6a	5857	*/
mbed_official	330:c80ac197fa6a	5858
mbed_official	330:c80ac197fa6a	5859	/**
mbed_official	330:c80ac197fa6a	5860	* @}
mbed_official	330:c80ac197fa6a	5861	*/
mbed_official	330:c80ac197fa6a	5862
mbed_official	330:c80ac197fa6a	5863	/** @defgroup ADCEx_Private_Functions ADC Extended Private Functions
mbed_official	330:c80ac197fa6a	5864	* @{
mbed_official	330:c80ac197fa6a	5865	*/
mbed_official	330:c80ac197fa6a	5866	/**
mbed_official	330:c80ac197fa6a	5867	* @brief DMA transfer complete callback.
mbed_official	330:c80ac197fa6a	5868	* @param hdma: pointer to DMA handle.
mbed_official	330:c80ac197fa6a	5869	* @retval None
mbed_official	330:c80ac197fa6a	5870	*/
mbed_official	330:c80ac197fa6a	5871	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
mbed_official	330:c80ac197fa6a	5872	{
mbed_official	330:c80ac197fa6a	5873	/* Retrieve ADC handle corresponding to current DMA handle */
mbed_official	330:c80ac197fa6a	5874	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	330:c80ac197fa6a	5875
mbed_official	330:c80ac197fa6a	5876	/* Update state machine on conversion status if not in error state */
mbed_official	330:c80ac197fa6a	5877	if(hadc->State != HAL_ADC_STATE_ERROR)
mbed_official	330:c80ac197fa6a	5878	{
mbed_official	330:c80ac197fa6a	5879	/* Update ADC state machine */
mbed_official	330:c80ac197fa6a	5880	if(hadc->State != HAL_ADC_STATE_EOC_INJ_REG)
mbed_official	330:c80ac197fa6a	5881	{
mbed_official	330:c80ac197fa6a	5882	/* Check if a conversion is ready on injected group */
mbed_official	330:c80ac197fa6a	5883	if(hadc->State == HAL_ADC_STATE_EOC_INJ)
mbed_official	330:c80ac197fa6a	5884	{
mbed_official	330:c80ac197fa6a	5885	/* Change ADC state */
mbed_official	330:c80ac197fa6a	5886	hadc->State = HAL_ADC_STATE_EOC_INJ_REG;
mbed_official	330:c80ac197fa6a	5887	}
mbed_official	330:c80ac197fa6a	5888	else
mbed_official	330:c80ac197fa6a	5889	{
mbed_official	330:c80ac197fa6a	5890	/* Change ADC state */
mbed_official	330:c80ac197fa6a	5891	hadc->State = HAL_ADC_STATE_EOC_REG;
mbed_official	330:c80ac197fa6a	5892	}
mbed_official	330:c80ac197fa6a	5893	}
mbed_official	330:c80ac197fa6a	5894	}
mbed_official	330:c80ac197fa6a	5895
mbed_official	330:c80ac197fa6a	5896	/* Conversion complete callback */
mbed_official	330:c80ac197fa6a	5897	HAL_ADC_ConvCpltCallback(hadc);
mbed_official	330:c80ac197fa6a	5898	}
mbed_official	330:c80ac197fa6a	5899
mbed_official	330:c80ac197fa6a	5900	/**
mbed_official	330:c80ac197fa6a	5901	* @brief DMA half transfer complete callback.
mbed_official	330:c80ac197fa6a	5902	* @param hdma: pointer to DMA handle.
mbed_official	330:c80ac197fa6a	5903	* @retval None
mbed_official	330:c80ac197fa6a	5904	*/
mbed_official	330:c80ac197fa6a	5905	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
mbed_official	330:c80ac197fa6a	5906	{
mbed_official	330:c80ac197fa6a	5907	/* Retrieve ADC handle corresponding to current DMA handle */
mbed_official	330:c80ac197fa6a	5908	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	330:c80ac197fa6a	5909
mbed_official	330:c80ac197fa6a	5910	/* Half conversion callback */
mbed_official	330:c80ac197fa6a	5911	HAL_ADC_ConvHalfCpltCallback(hadc);
mbed_official	330:c80ac197fa6a	5912	}
mbed_official	330:c80ac197fa6a	5913
mbed_official	330:c80ac197fa6a	5914	/**
mbed_official	330:c80ac197fa6a	5915	* @brief DMA error callback
mbed_official	330:c80ac197fa6a	5916	* @param hdma: pointer to DMA handle.
mbed_official	330:c80ac197fa6a	5917	* @retval None
mbed_official	330:c80ac197fa6a	5918	*/
mbed_official	330:c80ac197fa6a	5919	static void ADC_DMAError(DMA_HandleTypeDef *hdma)
mbed_official	330:c80ac197fa6a	5920	{
mbed_official	330:c80ac197fa6a	5921	/* Retrieve ADC handle corresponding to current DMA handle */
mbed_official	330:c80ac197fa6a	5922	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official	330:c80ac197fa6a	5923
mbed_official	330:c80ac197fa6a	5924	/* Change ADC state */
mbed_official	330:c80ac197fa6a	5925	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	5926
mbed_official	330:c80ac197fa6a	5927	/* Set ADC error code to DMA error */
mbed_official	330:c80ac197fa6a	5928	hadc->ErrorCode \|= HAL_ADC_ERROR_DMA;
mbed_official	330:c80ac197fa6a	5929
mbed_official	330:c80ac197fa6a	5930	/* Error callback */
mbed_official	330:c80ac197fa6a	5931	HAL_ADC_ErrorCallback(hadc);
mbed_official	330:c80ac197fa6a	5932	}
mbed_official	330:c80ac197fa6a	5933
mbed_official	330:c80ac197fa6a	5934	#if defined(STM32F302xE) \|\| defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| \
mbed_official	330:c80ac197fa6a	5935	defined(STM32F302xC) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx) \|\| \
mbed_official	330:c80ac197fa6a	5936	defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx) \|\| \
mbed_official	330:c80ac197fa6a	5937	defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx)
mbed_official	330:c80ac197fa6a	5938	/**
mbed_official	330:c80ac197fa6a	5939	* @brief Enable the selected ADC.
mbed_official	330:c80ac197fa6a	5940	* @note Prerequisite condition to use this function: ADC must be disabled
mbed_official	330:c80ac197fa6a	5941	* and voltage regulator must be enabled (done into HAL_ADC_Init()).
mbed_official	330:c80ac197fa6a	5942	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	5943	* @retval HAL status.
mbed_official	330:c80ac197fa6a	5944	*/
mbed_official	330:c80ac197fa6a	5945	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	5946	{
mbed_official	330:c80ac197fa6a	5947	uint32_t tickstart = 0;
mbed_official	330:c80ac197fa6a	5948
mbed_official	330:c80ac197fa6a	5949	/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
mbed_official	330:c80ac197fa6a	5950	/* enabling phase not yet completed: flag ADC ready not yet set). */
mbed_official	330:c80ac197fa6a	5951	/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
mbed_official	330:c80ac197fa6a	5952	/* causes: ADC clock not running, ...). */
mbed_official	330:c80ac197fa6a	5953	if (__HAL_ADC_IS_ENABLED(hadc) == RESET)
mbed_official	330:c80ac197fa6a	5954	{
mbed_official	330:c80ac197fa6a	5955	/* Check if conditions to enable the ADC are fulfilled */
mbed_official	330:c80ac197fa6a	5956	if (__HAL_ADC_ENABLING_CONDITIONS(hadc) == RESET)
mbed_official	330:c80ac197fa6a	5957	{
mbed_official	330:c80ac197fa6a	5958	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	5959	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	5960
mbed_official	330:c80ac197fa6a	5961	/* Set ADC error code to ADC IP internal error */
mbed_official	330:c80ac197fa6a	5962	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	330:c80ac197fa6a	5963
mbed_official	330:c80ac197fa6a	5964	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	5965	}
mbed_official	330:c80ac197fa6a	5966
mbed_official	330:c80ac197fa6a	5967	/* Enable the ADC peripheral */
mbed_official	330:c80ac197fa6a	5968	__HAL_ADC_ENABLE(hadc);
mbed_official	330:c80ac197fa6a	5969
mbed_official	330:c80ac197fa6a	5970	/* Wait for ADC effectively enabled */
mbed_official	330:c80ac197fa6a	5971	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	5972
mbed_official	330:c80ac197fa6a	5973	while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
mbed_official	330:c80ac197fa6a	5974	{
mbed_official	330:c80ac197fa6a	5975	if((HAL_GetTick()-tickstart) > ADC_ENABLE_TIMEOUT)
mbed_official	330:c80ac197fa6a	5976	{
mbed_official	330:c80ac197fa6a	5977	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	5978	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	5979
mbed_official	330:c80ac197fa6a	5980	/* Set ADC error code to ADC IP internal error */
mbed_official	330:c80ac197fa6a	5981	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	330:c80ac197fa6a	5982
mbed_official	330:c80ac197fa6a	5983	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	5984	}
mbed_official	330:c80ac197fa6a	5985	}
mbed_official	330:c80ac197fa6a	5986	}
mbed_official	330:c80ac197fa6a	5987
mbed_official	330:c80ac197fa6a	5988	/* Return HAL status */
mbed_official	330:c80ac197fa6a	5989	return HAL_OK;
mbed_official	330:c80ac197fa6a	5990	}
mbed_official	330:c80ac197fa6a	5991
mbed_official	330:c80ac197fa6a	5992	/**
mbed_official	330:c80ac197fa6a	5993	* @brief Disable the selected ADC.
mbed_official	330:c80ac197fa6a	5994	* @note Prerequisite condition to use this function: ADC conversions must be
mbed_official	330:c80ac197fa6a	5995	* stopped.
mbed_official	330:c80ac197fa6a	5996	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	5997	* @retval HAL status.
mbed_official	330:c80ac197fa6a	5998	*/
mbed_official	330:c80ac197fa6a	5999	static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	6000	{
mbed_official	330:c80ac197fa6a	6001	uint32_t tickstart = 0;
mbed_official	330:c80ac197fa6a	6002
mbed_official	330:c80ac197fa6a	6003	/* Verification if ADC is not already disabled: */
mbed_official	330:c80ac197fa6a	6004	/* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
mbed_official	330:c80ac197fa6a	6005	/* disabled. */
mbed_official	330:c80ac197fa6a	6006	if (__HAL_ADC_IS_ENABLED(hadc) != RESET )
mbed_official	330:c80ac197fa6a	6007	{
mbed_official	330:c80ac197fa6a	6008	/* Check if conditions to disable the ADC are fulfilled */
mbed_official	330:c80ac197fa6a	6009	if (__HAL_ADC_DISABLING_CONDITIONS(hadc) != RESET)
mbed_official	330:c80ac197fa6a	6010	{
mbed_official	330:c80ac197fa6a	6011	/* Disable the ADC peripheral */
mbed_official	330:c80ac197fa6a	6012	__HAL_ADC_DISABLE(hadc);
mbed_official	330:c80ac197fa6a	6013	}
mbed_official	330:c80ac197fa6a	6014	else
mbed_official	330:c80ac197fa6a	6015	{
mbed_official	330:c80ac197fa6a	6016	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	6017	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	6018
mbed_official	330:c80ac197fa6a	6019	/* Set ADC error code to ADC IP internal error */
mbed_official	330:c80ac197fa6a	6020	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	330:c80ac197fa6a	6021
mbed_official	330:c80ac197fa6a	6022	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	6023	}
mbed_official	330:c80ac197fa6a	6024
mbed_official	330:c80ac197fa6a	6025	/* Wait for ADC effectively disabled */
mbed_official	330:c80ac197fa6a	6026	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	6027
mbed_official	330:c80ac197fa6a	6028	while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
mbed_official	330:c80ac197fa6a	6029	{
mbed_official	330:c80ac197fa6a	6030	if((HAL_GetTick()-tickstart) > ADC_DISABLE_TIMEOUT)
mbed_official	330:c80ac197fa6a	6031	{
mbed_official	330:c80ac197fa6a	6032	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	6033	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	6034
mbed_official	330:c80ac197fa6a	6035	/* Set ADC error code to ADC IP internal error */
mbed_official	330:c80ac197fa6a	6036	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	330:c80ac197fa6a	6037
mbed_official	330:c80ac197fa6a	6038	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	6039	}
mbed_official	330:c80ac197fa6a	6040	}
mbed_official	330:c80ac197fa6a	6041	}
mbed_official	330:c80ac197fa6a	6042
mbed_official	330:c80ac197fa6a	6043	/* Return HAL status */
mbed_official	330:c80ac197fa6a	6044	return HAL_OK;
mbed_official	330:c80ac197fa6a	6045	}
mbed_official	330:c80ac197fa6a	6046
mbed_official	330:c80ac197fa6a	6047
mbed_official	330:c80ac197fa6a	6048	/**
mbed_official	330:c80ac197fa6a	6049	* @brief Stop ADC conversion.
mbed_official	330:c80ac197fa6a	6050	* @note Prerequisite condition to use this function: ADC conversions must be
mbed_official	330:c80ac197fa6a	6051	* stopped to disable the ADC.
mbed_official	330:c80ac197fa6a	6052	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	6053	* @param ConversionGroup: ADC group regular and/or injected.
mbed_official	330:c80ac197fa6a	6054	* This parameter can be one of the following values:
mbed_official	330:c80ac197fa6a	6055	* @arg REGULAR_GROUP: ADC regular conversion type.
mbed_official	330:c80ac197fa6a	6056	* @arg INJECTED_GROUP: ADC injected conversion type.
mbed_official	330:c80ac197fa6a	6057	* @arg REGULAR_INJECTED_GROUP: ADC regular and injected conversion type.
mbed_official	330:c80ac197fa6a	6058	* @retval HAL status.
mbed_official	330:c80ac197fa6a	6059	*/
mbed_official	330:c80ac197fa6a	6060	static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc, uint32_t ConversionGroup)
mbed_official	330:c80ac197fa6a	6061	{
mbed_official	330:c80ac197fa6a	6062	uint32_t tmp_ADC_CR_ADSTART_JADSTART = 0;
mbed_official	330:c80ac197fa6a	6063	uint32_t tickstart = 0;
mbed_official	330:c80ac197fa6a	6064	uint32_t Conversion_Timeout_CPU_cycles = 0;
mbed_official	330:c80ac197fa6a	6065
mbed_official	330:c80ac197fa6a	6066	/* Check the parameters */
mbed_official	330:c80ac197fa6a	6067	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
mbed_official	330:c80ac197fa6a	6068	assert_param(IS_ADC_CONVERSION_GROUP(ConversionGroup));
mbed_official	330:c80ac197fa6a	6069
mbed_official	330:c80ac197fa6a	6070	/* Verification if ADC is not already stopped (on regular and injected */
mbed_official	330:c80ac197fa6a	6071	/* groups) to bypass this function if not needed. */
mbed_official	330:c80ac197fa6a	6072	if (__HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc))
mbed_official	330:c80ac197fa6a	6073	{
mbed_official	330:c80ac197fa6a	6074	/* Particular case of continuous auto-injection mode combined with */
mbed_official	330:c80ac197fa6a	6075	/* auto-delay mode. */
mbed_official	330:c80ac197fa6a	6076	/* In auto-injection mode, regular group stop ADC_CR_ADSTP is used (not */
mbed_official	330:c80ac197fa6a	6077	/* injected group stop ADC_CR_JADSTP). */
mbed_official	330:c80ac197fa6a	6078	/* Procedure to be followed: Wait until JEOS=1, clear JEOS, set ADSTP=1 */
mbed_official	330:c80ac197fa6a	6079	/* (see reference manual). */
mbed_official	330:c80ac197fa6a	6080	if ((HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CFGR_JAUTO))
mbed_official	330:c80ac197fa6a	6081	&& (hadc->Init.ContinuousConvMode==ENABLE)
mbed_official	330:c80ac197fa6a	6082	&& (hadc->Init.LowPowerAutoWait==ENABLE))
mbed_official	330:c80ac197fa6a	6083	{
mbed_official	330:c80ac197fa6a	6084	/* Use stop of regular group */
mbed_official	330:c80ac197fa6a	6085	ConversionGroup = REGULAR_GROUP;
mbed_official	330:c80ac197fa6a	6086
mbed_official	330:c80ac197fa6a	6087	/* Wait until JEOS=1 (maximum Timeout: 4 injected conversions) */
mbed_official	330:c80ac197fa6a	6088	while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) == RESET)
mbed_official	330:c80ac197fa6a	6089	{
mbed_official	330:c80ac197fa6a	6090	if (Conversion_Timeout_CPU_cycles >= (ADC_CONVERSION_TIME_MAX_CPU_CYCLES *4))
mbed_official	330:c80ac197fa6a	6091	{
mbed_official	330:c80ac197fa6a	6092	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	6093	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	6094
mbed_official	330:c80ac197fa6a	6095	/* Set ADC error code to ADC IP internal error */
mbed_official	330:c80ac197fa6a	6096	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	330:c80ac197fa6a	6097
mbed_official	330:c80ac197fa6a	6098	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	6099	}
mbed_official	330:c80ac197fa6a	6100	Conversion_Timeout_CPU_cycles ++;
mbed_official	330:c80ac197fa6a	6101	}
mbed_official	330:c80ac197fa6a	6102
mbed_official	330:c80ac197fa6a	6103	/* Clear JEOS */
mbed_official	330:c80ac197fa6a	6104	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOS);
mbed_official	330:c80ac197fa6a	6105	}
mbed_official	330:c80ac197fa6a	6106
mbed_official	330:c80ac197fa6a	6107	/* Stop potential conversion on going on regular group */
mbed_official	330:c80ac197fa6a	6108	if (ConversionGroup != INJECTED_GROUP)
mbed_official	330:c80ac197fa6a	6109	{
mbed_official	330:c80ac197fa6a	6110	/* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
mbed_official	330:c80ac197fa6a	6111	if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) &&
mbed_official	330:c80ac197fa6a	6112	HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) )
mbed_official	330:c80ac197fa6a	6113	{
mbed_official	330:c80ac197fa6a	6114	/* Stop conversions on regular group */
mbed_official	330:c80ac197fa6a	6115	hadc->Instance->CR \|= ADC_CR_ADSTP;
mbed_official	330:c80ac197fa6a	6116	}
mbed_official	330:c80ac197fa6a	6117	}
mbed_official	330:c80ac197fa6a	6118
mbed_official	330:c80ac197fa6a	6119	/* Stop potential conversion on going on injected group */
mbed_official	330:c80ac197fa6a	6120	if (ConversionGroup != REGULAR_GROUP)
mbed_official	330:c80ac197fa6a	6121	{
mbed_official	330:c80ac197fa6a	6122	/* Software is allowed to set JADSTP only when JADSTART=1 and ADDIS=0 */
mbed_official	330:c80ac197fa6a	6123	if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_JADSTART) &&
mbed_official	330:c80ac197fa6a	6124	HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) )
mbed_official	330:c80ac197fa6a	6125	{
mbed_official	330:c80ac197fa6a	6126	/* Stop conversions on injected group */
mbed_official	330:c80ac197fa6a	6127	hadc->Instance->CR \|= ADC_CR_JADSTP;
mbed_official	330:c80ac197fa6a	6128	}
mbed_official	330:c80ac197fa6a	6129	}
mbed_official	330:c80ac197fa6a	6130
mbed_official	330:c80ac197fa6a	6131	/* Selection of start and stop bits in function of regular or injected group */
mbed_official	330:c80ac197fa6a	6132	switch(ConversionGroup)
mbed_official	330:c80ac197fa6a	6133	{
mbed_official	330:c80ac197fa6a	6134	case REGULAR_INJECTED_GROUP:
mbed_official	330:c80ac197fa6a	6135	tmp_ADC_CR_ADSTART_JADSTART = (ADC_CR_ADSTART \| ADC_CR_JADSTART);
mbed_official	330:c80ac197fa6a	6136	break;
mbed_official	330:c80ac197fa6a	6137	case INJECTED_GROUP:
mbed_official	330:c80ac197fa6a	6138	tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_JADSTART;
mbed_official	330:c80ac197fa6a	6139	break;
mbed_official	330:c80ac197fa6a	6140	/* Case REGULAR_GROUP */
mbed_official	330:c80ac197fa6a	6141	default:
mbed_official	330:c80ac197fa6a	6142	tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_ADSTART;
mbed_official	330:c80ac197fa6a	6143	break;
mbed_official	330:c80ac197fa6a	6144	}
mbed_official	330:c80ac197fa6a	6145
mbed_official	330:c80ac197fa6a	6146	/* Wait for conversion effectively stopped */
mbed_official	330:c80ac197fa6a	6147	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	6148
mbed_official	330:c80ac197fa6a	6149	while((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != RESET)
mbed_official	330:c80ac197fa6a	6150	{
mbed_official	330:c80ac197fa6a	6151	if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
mbed_official	330:c80ac197fa6a	6152	{
mbed_official	330:c80ac197fa6a	6153	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	6154	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	6155
mbed_official	330:c80ac197fa6a	6156	/* Set ADC error code to ADC IP internal error */
mbed_official	330:c80ac197fa6a	6157	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	330:c80ac197fa6a	6158
mbed_official	330:c80ac197fa6a	6159	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	6160	}
mbed_official	330:c80ac197fa6a	6161	}
mbed_official	330:c80ac197fa6a	6162
mbed_official	330:c80ac197fa6a	6163	}
mbed_official	330:c80ac197fa6a	6164
mbed_official	330:c80ac197fa6a	6165	/* Return HAL status */
mbed_official	330:c80ac197fa6a	6166	return HAL_OK;
mbed_official	330:c80ac197fa6a	6167	}
mbed_official	330:c80ac197fa6a	6168	#endif /* STM32F302xE \|\| STM32F303xE \|\| STM32F398xx \|\| */
mbed_official	330:c80ac197fa6a	6169	/* STM32F302xC \|\| STM32F303xC \|\| STM32F358xx \|\| */
mbed_official	330:c80ac197fa6a	6170	/* STM32F303x8 \|\| STM32F334x8 \|\| STM32F328xx \|\| */
mbed_official	330:c80ac197fa6a	6171	/* STM32F301x8 \|\| STM32F302x8 \|\| STM32F318xx */
mbed_official	330:c80ac197fa6a	6172
mbed_official	330:c80ac197fa6a	6173	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
mbed_official	330:c80ac197fa6a	6174	/**
mbed_official	330:c80ac197fa6a	6175	* @brief Enable the selected ADC.
mbed_official	330:c80ac197fa6a	6176	* @note Prerequisite condition to use this function: ADC must be disabled
mbed_official	330:c80ac197fa6a	6177	* and voltage regulator must be enabled (done into HAL_ADC_Init()).
mbed_official	330:c80ac197fa6a	6178	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	6179	* @retval HAL status.
mbed_official	330:c80ac197fa6a	6180	*/
mbed_official	330:c80ac197fa6a	6181	static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	6182	{
mbed_official	330:c80ac197fa6a	6183	uint32_t WaitLoopIndex = 0;
mbed_official	330:c80ac197fa6a	6184	uint32_t tickstart = 0;
mbed_official	330:c80ac197fa6a	6185
mbed_official	330:c80ac197fa6a	6186	/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
mbed_official	330:c80ac197fa6a	6187	/* enabling phase not yet completed: flag ADC ready not yet set). */
mbed_official	330:c80ac197fa6a	6188	/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
mbed_official	330:c80ac197fa6a	6189	/* causes: ADC clock not running, ...). */
mbed_official	330:c80ac197fa6a	6190	if (__HAL_ADC_IS_ENABLED(hadc) == RESET)
mbed_official	330:c80ac197fa6a	6191	{
mbed_official	330:c80ac197fa6a	6192	/* Enable the Peripheral */
mbed_official	330:c80ac197fa6a	6193	__HAL_ADC_ENABLE(hadc);
mbed_official	330:c80ac197fa6a	6194
mbed_official	330:c80ac197fa6a	6195	/* Delay for ADC stabilization time. */
mbed_official	330:c80ac197fa6a	6196	/* Delay fixed to worst case: maximum CPU frequency */
mbed_official	330:c80ac197fa6a	6197	while(WaitLoopIndex < ADC_STAB_DELAY_CPU_CYCLES)
mbed_official	330:c80ac197fa6a	6198	{
mbed_official	330:c80ac197fa6a	6199	WaitLoopIndex++;
mbed_official	330:c80ac197fa6a	6200	}
mbed_official	330:c80ac197fa6a	6201
mbed_official	330:c80ac197fa6a	6202	/* Get timeout */
mbed_official	330:c80ac197fa6a	6203	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	6204
mbed_official	330:c80ac197fa6a	6205	/* Wait for ADC effectively enabled */
mbed_official	330:c80ac197fa6a	6206	while(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
mbed_official	330:c80ac197fa6a	6207	{
mbed_official	330:c80ac197fa6a	6208	if((HAL_GetTick()-tickstart) > ADC_ENABLE_TIMEOUT)
mbed_official	330:c80ac197fa6a	6209	{
mbed_official	330:c80ac197fa6a	6210	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	6211	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	6212
mbed_official	330:c80ac197fa6a	6213	/* Set ADC error code to ADC IP internal error */
mbed_official	330:c80ac197fa6a	6214	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	330:c80ac197fa6a	6215
mbed_official	330:c80ac197fa6a	6216	/* Process unlocked */
mbed_official	330:c80ac197fa6a	6217	__HAL_UNLOCK(hadc);
mbed_official	330:c80ac197fa6a	6218
mbed_official	330:c80ac197fa6a	6219	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	6220	}
mbed_official	330:c80ac197fa6a	6221	}
mbed_official	330:c80ac197fa6a	6222	}
mbed_official	330:c80ac197fa6a	6223
mbed_official	330:c80ac197fa6a	6224	/* Return HAL status */
mbed_official	330:c80ac197fa6a	6225	return HAL_OK;
mbed_official	330:c80ac197fa6a	6226	}
mbed_official	330:c80ac197fa6a	6227
mbed_official	330:c80ac197fa6a	6228	/**
mbed_official	330:c80ac197fa6a	6229	* @brief Stop ADC conversion and disable the selected ADC
mbed_official	330:c80ac197fa6a	6230	* @note Prerequisite condition to use this function: ADC conversions must be
mbed_official	330:c80ac197fa6a	6231	* stopped to disable the ADC.
mbed_official	330:c80ac197fa6a	6232	* @param hadc: ADC handle
mbed_official	330:c80ac197fa6a	6233	* @retval HAL status.
mbed_official	330:c80ac197fa6a	6234	*/
mbed_official	330:c80ac197fa6a	6235	static HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
mbed_official	330:c80ac197fa6a	6236	{
mbed_official	330:c80ac197fa6a	6237	uint32_t tickstart = 0;
mbed_official	330:c80ac197fa6a	6238
mbed_official	330:c80ac197fa6a	6239	/* Verification if ADC is not already disabled: */
mbed_official	330:c80ac197fa6a	6240	if (__HAL_ADC_IS_ENABLED(hadc) != RESET)
mbed_official	330:c80ac197fa6a	6241	{
mbed_official	330:c80ac197fa6a	6242	/* Disable the ADC peripheral */
mbed_official	330:c80ac197fa6a	6243	__HAL_ADC_DISABLE(hadc);
mbed_official	330:c80ac197fa6a	6244
mbed_official	330:c80ac197fa6a	6245	/* Get timeout */
mbed_official	330:c80ac197fa6a	6246	tickstart = HAL_GetTick();
mbed_official	330:c80ac197fa6a	6247
mbed_official	330:c80ac197fa6a	6248	/* Wait for ADC effectively disabled */
mbed_official	330:c80ac197fa6a	6249	while(__HAL_ADC_IS_ENABLED(hadc) != RESET)
mbed_official	330:c80ac197fa6a	6250	{
mbed_official	330:c80ac197fa6a	6251	if((HAL_GetTick()-tickstart) > ADC_ENABLE_TIMEOUT)
mbed_official	330:c80ac197fa6a	6252	{
mbed_official	330:c80ac197fa6a	6253	/* Update ADC state machine to error */
mbed_official	330:c80ac197fa6a	6254	hadc->State = HAL_ADC_STATE_ERROR;
mbed_official	330:c80ac197fa6a	6255
mbed_official	330:c80ac197fa6a	6256	/* Set ADC error code to ADC IP internal error */
mbed_official	330:c80ac197fa6a	6257	hadc->ErrorCode \|= HAL_ADC_ERROR_INTERNAL;
mbed_official	330:c80ac197fa6a	6258
mbed_official	330:c80ac197fa6a	6259	return HAL_ERROR;
mbed_official	330:c80ac197fa6a	6260	}
mbed_official	330:c80ac197fa6a	6261	}
mbed_official	330:c80ac197fa6a	6262	}
mbed_official	330:c80ac197fa6a	6263
mbed_official	330:c80ac197fa6a	6264	/* Return HAL status */
mbed_official	330:c80ac197fa6a	6265	return HAL_OK;
mbed_official	330:c80ac197fa6a	6266	}
mbed_official	330:c80ac197fa6a	6267	#endif /* STM32F373xC \|\| STM32F378xx */
mbed_official	330:c80ac197fa6a	6268	/**
mbed_official	330:c80ac197fa6a	6269	* @}
mbed_official	330:c80ac197fa6a	6270	*/
mbed_official	330:c80ac197fa6a	6271
mbed_official	330:c80ac197fa6a	6272	#endif /* HAL_ADC_MODULE_ENABLED */
mbed_official	330:c80ac197fa6a	6273	/**
mbed_official	330:c80ac197fa6a	6274	* @}
mbed_official	330:c80ac197fa6a	6275	*/
mbed_official	330:c80ac197fa6a	6276
mbed_official	330:c80ac197fa6a	6277	/**
mbed_official	330:c80ac197fa6a	6278	* @}
mbed_official	330:c80ac197fa6a	6279	*/
mbed_official	330:c80ac197fa6a	6280
mbed_official	330:c80ac197fa6a	6281	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

Repository toolbox

Export to desktop IDE

Repository details

Type:	Library
Created:	13 Dec 2016
Imports:	0
Forks:	0
Commits:	637
Dependents:	0
Dependencies:	0
Followers:	1

targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_adc_ex.c@636:b0d178e9fa10, 2016-07-07 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning