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targets/cmsis/TARGET_NXP/TARGET_LPC2460/system_LPC24xx.c@636:b0d178e9fa10, 2016-07-07 (annotated)

Committer:
lzbpli
Date:
Thu Jul 07 06:48:59 2016 +0000
Revision:
636:b0d178e9fa10
Parent:
554:edd95c0879f8 
l053

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 554:edd95c0879f8 1 /* mbed Microcontroller Library
mbed_official 554:edd95c0879f8 2 * Copyright (C) 2008-2015 ARM Limited. All rights reserved.
mbed_official 554:edd95c0879f8 3 *
mbed_official 554:edd95c0879f8 4 * ARM7 version of CMSIS-like functionality - not advised for use outside mbed!
mbed_official 554:edd95c0879f8 5 */
mbed_official 554:edd95c0879f8 6
mbed_official 554:edd95c0879f8 7 #include <stdint.h>
mbed_official 554:edd95c0879f8 8 #include "LPC24xx.h"
mbed_official 554:edd95c0879f8 9
mbed_official 554:edd95c0879f8 10 #define CLOCK_SETUP 1
mbed_official 554:edd95c0879f8 11 #define SCS_Val ((1<<4) | (1 << 5))
mbed_official 554:edd95c0879f8 12 #define CLKSRCSEL_Val 0x00000001
mbed_official 554:edd95c0879f8 13
mbed_official 554:edd95c0879f8 14 #define PLL0_SETUP 1
mbed_official 554:edd95c0879f8 15 #define PLL0CFG_Val 0x0000000B
mbed_official 554:edd95c0879f8 16 #define CCLKCFG_Val 0x00000003
mbed_official 554:edd95c0879f8 17 #define USBCLKCFG_Val 0x00000005
mbed_official 554:edd95c0879f8 18 #define PCLKSEL0_Val 0x00000000
mbed_official 554:edd95c0879f8 19 #define PCLKSEL1_Val 0x00000000
mbed_official 554:edd95c0879f8 20 #define PCONP_Val (1 << PCEMC)
mbed_official 554:edd95c0879f8 21 #define CLKOUTCFG_Val 0x00000000
mbed_official 554:edd95c0879f8 22 #define MAMCR_Val 0x00000002
mbed_official 554:edd95c0879f8 23 #define MAMTIM_Val 0x00000004
mbed_official 554:edd95c0879f8 24
mbed_official 554:edd95c0879f8 25 /*----------------------------------------------------------------------------
mbed_official 554:edd95c0879f8 26 DEFINES
mbed_official 554:edd95c0879f8 27 *----------------------------------------------------------------------------*/
mbed_official 554:edd95c0879f8 28
mbed_official 554:edd95c0879f8 29 #define XTAL (12000000UL) /* Oscillator frequency */
mbed_official 554:edd95c0879f8 30 #define OSC_CLK ( XTAL) /* Main oscillator frequency */
mbed_official 554:edd95c0879f8 31 #define RTC_CLK ( 32000UL) /* RTC oscillator frequency */
mbed_official 554:edd95c0879f8 32 #define IRC_OSC ( 4000000UL) /* Internal RC oscillator frequency */
mbed_official 554:edd95c0879f8 33
mbed_official 554:edd95c0879f8 34 /* F_cco0 = (2 * M * F_in) / N */
mbed_official 554:edd95c0879f8 35 #define __M (((PLL0CFG_Val ) & 0x7FFF) + 1)
mbed_official 554:edd95c0879f8 36 #define __N (((PLL0CFG_Val >> 16) & 0x00FF) + 1)
mbed_official 554:edd95c0879f8 37 #define __FCCO(__F_IN) ((2 * __M * __F_IN) / __N)
mbed_official 554:edd95c0879f8 38 #define __CCLK_DIV (((CCLKCFG_Val ) & 0x00FF) + 1)
mbed_official 554:edd95c0879f8 39
mbed_official 554:edd95c0879f8 40 /* Determine core clock frequency according to settings */
mbed_official 554:edd95c0879f8 41 #if (PLL0_SETUP)
mbed_official 554:edd95c0879f8 42 #if ((CLKSRCSEL_Val & 0x03) == 1)
mbed_official 554:edd95c0879f8 43 #define __CORE_CLK (__FCCO(OSC_CLK) / __CCLK_DIV)
mbed_official 554:edd95c0879f8 44 #elif ((CLKSRCSEL_Val & 0x03) == 2)
mbed_official 554:edd95c0879f8 45 #define __CORE_CLK (__FCCO(RTC_CLK) / __CCLK_DIV)
mbed_official 554:edd95c0879f8 46 #else
mbed_official 554:edd95c0879f8 47 #define __CORE_CLK (__FCCO(IRC_OSC) / __CCLK_DIV)
mbed_official 554:edd95c0879f8 48 #endif
mbed_official 554:edd95c0879f8 49 #endif
mbed_official 554:edd95c0879f8 50
mbed_official 554:edd95c0879f8 51
mbed_official 554:edd95c0879f8 52 /*----------------------------------------------------------------------------
mbed_official 554:edd95c0879f8 53 Clock Variable definitions
mbed_official 554:edd95c0879f8 54 *----------------------------------------------------------------------------*/
mbed_official 554:edd95c0879f8 55 uint32_t SystemCoreClock = __CORE_CLK;/*!< System Clock Frequency (Core Clock)*/
mbed_official 554:edd95c0879f8 56
mbed_official 554:edd95c0879f8 57 /*----------------------------------------------------------------------------
mbed_official 554:edd95c0879f8 58 Clock functions
mbed_official 554:edd95c0879f8 59 *----------------------------------------------------------------------------*/
mbed_official 554:edd95c0879f8 60 void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
mbed_official 554:edd95c0879f8 61 {
mbed_official 554:edd95c0879f8 62 /* Determine clock frequency according to clock register values */
mbed_official 554:edd95c0879f8 63 if (((LPC_SC->PLL0STAT >> 24) & 3) == 3) { /* If PLL0 enabled and connected */
mbed_official 554:edd95c0879f8 64 switch (LPC_SC->CLKSRCSEL & 0x03) {
mbed_official 554:edd95c0879f8 65 case 0: /* Int. RC oscillator => PLL0 */
mbed_official 554:edd95c0879f8 66 case 3: /* Reserved, default to Int. RC */
mbed_official 554:edd95c0879f8 67 SystemCoreClock = (IRC_OSC *
mbed_official 554:edd95c0879f8 68 (((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) /
mbed_official 554:edd95c0879f8 69 (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)) /
mbed_official 554:edd95c0879f8 70 ((LPC_SC->CCLKCFG & 0xFF)+ 1));
mbed_official 554:edd95c0879f8 71 break;
mbed_official 554:edd95c0879f8 72 case 1: /* Main oscillator => PLL0 */
mbed_official 554:edd95c0879f8 73 SystemCoreClock = (OSC_CLK *
mbed_official 554:edd95c0879f8 74 (((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) /
mbed_official 554:edd95c0879f8 75 (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)) /
mbed_official 554:edd95c0879f8 76 ((LPC_SC->CCLKCFG & 0xFF)+ 1));
mbed_official 554:edd95c0879f8 77 break;
mbed_official 554:edd95c0879f8 78 case 2: /* RTC oscillator => PLL0 */
mbed_official 554:edd95c0879f8 79 SystemCoreClock = (RTC_CLK *
mbed_official 554:edd95c0879f8 80 (((2 * ((LPC_SC->PLL0STAT & 0x7FFF) + 1))) /
mbed_official 554:edd95c0879f8 81 (((LPC_SC->PLL0STAT >> 16) & 0xFF) + 1)) /
mbed_official 554:edd95c0879f8 82 ((LPC_SC->CCLKCFG & 0xFF)+ 1));
mbed_official 554:edd95c0879f8 83 break;
mbed_official 554:edd95c0879f8 84 }
mbed_official 554:edd95c0879f8 85 } else {
mbed_official 554:edd95c0879f8 86 switch (LPC_SC->CLKSRCSEL & 0x03) {
mbed_official 554:edd95c0879f8 87 case 0: /* Int. RC oscillator => PLL0 */
mbed_official 554:edd95c0879f8 88 case 3: /* Reserved, default to Int. RC */
mbed_official 554:edd95c0879f8 89 SystemCoreClock = IRC_OSC / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
mbed_official 554:edd95c0879f8 90 break;
mbed_official 554:edd95c0879f8 91 case 1: /* Main oscillator => PLL0 */
mbed_official 554:edd95c0879f8 92 SystemCoreClock = OSC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
mbed_official 554:edd95c0879f8 93 break;
mbed_official 554:edd95c0879f8 94 case 2: /* RTC oscillator => PLL0 */
mbed_official 554:edd95c0879f8 95 SystemCoreClock = RTC_CLK / ((LPC_SC->CCLKCFG & 0xFF)+ 1);
mbed_official 554:edd95c0879f8 96 break;
mbed_official 554:edd95c0879f8 97 }
mbed_official 554:edd95c0879f8 98 }
mbed_official 554:edd95c0879f8 99 }
mbed_official 554:edd95c0879f8 100
mbed_official 554:edd95c0879f8 101 void vectorRemap()
mbed_official 554:edd95c0879f8 102 {
mbed_official 554:edd95c0879f8 103 #define ARM_VECTOR_REBASE (0x40000000)
mbed_official 554:edd95c0879f8 104 extern unsigned long __privileged_code_start__; /* Startup code address from linker */
mbed_official 554:edd95c0879f8 105 int i;
mbed_official 554:edd95c0879f8 106
mbed_official 554:edd95c0879f8 107 /* Copy ARM vector table into internal RAM */
mbed_official 554:edd95c0879f8 108 for (i = 0; i <= 56; i+=2)
mbed_official 554:edd95c0879f8 109 {
mbed_official 554:edd95c0879f8 110 *(unsigned short *)(ARM_VECTOR_REBASE + i) = *(unsigned short *)((unsigned long)(&__privileged_code_start__) + i);
mbed_official 554:edd95c0879f8 111 }
mbed_official 554:edd95c0879f8 112
mbed_official 554:edd95c0879f8 113 // *(unsigned long *)(ARM_VECTOR_REBASE) = (unsigned long)armUnexpReset;
mbed_official 554:edd95c0879f8 114 /* Remap the interrupt vectors to RAM */
mbed_official 554:edd95c0879f8 115 LPC_SC->MEMMAP = 2;
mbed_official 554:edd95c0879f8 116 }
mbed_official 554:edd95c0879f8 117
mbed_official 554:edd95c0879f8 118 /**
mbed_official 554:edd95c0879f8 119 * Initialize the system
mbed_official 554:edd95c0879f8 120 *
mbed_official 554:edd95c0879f8 121 * @param none
mbed_official 554:edd95c0879f8 122 * @return none
mbed_official 554:edd95c0879f8 123 *
mbed_official 554:edd95c0879f8 124 * @brief Setup the microcontroller system.
mbed_official 554:edd95c0879f8 125 * Initialize the System and update the SystemFrequency variable.
mbed_official 554:edd95c0879f8 126 */
mbed_official 554:edd95c0879f8 127 void SystemInit (void)
mbed_official 554:edd95c0879f8 128 {
mbed_official 554:edd95c0879f8 129 LPC_WDT->WDMOD = 0; /* Disable internal watchdog */
mbed_official 554:edd95c0879f8 130 #if (CLOCK_SETUP) /* Clock Setup */
mbed_official 554:edd95c0879f8 131 LPC_SC->SCS = SCS_Val;
mbed_official 554:edd95c0879f8 132 if (SCS_Val & (1 << 5)) { /* If Main Oscillator is enabled */
mbed_official 554:edd95c0879f8 133 while ((LPC_SC->SCS & (1 << 6)) == 0); /* Wait for Oscillator to be ready */
mbed_official 554:edd95c0879f8 134 }
mbed_official 554:edd95c0879f8 135
mbed_official 554:edd95c0879f8 136 LPC_SC->CCLKCFG = CCLKCFG_Val; /* Setup Clock Divider */
mbed_official 554:edd95c0879f8 137
mbed_official 554:edd95c0879f8 138 #if (PLL0_SETUP)
mbed_official 554:edd95c0879f8 139 LPC_SC->CLKSRCSEL = CLKSRCSEL_Val; /* Select Clock Source for PLL0 */
mbed_official 554:edd95c0879f8 140 LPC_SC->PLL0CFG = PLL0CFG_Val;
mbed_official 554:edd95c0879f8 141 LPC_SC->PLL0CON = 0x01; /* PLL0 Enable */
mbed_official 554:edd95c0879f8 142 LPC_SC->PLL0FEED = 0xAA;
mbed_official 554:edd95c0879f8 143 LPC_SC->PLL0FEED = 0x55;
mbed_official 554:edd95c0879f8 144 while (!(LPC_SC->PLL0STAT & (1 << 26))); /* Wait for PLOCK0 */
mbed_official 554:edd95c0879f8 145
mbed_official 554:edd95c0879f8 146 LPC_SC->PLL0CON = 0x03; /* PLL0 Enable & Connect */
mbed_official 554:edd95c0879f8 147 LPC_SC->PLL0FEED = 0xAA;
mbed_official 554:edd95c0879f8 148 LPC_SC->PLL0FEED = 0x55;
mbed_official 554:edd95c0879f8 149 #endif
mbed_official 554:edd95c0879f8 150
mbed_official 554:edd95c0879f8 151 LPC_SC->USBCLKCFG = USBCLKCFG_Val; /* Setup USB Clock Divider */
mbed_official 554:edd95c0879f8 152 #endif
mbed_official 554:edd95c0879f8 153
mbed_official 554:edd95c0879f8 154 LPC_SC->PCLKSEL0 = PCLKSEL0_Val; /* Peripheral Clock Selection */
mbed_official 554:edd95c0879f8 155 LPC_SC->PCLKSEL1 = PCLKSEL1_Val;
mbed_official 554:edd95c0879f8 156
mbed_official 554:edd95c0879f8 157 LPC_SC->PCONP = PCONP_Val; /* Power Control for Peripherals */
mbed_official 554:edd95c0879f8 158
mbed_official 554:edd95c0879f8 159 // Setup MAM
mbed_official 554:edd95c0879f8 160 LPC_SC->MAMTIM = MAMTIM_Val;
mbed_official 554:edd95c0879f8 161 LPC_SC->MAMCR = MAMCR_Val;
mbed_official 554:edd95c0879f8 162 vectorRemap();
mbed_official 554:edd95c0879f8 163 }
mbed_official 554:edd95c0879f8 164