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mbed library sources

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC82X/analogin_api.c@337:6ed01c00b962, 2014-10-06 (annotated)

Committer:
mbed_official
Date:
Mon Oct 06 10:00:08 2014 +0100
Revision:
337:6ed01c00b962
Synchronized with git revision b30176a071a49d95914b97d2ab98240f3a1e2cae



Full URL: https://github.com/mbedmicro/mbed/commit/b30176a071a49d95914b97d2ab98240f3a1e2cae/



Platform: LPC824 - new platform addition

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 337:6ed01c00b962 1 /* mbed Microcontroller Library
mbed_official 337:6ed01c00b962 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 337:6ed01c00b962 3 *
mbed_official 337:6ed01c00b962 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 337:6ed01c00b962 5 * you may not use this file except in compliance with the License.
mbed_official 337:6ed01c00b962 6 * You may obtain a copy of the License at
mbed_official 337:6ed01c00b962 7 *
mbed_official 337:6ed01c00b962 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 337:6ed01c00b962 9 *
mbed_official 337:6ed01c00b962 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 337:6ed01c00b962 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 337:6ed01c00b962 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 337:6ed01c00b962 13 * See the License for the specific language governing permissions and
mbed_official 337:6ed01c00b962 14 * limitations under the License.
mbed_official 337:6ed01c00b962 15 */
mbed_official 337:6ed01c00b962 16 #include "mbed_assert.h"
mbed_official 337:6ed01c00b962 17 #include "analogin_api.h"
mbed_official 337:6ed01c00b962 18 #include "cmsis.h"
mbed_official 337:6ed01c00b962 19 #include "pinmap.h"
mbed_official 337:6ed01c00b962 20 #include "PeripheralNames.h"
mbed_official 337:6ed01c00b962 21
mbed_official 337:6ed01c00b962 22 #if DEVICE_ANALOGIN
mbed_official 337:6ed01c00b962 23
mbed_official 337:6ed01c00b962 24 #define ANALOGIN_MEDIAN_FILTER 1
mbed_official 337:6ed01c00b962 25
mbed_official 337:6ed01c00b962 26 #define ADC_RANGE 0xFFF
mbed_official 337:6ed01c00b962 27
mbed_official 337:6ed01c00b962 28 static const PinMap PinMap_ADC[] = {
mbed_official 337:6ed01c00b962 29 {P0_7 , ADC_0, 0},
mbed_official 337:6ed01c00b962 30 {P0_6 , ADC_1, 0},
mbed_official 337:6ed01c00b962 31 {P0_14, ADC_2, 0},
mbed_official 337:6ed01c00b962 32 {P0_23, ADC_3, 0},
mbed_official 337:6ed01c00b962 33 {P0_22, ADC_4, 0},
mbed_official 337:6ed01c00b962 34 {P0_21, ADC_5, 0},
mbed_official 337:6ed01c00b962 35 {P0_20, ADC_6, 0},
mbed_official 337:6ed01c00b962 36 {P0_19, ADC_7, 0},
mbed_official 337:6ed01c00b962 37 {P0_18, ADC_8, 0},
mbed_official 337:6ed01c00b962 38 {P0_17, ADC_9, 0},
mbed_official 337:6ed01c00b962 39 {P0_13, ADC_10,0},
mbed_official 337:6ed01c00b962 40 {P0_4 , ADC_11,0},
mbed_official 337:6ed01c00b962 41 };
mbed_official 337:6ed01c00b962 42
mbed_official 337:6ed01c00b962 43 void analogin_init(analogin_t *obj, PinName pin)
mbed_official 337:6ed01c00b962 44 {
mbed_official 337:6ed01c00b962 45 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
mbed_official 337:6ed01c00b962 46 MBED_ASSERT(obj->adc != (ADCName)NC);
mbed_official 337:6ed01c00b962 47
mbed_official 337:6ed01c00b962 48 LPC_SYSCON->SYSAHBCLKCTRL |= (1UL << 6);
mbed_official 337:6ed01c00b962 49 // pin enable
mbed_official 337:6ed01c00b962 50 LPC_SWM->PINENABLE0 &= ~(1UL << (13 + obj->adc));
mbed_official 337:6ed01c00b962 51 // configure GPIO as input
mbed_official 337:6ed01c00b962 52 LPC_GPIO_PORT->DIR0 &= ~(1UL << (pin >> PIN_SHIFT));
mbed_official 337:6ed01c00b962 53
mbed_official 337:6ed01c00b962 54 LPC_SYSCON->PDRUNCFG &= ~(1 << 4);
mbed_official 337:6ed01c00b962 55 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 24);
mbed_official 337:6ed01c00b962 56
mbed_official 337:6ed01c00b962 57 __IO LPC_ADC_Type *adc_reg = LPC_ADC;
mbed_official 337:6ed01c00b962 58
mbed_official 337:6ed01c00b962 59 // determine the system clock divider for a 500kHz ADC clock during calibration
mbed_official 337:6ed01c00b962 60 uint32_t clkdiv = (SystemCoreClock / 500000) - 1;
mbed_official 337:6ed01c00b962 61
mbed_official 337:6ed01c00b962 62 // perform a self-calibration
mbed_official 337:6ed01c00b962 63 adc_reg->CTRL = (1UL << 30) | (clkdiv & 0xFF);
mbed_official 337:6ed01c00b962 64 while ((adc_reg->CTRL & (1UL << 30)) != 0);
mbed_official 337:6ed01c00b962 65 }
mbed_official 337:6ed01c00b962 66
mbed_official 337:6ed01c00b962 67 static inline uint32_t adc_read(analogin_t *obj)
mbed_official 337:6ed01c00b962 68 {
mbed_official 337:6ed01c00b962 69 uint32_t channels;
mbed_official 337:6ed01c00b962 70 __IO LPC_ADC_Type *adc_reg = LPC_ADC;
mbed_official 337:6ed01c00b962 71
mbed_official 337:6ed01c00b962 72 channels = (obj->adc & 0x1F);
mbed_official 337:6ed01c00b962 73
mbed_official 337:6ed01c00b962 74 // select channel
mbed_official 337:6ed01c00b962 75 adc_reg->SEQA_CTRL &= ~(0xFFF);
mbed_official 337:6ed01c00b962 76 adc_reg->SEQA_CTRL |= (1UL << channels);
mbed_official 337:6ed01c00b962 77
mbed_official 337:6ed01c00b962 78 // start conversion and sequence enable
mbed_official 337:6ed01c00b962 79 adc_reg->SEQA_CTRL |= ((1UL << 26) | (1UL << 31));
mbed_official 337:6ed01c00b962 80
mbed_official 337:6ed01c00b962 81 // Repeatedly get the sample data until DONE bit
mbed_official 337:6ed01c00b962 82 volatile uint32_t data;
mbed_official 337:6ed01c00b962 83 do {
mbed_official 337:6ed01c00b962 84 data = adc_reg->SEQA_GDAT;
mbed_official 337:6ed01c00b962 85 } while ((data & (1UL << 31)) == 0);
mbed_official 337:6ed01c00b962 86
mbed_official 337:6ed01c00b962 87 // Stop conversion
mbed_official 337:6ed01c00b962 88 adc_reg->SEQA_CTRL &= ~(1UL << 31);
mbed_official 337:6ed01c00b962 89
mbed_official 337:6ed01c00b962 90 return ((data >> 4) & ADC_RANGE);
mbed_official 337:6ed01c00b962 91 }
mbed_official 337:6ed01c00b962 92
mbed_official 337:6ed01c00b962 93 static inline void order(uint32_t *a, uint32_t *b)
mbed_official 337:6ed01c00b962 94 {
mbed_official 337:6ed01c00b962 95 if (*a > *b) {
mbed_official 337:6ed01c00b962 96 uint32_t t = *a;
mbed_official 337:6ed01c00b962 97 *a = *b;
mbed_official 337:6ed01c00b962 98 *b = t;
mbed_official 337:6ed01c00b962 99 }
mbed_official 337:6ed01c00b962 100 }
mbed_official 337:6ed01c00b962 101
mbed_official 337:6ed01c00b962 102 static inline uint32_t adc_read_u32(analogin_t *obj)
mbed_official 337:6ed01c00b962 103 {
mbed_official 337:6ed01c00b962 104 uint32_t value;
mbed_official 337:6ed01c00b962 105 #if ANALOGIN_MEDIAN_FILTER
mbed_official 337:6ed01c00b962 106 uint32_t v1 = adc_read(obj);
mbed_official 337:6ed01c00b962 107 uint32_t v2 = adc_read(obj);
mbed_official 337:6ed01c00b962 108 uint32_t v3 = adc_read(obj);
mbed_official 337:6ed01c00b962 109 order(&v1, &v2);
mbed_official 337:6ed01c00b962 110 order(&v2, &v3);
mbed_official 337:6ed01c00b962 111 order(&v1, &v2);
mbed_official 337:6ed01c00b962 112 value = v2;
mbed_official 337:6ed01c00b962 113 #else
mbed_official 337:6ed01c00b962 114 value = adc_read(obj);
mbed_official 337:6ed01c00b962 115 #endif
mbed_official 337:6ed01c00b962 116 return value;
mbed_official 337:6ed01c00b962 117 }
mbed_official 337:6ed01c00b962 118
mbed_official 337:6ed01c00b962 119 uint16_t analogin_read_u16(analogin_t *obj)
mbed_official 337:6ed01c00b962 120 {
mbed_official 337:6ed01c00b962 121 uint32_t value = adc_read_u32(obj);
mbed_official 337:6ed01c00b962 122 return (value << 4) | ((value >> 8) & 0x000F); // 12 bit
mbed_official 337:6ed01c00b962 123 }
mbed_official 337:6ed01c00b962 124
mbed_official 337:6ed01c00b962 125 float analogin_read(analogin_t *obj)
mbed_official 337:6ed01c00b962 126 {
mbed_official 337:6ed01c00b962 127 uint32_t value = adc_read_u32(obj);
mbed_official 337:6ed01c00b962 128 return (float)value * (1.0f / (float)ADC_RANGE);
mbed_official 337:6ed01c00b962 129 }
mbed_official 337:6ed01c00b962 130
mbed_official 337:6ed01c00b962 131 #endif