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mbed library sources

Fork of mbed-src by mbed official

targets/hal/TARGET_Freescale/TARGET_K20XX/i2c_api.c@445:3312ed629f01, 2015-01-15 (annotated)

Committer:
mbed_official
Date:
Thu Jan 15 19:30:07 2015 +0000
Revision:
445:3312ed629f01
Synchronized with git revision e21c65041d9a718f866ed6438e5791b13f9c6d91



Full URL: https://github.com/mbedmicro/mbed/commit/e21c65041d9a718f866ed6438e5791b13f9c6d91/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 445:3312ed629f01 1 /* mbed Microcontroller Library
mbed_official 445:3312ed629f01 2 * Copyright (c) 2006-2015 ARM Limited
mbed_official 445:3312ed629f01 3 *
mbed_official 445:3312ed629f01 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 445:3312ed629f01 5 * you may not use this file except in compliance with the License.
mbed_official 445:3312ed629f01 6 * You may obtain a copy of the License at
mbed_official 445:3312ed629f01 7 *
mbed_official 445:3312ed629f01 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 445:3312ed629f01 9 *
mbed_official 445:3312ed629f01 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 445:3312ed629f01 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 445:3312ed629f01 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 445:3312ed629f01 13 * See the License for the specific language governing permissions and
mbed_official 445:3312ed629f01 14 * limitations under the License.
mbed_official 445:3312ed629f01 15 */
mbed_official 445:3312ed629f01 16 #include "mbed_assert.h"
mbed_official 445:3312ed629f01 17 #include "i2c_api.h"
mbed_official 445:3312ed629f01 18
mbed_official 445:3312ed629f01 19 #include "cmsis.h"
mbed_official 445:3312ed629f01 20 #include "pinmap.h"
mbed_official 445:3312ed629f01 21 #include "clk_freqs.h"
mbed_official 445:3312ed629f01 22 #include "PeripheralPins.h"
mbed_official 445:3312ed629f01 23
mbed_official 445:3312ed629f01 24 static const uint16_t ICR[0x40] = {
mbed_official 445:3312ed629f01 25 20, 22, 24, 26, 28,
mbed_official 445:3312ed629f01 26 30, 34, 40, 28, 32,
mbed_official 445:3312ed629f01 27 36, 40, 44, 48, 56,
mbed_official 445:3312ed629f01 28 68, 48, 56, 64, 72,
mbed_official 445:3312ed629f01 29 80, 88, 104, 128, 80,
mbed_official 445:3312ed629f01 30 96, 112, 128, 144, 160,
mbed_official 445:3312ed629f01 31 192, 240, 160, 192, 224,
mbed_official 445:3312ed629f01 32 256, 288, 320, 384, 480,
mbed_official 445:3312ed629f01 33 320, 384, 448, 512, 576,
mbed_official 445:3312ed629f01 34 640, 768, 960, 640, 768,
mbed_official 445:3312ed629f01 35 896, 1024, 1152, 1280, 1536,
mbed_official 445:3312ed629f01 36 1920, 1280, 1536, 1792, 2048,
mbed_official 445:3312ed629f01 37 2304, 2560, 3072, 3840
mbed_official 445:3312ed629f01 38 };
mbed_official 445:3312ed629f01 39
mbed_official 445:3312ed629f01 40
mbed_official 445:3312ed629f01 41 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
mbed_official 445:3312ed629f01 42 // determine the I2C to use
mbed_official 445:3312ed629f01 43 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
mbed_official 445:3312ed629f01 44 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
mbed_official 445:3312ed629f01 45 obj->i2c = (I2C_Type*)pinmap_merge(i2c_sda, i2c_scl);
mbed_official 445:3312ed629f01 46 MBED_ASSERT((int)obj->i2c != NC);
mbed_official 445:3312ed629f01 47
mbed_official 445:3312ed629f01 48 #if defined(TARGET_K20DX256)
mbed_official 445:3312ed629f01 49 switch ((int)obj->i2c) {
mbed_official 445:3312ed629f01 50 case I2C_0: SIM->SCGC4 |= SIM_SCGC4_I2C0_MASK;
mbed_official 445:3312ed629f01 51 case I2C_1: SIM->SCGC4 |= SIM_SCGC4_I2C1_MASK;
mbed_official 445:3312ed629f01 52 }
mbed_official 445:3312ed629f01 53 #else
mbed_official 445:3312ed629f01 54 SIM->SCGC4 |= SIM_SCGC4_I2C0_MASK;
mbed_official 445:3312ed629f01 55 #endif
mbed_official 445:3312ed629f01 56
mbed_official 445:3312ed629f01 57 // set default frequency at 100k
mbed_official 445:3312ed629f01 58 i2c_frequency(obj, 100000);
mbed_official 445:3312ed629f01 59
mbed_official 445:3312ed629f01 60 // enable I2C interface
mbed_official 445:3312ed629f01 61 obj->i2c->C1 |= 0x80;
mbed_official 445:3312ed629f01 62
mbed_official 445:3312ed629f01 63 pinmap_pinout(sda, PinMap_I2C_SDA);
mbed_official 445:3312ed629f01 64 pinmap_pinout(scl, PinMap_I2C_SCL);
mbed_official 445:3312ed629f01 65 /* enable open drain for I2C pins, only port b available */
mbed_official 445:3312ed629f01 66 uint32_t pin_n = (uint32_t)(sda & 0x7C) >> 2;
mbed_official 445:3312ed629f01 67 PORTB->PCR[pin_n] |= PORT_PCR_ODE_MASK;
mbed_official 445:3312ed629f01 68 pin_n = (uint32_t)(scl & 0x7C) >> 2;
mbed_official 445:3312ed629f01 69 PORTB->PCR[pin_n] |= PORT_PCR_ODE_MASK;
mbed_official 445:3312ed629f01 70 }
mbed_official 445:3312ed629f01 71
mbed_official 445:3312ed629f01 72 int i2c_start(i2c_t *obj) {
mbed_official 445:3312ed629f01 73 // if we are in the middle of a transaction
mbed_official 445:3312ed629f01 74 // activate the repeat_start flag
mbed_official 445:3312ed629f01 75 if (obj->i2c->S & I2C_S_BUSY_MASK) {
mbed_official 445:3312ed629f01 76 obj->i2c->C1 |= 0x04;
mbed_official 445:3312ed629f01 77 } else {
mbed_official 445:3312ed629f01 78 obj->i2c->C1 |= I2C_C1_MST_MASK;
mbed_official 445:3312ed629f01 79 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 445:3312ed629f01 80 }
mbed_official 445:3312ed629f01 81 return 0;
mbed_official 445:3312ed629f01 82 }
mbed_official 445:3312ed629f01 83
mbed_official 445:3312ed629f01 84 int i2c_stop(i2c_t *obj) {
mbed_official 445:3312ed629f01 85 volatile uint32_t n = 0;
mbed_official 445:3312ed629f01 86 obj->i2c->C1 &= ~I2C_C1_MST_MASK;
mbed_official 445:3312ed629f01 87 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 445:3312ed629f01 88
mbed_official 445:3312ed629f01 89 // It seems that there are timing problems
mbed_official 445:3312ed629f01 90 // when there is no waiting time after a STOP.
mbed_official 445:3312ed629f01 91 // This wait is also included on the samples
mbed_official 445:3312ed629f01 92 // code provided with the freedom board
mbed_official 445:3312ed629f01 93 for (n = 0; n < 100; n++)
mbed_official 445:3312ed629f01 94 __NOP();
mbed_official 445:3312ed629f01 95 return 0;
mbed_official 445:3312ed629f01 96 }
mbed_official 445:3312ed629f01 97
mbed_official 445:3312ed629f01 98 static int timeout_status_poll(i2c_t *obj, uint32_t mask) {
mbed_official 445:3312ed629f01 99 uint32_t i, timeout = 100000;
mbed_official 445:3312ed629f01 100
mbed_official 445:3312ed629f01 101 for (i = 0; i < timeout; i++) {
mbed_official 445:3312ed629f01 102 if (obj->i2c->S & mask)
mbed_official 445:3312ed629f01 103 return 0;
mbed_official 445:3312ed629f01 104 }
mbed_official 445:3312ed629f01 105
mbed_official 445:3312ed629f01 106 return 1;
mbed_official 445:3312ed629f01 107 }
mbed_official 445:3312ed629f01 108
mbed_official 445:3312ed629f01 109 // this function waits the end of a tx transfer and return the status of the transaction:
mbed_official 445:3312ed629f01 110 // 0: OK ack received
mbed_official 445:3312ed629f01 111 // 1: OK ack not received
mbed_official 445:3312ed629f01 112 // 2: failure
mbed_official 445:3312ed629f01 113 static int i2c_wait_end_tx_transfer(i2c_t *obj) {
mbed_official 445:3312ed629f01 114
mbed_official 445:3312ed629f01 115 // wait for the interrupt flag
mbed_official 445:3312ed629f01 116 if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
mbed_official 445:3312ed629f01 117 return 2;
mbed_official 445:3312ed629f01 118 }
mbed_official 445:3312ed629f01 119
mbed_official 445:3312ed629f01 120 obj->i2c->S |= I2C_S_IICIF_MASK;
mbed_official 445:3312ed629f01 121
mbed_official 445:3312ed629f01 122 // wait transfer complete
mbed_official 445:3312ed629f01 123 if (timeout_status_poll(obj, I2C_S_TCF_MASK)) {
mbed_official 445:3312ed629f01 124 return 2;
mbed_official 445:3312ed629f01 125 }
mbed_official 445:3312ed629f01 126
mbed_official 445:3312ed629f01 127 // check if we received the ACK or not
mbed_official 445:3312ed629f01 128 return obj->i2c->S & I2C_S_RXAK_MASK ? 1 : 0;
mbed_official 445:3312ed629f01 129 }
mbed_official 445:3312ed629f01 130
mbed_official 445:3312ed629f01 131 // this function waits the end of a rx transfer and return the status of the transaction:
mbed_official 445:3312ed629f01 132 // 0: OK
mbed_official 445:3312ed629f01 133 // 1: failure
mbed_official 445:3312ed629f01 134 static int i2c_wait_end_rx_transfer(i2c_t *obj) {
mbed_official 445:3312ed629f01 135 // wait for the end of the rx transfer
mbed_official 445:3312ed629f01 136 if (timeout_status_poll(obj, I2C_S_IICIF_MASK)) {
mbed_official 445:3312ed629f01 137 return 1;
mbed_official 445:3312ed629f01 138 }
mbed_official 445:3312ed629f01 139
mbed_official 445:3312ed629f01 140 obj->i2c->S |= I2C_S_IICIF_MASK;
mbed_official 445:3312ed629f01 141
mbed_official 445:3312ed629f01 142 return 0;
mbed_official 445:3312ed629f01 143 }
mbed_official 445:3312ed629f01 144
mbed_official 445:3312ed629f01 145 static void i2c_send_nack(i2c_t *obj) {
mbed_official 445:3312ed629f01 146 obj->i2c->C1 |= I2C_C1_TXAK_MASK; // NACK
mbed_official 445:3312ed629f01 147 }
mbed_official 445:3312ed629f01 148
mbed_official 445:3312ed629f01 149 static void i2c_send_ack(i2c_t *obj) {
mbed_official 445:3312ed629f01 150 obj->i2c->C1 &= ~I2C_C1_TXAK_MASK; // ACK
mbed_official 445:3312ed629f01 151 }
mbed_official 445:3312ed629f01 152
mbed_official 445:3312ed629f01 153 static int i2c_do_write(i2c_t *obj, int value) {
mbed_official 445:3312ed629f01 154 // write the data
mbed_official 445:3312ed629f01 155 obj->i2c->D = value;
mbed_official 445:3312ed629f01 156
mbed_official 445:3312ed629f01 157 // init and wait the end of the transfer
mbed_official 445:3312ed629f01 158 return i2c_wait_end_tx_transfer(obj);
mbed_official 445:3312ed629f01 159 }
mbed_official 445:3312ed629f01 160
mbed_official 445:3312ed629f01 161 static int i2c_do_read(i2c_t *obj, char * data, int last) {
mbed_official 445:3312ed629f01 162 if (last) {
mbed_official 445:3312ed629f01 163 i2c_send_nack(obj);
mbed_official 445:3312ed629f01 164 } else {
mbed_official 445:3312ed629f01 165 i2c_send_ack(obj);
mbed_official 445:3312ed629f01 166 }
mbed_official 445:3312ed629f01 167
mbed_official 445:3312ed629f01 168 *data = (obj->i2c->D & 0xFF);
mbed_official 445:3312ed629f01 169
mbed_official 445:3312ed629f01 170 // start rx transfer and wait the end of the transfer
mbed_official 445:3312ed629f01 171 return i2c_wait_end_rx_transfer(obj);
mbed_official 445:3312ed629f01 172 }
mbed_official 445:3312ed629f01 173
mbed_official 445:3312ed629f01 174 void i2c_frequency(i2c_t *obj, int hz) {
mbed_official 445:3312ed629f01 175 uint8_t icr = 0;
mbed_official 445:3312ed629f01 176 uint8_t mult = 0;
mbed_official 445:3312ed629f01 177 uint32_t error = 0;
mbed_official 445:3312ed629f01 178 uint32_t p_error = 0xffffffff;
mbed_official 445:3312ed629f01 179 uint32_t ref = 0;
mbed_official 445:3312ed629f01 180 uint8_t i, j;
mbed_official 445:3312ed629f01 181 // bus clk
mbed_official 445:3312ed629f01 182 uint32_t PCLK = bus_frequency();
mbed_official 445:3312ed629f01 183 uint32_t pulse = PCLK / (hz * 2);
mbed_official 445:3312ed629f01 184
mbed_official 445:3312ed629f01 185 // we look for the values that minimize the error
mbed_official 445:3312ed629f01 186
mbed_official 445:3312ed629f01 187 // test all the MULT values
mbed_official 445:3312ed629f01 188 for (i = 1; i < 5; i*=2) {
mbed_official 445:3312ed629f01 189 for (j = 0; j < 0x40; j++) {
mbed_official 445:3312ed629f01 190 ref = PCLK / (i*ICR[j]);
mbed_official 445:3312ed629f01 191 if (ref > (uint32_t)hz)
mbed_official 445:3312ed629f01 192 continue;
mbed_official 445:3312ed629f01 193 error = hz - ref;
mbed_official 445:3312ed629f01 194 if (error < p_error) {
mbed_official 445:3312ed629f01 195 icr = j;
mbed_official 445:3312ed629f01 196 mult = i/2;
mbed_official 445:3312ed629f01 197 p_error = error;
mbed_official 445:3312ed629f01 198 }
mbed_official 445:3312ed629f01 199 }
mbed_official 445:3312ed629f01 200 }
mbed_official 445:3312ed629f01 201 pulse = icr | (mult << 6);
mbed_official 445:3312ed629f01 202
mbed_official 445:3312ed629f01 203 // I2C Rate
mbed_official 445:3312ed629f01 204 obj->i2c->F = pulse;
mbed_official 445:3312ed629f01 205 }
mbed_official 445:3312ed629f01 206
mbed_official 445:3312ed629f01 207 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
mbed_official 445:3312ed629f01 208 int count;
mbed_official 445:3312ed629f01 209 char dummy_read, *ptr;
mbed_official 445:3312ed629f01 210
mbed_official 445:3312ed629f01 211 if (i2c_start(obj)) {
mbed_official 445:3312ed629f01 212 i2c_stop(obj);
mbed_official 445:3312ed629f01 213 return I2C_ERROR_BUS_BUSY;
mbed_official 445:3312ed629f01 214 }
mbed_official 445:3312ed629f01 215
mbed_official 445:3312ed629f01 216 if (i2c_do_write(obj, (address | 0x01))) {
mbed_official 445:3312ed629f01 217 i2c_stop(obj);
mbed_official 445:3312ed629f01 218 return I2C_ERROR_NO_SLAVE;
mbed_official 445:3312ed629f01 219 }
mbed_official 445:3312ed629f01 220
mbed_official 445:3312ed629f01 221 // set rx mode
mbed_official 445:3312ed629f01 222 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 445:3312ed629f01 223
mbed_official 445:3312ed629f01 224 // Read in bytes
mbed_official 445:3312ed629f01 225 for (count = 0; count < (length); count++) {
mbed_official 445:3312ed629f01 226 ptr = (count == 0) ? &dummy_read : &data[count - 1];
mbed_official 445:3312ed629f01 227 uint8_t stop_ = (count == (length - 1)) ? 1 : 0;
mbed_official 445:3312ed629f01 228 if (i2c_do_read(obj, ptr, stop_)) {
mbed_official 445:3312ed629f01 229 i2c_stop(obj);
mbed_official 445:3312ed629f01 230 return count;
mbed_official 445:3312ed629f01 231 }
mbed_official 445:3312ed629f01 232 }
mbed_official 445:3312ed629f01 233
mbed_official 445:3312ed629f01 234 // If not repeated start, send stop.
mbed_official 445:3312ed629f01 235 if (stop)
mbed_official 445:3312ed629f01 236 i2c_stop(obj);
mbed_official 445:3312ed629f01 237
mbed_official 445:3312ed629f01 238 // last read
mbed_official 445:3312ed629f01 239 data[count-1] = obj->i2c->D;
mbed_official 445:3312ed629f01 240
mbed_official 445:3312ed629f01 241 return length;
mbed_official 445:3312ed629f01 242 }
mbed_official 445:3312ed629f01 243 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
mbed_official 445:3312ed629f01 244 int i;
mbed_official 445:3312ed629f01 245
mbed_official 445:3312ed629f01 246 if (i2c_start(obj)) {
mbed_official 445:3312ed629f01 247 i2c_stop(obj);
mbed_official 445:3312ed629f01 248 return I2C_ERROR_BUS_BUSY;
mbed_official 445:3312ed629f01 249 }
mbed_official 445:3312ed629f01 250
mbed_official 445:3312ed629f01 251 if (i2c_do_write(obj, (address & 0xFE))) {
mbed_official 445:3312ed629f01 252 i2c_stop(obj);
mbed_official 445:3312ed629f01 253 return I2C_ERROR_NO_SLAVE;
mbed_official 445:3312ed629f01 254 }
mbed_official 445:3312ed629f01 255
mbed_official 445:3312ed629f01 256 for (i = 0; i < length; i++) {
mbed_official 445:3312ed629f01 257 if(i2c_do_write(obj, data[i])) {
mbed_official 445:3312ed629f01 258 i2c_stop(obj);
mbed_official 445:3312ed629f01 259 return i;
mbed_official 445:3312ed629f01 260 }
mbed_official 445:3312ed629f01 261 }
mbed_official 445:3312ed629f01 262
mbed_official 445:3312ed629f01 263 if (stop)
mbed_official 445:3312ed629f01 264 i2c_stop(obj);
mbed_official 445:3312ed629f01 265
mbed_official 445:3312ed629f01 266 return length;
mbed_official 445:3312ed629f01 267 }
mbed_official 445:3312ed629f01 268
mbed_official 445:3312ed629f01 269 void i2c_reset(i2c_t *obj) {
mbed_official 445:3312ed629f01 270 i2c_stop(obj);
mbed_official 445:3312ed629f01 271 }
mbed_official 445:3312ed629f01 272
mbed_official 445:3312ed629f01 273 int i2c_byte_read(i2c_t *obj, int last) {
mbed_official 445:3312ed629f01 274 char data;
mbed_official 445:3312ed629f01 275
mbed_official 445:3312ed629f01 276 // set rx mode
mbed_official 445:3312ed629f01 277 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 445:3312ed629f01 278
mbed_official 445:3312ed629f01 279 // Setup read
mbed_official 445:3312ed629f01 280 i2c_do_read(obj, &data, last);
mbed_official 445:3312ed629f01 281
mbed_official 445:3312ed629f01 282 // set tx mode
mbed_official 445:3312ed629f01 283 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 445:3312ed629f01 284 return obj->i2c->D;
mbed_official 445:3312ed629f01 285 }
mbed_official 445:3312ed629f01 286
mbed_official 445:3312ed629f01 287 int i2c_byte_write(i2c_t *obj, int data) {
mbed_official 445:3312ed629f01 288 // set tx mode
mbed_official 445:3312ed629f01 289 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 445:3312ed629f01 290
mbed_official 445:3312ed629f01 291 return !i2c_do_write(obj, (data & 0xFF));
mbed_official 445:3312ed629f01 292 }
mbed_official 445:3312ed629f01 293
mbed_official 445:3312ed629f01 294
mbed_official 445:3312ed629f01 295 #if DEVICE_I2CSLAVE
mbed_official 445:3312ed629f01 296 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
mbed_official 445:3312ed629f01 297 if (enable_slave) {
mbed_official 445:3312ed629f01 298 // set slave mode
mbed_official 445:3312ed629f01 299 obj->i2c->C1 &= ~I2C_C1_MST_MASK;
mbed_official 445:3312ed629f01 300 obj->i2c->C1 |= I2C_C1_IICIE_MASK;
mbed_official 445:3312ed629f01 301 } else {
mbed_official 445:3312ed629f01 302 // set master mode
mbed_official 445:3312ed629f01 303 obj->i2c->C1 |= I2C_C1_MST_MASK;
mbed_official 445:3312ed629f01 304 }
mbed_official 445:3312ed629f01 305 }
mbed_official 445:3312ed629f01 306
mbed_official 445:3312ed629f01 307 int i2c_slave_receive(i2c_t *obj) {
mbed_official 445:3312ed629f01 308 switch(obj->i2c->S) {
mbed_official 445:3312ed629f01 309 // read addressed
mbed_official 445:3312ed629f01 310 case 0xE6:
mbed_official 445:3312ed629f01 311 return 1;
mbed_official 445:3312ed629f01 312 // write addressed
mbed_official 445:3312ed629f01 313 case 0xE2:
mbed_official 445:3312ed629f01 314 return 3;
mbed_official 445:3312ed629f01 315 default:
mbed_official 445:3312ed629f01 316 return 0;
mbed_official 445:3312ed629f01 317 }
mbed_official 445:3312ed629f01 318 }
mbed_official 445:3312ed629f01 319
mbed_official 445:3312ed629f01 320 int i2c_slave_read(i2c_t *obj, char *data, int length) {
mbed_official 445:3312ed629f01 321 uint8_t dummy_read;
mbed_official 445:3312ed629f01 322 uint8_t * ptr;
mbed_official 445:3312ed629f01 323 int count;
mbed_official 445:3312ed629f01 324
mbed_official 445:3312ed629f01 325 // set rx mode
mbed_official 445:3312ed629f01 326 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 445:3312ed629f01 327
mbed_official 445:3312ed629f01 328 // first dummy read
mbed_official 445:3312ed629f01 329 dummy_read = obj->i2c->D;
mbed_official 445:3312ed629f01 330 if (i2c_wait_end_rx_transfer(obj))
mbed_official 445:3312ed629f01 331 return 0;
mbed_official 445:3312ed629f01 332
mbed_official 445:3312ed629f01 333 // read address
mbed_official 445:3312ed629f01 334 dummy_read = obj->i2c->D;
mbed_official 445:3312ed629f01 335 if (i2c_wait_end_rx_transfer(obj))
mbed_official 445:3312ed629f01 336 return 0;
mbed_official 445:3312ed629f01 337
mbed_official 445:3312ed629f01 338 // read (length - 1) bytes
mbed_official 445:3312ed629f01 339 for (count = 0; count < (length - 1); count++) {
mbed_official 445:3312ed629f01 340 data[count] = obj->i2c->D;
mbed_official 445:3312ed629f01 341 if (i2c_wait_end_rx_transfer(obj))
mbed_official 445:3312ed629f01 342 return count;
mbed_official 445:3312ed629f01 343 }
mbed_official 445:3312ed629f01 344
mbed_official 445:3312ed629f01 345 // read last byte
mbed_official 445:3312ed629f01 346 ptr = (length == 0) ? &dummy_read : (uint8_t *)&data[count];
mbed_official 445:3312ed629f01 347 *ptr = obj->i2c->D;
mbed_official 445:3312ed629f01 348
mbed_official 445:3312ed629f01 349 return (length) ? (count + 1) : 0;
mbed_official 445:3312ed629f01 350 }
mbed_official 445:3312ed629f01 351
mbed_official 445:3312ed629f01 352 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
mbed_official 445:3312ed629f01 353 int i, count = 0;
mbed_official 445:3312ed629f01 354
mbed_official 445:3312ed629f01 355 // set tx mode
mbed_official 445:3312ed629f01 356 obj->i2c->C1 |= I2C_C1_TX_MASK;
mbed_official 445:3312ed629f01 357
mbed_official 445:3312ed629f01 358 for (i = 0; i < length; i++) {
mbed_official 445:3312ed629f01 359 if (i2c_do_write(obj, data[count++]) == 2)
mbed_official 445:3312ed629f01 360 return i;
mbed_official 445:3312ed629f01 361 }
mbed_official 445:3312ed629f01 362
mbed_official 445:3312ed629f01 363 // set rx mode
mbed_official 445:3312ed629f01 364 obj->i2c->C1 &= ~I2C_C1_TX_MASK;
mbed_official 445:3312ed629f01 365
mbed_official 445:3312ed629f01 366 // dummy rx transfer needed
mbed_official 445:3312ed629f01 367 // otherwise the master cannot generate a stop bit
mbed_official 445:3312ed629f01 368 obj->i2c->D;
mbed_official 445:3312ed629f01 369 if (i2c_wait_end_rx_transfer(obj) == 2)
mbed_official 445:3312ed629f01 370 return count;
mbed_official 445:3312ed629f01 371
mbed_official 445:3312ed629f01 372 return count;
mbed_official 445:3312ed629f01 373 }
mbed_official 445:3312ed629f01 374
mbed_official 445:3312ed629f01 375 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
mbed_official 445:3312ed629f01 376 obj->i2c->A1 = address & 0xfe;
mbed_official 445:3312ed629f01 377 }
mbed_official 445:3312ed629f01 378 #endif