Initial commit
mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_qspi.c@0:bb348c97df44, 2020-09-16 (annotated)
- Committer:
- lypinator
- Date:
- Wed Sep 16 01:11:49 2020 +0000
- Revision:
- 0:bb348c97df44
Added PWM
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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lypinator | 0:bb348c97df44 | 1 | /** |
lypinator | 0:bb348c97df44 | 2 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 3 | * @file stm32f4xx_hal_qspi.c |
lypinator | 0:bb348c97df44 | 4 | * @author MCD Application Team |
lypinator | 0:bb348c97df44 | 5 | * @brief QSPI HAL module driver. |
lypinator | 0:bb348c97df44 | 6 | * This file provides firmware functions to manage the following |
lypinator | 0:bb348c97df44 | 7 | * functionalities of the QuadSPI interface (QSPI). |
lypinator | 0:bb348c97df44 | 8 | * + Initialization and de-initialization functions |
lypinator | 0:bb348c97df44 | 9 | * + Indirect functional mode management |
lypinator | 0:bb348c97df44 | 10 | * + Memory-mapped functional mode management |
lypinator | 0:bb348c97df44 | 11 | * + Auto-polling functional mode management |
lypinator | 0:bb348c97df44 | 12 | * + Interrupts and flags management |
lypinator | 0:bb348c97df44 | 13 | * + DMA channel configuration for indirect functional mode |
lypinator | 0:bb348c97df44 | 14 | * + Errors management and abort functionality |
lypinator | 0:bb348c97df44 | 15 | * |
lypinator | 0:bb348c97df44 | 16 | * |
lypinator | 0:bb348c97df44 | 17 | @verbatim |
lypinator | 0:bb348c97df44 | 18 | =============================================================================== |
lypinator | 0:bb348c97df44 | 19 | ##### How to use this driver ##### |
lypinator | 0:bb348c97df44 | 20 | =============================================================================== |
lypinator | 0:bb348c97df44 | 21 | [..] |
lypinator | 0:bb348c97df44 | 22 | *** Initialization *** |
lypinator | 0:bb348c97df44 | 23 | ====================== |
lypinator | 0:bb348c97df44 | 24 | [..] |
lypinator | 0:bb348c97df44 | 25 | (#) As prerequisite, fill in the HAL_QSPI_MspInit() : |
lypinator | 0:bb348c97df44 | 26 | (++) Enable QuadSPI clock interface with __HAL_RCC_QSPI_CLK_ENABLE(). |
lypinator | 0:bb348c97df44 | 27 | (++) Reset QuadSPI IP with __HAL_RCC_QSPI_FORCE_RESET() and __HAL_RCC_QSPI_RELEASE_RESET(). |
lypinator | 0:bb348c97df44 | 28 | (++) Enable the clocks for the QuadSPI GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE(). |
lypinator | 0:bb348c97df44 | 29 | (++) Configure these QuadSPI pins in alternate mode using HAL_GPIO_Init(). |
lypinator | 0:bb348c97df44 | 30 | (++) If interrupt mode is used, enable and configure QuadSPI global |
lypinator | 0:bb348c97df44 | 31 | interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ(). |
lypinator | 0:bb348c97df44 | 32 | (++) If DMA mode is used, enable the clocks for the QuadSPI DMA channel |
lypinator | 0:bb348c97df44 | 33 | with __HAL_RCC_DMAx_CLK_ENABLE(), configure DMA with HAL_DMA_Init(), |
lypinator | 0:bb348c97df44 | 34 | link it with QuadSPI handle using __HAL_LINKDMA(), enable and configure |
lypinator | 0:bb348c97df44 | 35 | DMA channel global interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ(). |
lypinator | 0:bb348c97df44 | 36 | (#) Configure the flash size, the clock prescaler, the fifo threshold, the |
lypinator | 0:bb348c97df44 | 37 | clock mode, the sample shifting and the CS high time using the HAL_QSPI_Init() function. |
lypinator | 0:bb348c97df44 | 38 | |
lypinator | 0:bb348c97df44 | 39 | *** Indirect functional mode *** |
lypinator | 0:bb348c97df44 | 40 | ================================ |
lypinator | 0:bb348c97df44 | 41 | [..] |
lypinator | 0:bb348c97df44 | 42 | (#) Configure the command sequence using the HAL_QSPI_Command() or HAL_QSPI_Command_IT() |
lypinator | 0:bb348c97df44 | 43 | functions : |
lypinator | 0:bb348c97df44 | 44 | (++) Instruction phase : the mode used and if present the instruction opcode. |
lypinator | 0:bb348c97df44 | 45 | (++) Address phase : the mode used and if present the size and the address value. |
lypinator | 0:bb348c97df44 | 46 | (++) Alternate-bytes phase : the mode used and if present the size and the alternate |
lypinator | 0:bb348c97df44 | 47 | bytes values. |
lypinator | 0:bb348c97df44 | 48 | (++) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase). |
lypinator | 0:bb348c97df44 | 49 | (++) Data phase : the mode used and if present the number of bytes. |
lypinator | 0:bb348c97df44 | 50 | (++) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay |
lypinator | 0:bb348c97df44 | 51 | if activated. |
lypinator | 0:bb348c97df44 | 52 | (++) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode. |
lypinator | 0:bb348c97df44 | 53 | (#) If no data is required for the command, it is sent directly to the memory : |
lypinator | 0:bb348c97df44 | 54 | (++) In polling mode, the output of the function is done when the transfer is complete. |
lypinator | 0:bb348c97df44 | 55 | (++) In interrupt mode, HAL_QSPI_CmdCpltCallback() will be called when the transfer is complete. |
lypinator | 0:bb348c97df44 | 56 | (#) For the indirect write mode, use HAL_QSPI_Transmit(), HAL_QSPI_Transmit_DMA() or |
lypinator | 0:bb348c97df44 | 57 | HAL_QSPI_Transmit_IT() after the command configuration : |
lypinator | 0:bb348c97df44 | 58 | (++) In polling mode, the output of the function is done when the transfer is complete. |
lypinator | 0:bb348c97df44 | 59 | (++) In interrupt mode, HAL_QSPI_FifoThresholdCallback() will be called when the fifo threshold |
lypinator | 0:bb348c97df44 | 60 | is reached and HAL_QSPI_TxCpltCallback() will be called when the transfer is complete. |
lypinator | 0:bb348c97df44 | 61 | (++) In DMA mode, HAL_QSPI_TxHalfCpltCallback() will be called at the half transfer and |
lypinator | 0:bb348c97df44 | 62 | HAL_QSPI_TxCpltCallback() will be called when the transfer is complete. |
lypinator | 0:bb348c97df44 | 63 | (#) For the indirect read mode, use HAL_QSPI_Receive(), HAL_QSPI_Receive_DMA() or |
lypinator | 0:bb348c97df44 | 64 | HAL_QSPI_Receive_IT() after the command configuration : |
lypinator | 0:bb348c97df44 | 65 | (++) In polling mode, the output of the function is done when the transfer is complete. |
lypinator | 0:bb348c97df44 | 66 | (++) In interrupt mode, HAL_QSPI_FifoThresholdCallback() will be called when the fifo threshold |
lypinator | 0:bb348c97df44 | 67 | is reached and HAL_QSPI_RxCpltCallback() will be called when the transfer is complete. |
lypinator | 0:bb348c97df44 | 68 | (++) In DMA mode, HAL_QSPI_RxHalfCpltCallback() will be called at the half transfer and |
lypinator | 0:bb348c97df44 | 69 | HAL_QSPI_RxCpltCallback() will be called when the transfer is complete. |
lypinator | 0:bb348c97df44 | 70 | |
lypinator | 0:bb348c97df44 | 71 | *** Auto-polling functional mode *** |
lypinator | 0:bb348c97df44 | 72 | ==================================== |
lypinator | 0:bb348c97df44 | 73 | [..] |
lypinator | 0:bb348c97df44 | 74 | (#) Configure the command sequence and the auto-polling functional mode using the |
lypinator | 0:bb348c97df44 | 75 | HAL_QSPI_AutoPolling() or HAL_QSPI_AutoPolling_IT() functions : |
lypinator | 0:bb348c97df44 | 76 | (++) Instruction phase : the mode used and if present the instruction opcode. |
lypinator | 0:bb348c97df44 | 77 | (++) Address phase : the mode used and if present the size and the address value. |
lypinator | 0:bb348c97df44 | 78 | (++) Alternate-bytes phase : the mode used and if present the size and the alternate |
lypinator | 0:bb348c97df44 | 79 | bytes values. |
lypinator | 0:bb348c97df44 | 80 | (++) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase). |
lypinator | 0:bb348c97df44 | 81 | (++) Data phase : the mode used. |
lypinator | 0:bb348c97df44 | 82 | (++) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay |
lypinator | 0:bb348c97df44 | 83 | if activated. |
lypinator | 0:bb348c97df44 | 84 | (++) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode. |
lypinator | 0:bb348c97df44 | 85 | (++) The size of the status bytes, the match value, the mask used, the match mode (OR/AND), |
lypinator | 0:bb348c97df44 | 86 | the polling interval and the automatic stop activation. |
lypinator | 0:bb348c97df44 | 87 | (#) After the configuration : |
lypinator | 0:bb348c97df44 | 88 | (++) In polling mode, the output of the function is done when the status match is reached. The |
lypinator | 0:bb348c97df44 | 89 | automatic stop is activated to avoid an infinite loop. |
lypinator | 0:bb348c97df44 | 90 | (++) In interrupt mode, HAL_QSPI_StatusMatchCallback() will be called each time the status match is reached. |
lypinator | 0:bb348c97df44 | 91 | |
lypinator | 0:bb348c97df44 | 92 | *** Memory-mapped functional mode *** |
lypinator | 0:bb348c97df44 | 93 | ===================================== |
lypinator | 0:bb348c97df44 | 94 | [..] |
lypinator | 0:bb348c97df44 | 95 | (#) Configure the command sequence and the memory-mapped functional mode using the |
lypinator | 0:bb348c97df44 | 96 | HAL_QSPI_MemoryMapped() functions : |
lypinator | 0:bb348c97df44 | 97 | (++) Instruction phase : the mode used and if present the instruction opcode. |
lypinator | 0:bb348c97df44 | 98 | (++) Address phase : the mode used and the size. |
lypinator | 0:bb348c97df44 | 99 | (++) Alternate-bytes phase : the mode used and if present the size and the alternate |
lypinator | 0:bb348c97df44 | 100 | bytes values. |
lypinator | 0:bb348c97df44 | 101 | (++) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase). |
lypinator | 0:bb348c97df44 | 102 | (++) Data phase : the mode used. |
lypinator | 0:bb348c97df44 | 103 | (++) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay |
lypinator | 0:bb348c97df44 | 104 | if activated. |
lypinator | 0:bb348c97df44 | 105 | (++) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode. |
lypinator | 0:bb348c97df44 | 106 | (++) The timeout activation and the timeout period. |
lypinator | 0:bb348c97df44 | 107 | (#) After the configuration, the QuadSPI will be used as soon as an access on the AHB is done on |
lypinator | 0:bb348c97df44 | 108 | the address range. HAL_QSPI_TimeOutCallback() will be called when the timeout expires. |
lypinator | 0:bb348c97df44 | 109 | |
lypinator | 0:bb348c97df44 | 110 | *** Errors management and abort functionality *** |
lypinator | 0:bb348c97df44 | 111 | ================================================== |
lypinator | 0:bb348c97df44 | 112 | [..] |
lypinator | 0:bb348c97df44 | 113 | (#) HAL_QSPI_GetError() function gives the error raised during the last operation. |
lypinator | 0:bb348c97df44 | 114 | (#) HAL_QSPI_Abort() and HAL_QSPI_AbortIT() functions aborts any on-going operation and |
lypinator | 0:bb348c97df44 | 115 | flushes the fifo : |
lypinator | 0:bb348c97df44 | 116 | (++) In polling mode, the output of the function is done when the transfer |
lypinator | 0:bb348c97df44 | 117 | complete bit is set and the busy bit cleared. |
lypinator | 0:bb348c97df44 | 118 | (++) In interrupt mode, HAL_QSPI_AbortCpltCallback() will be called when |
lypinator | 0:bb348c97df44 | 119 | the transfer complete bi is set. |
lypinator | 0:bb348c97df44 | 120 | |
lypinator | 0:bb348c97df44 | 121 | *** Control functions *** |
lypinator | 0:bb348c97df44 | 122 | ========================= |
lypinator | 0:bb348c97df44 | 123 | [..] |
lypinator | 0:bb348c97df44 | 124 | (#) HAL_QSPI_GetState() function gives the current state of the HAL QuadSPI driver. |
lypinator | 0:bb348c97df44 | 125 | (#) HAL_QSPI_SetTimeout() function configures the timeout value used in the driver. |
lypinator | 0:bb348c97df44 | 126 | (#) HAL_QSPI_SetFifoThreshold() function configures the threshold on the Fifo of the QSPI IP. |
lypinator | 0:bb348c97df44 | 127 | (#) HAL_QSPI_GetFifoThreshold() function gives the current of the Fifo's threshold |
lypinator | 0:bb348c97df44 | 128 | |
lypinator | 0:bb348c97df44 | 129 | *** Workarounds linked to Silicon Limitation *** |
lypinator | 0:bb348c97df44 | 130 | ==================================================== |
lypinator | 0:bb348c97df44 | 131 | [..] |
lypinator | 0:bb348c97df44 | 132 | (#) Workarounds Implemented inside HAL Driver |
lypinator | 0:bb348c97df44 | 133 | (++) Extra data written in the FIFO at the end of a read transfer |
lypinator | 0:bb348c97df44 | 134 | |
lypinator | 0:bb348c97df44 | 135 | @endverbatim |
lypinator | 0:bb348c97df44 | 136 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 137 | * @attention |
lypinator | 0:bb348c97df44 | 138 | * |
lypinator | 0:bb348c97df44 | 139 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
lypinator | 0:bb348c97df44 | 140 | * |
lypinator | 0:bb348c97df44 | 141 | * Redistribution and use in source and binary forms, with or without modification, |
lypinator | 0:bb348c97df44 | 142 | * are permitted provided that the following conditions are met: |
lypinator | 0:bb348c97df44 | 143 | * 1. Redistributions of source code must retain the above copyright notice, |
lypinator | 0:bb348c97df44 | 144 | * this list of conditions and the following disclaimer. |
lypinator | 0:bb348c97df44 | 145 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
lypinator | 0:bb348c97df44 | 146 | * this list of conditions and the following disclaimer in the documentation |
lypinator | 0:bb348c97df44 | 147 | * and/or other materials provided with the distribution. |
lypinator | 0:bb348c97df44 | 148 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
lypinator | 0:bb348c97df44 | 149 | * may be used to endorse or promote products derived from this software |
lypinator | 0:bb348c97df44 | 150 | * without specific prior written permission. |
lypinator | 0:bb348c97df44 | 151 | * |
lypinator | 0:bb348c97df44 | 152 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
lypinator | 0:bb348c97df44 | 153 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
lypinator | 0:bb348c97df44 | 154 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
lypinator | 0:bb348c97df44 | 155 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
lypinator | 0:bb348c97df44 | 156 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
lypinator | 0:bb348c97df44 | 157 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
lypinator | 0:bb348c97df44 | 158 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
lypinator | 0:bb348c97df44 | 159 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
lypinator | 0:bb348c97df44 | 160 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
lypinator | 0:bb348c97df44 | 161 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
lypinator | 0:bb348c97df44 | 162 | * |
lypinator | 0:bb348c97df44 | 163 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 164 | */ |
lypinator | 0:bb348c97df44 | 165 | |
lypinator | 0:bb348c97df44 | 166 | /* Includes ------------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 167 | #include "stm32f4xx_hal.h" |
lypinator | 0:bb348c97df44 | 168 | |
lypinator | 0:bb348c97df44 | 169 | /** @addtogroup STM32F4xx_HAL_Driver |
lypinator | 0:bb348c97df44 | 170 | * @{ |
lypinator | 0:bb348c97df44 | 171 | */ |
lypinator | 0:bb348c97df44 | 172 | |
lypinator | 0:bb348c97df44 | 173 | /** @defgroup QSPI QSPI |
lypinator | 0:bb348c97df44 | 174 | * @brief QSPI HAL module driver |
lypinator | 0:bb348c97df44 | 175 | * @{ |
lypinator | 0:bb348c97df44 | 176 | */ |
lypinator | 0:bb348c97df44 | 177 | #ifdef HAL_QSPI_MODULE_ENABLED |
lypinator | 0:bb348c97df44 | 178 | |
lypinator | 0:bb348c97df44 | 179 | #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ |
lypinator | 0:bb348c97df44 | 180 | defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx) |
lypinator | 0:bb348c97df44 | 181 | |
lypinator | 0:bb348c97df44 | 182 | /* Private typedef -----------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 183 | /* Private define ------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 184 | /** @addtogroup QSPI_Private_Constants |
lypinator | 0:bb348c97df44 | 185 | * @{ |
lypinator | 0:bb348c97df44 | 186 | */ |
lypinator | 0:bb348c97df44 | 187 | #define QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE 0x00000000U /*!<Indirect write mode*/ |
lypinator | 0:bb348c97df44 | 188 | #define QSPI_FUNCTIONAL_MODE_INDIRECT_READ ((uint32_t)QUADSPI_CCR_FMODE_0) /*!<Indirect read mode*/ |
lypinator | 0:bb348c97df44 | 189 | #define QSPI_FUNCTIONAL_MODE_AUTO_POLLING ((uint32_t)QUADSPI_CCR_FMODE_1) /*!<Automatic polling mode*/ |
lypinator | 0:bb348c97df44 | 190 | #define QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED ((uint32_t)QUADSPI_CCR_FMODE) /*!<Memory-mapped mode*/ |
lypinator | 0:bb348c97df44 | 191 | /** |
lypinator | 0:bb348c97df44 | 192 | * @} |
lypinator | 0:bb348c97df44 | 193 | */ |
lypinator | 0:bb348c97df44 | 194 | |
lypinator | 0:bb348c97df44 | 195 | /* Private macro -------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 196 | /** @addtogroup QSPI_Private_Macros QSPI Private Macros |
lypinator | 0:bb348c97df44 | 197 | * @{ |
lypinator | 0:bb348c97df44 | 198 | */ |
lypinator | 0:bb348c97df44 | 199 | #define IS_QSPI_FUNCTIONAL_MODE(MODE) (((MODE) == QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE) || \ |
lypinator | 0:bb348c97df44 | 200 | ((MODE) == QSPI_FUNCTIONAL_MODE_INDIRECT_READ) || \ |
lypinator | 0:bb348c97df44 | 201 | ((MODE) == QSPI_FUNCTIONAL_MODE_AUTO_POLLING) || \ |
lypinator | 0:bb348c97df44 | 202 | ((MODE) == QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)) |
lypinator | 0:bb348c97df44 | 203 | /** |
lypinator | 0:bb348c97df44 | 204 | * @} |
lypinator | 0:bb348c97df44 | 205 | */ |
lypinator | 0:bb348c97df44 | 206 | |
lypinator | 0:bb348c97df44 | 207 | /* Private variables ---------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 208 | /* Private function prototypes -----------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 209 | /** @addtogroup QSPI_Private_Functions QSPI Private Functions |
lypinator | 0:bb348c97df44 | 210 | * @{ |
lypinator | 0:bb348c97df44 | 211 | */ |
lypinator | 0:bb348c97df44 | 212 | static void QSPI_DMARxCplt(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 213 | static void QSPI_DMATxCplt(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 214 | static void QSPI_DMARxHalfCplt(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 215 | static void QSPI_DMATxHalfCplt(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 216 | static void QSPI_DMAError(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 217 | static void QSPI_DMAAbortCplt(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 218 | static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, FlagStatus State, uint32_t tickstart, uint32_t Timeout); |
lypinator | 0:bb348c97df44 | 219 | static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode); |
lypinator | 0:bb348c97df44 | 220 | /** |
lypinator | 0:bb348c97df44 | 221 | * @} |
lypinator | 0:bb348c97df44 | 222 | */ |
lypinator | 0:bb348c97df44 | 223 | |
lypinator | 0:bb348c97df44 | 224 | /* Exported functions ---------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 225 | |
lypinator | 0:bb348c97df44 | 226 | /** @defgroup QSPI_Exported_Functions QSPI Exported Functions |
lypinator | 0:bb348c97df44 | 227 | * @{ |
lypinator | 0:bb348c97df44 | 228 | */ |
lypinator | 0:bb348c97df44 | 229 | |
lypinator | 0:bb348c97df44 | 230 | /** @defgroup QSPI_Exported_Functions_Group1 Initialization/de-initialization functions |
lypinator | 0:bb348c97df44 | 231 | * @brief Initialization and Configuration functions |
lypinator | 0:bb348c97df44 | 232 | * |
lypinator | 0:bb348c97df44 | 233 | @verbatim |
lypinator | 0:bb348c97df44 | 234 | =============================================================================== |
lypinator | 0:bb348c97df44 | 235 | ##### Initialization and Configuration functions ##### |
lypinator | 0:bb348c97df44 | 236 | =============================================================================== |
lypinator | 0:bb348c97df44 | 237 | [..] |
lypinator | 0:bb348c97df44 | 238 | This subsection provides a set of functions allowing to : |
lypinator | 0:bb348c97df44 | 239 | (+) Initialize the QuadSPI. |
lypinator | 0:bb348c97df44 | 240 | (+) De-initialize the QuadSPI. |
lypinator | 0:bb348c97df44 | 241 | |
lypinator | 0:bb348c97df44 | 242 | @endverbatim |
lypinator | 0:bb348c97df44 | 243 | * @{ |
lypinator | 0:bb348c97df44 | 244 | */ |
lypinator | 0:bb348c97df44 | 245 | |
lypinator | 0:bb348c97df44 | 246 | /** |
lypinator | 0:bb348c97df44 | 247 | * @brief Initializes the QSPI mode according to the specified parameters |
lypinator | 0:bb348c97df44 | 248 | * in the QSPI_InitTypeDef and creates the associated handle. |
lypinator | 0:bb348c97df44 | 249 | * @param hqspi qspi handle |
lypinator | 0:bb348c97df44 | 250 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 251 | */ |
lypinator | 0:bb348c97df44 | 252 | HAL_StatusTypeDef HAL_QSPI_Init(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 253 | { |
lypinator | 0:bb348c97df44 | 254 | HAL_StatusTypeDef status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 255 | uint32_t tickstart = HAL_GetTick(); |
lypinator | 0:bb348c97df44 | 256 | |
lypinator | 0:bb348c97df44 | 257 | /* Check the QSPI handle allocation */ |
lypinator | 0:bb348c97df44 | 258 | if(hqspi == NULL) |
lypinator | 0:bb348c97df44 | 259 | { |
lypinator | 0:bb348c97df44 | 260 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 261 | } |
lypinator | 0:bb348c97df44 | 262 | |
lypinator | 0:bb348c97df44 | 263 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 264 | assert_param(IS_QSPI_ALL_INSTANCE(hqspi->Instance)); |
lypinator | 0:bb348c97df44 | 265 | assert_param(IS_QSPI_CLOCK_PRESCALER(hqspi->Init.ClockPrescaler)); |
lypinator | 0:bb348c97df44 | 266 | assert_param(IS_QSPI_FIFO_THRESHOLD(hqspi->Init.FifoThreshold)); |
lypinator | 0:bb348c97df44 | 267 | assert_param(IS_QSPI_SSHIFT(hqspi->Init.SampleShifting)); |
lypinator | 0:bb348c97df44 | 268 | assert_param(IS_QSPI_FLASH_SIZE(hqspi->Init.FlashSize)); |
lypinator | 0:bb348c97df44 | 269 | assert_param(IS_QSPI_CS_HIGH_TIME(hqspi->Init.ChipSelectHighTime)); |
lypinator | 0:bb348c97df44 | 270 | assert_param(IS_QSPI_CLOCK_MODE(hqspi->Init.ClockMode)); |
lypinator | 0:bb348c97df44 | 271 | assert_param(IS_QSPI_DUAL_FLASH_MODE(hqspi->Init.DualFlash)); |
lypinator | 0:bb348c97df44 | 272 | |
lypinator | 0:bb348c97df44 | 273 | if (hqspi->Init.DualFlash != QSPI_DUALFLASH_ENABLE ) |
lypinator | 0:bb348c97df44 | 274 | { |
lypinator | 0:bb348c97df44 | 275 | assert_param(IS_QSPI_FLASH_ID(hqspi->Init.FlashID)); |
lypinator | 0:bb348c97df44 | 276 | } |
lypinator | 0:bb348c97df44 | 277 | |
lypinator | 0:bb348c97df44 | 278 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 279 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 280 | |
lypinator | 0:bb348c97df44 | 281 | if(hqspi->State == HAL_QSPI_STATE_RESET) |
lypinator | 0:bb348c97df44 | 282 | { |
lypinator | 0:bb348c97df44 | 283 | /* Allocate lock resource and initialize it */ |
lypinator | 0:bb348c97df44 | 284 | hqspi->Lock = HAL_UNLOCKED; |
lypinator | 0:bb348c97df44 | 285 | |
lypinator | 0:bb348c97df44 | 286 | /* Init the low level hardware : GPIO, CLOCK */ |
lypinator | 0:bb348c97df44 | 287 | HAL_QSPI_MspInit(hqspi); |
lypinator | 0:bb348c97df44 | 288 | |
lypinator | 0:bb348c97df44 | 289 | /* Configure the default timeout for the QSPI memory access */ |
lypinator | 0:bb348c97df44 | 290 | HAL_QSPI_SetTimeout(hqspi, HAL_QPSI_TIMEOUT_DEFAULT_VALUE); |
lypinator | 0:bb348c97df44 | 291 | } |
lypinator | 0:bb348c97df44 | 292 | |
lypinator | 0:bb348c97df44 | 293 | /* Configure QSPI FIFO Threshold */ |
lypinator | 0:bb348c97df44 | 294 | MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES, ((hqspi->Init.FifoThreshold - 1U) << 8U)); |
lypinator | 0:bb348c97df44 | 295 | |
lypinator | 0:bb348c97df44 | 296 | /* Wait till BUSY flag reset */ |
lypinator | 0:bb348c97df44 | 297 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout); |
lypinator | 0:bb348c97df44 | 298 | |
lypinator | 0:bb348c97df44 | 299 | if(status == HAL_OK) |
lypinator | 0:bb348c97df44 | 300 | { |
lypinator | 0:bb348c97df44 | 301 | |
lypinator | 0:bb348c97df44 | 302 | /* Configure QSPI Clock Prescaler and Sample Shift */ |
lypinator | 0:bb348c97df44 | 303 | MODIFY_REG(hqspi->Instance->CR,(QUADSPI_CR_PRESCALER | QUADSPI_CR_SSHIFT | QUADSPI_CR_FSEL | QUADSPI_CR_DFM), ((hqspi->Init.ClockPrescaler << 24U)| hqspi->Init.SampleShifting | hqspi->Init.FlashID| hqspi->Init.DualFlash )); |
lypinator | 0:bb348c97df44 | 304 | |
lypinator | 0:bb348c97df44 | 305 | /* Configure QSPI Flash Size, CS High Time and Clock Mode */ |
lypinator | 0:bb348c97df44 | 306 | MODIFY_REG(hqspi->Instance->DCR, (QUADSPI_DCR_FSIZE | QUADSPI_DCR_CSHT | QUADSPI_DCR_CKMODE), |
lypinator | 0:bb348c97df44 | 307 | ((hqspi->Init.FlashSize << 16U) | hqspi->Init.ChipSelectHighTime | hqspi->Init.ClockMode)); |
lypinator | 0:bb348c97df44 | 308 | |
lypinator | 0:bb348c97df44 | 309 | /* Enable the QSPI peripheral */ |
lypinator | 0:bb348c97df44 | 310 | __HAL_QSPI_ENABLE(hqspi); |
lypinator | 0:bb348c97df44 | 311 | |
lypinator | 0:bb348c97df44 | 312 | /* Set QSPI error code to none */ |
lypinator | 0:bb348c97df44 | 313 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 314 | |
lypinator | 0:bb348c97df44 | 315 | /* Initialize the QSPI state */ |
lypinator | 0:bb348c97df44 | 316 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 317 | } |
lypinator | 0:bb348c97df44 | 318 | |
lypinator | 0:bb348c97df44 | 319 | /* Release Lock */ |
lypinator | 0:bb348c97df44 | 320 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 321 | |
lypinator | 0:bb348c97df44 | 322 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 323 | return status; |
lypinator | 0:bb348c97df44 | 324 | } |
lypinator | 0:bb348c97df44 | 325 | |
lypinator | 0:bb348c97df44 | 326 | /** |
lypinator | 0:bb348c97df44 | 327 | * @brief DeInitializes the QSPI peripheral |
lypinator | 0:bb348c97df44 | 328 | * @param hqspi qspi handle |
lypinator | 0:bb348c97df44 | 329 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 330 | */ |
lypinator | 0:bb348c97df44 | 331 | HAL_StatusTypeDef HAL_QSPI_DeInit(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 332 | { |
lypinator | 0:bb348c97df44 | 333 | /* Check the QSPI handle allocation */ |
lypinator | 0:bb348c97df44 | 334 | if(hqspi == NULL) |
lypinator | 0:bb348c97df44 | 335 | { |
lypinator | 0:bb348c97df44 | 336 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 337 | } |
lypinator | 0:bb348c97df44 | 338 | |
lypinator | 0:bb348c97df44 | 339 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 340 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 341 | |
lypinator | 0:bb348c97df44 | 342 | /* Disable the QSPI Peripheral Clock */ |
lypinator | 0:bb348c97df44 | 343 | __HAL_QSPI_DISABLE(hqspi); |
lypinator | 0:bb348c97df44 | 344 | |
lypinator | 0:bb348c97df44 | 345 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ |
lypinator | 0:bb348c97df44 | 346 | HAL_QSPI_MspDeInit(hqspi); |
lypinator | 0:bb348c97df44 | 347 | |
lypinator | 0:bb348c97df44 | 348 | /* Set QSPI error code to none */ |
lypinator | 0:bb348c97df44 | 349 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 350 | |
lypinator | 0:bb348c97df44 | 351 | /* Initialize the QSPI state */ |
lypinator | 0:bb348c97df44 | 352 | hqspi->State = HAL_QSPI_STATE_RESET; |
lypinator | 0:bb348c97df44 | 353 | |
lypinator | 0:bb348c97df44 | 354 | /* Release Lock */ |
lypinator | 0:bb348c97df44 | 355 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 356 | |
lypinator | 0:bb348c97df44 | 357 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 358 | } |
lypinator | 0:bb348c97df44 | 359 | |
lypinator | 0:bb348c97df44 | 360 | /** |
lypinator | 0:bb348c97df44 | 361 | * @brief QSPI MSP Init |
lypinator | 0:bb348c97df44 | 362 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 363 | * @retval None |
lypinator | 0:bb348c97df44 | 364 | */ |
lypinator | 0:bb348c97df44 | 365 | __weak void HAL_QSPI_MspInit(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 366 | { |
lypinator | 0:bb348c97df44 | 367 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 368 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 369 | |
lypinator | 0:bb348c97df44 | 370 | /* NOTE : This function should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 371 | the HAL_QSPI_MspInit can be implemented in the user file |
lypinator | 0:bb348c97df44 | 372 | */ |
lypinator | 0:bb348c97df44 | 373 | } |
lypinator | 0:bb348c97df44 | 374 | |
lypinator | 0:bb348c97df44 | 375 | /** |
lypinator | 0:bb348c97df44 | 376 | * @brief QSPI MSP DeInit |
lypinator | 0:bb348c97df44 | 377 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 378 | * @retval None |
lypinator | 0:bb348c97df44 | 379 | */ |
lypinator | 0:bb348c97df44 | 380 | __weak void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 381 | { |
lypinator | 0:bb348c97df44 | 382 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 383 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 384 | |
lypinator | 0:bb348c97df44 | 385 | /* NOTE : This function should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 386 | the HAL_QSPI_MspDeInit can be implemented in the user file |
lypinator | 0:bb348c97df44 | 387 | */ |
lypinator | 0:bb348c97df44 | 388 | } |
lypinator | 0:bb348c97df44 | 389 | |
lypinator | 0:bb348c97df44 | 390 | /** |
lypinator | 0:bb348c97df44 | 391 | * @} |
lypinator | 0:bb348c97df44 | 392 | */ |
lypinator | 0:bb348c97df44 | 393 | |
lypinator | 0:bb348c97df44 | 394 | /** @defgroup QSPI_Exported_Functions_Group2 IO operation functions |
lypinator | 0:bb348c97df44 | 395 | * @brief QSPI Transmit/Receive functions |
lypinator | 0:bb348c97df44 | 396 | * |
lypinator | 0:bb348c97df44 | 397 | @verbatim |
lypinator | 0:bb348c97df44 | 398 | =============================================================================== |
lypinator | 0:bb348c97df44 | 399 | ##### IO operation functions ##### |
lypinator | 0:bb348c97df44 | 400 | =============================================================================== |
lypinator | 0:bb348c97df44 | 401 | [..] |
lypinator | 0:bb348c97df44 | 402 | This subsection provides a set of functions allowing to : |
lypinator | 0:bb348c97df44 | 403 | (+) Handle the interrupts. |
lypinator | 0:bb348c97df44 | 404 | (+) Handle the command sequence. |
lypinator | 0:bb348c97df44 | 405 | (+) Transmit data in blocking, interrupt or DMA mode. |
lypinator | 0:bb348c97df44 | 406 | (+) Receive data in blocking, interrupt or DMA mode. |
lypinator | 0:bb348c97df44 | 407 | (+) Manage the auto-polling functional mode. |
lypinator | 0:bb348c97df44 | 408 | (+) Manage the memory-mapped functional mode. |
lypinator | 0:bb348c97df44 | 409 | |
lypinator | 0:bb348c97df44 | 410 | @endverbatim |
lypinator | 0:bb348c97df44 | 411 | * @{ |
lypinator | 0:bb348c97df44 | 412 | */ |
lypinator | 0:bb348c97df44 | 413 | |
lypinator | 0:bb348c97df44 | 414 | /** |
lypinator | 0:bb348c97df44 | 415 | * @brief This function handles QSPI interrupt request. |
lypinator | 0:bb348c97df44 | 416 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 417 | * @retval None. |
lypinator | 0:bb348c97df44 | 418 | */ |
lypinator | 0:bb348c97df44 | 419 | void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 420 | { |
lypinator | 0:bb348c97df44 | 421 | __IO uint32_t *data_reg; |
lypinator | 0:bb348c97df44 | 422 | uint32_t flag = READ_REG(hqspi->Instance->SR); |
lypinator | 0:bb348c97df44 | 423 | uint32_t itsource = READ_REG(hqspi->Instance->CR); |
lypinator | 0:bb348c97df44 | 424 | |
lypinator | 0:bb348c97df44 | 425 | /* QSPI Fifo Threshold interrupt occurred ----------------------------------*/ |
lypinator | 0:bb348c97df44 | 426 | if(((flag & QSPI_FLAG_FT)!= RESET) && ((itsource & QSPI_IT_FT)!= RESET)) |
lypinator | 0:bb348c97df44 | 427 | { |
lypinator | 0:bb348c97df44 | 428 | data_reg = &hqspi->Instance->DR; |
lypinator | 0:bb348c97df44 | 429 | |
lypinator | 0:bb348c97df44 | 430 | if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) |
lypinator | 0:bb348c97df44 | 431 | { |
lypinator | 0:bb348c97df44 | 432 | /* Transmission process */ |
lypinator | 0:bb348c97df44 | 433 | while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != 0U) |
lypinator | 0:bb348c97df44 | 434 | { |
lypinator | 0:bb348c97df44 | 435 | if (hqspi->TxXferCount > 0U) |
lypinator | 0:bb348c97df44 | 436 | { |
lypinator | 0:bb348c97df44 | 437 | /* Fill the FIFO until it is full */ |
lypinator | 0:bb348c97df44 | 438 | *(__IO uint8_t *)data_reg = *hqspi->pTxBuffPtr++; |
lypinator | 0:bb348c97df44 | 439 | hqspi->TxXferCount--; |
lypinator | 0:bb348c97df44 | 440 | } |
lypinator | 0:bb348c97df44 | 441 | else |
lypinator | 0:bb348c97df44 | 442 | { |
lypinator | 0:bb348c97df44 | 443 | /* No more data available for the transfer */ |
lypinator | 0:bb348c97df44 | 444 | /* Disable the QSPI FIFO Threshold Interrupt */ |
lypinator | 0:bb348c97df44 | 445 | __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_FT); |
lypinator | 0:bb348c97df44 | 446 | break; |
lypinator | 0:bb348c97df44 | 447 | } |
lypinator | 0:bb348c97df44 | 448 | } |
lypinator | 0:bb348c97df44 | 449 | } |
lypinator | 0:bb348c97df44 | 450 | else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX) |
lypinator | 0:bb348c97df44 | 451 | { |
lypinator | 0:bb348c97df44 | 452 | /* Receiving Process */ |
lypinator | 0:bb348c97df44 | 453 | while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != 0U) |
lypinator | 0:bb348c97df44 | 454 | { |
lypinator | 0:bb348c97df44 | 455 | if (hqspi->RxXferCount > 0U) |
lypinator | 0:bb348c97df44 | 456 | { |
lypinator | 0:bb348c97df44 | 457 | /* Read the FIFO until it is empty */ |
lypinator | 0:bb348c97df44 | 458 | *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg; |
lypinator | 0:bb348c97df44 | 459 | hqspi->RxXferCount--; |
lypinator | 0:bb348c97df44 | 460 | } |
lypinator | 0:bb348c97df44 | 461 | else |
lypinator | 0:bb348c97df44 | 462 | { |
lypinator | 0:bb348c97df44 | 463 | /* All data have been received for the transfer */ |
lypinator | 0:bb348c97df44 | 464 | /* Disable the QSPI FIFO Threshold Interrupt */ |
lypinator | 0:bb348c97df44 | 465 | __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_FT); |
lypinator | 0:bb348c97df44 | 466 | break; |
lypinator | 0:bb348c97df44 | 467 | } |
lypinator | 0:bb348c97df44 | 468 | } |
lypinator | 0:bb348c97df44 | 469 | } |
lypinator | 0:bb348c97df44 | 470 | |
lypinator | 0:bb348c97df44 | 471 | /* FIFO Threshold callback */ |
lypinator | 0:bb348c97df44 | 472 | HAL_QSPI_FifoThresholdCallback(hqspi); |
lypinator | 0:bb348c97df44 | 473 | } |
lypinator | 0:bb348c97df44 | 474 | |
lypinator | 0:bb348c97df44 | 475 | /* QSPI Transfer Complete interrupt occurred -------------------------------*/ |
lypinator | 0:bb348c97df44 | 476 | else if(((flag & QSPI_FLAG_TC)!= RESET) && ((itsource & QSPI_IT_TC)!= RESET)) |
lypinator | 0:bb348c97df44 | 477 | { |
lypinator | 0:bb348c97df44 | 478 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 479 | WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TC); |
lypinator | 0:bb348c97df44 | 480 | |
lypinator | 0:bb348c97df44 | 481 | /* Disable the QSPI FIFO Threshold, Transfer Error and Transfer complete Interrupts */ |
lypinator | 0:bb348c97df44 | 482 | __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT); |
lypinator | 0:bb348c97df44 | 483 | |
lypinator | 0:bb348c97df44 | 484 | /* Transfer complete callback */ |
lypinator | 0:bb348c97df44 | 485 | if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) |
lypinator | 0:bb348c97df44 | 486 | { |
lypinator | 0:bb348c97df44 | 487 | if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN)!= RESET) |
lypinator | 0:bb348c97df44 | 488 | { |
lypinator | 0:bb348c97df44 | 489 | /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ |
lypinator | 0:bb348c97df44 | 490 | CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
lypinator | 0:bb348c97df44 | 491 | |
lypinator | 0:bb348c97df44 | 492 | /* Disable the DMA channel */ |
lypinator | 0:bb348c97df44 | 493 | __HAL_DMA_DISABLE(hqspi->hdma); |
lypinator | 0:bb348c97df44 | 494 | } |
lypinator | 0:bb348c97df44 | 495 | |
lypinator | 0:bb348c97df44 | 496 | /* Clear Busy bit */ |
lypinator | 0:bb348c97df44 | 497 | HAL_QSPI_Abort_IT(hqspi); |
lypinator | 0:bb348c97df44 | 498 | |
lypinator | 0:bb348c97df44 | 499 | /* Change state of QSPI */ |
lypinator | 0:bb348c97df44 | 500 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 501 | |
lypinator | 0:bb348c97df44 | 502 | /* TX Complete callback */ |
lypinator | 0:bb348c97df44 | 503 | HAL_QSPI_TxCpltCallback(hqspi); |
lypinator | 0:bb348c97df44 | 504 | } |
lypinator | 0:bb348c97df44 | 505 | else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX) |
lypinator | 0:bb348c97df44 | 506 | { |
lypinator | 0:bb348c97df44 | 507 | if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN)!= RESET) |
lypinator | 0:bb348c97df44 | 508 | { |
lypinator | 0:bb348c97df44 | 509 | /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ |
lypinator | 0:bb348c97df44 | 510 | CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
lypinator | 0:bb348c97df44 | 511 | |
lypinator | 0:bb348c97df44 | 512 | /* Disable the DMA channel */ |
lypinator | 0:bb348c97df44 | 513 | __HAL_DMA_DISABLE(hqspi->hdma); |
lypinator | 0:bb348c97df44 | 514 | } |
lypinator | 0:bb348c97df44 | 515 | else |
lypinator | 0:bb348c97df44 | 516 | { |
lypinator | 0:bb348c97df44 | 517 | data_reg = &hqspi->Instance->DR; |
lypinator | 0:bb348c97df44 | 518 | while(READ_BIT(hqspi->Instance->SR, QUADSPI_SR_FLEVEL) != 0U) |
lypinator | 0:bb348c97df44 | 519 | { |
lypinator | 0:bb348c97df44 | 520 | if (hqspi->RxXferCount > 0U) |
lypinator | 0:bb348c97df44 | 521 | { |
lypinator | 0:bb348c97df44 | 522 | /* Read the last data received in the FIFO until it is empty */ |
lypinator | 0:bb348c97df44 | 523 | *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg; |
lypinator | 0:bb348c97df44 | 524 | hqspi->RxXferCount--; |
lypinator | 0:bb348c97df44 | 525 | } |
lypinator | 0:bb348c97df44 | 526 | else |
lypinator | 0:bb348c97df44 | 527 | { |
lypinator | 0:bb348c97df44 | 528 | /* All data have been received for the transfer */ |
lypinator | 0:bb348c97df44 | 529 | break; |
lypinator | 0:bb348c97df44 | 530 | } |
lypinator | 0:bb348c97df44 | 531 | } |
lypinator | 0:bb348c97df44 | 532 | } |
lypinator | 0:bb348c97df44 | 533 | /* Workaround - Extra data written in the FIFO at the end of a read transfer */ |
lypinator | 0:bb348c97df44 | 534 | HAL_QSPI_Abort_IT(hqspi); |
lypinator | 0:bb348c97df44 | 535 | |
lypinator | 0:bb348c97df44 | 536 | /* Change state of QSPI */ |
lypinator | 0:bb348c97df44 | 537 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 538 | |
lypinator | 0:bb348c97df44 | 539 | /* RX Complete callback */ |
lypinator | 0:bb348c97df44 | 540 | HAL_QSPI_RxCpltCallback(hqspi); |
lypinator | 0:bb348c97df44 | 541 | } |
lypinator | 0:bb348c97df44 | 542 | else if(hqspi->State == HAL_QSPI_STATE_BUSY) |
lypinator | 0:bb348c97df44 | 543 | { |
lypinator | 0:bb348c97df44 | 544 | /* Change state of QSPI */ |
lypinator | 0:bb348c97df44 | 545 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 546 | |
lypinator | 0:bb348c97df44 | 547 | /* Command Complete callback */ |
lypinator | 0:bb348c97df44 | 548 | HAL_QSPI_CmdCpltCallback(hqspi); |
lypinator | 0:bb348c97df44 | 549 | } |
lypinator | 0:bb348c97df44 | 550 | else if(hqspi->State == HAL_QSPI_STATE_ABORT) |
lypinator | 0:bb348c97df44 | 551 | { |
lypinator | 0:bb348c97df44 | 552 | /* Change state of QSPI */ |
lypinator | 0:bb348c97df44 | 553 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 554 | |
lypinator | 0:bb348c97df44 | 555 | if (hqspi->ErrorCode == HAL_QSPI_ERROR_NONE) |
lypinator | 0:bb348c97df44 | 556 | { |
lypinator | 0:bb348c97df44 | 557 | /* Abort called by the user */ |
lypinator | 0:bb348c97df44 | 558 | |
lypinator | 0:bb348c97df44 | 559 | /* Abort Complete callback */ |
lypinator | 0:bb348c97df44 | 560 | HAL_QSPI_AbortCpltCallback(hqspi); |
lypinator | 0:bb348c97df44 | 561 | } |
lypinator | 0:bb348c97df44 | 562 | else |
lypinator | 0:bb348c97df44 | 563 | { |
lypinator | 0:bb348c97df44 | 564 | /* Abort due to an error (eg : DMA error) */ |
lypinator | 0:bb348c97df44 | 565 | |
lypinator | 0:bb348c97df44 | 566 | /* Error callback */ |
lypinator | 0:bb348c97df44 | 567 | HAL_QSPI_ErrorCallback(hqspi); |
lypinator | 0:bb348c97df44 | 568 | } |
lypinator | 0:bb348c97df44 | 569 | } |
lypinator | 0:bb348c97df44 | 570 | } |
lypinator | 0:bb348c97df44 | 571 | |
lypinator | 0:bb348c97df44 | 572 | /* QSPI Status Match interrupt occurred ------------------------------------*/ |
lypinator | 0:bb348c97df44 | 573 | else if(((flag & QSPI_FLAG_SM)!= RESET) && ((itsource & QSPI_IT_SM)!= RESET)) |
lypinator | 0:bb348c97df44 | 574 | { |
lypinator | 0:bb348c97df44 | 575 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 576 | WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_SM); |
lypinator | 0:bb348c97df44 | 577 | |
lypinator | 0:bb348c97df44 | 578 | /* Check if the automatic poll mode stop is activated */ |
lypinator | 0:bb348c97df44 | 579 | if(READ_BIT(hqspi->Instance->CR, QUADSPI_CR_APMS) != 0U) |
lypinator | 0:bb348c97df44 | 580 | { |
lypinator | 0:bb348c97df44 | 581 | /* Disable the QSPI Transfer Error and Status Match Interrupts */ |
lypinator | 0:bb348c97df44 | 582 | __HAL_QSPI_DISABLE_IT(hqspi, (QSPI_IT_SM | QSPI_IT_TE)); |
lypinator | 0:bb348c97df44 | 583 | |
lypinator | 0:bb348c97df44 | 584 | /* Change state of QSPI */ |
lypinator | 0:bb348c97df44 | 585 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 586 | } |
lypinator | 0:bb348c97df44 | 587 | |
lypinator | 0:bb348c97df44 | 588 | /* Status match callback */ |
lypinator | 0:bb348c97df44 | 589 | HAL_QSPI_StatusMatchCallback(hqspi); |
lypinator | 0:bb348c97df44 | 590 | } |
lypinator | 0:bb348c97df44 | 591 | |
lypinator | 0:bb348c97df44 | 592 | /* QSPI Transfer Error interrupt occurred ----------------------------------*/ |
lypinator | 0:bb348c97df44 | 593 | else if(((flag & QSPI_FLAG_TE)!= RESET) && ((itsource & QSPI_IT_TE)!= RESET)) |
lypinator | 0:bb348c97df44 | 594 | { |
lypinator | 0:bb348c97df44 | 595 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 596 | WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TE); |
lypinator | 0:bb348c97df44 | 597 | |
lypinator | 0:bb348c97df44 | 598 | /* Disable all the QSPI Interrupts */ |
lypinator | 0:bb348c97df44 | 599 | __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT); |
lypinator | 0:bb348c97df44 | 600 | |
lypinator | 0:bb348c97df44 | 601 | /* Set error code */ |
lypinator | 0:bb348c97df44 | 602 | hqspi->ErrorCode |= HAL_QSPI_ERROR_TRANSFER; |
lypinator | 0:bb348c97df44 | 603 | |
lypinator | 0:bb348c97df44 | 604 | if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN)!= RESET) |
lypinator | 0:bb348c97df44 | 605 | { |
lypinator | 0:bb348c97df44 | 606 | /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ |
lypinator | 0:bb348c97df44 | 607 | CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
lypinator | 0:bb348c97df44 | 608 | |
lypinator | 0:bb348c97df44 | 609 | /* Disable the DMA channel */ |
lypinator | 0:bb348c97df44 | 610 | hqspi->hdma->XferAbortCallback = QSPI_DMAAbortCplt; |
lypinator | 0:bb348c97df44 | 611 | HAL_DMA_Abort_IT(hqspi->hdma); |
lypinator | 0:bb348c97df44 | 612 | } |
lypinator | 0:bb348c97df44 | 613 | else |
lypinator | 0:bb348c97df44 | 614 | { |
lypinator | 0:bb348c97df44 | 615 | /* Change state of QSPI */ |
lypinator | 0:bb348c97df44 | 616 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 617 | |
lypinator | 0:bb348c97df44 | 618 | /* Error callback */ |
lypinator | 0:bb348c97df44 | 619 | HAL_QSPI_ErrorCallback(hqspi); |
lypinator | 0:bb348c97df44 | 620 | } |
lypinator | 0:bb348c97df44 | 621 | } |
lypinator | 0:bb348c97df44 | 622 | |
lypinator | 0:bb348c97df44 | 623 | /* QSPI Timeout interrupt occurred -----------------------------------------*/ |
lypinator | 0:bb348c97df44 | 624 | else if(((flag & QSPI_FLAG_TO)!= RESET) && ((itsource & QSPI_IT_TO)!= RESET)) |
lypinator | 0:bb348c97df44 | 625 | { |
lypinator | 0:bb348c97df44 | 626 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 627 | WRITE_REG(hqspi->Instance->FCR, QSPI_FLAG_TO); |
lypinator | 0:bb348c97df44 | 628 | |
lypinator | 0:bb348c97df44 | 629 | /* Time out callback */ |
lypinator | 0:bb348c97df44 | 630 | HAL_QSPI_TimeOutCallback(hqspi); |
lypinator | 0:bb348c97df44 | 631 | } |
lypinator | 0:bb348c97df44 | 632 | } |
lypinator | 0:bb348c97df44 | 633 | |
lypinator | 0:bb348c97df44 | 634 | /** |
lypinator | 0:bb348c97df44 | 635 | * @brief Sets the command configuration. |
lypinator | 0:bb348c97df44 | 636 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 637 | * @param cmd structure that contains the command configuration information |
lypinator | 0:bb348c97df44 | 638 | * @param Timeout Time out duration |
lypinator | 0:bb348c97df44 | 639 | * @note This function is used only in Indirect Read or Write Modes |
lypinator | 0:bb348c97df44 | 640 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 641 | */ |
lypinator | 0:bb348c97df44 | 642 | HAL_StatusTypeDef HAL_QSPI_Command(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout) |
lypinator | 0:bb348c97df44 | 643 | { |
lypinator | 0:bb348c97df44 | 644 | HAL_StatusTypeDef status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 645 | uint32_t tickstart = HAL_GetTick(); |
lypinator | 0:bb348c97df44 | 646 | |
lypinator | 0:bb348c97df44 | 647 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 648 | assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); |
lypinator | 0:bb348c97df44 | 649 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
lypinator | 0:bb348c97df44 | 650 | { |
lypinator | 0:bb348c97df44 | 651 | assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); |
lypinator | 0:bb348c97df44 | 652 | } |
lypinator | 0:bb348c97df44 | 653 | |
lypinator | 0:bb348c97df44 | 654 | assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); |
lypinator | 0:bb348c97df44 | 655 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
lypinator | 0:bb348c97df44 | 656 | { |
lypinator | 0:bb348c97df44 | 657 | assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize)); |
lypinator | 0:bb348c97df44 | 658 | } |
lypinator | 0:bb348c97df44 | 659 | |
lypinator | 0:bb348c97df44 | 660 | assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode)); |
lypinator | 0:bb348c97df44 | 661 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
lypinator | 0:bb348c97df44 | 662 | { |
lypinator | 0:bb348c97df44 | 663 | assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize)); |
lypinator | 0:bb348c97df44 | 664 | } |
lypinator | 0:bb348c97df44 | 665 | |
lypinator | 0:bb348c97df44 | 666 | assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles)); |
lypinator | 0:bb348c97df44 | 667 | assert_param(IS_QSPI_DATA_MODE(cmd->DataMode)); |
lypinator | 0:bb348c97df44 | 668 | |
lypinator | 0:bb348c97df44 | 669 | assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode)); |
lypinator | 0:bb348c97df44 | 670 | assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle)); |
lypinator | 0:bb348c97df44 | 671 | assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode)); |
lypinator | 0:bb348c97df44 | 672 | |
lypinator | 0:bb348c97df44 | 673 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 674 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 675 | |
lypinator | 0:bb348c97df44 | 676 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 677 | { |
lypinator | 0:bb348c97df44 | 678 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 679 | |
lypinator | 0:bb348c97df44 | 680 | /* Update QSPI state */ |
lypinator | 0:bb348c97df44 | 681 | hqspi->State = HAL_QSPI_STATE_BUSY; |
lypinator | 0:bb348c97df44 | 682 | |
lypinator | 0:bb348c97df44 | 683 | /* Wait till BUSY flag reset */ |
lypinator | 0:bb348c97df44 | 684 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, Timeout); |
lypinator | 0:bb348c97df44 | 685 | |
lypinator | 0:bb348c97df44 | 686 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 687 | { |
lypinator | 0:bb348c97df44 | 688 | /* Call the configuration function */ |
lypinator | 0:bb348c97df44 | 689 | QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); |
lypinator | 0:bb348c97df44 | 690 | |
lypinator | 0:bb348c97df44 | 691 | if (cmd->DataMode == QSPI_DATA_NONE) |
lypinator | 0:bb348c97df44 | 692 | { |
lypinator | 0:bb348c97df44 | 693 | /* When there is no data phase, the transfer start as soon as the configuration is done |
lypinator | 0:bb348c97df44 | 694 | so wait until TC flag is set to go back in idle state */ |
lypinator | 0:bb348c97df44 | 695 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, Timeout); |
lypinator | 0:bb348c97df44 | 696 | |
lypinator | 0:bb348c97df44 | 697 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 698 | { |
lypinator | 0:bb348c97df44 | 699 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
lypinator | 0:bb348c97df44 | 700 | |
lypinator | 0:bb348c97df44 | 701 | /* Update QSPI state */ |
lypinator | 0:bb348c97df44 | 702 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 703 | } |
lypinator | 0:bb348c97df44 | 704 | |
lypinator | 0:bb348c97df44 | 705 | } |
lypinator | 0:bb348c97df44 | 706 | else |
lypinator | 0:bb348c97df44 | 707 | { |
lypinator | 0:bb348c97df44 | 708 | /* Update QSPI state */ |
lypinator | 0:bb348c97df44 | 709 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 710 | } |
lypinator | 0:bb348c97df44 | 711 | } |
lypinator | 0:bb348c97df44 | 712 | } |
lypinator | 0:bb348c97df44 | 713 | else |
lypinator | 0:bb348c97df44 | 714 | { |
lypinator | 0:bb348c97df44 | 715 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 716 | } |
lypinator | 0:bb348c97df44 | 717 | |
lypinator | 0:bb348c97df44 | 718 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 719 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 720 | |
lypinator | 0:bb348c97df44 | 721 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 722 | return status; |
lypinator | 0:bb348c97df44 | 723 | } |
lypinator | 0:bb348c97df44 | 724 | |
lypinator | 0:bb348c97df44 | 725 | /** |
lypinator | 0:bb348c97df44 | 726 | * @brief Sets the command configuration in interrupt mode. |
lypinator | 0:bb348c97df44 | 727 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 728 | * @param cmd structure that contains the command configuration information |
lypinator | 0:bb348c97df44 | 729 | * @note This function is used only in Indirect Read or Write Modes |
lypinator | 0:bb348c97df44 | 730 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 731 | */ |
lypinator | 0:bb348c97df44 | 732 | HAL_StatusTypeDef HAL_QSPI_Command_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd) |
lypinator | 0:bb348c97df44 | 733 | { |
lypinator | 0:bb348c97df44 | 734 | __IO uint32_t count = 0U; |
lypinator | 0:bb348c97df44 | 735 | HAL_StatusTypeDef status = HAL_OK; |
lypinator | 0:bb348c97df44 | 736 | |
lypinator | 0:bb348c97df44 | 737 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 738 | assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); |
lypinator | 0:bb348c97df44 | 739 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
lypinator | 0:bb348c97df44 | 740 | { |
lypinator | 0:bb348c97df44 | 741 | assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); |
lypinator | 0:bb348c97df44 | 742 | } |
lypinator | 0:bb348c97df44 | 743 | |
lypinator | 0:bb348c97df44 | 744 | assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); |
lypinator | 0:bb348c97df44 | 745 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
lypinator | 0:bb348c97df44 | 746 | { |
lypinator | 0:bb348c97df44 | 747 | assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize)); |
lypinator | 0:bb348c97df44 | 748 | } |
lypinator | 0:bb348c97df44 | 749 | |
lypinator | 0:bb348c97df44 | 750 | assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode)); |
lypinator | 0:bb348c97df44 | 751 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
lypinator | 0:bb348c97df44 | 752 | { |
lypinator | 0:bb348c97df44 | 753 | assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize)); |
lypinator | 0:bb348c97df44 | 754 | } |
lypinator | 0:bb348c97df44 | 755 | |
lypinator | 0:bb348c97df44 | 756 | assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles)); |
lypinator | 0:bb348c97df44 | 757 | assert_param(IS_QSPI_DATA_MODE(cmd->DataMode)); |
lypinator | 0:bb348c97df44 | 758 | |
lypinator | 0:bb348c97df44 | 759 | assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode)); |
lypinator | 0:bb348c97df44 | 760 | assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle)); |
lypinator | 0:bb348c97df44 | 761 | assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode)); |
lypinator | 0:bb348c97df44 | 762 | |
lypinator | 0:bb348c97df44 | 763 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 764 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 765 | |
lypinator | 0:bb348c97df44 | 766 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 767 | { |
lypinator | 0:bb348c97df44 | 768 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 769 | |
lypinator | 0:bb348c97df44 | 770 | /* Update QSPI state */ |
lypinator | 0:bb348c97df44 | 771 | hqspi->State = HAL_QSPI_STATE_BUSY; |
lypinator | 0:bb348c97df44 | 772 | |
lypinator | 0:bb348c97df44 | 773 | /* Wait till BUSY flag reset */ |
lypinator | 0:bb348c97df44 | 774 | count = (hqspi->Timeout) * (SystemCoreClock / 16U / 1000U); |
lypinator | 0:bb348c97df44 | 775 | do |
lypinator | 0:bb348c97df44 | 776 | { |
lypinator | 0:bb348c97df44 | 777 | if (count-- == 0U) |
lypinator | 0:bb348c97df44 | 778 | { |
lypinator | 0:bb348c97df44 | 779 | hqspi->State = HAL_QSPI_STATE_ERROR; |
lypinator | 0:bb348c97df44 | 780 | hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT; |
lypinator | 0:bb348c97df44 | 781 | status = HAL_TIMEOUT; |
lypinator | 0:bb348c97df44 | 782 | } |
lypinator | 0:bb348c97df44 | 783 | } |
lypinator | 0:bb348c97df44 | 784 | while ((__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_BUSY)) != RESET); |
lypinator | 0:bb348c97df44 | 785 | |
lypinator | 0:bb348c97df44 | 786 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 787 | { |
lypinator | 0:bb348c97df44 | 788 | if (cmd->DataMode == QSPI_DATA_NONE) |
lypinator | 0:bb348c97df44 | 789 | { |
lypinator | 0:bb348c97df44 | 790 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 791 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC); |
lypinator | 0:bb348c97df44 | 792 | } |
lypinator | 0:bb348c97df44 | 793 | |
lypinator | 0:bb348c97df44 | 794 | /* Call the configuration function */ |
lypinator | 0:bb348c97df44 | 795 | QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); |
lypinator | 0:bb348c97df44 | 796 | |
lypinator | 0:bb348c97df44 | 797 | if (cmd->DataMode == QSPI_DATA_NONE) |
lypinator | 0:bb348c97df44 | 798 | { |
lypinator | 0:bb348c97df44 | 799 | /* When there is no data phase, the transfer start as soon as the configuration is done |
lypinator | 0:bb348c97df44 | 800 | so activate TC and TE interrupts */ |
lypinator | 0:bb348c97df44 | 801 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 802 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 803 | |
lypinator | 0:bb348c97df44 | 804 | /* Enable the QSPI Transfer Error Interrupt */ |
lypinator | 0:bb348c97df44 | 805 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_TC); |
lypinator | 0:bb348c97df44 | 806 | } |
lypinator | 0:bb348c97df44 | 807 | else |
lypinator | 0:bb348c97df44 | 808 | { |
lypinator | 0:bb348c97df44 | 809 | /* Update QSPI state */ |
lypinator | 0:bb348c97df44 | 810 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 811 | |
lypinator | 0:bb348c97df44 | 812 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 813 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 814 | } |
lypinator | 0:bb348c97df44 | 815 | } |
lypinator | 0:bb348c97df44 | 816 | else |
lypinator | 0:bb348c97df44 | 817 | { |
lypinator | 0:bb348c97df44 | 818 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 819 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 820 | } |
lypinator | 0:bb348c97df44 | 821 | } |
lypinator | 0:bb348c97df44 | 822 | else |
lypinator | 0:bb348c97df44 | 823 | { |
lypinator | 0:bb348c97df44 | 824 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 825 | |
lypinator | 0:bb348c97df44 | 826 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 827 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 828 | } |
lypinator | 0:bb348c97df44 | 829 | |
lypinator | 0:bb348c97df44 | 830 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 831 | return status; |
lypinator | 0:bb348c97df44 | 832 | } |
lypinator | 0:bb348c97df44 | 833 | |
lypinator | 0:bb348c97df44 | 834 | /** |
lypinator | 0:bb348c97df44 | 835 | * @brief Transmit an amount of data in blocking mode. |
lypinator | 0:bb348c97df44 | 836 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 837 | * @param pData pointer to data buffer |
lypinator | 0:bb348c97df44 | 838 | * @param Timeout Time out duration |
lypinator | 0:bb348c97df44 | 839 | * @note This function is used only in Indirect Write Mode |
lypinator | 0:bb348c97df44 | 840 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 841 | */ |
lypinator | 0:bb348c97df44 | 842 | HAL_StatusTypeDef HAL_QSPI_Transmit(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout) |
lypinator | 0:bb348c97df44 | 843 | { |
lypinator | 0:bb348c97df44 | 844 | HAL_StatusTypeDef status = HAL_OK; |
lypinator | 0:bb348c97df44 | 845 | uint32_t tickstart = HAL_GetTick(); |
lypinator | 0:bb348c97df44 | 846 | __IO uint32_t *data_reg = &hqspi->Instance->DR; |
lypinator | 0:bb348c97df44 | 847 | |
lypinator | 0:bb348c97df44 | 848 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 849 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 850 | |
lypinator | 0:bb348c97df44 | 851 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 852 | { |
lypinator | 0:bb348c97df44 | 853 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 854 | |
lypinator | 0:bb348c97df44 | 855 | if(pData != NULL ) |
lypinator | 0:bb348c97df44 | 856 | { |
lypinator | 0:bb348c97df44 | 857 | /* Update state */ |
lypinator | 0:bb348c97df44 | 858 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX; |
lypinator | 0:bb348c97df44 | 859 | |
lypinator | 0:bb348c97df44 | 860 | /* Configure counters and size of the handle */ |
lypinator | 0:bb348c97df44 | 861 | hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1U; |
lypinator | 0:bb348c97df44 | 862 | hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1U; |
lypinator | 0:bb348c97df44 | 863 | hqspi->pTxBuffPtr = pData; |
lypinator | 0:bb348c97df44 | 864 | |
lypinator | 0:bb348c97df44 | 865 | /* Configure QSPI: CCR register with functional as indirect write */ |
lypinator | 0:bb348c97df44 | 866 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); |
lypinator | 0:bb348c97df44 | 867 | |
lypinator | 0:bb348c97df44 | 868 | while(hqspi->TxXferCount > 0U) |
lypinator | 0:bb348c97df44 | 869 | { |
lypinator | 0:bb348c97df44 | 870 | /* Wait until FT flag is set to send data */ |
lypinator | 0:bb348c97df44 | 871 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_FT, SET, tickstart, Timeout); |
lypinator | 0:bb348c97df44 | 872 | |
lypinator | 0:bb348c97df44 | 873 | if (status != HAL_OK) |
lypinator | 0:bb348c97df44 | 874 | { |
lypinator | 0:bb348c97df44 | 875 | break; |
lypinator | 0:bb348c97df44 | 876 | } |
lypinator | 0:bb348c97df44 | 877 | |
lypinator | 0:bb348c97df44 | 878 | *(__IO uint8_t *)data_reg = *hqspi->pTxBuffPtr++; |
lypinator | 0:bb348c97df44 | 879 | hqspi->TxXferCount--; |
lypinator | 0:bb348c97df44 | 880 | } |
lypinator | 0:bb348c97df44 | 881 | |
lypinator | 0:bb348c97df44 | 882 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 883 | { |
lypinator | 0:bb348c97df44 | 884 | /* Wait until TC flag is set to go back in idle state */ |
lypinator | 0:bb348c97df44 | 885 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, Timeout); |
lypinator | 0:bb348c97df44 | 886 | |
lypinator | 0:bb348c97df44 | 887 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 888 | { |
lypinator | 0:bb348c97df44 | 889 | /* Clear Transfer Complete bit */ |
lypinator | 0:bb348c97df44 | 890 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
lypinator | 0:bb348c97df44 | 891 | |
lypinator | 0:bb348c97df44 | 892 | /* Clear Busy bit */ |
lypinator | 0:bb348c97df44 | 893 | status = HAL_QSPI_Abort(hqspi); |
lypinator | 0:bb348c97df44 | 894 | } |
lypinator | 0:bb348c97df44 | 895 | } |
lypinator | 0:bb348c97df44 | 896 | |
lypinator | 0:bb348c97df44 | 897 | /* Update QSPI state */ |
lypinator | 0:bb348c97df44 | 898 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 899 | } |
lypinator | 0:bb348c97df44 | 900 | else |
lypinator | 0:bb348c97df44 | 901 | { |
lypinator | 0:bb348c97df44 | 902 | hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; |
lypinator | 0:bb348c97df44 | 903 | status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 904 | } |
lypinator | 0:bb348c97df44 | 905 | } |
lypinator | 0:bb348c97df44 | 906 | else |
lypinator | 0:bb348c97df44 | 907 | { |
lypinator | 0:bb348c97df44 | 908 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 909 | } |
lypinator | 0:bb348c97df44 | 910 | |
lypinator | 0:bb348c97df44 | 911 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 912 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 913 | |
lypinator | 0:bb348c97df44 | 914 | return status; |
lypinator | 0:bb348c97df44 | 915 | } |
lypinator | 0:bb348c97df44 | 916 | |
lypinator | 0:bb348c97df44 | 917 | |
lypinator | 0:bb348c97df44 | 918 | /** |
lypinator | 0:bb348c97df44 | 919 | * @brief Receive an amount of data in blocking mode |
lypinator | 0:bb348c97df44 | 920 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 921 | * @param pData pointer to data buffer |
lypinator | 0:bb348c97df44 | 922 | * @param Timeout Time out duration |
lypinator | 0:bb348c97df44 | 923 | * @note This function is used only in Indirect Read Mode |
lypinator | 0:bb348c97df44 | 924 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 925 | */ |
lypinator | 0:bb348c97df44 | 926 | HAL_StatusTypeDef HAL_QSPI_Receive(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout) |
lypinator | 0:bb348c97df44 | 927 | { |
lypinator | 0:bb348c97df44 | 928 | HAL_StatusTypeDef status = HAL_OK; |
lypinator | 0:bb348c97df44 | 929 | uint32_t tickstart = HAL_GetTick(); |
lypinator | 0:bb348c97df44 | 930 | uint32_t addr_reg = READ_REG(hqspi->Instance->AR); |
lypinator | 0:bb348c97df44 | 931 | __IO uint32_t *data_reg = &hqspi->Instance->DR; |
lypinator | 0:bb348c97df44 | 932 | |
lypinator | 0:bb348c97df44 | 933 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 934 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 935 | |
lypinator | 0:bb348c97df44 | 936 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 937 | { |
lypinator | 0:bb348c97df44 | 938 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 939 | if(pData != NULL ) |
lypinator | 0:bb348c97df44 | 940 | { |
lypinator | 0:bb348c97df44 | 941 | /* Update state */ |
lypinator | 0:bb348c97df44 | 942 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX; |
lypinator | 0:bb348c97df44 | 943 | |
lypinator | 0:bb348c97df44 | 944 | /* Configure counters and size of the handle */ |
lypinator | 0:bb348c97df44 | 945 | hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1U; |
lypinator | 0:bb348c97df44 | 946 | hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1U; |
lypinator | 0:bb348c97df44 | 947 | hqspi->pRxBuffPtr = pData; |
lypinator | 0:bb348c97df44 | 948 | |
lypinator | 0:bb348c97df44 | 949 | /* Configure QSPI: CCR register with functional as indirect read */ |
lypinator | 0:bb348c97df44 | 950 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); |
lypinator | 0:bb348c97df44 | 951 | |
lypinator | 0:bb348c97df44 | 952 | /* Start the transfer by re-writing the address in AR register */ |
lypinator | 0:bb348c97df44 | 953 | WRITE_REG(hqspi->Instance->AR, addr_reg); |
lypinator | 0:bb348c97df44 | 954 | |
lypinator | 0:bb348c97df44 | 955 | while(hqspi->RxXferCount > 0U) |
lypinator | 0:bb348c97df44 | 956 | { |
lypinator | 0:bb348c97df44 | 957 | /* Wait until FT or TC flag is set to read received data */ |
lypinator | 0:bb348c97df44 | 958 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, (QSPI_FLAG_FT | QSPI_FLAG_TC), SET, tickstart, Timeout); |
lypinator | 0:bb348c97df44 | 959 | |
lypinator | 0:bb348c97df44 | 960 | if (status != HAL_OK) |
lypinator | 0:bb348c97df44 | 961 | { |
lypinator | 0:bb348c97df44 | 962 | break; |
lypinator | 0:bb348c97df44 | 963 | } |
lypinator | 0:bb348c97df44 | 964 | |
lypinator | 0:bb348c97df44 | 965 | *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg; |
lypinator | 0:bb348c97df44 | 966 | hqspi->RxXferCount--; |
lypinator | 0:bb348c97df44 | 967 | } |
lypinator | 0:bb348c97df44 | 968 | |
lypinator | 0:bb348c97df44 | 969 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 970 | { |
lypinator | 0:bb348c97df44 | 971 | /* Wait until TC flag is set to go back in idle state */ |
lypinator | 0:bb348c97df44 | 972 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, Timeout); |
lypinator | 0:bb348c97df44 | 973 | |
lypinator | 0:bb348c97df44 | 974 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 975 | { |
lypinator | 0:bb348c97df44 | 976 | /* Clear Transfer Complete bit */ |
lypinator | 0:bb348c97df44 | 977 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
lypinator | 0:bb348c97df44 | 978 | |
lypinator | 0:bb348c97df44 | 979 | /* Workaround - Extra data written in the FIFO at the end of a read transfer */ |
lypinator | 0:bb348c97df44 | 980 | status = HAL_QSPI_Abort(hqspi); |
lypinator | 0:bb348c97df44 | 981 | } |
lypinator | 0:bb348c97df44 | 982 | } |
lypinator | 0:bb348c97df44 | 983 | |
lypinator | 0:bb348c97df44 | 984 | /* Update QSPI state */ |
lypinator | 0:bb348c97df44 | 985 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 986 | } |
lypinator | 0:bb348c97df44 | 987 | else |
lypinator | 0:bb348c97df44 | 988 | { |
lypinator | 0:bb348c97df44 | 989 | hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; |
lypinator | 0:bb348c97df44 | 990 | status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 991 | } |
lypinator | 0:bb348c97df44 | 992 | } |
lypinator | 0:bb348c97df44 | 993 | else |
lypinator | 0:bb348c97df44 | 994 | { |
lypinator | 0:bb348c97df44 | 995 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 996 | } |
lypinator | 0:bb348c97df44 | 997 | |
lypinator | 0:bb348c97df44 | 998 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 999 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1000 | |
lypinator | 0:bb348c97df44 | 1001 | return status; |
lypinator | 0:bb348c97df44 | 1002 | } |
lypinator | 0:bb348c97df44 | 1003 | |
lypinator | 0:bb348c97df44 | 1004 | /** |
lypinator | 0:bb348c97df44 | 1005 | * @brief Send an amount of data in interrupt mode |
lypinator | 0:bb348c97df44 | 1006 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1007 | * @param pData pointer to data buffer |
lypinator | 0:bb348c97df44 | 1008 | * @note This function is used only in Indirect Write Mode |
lypinator | 0:bb348c97df44 | 1009 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1010 | */ |
lypinator | 0:bb348c97df44 | 1011 | HAL_StatusTypeDef HAL_QSPI_Transmit_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
lypinator | 0:bb348c97df44 | 1012 | { |
lypinator | 0:bb348c97df44 | 1013 | HAL_StatusTypeDef status = HAL_OK; |
lypinator | 0:bb348c97df44 | 1014 | |
lypinator | 0:bb348c97df44 | 1015 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 1016 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1017 | |
lypinator | 0:bb348c97df44 | 1018 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 1019 | { |
lypinator | 0:bb348c97df44 | 1020 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 1021 | if(pData != NULL ) |
lypinator | 0:bb348c97df44 | 1022 | { |
lypinator | 0:bb348c97df44 | 1023 | /* Update state */ |
lypinator | 0:bb348c97df44 | 1024 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX; |
lypinator | 0:bb348c97df44 | 1025 | |
lypinator | 0:bb348c97df44 | 1026 | /* Configure counters and size of the handle */ |
lypinator | 0:bb348c97df44 | 1027 | hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1U; |
lypinator | 0:bb348c97df44 | 1028 | hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1U; |
lypinator | 0:bb348c97df44 | 1029 | hqspi->pTxBuffPtr = pData; |
lypinator | 0:bb348c97df44 | 1030 | |
lypinator | 0:bb348c97df44 | 1031 | /* Configure QSPI: CCR register with functional as indirect write */ |
lypinator | 0:bb348c97df44 | 1032 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); |
lypinator | 0:bb348c97df44 | 1033 | |
lypinator | 0:bb348c97df44 | 1034 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 1035 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC); |
lypinator | 0:bb348c97df44 | 1036 | |
lypinator | 0:bb348c97df44 | 1037 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1038 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1039 | |
lypinator | 0:bb348c97df44 | 1040 | /* Enable the QSPI transfer error, FIFO threshold and transfer complete Interrupts */ |
lypinator | 0:bb348c97df44 | 1041 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC); |
lypinator | 0:bb348c97df44 | 1042 | |
lypinator | 0:bb348c97df44 | 1043 | } |
lypinator | 0:bb348c97df44 | 1044 | else |
lypinator | 0:bb348c97df44 | 1045 | { |
lypinator | 0:bb348c97df44 | 1046 | hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; |
lypinator | 0:bb348c97df44 | 1047 | status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 1048 | |
lypinator | 0:bb348c97df44 | 1049 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1050 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1051 | } |
lypinator | 0:bb348c97df44 | 1052 | } |
lypinator | 0:bb348c97df44 | 1053 | else |
lypinator | 0:bb348c97df44 | 1054 | { |
lypinator | 0:bb348c97df44 | 1055 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 1056 | |
lypinator | 0:bb348c97df44 | 1057 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1058 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1059 | } |
lypinator | 0:bb348c97df44 | 1060 | |
lypinator | 0:bb348c97df44 | 1061 | return status; |
lypinator | 0:bb348c97df44 | 1062 | } |
lypinator | 0:bb348c97df44 | 1063 | |
lypinator | 0:bb348c97df44 | 1064 | /** |
lypinator | 0:bb348c97df44 | 1065 | * @brief Receive an amount of data in no-blocking mode with Interrupt |
lypinator | 0:bb348c97df44 | 1066 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1067 | * @param pData pointer to data buffer |
lypinator | 0:bb348c97df44 | 1068 | * @note This function is used only in Indirect Read Mode |
lypinator | 0:bb348c97df44 | 1069 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1070 | */ |
lypinator | 0:bb348c97df44 | 1071 | HAL_StatusTypeDef HAL_QSPI_Receive_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
lypinator | 0:bb348c97df44 | 1072 | { |
lypinator | 0:bb348c97df44 | 1073 | HAL_StatusTypeDef status = HAL_OK; |
lypinator | 0:bb348c97df44 | 1074 | uint32_t addr_reg = READ_REG(hqspi->Instance->AR); |
lypinator | 0:bb348c97df44 | 1075 | |
lypinator | 0:bb348c97df44 | 1076 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 1077 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1078 | |
lypinator | 0:bb348c97df44 | 1079 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 1080 | { |
lypinator | 0:bb348c97df44 | 1081 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 1082 | |
lypinator | 0:bb348c97df44 | 1083 | if(pData != NULL ) |
lypinator | 0:bb348c97df44 | 1084 | { |
lypinator | 0:bb348c97df44 | 1085 | /* Update state */ |
lypinator | 0:bb348c97df44 | 1086 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX; |
lypinator | 0:bb348c97df44 | 1087 | |
lypinator | 0:bb348c97df44 | 1088 | /* Configure counters and size of the handle */ |
lypinator | 0:bb348c97df44 | 1089 | hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1U; |
lypinator | 0:bb348c97df44 | 1090 | hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1U; |
lypinator | 0:bb348c97df44 | 1091 | hqspi->pRxBuffPtr = pData; |
lypinator | 0:bb348c97df44 | 1092 | |
lypinator | 0:bb348c97df44 | 1093 | /* Configure QSPI: CCR register with functional as indirect read */ |
lypinator | 0:bb348c97df44 | 1094 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); |
lypinator | 0:bb348c97df44 | 1095 | |
lypinator | 0:bb348c97df44 | 1096 | /* Start the transfer by re-writing the address in AR register */ |
lypinator | 0:bb348c97df44 | 1097 | WRITE_REG(hqspi->Instance->AR, addr_reg); |
lypinator | 0:bb348c97df44 | 1098 | |
lypinator | 0:bb348c97df44 | 1099 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 1100 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC); |
lypinator | 0:bb348c97df44 | 1101 | |
lypinator | 0:bb348c97df44 | 1102 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1103 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1104 | |
lypinator | 0:bb348c97df44 | 1105 | /* Enable the QSPI transfer error, FIFO threshold and transfer complete Interrupts */ |
lypinator | 0:bb348c97df44 | 1106 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC); |
lypinator | 0:bb348c97df44 | 1107 | } |
lypinator | 0:bb348c97df44 | 1108 | else |
lypinator | 0:bb348c97df44 | 1109 | { |
lypinator | 0:bb348c97df44 | 1110 | hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; |
lypinator | 0:bb348c97df44 | 1111 | status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 1112 | |
lypinator | 0:bb348c97df44 | 1113 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1114 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1115 | } |
lypinator | 0:bb348c97df44 | 1116 | } |
lypinator | 0:bb348c97df44 | 1117 | else |
lypinator | 0:bb348c97df44 | 1118 | { |
lypinator | 0:bb348c97df44 | 1119 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 1120 | |
lypinator | 0:bb348c97df44 | 1121 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1122 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1123 | } |
lypinator | 0:bb348c97df44 | 1124 | |
lypinator | 0:bb348c97df44 | 1125 | return status; |
lypinator | 0:bb348c97df44 | 1126 | } |
lypinator | 0:bb348c97df44 | 1127 | |
lypinator | 0:bb348c97df44 | 1128 | /** |
lypinator | 0:bb348c97df44 | 1129 | * @brief Sends an amount of data in non blocking mode with DMA. |
lypinator | 0:bb348c97df44 | 1130 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1131 | * @param pData pointer to data buffer |
lypinator | 0:bb348c97df44 | 1132 | * @note This function is used only in Indirect Write Mode |
lypinator | 0:bb348c97df44 | 1133 | * @note If DMA peripheral access is configured as halfword, the number |
lypinator | 0:bb348c97df44 | 1134 | * of data and the fifo threshold should be aligned on halfword |
lypinator | 0:bb348c97df44 | 1135 | * @note If DMA peripheral access is configured as word, the number |
lypinator | 0:bb348c97df44 | 1136 | * of data and the fifo threshold should be aligned on word |
lypinator | 0:bb348c97df44 | 1137 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1138 | */ |
lypinator | 0:bb348c97df44 | 1139 | HAL_StatusTypeDef HAL_QSPI_Transmit_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
lypinator | 0:bb348c97df44 | 1140 | { |
lypinator | 0:bb348c97df44 | 1141 | HAL_StatusTypeDef status = HAL_OK; |
lypinator | 0:bb348c97df44 | 1142 | uint32_t *tmp; |
lypinator | 0:bb348c97df44 | 1143 | uint32_t data_size = (READ_REG(hqspi->Instance->DLR) + 1U); |
lypinator | 0:bb348c97df44 | 1144 | |
lypinator | 0:bb348c97df44 | 1145 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 1146 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1147 | |
lypinator | 0:bb348c97df44 | 1148 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 1149 | { |
lypinator | 0:bb348c97df44 | 1150 | /* Clear the error code */ |
lypinator | 0:bb348c97df44 | 1151 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 1152 | |
lypinator | 0:bb348c97df44 | 1153 | if(pData != NULL ) |
lypinator | 0:bb348c97df44 | 1154 | { |
lypinator | 0:bb348c97df44 | 1155 | /* Configure counters of the handle */ |
lypinator | 0:bb348c97df44 | 1156 | if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_BYTE) |
lypinator | 0:bb348c97df44 | 1157 | { |
lypinator | 0:bb348c97df44 | 1158 | hqspi->TxXferCount = data_size; |
lypinator | 0:bb348c97df44 | 1159 | } |
lypinator | 0:bb348c97df44 | 1160 | else if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_HALFWORD) |
lypinator | 0:bb348c97df44 | 1161 | { |
lypinator | 0:bb348c97df44 | 1162 | if (((data_size % 2U) != 0U) || ((hqspi->Init.FifoThreshold % 2U) != 0U)) |
lypinator | 0:bb348c97df44 | 1163 | { |
lypinator | 0:bb348c97df44 | 1164 | /* The number of data or the fifo threshold is not aligned on halfword |
lypinator | 0:bb348c97df44 | 1165 | => no transfer possible with DMA peripheral access configured as halfword */ |
lypinator | 0:bb348c97df44 | 1166 | hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; |
lypinator | 0:bb348c97df44 | 1167 | status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 1168 | |
lypinator | 0:bb348c97df44 | 1169 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1170 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1171 | } |
lypinator | 0:bb348c97df44 | 1172 | else |
lypinator | 0:bb348c97df44 | 1173 | { |
lypinator | 0:bb348c97df44 | 1174 | hqspi->TxXferCount = (data_size >> 1); |
lypinator | 0:bb348c97df44 | 1175 | } |
lypinator | 0:bb348c97df44 | 1176 | } |
lypinator | 0:bb348c97df44 | 1177 | else if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_WORD) |
lypinator | 0:bb348c97df44 | 1178 | { |
lypinator | 0:bb348c97df44 | 1179 | if (((data_size % 4U) != 0U) || ((hqspi->Init.FifoThreshold % 4U) != 0U)) |
lypinator | 0:bb348c97df44 | 1180 | { |
lypinator | 0:bb348c97df44 | 1181 | /* The number of data or the fifo threshold is not aligned on word |
lypinator | 0:bb348c97df44 | 1182 | => no transfer possible with DMA peripheral access configured as word */ |
lypinator | 0:bb348c97df44 | 1183 | hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; |
lypinator | 0:bb348c97df44 | 1184 | status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 1185 | |
lypinator | 0:bb348c97df44 | 1186 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1187 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1188 | } |
lypinator | 0:bb348c97df44 | 1189 | else |
lypinator | 0:bb348c97df44 | 1190 | { |
lypinator | 0:bb348c97df44 | 1191 | hqspi->TxXferCount = (data_size >> 2U); |
lypinator | 0:bb348c97df44 | 1192 | } |
lypinator | 0:bb348c97df44 | 1193 | } |
lypinator | 0:bb348c97df44 | 1194 | |
lypinator | 0:bb348c97df44 | 1195 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 1196 | { |
lypinator | 0:bb348c97df44 | 1197 | /* Update state */ |
lypinator | 0:bb348c97df44 | 1198 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX; |
lypinator | 0:bb348c97df44 | 1199 | |
lypinator | 0:bb348c97df44 | 1200 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 1201 | __HAL_QSPI_CLEAR_FLAG(hqspi, (QSPI_FLAG_TE | QSPI_FLAG_TC)); |
lypinator | 0:bb348c97df44 | 1202 | |
lypinator | 0:bb348c97df44 | 1203 | /* Configure size and pointer of the handle */ |
lypinator | 0:bb348c97df44 | 1204 | hqspi->TxXferSize = hqspi->TxXferCount; |
lypinator | 0:bb348c97df44 | 1205 | hqspi->pTxBuffPtr = pData; |
lypinator | 0:bb348c97df44 | 1206 | |
lypinator | 0:bb348c97df44 | 1207 | /* Configure QSPI: CCR register with functional mode as indirect write */ |
lypinator | 0:bb348c97df44 | 1208 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); |
lypinator | 0:bb348c97df44 | 1209 | |
lypinator | 0:bb348c97df44 | 1210 | /* Set the QSPI DMA transfer complete callback */ |
lypinator | 0:bb348c97df44 | 1211 | hqspi->hdma->XferCpltCallback = QSPI_DMATxCplt; |
lypinator | 0:bb348c97df44 | 1212 | |
lypinator | 0:bb348c97df44 | 1213 | /* Set the QSPI DMA Half transfer complete callback */ |
lypinator | 0:bb348c97df44 | 1214 | hqspi->hdma->XferHalfCpltCallback = QSPI_DMATxHalfCplt; |
lypinator | 0:bb348c97df44 | 1215 | |
lypinator | 0:bb348c97df44 | 1216 | /* Set the DMA error callback */ |
lypinator | 0:bb348c97df44 | 1217 | hqspi->hdma->XferErrorCallback = QSPI_DMAError; |
lypinator | 0:bb348c97df44 | 1218 | |
lypinator | 0:bb348c97df44 | 1219 | /* Clear the DMA abort callback */ |
lypinator | 0:bb348c97df44 | 1220 | hqspi->hdma->XferAbortCallback = NULL; |
lypinator | 0:bb348c97df44 | 1221 | |
lypinator | 0:bb348c97df44 | 1222 | #if defined (QSPI1_V2_1L) |
lypinator | 0:bb348c97df44 | 1223 | /* Bug "ES0305 section 2.1.8 In some specific cases, DMA2 data corruption occurs when managing |
lypinator | 0:bb348c97df44 | 1224 | AHB and APB2 peripherals in a concurrent way" Workaround Implementation: |
lypinator | 0:bb348c97df44 | 1225 | Change the following configuration of DMA peripheral |
lypinator | 0:bb348c97df44 | 1226 | - Enable peripheral increment |
lypinator | 0:bb348c97df44 | 1227 | - Disable memory increment |
lypinator | 0:bb348c97df44 | 1228 | - Set DMA direction as peripheral to memory mode */ |
lypinator | 0:bb348c97df44 | 1229 | |
lypinator | 0:bb348c97df44 | 1230 | /* Enable peripheral increment mode of the DMA */ |
lypinator | 0:bb348c97df44 | 1231 | hqspi->hdma->Init.PeriphInc = DMA_PINC_ENABLE; |
lypinator | 0:bb348c97df44 | 1232 | |
lypinator | 0:bb348c97df44 | 1233 | /* Disable memory increment mode of the DMA */ |
lypinator | 0:bb348c97df44 | 1234 | hqspi->hdma->Init.MemInc = DMA_MINC_DISABLE; |
lypinator | 0:bb348c97df44 | 1235 | |
lypinator | 0:bb348c97df44 | 1236 | /* Update peripheral/memory increment mode bits */ |
lypinator | 0:bb348c97df44 | 1237 | MODIFY_REG(hqspi->hdma->Instance->CR, (DMA_SxCR_MINC | DMA_SxCR_PINC), (hqspi->hdma->Init.MemInc | hqspi->hdma->Init.PeriphInc)); |
lypinator | 0:bb348c97df44 | 1238 | |
lypinator | 0:bb348c97df44 | 1239 | /* Configure the direction of the DMA */ |
lypinator | 0:bb348c97df44 | 1240 | hqspi->hdma->Init.Direction = DMA_PERIPH_TO_MEMORY; |
lypinator | 0:bb348c97df44 | 1241 | #else |
lypinator | 0:bb348c97df44 | 1242 | /* Configure the direction of the DMA */ |
lypinator | 0:bb348c97df44 | 1243 | hqspi->hdma->Init.Direction = DMA_MEMORY_TO_PERIPH; |
lypinator | 0:bb348c97df44 | 1244 | #endif /* QSPI1_V2_1L */ |
lypinator | 0:bb348c97df44 | 1245 | |
lypinator | 0:bb348c97df44 | 1246 | /* Update direction mode bit */ |
lypinator | 0:bb348c97df44 | 1247 | MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction); |
lypinator | 0:bb348c97df44 | 1248 | |
lypinator | 0:bb348c97df44 | 1249 | /* Enable the QSPI transmit DMA Channel */ |
lypinator | 0:bb348c97df44 | 1250 | tmp = (uint32_t*)&pData; |
lypinator | 0:bb348c97df44 | 1251 | HAL_DMA_Start_IT(hqspi->hdma, *(uint32_t*)tmp, (uint32_t)&hqspi->Instance->DR, hqspi->TxXferSize); |
lypinator | 0:bb348c97df44 | 1252 | |
lypinator | 0:bb348c97df44 | 1253 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1254 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1255 | |
lypinator | 0:bb348c97df44 | 1256 | /* Enable the QSPI transfer error Interrupt */ |
lypinator | 0:bb348c97df44 | 1257 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); |
lypinator | 0:bb348c97df44 | 1258 | |
lypinator | 0:bb348c97df44 | 1259 | /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ |
lypinator | 0:bb348c97df44 | 1260 | SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
lypinator | 0:bb348c97df44 | 1261 | } |
lypinator | 0:bb348c97df44 | 1262 | } |
lypinator | 0:bb348c97df44 | 1263 | else |
lypinator | 0:bb348c97df44 | 1264 | { |
lypinator | 0:bb348c97df44 | 1265 | hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; |
lypinator | 0:bb348c97df44 | 1266 | |
lypinator | 0:bb348c97df44 | 1267 | status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 1268 | |
lypinator | 0:bb348c97df44 | 1269 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1270 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1271 | } |
lypinator | 0:bb348c97df44 | 1272 | } |
lypinator | 0:bb348c97df44 | 1273 | else |
lypinator | 0:bb348c97df44 | 1274 | { |
lypinator | 0:bb348c97df44 | 1275 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 1276 | |
lypinator | 0:bb348c97df44 | 1277 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1278 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1279 | } |
lypinator | 0:bb348c97df44 | 1280 | |
lypinator | 0:bb348c97df44 | 1281 | return status; |
lypinator | 0:bb348c97df44 | 1282 | } |
lypinator | 0:bb348c97df44 | 1283 | |
lypinator | 0:bb348c97df44 | 1284 | /** |
lypinator | 0:bb348c97df44 | 1285 | * @brief Receives an amount of data in non blocking mode with DMA. |
lypinator | 0:bb348c97df44 | 1286 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1287 | * @param pData pointer to data buffer. |
lypinator | 0:bb348c97df44 | 1288 | * @note This function is used only in Indirect Read Mode |
lypinator | 0:bb348c97df44 | 1289 | * @note If DMA peripheral access is configured as halfword, the number |
lypinator | 0:bb348c97df44 | 1290 | * of data and the fifo threshold should be aligned on halfword |
lypinator | 0:bb348c97df44 | 1291 | * @note If DMA peripheral access is configured as word, the number |
lypinator | 0:bb348c97df44 | 1292 | * of data and the fifo threshold should be aligned on word |
lypinator | 0:bb348c97df44 | 1293 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1294 | */ |
lypinator | 0:bb348c97df44 | 1295 | HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
lypinator | 0:bb348c97df44 | 1296 | { |
lypinator | 0:bb348c97df44 | 1297 | HAL_StatusTypeDef status = HAL_OK; |
lypinator | 0:bb348c97df44 | 1298 | uint32_t *tmp; |
lypinator | 0:bb348c97df44 | 1299 | uint32_t addr_reg = READ_REG(hqspi->Instance->AR); |
lypinator | 0:bb348c97df44 | 1300 | uint32_t data_size = (READ_REG(hqspi->Instance->DLR) + 1U); |
lypinator | 0:bb348c97df44 | 1301 | |
lypinator | 0:bb348c97df44 | 1302 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 1303 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1304 | |
lypinator | 0:bb348c97df44 | 1305 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 1306 | { |
lypinator | 0:bb348c97df44 | 1307 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 1308 | |
lypinator | 0:bb348c97df44 | 1309 | if(pData != NULL ) |
lypinator | 0:bb348c97df44 | 1310 | { |
lypinator | 0:bb348c97df44 | 1311 | /* Configure counters of the handle */ |
lypinator | 0:bb348c97df44 | 1312 | if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_BYTE) |
lypinator | 0:bb348c97df44 | 1313 | { |
lypinator | 0:bb348c97df44 | 1314 | hqspi->RxXferCount = data_size; |
lypinator | 0:bb348c97df44 | 1315 | } |
lypinator | 0:bb348c97df44 | 1316 | else if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_HALFWORD) |
lypinator | 0:bb348c97df44 | 1317 | { |
lypinator | 0:bb348c97df44 | 1318 | if (((data_size % 2U) != 0U) || ((hqspi->Init.FifoThreshold % 2U) != 0U)) |
lypinator | 0:bb348c97df44 | 1319 | { |
lypinator | 0:bb348c97df44 | 1320 | /* The number of data or the fifo threshold is not aligned on halfword |
lypinator | 0:bb348c97df44 | 1321 | => no transfer possible with DMA peripheral access configured as halfword */ |
lypinator | 0:bb348c97df44 | 1322 | hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; |
lypinator | 0:bb348c97df44 | 1323 | status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 1324 | |
lypinator | 0:bb348c97df44 | 1325 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1326 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1327 | } |
lypinator | 0:bb348c97df44 | 1328 | else |
lypinator | 0:bb348c97df44 | 1329 | { |
lypinator | 0:bb348c97df44 | 1330 | hqspi->RxXferCount = (data_size >> 1U); |
lypinator | 0:bb348c97df44 | 1331 | } |
lypinator | 0:bb348c97df44 | 1332 | } |
lypinator | 0:bb348c97df44 | 1333 | else if (hqspi->hdma->Init.PeriphDataAlignment == DMA_PDATAALIGN_WORD) |
lypinator | 0:bb348c97df44 | 1334 | { |
lypinator | 0:bb348c97df44 | 1335 | if (((data_size % 4U) != 0U) || ((hqspi->Init.FifoThreshold % 4U) != 0U)) |
lypinator | 0:bb348c97df44 | 1336 | { |
lypinator | 0:bb348c97df44 | 1337 | /* The number of data or the fifo threshold is not aligned on word |
lypinator | 0:bb348c97df44 | 1338 | => no transfer possible with DMA peripheral access configured as word */ |
lypinator | 0:bb348c97df44 | 1339 | hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; |
lypinator | 0:bb348c97df44 | 1340 | status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 1341 | |
lypinator | 0:bb348c97df44 | 1342 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1343 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1344 | } |
lypinator | 0:bb348c97df44 | 1345 | else |
lypinator | 0:bb348c97df44 | 1346 | { |
lypinator | 0:bb348c97df44 | 1347 | hqspi->RxXferCount = (data_size >> 2U); |
lypinator | 0:bb348c97df44 | 1348 | } |
lypinator | 0:bb348c97df44 | 1349 | } |
lypinator | 0:bb348c97df44 | 1350 | |
lypinator | 0:bb348c97df44 | 1351 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 1352 | { |
lypinator | 0:bb348c97df44 | 1353 | /* Update state */ |
lypinator | 0:bb348c97df44 | 1354 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX; |
lypinator | 0:bb348c97df44 | 1355 | |
lypinator | 0:bb348c97df44 | 1356 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 1357 | __HAL_QSPI_CLEAR_FLAG(hqspi, (QSPI_FLAG_TE | QSPI_FLAG_TC)); |
lypinator | 0:bb348c97df44 | 1358 | |
lypinator | 0:bb348c97df44 | 1359 | /* Configure size and pointer of the handle */ |
lypinator | 0:bb348c97df44 | 1360 | hqspi->RxXferSize = hqspi->RxXferCount; |
lypinator | 0:bb348c97df44 | 1361 | hqspi->pRxBuffPtr = pData; |
lypinator | 0:bb348c97df44 | 1362 | |
lypinator | 0:bb348c97df44 | 1363 | /* Set the QSPI DMA transfer complete callback */ |
lypinator | 0:bb348c97df44 | 1364 | hqspi->hdma->XferCpltCallback = QSPI_DMARxCplt; |
lypinator | 0:bb348c97df44 | 1365 | |
lypinator | 0:bb348c97df44 | 1366 | /* Set the QSPI DMA Half transfer complete callback */ |
lypinator | 0:bb348c97df44 | 1367 | hqspi->hdma->XferHalfCpltCallback = QSPI_DMARxHalfCplt; |
lypinator | 0:bb348c97df44 | 1368 | |
lypinator | 0:bb348c97df44 | 1369 | /* Set the DMA error callback */ |
lypinator | 0:bb348c97df44 | 1370 | hqspi->hdma->XferErrorCallback = QSPI_DMAError; |
lypinator | 0:bb348c97df44 | 1371 | |
lypinator | 0:bb348c97df44 | 1372 | /* Clear the DMA abort callback */ |
lypinator | 0:bb348c97df44 | 1373 | hqspi->hdma->XferAbortCallback = NULL; |
lypinator | 0:bb348c97df44 | 1374 | |
lypinator | 0:bb348c97df44 | 1375 | #if defined (QSPI1_V2_1L) |
lypinator | 0:bb348c97df44 | 1376 | /* Bug "ES0305 section 2.1.8 In some specific cases, DMA2 data corruption occurs when managing |
lypinator | 0:bb348c97df44 | 1377 | AHB and APB2 peripherals in a concurrent way" Workaround Implementation: |
lypinator | 0:bb348c97df44 | 1378 | Change the following configuration of DMA peripheral |
lypinator | 0:bb348c97df44 | 1379 | - Enable peripheral increment |
lypinator | 0:bb348c97df44 | 1380 | - Disable memory increment |
lypinator | 0:bb348c97df44 | 1381 | - Set DMA direction as memory to peripheral mode |
lypinator | 0:bb348c97df44 | 1382 | - 4 Extra words (32-bits) are added for read operation to guarantee |
lypinator | 0:bb348c97df44 | 1383 | the last data is transferred from DMA FIFO to RAM memory */ |
lypinator | 0:bb348c97df44 | 1384 | |
lypinator | 0:bb348c97df44 | 1385 | /* Enable peripheral increment of the DMA */ |
lypinator | 0:bb348c97df44 | 1386 | hqspi->hdma->Init.PeriphInc = DMA_PINC_ENABLE; |
lypinator | 0:bb348c97df44 | 1387 | |
lypinator | 0:bb348c97df44 | 1388 | /* Disable memory increment of the DMA */ |
lypinator | 0:bb348c97df44 | 1389 | hqspi->hdma->Init.MemInc = DMA_MINC_DISABLE; |
lypinator | 0:bb348c97df44 | 1390 | |
lypinator | 0:bb348c97df44 | 1391 | /* Update peripheral/memory increment mode bits */ |
lypinator | 0:bb348c97df44 | 1392 | MODIFY_REG(hqspi->hdma->Instance->CR, (DMA_SxCR_MINC | DMA_SxCR_PINC), (hqspi->hdma->Init.MemInc | hqspi->hdma->Init.PeriphInc)); |
lypinator | 0:bb348c97df44 | 1393 | |
lypinator | 0:bb348c97df44 | 1394 | /* Configure the direction of the DMA */ |
lypinator | 0:bb348c97df44 | 1395 | hqspi->hdma->Init.Direction = DMA_MEMORY_TO_PERIPH; |
lypinator | 0:bb348c97df44 | 1396 | |
lypinator | 0:bb348c97df44 | 1397 | /* 4 Extra words (32-bits) are needed for read operation to guarantee |
lypinator | 0:bb348c97df44 | 1398 | the last data is transferred from DMA FIFO to RAM memory */ |
lypinator | 0:bb348c97df44 | 1399 | WRITE_REG(hqspi->Instance->DLR, (data_size - 1U + 16U)); |
lypinator | 0:bb348c97df44 | 1400 | |
lypinator | 0:bb348c97df44 | 1401 | /* Update direction mode bit */ |
lypinator | 0:bb348c97df44 | 1402 | MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction); |
lypinator | 0:bb348c97df44 | 1403 | |
lypinator | 0:bb348c97df44 | 1404 | /* Configure QSPI: CCR register with functional as indirect read */ |
lypinator | 0:bb348c97df44 | 1405 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); |
lypinator | 0:bb348c97df44 | 1406 | |
lypinator | 0:bb348c97df44 | 1407 | /* Start the transfer by re-writing the address in AR register */ |
lypinator | 0:bb348c97df44 | 1408 | WRITE_REG(hqspi->Instance->AR, addr_reg); |
lypinator | 0:bb348c97df44 | 1409 | |
lypinator | 0:bb348c97df44 | 1410 | /* Enable the DMA Channel */ |
lypinator | 0:bb348c97df44 | 1411 | tmp = (uint32_t*)&pData; |
lypinator | 0:bb348c97df44 | 1412 | HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)&hqspi->Instance->DR, *(uint32_t*)tmp, hqspi->RxXferSize); |
lypinator | 0:bb348c97df44 | 1413 | |
lypinator | 0:bb348c97df44 | 1414 | /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ |
lypinator | 0:bb348c97df44 | 1415 | SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
lypinator | 0:bb348c97df44 | 1416 | |
lypinator | 0:bb348c97df44 | 1417 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1418 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1419 | |
lypinator | 0:bb348c97df44 | 1420 | /* Enable the QSPI transfer error Interrupt */ |
lypinator | 0:bb348c97df44 | 1421 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); |
lypinator | 0:bb348c97df44 | 1422 | #else |
lypinator | 0:bb348c97df44 | 1423 | /* Configure the direction of the DMA */ |
lypinator | 0:bb348c97df44 | 1424 | hqspi->hdma->Init.Direction = DMA_PERIPH_TO_MEMORY; |
lypinator | 0:bb348c97df44 | 1425 | |
lypinator | 0:bb348c97df44 | 1426 | MODIFY_REG(hqspi->hdma->Instance->CR, DMA_SxCR_DIR, hqspi->hdma->Init.Direction); |
lypinator | 0:bb348c97df44 | 1427 | |
lypinator | 0:bb348c97df44 | 1428 | /* Enable the DMA Channel */ |
lypinator | 0:bb348c97df44 | 1429 | tmp = (uint32_t*)&pData; |
lypinator | 0:bb348c97df44 | 1430 | HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)&hqspi->Instance->DR, *(uint32_t*)tmp, hqspi->RxXferSize); |
lypinator | 0:bb348c97df44 | 1431 | |
lypinator | 0:bb348c97df44 | 1432 | /* Configure QSPI: CCR register with functional as indirect read */ |
lypinator | 0:bb348c97df44 | 1433 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); |
lypinator | 0:bb348c97df44 | 1434 | |
lypinator | 0:bb348c97df44 | 1435 | /* Start the transfer by re-writing the address in AR register */ |
lypinator | 0:bb348c97df44 | 1436 | WRITE_REG(hqspi->Instance->AR, addr_reg); |
lypinator | 0:bb348c97df44 | 1437 | |
lypinator | 0:bb348c97df44 | 1438 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1439 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1440 | |
lypinator | 0:bb348c97df44 | 1441 | /* Enable the QSPI transfer error Interrupt */ |
lypinator | 0:bb348c97df44 | 1442 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); |
lypinator | 0:bb348c97df44 | 1443 | |
lypinator | 0:bb348c97df44 | 1444 | /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ |
lypinator | 0:bb348c97df44 | 1445 | SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
lypinator | 0:bb348c97df44 | 1446 | #endif /* QSPI1_V2_1L */ |
lypinator | 0:bb348c97df44 | 1447 | } |
lypinator | 0:bb348c97df44 | 1448 | } |
lypinator | 0:bb348c97df44 | 1449 | else |
lypinator | 0:bb348c97df44 | 1450 | { |
lypinator | 0:bb348c97df44 | 1451 | hqspi->ErrorCode |= HAL_QSPI_ERROR_INVALID_PARAM; |
lypinator | 0:bb348c97df44 | 1452 | status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 1453 | |
lypinator | 0:bb348c97df44 | 1454 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1455 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1456 | } |
lypinator | 0:bb348c97df44 | 1457 | } |
lypinator | 0:bb348c97df44 | 1458 | else |
lypinator | 0:bb348c97df44 | 1459 | { |
lypinator | 0:bb348c97df44 | 1460 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 1461 | |
lypinator | 0:bb348c97df44 | 1462 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1463 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1464 | } |
lypinator | 0:bb348c97df44 | 1465 | |
lypinator | 0:bb348c97df44 | 1466 | return status; |
lypinator | 0:bb348c97df44 | 1467 | } |
lypinator | 0:bb348c97df44 | 1468 | |
lypinator | 0:bb348c97df44 | 1469 | /** |
lypinator | 0:bb348c97df44 | 1470 | * @brief Configure the QSPI Automatic Polling Mode in blocking mode. |
lypinator | 0:bb348c97df44 | 1471 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1472 | * @param cmd structure that contains the command configuration information. |
lypinator | 0:bb348c97df44 | 1473 | * @param cfg structure that contains the polling configuration information. |
lypinator | 0:bb348c97df44 | 1474 | * @param Timeout Time out duration |
lypinator | 0:bb348c97df44 | 1475 | * @note This function is used only in Automatic Polling Mode |
lypinator | 0:bb348c97df44 | 1476 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1477 | */ |
lypinator | 0:bb348c97df44 | 1478 | HAL_StatusTypeDef HAL_QSPI_AutoPolling(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout) |
lypinator | 0:bb348c97df44 | 1479 | { |
lypinator | 0:bb348c97df44 | 1480 | HAL_StatusTypeDef status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 1481 | uint32_t tickstart = HAL_GetTick(); |
lypinator | 0:bb348c97df44 | 1482 | |
lypinator | 0:bb348c97df44 | 1483 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 1484 | assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); |
lypinator | 0:bb348c97df44 | 1485 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
lypinator | 0:bb348c97df44 | 1486 | { |
lypinator | 0:bb348c97df44 | 1487 | assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); |
lypinator | 0:bb348c97df44 | 1488 | } |
lypinator | 0:bb348c97df44 | 1489 | |
lypinator | 0:bb348c97df44 | 1490 | assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); |
lypinator | 0:bb348c97df44 | 1491 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
lypinator | 0:bb348c97df44 | 1492 | { |
lypinator | 0:bb348c97df44 | 1493 | assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize)); |
lypinator | 0:bb348c97df44 | 1494 | } |
lypinator | 0:bb348c97df44 | 1495 | |
lypinator | 0:bb348c97df44 | 1496 | assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode)); |
lypinator | 0:bb348c97df44 | 1497 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
lypinator | 0:bb348c97df44 | 1498 | { |
lypinator | 0:bb348c97df44 | 1499 | assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize)); |
lypinator | 0:bb348c97df44 | 1500 | } |
lypinator | 0:bb348c97df44 | 1501 | |
lypinator | 0:bb348c97df44 | 1502 | assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles)); |
lypinator | 0:bb348c97df44 | 1503 | assert_param(IS_QSPI_DATA_MODE(cmd->DataMode)); |
lypinator | 0:bb348c97df44 | 1504 | |
lypinator | 0:bb348c97df44 | 1505 | assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode)); |
lypinator | 0:bb348c97df44 | 1506 | assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle)); |
lypinator | 0:bb348c97df44 | 1507 | assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode)); |
lypinator | 0:bb348c97df44 | 1508 | |
lypinator | 0:bb348c97df44 | 1509 | assert_param(IS_QSPI_INTERVAL(cfg->Interval)); |
lypinator | 0:bb348c97df44 | 1510 | assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize)); |
lypinator | 0:bb348c97df44 | 1511 | assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode)); |
lypinator | 0:bb348c97df44 | 1512 | |
lypinator | 0:bb348c97df44 | 1513 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 1514 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1515 | |
lypinator | 0:bb348c97df44 | 1516 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 1517 | { |
lypinator | 0:bb348c97df44 | 1518 | |
lypinator | 0:bb348c97df44 | 1519 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 1520 | |
lypinator | 0:bb348c97df44 | 1521 | /* Update state */ |
lypinator | 0:bb348c97df44 | 1522 | hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING; |
lypinator | 0:bb348c97df44 | 1523 | |
lypinator | 0:bb348c97df44 | 1524 | /* Wait till BUSY flag reset */ |
lypinator | 0:bb348c97df44 | 1525 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, Timeout); |
lypinator | 0:bb348c97df44 | 1526 | |
lypinator | 0:bb348c97df44 | 1527 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 1528 | { |
lypinator | 0:bb348c97df44 | 1529 | /* Configure QSPI: PSMAR register with the status match value */ |
lypinator | 0:bb348c97df44 | 1530 | WRITE_REG(hqspi->Instance->PSMAR, cfg->Match); |
lypinator | 0:bb348c97df44 | 1531 | |
lypinator | 0:bb348c97df44 | 1532 | /* Configure QSPI: PSMKR register with the status mask value */ |
lypinator | 0:bb348c97df44 | 1533 | WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask); |
lypinator | 0:bb348c97df44 | 1534 | |
lypinator | 0:bb348c97df44 | 1535 | /* Configure QSPI: PIR register with the interval value */ |
lypinator | 0:bb348c97df44 | 1536 | WRITE_REG(hqspi->Instance->PIR, cfg->Interval); |
lypinator | 0:bb348c97df44 | 1537 | |
lypinator | 0:bb348c97df44 | 1538 | /* Configure QSPI: CR register with Match mode and Automatic stop enabled |
lypinator | 0:bb348c97df44 | 1539 | (otherwise there will be an infinite loop in blocking mode) */ |
lypinator | 0:bb348c97df44 | 1540 | MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS), |
lypinator | 0:bb348c97df44 | 1541 | (cfg->MatchMode | QSPI_AUTOMATIC_STOP_ENABLE)); |
lypinator | 0:bb348c97df44 | 1542 | |
lypinator | 0:bb348c97df44 | 1543 | /* Call the configuration function */ |
lypinator | 0:bb348c97df44 | 1544 | cmd->NbData = cfg->StatusBytesSize; |
lypinator | 0:bb348c97df44 | 1545 | QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING); |
lypinator | 0:bb348c97df44 | 1546 | |
lypinator | 0:bb348c97df44 | 1547 | /* Wait until SM flag is set to go back in idle state */ |
lypinator | 0:bb348c97df44 | 1548 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_SM, SET, tickstart, Timeout); |
lypinator | 0:bb348c97df44 | 1549 | |
lypinator | 0:bb348c97df44 | 1550 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 1551 | { |
lypinator | 0:bb348c97df44 | 1552 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM); |
lypinator | 0:bb348c97df44 | 1553 | |
lypinator | 0:bb348c97df44 | 1554 | /* Update state */ |
lypinator | 0:bb348c97df44 | 1555 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 1556 | } |
lypinator | 0:bb348c97df44 | 1557 | } |
lypinator | 0:bb348c97df44 | 1558 | } |
lypinator | 0:bb348c97df44 | 1559 | else |
lypinator | 0:bb348c97df44 | 1560 | { |
lypinator | 0:bb348c97df44 | 1561 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 1562 | } |
lypinator | 0:bb348c97df44 | 1563 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1564 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1565 | |
lypinator | 0:bb348c97df44 | 1566 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 1567 | return status; |
lypinator | 0:bb348c97df44 | 1568 | } |
lypinator | 0:bb348c97df44 | 1569 | |
lypinator | 0:bb348c97df44 | 1570 | /** |
lypinator | 0:bb348c97df44 | 1571 | * @brief Configure the QSPI Automatic Polling Mode in non-blocking mode. |
lypinator | 0:bb348c97df44 | 1572 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1573 | * @param cmd structure that contains the command configuration information. |
lypinator | 0:bb348c97df44 | 1574 | * @param cfg structure that contains the polling configuration information. |
lypinator | 0:bb348c97df44 | 1575 | * @note This function is used only in Automatic Polling Mode |
lypinator | 0:bb348c97df44 | 1576 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1577 | */ |
lypinator | 0:bb348c97df44 | 1578 | HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg) |
lypinator | 0:bb348c97df44 | 1579 | { |
lypinator | 0:bb348c97df44 | 1580 | __IO uint32_t count = 0U; |
lypinator | 0:bb348c97df44 | 1581 | HAL_StatusTypeDef status = HAL_OK; |
lypinator | 0:bb348c97df44 | 1582 | |
lypinator | 0:bb348c97df44 | 1583 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 1584 | assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); |
lypinator | 0:bb348c97df44 | 1585 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
lypinator | 0:bb348c97df44 | 1586 | { |
lypinator | 0:bb348c97df44 | 1587 | assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); |
lypinator | 0:bb348c97df44 | 1588 | } |
lypinator | 0:bb348c97df44 | 1589 | |
lypinator | 0:bb348c97df44 | 1590 | assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); |
lypinator | 0:bb348c97df44 | 1591 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
lypinator | 0:bb348c97df44 | 1592 | { |
lypinator | 0:bb348c97df44 | 1593 | assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize)); |
lypinator | 0:bb348c97df44 | 1594 | } |
lypinator | 0:bb348c97df44 | 1595 | |
lypinator | 0:bb348c97df44 | 1596 | assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode)); |
lypinator | 0:bb348c97df44 | 1597 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
lypinator | 0:bb348c97df44 | 1598 | { |
lypinator | 0:bb348c97df44 | 1599 | assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize)); |
lypinator | 0:bb348c97df44 | 1600 | } |
lypinator | 0:bb348c97df44 | 1601 | |
lypinator | 0:bb348c97df44 | 1602 | assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles)); |
lypinator | 0:bb348c97df44 | 1603 | assert_param(IS_QSPI_DATA_MODE(cmd->DataMode)); |
lypinator | 0:bb348c97df44 | 1604 | |
lypinator | 0:bb348c97df44 | 1605 | assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode)); |
lypinator | 0:bb348c97df44 | 1606 | assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle)); |
lypinator | 0:bb348c97df44 | 1607 | assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode)); |
lypinator | 0:bb348c97df44 | 1608 | |
lypinator | 0:bb348c97df44 | 1609 | assert_param(IS_QSPI_INTERVAL(cfg->Interval)); |
lypinator | 0:bb348c97df44 | 1610 | assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize)); |
lypinator | 0:bb348c97df44 | 1611 | assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode)); |
lypinator | 0:bb348c97df44 | 1612 | assert_param(IS_QSPI_AUTOMATIC_STOP(cfg->AutomaticStop)); |
lypinator | 0:bb348c97df44 | 1613 | |
lypinator | 0:bb348c97df44 | 1614 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 1615 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1616 | |
lypinator | 0:bb348c97df44 | 1617 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 1618 | { |
lypinator | 0:bb348c97df44 | 1619 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 1620 | |
lypinator | 0:bb348c97df44 | 1621 | /* Update state */ |
lypinator | 0:bb348c97df44 | 1622 | hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING; |
lypinator | 0:bb348c97df44 | 1623 | |
lypinator | 0:bb348c97df44 | 1624 | /* Wait till BUSY flag reset */ |
lypinator | 0:bb348c97df44 | 1625 | count = (hqspi->Timeout) * (SystemCoreClock / 16U / 1000U); |
lypinator | 0:bb348c97df44 | 1626 | do |
lypinator | 0:bb348c97df44 | 1627 | { |
lypinator | 0:bb348c97df44 | 1628 | if (count-- == 0U) |
lypinator | 0:bb348c97df44 | 1629 | { |
lypinator | 0:bb348c97df44 | 1630 | hqspi->State = HAL_QSPI_STATE_ERROR; |
lypinator | 0:bb348c97df44 | 1631 | hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT; |
lypinator | 0:bb348c97df44 | 1632 | status = HAL_TIMEOUT; |
lypinator | 0:bb348c97df44 | 1633 | } |
lypinator | 0:bb348c97df44 | 1634 | } |
lypinator | 0:bb348c97df44 | 1635 | while ((__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_BUSY)) != RESET); |
lypinator | 0:bb348c97df44 | 1636 | |
lypinator | 0:bb348c97df44 | 1637 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 1638 | { |
lypinator | 0:bb348c97df44 | 1639 | /* Configure QSPI: PSMAR register with the status match value */ |
lypinator | 0:bb348c97df44 | 1640 | WRITE_REG(hqspi->Instance->PSMAR, cfg->Match); |
lypinator | 0:bb348c97df44 | 1641 | |
lypinator | 0:bb348c97df44 | 1642 | /* Configure QSPI: PSMKR register with the status mask value */ |
lypinator | 0:bb348c97df44 | 1643 | WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask); |
lypinator | 0:bb348c97df44 | 1644 | |
lypinator | 0:bb348c97df44 | 1645 | /* Configure QSPI: PIR register with the interval value */ |
lypinator | 0:bb348c97df44 | 1646 | WRITE_REG(hqspi->Instance->PIR, cfg->Interval); |
lypinator | 0:bb348c97df44 | 1647 | |
lypinator | 0:bb348c97df44 | 1648 | /* Configure QSPI: CR register with Match mode and Automatic stop mode */ |
lypinator | 0:bb348c97df44 | 1649 | MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS), |
lypinator | 0:bb348c97df44 | 1650 | (cfg->MatchMode | cfg->AutomaticStop)); |
lypinator | 0:bb348c97df44 | 1651 | |
lypinator | 0:bb348c97df44 | 1652 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 1653 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_SM); |
lypinator | 0:bb348c97df44 | 1654 | |
lypinator | 0:bb348c97df44 | 1655 | /* Call the configuration function */ |
lypinator | 0:bb348c97df44 | 1656 | cmd->NbData = cfg->StatusBytesSize; |
lypinator | 0:bb348c97df44 | 1657 | QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING); |
lypinator | 0:bb348c97df44 | 1658 | |
lypinator | 0:bb348c97df44 | 1659 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1660 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1661 | |
lypinator | 0:bb348c97df44 | 1662 | /* Enable the QSPI Transfer Error and status match Interrupt */ |
lypinator | 0:bb348c97df44 | 1663 | __HAL_QSPI_ENABLE_IT(hqspi, (QSPI_IT_SM | QSPI_IT_TE)); |
lypinator | 0:bb348c97df44 | 1664 | |
lypinator | 0:bb348c97df44 | 1665 | } |
lypinator | 0:bb348c97df44 | 1666 | else |
lypinator | 0:bb348c97df44 | 1667 | { |
lypinator | 0:bb348c97df44 | 1668 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1669 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1670 | } |
lypinator | 0:bb348c97df44 | 1671 | } |
lypinator | 0:bb348c97df44 | 1672 | else |
lypinator | 0:bb348c97df44 | 1673 | { |
lypinator | 0:bb348c97df44 | 1674 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 1675 | |
lypinator | 0:bb348c97df44 | 1676 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1677 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1678 | } |
lypinator | 0:bb348c97df44 | 1679 | |
lypinator | 0:bb348c97df44 | 1680 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 1681 | return status; |
lypinator | 0:bb348c97df44 | 1682 | } |
lypinator | 0:bb348c97df44 | 1683 | |
lypinator | 0:bb348c97df44 | 1684 | /** |
lypinator | 0:bb348c97df44 | 1685 | * @brief Configure the Memory Mapped mode. |
lypinator | 0:bb348c97df44 | 1686 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1687 | * @param cmd structure that contains the command configuration information. |
lypinator | 0:bb348c97df44 | 1688 | * @param cfg structure that contains the memory mapped configuration information. |
lypinator | 0:bb348c97df44 | 1689 | * @note This function is used only in Memory mapped Mode |
lypinator | 0:bb348c97df44 | 1690 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1691 | */ |
lypinator | 0:bb348c97df44 | 1692 | HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg) |
lypinator | 0:bb348c97df44 | 1693 | { |
lypinator | 0:bb348c97df44 | 1694 | HAL_StatusTypeDef status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 1695 | uint32_t tickstart = HAL_GetTick(); |
lypinator | 0:bb348c97df44 | 1696 | |
lypinator | 0:bb348c97df44 | 1697 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 1698 | assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); |
lypinator | 0:bb348c97df44 | 1699 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
lypinator | 0:bb348c97df44 | 1700 | { |
lypinator | 0:bb348c97df44 | 1701 | assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); |
lypinator | 0:bb348c97df44 | 1702 | } |
lypinator | 0:bb348c97df44 | 1703 | |
lypinator | 0:bb348c97df44 | 1704 | assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); |
lypinator | 0:bb348c97df44 | 1705 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
lypinator | 0:bb348c97df44 | 1706 | { |
lypinator | 0:bb348c97df44 | 1707 | assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize)); |
lypinator | 0:bb348c97df44 | 1708 | } |
lypinator | 0:bb348c97df44 | 1709 | |
lypinator | 0:bb348c97df44 | 1710 | assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode)); |
lypinator | 0:bb348c97df44 | 1711 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
lypinator | 0:bb348c97df44 | 1712 | { |
lypinator | 0:bb348c97df44 | 1713 | assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize)); |
lypinator | 0:bb348c97df44 | 1714 | } |
lypinator | 0:bb348c97df44 | 1715 | |
lypinator | 0:bb348c97df44 | 1716 | assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles)); |
lypinator | 0:bb348c97df44 | 1717 | assert_param(IS_QSPI_DATA_MODE(cmd->DataMode)); |
lypinator | 0:bb348c97df44 | 1718 | |
lypinator | 0:bb348c97df44 | 1719 | assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode)); |
lypinator | 0:bb348c97df44 | 1720 | assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle)); |
lypinator | 0:bb348c97df44 | 1721 | assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode)); |
lypinator | 0:bb348c97df44 | 1722 | |
lypinator | 0:bb348c97df44 | 1723 | assert_param(IS_QSPI_TIMEOUT_ACTIVATION(cfg->TimeOutActivation)); |
lypinator | 0:bb348c97df44 | 1724 | |
lypinator | 0:bb348c97df44 | 1725 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 1726 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1727 | |
lypinator | 0:bb348c97df44 | 1728 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 1729 | { |
lypinator | 0:bb348c97df44 | 1730 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 1731 | |
lypinator | 0:bb348c97df44 | 1732 | /* Update state */ |
lypinator | 0:bb348c97df44 | 1733 | hqspi->State = HAL_QSPI_STATE_BUSY_MEM_MAPPED; |
lypinator | 0:bb348c97df44 | 1734 | |
lypinator | 0:bb348c97df44 | 1735 | /* Wait till BUSY flag reset */ |
lypinator | 0:bb348c97df44 | 1736 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout); |
lypinator | 0:bb348c97df44 | 1737 | |
lypinator | 0:bb348c97df44 | 1738 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 1739 | { |
lypinator | 0:bb348c97df44 | 1740 | /* Configure QSPI: CR register with timeout counter enable */ |
lypinator | 0:bb348c97df44 | 1741 | MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_TCEN, cfg->TimeOutActivation); |
lypinator | 0:bb348c97df44 | 1742 | |
lypinator | 0:bb348c97df44 | 1743 | if (cfg->TimeOutActivation == QSPI_TIMEOUT_COUNTER_ENABLE) |
lypinator | 0:bb348c97df44 | 1744 | { |
lypinator | 0:bb348c97df44 | 1745 | assert_param(IS_QSPI_TIMEOUT_PERIOD(cfg->TimeOutPeriod)); |
lypinator | 0:bb348c97df44 | 1746 | |
lypinator | 0:bb348c97df44 | 1747 | /* Configure QSPI: LPTR register with the low-power timeout value */ |
lypinator | 0:bb348c97df44 | 1748 | WRITE_REG(hqspi->Instance->LPTR, cfg->TimeOutPeriod); |
lypinator | 0:bb348c97df44 | 1749 | |
lypinator | 0:bb348c97df44 | 1750 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 1751 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TO); |
lypinator | 0:bb348c97df44 | 1752 | |
lypinator | 0:bb348c97df44 | 1753 | /* Enable the QSPI TimeOut Interrupt */ |
lypinator | 0:bb348c97df44 | 1754 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TO); |
lypinator | 0:bb348c97df44 | 1755 | } |
lypinator | 0:bb348c97df44 | 1756 | |
lypinator | 0:bb348c97df44 | 1757 | /* Call the configuration function */ |
lypinator | 0:bb348c97df44 | 1758 | QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED); |
lypinator | 0:bb348c97df44 | 1759 | } |
lypinator | 0:bb348c97df44 | 1760 | } |
lypinator | 0:bb348c97df44 | 1761 | else |
lypinator | 0:bb348c97df44 | 1762 | { |
lypinator | 0:bb348c97df44 | 1763 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 1764 | } |
lypinator | 0:bb348c97df44 | 1765 | |
lypinator | 0:bb348c97df44 | 1766 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1767 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1768 | |
lypinator | 0:bb348c97df44 | 1769 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 1770 | return status; |
lypinator | 0:bb348c97df44 | 1771 | } |
lypinator | 0:bb348c97df44 | 1772 | |
lypinator | 0:bb348c97df44 | 1773 | /** |
lypinator | 0:bb348c97df44 | 1774 | * @brief Transfer Error callbacks |
lypinator | 0:bb348c97df44 | 1775 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1776 | * @retval None |
lypinator | 0:bb348c97df44 | 1777 | */ |
lypinator | 0:bb348c97df44 | 1778 | __weak void HAL_QSPI_ErrorCallback(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1779 | { |
lypinator | 0:bb348c97df44 | 1780 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1781 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 1782 | |
lypinator | 0:bb348c97df44 | 1783 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1784 | the HAL_QSPI_ErrorCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1785 | */ |
lypinator | 0:bb348c97df44 | 1786 | } |
lypinator | 0:bb348c97df44 | 1787 | |
lypinator | 0:bb348c97df44 | 1788 | /** |
lypinator | 0:bb348c97df44 | 1789 | * @brief Abort completed callback. |
lypinator | 0:bb348c97df44 | 1790 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1791 | * @retval None |
lypinator | 0:bb348c97df44 | 1792 | */ |
lypinator | 0:bb348c97df44 | 1793 | __weak void HAL_QSPI_AbortCpltCallback(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1794 | { |
lypinator | 0:bb348c97df44 | 1795 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1796 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 1797 | |
lypinator | 0:bb348c97df44 | 1798 | /* NOTE: This function should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1799 | the HAL_QSPI_AbortCpltCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1800 | */ |
lypinator | 0:bb348c97df44 | 1801 | } |
lypinator | 0:bb348c97df44 | 1802 | |
lypinator | 0:bb348c97df44 | 1803 | /** |
lypinator | 0:bb348c97df44 | 1804 | * @brief Command completed callback. |
lypinator | 0:bb348c97df44 | 1805 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1806 | * @retval None |
lypinator | 0:bb348c97df44 | 1807 | */ |
lypinator | 0:bb348c97df44 | 1808 | __weak void HAL_QSPI_CmdCpltCallback(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1809 | { |
lypinator | 0:bb348c97df44 | 1810 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1811 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 1812 | |
lypinator | 0:bb348c97df44 | 1813 | /* NOTE: This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1814 | the HAL_QSPI_CmdCpltCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1815 | */ |
lypinator | 0:bb348c97df44 | 1816 | } |
lypinator | 0:bb348c97df44 | 1817 | |
lypinator | 0:bb348c97df44 | 1818 | /** |
lypinator | 0:bb348c97df44 | 1819 | * @brief Rx Transfer completed callbacks. |
lypinator | 0:bb348c97df44 | 1820 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1821 | * @retval None |
lypinator | 0:bb348c97df44 | 1822 | */ |
lypinator | 0:bb348c97df44 | 1823 | __weak void HAL_QSPI_RxCpltCallback(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1824 | { |
lypinator | 0:bb348c97df44 | 1825 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1826 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 1827 | |
lypinator | 0:bb348c97df44 | 1828 | /* NOTE: This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1829 | the HAL_QSPI_RxCpltCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1830 | */ |
lypinator | 0:bb348c97df44 | 1831 | } |
lypinator | 0:bb348c97df44 | 1832 | |
lypinator | 0:bb348c97df44 | 1833 | /** |
lypinator | 0:bb348c97df44 | 1834 | * @brief Tx Transfer completed callbacks. |
lypinator | 0:bb348c97df44 | 1835 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1836 | * @retval None |
lypinator | 0:bb348c97df44 | 1837 | */ |
lypinator | 0:bb348c97df44 | 1838 | __weak void HAL_QSPI_TxCpltCallback(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1839 | { |
lypinator | 0:bb348c97df44 | 1840 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1841 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 1842 | |
lypinator | 0:bb348c97df44 | 1843 | /* NOTE: This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1844 | the HAL_QSPI_TxCpltCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1845 | */ |
lypinator | 0:bb348c97df44 | 1846 | } |
lypinator | 0:bb348c97df44 | 1847 | |
lypinator | 0:bb348c97df44 | 1848 | /** |
lypinator | 0:bb348c97df44 | 1849 | * @brief Rx Half Transfer completed callbacks. |
lypinator | 0:bb348c97df44 | 1850 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1851 | * @retval None |
lypinator | 0:bb348c97df44 | 1852 | */ |
lypinator | 0:bb348c97df44 | 1853 | __weak void HAL_QSPI_RxHalfCpltCallback(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1854 | { |
lypinator | 0:bb348c97df44 | 1855 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1856 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 1857 | |
lypinator | 0:bb348c97df44 | 1858 | /* NOTE: This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1859 | the HAL_QSPI_RxHalfCpltCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1860 | */ |
lypinator | 0:bb348c97df44 | 1861 | } |
lypinator | 0:bb348c97df44 | 1862 | |
lypinator | 0:bb348c97df44 | 1863 | /** |
lypinator | 0:bb348c97df44 | 1864 | * @brief Tx Half Transfer completed callbacks. |
lypinator | 0:bb348c97df44 | 1865 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1866 | * @retval None |
lypinator | 0:bb348c97df44 | 1867 | */ |
lypinator | 0:bb348c97df44 | 1868 | __weak void HAL_QSPI_TxHalfCpltCallback(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1869 | { |
lypinator | 0:bb348c97df44 | 1870 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1871 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 1872 | |
lypinator | 0:bb348c97df44 | 1873 | /* NOTE: This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1874 | the HAL_QSPI_TxHalfCpltCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1875 | */ |
lypinator | 0:bb348c97df44 | 1876 | } |
lypinator | 0:bb348c97df44 | 1877 | |
lypinator | 0:bb348c97df44 | 1878 | /** |
lypinator | 0:bb348c97df44 | 1879 | * @brief FIFO Threshold callbacks |
lypinator | 0:bb348c97df44 | 1880 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1881 | * @retval None |
lypinator | 0:bb348c97df44 | 1882 | */ |
lypinator | 0:bb348c97df44 | 1883 | __weak void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1884 | { |
lypinator | 0:bb348c97df44 | 1885 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1886 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 1887 | |
lypinator | 0:bb348c97df44 | 1888 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1889 | the HAL_QSPI_FIFOThresholdCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1890 | */ |
lypinator | 0:bb348c97df44 | 1891 | } |
lypinator | 0:bb348c97df44 | 1892 | |
lypinator | 0:bb348c97df44 | 1893 | /** |
lypinator | 0:bb348c97df44 | 1894 | * @brief Status Match callbacks |
lypinator | 0:bb348c97df44 | 1895 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1896 | * @retval None |
lypinator | 0:bb348c97df44 | 1897 | */ |
lypinator | 0:bb348c97df44 | 1898 | __weak void HAL_QSPI_StatusMatchCallback(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1899 | { |
lypinator | 0:bb348c97df44 | 1900 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1901 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 1902 | |
lypinator | 0:bb348c97df44 | 1903 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1904 | the HAL_QSPI_StatusMatchCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1905 | */ |
lypinator | 0:bb348c97df44 | 1906 | } |
lypinator | 0:bb348c97df44 | 1907 | |
lypinator | 0:bb348c97df44 | 1908 | /** |
lypinator | 0:bb348c97df44 | 1909 | * @brief Timeout callbacks |
lypinator | 0:bb348c97df44 | 1910 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1911 | * @retval None |
lypinator | 0:bb348c97df44 | 1912 | */ |
lypinator | 0:bb348c97df44 | 1913 | __weak void HAL_QSPI_TimeOutCallback(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1914 | { |
lypinator | 0:bb348c97df44 | 1915 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1916 | UNUSED(hqspi); |
lypinator | 0:bb348c97df44 | 1917 | |
lypinator | 0:bb348c97df44 | 1918 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1919 | the HAL_QSPI_TimeOutCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1920 | */ |
lypinator | 0:bb348c97df44 | 1921 | } |
lypinator | 0:bb348c97df44 | 1922 | |
lypinator | 0:bb348c97df44 | 1923 | /** |
lypinator | 0:bb348c97df44 | 1924 | * @} |
lypinator | 0:bb348c97df44 | 1925 | */ |
lypinator | 0:bb348c97df44 | 1926 | |
lypinator | 0:bb348c97df44 | 1927 | /** @defgroup QSPI_Exported_Functions_Group3 Peripheral Control and State functions |
lypinator | 0:bb348c97df44 | 1928 | * @brief QSPI control and State functions |
lypinator | 0:bb348c97df44 | 1929 | * |
lypinator | 0:bb348c97df44 | 1930 | @verbatim |
lypinator | 0:bb348c97df44 | 1931 | =============================================================================== |
lypinator | 0:bb348c97df44 | 1932 | ##### Peripheral Control and State functions ##### |
lypinator | 0:bb348c97df44 | 1933 | =============================================================================== |
lypinator | 0:bb348c97df44 | 1934 | [..] |
lypinator | 0:bb348c97df44 | 1935 | This subsection provides a set of functions allowing to : |
lypinator | 0:bb348c97df44 | 1936 | (+) Check in run-time the state of the driver. |
lypinator | 0:bb348c97df44 | 1937 | (+) Check the error code set during last operation. |
lypinator | 0:bb348c97df44 | 1938 | (+) Abort any operation. |
lypinator | 0:bb348c97df44 | 1939 | |
lypinator | 0:bb348c97df44 | 1940 | @endverbatim |
lypinator | 0:bb348c97df44 | 1941 | * @{ |
lypinator | 0:bb348c97df44 | 1942 | */ |
lypinator | 0:bb348c97df44 | 1943 | |
lypinator | 0:bb348c97df44 | 1944 | /** |
lypinator | 0:bb348c97df44 | 1945 | * @brief Return the QSPI handle state. |
lypinator | 0:bb348c97df44 | 1946 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1947 | * @retval HAL state |
lypinator | 0:bb348c97df44 | 1948 | */ |
lypinator | 0:bb348c97df44 | 1949 | HAL_QSPI_StateTypeDef HAL_QSPI_GetState(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1950 | { |
lypinator | 0:bb348c97df44 | 1951 | /* Return QSPI handle state */ |
lypinator | 0:bb348c97df44 | 1952 | return hqspi->State; |
lypinator | 0:bb348c97df44 | 1953 | } |
lypinator | 0:bb348c97df44 | 1954 | |
lypinator | 0:bb348c97df44 | 1955 | /** |
lypinator | 0:bb348c97df44 | 1956 | * @brief Return the QSPI error code |
lypinator | 0:bb348c97df44 | 1957 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1958 | * @retval QSPI Error Code |
lypinator | 0:bb348c97df44 | 1959 | */ |
lypinator | 0:bb348c97df44 | 1960 | uint32_t HAL_QSPI_GetError(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1961 | { |
lypinator | 0:bb348c97df44 | 1962 | return hqspi->ErrorCode; |
lypinator | 0:bb348c97df44 | 1963 | } |
lypinator | 0:bb348c97df44 | 1964 | |
lypinator | 0:bb348c97df44 | 1965 | /** |
lypinator | 0:bb348c97df44 | 1966 | * @brief Abort the current transmission |
lypinator | 0:bb348c97df44 | 1967 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 1968 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1969 | */ |
lypinator | 0:bb348c97df44 | 1970 | HAL_StatusTypeDef HAL_QSPI_Abort(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 1971 | { |
lypinator | 0:bb348c97df44 | 1972 | HAL_StatusTypeDef status = HAL_OK; |
lypinator | 0:bb348c97df44 | 1973 | uint32_t tickstart = HAL_GetTick(); |
lypinator | 0:bb348c97df44 | 1974 | |
lypinator | 0:bb348c97df44 | 1975 | /* Check if the state is in one of the busy states */ |
lypinator | 0:bb348c97df44 | 1976 | if ((hqspi->State & 0x2U) != 0U) |
lypinator | 0:bb348c97df44 | 1977 | { |
lypinator | 0:bb348c97df44 | 1978 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1979 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 1980 | |
lypinator | 0:bb348c97df44 | 1981 | if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN)!= RESET) |
lypinator | 0:bb348c97df44 | 1982 | { |
lypinator | 0:bb348c97df44 | 1983 | /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ |
lypinator | 0:bb348c97df44 | 1984 | CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
lypinator | 0:bb348c97df44 | 1985 | |
lypinator | 0:bb348c97df44 | 1986 | /* Abort DMA channel */ |
lypinator | 0:bb348c97df44 | 1987 | status = HAL_DMA_Abort(hqspi->hdma); |
lypinator | 0:bb348c97df44 | 1988 | if(status != HAL_OK) |
lypinator | 0:bb348c97df44 | 1989 | { |
lypinator | 0:bb348c97df44 | 1990 | hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; |
lypinator | 0:bb348c97df44 | 1991 | } |
lypinator | 0:bb348c97df44 | 1992 | } |
lypinator | 0:bb348c97df44 | 1993 | |
lypinator | 0:bb348c97df44 | 1994 | /* Configure QSPI: CR register with Abort request */ |
lypinator | 0:bb348c97df44 | 1995 | SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT); |
lypinator | 0:bb348c97df44 | 1996 | |
lypinator | 0:bb348c97df44 | 1997 | /* Wait until TC flag is set to go back in idle state */ |
lypinator | 0:bb348c97df44 | 1998 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, tickstart, hqspi->Timeout); |
lypinator | 0:bb348c97df44 | 1999 | |
lypinator | 0:bb348c97df44 | 2000 | if(status == HAL_OK) |
lypinator | 0:bb348c97df44 | 2001 | { |
lypinator | 0:bb348c97df44 | 2002 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
lypinator | 0:bb348c97df44 | 2003 | |
lypinator | 0:bb348c97df44 | 2004 | /* Wait until BUSY flag is reset */ |
lypinator | 0:bb348c97df44 | 2005 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, tickstart, hqspi->Timeout); |
lypinator | 0:bb348c97df44 | 2006 | } |
lypinator | 0:bb348c97df44 | 2007 | |
lypinator | 0:bb348c97df44 | 2008 | if (status == HAL_OK) |
lypinator | 0:bb348c97df44 | 2009 | { |
lypinator | 0:bb348c97df44 | 2010 | /* Update state */ |
lypinator | 0:bb348c97df44 | 2011 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 2012 | } |
lypinator | 0:bb348c97df44 | 2013 | } |
lypinator | 0:bb348c97df44 | 2014 | |
lypinator | 0:bb348c97df44 | 2015 | return status; |
lypinator | 0:bb348c97df44 | 2016 | } |
lypinator | 0:bb348c97df44 | 2017 | |
lypinator | 0:bb348c97df44 | 2018 | /** |
lypinator | 0:bb348c97df44 | 2019 | * @brief Abort the current transmission (non-blocking function) |
lypinator | 0:bb348c97df44 | 2020 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 2021 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 2022 | */ |
lypinator | 0:bb348c97df44 | 2023 | HAL_StatusTypeDef HAL_QSPI_Abort_IT(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 2024 | { |
lypinator | 0:bb348c97df44 | 2025 | HAL_StatusTypeDef status = HAL_OK; |
lypinator | 0:bb348c97df44 | 2026 | |
lypinator | 0:bb348c97df44 | 2027 | /* Check if the state is in one of the busy states */ |
lypinator | 0:bb348c97df44 | 2028 | if ((hqspi->State & 0x2U) != 0U) |
lypinator | 0:bb348c97df44 | 2029 | { |
lypinator | 0:bb348c97df44 | 2030 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 2031 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 2032 | |
lypinator | 0:bb348c97df44 | 2033 | /* Update QSPI state */ |
lypinator | 0:bb348c97df44 | 2034 | hqspi->State = HAL_QSPI_STATE_ABORT; |
lypinator | 0:bb348c97df44 | 2035 | |
lypinator | 0:bb348c97df44 | 2036 | /* Disable all interrupts */ |
lypinator | 0:bb348c97df44 | 2037 | __HAL_QSPI_DISABLE_IT(hqspi, (QSPI_IT_TO | QSPI_IT_SM | QSPI_IT_FT | QSPI_IT_TC | QSPI_IT_TE)); |
lypinator | 0:bb348c97df44 | 2038 | |
lypinator | 0:bb348c97df44 | 2039 | if ((hqspi->Instance->CR & QUADSPI_CR_DMAEN)!= RESET) |
lypinator | 0:bb348c97df44 | 2040 | { |
lypinator | 0:bb348c97df44 | 2041 | /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ |
lypinator | 0:bb348c97df44 | 2042 | CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
lypinator | 0:bb348c97df44 | 2043 | |
lypinator | 0:bb348c97df44 | 2044 | /* Abort DMA channel */ |
lypinator | 0:bb348c97df44 | 2045 | hqspi->hdma->XferAbortCallback = QSPI_DMAAbortCplt; |
lypinator | 0:bb348c97df44 | 2046 | HAL_DMA_Abort_IT(hqspi->hdma); |
lypinator | 0:bb348c97df44 | 2047 | } |
lypinator | 0:bb348c97df44 | 2048 | else |
lypinator | 0:bb348c97df44 | 2049 | { |
lypinator | 0:bb348c97df44 | 2050 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 2051 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
lypinator | 0:bb348c97df44 | 2052 | |
lypinator | 0:bb348c97df44 | 2053 | /* Enable the QSPI Transfer Complete Interrupt */ |
lypinator | 0:bb348c97df44 | 2054 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC); |
lypinator | 0:bb348c97df44 | 2055 | |
lypinator | 0:bb348c97df44 | 2056 | /* Configure QSPI: CR register with Abort request */ |
lypinator | 0:bb348c97df44 | 2057 | SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT); |
lypinator | 0:bb348c97df44 | 2058 | } |
lypinator | 0:bb348c97df44 | 2059 | } |
lypinator | 0:bb348c97df44 | 2060 | |
lypinator | 0:bb348c97df44 | 2061 | return status; |
lypinator | 0:bb348c97df44 | 2062 | } |
lypinator | 0:bb348c97df44 | 2063 | |
lypinator | 0:bb348c97df44 | 2064 | /** @brief Set QSPI timeout |
lypinator | 0:bb348c97df44 | 2065 | * @param hqspi QSPI handle. |
lypinator | 0:bb348c97df44 | 2066 | * @param Timeout Timeout for the QSPI memory access. |
lypinator | 0:bb348c97df44 | 2067 | * @retval None |
lypinator | 0:bb348c97df44 | 2068 | */ |
lypinator | 0:bb348c97df44 | 2069 | void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout) |
lypinator | 0:bb348c97df44 | 2070 | { |
lypinator | 0:bb348c97df44 | 2071 | hqspi->Timeout = Timeout; |
lypinator | 0:bb348c97df44 | 2072 | } |
lypinator | 0:bb348c97df44 | 2073 | |
lypinator | 0:bb348c97df44 | 2074 | /** @brief Set QSPI Fifo threshold. |
lypinator | 0:bb348c97df44 | 2075 | * @param hqspi QSPI handle. |
lypinator | 0:bb348c97df44 | 2076 | * @param Threshold Threshold of the Fifo (value between 1 and 16). |
lypinator | 0:bb348c97df44 | 2077 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 2078 | */ |
lypinator | 0:bb348c97df44 | 2079 | HAL_StatusTypeDef HAL_QSPI_SetFifoThreshold(QSPI_HandleTypeDef *hqspi, uint32_t Threshold) |
lypinator | 0:bb348c97df44 | 2080 | { |
lypinator | 0:bb348c97df44 | 2081 | HAL_StatusTypeDef status = HAL_OK; |
lypinator | 0:bb348c97df44 | 2082 | |
lypinator | 0:bb348c97df44 | 2083 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 2084 | __HAL_LOCK(hqspi); |
lypinator | 0:bb348c97df44 | 2085 | |
lypinator | 0:bb348c97df44 | 2086 | if(hqspi->State == HAL_QSPI_STATE_READY) |
lypinator | 0:bb348c97df44 | 2087 | { |
lypinator | 0:bb348c97df44 | 2088 | /* Synchronize init structure with new FIFO threshold value */ |
lypinator | 0:bb348c97df44 | 2089 | hqspi->Init.FifoThreshold = Threshold; |
lypinator | 0:bb348c97df44 | 2090 | |
lypinator | 0:bb348c97df44 | 2091 | /* Configure QSPI FIFO Threshold */ |
lypinator | 0:bb348c97df44 | 2092 | MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES, |
lypinator | 0:bb348c97df44 | 2093 | ((hqspi->Init.FifoThreshold - 1U) << QUADSPI_CR_FTHRES_Pos)); |
lypinator | 0:bb348c97df44 | 2094 | } |
lypinator | 0:bb348c97df44 | 2095 | else |
lypinator | 0:bb348c97df44 | 2096 | { |
lypinator | 0:bb348c97df44 | 2097 | status = HAL_BUSY; |
lypinator | 0:bb348c97df44 | 2098 | } |
lypinator | 0:bb348c97df44 | 2099 | |
lypinator | 0:bb348c97df44 | 2100 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 2101 | __HAL_UNLOCK(hqspi); |
lypinator | 0:bb348c97df44 | 2102 | |
lypinator | 0:bb348c97df44 | 2103 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 2104 | return status; |
lypinator | 0:bb348c97df44 | 2105 | } |
lypinator | 0:bb348c97df44 | 2106 | |
lypinator | 0:bb348c97df44 | 2107 | /** @brief Get QSPI Fifo threshold. |
lypinator | 0:bb348c97df44 | 2108 | * @param hqspi QSPI handle. |
lypinator | 0:bb348c97df44 | 2109 | * @retval Fifo threshold (value between 1 and 16) |
lypinator | 0:bb348c97df44 | 2110 | */ |
lypinator | 0:bb348c97df44 | 2111 | uint32_t HAL_QSPI_GetFifoThreshold(QSPI_HandleTypeDef *hqspi) |
lypinator | 0:bb348c97df44 | 2112 | { |
lypinator | 0:bb348c97df44 | 2113 | return ((READ_BIT(hqspi->Instance->CR, QUADSPI_CR_FTHRES) >> QUADSPI_CR_FTHRES_Pos) + 1U); |
lypinator | 0:bb348c97df44 | 2114 | } |
lypinator | 0:bb348c97df44 | 2115 | |
lypinator | 0:bb348c97df44 | 2116 | /** |
lypinator | 0:bb348c97df44 | 2117 | * @} |
lypinator | 0:bb348c97df44 | 2118 | */ |
lypinator | 0:bb348c97df44 | 2119 | |
lypinator | 0:bb348c97df44 | 2120 | /* Private functions ---------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 2121 | |
lypinator | 0:bb348c97df44 | 2122 | /** |
lypinator | 0:bb348c97df44 | 2123 | * @brief DMA QSPI receive process complete callback. |
lypinator | 0:bb348c97df44 | 2124 | * @param hdma DMA handle |
lypinator | 0:bb348c97df44 | 2125 | * @retval None |
lypinator | 0:bb348c97df44 | 2126 | */ |
lypinator | 0:bb348c97df44 | 2127 | static void QSPI_DMARxCplt(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 2128 | { |
lypinator | 0:bb348c97df44 | 2129 | QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
lypinator | 0:bb348c97df44 | 2130 | hqspi->RxXferCount = 0U; |
lypinator | 0:bb348c97df44 | 2131 | |
lypinator | 0:bb348c97df44 | 2132 | /* Enable the QSPI transfer complete Interrupt */ |
lypinator | 0:bb348c97df44 | 2133 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC); |
lypinator | 0:bb348c97df44 | 2134 | } |
lypinator | 0:bb348c97df44 | 2135 | |
lypinator | 0:bb348c97df44 | 2136 | /** |
lypinator | 0:bb348c97df44 | 2137 | * @brief DMA QSPI transmit process complete callback. |
lypinator | 0:bb348c97df44 | 2138 | * @param hdma DMA handle |
lypinator | 0:bb348c97df44 | 2139 | * @retval None |
lypinator | 0:bb348c97df44 | 2140 | */ |
lypinator | 0:bb348c97df44 | 2141 | static void QSPI_DMATxCplt(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 2142 | { |
lypinator | 0:bb348c97df44 | 2143 | QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
lypinator | 0:bb348c97df44 | 2144 | hqspi->TxXferCount = 0U; |
lypinator | 0:bb348c97df44 | 2145 | |
lypinator | 0:bb348c97df44 | 2146 | /* Enable the QSPI transfer complete Interrupt */ |
lypinator | 0:bb348c97df44 | 2147 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC); |
lypinator | 0:bb348c97df44 | 2148 | } |
lypinator | 0:bb348c97df44 | 2149 | |
lypinator | 0:bb348c97df44 | 2150 | /** |
lypinator | 0:bb348c97df44 | 2151 | * @brief DMA QSPI receive process half complete callback |
lypinator | 0:bb348c97df44 | 2152 | * @param hdma DMA handle |
lypinator | 0:bb348c97df44 | 2153 | * @retval None |
lypinator | 0:bb348c97df44 | 2154 | */ |
lypinator | 0:bb348c97df44 | 2155 | static void QSPI_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 2156 | { |
lypinator | 0:bb348c97df44 | 2157 | QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
lypinator | 0:bb348c97df44 | 2158 | |
lypinator | 0:bb348c97df44 | 2159 | HAL_QSPI_RxHalfCpltCallback(hqspi); |
lypinator | 0:bb348c97df44 | 2160 | } |
lypinator | 0:bb348c97df44 | 2161 | |
lypinator | 0:bb348c97df44 | 2162 | /** |
lypinator | 0:bb348c97df44 | 2163 | * @brief DMA QSPI transmit process half complete callback |
lypinator | 0:bb348c97df44 | 2164 | * @param hdma DMA handle |
lypinator | 0:bb348c97df44 | 2165 | * @retval None |
lypinator | 0:bb348c97df44 | 2166 | */ |
lypinator | 0:bb348c97df44 | 2167 | static void QSPI_DMATxHalfCplt(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 2168 | { |
lypinator | 0:bb348c97df44 | 2169 | QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
lypinator | 0:bb348c97df44 | 2170 | |
lypinator | 0:bb348c97df44 | 2171 | HAL_QSPI_TxHalfCpltCallback(hqspi); |
lypinator | 0:bb348c97df44 | 2172 | } |
lypinator | 0:bb348c97df44 | 2173 | |
lypinator | 0:bb348c97df44 | 2174 | /** |
lypinator | 0:bb348c97df44 | 2175 | * @brief DMA QSPI communication error callback. |
lypinator | 0:bb348c97df44 | 2176 | * @param hdma DMA handle |
lypinator | 0:bb348c97df44 | 2177 | * @retval None |
lypinator | 0:bb348c97df44 | 2178 | */ |
lypinator | 0:bb348c97df44 | 2179 | static void QSPI_DMAError(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 2180 | { |
lypinator | 0:bb348c97df44 | 2181 | QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
lypinator | 0:bb348c97df44 | 2182 | |
lypinator | 0:bb348c97df44 | 2183 | /* if DMA error is FIFO error ignore it */ |
lypinator | 0:bb348c97df44 | 2184 | if(HAL_DMA_GetError(hdma) != HAL_DMA_ERROR_FE) |
lypinator | 0:bb348c97df44 | 2185 | { |
lypinator | 0:bb348c97df44 | 2186 | hqspi->RxXferCount = 0U; |
lypinator | 0:bb348c97df44 | 2187 | hqspi->TxXferCount = 0U; |
lypinator | 0:bb348c97df44 | 2188 | hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; |
lypinator | 0:bb348c97df44 | 2189 | |
lypinator | 0:bb348c97df44 | 2190 | /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ |
lypinator | 0:bb348c97df44 | 2191 | CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
lypinator | 0:bb348c97df44 | 2192 | |
lypinator | 0:bb348c97df44 | 2193 | /* Abort the QSPI */ |
lypinator | 0:bb348c97df44 | 2194 | HAL_QSPI_Abort_IT(hqspi); |
lypinator | 0:bb348c97df44 | 2195 | } |
lypinator | 0:bb348c97df44 | 2196 | } |
lypinator | 0:bb348c97df44 | 2197 | |
lypinator | 0:bb348c97df44 | 2198 | /** |
lypinator | 0:bb348c97df44 | 2199 | * @brief DMA QSPI abort complete callback. |
lypinator | 0:bb348c97df44 | 2200 | * @param hdma DMA handle |
lypinator | 0:bb348c97df44 | 2201 | * @retval None |
lypinator | 0:bb348c97df44 | 2202 | */ |
lypinator | 0:bb348c97df44 | 2203 | static void QSPI_DMAAbortCplt(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 2204 | { |
lypinator | 0:bb348c97df44 | 2205 | QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
lypinator | 0:bb348c97df44 | 2206 | |
lypinator | 0:bb348c97df44 | 2207 | hqspi->RxXferCount = 0U; |
lypinator | 0:bb348c97df44 | 2208 | hqspi->TxXferCount = 0U; |
lypinator | 0:bb348c97df44 | 2209 | |
lypinator | 0:bb348c97df44 | 2210 | if(hqspi->State == HAL_QSPI_STATE_ABORT) |
lypinator | 0:bb348c97df44 | 2211 | { |
lypinator | 0:bb348c97df44 | 2212 | /* DMA Abort called by QSPI abort */ |
lypinator | 0:bb348c97df44 | 2213 | /* Clear interrupt */ |
lypinator | 0:bb348c97df44 | 2214 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
lypinator | 0:bb348c97df44 | 2215 | |
lypinator | 0:bb348c97df44 | 2216 | /* Enable the QSPI Transfer Complete Interrupt */ |
lypinator | 0:bb348c97df44 | 2217 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TC); |
lypinator | 0:bb348c97df44 | 2218 | |
lypinator | 0:bb348c97df44 | 2219 | /* Configure QSPI: CR register with Abort request */ |
lypinator | 0:bb348c97df44 | 2220 | SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT); |
lypinator | 0:bb348c97df44 | 2221 | } |
lypinator | 0:bb348c97df44 | 2222 | else |
lypinator | 0:bb348c97df44 | 2223 | { |
lypinator | 0:bb348c97df44 | 2224 | /* DMA Abort called due to a transfer error interrupt */ |
lypinator | 0:bb348c97df44 | 2225 | /* Change state of QSPI */ |
lypinator | 0:bb348c97df44 | 2226 | hqspi->State = HAL_QSPI_STATE_READY; |
lypinator | 0:bb348c97df44 | 2227 | |
lypinator | 0:bb348c97df44 | 2228 | /* Error callback */ |
lypinator | 0:bb348c97df44 | 2229 | HAL_QSPI_ErrorCallback(hqspi); |
lypinator | 0:bb348c97df44 | 2230 | } |
lypinator | 0:bb348c97df44 | 2231 | } |
lypinator | 0:bb348c97df44 | 2232 | /** |
lypinator | 0:bb348c97df44 | 2233 | * @brief Wait for a flag state until timeout. |
lypinator | 0:bb348c97df44 | 2234 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 2235 | * @param Flag Flag checked |
lypinator | 0:bb348c97df44 | 2236 | * @param State Value of the flag expected |
lypinator | 0:bb348c97df44 | 2237 | * @param Timeout Duration of the time out |
lypinator | 0:bb348c97df44 | 2238 | * @param tickstart tick start value |
lypinator | 0:bb348c97df44 | 2239 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 2240 | */ |
lypinator | 0:bb348c97df44 | 2241 | static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, |
lypinator | 0:bb348c97df44 | 2242 | FlagStatus State, uint32_t tickstart, uint32_t Timeout) |
lypinator | 0:bb348c97df44 | 2243 | { |
lypinator | 0:bb348c97df44 | 2244 | /* Wait until flag is in expected state */ |
lypinator | 0:bb348c97df44 | 2245 | while((FlagStatus)(__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State) |
lypinator | 0:bb348c97df44 | 2246 | { |
lypinator | 0:bb348c97df44 | 2247 | /* Check for the Timeout */ |
lypinator | 0:bb348c97df44 | 2248 | if (Timeout != HAL_MAX_DELAY) |
lypinator | 0:bb348c97df44 | 2249 | { |
lypinator | 0:bb348c97df44 | 2250 | if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) |
lypinator | 0:bb348c97df44 | 2251 | { |
lypinator | 0:bb348c97df44 | 2252 | hqspi->State = HAL_QSPI_STATE_ERROR; |
lypinator | 0:bb348c97df44 | 2253 | hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT; |
lypinator | 0:bb348c97df44 | 2254 | |
lypinator | 0:bb348c97df44 | 2255 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 2256 | } |
lypinator | 0:bb348c97df44 | 2257 | } |
lypinator | 0:bb348c97df44 | 2258 | } |
lypinator | 0:bb348c97df44 | 2259 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 2260 | } |
lypinator | 0:bb348c97df44 | 2261 | |
lypinator | 0:bb348c97df44 | 2262 | /** |
lypinator | 0:bb348c97df44 | 2263 | * @brief Configure the communication registers. |
lypinator | 0:bb348c97df44 | 2264 | * @param hqspi QSPI handle |
lypinator | 0:bb348c97df44 | 2265 | * @param cmd structure that contains the command configuration information |
lypinator | 0:bb348c97df44 | 2266 | * @param FunctionalMode functional mode to configured |
lypinator | 0:bb348c97df44 | 2267 | * This parameter can be one of the following values: |
lypinator | 0:bb348c97df44 | 2268 | * @arg QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE: Indirect write mode |
lypinator | 0:bb348c97df44 | 2269 | * @arg QSPI_FUNCTIONAL_MODE_INDIRECT_READ: Indirect read mode |
lypinator | 0:bb348c97df44 | 2270 | * @arg QSPI_FUNCTIONAL_MODE_AUTO_POLLING: Automatic polling mode |
lypinator | 0:bb348c97df44 | 2271 | * @arg QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED: Memory-mapped mode |
lypinator | 0:bb348c97df44 | 2272 | * @retval None |
lypinator | 0:bb348c97df44 | 2273 | */ |
lypinator | 0:bb348c97df44 | 2274 | static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode) |
lypinator | 0:bb348c97df44 | 2275 | { |
lypinator | 0:bb348c97df44 | 2276 | assert_param(IS_QSPI_FUNCTIONAL_MODE(FunctionalMode)); |
lypinator | 0:bb348c97df44 | 2277 | |
lypinator | 0:bb348c97df44 | 2278 | if ((cmd->DataMode != QSPI_DATA_NONE) && (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)) |
lypinator | 0:bb348c97df44 | 2279 | { |
lypinator | 0:bb348c97df44 | 2280 | /* Configure QSPI: DLR register with the number of data to read or write */ |
lypinator | 0:bb348c97df44 | 2281 | WRITE_REG(hqspi->Instance->DLR, (cmd->NbData - 1U)); |
lypinator | 0:bb348c97df44 | 2282 | } |
lypinator | 0:bb348c97df44 | 2283 | |
lypinator | 0:bb348c97df44 | 2284 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
lypinator | 0:bb348c97df44 | 2285 | { |
lypinator | 0:bb348c97df44 | 2286 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
lypinator | 0:bb348c97df44 | 2287 | { |
lypinator | 0:bb348c97df44 | 2288 | /* Configure QSPI: ABR register with alternate bytes value */ |
lypinator | 0:bb348c97df44 | 2289 | WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes); |
lypinator | 0:bb348c97df44 | 2290 | |
lypinator | 0:bb348c97df44 | 2291 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
lypinator | 0:bb348c97df44 | 2292 | { |
lypinator | 0:bb348c97df44 | 2293 | /*---- Command with instruction, address and alternate bytes ----*/ |
lypinator | 0:bb348c97df44 | 2294 | /* Configure QSPI: CCR register with all communications parameters */ |
lypinator | 0:bb348c97df44 | 2295 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
lypinator | 0:bb348c97df44 | 2296 | cmd->DataMode | (cmd->DummyCycles << 18U) | cmd->AlternateBytesSize | |
lypinator | 0:bb348c97df44 | 2297 | cmd->AlternateByteMode | cmd->AddressSize | cmd->AddressMode | |
lypinator | 0:bb348c97df44 | 2298 | cmd->InstructionMode | cmd->Instruction | FunctionalMode)); |
lypinator | 0:bb348c97df44 | 2299 | |
lypinator | 0:bb348c97df44 | 2300 | if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED) |
lypinator | 0:bb348c97df44 | 2301 | { |
lypinator | 0:bb348c97df44 | 2302 | /* Configure QSPI: AR register with address value */ |
lypinator | 0:bb348c97df44 | 2303 | WRITE_REG(hqspi->Instance->AR, cmd->Address); |
lypinator | 0:bb348c97df44 | 2304 | } |
lypinator | 0:bb348c97df44 | 2305 | } |
lypinator | 0:bb348c97df44 | 2306 | else |
lypinator | 0:bb348c97df44 | 2307 | { |
lypinator | 0:bb348c97df44 | 2308 | /*---- Command with instruction and alternate bytes ----*/ |
lypinator | 0:bb348c97df44 | 2309 | /* Configure QSPI: CCR register with all communications parameters */ |
lypinator | 0:bb348c97df44 | 2310 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
lypinator | 0:bb348c97df44 | 2311 | cmd->DataMode | (cmd->DummyCycles << 18U) | cmd->AlternateBytesSize | |
lypinator | 0:bb348c97df44 | 2312 | cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode | |
lypinator | 0:bb348c97df44 | 2313 | cmd->Instruction | FunctionalMode)); |
lypinator | 0:bb348c97df44 | 2314 | } |
lypinator | 0:bb348c97df44 | 2315 | } |
lypinator | 0:bb348c97df44 | 2316 | else |
lypinator | 0:bb348c97df44 | 2317 | { |
lypinator | 0:bb348c97df44 | 2318 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
lypinator | 0:bb348c97df44 | 2319 | { |
lypinator | 0:bb348c97df44 | 2320 | /*---- Command with instruction and address ----*/ |
lypinator | 0:bb348c97df44 | 2321 | /* Configure QSPI: CCR register with all communications parameters */ |
lypinator | 0:bb348c97df44 | 2322 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
lypinator | 0:bb348c97df44 | 2323 | cmd->DataMode | (cmd->DummyCycles << 18U) | cmd->AlternateByteMode | |
lypinator | 0:bb348c97df44 | 2324 | cmd->AddressSize | cmd->AddressMode | cmd->InstructionMode | |
lypinator | 0:bb348c97df44 | 2325 | cmd->Instruction | FunctionalMode)); |
lypinator | 0:bb348c97df44 | 2326 | |
lypinator | 0:bb348c97df44 | 2327 | if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED) |
lypinator | 0:bb348c97df44 | 2328 | { |
lypinator | 0:bb348c97df44 | 2329 | /* Configure QSPI: AR register with address value */ |
lypinator | 0:bb348c97df44 | 2330 | WRITE_REG(hqspi->Instance->AR, cmd->Address); |
lypinator | 0:bb348c97df44 | 2331 | } |
lypinator | 0:bb348c97df44 | 2332 | } |
lypinator | 0:bb348c97df44 | 2333 | else |
lypinator | 0:bb348c97df44 | 2334 | { |
lypinator | 0:bb348c97df44 | 2335 | /*---- Command with only instruction ----*/ |
lypinator | 0:bb348c97df44 | 2336 | /* Configure QSPI: CCR register with all communications parameters */ |
lypinator | 0:bb348c97df44 | 2337 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
lypinator | 0:bb348c97df44 | 2338 | cmd->DataMode | (cmd->DummyCycles << 18U) | cmd->AlternateByteMode | |
lypinator | 0:bb348c97df44 | 2339 | cmd->AddressMode | cmd->InstructionMode | cmd->Instruction | |
lypinator | 0:bb348c97df44 | 2340 | FunctionalMode)); |
lypinator | 0:bb348c97df44 | 2341 | } |
lypinator | 0:bb348c97df44 | 2342 | } |
lypinator | 0:bb348c97df44 | 2343 | } |
lypinator | 0:bb348c97df44 | 2344 | else |
lypinator | 0:bb348c97df44 | 2345 | { |
lypinator | 0:bb348c97df44 | 2346 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
lypinator | 0:bb348c97df44 | 2347 | { |
lypinator | 0:bb348c97df44 | 2348 | /* Configure QSPI: ABR register with alternate bytes value */ |
lypinator | 0:bb348c97df44 | 2349 | WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes); |
lypinator | 0:bb348c97df44 | 2350 | |
lypinator | 0:bb348c97df44 | 2351 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
lypinator | 0:bb348c97df44 | 2352 | { |
lypinator | 0:bb348c97df44 | 2353 | /*---- Command with address and alternate bytes ----*/ |
lypinator | 0:bb348c97df44 | 2354 | /* Configure QSPI: CCR register with all communications parameters */ |
lypinator | 0:bb348c97df44 | 2355 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
lypinator | 0:bb348c97df44 | 2356 | cmd->DataMode | (cmd->DummyCycles << 18U) | cmd->AlternateBytesSize | |
lypinator | 0:bb348c97df44 | 2357 | cmd->AlternateByteMode | cmd->AddressSize | cmd->AddressMode | |
lypinator | 0:bb348c97df44 | 2358 | cmd->InstructionMode | FunctionalMode)); |
lypinator | 0:bb348c97df44 | 2359 | |
lypinator | 0:bb348c97df44 | 2360 | if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED) |
lypinator | 0:bb348c97df44 | 2361 | { |
lypinator | 0:bb348c97df44 | 2362 | /* Configure QSPI: AR register with address value */ |
lypinator | 0:bb348c97df44 | 2363 | WRITE_REG(hqspi->Instance->AR, cmd->Address); |
lypinator | 0:bb348c97df44 | 2364 | } |
lypinator | 0:bb348c97df44 | 2365 | } |
lypinator | 0:bb348c97df44 | 2366 | else |
lypinator | 0:bb348c97df44 | 2367 | { |
lypinator | 0:bb348c97df44 | 2368 | /*---- Command with only alternate bytes ----*/ |
lypinator | 0:bb348c97df44 | 2369 | /* Configure QSPI: CCR register with all communications parameters */ |
lypinator | 0:bb348c97df44 | 2370 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
lypinator | 0:bb348c97df44 | 2371 | cmd->DataMode | (cmd->DummyCycles << 18U) | cmd->AlternateBytesSize | |
lypinator | 0:bb348c97df44 | 2372 | cmd->AlternateByteMode | cmd->AddressMode | cmd->InstructionMode | |
lypinator | 0:bb348c97df44 | 2373 | FunctionalMode)); |
lypinator | 0:bb348c97df44 | 2374 | } |
lypinator | 0:bb348c97df44 | 2375 | } |
lypinator | 0:bb348c97df44 | 2376 | else |
lypinator | 0:bb348c97df44 | 2377 | { |
lypinator | 0:bb348c97df44 | 2378 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
lypinator | 0:bb348c97df44 | 2379 | { |
lypinator | 0:bb348c97df44 | 2380 | /*---- Command with only address ----*/ |
lypinator | 0:bb348c97df44 | 2381 | /* Configure QSPI: CCR register with all communications parameters */ |
lypinator | 0:bb348c97df44 | 2382 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
lypinator | 0:bb348c97df44 | 2383 | cmd->DataMode | (cmd->DummyCycles << 18U) | cmd->AlternateByteMode | |
lypinator | 0:bb348c97df44 | 2384 | cmd->AddressSize | cmd->AddressMode | cmd->InstructionMode | |
lypinator | 0:bb348c97df44 | 2385 | FunctionalMode)); |
lypinator | 0:bb348c97df44 | 2386 | |
lypinator | 0:bb348c97df44 | 2387 | if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED) |
lypinator | 0:bb348c97df44 | 2388 | { |
lypinator | 0:bb348c97df44 | 2389 | /* Configure QSPI: AR register with address value */ |
lypinator | 0:bb348c97df44 | 2390 | WRITE_REG(hqspi->Instance->AR, cmd->Address); |
lypinator | 0:bb348c97df44 | 2391 | } |
lypinator | 0:bb348c97df44 | 2392 | } |
lypinator | 0:bb348c97df44 | 2393 | else |
lypinator | 0:bb348c97df44 | 2394 | { |
lypinator | 0:bb348c97df44 | 2395 | /*---- Command with only data phase ----*/ |
lypinator | 0:bb348c97df44 | 2396 | if (cmd->DataMode != QSPI_DATA_NONE) |
lypinator | 0:bb348c97df44 | 2397 | { |
lypinator | 0:bb348c97df44 | 2398 | /* Configure QSPI: CCR register with all communications parameters */ |
lypinator | 0:bb348c97df44 | 2399 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
lypinator | 0:bb348c97df44 | 2400 | cmd->DataMode | (cmd->DummyCycles << 18U) | cmd->AlternateByteMode | |
lypinator | 0:bb348c97df44 | 2401 | cmd->AddressMode | cmd->InstructionMode | FunctionalMode)); |
lypinator | 0:bb348c97df44 | 2402 | } |
lypinator | 0:bb348c97df44 | 2403 | } |
lypinator | 0:bb348c97df44 | 2404 | } |
lypinator | 0:bb348c97df44 | 2405 | } |
lypinator | 0:bb348c97df44 | 2406 | } |
lypinator | 0:bb348c97df44 | 2407 | /** |
lypinator | 0:bb348c97df44 | 2408 | * @} |
lypinator | 0:bb348c97df44 | 2409 | */ |
lypinator | 0:bb348c97df44 | 2410 | #endif /* STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx |
lypinator | 0:bb348c97df44 | 2411 | STM32F413xx || STM32F423xx */ |
lypinator | 0:bb348c97df44 | 2412 | |
lypinator | 0:bb348c97df44 | 2413 | #endif /* HAL_QSPI_MODULE_ENABLED */ |
lypinator | 0:bb348c97df44 | 2414 | /** |
lypinator | 0:bb348c97df44 | 2415 | * @} |
lypinator | 0:bb348c97df44 | 2416 | */ |
lypinator | 0:bb348c97df44 | 2417 | |
lypinator | 0:bb348c97df44 | 2418 | /** |
lypinator | 0:bb348c97df44 | 2419 | * @} |
lypinator | 0:bb348c97df44 | 2420 | */ |
lypinator | 0:bb348c97df44 | 2421 | |
lypinator | 0:bb348c97df44 | 2422 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |