Initial commit
mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pwr.c@0:bb348c97df44, 2020-09-16 (annotated)
- Committer:
- lypinator
- Date:
- Wed Sep 16 01:11:49 2020 +0000
- Revision:
- 0:bb348c97df44
Added PWM
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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lypinator | 0:bb348c97df44 | 1 | /** |
lypinator | 0:bb348c97df44 | 2 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 3 | * @file stm32f4xx_hal_pwr.c |
lypinator | 0:bb348c97df44 | 4 | * @author MCD Application Team |
lypinator | 0:bb348c97df44 | 5 | * @brief PWR HAL module driver. |
lypinator | 0:bb348c97df44 | 6 | * This file provides firmware functions to manage the following |
lypinator | 0:bb348c97df44 | 7 | * functionalities of the Power Controller (PWR) peripheral: |
lypinator | 0:bb348c97df44 | 8 | * + Initialization and de-initialization functions |
lypinator | 0:bb348c97df44 | 9 | * + Peripheral Control functions |
lypinator | 0:bb348c97df44 | 10 | * |
lypinator | 0:bb348c97df44 | 11 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 12 | * @attention |
lypinator | 0:bb348c97df44 | 13 | * |
lypinator | 0:bb348c97df44 | 14 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
lypinator | 0:bb348c97df44 | 15 | * |
lypinator | 0:bb348c97df44 | 16 | * Redistribution and use in source and binary forms, with or without modification, |
lypinator | 0:bb348c97df44 | 17 | * are permitted provided that the following conditions are met: |
lypinator | 0:bb348c97df44 | 18 | * 1. Redistributions of source code must retain the above copyright notice, |
lypinator | 0:bb348c97df44 | 19 | * this list of conditions and the following disclaimer. |
lypinator | 0:bb348c97df44 | 20 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
lypinator | 0:bb348c97df44 | 21 | * this list of conditions and the following disclaimer in the documentation |
lypinator | 0:bb348c97df44 | 22 | * and/or other materials provided with the distribution. |
lypinator | 0:bb348c97df44 | 23 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
lypinator | 0:bb348c97df44 | 24 | * may be used to endorse or promote products derived from this software |
lypinator | 0:bb348c97df44 | 25 | * without specific prior written permission. |
lypinator | 0:bb348c97df44 | 26 | * |
lypinator | 0:bb348c97df44 | 27 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
lypinator | 0:bb348c97df44 | 28 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
lypinator | 0:bb348c97df44 | 29 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
lypinator | 0:bb348c97df44 | 30 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
lypinator | 0:bb348c97df44 | 31 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
lypinator | 0:bb348c97df44 | 32 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
lypinator | 0:bb348c97df44 | 33 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
lypinator | 0:bb348c97df44 | 34 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
lypinator | 0:bb348c97df44 | 35 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
lypinator | 0:bb348c97df44 | 36 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
lypinator | 0:bb348c97df44 | 37 | * |
lypinator | 0:bb348c97df44 | 38 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 39 | */ |
lypinator | 0:bb348c97df44 | 40 | |
lypinator | 0:bb348c97df44 | 41 | /* Includes ------------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 42 | #include "stm32f4xx_hal.h" |
lypinator | 0:bb348c97df44 | 43 | |
lypinator | 0:bb348c97df44 | 44 | /** @addtogroup STM32F4xx_HAL_Driver |
lypinator | 0:bb348c97df44 | 45 | * @{ |
lypinator | 0:bb348c97df44 | 46 | */ |
lypinator | 0:bb348c97df44 | 47 | |
lypinator | 0:bb348c97df44 | 48 | /** @defgroup PWR PWR |
lypinator | 0:bb348c97df44 | 49 | * @brief PWR HAL module driver |
lypinator | 0:bb348c97df44 | 50 | * @{ |
lypinator | 0:bb348c97df44 | 51 | */ |
lypinator | 0:bb348c97df44 | 52 | |
lypinator | 0:bb348c97df44 | 53 | #ifdef HAL_PWR_MODULE_ENABLED |
lypinator | 0:bb348c97df44 | 54 | |
lypinator | 0:bb348c97df44 | 55 | /* Private typedef -----------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 56 | /* Private define ------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 57 | /** @addtogroup PWR_Private_Constants |
lypinator | 0:bb348c97df44 | 58 | * @{ |
lypinator | 0:bb348c97df44 | 59 | */ |
lypinator | 0:bb348c97df44 | 60 | |
lypinator | 0:bb348c97df44 | 61 | /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask |
lypinator | 0:bb348c97df44 | 62 | * @{ |
lypinator | 0:bb348c97df44 | 63 | */ |
lypinator | 0:bb348c97df44 | 64 | #define PVD_MODE_IT 0x00010000U |
lypinator | 0:bb348c97df44 | 65 | #define PVD_MODE_EVT 0x00020000U |
lypinator | 0:bb348c97df44 | 66 | #define PVD_RISING_EDGE 0x00000001U |
lypinator | 0:bb348c97df44 | 67 | #define PVD_FALLING_EDGE 0x00000002U |
lypinator | 0:bb348c97df44 | 68 | /** |
lypinator | 0:bb348c97df44 | 69 | * @} |
lypinator | 0:bb348c97df44 | 70 | */ |
lypinator | 0:bb348c97df44 | 71 | |
lypinator | 0:bb348c97df44 | 72 | /** |
lypinator | 0:bb348c97df44 | 73 | * @} |
lypinator | 0:bb348c97df44 | 74 | */ |
lypinator | 0:bb348c97df44 | 75 | /* Private macro -------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 76 | /* Private variables ---------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 77 | /* Private function prototypes -----------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 78 | /* Private functions ---------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 79 | |
lypinator | 0:bb348c97df44 | 80 | /** @defgroup PWR_Exported_Functions PWR Exported Functions |
lypinator | 0:bb348c97df44 | 81 | * @{ |
lypinator | 0:bb348c97df44 | 82 | */ |
lypinator | 0:bb348c97df44 | 83 | |
lypinator | 0:bb348c97df44 | 84 | /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions |
lypinator | 0:bb348c97df44 | 85 | * @brief Initialization and de-initialization functions |
lypinator | 0:bb348c97df44 | 86 | * |
lypinator | 0:bb348c97df44 | 87 | @verbatim |
lypinator | 0:bb348c97df44 | 88 | =============================================================================== |
lypinator | 0:bb348c97df44 | 89 | ##### Initialization and de-initialization functions ##### |
lypinator | 0:bb348c97df44 | 90 | =============================================================================== |
lypinator | 0:bb348c97df44 | 91 | [..] |
lypinator | 0:bb348c97df44 | 92 | After reset, the backup domain (RTC registers, RTC backup data |
lypinator | 0:bb348c97df44 | 93 | registers and backup SRAM) is protected against possible unwanted |
lypinator | 0:bb348c97df44 | 94 | write accesses. |
lypinator | 0:bb348c97df44 | 95 | To enable access to the RTC Domain and RTC registers, proceed as follows: |
lypinator | 0:bb348c97df44 | 96 | (+) Enable the Power Controller (PWR) APB1 interface clock using the |
lypinator | 0:bb348c97df44 | 97 | __HAL_RCC_PWR_CLK_ENABLE() macro. |
lypinator | 0:bb348c97df44 | 98 | (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function. |
lypinator | 0:bb348c97df44 | 99 | |
lypinator | 0:bb348c97df44 | 100 | @endverbatim |
lypinator | 0:bb348c97df44 | 101 | * @{ |
lypinator | 0:bb348c97df44 | 102 | */ |
lypinator | 0:bb348c97df44 | 103 | |
lypinator | 0:bb348c97df44 | 104 | /** |
lypinator | 0:bb348c97df44 | 105 | * @brief Deinitializes the HAL PWR peripheral registers to their default reset values. |
lypinator | 0:bb348c97df44 | 106 | * @retval None |
lypinator | 0:bb348c97df44 | 107 | */ |
lypinator | 0:bb348c97df44 | 108 | void HAL_PWR_DeInit(void) |
lypinator | 0:bb348c97df44 | 109 | { |
lypinator | 0:bb348c97df44 | 110 | __HAL_RCC_PWR_FORCE_RESET(); |
lypinator | 0:bb348c97df44 | 111 | __HAL_RCC_PWR_RELEASE_RESET(); |
lypinator | 0:bb348c97df44 | 112 | } |
lypinator | 0:bb348c97df44 | 113 | |
lypinator | 0:bb348c97df44 | 114 | /** |
lypinator | 0:bb348c97df44 | 115 | * @brief Enables access to the backup domain (RTC registers, RTC |
lypinator | 0:bb348c97df44 | 116 | * backup data registers and backup SRAM). |
lypinator | 0:bb348c97df44 | 117 | * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the |
lypinator | 0:bb348c97df44 | 118 | * Backup Domain Access should be kept enabled. |
lypinator | 0:bb348c97df44 | 119 | * @retval None |
lypinator | 0:bb348c97df44 | 120 | */ |
lypinator | 0:bb348c97df44 | 121 | void HAL_PWR_EnableBkUpAccess(void) |
lypinator | 0:bb348c97df44 | 122 | { |
lypinator | 0:bb348c97df44 | 123 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)ENABLE; |
lypinator | 0:bb348c97df44 | 124 | } |
lypinator | 0:bb348c97df44 | 125 | |
lypinator | 0:bb348c97df44 | 126 | /** |
lypinator | 0:bb348c97df44 | 127 | * @brief Disables access to the backup domain (RTC registers, RTC |
lypinator | 0:bb348c97df44 | 128 | * backup data registers and backup SRAM). |
lypinator | 0:bb348c97df44 | 129 | * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the |
lypinator | 0:bb348c97df44 | 130 | * Backup Domain Access should be kept enabled. |
lypinator | 0:bb348c97df44 | 131 | * @retval None |
lypinator | 0:bb348c97df44 | 132 | */ |
lypinator | 0:bb348c97df44 | 133 | void HAL_PWR_DisableBkUpAccess(void) |
lypinator | 0:bb348c97df44 | 134 | { |
lypinator | 0:bb348c97df44 | 135 | *(__IO uint32_t *) CR_DBP_BB = (uint32_t)DISABLE; |
lypinator | 0:bb348c97df44 | 136 | } |
lypinator | 0:bb348c97df44 | 137 | |
lypinator | 0:bb348c97df44 | 138 | /** |
lypinator | 0:bb348c97df44 | 139 | * @} |
lypinator | 0:bb348c97df44 | 140 | */ |
lypinator | 0:bb348c97df44 | 141 | |
lypinator | 0:bb348c97df44 | 142 | /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions |
lypinator | 0:bb348c97df44 | 143 | * @brief Low Power modes configuration functions |
lypinator | 0:bb348c97df44 | 144 | * |
lypinator | 0:bb348c97df44 | 145 | @verbatim |
lypinator | 0:bb348c97df44 | 146 | |
lypinator | 0:bb348c97df44 | 147 | =============================================================================== |
lypinator | 0:bb348c97df44 | 148 | ##### Peripheral Control functions ##### |
lypinator | 0:bb348c97df44 | 149 | =============================================================================== |
lypinator | 0:bb348c97df44 | 150 | |
lypinator | 0:bb348c97df44 | 151 | *** PVD configuration *** |
lypinator | 0:bb348c97df44 | 152 | ========================= |
lypinator | 0:bb348c97df44 | 153 | [..] |
lypinator | 0:bb348c97df44 | 154 | (+) The PVD is used to monitor the VDD power supply by comparing it to a |
lypinator | 0:bb348c97df44 | 155 | threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). |
lypinator | 0:bb348c97df44 | 156 | (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower |
lypinator | 0:bb348c97df44 | 157 | than the PVD threshold. This event is internally connected to the EXTI |
lypinator | 0:bb348c97df44 | 158 | line16 and can generate an interrupt if enabled. This is done through |
lypinator | 0:bb348c97df44 | 159 | __HAL_PWR_PVD_EXTI_ENABLE_IT() macro. |
lypinator | 0:bb348c97df44 | 160 | (+) The PVD is stopped in Standby mode. |
lypinator | 0:bb348c97df44 | 161 | |
lypinator | 0:bb348c97df44 | 162 | *** Wake-up pin configuration *** |
lypinator | 0:bb348c97df44 | 163 | ================================ |
lypinator | 0:bb348c97df44 | 164 | [..] |
lypinator | 0:bb348c97df44 | 165 | (+) Wake-up pin is used to wake up the system from Standby mode. This pin is |
lypinator | 0:bb348c97df44 | 166 | forced in input pull-down configuration and is active on rising edges. |
lypinator | 0:bb348c97df44 | 167 | (+) There is one Wake-up pin: Wake-up Pin 1 on PA.00. |
lypinator | 0:bb348c97df44 | 168 | (++) For STM32F446xx there are two Wake-Up pins: Pin1 on PA.00 and Pin2 on PC.13 |
lypinator | 0:bb348c97df44 | 169 | (++) For STM32F410xx/STM32F412xx/STM32F413xx/STM32F423xx there are three Wake-Up pins: Pin1 on PA.00, Pin2 on PC.00 and Pin3 on PC.01 |
lypinator | 0:bb348c97df44 | 170 | |
lypinator | 0:bb348c97df44 | 171 | *** Low Power modes configuration *** |
lypinator | 0:bb348c97df44 | 172 | ===================================== |
lypinator | 0:bb348c97df44 | 173 | [..] |
lypinator | 0:bb348c97df44 | 174 | The devices feature 3 low-power modes: |
lypinator | 0:bb348c97df44 | 175 | (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running. |
lypinator | 0:bb348c97df44 | 176 | (+) Stop mode: all clocks are stopped, regulator running, regulator |
lypinator | 0:bb348c97df44 | 177 | in low power mode |
lypinator | 0:bb348c97df44 | 178 | (+) Standby mode: 1.2V domain powered off. |
lypinator | 0:bb348c97df44 | 179 | |
lypinator | 0:bb348c97df44 | 180 | *** Sleep mode *** |
lypinator | 0:bb348c97df44 | 181 | ================== |
lypinator | 0:bb348c97df44 | 182 | [..] |
lypinator | 0:bb348c97df44 | 183 | (+) Entry: |
lypinator | 0:bb348c97df44 | 184 | The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI) |
lypinator | 0:bb348c97df44 | 185 | functions with |
lypinator | 0:bb348c97df44 | 186 | (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
lypinator | 0:bb348c97df44 | 187 | (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
lypinator | 0:bb348c97df44 | 188 | |
lypinator | 0:bb348c97df44 | 189 | -@@- The Regulator parameter is not used for the STM32F4 family |
lypinator | 0:bb348c97df44 | 190 | and is kept as parameter just to maintain compatibility with the |
lypinator | 0:bb348c97df44 | 191 | lower power families (STM32L). |
lypinator | 0:bb348c97df44 | 192 | (+) Exit: |
lypinator | 0:bb348c97df44 | 193 | Any peripheral interrupt acknowledged by the nested vectored interrupt |
lypinator | 0:bb348c97df44 | 194 | controller (NVIC) can wake up the device from Sleep mode. |
lypinator | 0:bb348c97df44 | 195 | |
lypinator | 0:bb348c97df44 | 196 | *** Stop mode *** |
lypinator | 0:bb348c97df44 | 197 | ================= |
lypinator | 0:bb348c97df44 | 198 | [..] |
lypinator | 0:bb348c97df44 | 199 | In Stop mode, all clocks in the 1.2V domain are stopped, the PLL, the HSI, |
lypinator | 0:bb348c97df44 | 200 | and the HSE RC oscillators are disabled. Internal SRAM and register contents |
lypinator | 0:bb348c97df44 | 201 | are preserved. |
lypinator | 0:bb348c97df44 | 202 | The voltage regulator can be configured either in normal or low-power mode. |
lypinator | 0:bb348c97df44 | 203 | To minimize the consumption In Stop mode, FLASH can be powered off before |
lypinator | 0:bb348c97df44 | 204 | entering the Stop mode using the HAL_PWREx_EnableFlashPowerDown() function. |
lypinator | 0:bb348c97df44 | 205 | It can be switched on again by software after exiting the Stop mode using |
lypinator | 0:bb348c97df44 | 206 | the HAL_PWREx_DisableFlashPowerDown() function. |
lypinator | 0:bb348c97df44 | 207 | |
lypinator | 0:bb348c97df44 | 208 | (+) Entry: |
lypinator | 0:bb348c97df44 | 209 | The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON) |
lypinator | 0:bb348c97df44 | 210 | function with: |
lypinator | 0:bb348c97df44 | 211 | (++) Main regulator ON. |
lypinator | 0:bb348c97df44 | 212 | (++) Low Power regulator ON. |
lypinator | 0:bb348c97df44 | 213 | (+) Exit: |
lypinator | 0:bb348c97df44 | 214 | Any EXTI Line (Internal or External) configured in Interrupt/Event mode. |
lypinator | 0:bb348c97df44 | 215 | |
lypinator | 0:bb348c97df44 | 216 | *** Standby mode *** |
lypinator | 0:bb348c97df44 | 217 | ==================== |
lypinator | 0:bb348c97df44 | 218 | [..] |
lypinator | 0:bb348c97df44 | 219 | (+) |
lypinator | 0:bb348c97df44 | 220 | The Standby mode allows to achieve the lowest power consumption. It is based |
lypinator | 0:bb348c97df44 | 221 | on the Cortex-M4 deep sleep mode, with the voltage regulator disabled. |
lypinator | 0:bb348c97df44 | 222 | The 1.2V domain is consequently powered off. The PLL, the HSI oscillator and |
lypinator | 0:bb348c97df44 | 223 | the HSE oscillator are also switched off. SRAM and register contents are lost |
lypinator | 0:bb348c97df44 | 224 | except for the RTC registers, RTC backup registers, backup SRAM and Standby |
lypinator | 0:bb348c97df44 | 225 | circuitry. |
lypinator | 0:bb348c97df44 | 226 | |
lypinator | 0:bb348c97df44 | 227 | The voltage regulator is OFF. |
lypinator | 0:bb348c97df44 | 228 | |
lypinator | 0:bb348c97df44 | 229 | (++) Entry: |
lypinator | 0:bb348c97df44 | 230 | (+++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. |
lypinator | 0:bb348c97df44 | 231 | (++) Exit: |
lypinator | 0:bb348c97df44 | 232 | (+++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wake-up, |
lypinator | 0:bb348c97df44 | 233 | tamper event, time-stamp event, external reset in NRST pin, IWDG reset. |
lypinator | 0:bb348c97df44 | 234 | |
lypinator | 0:bb348c97df44 | 235 | *** Auto-wake-up (AWU) from low-power mode *** |
lypinator | 0:bb348c97df44 | 236 | ============================================= |
lypinator | 0:bb348c97df44 | 237 | [..] |
lypinator | 0:bb348c97df44 | 238 | |
lypinator | 0:bb348c97df44 | 239 | (+) The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC |
lypinator | 0:bb348c97df44 | 240 | Wake-up event, a tamper event or a time-stamp event, without depending on |
lypinator | 0:bb348c97df44 | 241 | an external interrupt (Auto-wake-up mode). |
lypinator | 0:bb348c97df44 | 242 | |
lypinator | 0:bb348c97df44 | 243 | (+) RTC auto-wake-up (AWU) from the Stop and Standby modes |
lypinator | 0:bb348c97df44 | 244 | |
lypinator | 0:bb348c97df44 | 245 | (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to |
lypinator | 0:bb348c97df44 | 246 | configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. |
lypinator | 0:bb348c97df44 | 247 | |
lypinator | 0:bb348c97df44 | 248 | (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it |
lypinator | 0:bb348c97df44 | 249 | is necessary to configure the RTC to detect the tamper or time stamp event using the |
lypinator | 0:bb348c97df44 | 250 | HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions. |
lypinator | 0:bb348c97df44 | 251 | |
lypinator | 0:bb348c97df44 | 252 | (++) To wake up from the Stop mode with an RTC Wake-up event, it is necessary to |
lypinator | 0:bb348c97df44 | 253 | configure the RTC to generate the RTC Wake-up event using the HAL_RTCEx_SetWakeUpTimer_IT() function. |
lypinator | 0:bb348c97df44 | 254 | |
lypinator | 0:bb348c97df44 | 255 | @endverbatim |
lypinator | 0:bb348c97df44 | 256 | * @{ |
lypinator | 0:bb348c97df44 | 257 | */ |
lypinator | 0:bb348c97df44 | 258 | |
lypinator | 0:bb348c97df44 | 259 | /** |
lypinator | 0:bb348c97df44 | 260 | * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). |
lypinator | 0:bb348c97df44 | 261 | * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration |
lypinator | 0:bb348c97df44 | 262 | * information for the PVD. |
lypinator | 0:bb348c97df44 | 263 | * @note Refer to the electrical characteristics of your device datasheet for |
lypinator | 0:bb348c97df44 | 264 | * more details about the voltage threshold corresponding to each |
lypinator | 0:bb348c97df44 | 265 | * detection level. |
lypinator | 0:bb348c97df44 | 266 | * @retval None |
lypinator | 0:bb348c97df44 | 267 | */ |
lypinator | 0:bb348c97df44 | 268 | void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) |
lypinator | 0:bb348c97df44 | 269 | { |
lypinator | 0:bb348c97df44 | 270 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 271 | assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); |
lypinator | 0:bb348c97df44 | 272 | assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); |
lypinator | 0:bb348c97df44 | 273 | |
lypinator | 0:bb348c97df44 | 274 | /* Set PLS[7:5] bits according to PVDLevel value */ |
lypinator | 0:bb348c97df44 | 275 | MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); |
lypinator | 0:bb348c97df44 | 276 | |
lypinator | 0:bb348c97df44 | 277 | /* Clear any previous config. Keep it clear if no event or IT mode is selected */ |
lypinator | 0:bb348c97df44 | 278 | __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); |
lypinator | 0:bb348c97df44 | 279 | __HAL_PWR_PVD_EXTI_DISABLE_IT(); |
lypinator | 0:bb348c97df44 | 280 | __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); |
lypinator | 0:bb348c97df44 | 281 | __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); |
lypinator | 0:bb348c97df44 | 282 | |
lypinator | 0:bb348c97df44 | 283 | /* Configure interrupt mode */ |
lypinator | 0:bb348c97df44 | 284 | if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) |
lypinator | 0:bb348c97df44 | 285 | { |
lypinator | 0:bb348c97df44 | 286 | __HAL_PWR_PVD_EXTI_ENABLE_IT(); |
lypinator | 0:bb348c97df44 | 287 | } |
lypinator | 0:bb348c97df44 | 288 | |
lypinator | 0:bb348c97df44 | 289 | /* Configure event mode */ |
lypinator | 0:bb348c97df44 | 290 | if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) |
lypinator | 0:bb348c97df44 | 291 | { |
lypinator | 0:bb348c97df44 | 292 | __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); |
lypinator | 0:bb348c97df44 | 293 | } |
lypinator | 0:bb348c97df44 | 294 | |
lypinator | 0:bb348c97df44 | 295 | /* Configure the edge */ |
lypinator | 0:bb348c97df44 | 296 | if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) |
lypinator | 0:bb348c97df44 | 297 | { |
lypinator | 0:bb348c97df44 | 298 | __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); |
lypinator | 0:bb348c97df44 | 299 | } |
lypinator | 0:bb348c97df44 | 300 | |
lypinator | 0:bb348c97df44 | 301 | if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) |
lypinator | 0:bb348c97df44 | 302 | { |
lypinator | 0:bb348c97df44 | 303 | __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); |
lypinator | 0:bb348c97df44 | 304 | } |
lypinator | 0:bb348c97df44 | 305 | } |
lypinator | 0:bb348c97df44 | 306 | |
lypinator | 0:bb348c97df44 | 307 | /** |
lypinator | 0:bb348c97df44 | 308 | * @brief Enables the Power Voltage Detector(PVD). |
lypinator | 0:bb348c97df44 | 309 | * @retval None |
lypinator | 0:bb348c97df44 | 310 | */ |
lypinator | 0:bb348c97df44 | 311 | void HAL_PWR_EnablePVD(void) |
lypinator | 0:bb348c97df44 | 312 | { |
lypinator | 0:bb348c97df44 | 313 | *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)ENABLE; |
lypinator | 0:bb348c97df44 | 314 | } |
lypinator | 0:bb348c97df44 | 315 | |
lypinator | 0:bb348c97df44 | 316 | /** |
lypinator | 0:bb348c97df44 | 317 | * @brief Disables the Power Voltage Detector(PVD). |
lypinator | 0:bb348c97df44 | 318 | * @retval None |
lypinator | 0:bb348c97df44 | 319 | */ |
lypinator | 0:bb348c97df44 | 320 | void HAL_PWR_DisablePVD(void) |
lypinator | 0:bb348c97df44 | 321 | { |
lypinator | 0:bb348c97df44 | 322 | *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)DISABLE; |
lypinator | 0:bb348c97df44 | 323 | } |
lypinator | 0:bb348c97df44 | 324 | |
lypinator | 0:bb348c97df44 | 325 | /** |
lypinator | 0:bb348c97df44 | 326 | * @brief Enables the Wake-up PINx functionality. |
lypinator | 0:bb348c97df44 | 327 | * @param WakeUpPinx Specifies the Power Wake-Up pin to enable. |
lypinator | 0:bb348c97df44 | 328 | * This parameter can be one of the following values: |
lypinator | 0:bb348c97df44 | 329 | * @arg PWR_WAKEUP_PIN1 |
lypinator | 0:bb348c97df44 | 330 | * @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412xx/STM32F413xx/STM32F423xx devices |
lypinator | 0:bb348c97df44 | 331 | * @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412xx/STM32F413xx/STM32F423xx devices |
lypinator | 0:bb348c97df44 | 332 | * @retval None |
lypinator | 0:bb348c97df44 | 333 | */ |
lypinator | 0:bb348c97df44 | 334 | void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) |
lypinator | 0:bb348c97df44 | 335 | { |
lypinator | 0:bb348c97df44 | 336 | /* Check the parameter */ |
lypinator | 0:bb348c97df44 | 337 | assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); |
lypinator | 0:bb348c97df44 | 338 | |
lypinator | 0:bb348c97df44 | 339 | /* Enable the wake up pin */ |
lypinator | 0:bb348c97df44 | 340 | SET_BIT(PWR->CSR, WakeUpPinx); |
lypinator | 0:bb348c97df44 | 341 | } |
lypinator | 0:bb348c97df44 | 342 | |
lypinator | 0:bb348c97df44 | 343 | /** |
lypinator | 0:bb348c97df44 | 344 | * @brief Disables the Wake-up PINx functionality. |
lypinator | 0:bb348c97df44 | 345 | * @param WakeUpPinx Specifies the Power Wake-Up pin to disable. |
lypinator | 0:bb348c97df44 | 346 | * This parameter can be one of the following values: |
lypinator | 0:bb348c97df44 | 347 | * @arg PWR_WAKEUP_PIN1 |
lypinator | 0:bb348c97df44 | 348 | * @arg PWR_WAKEUP_PIN2 available only on STM32F410xx/STM32F446xx/STM32F412xx/STM32F413xx/STM32F423xx devices |
lypinator | 0:bb348c97df44 | 349 | * @arg PWR_WAKEUP_PIN3 available only on STM32F410xx/STM32F412xx/STM32F413xx/STM32F423xx devices |
lypinator | 0:bb348c97df44 | 350 | * @retval None |
lypinator | 0:bb348c97df44 | 351 | */ |
lypinator | 0:bb348c97df44 | 352 | void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) |
lypinator | 0:bb348c97df44 | 353 | { |
lypinator | 0:bb348c97df44 | 354 | /* Check the parameter */ |
lypinator | 0:bb348c97df44 | 355 | assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); |
lypinator | 0:bb348c97df44 | 356 | |
lypinator | 0:bb348c97df44 | 357 | /* Disable the wake up pin */ |
lypinator | 0:bb348c97df44 | 358 | CLEAR_BIT(PWR->CSR, WakeUpPinx); |
lypinator | 0:bb348c97df44 | 359 | } |
lypinator | 0:bb348c97df44 | 360 | |
lypinator | 0:bb348c97df44 | 361 | /** |
lypinator | 0:bb348c97df44 | 362 | * @brief Enters Sleep mode. |
lypinator | 0:bb348c97df44 | 363 | * |
lypinator | 0:bb348c97df44 | 364 | * @note In Sleep mode, all I/O pins keep the same state as in Run mode. |
lypinator | 0:bb348c97df44 | 365 | * |
lypinator | 0:bb348c97df44 | 366 | * @note In Sleep mode, the systick is stopped to avoid exit from this mode with |
lypinator | 0:bb348c97df44 | 367 | * systick interrupt when used as time base for Timeout |
lypinator | 0:bb348c97df44 | 368 | * |
lypinator | 0:bb348c97df44 | 369 | * @param Regulator Specifies the regulator state in SLEEP mode. |
lypinator | 0:bb348c97df44 | 370 | * This parameter can be one of the following values: |
lypinator | 0:bb348c97df44 | 371 | * @arg PWR_MAINREGULATOR_ON: SLEEP mode with regulator ON |
lypinator | 0:bb348c97df44 | 372 | * @arg PWR_LOWPOWERREGULATOR_ON: SLEEP mode with low power regulator ON |
lypinator | 0:bb348c97df44 | 373 | * @note This parameter is not used for the STM32F4 family and is kept as parameter |
lypinator | 0:bb348c97df44 | 374 | * just to maintain compatibility with the lower power families. |
lypinator | 0:bb348c97df44 | 375 | * @param SLEEPEntry Specifies if SLEEP mode in entered with WFI or WFE instruction. |
lypinator | 0:bb348c97df44 | 376 | * This parameter can be one of the following values: |
lypinator | 0:bb348c97df44 | 377 | * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction |
lypinator | 0:bb348c97df44 | 378 | * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction |
lypinator | 0:bb348c97df44 | 379 | * @retval None |
lypinator | 0:bb348c97df44 | 380 | */ |
lypinator | 0:bb348c97df44 | 381 | void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) |
lypinator | 0:bb348c97df44 | 382 | { |
lypinator | 0:bb348c97df44 | 383 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 384 | assert_param(IS_PWR_REGULATOR(Regulator)); |
lypinator | 0:bb348c97df44 | 385 | assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); |
lypinator | 0:bb348c97df44 | 386 | |
lypinator | 0:bb348c97df44 | 387 | /* Clear SLEEPDEEP bit of Cortex System Control Register */ |
lypinator | 0:bb348c97df44 | 388 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
lypinator | 0:bb348c97df44 | 389 | |
lypinator | 0:bb348c97df44 | 390 | /* Select SLEEP mode entry -------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 391 | if(SLEEPEntry == PWR_SLEEPENTRY_WFI) |
lypinator | 0:bb348c97df44 | 392 | { |
lypinator | 0:bb348c97df44 | 393 | /* Request Wait For Interrupt */ |
lypinator | 0:bb348c97df44 | 394 | __WFI(); |
lypinator | 0:bb348c97df44 | 395 | } |
lypinator | 0:bb348c97df44 | 396 | else |
lypinator | 0:bb348c97df44 | 397 | { |
lypinator | 0:bb348c97df44 | 398 | /* Request Wait For Event */ |
lypinator | 0:bb348c97df44 | 399 | __SEV(); |
lypinator | 0:bb348c97df44 | 400 | __WFE(); |
lypinator | 0:bb348c97df44 | 401 | __WFE(); |
lypinator | 0:bb348c97df44 | 402 | } |
lypinator | 0:bb348c97df44 | 403 | } |
lypinator | 0:bb348c97df44 | 404 | |
lypinator | 0:bb348c97df44 | 405 | /** |
lypinator | 0:bb348c97df44 | 406 | * @brief Enters Stop mode. |
lypinator | 0:bb348c97df44 | 407 | * @note In Stop mode, all I/O pins keep the same state as in Run mode. |
lypinator | 0:bb348c97df44 | 408 | * @note When exiting Stop mode by issuing an interrupt or a wake-up event, |
lypinator | 0:bb348c97df44 | 409 | * the HSI RC oscillator is selected as system clock. |
lypinator | 0:bb348c97df44 | 410 | * @note When the voltage regulator operates in low power mode, an additional |
lypinator | 0:bb348c97df44 | 411 | * startup delay is incurred when waking up from Stop mode. |
lypinator | 0:bb348c97df44 | 412 | * By keeping the internal regulator ON during Stop mode, the consumption |
lypinator | 0:bb348c97df44 | 413 | * is higher although the startup time is reduced. |
lypinator | 0:bb348c97df44 | 414 | * @param Regulator Specifies the regulator state in Stop mode. |
lypinator | 0:bb348c97df44 | 415 | * This parameter can be one of the following values: |
lypinator | 0:bb348c97df44 | 416 | * @arg PWR_MAINREGULATOR_ON: Stop mode with regulator ON |
lypinator | 0:bb348c97df44 | 417 | * @arg PWR_LOWPOWERREGULATOR_ON: Stop mode with low power regulator ON |
lypinator | 0:bb348c97df44 | 418 | * @param STOPEntry Specifies if Stop mode in entered with WFI or WFE instruction. |
lypinator | 0:bb348c97df44 | 419 | * This parameter can be one of the following values: |
lypinator | 0:bb348c97df44 | 420 | * @arg PWR_STOPENTRY_WFI: Enter Stop mode with WFI instruction |
lypinator | 0:bb348c97df44 | 421 | * @arg PWR_STOPENTRY_WFE: Enter Stop mode with WFE instruction |
lypinator | 0:bb348c97df44 | 422 | * @retval None |
lypinator | 0:bb348c97df44 | 423 | */ |
lypinator | 0:bb348c97df44 | 424 | void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) |
lypinator | 0:bb348c97df44 | 425 | { |
lypinator | 0:bb348c97df44 | 426 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 427 | assert_param(IS_PWR_REGULATOR(Regulator)); |
lypinator | 0:bb348c97df44 | 428 | assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); |
lypinator | 0:bb348c97df44 | 429 | |
lypinator | 0:bb348c97df44 | 430 | /* Select the regulator state in Stop mode: Set PDDS and LPDS bits according to PWR_Regulator value */ |
lypinator | 0:bb348c97df44 | 431 | MODIFY_REG(PWR->CR, (PWR_CR_PDDS | PWR_CR_LPDS), Regulator); |
lypinator | 0:bb348c97df44 | 432 | |
lypinator | 0:bb348c97df44 | 433 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
lypinator | 0:bb348c97df44 | 434 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
lypinator | 0:bb348c97df44 | 435 | |
lypinator | 0:bb348c97df44 | 436 | /* Select Stop mode entry --------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 437 | if(STOPEntry == PWR_STOPENTRY_WFI) |
lypinator | 0:bb348c97df44 | 438 | { |
lypinator | 0:bb348c97df44 | 439 | /* Request Wait For Interrupt */ |
lypinator | 0:bb348c97df44 | 440 | __WFI(); |
lypinator | 0:bb348c97df44 | 441 | } |
lypinator | 0:bb348c97df44 | 442 | else |
lypinator | 0:bb348c97df44 | 443 | { |
lypinator | 0:bb348c97df44 | 444 | /* Request Wait For Event */ |
lypinator | 0:bb348c97df44 | 445 | __SEV(); |
lypinator | 0:bb348c97df44 | 446 | __WFE(); |
lypinator | 0:bb348c97df44 | 447 | __WFE(); |
lypinator | 0:bb348c97df44 | 448 | } |
lypinator | 0:bb348c97df44 | 449 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
lypinator | 0:bb348c97df44 | 450 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
lypinator | 0:bb348c97df44 | 451 | } |
lypinator | 0:bb348c97df44 | 452 | |
lypinator | 0:bb348c97df44 | 453 | /** |
lypinator | 0:bb348c97df44 | 454 | * @brief Enters Standby mode. |
lypinator | 0:bb348c97df44 | 455 | * @note In Standby mode, all I/O pins are high impedance except for: |
lypinator | 0:bb348c97df44 | 456 | * - Reset pad (still available) |
lypinator | 0:bb348c97df44 | 457 | * - RTC_AF1 pin (PC13) if configured for tamper, time-stamp, RTC |
lypinator | 0:bb348c97df44 | 458 | * Alarm out, or RTC clock calibration out. |
lypinator | 0:bb348c97df44 | 459 | * - RTC_AF2 pin (PI8) if configured for tamper or time-stamp. |
lypinator | 0:bb348c97df44 | 460 | * - WKUP pin 1 (PA0) if enabled. |
lypinator | 0:bb348c97df44 | 461 | * @retval None |
lypinator | 0:bb348c97df44 | 462 | */ |
lypinator | 0:bb348c97df44 | 463 | void HAL_PWR_EnterSTANDBYMode(void) |
lypinator | 0:bb348c97df44 | 464 | { |
lypinator | 0:bb348c97df44 | 465 | /* Select Standby mode */ |
lypinator | 0:bb348c97df44 | 466 | SET_BIT(PWR->CR, PWR_CR_PDDS); |
lypinator | 0:bb348c97df44 | 467 | |
lypinator | 0:bb348c97df44 | 468 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
lypinator | 0:bb348c97df44 | 469 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk)); |
lypinator | 0:bb348c97df44 | 470 | |
lypinator | 0:bb348c97df44 | 471 | /* This option is used to ensure that store operations are completed */ |
lypinator | 0:bb348c97df44 | 472 | #if defined ( __CC_ARM) |
lypinator | 0:bb348c97df44 | 473 | __force_stores(); |
lypinator | 0:bb348c97df44 | 474 | #endif |
lypinator | 0:bb348c97df44 | 475 | /* Request Wait For Interrupt */ |
lypinator | 0:bb348c97df44 | 476 | __WFI(); |
lypinator | 0:bb348c97df44 | 477 | } |
lypinator | 0:bb348c97df44 | 478 | |
lypinator | 0:bb348c97df44 | 479 | /** |
lypinator | 0:bb348c97df44 | 480 | * @brief This function handles the PWR PVD interrupt request. |
lypinator | 0:bb348c97df44 | 481 | * @note This API should be called under the PVD_IRQHandler(). |
lypinator | 0:bb348c97df44 | 482 | * @retval None |
lypinator | 0:bb348c97df44 | 483 | */ |
lypinator | 0:bb348c97df44 | 484 | void HAL_PWR_PVD_IRQHandler(void) |
lypinator | 0:bb348c97df44 | 485 | { |
lypinator | 0:bb348c97df44 | 486 | /* Check PWR Exti flag */ |
lypinator | 0:bb348c97df44 | 487 | if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) |
lypinator | 0:bb348c97df44 | 488 | { |
lypinator | 0:bb348c97df44 | 489 | /* PWR PVD interrupt user callback */ |
lypinator | 0:bb348c97df44 | 490 | HAL_PWR_PVDCallback(); |
lypinator | 0:bb348c97df44 | 491 | |
lypinator | 0:bb348c97df44 | 492 | /* Clear PWR Exti pending bit */ |
lypinator | 0:bb348c97df44 | 493 | __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); |
lypinator | 0:bb348c97df44 | 494 | } |
lypinator | 0:bb348c97df44 | 495 | } |
lypinator | 0:bb348c97df44 | 496 | |
lypinator | 0:bb348c97df44 | 497 | /** |
lypinator | 0:bb348c97df44 | 498 | * @brief PWR PVD interrupt callback |
lypinator | 0:bb348c97df44 | 499 | * @retval None |
lypinator | 0:bb348c97df44 | 500 | */ |
lypinator | 0:bb348c97df44 | 501 | __weak void HAL_PWR_PVDCallback(void) |
lypinator | 0:bb348c97df44 | 502 | { |
lypinator | 0:bb348c97df44 | 503 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 504 | the HAL_PWR_PVDCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 505 | */ |
lypinator | 0:bb348c97df44 | 506 | } |
lypinator | 0:bb348c97df44 | 507 | |
lypinator | 0:bb348c97df44 | 508 | /** |
lypinator | 0:bb348c97df44 | 509 | * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. |
lypinator | 0:bb348c97df44 | 510 | * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor |
lypinator | 0:bb348c97df44 | 511 | * re-enters SLEEP mode when an interruption handling is over. |
lypinator | 0:bb348c97df44 | 512 | * Setting this bit is useful when the processor is expected to run only on |
lypinator | 0:bb348c97df44 | 513 | * interruptions handling. |
lypinator | 0:bb348c97df44 | 514 | * @retval None |
lypinator | 0:bb348c97df44 | 515 | */ |
lypinator | 0:bb348c97df44 | 516 | void HAL_PWR_EnableSleepOnExit(void) |
lypinator | 0:bb348c97df44 | 517 | { |
lypinator | 0:bb348c97df44 | 518 | /* Set SLEEPONEXIT bit of Cortex System Control Register */ |
lypinator | 0:bb348c97df44 | 519 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); |
lypinator | 0:bb348c97df44 | 520 | } |
lypinator | 0:bb348c97df44 | 521 | |
lypinator | 0:bb348c97df44 | 522 | /** |
lypinator | 0:bb348c97df44 | 523 | * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. |
lypinator | 0:bb348c97df44 | 524 | * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor |
lypinator | 0:bb348c97df44 | 525 | * re-enters SLEEP mode when an interruption handling is over. |
lypinator | 0:bb348c97df44 | 526 | * @retval None |
lypinator | 0:bb348c97df44 | 527 | */ |
lypinator | 0:bb348c97df44 | 528 | void HAL_PWR_DisableSleepOnExit(void) |
lypinator | 0:bb348c97df44 | 529 | { |
lypinator | 0:bb348c97df44 | 530 | /* Clear SLEEPONEXIT bit of Cortex System Control Register */ |
lypinator | 0:bb348c97df44 | 531 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); |
lypinator | 0:bb348c97df44 | 532 | } |
lypinator | 0:bb348c97df44 | 533 | |
lypinator | 0:bb348c97df44 | 534 | /** |
lypinator | 0:bb348c97df44 | 535 | * @brief Enables CORTEX M4 SEVONPEND bit. |
lypinator | 0:bb348c97df44 | 536 | * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes |
lypinator | 0:bb348c97df44 | 537 | * WFE to wake up when an interrupt moves from inactive to pended. |
lypinator | 0:bb348c97df44 | 538 | * @retval None |
lypinator | 0:bb348c97df44 | 539 | */ |
lypinator | 0:bb348c97df44 | 540 | void HAL_PWR_EnableSEVOnPend(void) |
lypinator | 0:bb348c97df44 | 541 | { |
lypinator | 0:bb348c97df44 | 542 | /* Set SEVONPEND bit of Cortex System Control Register */ |
lypinator | 0:bb348c97df44 | 543 | SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); |
lypinator | 0:bb348c97df44 | 544 | } |
lypinator | 0:bb348c97df44 | 545 | |
lypinator | 0:bb348c97df44 | 546 | /** |
lypinator | 0:bb348c97df44 | 547 | * @brief Disables CORTEX M4 SEVONPEND bit. |
lypinator | 0:bb348c97df44 | 548 | * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes |
lypinator | 0:bb348c97df44 | 549 | * WFE to wake up when an interrupt moves from inactive to pended. |
lypinator | 0:bb348c97df44 | 550 | * @retval None |
lypinator | 0:bb348c97df44 | 551 | */ |
lypinator | 0:bb348c97df44 | 552 | void HAL_PWR_DisableSEVOnPend(void) |
lypinator | 0:bb348c97df44 | 553 | { |
lypinator | 0:bb348c97df44 | 554 | /* Clear SEVONPEND bit of Cortex System Control Register */ |
lypinator | 0:bb348c97df44 | 555 | CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); |
lypinator | 0:bb348c97df44 | 556 | } |
lypinator | 0:bb348c97df44 | 557 | |
lypinator | 0:bb348c97df44 | 558 | /** |
lypinator | 0:bb348c97df44 | 559 | * @} |
lypinator | 0:bb348c97df44 | 560 | */ |
lypinator | 0:bb348c97df44 | 561 | |
lypinator | 0:bb348c97df44 | 562 | /** |
lypinator | 0:bb348c97df44 | 563 | * @} |
lypinator | 0:bb348c97df44 | 564 | */ |
lypinator | 0:bb348c97df44 | 565 | |
lypinator | 0:bb348c97df44 | 566 | #endif /* HAL_PWR_MODULE_ENABLED */ |
lypinator | 0:bb348c97df44 | 567 | /** |
lypinator | 0:bb348c97df44 | 568 | * @} |
lypinator | 0:bb348c97df44 | 569 | */ |
lypinator | 0:bb348c97df44 | 570 | |
lypinator | 0:bb348c97df44 | 571 | /** |
lypinator | 0:bb348c97df44 | 572 | * @} |
lypinator | 0:bb348c97df44 | 573 | */ |
lypinator | 0:bb348c97df44 | 574 | |
lypinator | 0:bb348c97df44 | 575 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |