Initial commit
mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s.c@0:bb348c97df44, 2020-09-16 (annotated)
- Committer:
- lypinator
- Date:
- Wed Sep 16 01:11:49 2020 +0000
- Revision:
- 0:bb348c97df44
Added PWM
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
lypinator | 0:bb348c97df44 | 1 | /** |
lypinator | 0:bb348c97df44 | 2 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 3 | * @file stm32f4xx_hal_i2s.c |
lypinator | 0:bb348c97df44 | 4 | * @author MCD Application Team |
lypinator | 0:bb348c97df44 | 5 | * @brief I2S HAL module driver. |
lypinator | 0:bb348c97df44 | 6 | * This file provides firmware functions to manage the following |
lypinator | 0:bb348c97df44 | 7 | * functionalities of the Integrated Interchip Sound (I2S) peripheral: |
lypinator | 0:bb348c97df44 | 8 | * + Initialization and de-initialization functions |
lypinator | 0:bb348c97df44 | 9 | * + IO operation functions |
lypinator | 0:bb348c97df44 | 10 | * + Peripheral State and Errors functions |
lypinator | 0:bb348c97df44 | 11 | @verbatim |
lypinator | 0:bb348c97df44 | 12 | =============================================================================== |
lypinator | 0:bb348c97df44 | 13 | ##### How to use this driver ##### |
lypinator | 0:bb348c97df44 | 14 | =============================================================================== |
lypinator | 0:bb348c97df44 | 15 | [..] |
lypinator | 0:bb348c97df44 | 16 | The I2S HAL driver can be used as follow: |
lypinator | 0:bb348c97df44 | 17 | |
lypinator | 0:bb348c97df44 | 18 | (#) Declare a I2S_HandleTypeDef handle structure. |
lypinator | 0:bb348c97df44 | 19 | (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API: |
lypinator | 0:bb348c97df44 | 20 | (##) Enable the SPIx interface clock. |
lypinator | 0:bb348c97df44 | 21 | (##) I2S pins configuration: |
lypinator | 0:bb348c97df44 | 22 | (+++) Enable the clock for the I2S GPIOs. |
lypinator | 0:bb348c97df44 | 23 | (+++) Configure these I2S pins as alternate function pull-up. |
lypinator | 0:bb348c97df44 | 24 | (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT() |
lypinator | 0:bb348c97df44 | 25 | and HAL_I2S_Receive_IT() APIs). |
lypinator | 0:bb348c97df44 | 26 | (+++) Configure the I2Sx interrupt priority. |
lypinator | 0:bb348c97df44 | 27 | (+++) Enable the NVIC I2S IRQ handle. |
lypinator | 0:bb348c97df44 | 28 | (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA() |
lypinator | 0:bb348c97df44 | 29 | and HAL_I2S_Receive_DMA() APIs: |
lypinator | 0:bb348c97df44 | 30 | (+++) Declare a DMA handle structure for the Tx/Rx stream. |
lypinator | 0:bb348c97df44 | 31 | (+++) Enable the DMAx interface clock. |
lypinator | 0:bb348c97df44 | 32 | (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. |
lypinator | 0:bb348c97df44 | 33 | (+++) Configure the DMA Tx/Rx Stream. |
lypinator | 0:bb348c97df44 | 34 | (+++) Associate the initialized DMA handle to the I2S DMA Tx/Rx handle. |
lypinator | 0:bb348c97df44 | 35 | (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the |
lypinator | 0:bb348c97df44 | 36 | DMA Tx/Rx Stream. |
lypinator | 0:bb348c97df44 | 37 | |
lypinator | 0:bb348c97df44 | 38 | (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity |
lypinator | 0:bb348c97df44 | 39 | using HAL_I2S_Init() function. |
lypinator | 0:bb348c97df44 | 40 | |
lypinator | 0:bb348c97df44 | 41 | -@- The specific I2S interrupts (Transmission complete interrupt, |
lypinator | 0:bb348c97df44 | 42 | RXNE interrupt and Error Interrupts) will be managed using the macros |
lypinator | 0:bb348c97df44 | 43 | __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process. |
lypinator | 0:bb348c97df44 | 44 | -@- Make sure that either: |
lypinator | 0:bb348c97df44 | 45 | (+@) I2S PLL is configured or |
lypinator | 0:bb348c97df44 | 46 | (+@) External clock source is configured after setting correctly |
lypinator | 0:bb348c97df44 | 47 | the define constant EXTERNAL_CLOCK_VALUE in the stm32f4xx_hal_conf.h file. |
lypinator | 0:bb348c97df44 | 48 | |
lypinator | 0:bb348c97df44 | 49 | (#) Three operation modes are available within this driver : |
lypinator | 0:bb348c97df44 | 50 | |
lypinator | 0:bb348c97df44 | 51 | *** Polling mode IO operation *** |
lypinator | 0:bb348c97df44 | 52 | ================================= |
lypinator | 0:bb348c97df44 | 53 | [..] |
lypinator | 0:bb348c97df44 | 54 | (+) Send an amount of data in blocking mode using HAL_I2S_Transmit() |
lypinator | 0:bb348c97df44 | 55 | (+) Receive an amount of data in blocking mode using HAL_I2S_Receive() |
lypinator | 0:bb348c97df44 | 56 | |
lypinator | 0:bb348c97df44 | 57 | *** Interrupt mode IO operation *** |
lypinator | 0:bb348c97df44 | 58 | =================================== |
lypinator | 0:bb348c97df44 | 59 | [..] |
lypinator | 0:bb348c97df44 | 60 | (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT() |
lypinator | 0:bb348c97df44 | 61 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
lypinator | 0:bb348c97df44 | 62 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
lypinator | 0:bb348c97df44 | 63 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
lypinator | 0:bb348c97df44 | 64 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
lypinator | 0:bb348c97df44 | 65 | (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT() |
lypinator | 0:bb348c97df44 | 66 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
lypinator | 0:bb348c97df44 | 67 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
lypinator | 0:bb348c97df44 | 68 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
lypinator | 0:bb348c97df44 | 69 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
lypinator | 0:bb348c97df44 | 70 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
lypinator | 0:bb348c97df44 | 71 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
lypinator | 0:bb348c97df44 | 72 | |
lypinator | 0:bb348c97df44 | 73 | *** DMA mode IO operation *** |
lypinator | 0:bb348c97df44 | 74 | ============================== |
lypinator | 0:bb348c97df44 | 75 | [..] |
lypinator | 0:bb348c97df44 | 76 | (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA() |
lypinator | 0:bb348c97df44 | 77 | (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can |
lypinator | 0:bb348c97df44 | 78 | add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback |
lypinator | 0:bb348c97df44 | 79 | (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can |
lypinator | 0:bb348c97df44 | 80 | add his own code by customization of function pointer HAL_I2S_TxCpltCallback |
lypinator | 0:bb348c97df44 | 81 | (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA() |
lypinator | 0:bb348c97df44 | 82 | (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can |
lypinator | 0:bb348c97df44 | 83 | add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback |
lypinator | 0:bb348c97df44 | 84 | (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can |
lypinator | 0:bb348c97df44 | 85 | add his own code by customization of function pointer HAL_I2S_RxCpltCallback |
lypinator | 0:bb348c97df44 | 86 | (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can |
lypinator | 0:bb348c97df44 | 87 | add his own code by customization of function pointer HAL_I2S_ErrorCallback |
lypinator | 0:bb348c97df44 | 88 | (+) Pause the DMA Transfer using HAL_I2S_DMAPause() |
lypinator | 0:bb348c97df44 | 89 | (+) Resume the DMA Transfer using HAL_I2S_DMAResume() |
lypinator | 0:bb348c97df44 | 90 | (+) Stop the DMA Transfer using HAL_I2S_DMAStop() |
lypinator | 0:bb348c97df44 | 91 | |
lypinator | 0:bb348c97df44 | 92 | *** I2S HAL driver macros list *** |
lypinator | 0:bb348c97df44 | 93 | ============================================= |
lypinator | 0:bb348c97df44 | 94 | [..] |
lypinator | 0:bb348c97df44 | 95 | Below the list of most used macros in I2S HAL driver. |
lypinator | 0:bb348c97df44 | 96 | |
lypinator | 0:bb348c97df44 | 97 | (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode) |
lypinator | 0:bb348c97df44 | 98 | (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode) |
lypinator | 0:bb348c97df44 | 99 | (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts |
lypinator | 0:bb348c97df44 | 100 | (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts |
lypinator | 0:bb348c97df44 | 101 | (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not |
lypinator | 0:bb348c97df44 | 102 | |
lypinator | 0:bb348c97df44 | 103 | [..] |
lypinator | 0:bb348c97df44 | 104 | (@) You can refer to the I2S HAL driver header file for more useful macros |
lypinator | 0:bb348c97df44 | 105 | |
lypinator | 0:bb348c97df44 | 106 | @endverbatim |
lypinator | 0:bb348c97df44 | 107 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 108 | * @attention |
lypinator | 0:bb348c97df44 | 109 | * |
lypinator | 0:bb348c97df44 | 110 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
lypinator | 0:bb348c97df44 | 111 | * |
lypinator | 0:bb348c97df44 | 112 | * Redistribution and use in source and binary forms, with or without modification, |
lypinator | 0:bb348c97df44 | 113 | * are permitted provided that the following conditions are met: |
lypinator | 0:bb348c97df44 | 114 | * 1. Redistributions of source code must retain the above copyright notice, |
lypinator | 0:bb348c97df44 | 115 | * this list of conditions and the following disclaimer. |
lypinator | 0:bb348c97df44 | 116 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
lypinator | 0:bb348c97df44 | 117 | * this list of conditions and the following disclaimer in the documentation |
lypinator | 0:bb348c97df44 | 118 | * and/or other materials provided with the distribution. |
lypinator | 0:bb348c97df44 | 119 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
lypinator | 0:bb348c97df44 | 120 | * may be used to endorse or promote products derived from this software |
lypinator | 0:bb348c97df44 | 121 | * without specific prior written permission. |
lypinator | 0:bb348c97df44 | 122 | * |
lypinator | 0:bb348c97df44 | 123 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
lypinator | 0:bb348c97df44 | 124 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
lypinator | 0:bb348c97df44 | 125 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
lypinator | 0:bb348c97df44 | 126 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
lypinator | 0:bb348c97df44 | 127 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
lypinator | 0:bb348c97df44 | 128 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
lypinator | 0:bb348c97df44 | 129 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
lypinator | 0:bb348c97df44 | 130 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
lypinator | 0:bb348c97df44 | 131 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
lypinator | 0:bb348c97df44 | 132 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
lypinator | 0:bb348c97df44 | 133 | * |
lypinator | 0:bb348c97df44 | 134 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 135 | */ |
lypinator | 0:bb348c97df44 | 136 | |
lypinator | 0:bb348c97df44 | 137 | /* Includes ------------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 138 | #include "stm32f4xx_hal.h" |
lypinator | 0:bb348c97df44 | 139 | |
lypinator | 0:bb348c97df44 | 140 | /** @addtogroup STM32F4xx_HAL_Driver |
lypinator | 0:bb348c97df44 | 141 | * @{ |
lypinator | 0:bb348c97df44 | 142 | */ |
lypinator | 0:bb348c97df44 | 143 | |
lypinator | 0:bb348c97df44 | 144 | #ifdef HAL_I2S_MODULE_ENABLED |
lypinator | 0:bb348c97df44 | 145 | |
lypinator | 0:bb348c97df44 | 146 | /** @defgroup I2S I2S |
lypinator | 0:bb348c97df44 | 147 | * @brief I2S HAL module driver |
lypinator | 0:bb348c97df44 | 148 | * @{ |
lypinator | 0:bb348c97df44 | 149 | */ |
lypinator | 0:bb348c97df44 | 150 | |
lypinator | 0:bb348c97df44 | 151 | /* Private typedef -----------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 152 | /* Private define ------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 153 | /* Private macro -------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 154 | /* Private variables ---------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 155 | /* Private function prototypes -----------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 156 | |
lypinator | 0:bb348c97df44 | 157 | /** @addtogroup I2S_Private_Functions |
lypinator | 0:bb348c97df44 | 158 | * @{ |
lypinator | 0:bb348c97df44 | 159 | */ |
lypinator | 0:bb348c97df44 | 160 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 161 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 162 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 163 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 164 | static void I2S_DMAError(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 165 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s); |
lypinator | 0:bb348c97df44 | 166 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s); |
lypinator | 0:bb348c97df44 | 167 | static void I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
lypinator | 0:bb348c97df44 | 168 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, |
lypinator | 0:bb348c97df44 | 169 | uint32_t Timeout); |
lypinator | 0:bb348c97df44 | 170 | /** |
lypinator | 0:bb348c97df44 | 171 | * @} |
lypinator | 0:bb348c97df44 | 172 | */ |
lypinator | 0:bb348c97df44 | 173 | |
lypinator | 0:bb348c97df44 | 174 | /* Exported functions --------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 175 | /** @addtogroup I2S_Exported_Functions I2S Exported Functions |
lypinator | 0:bb348c97df44 | 176 | * @{ |
lypinator | 0:bb348c97df44 | 177 | */ |
lypinator | 0:bb348c97df44 | 178 | |
lypinator | 0:bb348c97df44 | 179 | /** @addtogroup I2S_Exported_Functions_Group1 |
lypinator | 0:bb348c97df44 | 180 | * @brief Initialization and Configuration functions |
lypinator | 0:bb348c97df44 | 181 | * |
lypinator | 0:bb348c97df44 | 182 | @verbatim |
lypinator | 0:bb348c97df44 | 183 | =============================================================================== |
lypinator | 0:bb348c97df44 | 184 | ##### Initialization and de-initialization functions ##### |
lypinator | 0:bb348c97df44 | 185 | =============================================================================== |
lypinator | 0:bb348c97df44 | 186 | [..] This subsection provides a set of functions allowing to initialize and |
lypinator | 0:bb348c97df44 | 187 | de-initialize the I2Sx peripheral in simplex mode: |
lypinator | 0:bb348c97df44 | 188 | |
lypinator | 0:bb348c97df44 | 189 | (+) User must Implement HAL_I2S_MspInit() function in which he configures |
lypinator | 0:bb348c97df44 | 190 | all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). |
lypinator | 0:bb348c97df44 | 191 | |
lypinator | 0:bb348c97df44 | 192 | (+) Call the function HAL_I2S_Init() to configure the selected device with |
lypinator | 0:bb348c97df44 | 193 | the selected configuration: |
lypinator | 0:bb348c97df44 | 194 | (++) Mode |
lypinator | 0:bb348c97df44 | 195 | (++) Standard |
lypinator | 0:bb348c97df44 | 196 | (++) Data Format |
lypinator | 0:bb348c97df44 | 197 | (++) MCLK Output |
lypinator | 0:bb348c97df44 | 198 | (++) Audio frequency |
lypinator | 0:bb348c97df44 | 199 | (++) Polarity |
lypinator | 0:bb348c97df44 | 200 | (++) Full duplex mode |
lypinator | 0:bb348c97df44 | 201 | |
lypinator | 0:bb348c97df44 | 202 | (+) Call the function HAL_I2S_DeInit() to restore the default configuration |
lypinator | 0:bb348c97df44 | 203 | of the selected I2Sx peripheral. |
lypinator | 0:bb348c97df44 | 204 | @endverbatim |
lypinator | 0:bb348c97df44 | 205 | * @{ |
lypinator | 0:bb348c97df44 | 206 | */ |
lypinator | 0:bb348c97df44 | 207 | |
lypinator | 0:bb348c97df44 | 208 | /** |
lypinator | 0:bb348c97df44 | 209 | * @brief Initializes the I2S according to the specified parameters |
lypinator | 0:bb348c97df44 | 210 | * in the I2S_InitTypeDef and create the associated handle. |
lypinator | 0:bb348c97df44 | 211 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 212 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 213 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 214 | */ |
lypinator | 0:bb348c97df44 | 215 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 216 | { |
lypinator | 0:bb348c97df44 | 217 | uint32_t tmpreg = 0U, i2sdiv = 2U, i2sodd = 0U, packetlength = 16U; |
lypinator | 0:bb348c97df44 | 218 | uint32_t tmp = 0U, i2sclk = 0U; |
lypinator | 0:bb348c97df44 | 219 | |
lypinator | 0:bb348c97df44 | 220 | /* Check the I2S handle allocation */ |
lypinator | 0:bb348c97df44 | 221 | if(hi2s == NULL) |
lypinator | 0:bb348c97df44 | 222 | { |
lypinator | 0:bb348c97df44 | 223 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 224 | } |
lypinator | 0:bb348c97df44 | 225 | |
lypinator | 0:bb348c97df44 | 226 | /* Check the I2S parameters */ |
lypinator | 0:bb348c97df44 | 227 | assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance)); |
lypinator | 0:bb348c97df44 | 228 | assert_param(IS_I2S_MODE(hi2s->Init.Mode)); |
lypinator | 0:bb348c97df44 | 229 | assert_param(IS_I2S_STANDARD(hi2s->Init.Standard)); |
lypinator | 0:bb348c97df44 | 230 | assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat)); |
lypinator | 0:bb348c97df44 | 231 | assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput)); |
lypinator | 0:bb348c97df44 | 232 | assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq)); |
lypinator | 0:bb348c97df44 | 233 | assert_param(IS_I2S_CPOL(hi2s->Init.CPOL)); |
lypinator | 0:bb348c97df44 | 234 | assert_param(IS_I2S_CLOCKSOURCE(hi2s->Init.ClockSource)); |
lypinator | 0:bb348c97df44 | 235 | |
lypinator | 0:bb348c97df44 | 236 | hi2s->State = HAL_I2S_STATE_BUSY; |
lypinator | 0:bb348c97df44 | 237 | |
lypinator | 0:bb348c97df44 | 238 | /* Initialize Default I2S IrqHandler ISR */ |
lypinator | 0:bb348c97df44 | 239 | hi2s->IrqHandlerISR = I2S_IRQHandler; |
lypinator | 0:bb348c97df44 | 240 | |
lypinator | 0:bb348c97df44 | 241 | /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ |
lypinator | 0:bb348c97df44 | 242 | HAL_I2S_MspInit(hi2s); |
lypinator | 0:bb348c97df44 | 243 | |
lypinator | 0:bb348c97df44 | 244 | /*----------------------- SPIx I2SCFGR & I2SPR Configuration ---------------*/ |
lypinator | 0:bb348c97df44 | 245 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ |
lypinator | 0:bb348c97df44 | 246 | CLEAR_BIT(hi2s->Instance->I2SCFGR,(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \ |
lypinator | 0:bb348c97df44 | 247 | SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \ |
lypinator | 0:bb348c97df44 | 248 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD)); |
lypinator | 0:bb348c97df44 | 249 | hi2s->Instance->I2SPR = 0x0002U; |
lypinator | 0:bb348c97df44 | 250 | |
lypinator | 0:bb348c97df44 | 251 | /* Get the I2SCFGR register value */ |
lypinator | 0:bb348c97df44 | 252 | tmpreg = hi2s->Instance->I2SCFGR; |
lypinator | 0:bb348c97df44 | 253 | |
lypinator | 0:bb348c97df44 | 254 | /* If the default frequency value has to be written, reinitialize i2sdiv and i2sodd */ |
lypinator | 0:bb348c97df44 | 255 | /* If the requested audio frequency is not the default, compute the prescaler */ |
lypinator | 0:bb348c97df44 | 256 | if(hi2s->Init.AudioFreq != I2S_AUDIOFREQ_DEFAULT) |
lypinator | 0:bb348c97df44 | 257 | { |
lypinator | 0:bb348c97df44 | 258 | /* Check the frame length (For the Prescaler computing) *******************/ |
lypinator | 0:bb348c97df44 | 259 | /* Set I2S Packet Length value*/ |
lypinator | 0:bb348c97df44 | 260 | if(hi2s->Init.DataFormat != I2S_DATAFORMAT_16B) |
lypinator | 0:bb348c97df44 | 261 | { |
lypinator | 0:bb348c97df44 | 262 | /* Packet length is 32 bits */ |
lypinator | 0:bb348c97df44 | 263 | packetlength = 32U; |
lypinator | 0:bb348c97df44 | 264 | } |
lypinator | 0:bb348c97df44 | 265 | else |
lypinator | 0:bb348c97df44 | 266 | { |
lypinator | 0:bb348c97df44 | 267 | /* Packet length is 16 bits */ |
lypinator | 0:bb348c97df44 | 268 | packetlength = 16U; |
lypinator | 0:bb348c97df44 | 269 | } |
lypinator | 0:bb348c97df44 | 270 | |
lypinator | 0:bb348c97df44 | 271 | /* I2S standard */ |
lypinator | 0:bb348c97df44 | 272 | if(hi2s->Init.Standard <= I2S_STANDARD_LSB) |
lypinator | 0:bb348c97df44 | 273 | { |
lypinator | 0:bb348c97df44 | 274 | /* In I2S standard packet lenght is multiplied by 2 */ |
lypinator | 0:bb348c97df44 | 275 | packetlength = packetlength * 2U; |
lypinator | 0:bb348c97df44 | 276 | } |
lypinator | 0:bb348c97df44 | 277 | |
lypinator | 0:bb348c97df44 | 278 | /* Get I2S source Clock frequency from RCC ********************************/ |
lypinator | 0:bb348c97df44 | 279 | #if defined(I2S_APB1_APB2_FEATURE) |
lypinator | 0:bb348c97df44 | 280 | if(IS_I2S_APB1_INSTANCE(hi2s->Instance)) |
lypinator | 0:bb348c97df44 | 281 | { |
lypinator | 0:bb348c97df44 | 282 | i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S_APB1); |
lypinator | 0:bb348c97df44 | 283 | } |
lypinator | 0:bb348c97df44 | 284 | else |
lypinator | 0:bb348c97df44 | 285 | { |
lypinator | 0:bb348c97df44 | 286 | i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S_APB2); |
lypinator | 0:bb348c97df44 | 287 | } |
lypinator | 0:bb348c97df44 | 288 | #else |
lypinator | 0:bb348c97df44 | 289 | i2sclk = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_I2S); |
lypinator | 0:bb348c97df44 | 290 | #endif |
lypinator | 0:bb348c97df44 | 291 | |
lypinator | 0:bb348c97df44 | 292 | /* Compute the Real divider depending on the MCLK output state, with a floating point */ |
lypinator | 0:bb348c97df44 | 293 | if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE) |
lypinator | 0:bb348c97df44 | 294 | { |
lypinator | 0:bb348c97df44 | 295 | /* MCLK output is enabled */ |
lypinator | 0:bb348c97df44 | 296 | if (hi2s->Init.DataFormat != I2S_DATAFORMAT_16B) |
lypinator | 0:bb348c97df44 | 297 | { |
lypinator | 0:bb348c97df44 | 298 | tmp = (uint32_t)(((((i2sclk / (packetlength*4)) * 10) / hi2s->Init.AudioFreq)) + 5); |
lypinator | 0:bb348c97df44 | 299 | } |
lypinator | 0:bb348c97df44 | 300 | else |
lypinator | 0:bb348c97df44 | 301 | { |
lypinator | 0:bb348c97df44 | 302 | tmp = (uint32_t)(((((i2sclk / (packetlength*8)) * 10) / hi2s->Init.AudioFreq)) + 5); |
lypinator | 0:bb348c97df44 | 303 | } |
lypinator | 0:bb348c97df44 | 304 | } |
lypinator | 0:bb348c97df44 | 305 | else |
lypinator | 0:bb348c97df44 | 306 | { |
lypinator | 0:bb348c97df44 | 307 | /* MCLK output is disabled */ |
lypinator | 0:bb348c97df44 | 308 | tmp = (uint32_t)(((((i2sclk / packetlength) *10 ) / hi2s->Init.AudioFreq)) + 5); |
lypinator | 0:bb348c97df44 | 309 | } |
lypinator | 0:bb348c97df44 | 310 | |
lypinator | 0:bb348c97df44 | 311 | /* Remove the flatting point */ |
lypinator | 0:bb348c97df44 | 312 | tmp = tmp / 10U; |
lypinator | 0:bb348c97df44 | 313 | |
lypinator | 0:bb348c97df44 | 314 | /* Check the parity of the divider */ |
lypinator | 0:bb348c97df44 | 315 | i2sodd = (uint16_t)(tmp & (uint16_t)1U); |
lypinator | 0:bb348c97df44 | 316 | |
lypinator | 0:bb348c97df44 | 317 | /* Compute the i2sdiv prescaler */ |
lypinator | 0:bb348c97df44 | 318 | i2sdiv = (uint16_t)((tmp - i2sodd) / 2U); |
lypinator | 0:bb348c97df44 | 319 | |
lypinator | 0:bb348c97df44 | 320 | /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ |
lypinator | 0:bb348c97df44 | 321 | i2sodd = (uint32_t) (i2sodd << 8U); |
lypinator | 0:bb348c97df44 | 322 | } |
lypinator | 0:bb348c97df44 | 323 | |
lypinator | 0:bb348c97df44 | 324 | /* Test if the divider is 1 or 0 or greater than 0xFF */ |
lypinator | 0:bb348c97df44 | 325 | if((i2sdiv < 2U) || (i2sdiv > 0xFFU)) |
lypinator | 0:bb348c97df44 | 326 | { |
lypinator | 0:bb348c97df44 | 327 | /* Set the default values */ |
lypinator | 0:bb348c97df44 | 328 | i2sdiv = 2U; |
lypinator | 0:bb348c97df44 | 329 | i2sodd = 0U; |
lypinator | 0:bb348c97df44 | 330 | |
lypinator | 0:bb348c97df44 | 331 | /* Set the error code and execute error callback*/ |
lypinator | 0:bb348c97df44 | 332 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_PRESCALER); |
lypinator | 0:bb348c97df44 | 333 | HAL_I2S_ErrorCallback(hi2s); |
lypinator | 0:bb348c97df44 | 334 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 335 | } |
lypinator | 0:bb348c97df44 | 336 | |
lypinator | 0:bb348c97df44 | 337 | /* Write to SPIx I2SPR register the computed value */ |
lypinator | 0:bb348c97df44 | 338 | hi2s->Instance->I2SPR = (uint32_t)((uint32_t)i2sdiv | (uint32_t)(i2sodd | (uint32_t)hi2s->Init.MCLKOutput)); |
lypinator | 0:bb348c97df44 | 339 | |
lypinator | 0:bb348c97df44 | 340 | /* Configure the I2S with the I2S_InitStruct values */ |
lypinator | 0:bb348c97df44 | 341 | tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(hi2s->Init.Mode | \ |
lypinator | 0:bb348c97df44 | 342 | (uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \ |
lypinator | 0:bb348c97df44 | 343 | (uint16_t)hi2s->Init.CPOL)))); |
lypinator | 0:bb348c97df44 | 344 | |
lypinator | 0:bb348c97df44 | 345 | #if defined(SPI_I2SCFGR_ASTRTEN) |
lypinator | 0:bb348c97df44 | 346 | if ((hi2s->Init.Standard == I2S_STANDARD_PCM_SHORT) ||(hi2s->Init.Standard == I2S_STANDARD_PCM_LONG)) |
lypinator | 0:bb348c97df44 | 347 | { |
lypinator | 0:bb348c97df44 | 348 | /* Write to SPIx I2SCFGR */ |
lypinator | 0:bb348c97df44 | 349 | WRITE_REG(hi2s->Instance->I2SCFGR,(tmpreg | SPI_I2SCFGR_ASTRTEN)); |
lypinator | 0:bb348c97df44 | 350 | } |
lypinator | 0:bb348c97df44 | 351 | else |
lypinator | 0:bb348c97df44 | 352 | { |
lypinator | 0:bb348c97df44 | 353 | /* Write to SPIx I2SCFGR */ |
lypinator | 0:bb348c97df44 | 354 | WRITE_REG(hi2s->Instance->I2SCFGR,tmpreg); |
lypinator | 0:bb348c97df44 | 355 | } |
lypinator | 0:bb348c97df44 | 356 | #else |
lypinator | 0:bb348c97df44 | 357 | /* Write to SPIx I2SCFGR */ |
lypinator | 0:bb348c97df44 | 358 | WRITE_REG(hi2s->Instance->I2SCFGR, tmpreg); |
lypinator | 0:bb348c97df44 | 359 | #endif |
lypinator | 0:bb348c97df44 | 360 | |
lypinator | 0:bb348c97df44 | 361 | #if defined (SPI_I2S_FULLDUPLEX_SUPPORT) |
lypinator | 0:bb348c97df44 | 362 | |
lypinator | 0:bb348c97df44 | 363 | /* Configure the I2S extended if the full duplex mode is enabled */ |
lypinator | 0:bb348c97df44 | 364 | assert_param(IS_I2S_FULLDUPLEX_MODE(hi2s->Init.FullDuplexMode)); |
lypinator | 0:bb348c97df44 | 365 | |
lypinator | 0:bb348c97df44 | 366 | if(hi2s->Init.FullDuplexMode == I2S_FULLDUPLEXMODE_ENABLE) |
lypinator | 0:bb348c97df44 | 367 | { |
lypinator | 0:bb348c97df44 | 368 | /* Set FullDuplex I2S IrqHandler ISR if FULLDUPLEXMODE is enabled */ |
lypinator | 0:bb348c97df44 | 369 | hi2s->IrqHandlerISR = HAL_I2SEx_FullDuplex_IRQHandler; |
lypinator | 0:bb348c97df44 | 370 | |
lypinator | 0:bb348c97df44 | 371 | /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ |
lypinator | 0:bb348c97df44 | 372 | CLEAR_BIT(I2SxEXT(hi2s->Instance)->I2SCFGR,(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \ |
lypinator | 0:bb348c97df44 | 373 | SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \ |
lypinator | 0:bb348c97df44 | 374 | SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD)); |
lypinator | 0:bb348c97df44 | 375 | I2SxEXT(hi2s->Instance)->I2SPR = 2U; |
lypinator | 0:bb348c97df44 | 376 | |
lypinator | 0:bb348c97df44 | 377 | /* Get the I2SCFGR register value */ |
lypinator | 0:bb348c97df44 | 378 | tmpreg = I2SxEXT(hi2s->Instance)->I2SCFGR; |
lypinator | 0:bb348c97df44 | 379 | |
lypinator | 0:bb348c97df44 | 380 | /* Get the mode to be configured for the extended I2S */ |
lypinator | 0:bb348c97df44 | 381 | if((hi2s->Init.Mode == I2S_MODE_MASTER_TX) || (hi2s->Init.Mode == I2S_MODE_SLAVE_TX)) |
lypinator | 0:bb348c97df44 | 382 | { |
lypinator | 0:bb348c97df44 | 383 | tmp = I2S_MODE_SLAVE_RX; |
lypinator | 0:bb348c97df44 | 384 | } |
lypinator | 0:bb348c97df44 | 385 | else /* I2S_MODE_MASTER_RX || I2S_MODE_SLAVE_RX */ |
lypinator | 0:bb348c97df44 | 386 | { |
lypinator | 0:bb348c97df44 | 387 | tmp = I2S_MODE_SLAVE_TX; |
lypinator | 0:bb348c97df44 | 388 | } |
lypinator | 0:bb348c97df44 | 389 | |
lypinator | 0:bb348c97df44 | 390 | /* Configure the I2S Slave with the I2S Master parameter values */ |
lypinator | 0:bb348c97df44 | 391 | tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(tmp | \ |
lypinator | 0:bb348c97df44 | 392 | (uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \ |
lypinator | 0:bb348c97df44 | 393 | (uint16_t)hi2s->Init.CPOL)))); |
lypinator | 0:bb348c97df44 | 394 | |
lypinator | 0:bb348c97df44 | 395 | /* Write to SPIx I2SCFGR */ |
lypinator | 0:bb348c97df44 | 396 | WRITE_REG(I2SxEXT(hi2s->Instance)->I2SCFGR,tmpreg); |
lypinator | 0:bb348c97df44 | 397 | } |
lypinator | 0:bb348c97df44 | 398 | #endif /* SPI_I2S_FULLDUPLEX_SUPPORT */ |
lypinator | 0:bb348c97df44 | 399 | |
lypinator | 0:bb348c97df44 | 400 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 401 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 402 | |
lypinator | 0:bb348c97df44 | 403 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 404 | } |
lypinator | 0:bb348c97df44 | 405 | |
lypinator | 0:bb348c97df44 | 406 | /** |
lypinator | 0:bb348c97df44 | 407 | * @brief DeInitializes the I2S peripheral |
lypinator | 0:bb348c97df44 | 408 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 409 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 410 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 411 | */ |
lypinator | 0:bb348c97df44 | 412 | HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 413 | { |
lypinator | 0:bb348c97df44 | 414 | /* Check the I2S handle allocation */ |
lypinator | 0:bb348c97df44 | 415 | if(hi2s == NULL) |
lypinator | 0:bb348c97df44 | 416 | { |
lypinator | 0:bb348c97df44 | 417 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 418 | } |
lypinator | 0:bb348c97df44 | 419 | |
lypinator | 0:bb348c97df44 | 420 | hi2s->State = HAL_I2S_STATE_BUSY; |
lypinator | 0:bb348c97df44 | 421 | |
lypinator | 0:bb348c97df44 | 422 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ |
lypinator | 0:bb348c97df44 | 423 | HAL_I2S_MspDeInit(hi2s); |
lypinator | 0:bb348c97df44 | 424 | |
lypinator | 0:bb348c97df44 | 425 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 426 | hi2s->State = HAL_I2S_STATE_RESET; |
lypinator | 0:bb348c97df44 | 427 | |
lypinator | 0:bb348c97df44 | 428 | /* Release Lock */ |
lypinator | 0:bb348c97df44 | 429 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 430 | |
lypinator | 0:bb348c97df44 | 431 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 432 | } |
lypinator | 0:bb348c97df44 | 433 | |
lypinator | 0:bb348c97df44 | 434 | /** |
lypinator | 0:bb348c97df44 | 435 | * @brief I2S MSP Init |
lypinator | 0:bb348c97df44 | 436 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 437 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 438 | * @retval None |
lypinator | 0:bb348c97df44 | 439 | */ |
lypinator | 0:bb348c97df44 | 440 | __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 441 | { |
lypinator | 0:bb348c97df44 | 442 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 443 | UNUSED(hi2s); |
lypinator | 0:bb348c97df44 | 444 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 445 | the HAL_I2S_MspInit could be implemented in the user file |
lypinator | 0:bb348c97df44 | 446 | */ |
lypinator | 0:bb348c97df44 | 447 | } |
lypinator | 0:bb348c97df44 | 448 | |
lypinator | 0:bb348c97df44 | 449 | /** |
lypinator | 0:bb348c97df44 | 450 | * @brief I2S MSP DeInit |
lypinator | 0:bb348c97df44 | 451 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 452 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 453 | * @retval None |
lypinator | 0:bb348c97df44 | 454 | */ |
lypinator | 0:bb348c97df44 | 455 | __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 456 | { |
lypinator | 0:bb348c97df44 | 457 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 458 | UNUSED(hi2s); |
lypinator | 0:bb348c97df44 | 459 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 460 | the HAL_I2S_MspDeInit could be implemented in the user file |
lypinator | 0:bb348c97df44 | 461 | */ |
lypinator | 0:bb348c97df44 | 462 | } |
lypinator | 0:bb348c97df44 | 463 | /** |
lypinator | 0:bb348c97df44 | 464 | * @} |
lypinator | 0:bb348c97df44 | 465 | */ |
lypinator | 0:bb348c97df44 | 466 | |
lypinator | 0:bb348c97df44 | 467 | /** @addtogroup I2S_Exported_Functions_Group2 |
lypinator | 0:bb348c97df44 | 468 | * @brief Data transfers functions |
lypinator | 0:bb348c97df44 | 469 | * |
lypinator | 0:bb348c97df44 | 470 | @verbatim |
lypinator | 0:bb348c97df44 | 471 | =============================================================================== |
lypinator | 0:bb348c97df44 | 472 | ##### IO operation functions ##### |
lypinator | 0:bb348c97df44 | 473 | =============================================================================== |
lypinator | 0:bb348c97df44 | 474 | [..] |
lypinator | 0:bb348c97df44 | 475 | This subsection provides a set of functions allowing to manage the I2S data |
lypinator | 0:bb348c97df44 | 476 | transfers. |
lypinator | 0:bb348c97df44 | 477 | |
lypinator | 0:bb348c97df44 | 478 | (#) There are two modes of transfer: |
lypinator | 0:bb348c97df44 | 479 | (++) Blocking mode : The communication is performed in the polling mode. |
lypinator | 0:bb348c97df44 | 480 | The status of all data processing is returned by the same function |
lypinator | 0:bb348c97df44 | 481 | after finishing transfer. |
lypinator | 0:bb348c97df44 | 482 | (++) No-Blocking mode : The communication is performed using Interrupts |
lypinator | 0:bb348c97df44 | 483 | or DMA. These functions return the status of the transfer startup. |
lypinator | 0:bb348c97df44 | 484 | The end of the data processing will be indicated through the |
lypinator | 0:bb348c97df44 | 485 | dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when |
lypinator | 0:bb348c97df44 | 486 | using DMA mode. |
lypinator | 0:bb348c97df44 | 487 | |
lypinator | 0:bb348c97df44 | 488 | (#) Blocking mode functions are : |
lypinator | 0:bb348c97df44 | 489 | (++) HAL_I2S_Transmit() |
lypinator | 0:bb348c97df44 | 490 | (++) HAL_I2S_Receive() |
lypinator | 0:bb348c97df44 | 491 | |
lypinator | 0:bb348c97df44 | 492 | (#) No-Blocking mode functions with Interrupt are : |
lypinator | 0:bb348c97df44 | 493 | (++) HAL_I2S_Transmit_IT() |
lypinator | 0:bb348c97df44 | 494 | (++) HAL_I2S_Receive_IT() |
lypinator | 0:bb348c97df44 | 495 | |
lypinator | 0:bb348c97df44 | 496 | (#) No-Blocking mode functions with DMA are : |
lypinator | 0:bb348c97df44 | 497 | (++) HAL_I2S_Transmit_DMA() |
lypinator | 0:bb348c97df44 | 498 | (++) HAL_I2S_Receive_DMA() |
lypinator | 0:bb348c97df44 | 499 | |
lypinator | 0:bb348c97df44 | 500 | (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: |
lypinator | 0:bb348c97df44 | 501 | (++) HAL_I2S_TxCpltCallback() |
lypinator | 0:bb348c97df44 | 502 | (++) HAL_I2S_RxCpltCallback() |
lypinator | 0:bb348c97df44 | 503 | (++) HAL_I2S_ErrorCallback() |
lypinator | 0:bb348c97df44 | 504 | |
lypinator | 0:bb348c97df44 | 505 | @endverbatim |
lypinator | 0:bb348c97df44 | 506 | * @{ |
lypinator | 0:bb348c97df44 | 507 | */ |
lypinator | 0:bb348c97df44 | 508 | |
lypinator | 0:bb348c97df44 | 509 | /** |
lypinator | 0:bb348c97df44 | 510 | * @brief Transmit an amount of data in blocking mode |
lypinator | 0:bb348c97df44 | 511 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 512 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 513 | * @param pData a 16-bit pointer to data buffer. |
lypinator | 0:bb348c97df44 | 514 | * @param Size number of data sample to be sent: |
lypinator | 0:bb348c97df44 | 515 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
lypinator | 0:bb348c97df44 | 516 | * configuration phase, the Size parameter means the number of 16-bit data length |
lypinator | 0:bb348c97df44 | 517 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
lypinator | 0:bb348c97df44 | 518 | * the Size parameter means the number of 16-bit data length. |
lypinator | 0:bb348c97df44 | 519 | * @param Timeout Timeout duration |
lypinator | 0:bb348c97df44 | 520 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
lypinator | 0:bb348c97df44 | 521 | * between Master and Slave(example: audio streaming). |
lypinator | 0:bb348c97df44 | 522 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 523 | */ |
lypinator | 0:bb348c97df44 | 524 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
lypinator | 0:bb348c97df44 | 525 | { |
lypinator | 0:bb348c97df44 | 526 | uint32_t tmp1 = 0U; |
lypinator | 0:bb348c97df44 | 527 | |
lypinator | 0:bb348c97df44 | 528 | if((pData == NULL ) || (Size == 0U)) |
lypinator | 0:bb348c97df44 | 529 | { |
lypinator | 0:bb348c97df44 | 530 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 531 | } |
lypinator | 0:bb348c97df44 | 532 | |
lypinator | 0:bb348c97df44 | 533 | if(hi2s->State == HAL_I2S_STATE_READY) |
lypinator | 0:bb348c97df44 | 534 | { |
lypinator | 0:bb348c97df44 | 535 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
lypinator | 0:bb348c97df44 | 536 | |
lypinator | 0:bb348c97df44 | 537 | if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B)) |
lypinator | 0:bb348c97df44 | 538 | { |
lypinator | 0:bb348c97df44 | 539 | hi2s->TxXferSize = (Size << 1U); |
lypinator | 0:bb348c97df44 | 540 | hi2s->TxXferCount = (Size << 1U); |
lypinator | 0:bb348c97df44 | 541 | } |
lypinator | 0:bb348c97df44 | 542 | else |
lypinator | 0:bb348c97df44 | 543 | { |
lypinator | 0:bb348c97df44 | 544 | hi2s->TxXferSize = Size; |
lypinator | 0:bb348c97df44 | 545 | hi2s->TxXferCount = Size; |
lypinator | 0:bb348c97df44 | 546 | } |
lypinator | 0:bb348c97df44 | 547 | |
lypinator | 0:bb348c97df44 | 548 | /* Process Locked */ |
lypinator | 0:bb348c97df44 | 549 | __HAL_LOCK(hi2s); |
lypinator | 0:bb348c97df44 | 550 | |
lypinator | 0:bb348c97df44 | 551 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 552 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
lypinator | 0:bb348c97df44 | 553 | |
lypinator | 0:bb348c97df44 | 554 | /* Check if the I2S is already enabled */ |
lypinator | 0:bb348c97df44 | 555 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
lypinator | 0:bb348c97df44 | 556 | { |
lypinator | 0:bb348c97df44 | 557 | /* Enable I2S peripheral */ |
lypinator | 0:bb348c97df44 | 558 | __HAL_I2S_ENABLE(hi2s); |
lypinator | 0:bb348c97df44 | 559 | } |
lypinator | 0:bb348c97df44 | 560 | |
lypinator | 0:bb348c97df44 | 561 | while(hi2s->TxXferCount > 0U) |
lypinator | 0:bb348c97df44 | 562 | { |
lypinator | 0:bb348c97df44 | 563 | hi2s->Instance->DR = (*pData++); |
lypinator | 0:bb348c97df44 | 564 | hi2s->TxXferCount--; |
lypinator | 0:bb348c97df44 | 565 | |
lypinator | 0:bb348c97df44 | 566 | /* Wait until TXE flag is set */ |
lypinator | 0:bb348c97df44 | 567 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout) != HAL_OK) |
lypinator | 0:bb348c97df44 | 568 | { |
lypinator | 0:bb348c97df44 | 569 | /* Set the error code and execute error callback*/ |
lypinator | 0:bb348c97df44 | 570 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_TIMEOUT); |
lypinator | 0:bb348c97df44 | 571 | HAL_I2S_ErrorCallback(hi2s); |
lypinator | 0:bb348c97df44 | 572 | return HAL_TIMEOUT; |
lypinator | 0:bb348c97df44 | 573 | } |
lypinator | 0:bb348c97df44 | 574 | |
lypinator | 0:bb348c97df44 | 575 | /* Check if an underrun occurs */ |
lypinator | 0:bb348c97df44 | 576 | if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET) |
lypinator | 0:bb348c97df44 | 577 | { |
lypinator | 0:bb348c97df44 | 578 | /* Clear underrun flag */ |
lypinator | 0:bb348c97df44 | 579 | __HAL_I2S_CLEAR_UDRFLAG(hi2s); |
lypinator | 0:bb348c97df44 | 580 | /* Set the I2S State ready */ |
lypinator | 0:bb348c97df44 | 581 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 582 | |
lypinator | 0:bb348c97df44 | 583 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 584 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 585 | |
lypinator | 0:bb348c97df44 | 586 | /* Set the error code and execute error callback*/ |
lypinator | 0:bb348c97df44 | 587 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR); |
lypinator | 0:bb348c97df44 | 588 | HAL_I2S_ErrorCallback(hi2s); |
lypinator | 0:bb348c97df44 | 589 | |
lypinator | 0:bb348c97df44 | 590 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 591 | } |
lypinator | 0:bb348c97df44 | 592 | } |
lypinator | 0:bb348c97df44 | 593 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 594 | |
lypinator | 0:bb348c97df44 | 595 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 596 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 597 | |
lypinator | 0:bb348c97df44 | 598 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 599 | } |
lypinator | 0:bb348c97df44 | 600 | else |
lypinator | 0:bb348c97df44 | 601 | { |
lypinator | 0:bb348c97df44 | 602 | return HAL_BUSY; |
lypinator | 0:bb348c97df44 | 603 | } |
lypinator | 0:bb348c97df44 | 604 | } |
lypinator | 0:bb348c97df44 | 605 | |
lypinator | 0:bb348c97df44 | 606 | /** |
lypinator | 0:bb348c97df44 | 607 | * @brief Receive an amount of data in blocking mode |
lypinator | 0:bb348c97df44 | 608 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 609 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 610 | * @param pData a 16-bit pointer to data buffer |
lypinator | 0:bb348c97df44 | 611 | * @param Size number of data sample to be sent: |
lypinator | 0:bb348c97df44 | 612 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
lypinator | 0:bb348c97df44 | 613 | * configuration phase, the Size parameter means the number of 16-bit data length |
lypinator | 0:bb348c97df44 | 614 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
lypinator | 0:bb348c97df44 | 615 | * the Size parameter means the number of 16-bit data length. |
lypinator | 0:bb348c97df44 | 616 | * @param Timeout Timeout duration |
lypinator | 0:bb348c97df44 | 617 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
lypinator | 0:bb348c97df44 | 618 | * between Master and Slave(example: audio streaming) |
lypinator | 0:bb348c97df44 | 619 | * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate |
lypinator | 0:bb348c97df44 | 620 | * in continuous way and as the I2S is not disabled at the end of the I2S transaction |
lypinator | 0:bb348c97df44 | 621 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 622 | */ |
lypinator | 0:bb348c97df44 | 623 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout) |
lypinator | 0:bb348c97df44 | 624 | { |
lypinator | 0:bb348c97df44 | 625 | uint32_t tmp1 = 0U; |
lypinator | 0:bb348c97df44 | 626 | |
lypinator | 0:bb348c97df44 | 627 | if((pData == NULL ) || (Size == 0U)) |
lypinator | 0:bb348c97df44 | 628 | { |
lypinator | 0:bb348c97df44 | 629 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 630 | } |
lypinator | 0:bb348c97df44 | 631 | |
lypinator | 0:bb348c97df44 | 632 | if(hi2s->State == HAL_I2S_STATE_READY) |
lypinator | 0:bb348c97df44 | 633 | { |
lypinator | 0:bb348c97df44 | 634 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
lypinator | 0:bb348c97df44 | 635 | if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B)) |
lypinator | 0:bb348c97df44 | 636 | { |
lypinator | 0:bb348c97df44 | 637 | hi2s->RxXferSize = (Size << 1U); |
lypinator | 0:bb348c97df44 | 638 | hi2s->RxXferCount = (Size << 1U); |
lypinator | 0:bb348c97df44 | 639 | } |
lypinator | 0:bb348c97df44 | 640 | else |
lypinator | 0:bb348c97df44 | 641 | { |
lypinator | 0:bb348c97df44 | 642 | hi2s->RxXferSize = Size; |
lypinator | 0:bb348c97df44 | 643 | hi2s->RxXferCount = Size; |
lypinator | 0:bb348c97df44 | 644 | } |
lypinator | 0:bb348c97df44 | 645 | /* Process Locked */ |
lypinator | 0:bb348c97df44 | 646 | __HAL_LOCK(hi2s); |
lypinator | 0:bb348c97df44 | 647 | |
lypinator | 0:bb348c97df44 | 648 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 649 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
lypinator | 0:bb348c97df44 | 650 | |
lypinator | 0:bb348c97df44 | 651 | /* Check if the I2S is already enabled */ |
lypinator | 0:bb348c97df44 | 652 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
lypinator | 0:bb348c97df44 | 653 | { |
lypinator | 0:bb348c97df44 | 654 | /* Enable I2S peripheral */ |
lypinator | 0:bb348c97df44 | 655 | __HAL_I2S_ENABLE(hi2s); |
lypinator | 0:bb348c97df44 | 656 | } |
lypinator | 0:bb348c97df44 | 657 | |
lypinator | 0:bb348c97df44 | 658 | /* Check if Master Receiver mode is selected */ |
lypinator | 0:bb348c97df44 | 659 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
lypinator | 0:bb348c97df44 | 660 | { |
lypinator | 0:bb348c97df44 | 661 | /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read |
lypinator | 0:bb348c97df44 | 662 | access to the SPI_SR register. */ |
lypinator | 0:bb348c97df44 | 663 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
lypinator | 0:bb348c97df44 | 664 | } |
lypinator | 0:bb348c97df44 | 665 | |
lypinator | 0:bb348c97df44 | 666 | /* Receive data */ |
lypinator | 0:bb348c97df44 | 667 | while(hi2s->RxXferCount > 0U) |
lypinator | 0:bb348c97df44 | 668 | { |
lypinator | 0:bb348c97df44 | 669 | /* Wait until RXNE flag is set */ |
lypinator | 0:bb348c97df44 | 670 | if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout) != HAL_OK) |
lypinator | 0:bb348c97df44 | 671 | { |
lypinator | 0:bb348c97df44 | 672 | /* Set the error code and execute error callback*/ |
lypinator | 0:bb348c97df44 | 673 | SET_BIT(hi2s->ErrorCode,HAL_I2S_ERROR_TIMEOUT); |
lypinator | 0:bb348c97df44 | 674 | HAL_I2S_ErrorCallback(hi2s); |
lypinator | 0:bb348c97df44 | 675 | return HAL_TIMEOUT; |
lypinator | 0:bb348c97df44 | 676 | } |
lypinator | 0:bb348c97df44 | 677 | |
lypinator | 0:bb348c97df44 | 678 | /* Check if an overrun occurs */ |
lypinator | 0:bb348c97df44 | 679 | if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET) |
lypinator | 0:bb348c97df44 | 680 | { |
lypinator | 0:bb348c97df44 | 681 | /* Clear overrun flag */ |
lypinator | 0:bb348c97df44 | 682 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
lypinator | 0:bb348c97df44 | 683 | |
lypinator | 0:bb348c97df44 | 684 | /* Set the I2S State ready */ |
lypinator | 0:bb348c97df44 | 685 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 686 | |
lypinator | 0:bb348c97df44 | 687 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 688 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 689 | |
lypinator | 0:bb348c97df44 | 690 | /* Set the error code and execute error callback*/ |
lypinator | 0:bb348c97df44 | 691 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_OVR); |
lypinator | 0:bb348c97df44 | 692 | HAL_I2S_ErrorCallback(hi2s); |
lypinator | 0:bb348c97df44 | 693 | |
lypinator | 0:bb348c97df44 | 694 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 695 | } |
lypinator | 0:bb348c97df44 | 696 | |
lypinator | 0:bb348c97df44 | 697 | (*pData++) = hi2s->Instance->DR; |
lypinator | 0:bb348c97df44 | 698 | hi2s->RxXferCount--; |
lypinator | 0:bb348c97df44 | 699 | } |
lypinator | 0:bb348c97df44 | 700 | |
lypinator | 0:bb348c97df44 | 701 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 702 | |
lypinator | 0:bb348c97df44 | 703 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 704 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 705 | |
lypinator | 0:bb348c97df44 | 706 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 707 | } |
lypinator | 0:bb348c97df44 | 708 | else |
lypinator | 0:bb348c97df44 | 709 | { |
lypinator | 0:bb348c97df44 | 710 | return HAL_BUSY; |
lypinator | 0:bb348c97df44 | 711 | } |
lypinator | 0:bb348c97df44 | 712 | } |
lypinator | 0:bb348c97df44 | 713 | |
lypinator | 0:bb348c97df44 | 714 | /** |
lypinator | 0:bb348c97df44 | 715 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
lypinator | 0:bb348c97df44 | 716 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 717 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 718 | * @param pData a 16-bit pointer to data buffer. |
lypinator | 0:bb348c97df44 | 719 | * @param Size number of data sample to be sent: |
lypinator | 0:bb348c97df44 | 720 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
lypinator | 0:bb348c97df44 | 721 | * configuration phase, the Size parameter means the number of 16-bit data length |
lypinator | 0:bb348c97df44 | 722 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
lypinator | 0:bb348c97df44 | 723 | * the Size parameter means the number of 16-bit data length. |
lypinator | 0:bb348c97df44 | 724 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
lypinator | 0:bb348c97df44 | 725 | * between Master and Slave(example: audio streaming). |
lypinator | 0:bb348c97df44 | 726 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 727 | */ |
lypinator | 0:bb348c97df44 | 728 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
lypinator | 0:bb348c97df44 | 729 | { |
lypinator | 0:bb348c97df44 | 730 | uint32_t tmp1 = 0U; |
lypinator | 0:bb348c97df44 | 731 | |
lypinator | 0:bb348c97df44 | 732 | if(hi2s->State == HAL_I2S_STATE_READY) |
lypinator | 0:bb348c97df44 | 733 | { |
lypinator | 0:bb348c97df44 | 734 | if((pData == NULL) || (Size == 0U)) |
lypinator | 0:bb348c97df44 | 735 | { |
lypinator | 0:bb348c97df44 | 736 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 737 | } |
lypinator | 0:bb348c97df44 | 738 | |
lypinator | 0:bb348c97df44 | 739 | hi2s->pTxBuffPtr = pData; |
lypinator | 0:bb348c97df44 | 740 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
lypinator | 0:bb348c97df44 | 741 | if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B)) |
lypinator | 0:bb348c97df44 | 742 | { |
lypinator | 0:bb348c97df44 | 743 | hi2s->TxXferSize = (Size << 1U); |
lypinator | 0:bb348c97df44 | 744 | hi2s->TxXferCount = (Size << 1U); |
lypinator | 0:bb348c97df44 | 745 | } |
lypinator | 0:bb348c97df44 | 746 | else |
lypinator | 0:bb348c97df44 | 747 | { |
lypinator | 0:bb348c97df44 | 748 | hi2s->TxXferSize = Size; |
lypinator | 0:bb348c97df44 | 749 | hi2s->TxXferCount = Size; |
lypinator | 0:bb348c97df44 | 750 | } |
lypinator | 0:bb348c97df44 | 751 | |
lypinator | 0:bb348c97df44 | 752 | /* Process Locked */ |
lypinator | 0:bb348c97df44 | 753 | __HAL_LOCK(hi2s); |
lypinator | 0:bb348c97df44 | 754 | |
lypinator | 0:bb348c97df44 | 755 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
lypinator | 0:bb348c97df44 | 756 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 757 | |
lypinator | 0:bb348c97df44 | 758 | /* Enable TXE and ERR interrupt */ |
lypinator | 0:bb348c97df44 | 759 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
lypinator | 0:bb348c97df44 | 760 | |
lypinator | 0:bb348c97df44 | 761 | /* Check if the I2S is already enabled */ |
lypinator | 0:bb348c97df44 | 762 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
lypinator | 0:bb348c97df44 | 763 | { |
lypinator | 0:bb348c97df44 | 764 | /* Enable I2S peripheral */ |
lypinator | 0:bb348c97df44 | 765 | __HAL_I2S_ENABLE(hi2s); |
lypinator | 0:bb348c97df44 | 766 | } |
lypinator | 0:bb348c97df44 | 767 | |
lypinator | 0:bb348c97df44 | 768 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 769 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 770 | |
lypinator | 0:bb348c97df44 | 771 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 772 | } |
lypinator | 0:bb348c97df44 | 773 | else |
lypinator | 0:bb348c97df44 | 774 | { |
lypinator | 0:bb348c97df44 | 775 | return HAL_BUSY; |
lypinator | 0:bb348c97df44 | 776 | } |
lypinator | 0:bb348c97df44 | 777 | } |
lypinator | 0:bb348c97df44 | 778 | |
lypinator | 0:bb348c97df44 | 779 | /** |
lypinator | 0:bb348c97df44 | 780 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
lypinator | 0:bb348c97df44 | 781 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 782 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 783 | * @param pData a 16-bit pointer to the Receive data buffer. |
lypinator | 0:bb348c97df44 | 784 | * @param Size number of data sample to be sent: |
lypinator | 0:bb348c97df44 | 785 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
lypinator | 0:bb348c97df44 | 786 | * configuration phase, the Size parameter means the number of 16-bit data length |
lypinator | 0:bb348c97df44 | 787 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
lypinator | 0:bb348c97df44 | 788 | * the Size parameter means the number of 16-bit data length. |
lypinator | 0:bb348c97df44 | 789 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
lypinator | 0:bb348c97df44 | 790 | * between Master and Slave(example: audio streaming). |
lypinator | 0:bb348c97df44 | 791 | * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation |
lypinator | 0:bb348c97df44 | 792 | * between Master and Slave otherwise the I2S interrupt should be optimized. |
lypinator | 0:bb348c97df44 | 793 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 794 | */ |
lypinator | 0:bb348c97df44 | 795 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
lypinator | 0:bb348c97df44 | 796 | { |
lypinator | 0:bb348c97df44 | 797 | uint32_t tmp1 = 0U; |
lypinator | 0:bb348c97df44 | 798 | |
lypinator | 0:bb348c97df44 | 799 | if(hi2s->State == HAL_I2S_STATE_READY) |
lypinator | 0:bb348c97df44 | 800 | { |
lypinator | 0:bb348c97df44 | 801 | if((pData == NULL) || (Size == 0U)) |
lypinator | 0:bb348c97df44 | 802 | { |
lypinator | 0:bb348c97df44 | 803 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 804 | } |
lypinator | 0:bb348c97df44 | 805 | |
lypinator | 0:bb348c97df44 | 806 | hi2s->pRxBuffPtr = pData; |
lypinator | 0:bb348c97df44 | 807 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
lypinator | 0:bb348c97df44 | 808 | if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B)) |
lypinator | 0:bb348c97df44 | 809 | { |
lypinator | 0:bb348c97df44 | 810 | hi2s->RxXferSize = (Size << 1U); |
lypinator | 0:bb348c97df44 | 811 | hi2s->RxXferCount = (Size << 1U); |
lypinator | 0:bb348c97df44 | 812 | } |
lypinator | 0:bb348c97df44 | 813 | else |
lypinator | 0:bb348c97df44 | 814 | { |
lypinator | 0:bb348c97df44 | 815 | hi2s->RxXferSize = Size; |
lypinator | 0:bb348c97df44 | 816 | hi2s->RxXferCount = Size; |
lypinator | 0:bb348c97df44 | 817 | } |
lypinator | 0:bb348c97df44 | 818 | /* Process Locked */ |
lypinator | 0:bb348c97df44 | 819 | __HAL_LOCK(hi2s); |
lypinator | 0:bb348c97df44 | 820 | |
lypinator | 0:bb348c97df44 | 821 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
lypinator | 0:bb348c97df44 | 822 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 823 | |
lypinator | 0:bb348c97df44 | 824 | /* Enable TXE and ERR interrupt */ |
lypinator | 0:bb348c97df44 | 825 | __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
lypinator | 0:bb348c97df44 | 826 | |
lypinator | 0:bb348c97df44 | 827 | /* Check if the I2S is already enabled */ |
lypinator | 0:bb348c97df44 | 828 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
lypinator | 0:bb348c97df44 | 829 | { |
lypinator | 0:bb348c97df44 | 830 | /* Enable I2S peripheral */ |
lypinator | 0:bb348c97df44 | 831 | __HAL_I2S_ENABLE(hi2s); |
lypinator | 0:bb348c97df44 | 832 | } |
lypinator | 0:bb348c97df44 | 833 | |
lypinator | 0:bb348c97df44 | 834 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 835 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 836 | |
lypinator | 0:bb348c97df44 | 837 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 838 | } |
lypinator | 0:bb348c97df44 | 839 | |
lypinator | 0:bb348c97df44 | 840 | else |
lypinator | 0:bb348c97df44 | 841 | { |
lypinator | 0:bb348c97df44 | 842 | return HAL_BUSY; |
lypinator | 0:bb348c97df44 | 843 | } |
lypinator | 0:bb348c97df44 | 844 | } |
lypinator | 0:bb348c97df44 | 845 | |
lypinator | 0:bb348c97df44 | 846 | /** |
lypinator | 0:bb348c97df44 | 847 | * @brief Transmit an amount of data in non-blocking mode with DMA |
lypinator | 0:bb348c97df44 | 848 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 849 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 850 | * @param pData a 16-bit pointer to the Transmit data buffer. |
lypinator | 0:bb348c97df44 | 851 | * @param Size number of data sample to be sent: |
lypinator | 0:bb348c97df44 | 852 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
lypinator | 0:bb348c97df44 | 853 | * configuration phase, the Size parameter means the number of 16-bit data length |
lypinator | 0:bb348c97df44 | 854 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
lypinator | 0:bb348c97df44 | 855 | * the Size parameter means the number of 16-bit data length. |
lypinator | 0:bb348c97df44 | 856 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
lypinator | 0:bb348c97df44 | 857 | * between Master and Slave(example: audio streaming). |
lypinator | 0:bb348c97df44 | 858 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 859 | */ |
lypinator | 0:bb348c97df44 | 860 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
lypinator | 0:bb348c97df44 | 861 | { |
lypinator | 0:bb348c97df44 | 862 | uint32_t *tmp = NULL; |
lypinator | 0:bb348c97df44 | 863 | uint32_t tmp1 = 0U; |
lypinator | 0:bb348c97df44 | 864 | |
lypinator | 0:bb348c97df44 | 865 | if((pData == NULL) || (Size == 0U)) |
lypinator | 0:bb348c97df44 | 866 | { |
lypinator | 0:bb348c97df44 | 867 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 868 | } |
lypinator | 0:bb348c97df44 | 869 | |
lypinator | 0:bb348c97df44 | 870 | if(hi2s->State == HAL_I2S_STATE_READY) |
lypinator | 0:bb348c97df44 | 871 | { |
lypinator | 0:bb348c97df44 | 872 | hi2s->pTxBuffPtr = pData; |
lypinator | 0:bb348c97df44 | 873 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
lypinator | 0:bb348c97df44 | 874 | if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B)) |
lypinator | 0:bb348c97df44 | 875 | { |
lypinator | 0:bb348c97df44 | 876 | hi2s->TxXferSize = (Size << 1U); |
lypinator | 0:bb348c97df44 | 877 | hi2s->TxXferCount = (Size << 1U); |
lypinator | 0:bb348c97df44 | 878 | } |
lypinator | 0:bb348c97df44 | 879 | else |
lypinator | 0:bb348c97df44 | 880 | { |
lypinator | 0:bb348c97df44 | 881 | hi2s->TxXferSize = Size; |
lypinator | 0:bb348c97df44 | 882 | hi2s->TxXferCount = Size; |
lypinator | 0:bb348c97df44 | 883 | } |
lypinator | 0:bb348c97df44 | 884 | |
lypinator | 0:bb348c97df44 | 885 | /* Process Locked */ |
lypinator | 0:bb348c97df44 | 886 | __HAL_LOCK(hi2s); |
lypinator | 0:bb348c97df44 | 887 | |
lypinator | 0:bb348c97df44 | 888 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 889 | hi2s->State = HAL_I2S_STATE_BUSY_TX; |
lypinator | 0:bb348c97df44 | 890 | |
lypinator | 0:bb348c97df44 | 891 | /* Set the I2S Tx DMA Half transfer complete callback */ |
lypinator | 0:bb348c97df44 | 892 | hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt; |
lypinator | 0:bb348c97df44 | 893 | |
lypinator | 0:bb348c97df44 | 894 | /* Set the I2S Tx DMA transfer complete callback */ |
lypinator | 0:bb348c97df44 | 895 | hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt; |
lypinator | 0:bb348c97df44 | 896 | |
lypinator | 0:bb348c97df44 | 897 | /* Set the DMA error callback */ |
lypinator | 0:bb348c97df44 | 898 | hi2s->hdmatx->XferErrorCallback = I2S_DMAError; |
lypinator | 0:bb348c97df44 | 899 | |
lypinator | 0:bb348c97df44 | 900 | /* Enable the Tx DMA Stream */ |
lypinator | 0:bb348c97df44 | 901 | tmp = (uint32_t*)&pData; |
lypinator | 0:bb348c97df44 | 902 | HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize); |
lypinator | 0:bb348c97df44 | 903 | |
lypinator | 0:bb348c97df44 | 904 | /* Check if the I2S is already enabled */ |
lypinator | 0:bb348c97df44 | 905 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
lypinator | 0:bb348c97df44 | 906 | { |
lypinator | 0:bb348c97df44 | 907 | /* Enable I2S peripheral */ |
lypinator | 0:bb348c97df44 | 908 | __HAL_I2S_ENABLE(hi2s); |
lypinator | 0:bb348c97df44 | 909 | } |
lypinator | 0:bb348c97df44 | 910 | |
lypinator | 0:bb348c97df44 | 911 | /* Check if the I2S Tx request is already enabled */ |
lypinator | 0:bb348c97df44 | 912 | if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN) |
lypinator | 0:bb348c97df44 | 913 | { |
lypinator | 0:bb348c97df44 | 914 | /* Enable Tx DMA Request */ |
lypinator | 0:bb348c97df44 | 915 | SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); |
lypinator | 0:bb348c97df44 | 916 | } |
lypinator | 0:bb348c97df44 | 917 | |
lypinator | 0:bb348c97df44 | 918 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 919 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 920 | |
lypinator | 0:bb348c97df44 | 921 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 922 | } |
lypinator | 0:bb348c97df44 | 923 | else |
lypinator | 0:bb348c97df44 | 924 | { |
lypinator | 0:bb348c97df44 | 925 | return HAL_BUSY; |
lypinator | 0:bb348c97df44 | 926 | } |
lypinator | 0:bb348c97df44 | 927 | } |
lypinator | 0:bb348c97df44 | 928 | |
lypinator | 0:bb348c97df44 | 929 | /** |
lypinator | 0:bb348c97df44 | 930 | * @brief Receive an amount of data in non-blocking mode with DMA |
lypinator | 0:bb348c97df44 | 931 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 932 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 933 | * @param pData a 16-bit pointer to the Receive data buffer. |
lypinator | 0:bb348c97df44 | 934 | * @param Size number of data sample to be sent: |
lypinator | 0:bb348c97df44 | 935 | * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S |
lypinator | 0:bb348c97df44 | 936 | * configuration phase, the Size parameter means the number of 16-bit data length |
lypinator | 0:bb348c97df44 | 937 | * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected |
lypinator | 0:bb348c97df44 | 938 | * the Size parameter means the number of 16-bit data length. |
lypinator | 0:bb348c97df44 | 939 | * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization |
lypinator | 0:bb348c97df44 | 940 | * between Master and Slave(example: audio streaming). |
lypinator | 0:bb348c97df44 | 941 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 942 | */ |
lypinator | 0:bb348c97df44 | 943 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size) |
lypinator | 0:bb348c97df44 | 944 | { |
lypinator | 0:bb348c97df44 | 945 | uint32_t *tmp = NULL; |
lypinator | 0:bb348c97df44 | 946 | uint32_t tmp1 = 0U; |
lypinator | 0:bb348c97df44 | 947 | |
lypinator | 0:bb348c97df44 | 948 | if((pData == NULL) || (Size == 0U)) |
lypinator | 0:bb348c97df44 | 949 | { |
lypinator | 0:bb348c97df44 | 950 | return HAL_ERROR; |
lypinator | 0:bb348c97df44 | 951 | } |
lypinator | 0:bb348c97df44 | 952 | |
lypinator | 0:bb348c97df44 | 953 | if(hi2s->State == HAL_I2S_STATE_READY) |
lypinator | 0:bb348c97df44 | 954 | { |
lypinator | 0:bb348c97df44 | 955 | hi2s->pRxBuffPtr = pData; |
lypinator | 0:bb348c97df44 | 956 | tmp1 = hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN); |
lypinator | 0:bb348c97df44 | 957 | if((tmp1 == I2S_DATAFORMAT_24B) || (tmp1 == I2S_DATAFORMAT_32B)) |
lypinator | 0:bb348c97df44 | 958 | { |
lypinator | 0:bb348c97df44 | 959 | hi2s->RxXferSize = (Size << 1U); |
lypinator | 0:bb348c97df44 | 960 | hi2s->RxXferCount = (Size << 1U); |
lypinator | 0:bb348c97df44 | 961 | } |
lypinator | 0:bb348c97df44 | 962 | else |
lypinator | 0:bb348c97df44 | 963 | { |
lypinator | 0:bb348c97df44 | 964 | hi2s->RxXferSize = Size; |
lypinator | 0:bb348c97df44 | 965 | hi2s->RxXferCount = Size; |
lypinator | 0:bb348c97df44 | 966 | } |
lypinator | 0:bb348c97df44 | 967 | /* Process Locked */ |
lypinator | 0:bb348c97df44 | 968 | __HAL_LOCK(hi2s); |
lypinator | 0:bb348c97df44 | 969 | |
lypinator | 0:bb348c97df44 | 970 | hi2s->State = HAL_I2S_STATE_BUSY_RX; |
lypinator | 0:bb348c97df44 | 971 | hi2s->ErrorCode = HAL_I2S_ERROR_NONE; |
lypinator | 0:bb348c97df44 | 972 | |
lypinator | 0:bb348c97df44 | 973 | /* Set the I2S Rx DMA Half transfer complete callback */ |
lypinator | 0:bb348c97df44 | 974 | hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt; |
lypinator | 0:bb348c97df44 | 975 | |
lypinator | 0:bb348c97df44 | 976 | /* Set the I2S Rx DMA transfer complete callback */ |
lypinator | 0:bb348c97df44 | 977 | hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt; |
lypinator | 0:bb348c97df44 | 978 | |
lypinator | 0:bb348c97df44 | 979 | /* Set the DMA error callback */ |
lypinator | 0:bb348c97df44 | 980 | hi2s->hdmarx->XferErrorCallback = I2S_DMAError; |
lypinator | 0:bb348c97df44 | 981 | |
lypinator | 0:bb348c97df44 | 982 | /* Check if Master Receiver mode is selected */ |
lypinator | 0:bb348c97df44 | 983 | if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX) |
lypinator | 0:bb348c97df44 | 984 | { |
lypinator | 0:bb348c97df44 | 985 | /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read |
lypinator | 0:bb348c97df44 | 986 | access to the SPI_SR register. */ |
lypinator | 0:bb348c97df44 | 987 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
lypinator | 0:bb348c97df44 | 988 | } |
lypinator | 0:bb348c97df44 | 989 | |
lypinator | 0:bb348c97df44 | 990 | /* Enable the Rx DMA Stream */ |
lypinator | 0:bb348c97df44 | 991 | tmp = (uint32_t*)&pData; |
lypinator | 0:bb348c97df44 | 992 | HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize); |
lypinator | 0:bb348c97df44 | 993 | |
lypinator | 0:bb348c97df44 | 994 | /* Check if the I2S is already enabled */ |
lypinator | 0:bb348c97df44 | 995 | if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE) |
lypinator | 0:bb348c97df44 | 996 | { |
lypinator | 0:bb348c97df44 | 997 | /* Enable I2S peripheral */ |
lypinator | 0:bb348c97df44 | 998 | __HAL_I2S_ENABLE(hi2s); |
lypinator | 0:bb348c97df44 | 999 | } |
lypinator | 0:bb348c97df44 | 1000 | |
lypinator | 0:bb348c97df44 | 1001 | /* Check if the I2S Rx request is already enabled */ |
lypinator | 0:bb348c97df44 | 1002 | if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN) |
lypinator | 0:bb348c97df44 | 1003 | { |
lypinator | 0:bb348c97df44 | 1004 | /* Enable Rx DMA Request */ |
lypinator | 0:bb348c97df44 | 1005 | SET_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN); |
lypinator | 0:bb348c97df44 | 1006 | } |
lypinator | 0:bb348c97df44 | 1007 | |
lypinator | 0:bb348c97df44 | 1008 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 1009 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 1010 | |
lypinator | 0:bb348c97df44 | 1011 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 1012 | } |
lypinator | 0:bb348c97df44 | 1013 | else |
lypinator | 0:bb348c97df44 | 1014 | { |
lypinator | 0:bb348c97df44 | 1015 | return HAL_BUSY; |
lypinator | 0:bb348c97df44 | 1016 | } |
lypinator | 0:bb348c97df44 | 1017 | } |
lypinator | 0:bb348c97df44 | 1018 | |
lypinator | 0:bb348c97df44 | 1019 | /** |
lypinator | 0:bb348c97df44 | 1020 | * @brief Pauses the audio stream playing from the Media. |
lypinator | 0:bb348c97df44 | 1021 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1022 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1023 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1024 | */ |
lypinator | 0:bb348c97df44 | 1025 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1026 | { |
lypinator | 0:bb348c97df44 | 1027 | /* Process Locked */ |
lypinator | 0:bb348c97df44 | 1028 | __HAL_LOCK(hi2s); |
lypinator | 0:bb348c97df44 | 1029 | |
lypinator | 0:bb348c97df44 | 1030 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
lypinator | 0:bb348c97df44 | 1031 | { |
lypinator | 0:bb348c97df44 | 1032 | /* Disable the I2S DMA Tx request */ |
lypinator | 0:bb348c97df44 | 1033 | CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN); |
lypinator | 0:bb348c97df44 | 1034 | } |
lypinator | 0:bb348c97df44 | 1035 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
lypinator | 0:bb348c97df44 | 1036 | { |
lypinator | 0:bb348c97df44 | 1037 | /* Disable the I2S DMA Rx request */ |
lypinator | 0:bb348c97df44 | 1038 | CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN); |
lypinator | 0:bb348c97df44 | 1039 | } |
lypinator | 0:bb348c97df44 | 1040 | #if defined (SPI_I2S_FULLDUPLEX_SUPPORT) |
lypinator | 0:bb348c97df44 | 1041 | else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) |
lypinator | 0:bb348c97df44 | 1042 | { |
lypinator | 0:bb348c97df44 | 1043 | /* Pause the audio file playing by disabling the I2S DMA request */ |
lypinator | 0:bb348c97df44 | 1044 | CLEAR_BIT(hi2s->Instance->CR2,(SPI_CR2_TXDMAEN|SPI_CR2_RXDMAEN)); |
lypinator | 0:bb348c97df44 | 1045 | CLEAR_BIT(I2SxEXT(hi2s->Instance)->CR2,(SPI_CR2_TXDMAEN|SPI_CR2_RXDMAEN)); |
lypinator | 0:bb348c97df44 | 1046 | } |
lypinator | 0:bb348c97df44 | 1047 | #endif /* SPI_I2S_FULLDUPLEX_SUPPORT */ |
lypinator | 0:bb348c97df44 | 1048 | |
lypinator | 0:bb348c97df44 | 1049 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 1050 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 1051 | |
lypinator | 0:bb348c97df44 | 1052 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 1053 | } |
lypinator | 0:bb348c97df44 | 1054 | |
lypinator | 0:bb348c97df44 | 1055 | /** |
lypinator | 0:bb348c97df44 | 1056 | * @brief Resumes the audio stream playing from the Media. |
lypinator | 0:bb348c97df44 | 1057 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1058 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1059 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1060 | */ |
lypinator | 0:bb348c97df44 | 1061 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1062 | { |
lypinator | 0:bb348c97df44 | 1063 | /* Process Locked */ |
lypinator | 0:bb348c97df44 | 1064 | __HAL_LOCK(hi2s); |
lypinator | 0:bb348c97df44 | 1065 | |
lypinator | 0:bb348c97df44 | 1066 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
lypinator | 0:bb348c97df44 | 1067 | { |
lypinator | 0:bb348c97df44 | 1068 | /* Enable the I2S DMA Tx request */ |
lypinator | 0:bb348c97df44 | 1069 | SET_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN); |
lypinator | 0:bb348c97df44 | 1070 | } |
lypinator | 0:bb348c97df44 | 1071 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
lypinator | 0:bb348c97df44 | 1072 | { |
lypinator | 0:bb348c97df44 | 1073 | /* Enable the I2S DMA Rx request */ |
lypinator | 0:bb348c97df44 | 1074 | SET_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN); |
lypinator | 0:bb348c97df44 | 1075 | } |
lypinator | 0:bb348c97df44 | 1076 | #if defined (SPI_I2S_FULLDUPLEX_SUPPORT) |
lypinator | 0:bb348c97df44 | 1077 | else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) |
lypinator | 0:bb348c97df44 | 1078 | { |
lypinator | 0:bb348c97df44 | 1079 | /* Pause the audio file playing by disabling the I2S DMA request */ |
lypinator | 0:bb348c97df44 | 1080 | SET_BIT(hi2s->Instance->CR2,(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
lypinator | 0:bb348c97df44 | 1081 | SET_BIT(I2SxEXT(hi2s->Instance)->CR2,(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
lypinator | 0:bb348c97df44 | 1082 | |
lypinator | 0:bb348c97df44 | 1083 | /* If the I2Sext peripheral is still not enabled, enable it */ |
lypinator | 0:bb348c97df44 | 1084 | if ((I2SxEXT(hi2s->Instance)->I2SCFGR & SPI_I2SCFGR_I2SE) == 0U) |
lypinator | 0:bb348c97df44 | 1085 | { |
lypinator | 0:bb348c97df44 | 1086 | /* Enable I2Sext peripheral */ |
lypinator | 0:bb348c97df44 | 1087 | __HAL_I2SEXT_ENABLE(hi2s); |
lypinator | 0:bb348c97df44 | 1088 | } |
lypinator | 0:bb348c97df44 | 1089 | } |
lypinator | 0:bb348c97df44 | 1090 | #endif /* SPI_I2S_FULLDUPLEX_SUPPORT */ |
lypinator | 0:bb348c97df44 | 1091 | |
lypinator | 0:bb348c97df44 | 1092 | /* If the I2S peripheral is still not enabled, enable it */ |
lypinator | 0:bb348c97df44 | 1093 | if ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) == 0U) |
lypinator | 0:bb348c97df44 | 1094 | { |
lypinator | 0:bb348c97df44 | 1095 | /* Enable I2S peripheral */ |
lypinator | 0:bb348c97df44 | 1096 | __HAL_I2S_ENABLE(hi2s); |
lypinator | 0:bb348c97df44 | 1097 | } |
lypinator | 0:bb348c97df44 | 1098 | |
lypinator | 0:bb348c97df44 | 1099 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 1100 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 1101 | |
lypinator | 0:bb348c97df44 | 1102 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 1103 | } |
lypinator | 0:bb348c97df44 | 1104 | |
lypinator | 0:bb348c97df44 | 1105 | /** |
lypinator | 0:bb348c97df44 | 1106 | * @brief Resumes the audio stream playing from the Media. |
lypinator | 0:bb348c97df44 | 1107 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1108 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1109 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1110 | */ |
lypinator | 0:bb348c97df44 | 1111 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1112 | { |
lypinator | 0:bb348c97df44 | 1113 | /* Process Locked */ |
lypinator | 0:bb348c97df44 | 1114 | __HAL_LOCK(hi2s); |
lypinator | 0:bb348c97df44 | 1115 | |
lypinator | 0:bb348c97df44 | 1116 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
lypinator | 0:bb348c97df44 | 1117 | { |
lypinator | 0:bb348c97df44 | 1118 | /* Disable the I2S DMA requests */ |
lypinator | 0:bb348c97df44 | 1119 | CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN); |
lypinator | 0:bb348c97df44 | 1120 | |
lypinator | 0:bb348c97df44 | 1121 | /* Disable the I2S DMA Channel */ |
lypinator | 0:bb348c97df44 | 1122 | HAL_DMA_Abort(hi2s->hdmatx); |
lypinator | 0:bb348c97df44 | 1123 | } |
lypinator | 0:bb348c97df44 | 1124 | else if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
lypinator | 0:bb348c97df44 | 1125 | { |
lypinator | 0:bb348c97df44 | 1126 | /* Disable the I2S DMA requests */ |
lypinator | 0:bb348c97df44 | 1127 | CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN); |
lypinator | 0:bb348c97df44 | 1128 | |
lypinator | 0:bb348c97df44 | 1129 | /* Disable the I2S DMA Channel */ |
lypinator | 0:bb348c97df44 | 1130 | HAL_DMA_Abort(hi2s->hdmarx); |
lypinator | 0:bb348c97df44 | 1131 | } |
lypinator | 0:bb348c97df44 | 1132 | #if defined (SPI_I2S_FULLDUPLEX_SUPPORT) |
lypinator | 0:bb348c97df44 | 1133 | else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX) |
lypinator | 0:bb348c97df44 | 1134 | { |
lypinator | 0:bb348c97df44 | 1135 | /* Disable the I2S DMA requests */ |
lypinator | 0:bb348c97df44 | 1136 | CLEAR_BIT(hi2s->Instance->CR2,(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
lypinator | 0:bb348c97df44 | 1137 | CLEAR_BIT(I2SxEXT(hi2s->Instance)->CR2,(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
lypinator | 0:bb348c97df44 | 1138 | |
lypinator | 0:bb348c97df44 | 1139 | /* Disable the I2S DMA Channels */ |
lypinator | 0:bb348c97df44 | 1140 | HAL_DMA_Abort(hi2s->hdmatx); |
lypinator | 0:bb348c97df44 | 1141 | HAL_DMA_Abort(hi2s->hdmarx); |
lypinator | 0:bb348c97df44 | 1142 | |
lypinator | 0:bb348c97df44 | 1143 | /* Disable I2Sext peripheral */ |
lypinator | 0:bb348c97df44 | 1144 | __HAL_I2SEXT_DISABLE(hi2s); |
lypinator | 0:bb348c97df44 | 1145 | } |
lypinator | 0:bb348c97df44 | 1146 | #endif /* SPI_I2S_FULLDUPLEX_SUPPORT */ |
lypinator | 0:bb348c97df44 | 1147 | |
lypinator | 0:bb348c97df44 | 1148 | /* Disable I2S peripheral */ |
lypinator | 0:bb348c97df44 | 1149 | __HAL_I2S_DISABLE(hi2s); |
lypinator | 0:bb348c97df44 | 1150 | |
lypinator | 0:bb348c97df44 | 1151 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 1152 | |
lypinator | 0:bb348c97df44 | 1153 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 1154 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 1155 | |
lypinator | 0:bb348c97df44 | 1156 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 1157 | } |
lypinator | 0:bb348c97df44 | 1158 | |
lypinator | 0:bb348c97df44 | 1159 | /** |
lypinator | 0:bb348c97df44 | 1160 | * @brief This function handles I2S interrupt request. |
lypinator | 0:bb348c97df44 | 1161 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1162 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1163 | * @retval None |
lypinator | 0:bb348c97df44 | 1164 | */ |
lypinator | 0:bb348c97df44 | 1165 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1166 | { |
lypinator | 0:bb348c97df44 | 1167 | /* Call the IrqHandler ISR set during HAL_I2S_INIT */ |
lypinator | 0:bb348c97df44 | 1168 | hi2s->IrqHandlerISR(hi2s); |
lypinator | 0:bb348c97df44 | 1169 | } |
lypinator | 0:bb348c97df44 | 1170 | |
lypinator | 0:bb348c97df44 | 1171 | /** |
lypinator | 0:bb348c97df44 | 1172 | * @brief Tx Transfer Half completed callbacks |
lypinator | 0:bb348c97df44 | 1173 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1174 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1175 | * @retval None |
lypinator | 0:bb348c97df44 | 1176 | */ |
lypinator | 0:bb348c97df44 | 1177 | __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1178 | { |
lypinator | 0:bb348c97df44 | 1179 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1180 | UNUSED(hi2s); |
lypinator | 0:bb348c97df44 | 1181 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1182 | the HAL_I2S_TxHalfCpltCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1183 | */ |
lypinator | 0:bb348c97df44 | 1184 | } |
lypinator | 0:bb348c97df44 | 1185 | |
lypinator | 0:bb348c97df44 | 1186 | /** |
lypinator | 0:bb348c97df44 | 1187 | * @brief Tx Transfer completed callbacks |
lypinator | 0:bb348c97df44 | 1188 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1189 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1190 | * @retval None |
lypinator | 0:bb348c97df44 | 1191 | */ |
lypinator | 0:bb348c97df44 | 1192 | __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1193 | { |
lypinator | 0:bb348c97df44 | 1194 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1195 | UNUSED(hi2s); |
lypinator | 0:bb348c97df44 | 1196 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1197 | the HAL_I2S_TxCpltCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1198 | */ |
lypinator | 0:bb348c97df44 | 1199 | } |
lypinator | 0:bb348c97df44 | 1200 | |
lypinator | 0:bb348c97df44 | 1201 | /** |
lypinator | 0:bb348c97df44 | 1202 | * @brief Rx Transfer half completed callbacks |
lypinator | 0:bb348c97df44 | 1203 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1204 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1205 | * @retval None |
lypinator | 0:bb348c97df44 | 1206 | */ |
lypinator | 0:bb348c97df44 | 1207 | __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1208 | { |
lypinator | 0:bb348c97df44 | 1209 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1210 | UNUSED(hi2s); |
lypinator | 0:bb348c97df44 | 1211 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1212 | the HAL_I2S_RxCpltCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1213 | */ |
lypinator | 0:bb348c97df44 | 1214 | } |
lypinator | 0:bb348c97df44 | 1215 | |
lypinator | 0:bb348c97df44 | 1216 | /** |
lypinator | 0:bb348c97df44 | 1217 | * @brief Rx Transfer completed callbacks |
lypinator | 0:bb348c97df44 | 1218 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1219 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1220 | * @retval None |
lypinator | 0:bb348c97df44 | 1221 | */ |
lypinator | 0:bb348c97df44 | 1222 | __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1223 | { |
lypinator | 0:bb348c97df44 | 1224 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1225 | UNUSED(hi2s); |
lypinator | 0:bb348c97df44 | 1226 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1227 | the HAL_I2S_RxCpltCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1228 | */ |
lypinator | 0:bb348c97df44 | 1229 | } |
lypinator | 0:bb348c97df44 | 1230 | |
lypinator | 0:bb348c97df44 | 1231 | /** |
lypinator | 0:bb348c97df44 | 1232 | * @brief I2S error callbacks |
lypinator | 0:bb348c97df44 | 1233 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1234 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1235 | * @retval None |
lypinator | 0:bb348c97df44 | 1236 | */ |
lypinator | 0:bb348c97df44 | 1237 | __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1238 | { |
lypinator | 0:bb348c97df44 | 1239 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 1240 | UNUSED(hi2s); |
lypinator | 0:bb348c97df44 | 1241 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 1242 | the HAL_I2S_ErrorCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 1243 | */ |
lypinator | 0:bb348c97df44 | 1244 | } |
lypinator | 0:bb348c97df44 | 1245 | |
lypinator | 0:bb348c97df44 | 1246 | /** |
lypinator | 0:bb348c97df44 | 1247 | * @} |
lypinator | 0:bb348c97df44 | 1248 | */ |
lypinator | 0:bb348c97df44 | 1249 | |
lypinator | 0:bb348c97df44 | 1250 | /** @addtogroup I2S_Exported_Functions_Group3 |
lypinator | 0:bb348c97df44 | 1251 | * @brief Peripheral State functions |
lypinator | 0:bb348c97df44 | 1252 | * |
lypinator | 0:bb348c97df44 | 1253 | @verbatim |
lypinator | 0:bb348c97df44 | 1254 | =============================================================================== |
lypinator | 0:bb348c97df44 | 1255 | ##### Peripheral State and Errors functions ##### |
lypinator | 0:bb348c97df44 | 1256 | =============================================================================== |
lypinator | 0:bb348c97df44 | 1257 | [..] |
lypinator | 0:bb348c97df44 | 1258 | This subsection permits to get in run-time the status of the peripheral |
lypinator | 0:bb348c97df44 | 1259 | and the data flow. |
lypinator | 0:bb348c97df44 | 1260 | |
lypinator | 0:bb348c97df44 | 1261 | @endverbatim |
lypinator | 0:bb348c97df44 | 1262 | * @{ |
lypinator | 0:bb348c97df44 | 1263 | */ |
lypinator | 0:bb348c97df44 | 1264 | |
lypinator | 0:bb348c97df44 | 1265 | /** |
lypinator | 0:bb348c97df44 | 1266 | * @brief Return the I2S state |
lypinator | 0:bb348c97df44 | 1267 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1268 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1269 | * @retval HAL state |
lypinator | 0:bb348c97df44 | 1270 | */ |
lypinator | 0:bb348c97df44 | 1271 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1272 | { |
lypinator | 0:bb348c97df44 | 1273 | return hi2s->State; |
lypinator | 0:bb348c97df44 | 1274 | } |
lypinator | 0:bb348c97df44 | 1275 | |
lypinator | 0:bb348c97df44 | 1276 | /** |
lypinator | 0:bb348c97df44 | 1277 | * @brief Return the I2S error code |
lypinator | 0:bb348c97df44 | 1278 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1279 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1280 | * @retval I2S Error Code |
lypinator | 0:bb348c97df44 | 1281 | */ |
lypinator | 0:bb348c97df44 | 1282 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1283 | { |
lypinator | 0:bb348c97df44 | 1284 | return hi2s->ErrorCode; |
lypinator | 0:bb348c97df44 | 1285 | } |
lypinator | 0:bb348c97df44 | 1286 | /** |
lypinator | 0:bb348c97df44 | 1287 | * @} |
lypinator | 0:bb348c97df44 | 1288 | */ |
lypinator | 0:bb348c97df44 | 1289 | |
lypinator | 0:bb348c97df44 | 1290 | /** |
lypinator | 0:bb348c97df44 | 1291 | * @} |
lypinator | 0:bb348c97df44 | 1292 | */ |
lypinator | 0:bb348c97df44 | 1293 | |
lypinator | 0:bb348c97df44 | 1294 | /** @addtogroup I2S_Private_Functions I2S Private Functions |
lypinator | 0:bb348c97df44 | 1295 | * @{ |
lypinator | 0:bb348c97df44 | 1296 | */ |
lypinator | 0:bb348c97df44 | 1297 | /** |
lypinator | 0:bb348c97df44 | 1298 | * @brief DMA I2S transmit process complete callback |
lypinator | 0:bb348c97df44 | 1299 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1300 | * the configuration information for the specified DMA module. |
lypinator | 0:bb348c97df44 | 1301 | * @retval None |
lypinator | 0:bb348c97df44 | 1302 | */ |
lypinator | 0:bb348c97df44 | 1303 | static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 1304 | { |
lypinator | 0:bb348c97df44 | 1305 | I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
lypinator | 0:bb348c97df44 | 1306 | |
lypinator | 0:bb348c97df44 | 1307 | if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U) |
lypinator | 0:bb348c97df44 | 1308 | { |
lypinator | 0:bb348c97df44 | 1309 | /* Disable Tx DMA Request */ |
lypinator | 0:bb348c97df44 | 1310 | CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_TXDMAEN); |
lypinator | 0:bb348c97df44 | 1311 | |
lypinator | 0:bb348c97df44 | 1312 | hi2s->TxXferCount = 0U; |
lypinator | 0:bb348c97df44 | 1313 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 1314 | } |
lypinator | 0:bb348c97df44 | 1315 | HAL_I2S_TxCpltCallback(hi2s); |
lypinator | 0:bb348c97df44 | 1316 | } |
lypinator | 0:bb348c97df44 | 1317 | /** |
lypinator | 0:bb348c97df44 | 1318 | * @brief DMA I2S transmit process half complete callback |
lypinator | 0:bb348c97df44 | 1319 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1320 | * the configuration information for the specified DMA module. |
lypinator | 0:bb348c97df44 | 1321 | * @retval None |
lypinator | 0:bb348c97df44 | 1322 | */ |
lypinator | 0:bb348c97df44 | 1323 | static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 1324 | { |
lypinator | 0:bb348c97df44 | 1325 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
lypinator | 0:bb348c97df44 | 1326 | |
lypinator | 0:bb348c97df44 | 1327 | HAL_I2S_TxHalfCpltCallback(hi2s); |
lypinator | 0:bb348c97df44 | 1328 | } |
lypinator | 0:bb348c97df44 | 1329 | |
lypinator | 0:bb348c97df44 | 1330 | /** |
lypinator | 0:bb348c97df44 | 1331 | * @brief DMA I2S receive process complete callback |
lypinator | 0:bb348c97df44 | 1332 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1333 | * the configuration information for the specified DMA module. |
lypinator | 0:bb348c97df44 | 1334 | * @retval None |
lypinator | 0:bb348c97df44 | 1335 | */ |
lypinator | 0:bb348c97df44 | 1336 | static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 1337 | { |
lypinator | 0:bb348c97df44 | 1338 | I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
lypinator | 0:bb348c97df44 | 1339 | |
lypinator | 0:bb348c97df44 | 1340 | if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U) |
lypinator | 0:bb348c97df44 | 1341 | { |
lypinator | 0:bb348c97df44 | 1342 | /* Disable Rx DMA Request */ |
lypinator | 0:bb348c97df44 | 1343 | CLEAR_BIT(hi2s->Instance->CR2,SPI_CR2_RXDMAEN); |
lypinator | 0:bb348c97df44 | 1344 | hi2s->RxXferCount = 0U; |
lypinator | 0:bb348c97df44 | 1345 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 1346 | } |
lypinator | 0:bb348c97df44 | 1347 | HAL_I2S_RxCpltCallback(hi2s); |
lypinator | 0:bb348c97df44 | 1348 | } |
lypinator | 0:bb348c97df44 | 1349 | |
lypinator | 0:bb348c97df44 | 1350 | /** |
lypinator | 0:bb348c97df44 | 1351 | * @brief DMA I2S receive process half complete callback |
lypinator | 0:bb348c97df44 | 1352 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1353 | * the configuration information for the specified DMA module. |
lypinator | 0:bb348c97df44 | 1354 | * @retval None |
lypinator | 0:bb348c97df44 | 1355 | */ |
lypinator | 0:bb348c97df44 | 1356 | static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 1357 | { |
lypinator | 0:bb348c97df44 | 1358 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
lypinator | 0:bb348c97df44 | 1359 | |
lypinator | 0:bb348c97df44 | 1360 | HAL_I2S_RxHalfCpltCallback(hi2s); |
lypinator | 0:bb348c97df44 | 1361 | } |
lypinator | 0:bb348c97df44 | 1362 | |
lypinator | 0:bb348c97df44 | 1363 | /** |
lypinator | 0:bb348c97df44 | 1364 | * @brief DMA I2S communication error callback |
lypinator | 0:bb348c97df44 | 1365 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1366 | * the configuration information for the specified DMA module. |
lypinator | 0:bb348c97df44 | 1367 | * @retval None |
lypinator | 0:bb348c97df44 | 1368 | */ |
lypinator | 0:bb348c97df44 | 1369 | static void I2S_DMAError(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 1370 | { |
lypinator | 0:bb348c97df44 | 1371 | I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
lypinator | 0:bb348c97df44 | 1372 | |
lypinator | 0:bb348c97df44 | 1373 | /* Disable Rx and Tx DMA Request */ |
lypinator | 0:bb348c97df44 | 1374 | CLEAR_BIT(hi2s->Instance->CR2,(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN)); |
lypinator | 0:bb348c97df44 | 1375 | hi2s->TxXferCount = 0U; |
lypinator | 0:bb348c97df44 | 1376 | hi2s->RxXferCount = 0U; |
lypinator | 0:bb348c97df44 | 1377 | |
lypinator | 0:bb348c97df44 | 1378 | hi2s->State= HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 1379 | |
lypinator | 0:bb348c97df44 | 1380 | SET_BIT(hi2s->ErrorCode,HAL_I2S_ERROR_DMA); |
lypinator | 0:bb348c97df44 | 1381 | HAL_I2S_ErrorCallback(hi2s); |
lypinator | 0:bb348c97df44 | 1382 | } |
lypinator | 0:bb348c97df44 | 1383 | |
lypinator | 0:bb348c97df44 | 1384 | /** |
lypinator | 0:bb348c97df44 | 1385 | * @brief Transmit an amount of data in non-blocking mode with Interrupt |
lypinator | 0:bb348c97df44 | 1386 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1387 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1388 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1389 | */ |
lypinator | 0:bb348c97df44 | 1390 | static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1391 | { |
lypinator | 0:bb348c97df44 | 1392 | /* Transmit data */ |
lypinator | 0:bb348c97df44 | 1393 | hi2s->Instance->DR = (*hi2s->pTxBuffPtr++); |
lypinator | 0:bb348c97df44 | 1394 | hi2s->TxXferCount--; |
lypinator | 0:bb348c97df44 | 1395 | |
lypinator | 0:bb348c97df44 | 1396 | if(hi2s->TxXferCount == 0U) |
lypinator | 0:bb348c97df44 | 1397 | { |
lypinator | 0:bb348c97df44 | 1398 | /* Disable TXE and ERR interrupt */ |
lypinator | 0:bb348c97df44 | 1399 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
lypinator | 0:bb348c97df44 | 1400 | |
lypinator | 0:bb348c97df44 | 1401 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 1402 | HAL_I2S_TxCpltCallback(hi2s); |
lypinator | 0:bb348c97df44 | 1403 | } |
lypinator | 0:bb348c97df44 | 1404 | } |
lypinator | 0:bb348c97df44 | 1405 | |
lypinator | 0:bb348c97df44 | 1406 | /** |
lypinator | 0:bb348c97df44 | 1407 | * @brief Receive an amount of data in non-blocking mode with Interrupt |
lypinator | 0:bb348c97df44 | 1408 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1409 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1410 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1411 | */ |
lypinator | 0:bb348c97df44 | 1412 | static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1413 | { |
lypinator | 0:bb348c97df44 | 1414 | /* Receive data */ |
lypinator | 0:bb348c97df44 | 1415 | (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR; |
lypinator | 0:bb348c97df44 | 1416 | hi2s->RxXferCount--; |
lypinator | 0:bb348c97df44 | 1417 | |
lypinator | 0:bb348c97df44 | 1418 | if(hi2s->RxXferCount == 0U) |
lypinator | 0:bb348c97df44 | 1419 | { |
lypinator | 0:bb348c97df44 | 1420 | /* Disable RXNE and ERR interrupt */ |
lypinator | 0:bb348c97df44 | 1421 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
lypinator | 0:bb348c97df44 | 1422 | |
lypinator | 0:bb348c97df44 | 1423 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 1424 | HAL_I2S_RxCpltCallback(hi2s); |
lypinator | 0:bb348c97df44 | 1425 | } |
lypinator | 0:bb348c97df44 | 1426 | } |
lypinator | 0:bb348c97df44 | 1427 | |
lypinator | 0:bb348c97df44 | 1428 | /** |
lypinator | 0:bb348c97df44 | 1429 | * @brief This function handles I2S interrupt request. |
lypinator | 0:bb348c97df44 | 1430 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1431 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1432 | * @retval None |
lypinator | 0:bb348c97df44 | 1433 | */ |
lypinator | 0:bb348c97df44 | 1434 | static void I2S_IRQHandler(I2S_HandleTypeDef *hi2s) |
lypinator | 0:bb348c97df44 | 1435 | { |
lypinator | 0:bb348c97df44 | 1436 | __IO uint32_t i2ssr = hi2s->Instance->SR; |
lypinator | 0:bb348c97df44 | 1437 | |
lypinator | 0:bb348c97df44 | 1438 | if(hi2s->State == HAL_I2S_STATE_BUSY_RX) |
lypinator | 0:bb348c97df44 | 1439 | { |
lypinator | 0:bb348c97df44 | 1440 | /* I2S in mode Receiver ------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 1441 | if(((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET)) |
lypinator | 0:bb348c97df44 | 1442 | { |
lypinator | 0:bb348c97df44 | 1443 | I2S_Receive_IT(hi2s); |
lypinator | 0:bb348c97df44 | 1444 | } |
lypinator | 0:bb348c97df44 | 1445 | |
lypinator | 0:bb348c97df44 | 1446 | /* I2S Overrun error interrupt occured -------------------------------------*/ |
lypinator | 0:bb348c97df44 | 1447 | if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) |
lypinator | 0:bb348c97df44 | 1448 | { |
lypinator | 0:bb348c97df44 | 1449 | /* Disable RXNE and ERR interrupt */ |
lypinator | 0:bb348c97df44 | 1450 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR)); |
lypinator | 0:bb348c97df44 | 1451 | |
lypinator | 0:bb348c97df44 | 1452 | /* Clear Overrun flag */ |
lypinator | 0:bb348c97df44 | 1453 | __HAL_I2S_CLEAR_OVRFLAG(hi2s); |
lypinator | 0:bb348c97df44 | 1454 | |
lypinator | 0:bb348c97df44 | 1455 | /* Set the I2S State ready */ |
lypinator | 0:bb348c97df44 | 1456 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 1457 | |
lypinator | 0:bb348c97df44 | 1458 | |
lypinator | 0:bb348c97df44 | 1459 | /* Set the error code and execute error callback*/ |
lypinator | 0:bb348c97df44 | 1460 | SET_BIT(hi2s->ErrorCode,HAL_I2S_ERROR_OVR); |
lypinator | 0:bb348c97df44 | 1461 | HAL_I2S_ErrorCallback(hi2s); |
lypinator | 0:bb348c97df44 | 1462 | } |
lypinator | 0:bb348c97df44 | 1463 | } |
lypinator | 0:bb348c97df44 | 1464 | |
lypinator | 0:bb348c97df44 | 1465 | if(hi2s->State == HAL_I2S_STATE_BUSY_TX) |
lypinator | 0:bb348c97df44 | 1466 | { |
lypinator | 0:bb348c97df44 | 1467 | /* I2S in mode Transmitter -----------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 1468 | if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET)) |
lypinator | 0:bb348c97df44 | 1469 | { |
lypinator | 0:bb348c97df44 | 1470 | I2S_Transmit_IT(hi2s); |
lypinator | 0:bb348c97df44 | 1471 | } |
lypinator | 0:bb348c97df44 | 1472 | |
lypinator | 0:bb348c97df44 | 1473 | /* I2S Underrun error interrupt occurred --------------------------------*/ |
lypinator | 0:bb348c97df44 | 1474 | if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET)) |
lypinator | 0:bb348c97df44 | 1475 | { |
lypinator | 0:bb348c97df44 | 1476 | /* Disable TXE and ERR interrupt */ |
lypinator | 0:bb348c97df44 | 1477 | __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR)); |
lypinator | 0:bb348c97df44 | 1478 | |
lypinator | 0:bb348c97df44 | 1479 | /* Clear Underrun flag */ |
lypinator | 0:bb348c97df44 | 1480 | __HAL_I2S_CLEAR_UDRFLAG(hi2s); |
lypinator | 0:bb348c97df44 | 1481 | |
lypinator | 0:bb348c97df44 | 1482 | /* Set the I2S State ready */ |
lypinator | 0:bb348c97df44 | 1483 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 1484 | |
lypinator | 0:bb348c97df44 | 1485 | /* Set the error code and execute error callback*/ |
lypinator | 0:bb348c97df44 | 1486 | SET_BIT(hi2s->ErrorCode, HAL_I2S_ERROR_UDR); |
lypinator | 0:bb348c97df44 | 1487 | HAL_I2S_ErrorCallback(hi2s); |
lypinator | 0:bb348c97df44 | 1488 | } |
lypinator | 0:bb348c97df44 | 1489 | } |
lypinator | 0:bb348c97df44 | 1490 | } |
lypinator | 0:bb348c97df44 | 1491 | |
lypinator | 0:bb348c97df44 | 1492 | /** |
lypinator | 0:bb348c97df44 | 1493 | * @brief This function handles I2S Communication Timeout. |
lypinator | 0:bb348c97df44 | 1494 | * @param hi2s pointer to a I2S_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1495 | * the configuration information for I2S module |
lypinator | 0:bb348c97df44 | 1496 | * @param Flag Flag checked |
lypinator | 0:bb348c97df44 | 1497 | * @param State Value of the flag expected |
lypinator | 0:bb348c97df44 | 1498 | * @param Timeout Duration of the timeout |
lypinator | 0:bb348c97df44 | 1499 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 1500 | */ |
lypinator | 0:bb348c97df44 | 1501 | static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, |
lypinator | 0:bb348c97df44 | 1502 | uint32_t Timeout) |
lypinator | 0:bb348c97df44 | 1503 | { |
lypinator | 0:bb348c97df44 | 1504 | uint32_t tickstart = HAL_GetTick(); |
lypinator | 0:bb348c97df44 | 1505 | |
lypinator | 0:bb348c97df44 | 1506 | /* Wait until flag is set to status*/ |
lypinator | 0:bb348c97df44 | 1507 | while(((__HAL_I2S_GET_FLAG(hi2s, Flag)) ? SET : RESET) != State) |
lypinator | 0:bb348c97df44 | 1508 | { |
lypinator | 0:bb348c97df44 | 1509 | if(Timeout != HAL_MAX_DELAY) |
lypinator | 0:bb348c97df44 | 1510 | { |
lypinator | 0:bb348c97df44 | 1511 | if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout)) |
lypinator | 0:bb348c97df44 | 1512 | { |
lypinator | 0:bb348c97df44 | 1513 | /* Set the I2S State ready */ |
lypinator | 0:bb348c97df44 | 1514 | hi2s->State = HAL_I2S_STATE_READY; |
lypinator | 0:bb348c97df44 | 1515 | |
lypinator | 0:bb348c97df44 | 1516 | /* Process Unlocked */ |
lypinator | 0:bb348c97df44 | 1517 | __HAL_UNLOCK(hi2s); |
lypinator | 0:bb348c97df44 | 1518 | |
lypinator | 0:bb348c97df44 | 1519 | return HAL_TIMEOUT; |
lypinator | 0:bb348c97df44 | 1520 | } |
lypinator | 0:bb348c97df44 | 1521 | } |
lypinator | 0:bb348c97df44 | 1522 | } |
lypinator | 0:bb348c97df44 | 1523 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 1524 | } |
lypinator | 0:bb348c97df44 | 1525 | |
lypinator | 0:bb348c97df44 | 1526 | /** |
lypinator | 0:bb348c97df44 | 1527 | * @} |
lypinator | 0:bb348c97df44 | 1528 | */ |
lypinator | 0:bb348c97df44 | 1529 | |
lypinator | 0:bb348c97df44 | 1530 | /** |
lypinator | 0:bb348c97df44 | 1531 | * @} |
lypinator | 0:bb348c97df44 | 1532 | */ |
lypinator | 0:bb348c97df44 | 1533 | |
lypinator | 0:bb348c97df44 | 1534 | #endif /* HAL_I2S_MODULE_ENABLED */ |
lypinator | 0:bb348c97df44 | 1535 | /** |
lypinator | 0:bb348c97df44 | 1536 | * @} |
lypinator | 0:bb348c97df44 | 1537 | */ |
lypinator | 0:bb348c97df44 | 1538 | |
lypinator | 0:bb348c97df44 | 1539 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |