Initial commit
mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc_ex.c@0:bb348c97df44, 2020-09-16 (annotated)
- Committer:
- lypinator
- Date:
- Wed Sep 16 01:11:49 2020 +0000
- Revision:
- 0:bb348c97df44
Added PWM
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
lypinator | 0:bb348c97df44 | 1 | /** |
lypinator | 0:bb348c97df44 | 2 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 3 | * @file stm32f4xx_hal_adc_ex.c |
lypinator | 0:bb348c97df44 | 4 | * @author MCD Application Team |
lypinator | 0:bb348c97df44 | 5 | * @brief This file provides firmware functions to manage the following |
lypinator | 0:bb348c97df44 | 6 | * functionalities of the ADC extension peripheral: |
lypinator | 0:bb348c97df44 | 7 | * + Extended features functions |
lypinator | 0:bb348c97df44 | 8 | * |
lypinator | 0:bb348c97df44 | 9 | @verbatim |
lypinator | 0:bb348c97df44 | 10 | ============================================================================== |
lypinator | 0:bb348c97df44 | 11 | ##### How to use this driver ##### |
lypinator | 0:bb348c97df44 | 12 | ============================================================================== |
lypinator | 0:bb348c97df44 | 13 | [..] |
lypinator | 0:bb348c97df44 | 14 | (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit(): |
lypinator | 0:bb348c97df44 | 15 | (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE() |
lypinator | 0:bb348c97df44 | 16 | (##) ADC pins configuration |
lypinator | 0:bb348c97df44 | 17 | (+++) Enable the clock for the ADC GPIOs using the following function: |
lypinator | 0:bb348c97df44 | 18 | __HAL_RCC_GPIOx_CLK_ENABLE() |
lypinator | 0:bb348c97df44 | 19 | (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init() |
lypinator | 0:bb348c97df44 | 20 | (##) In case of using interrupts (e.g. HAL_ADC_Start_IT()) |
lypinator | 0:bb348c97df44 | 21 | (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority() |
lypinator | 0:bb348c97df44 | 22 | (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ() |
lypinator | 0:bb348c97df44 | 23 | (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler() |
lypinator | 0:bb348c97df44 | 24 | (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA()) |
lypinator | 0:bb348c97df44 | 25 | (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE() |
lypinator | 0:bb348c97df44 | 26 | (+++) Configure and enable two DMA streams stream for managing data |
lypinator | 0:bb348c97df44 | 27 | transfer from peripheral to memory (output stream) |
lypinator | 0:bb348c97df44 | 28 | (+++) Associate the initialized DMA handle to the ADC DMA handle |
lypinator | 0:bb348c97df44 | 29 | using __HAL_LINKDMA() |
lypinator | 0:bb348c97df44 | 30 | (+++) Configure the priority and enable the NVIC for the transfer complete |
lypinator | 0:bb348c97df44 | 31 | interrupt on the two DMA Streams. The output stream should have higher |
lypinator | 0:bb348c97df44 | 32 | priority than the input stream. |
lypinator | 0:bb348c97df44 | 33 | (#) Configure the ADC Prescaler, conversion resolution and data alignment |
lypinator | 0:bb348c97df44 | 34 | using the HAL_ADC_Init() function. |
lypinator | 0:bb348c97df44 | 35 | |
lypinator | 0:bb348c97df44 | 36 | (#) Configure the ADC Injected channels group features, use HAL_ADC_Init() |
lypinator | 0:bb348c97df44 | 37 | and HAL_ADC_ConfigChannel() functions. |
lypinator | 0:bb348c97df44 | 38 | |
lypinator | 0:bb348c97df44 | 39 | (#) Three operation modes are available within this driver : |
lypinator | 0:bb348c97df44 | 40 | |
lypinator | 0:bb348c97df44 | 41 | *** Polling mode IO operation *** |
lypinator | 0:bb348c97df44 | 42 | ================================= |
lypinator | 0:bb348c97df44 | 43 | [..] |
lypinator | 0:bb348c97df44 | 44 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart() |
lypinator | 0:bb348c97df44 | 45 | (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage |
lypinator | 0:bb348c97df44 | 46 | user can specify the value of timeout according to his end application |
lypinator | 0:bb348c97df44 | 47 | (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() function. |
lypinator | 0:bb348c97df44 | 48 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop() |
lypinator | 0:bb348c97df44 | 49 | |
lypinator | 0:bb348c97df44 | 50 | *** Interrupt mode IO operation *** |
lypinator | 0:bb348c97df44 | 51 | =================================== |
lypinator | 0:bb348c97df44 | 52 | [..] |
lypinator | 0:bb348c97df44 | 53 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT() |
lypinator | 0:bb348c97df44 | 54 | (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine |
lypinator | 0:bb348c97df44 | 55 | (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can |
lypinator | 0:bb348c97df44 | 56 | add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback |
lypinator | 0:bb348c97df44 | 57 | (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can |
lypinator | 0:bb348c97df44 | 58 | add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback |
lypinator | 0:bb348c97df44 | 59 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_IT() |
lypinator | 0:bb348c97df44 | 60 | |
lypinator | 0:bb348c97df44 | 61 | |
lypinator | 0:bb348c97df44 | 62 | *** DMA mode IO operation *** |
lypinator | 0:bb348c97df44 | 63 | ============================== |
lypinator | 0:bb348c97df44 | 64 | [..] |
lypinator | 0:bb348c97df44 | 65 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_DMA(), at this stage the user specify the length |
lypinator | 0:bb348c97df44 | 66 | of data to be transferred at each end of conversion |
lypinator | 0:bb348c97df44 | 67 | (+) At The end of data transfer ba HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can |
lypinator | 0:bb348c97df44 | 68 | add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback |
lypinator | 0:bb348c97df44 | 69 | (+) In case of transfer Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can |
lypinator | 0:bb348c97df44 | 70 | add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback |
lypinator | 0:bb348c97df44 | 71 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_DMA() |
lypinator | 0:bb348c97df44 | 72 | |
lypinator | 0:bb348c97df44 | 73 | *** Multi mode ADCs Regular channels configuration *** |
lypinator | 0:bb348c97df44 | 74 | ====================================================== |
lypinator | 0:bb348c97df44 | 75 | [..] |
lypinator | 0:bb348c97df44 | 76 | (+) Select the Multi mode ADC regular channels features (dual or triple mode) |
lypinator | 0:bb348c97df44 | 77 | and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions. |
lypinator | 0:bb348c97df44 | 78 | (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length |
lypinator | 0:bb348c97df44 | 79 | of data to be transferred at each end of conversion |
lypinator | 0:bb348c97df44 | 80 | (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function. |
lypinator | 0:bb348c97df44 | 81 | |
lypinator | 0:bb348c97df44 | 82 | |
lypinator | 0:bb348c97df44 | 83 | @endverbatim |
lypinator | 0:bb348c97df44 | 84 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 85 | * @attention |
lypinator | 0:bb348c97df44 | 86 | * |
lypinator | 0:bb348c97df44 | 87 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
lypinator | 0:bb348c97df44 | 88 | * |
lypinator | 0:bb348c97df44 | 89 | * Redistribution and use in source and binary forms, with or without modification, |
lypinator | 0:bb348c97df44 | 90 | * are permitted provided that the following conditions are met: |
lypinator | 0:bb348c97df44 | 91 | * 1. Redistributions of source code must retain the above copyright notice, |
lypinator | 0:bb348c97df44 | 92 | * this list of conditions and the following disclaimer. |
lypinator | 0:bb348c97df44 | 93 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
lypinator | 0:bb348c97df44 | 94 | * this list of conditions and the following disclaimer in the documentation |
lypinator | 0:bb348c97df44 | 95 | * and/or other materials provided with the distribution. |
lypinator | 0:bb348c97df44 | 96 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
lypinator | 0:bb348c97df44 | 97 | * may be used to endorse or promote products derived from this software |
lypinator | 0:bb348c97df44 | 98 | * without specific prior written permission. |
lypinator | 0:bb348c97df44 | 99 | * |
lypinator | 0:bb348c97df44 | 100 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
lypinator | 0:bb348c97df44 | 101 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
lypinator | 0:bb348c97df44 | 102 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
lypinator | 0:bb348c97df44 | 103 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
lypinator | 0:bb348c97df44 | 104 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
lypinator | 0:bb348c97df44 | 105 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
lypinator | 0:bb348c97df44 | 106 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
lypinator | 0:bb348c97df44 | 107 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
lypinator | 0:bb348c97df44 | 108 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
lypinator | 0:bb348c97df44 | 109 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
lypinator | 0:bb348c97df44 | 110 | * |
lypinator | 0:bb348c97df44 | 111 | ****************************************************************************** |
lypinator | 0:bb348c97df44 | 112 | */ |
lypinator | 0:bb348c97df44 | 113 | |
lypinator | 0:bb348c97df44 | 114 | /* Includes ------------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 115 | #include "stm32f4xx_hal.h" |
lypinator | 0:bb348c97df44 | 116 | |
lypinator | 0:bb348c97df44 | 117 | /** @addtogroup STM32F4xx_HAL_Driver |
lypinator | 0:bb348c97df44 | 118 | * @{ |
lypinator | 0:bb348c97df44 | 119 | */ |
lypinator | 0:bb348c97df44 | 120 | |
lypinator | 0:bb348c97df44 | 121 | /** @defgroup ADCEx ADCEx |
lypinator | 0:bb348c97df44 | 122 | * @brief ADC Extended driver modules |
lypinator | 0:bb348c97df44 | 123 | * @{ |
lypinator | 0:bb348c97df44 | 124 | */ |
lypinator | 0:bb348c97df44 | 125 | |
lypinator | 0:bb348c97df44 | 126 | #ifdef HAL_ADC_MODULE_ENABLED |
lypinator | 0:bb348c97df44 | 127 | |
lypinator | 0:bb348c97df44 | 128 | /* Private typedef -----------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 129 | /* Private define ------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 130 | /* Private macro -------------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 131 | /* Private variables ---------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 132 | /** @addtogroup ADCEx_Private_Functions |
lypinator | 0:bb348c97df44 | 133 | * @{ |
lypinator | 0:bb348c97df44 | 134 | */ |
lypinator | 0:bb348c97df44 | 135 | /* Private function prototypes -----------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 136 | static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 137 | static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 138 | static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma); |
lypinator | 0:bb348c97df44 | 139 | /** |
lypinator | 0:bb348c97df44 | 140 | * @} |
lypinator | 0:bb348c97df44 | 141 | */ |
lypinator | 0:bb348c97df44 | 142 | |
lypinator | 0:bb348c97df44 | 143 | /* Exported functions --------------------------------------------------------*/ |
lypinator | 0:bb348c97df44 | 144 | /** @defgroup ADCEx_Exported_Functions ADC Exported Functions |
lypinator | 0:bb348c97df44 | 145 | * @{ |
lypinator | 0:bb348c97df44 | 146 | */ |
lypinator | 0:bb348c97df44 | 147 | |
lypinator | 0:bb348c97df44 | 148 | /** @defgroup ADCEx_Exported_Functions_Group1 Extended features functions |
lypinator | 0:bb348c97df44 | 149 | * @brief Extended features functions |
lypinator | 0:bb348c97df44 | 150 | * |
lypinator | 0:bb348c97df44 | 151 | @verbatim |
lypinator | 0:bb348c97df44 | 152 | =============================================================================== |
lypinator | 0:bb348c97df44 | 153 | ##### Extended features functions ##### |
lypinator | 0:bb348c97df44 | 154 | =============================================================================== |
lypinator | 0:bb348c97df44 | 155 | [..] This section provides functions allowing to: |
lypinator | 0:bb348c97df44 | 156 | (+) Start conversion of injected channel. |
lypinator | 0:bb348c97df44 | 157 | (+) Stop conversion of injected channel. |
lypinator | 0:bb348c97df44 | 158 | (+) Start multimode and enable DMA transfer. |
lypinator | 0:bb348c97df44 | 159 | (+) Stop multimode and disable DMA transfer. |
lypinator | 0:bb348c97df44 | 160 | (+) Get result of injected channel conversion. |
lypinator | 0:bb348c97df44 | 161 | (+) Get result of multimode conversion. |
lypinator | 0:bb348c97df44 | 162 | (+) Configure injected channels. |
lypinator | 0:bb348c97df44 | 163 | (+) Configure multimode. |
lypinator | 0:bb348c97df44 | 164 | |
lypinator | 0:bb348c97df44 | 165 | @endverbatim |
lypinator | 0:bb348c97df44 | 166 | * @{ |
lypinator | 0:bb348c97df44 | 167 | */ |
lypinator | 0:bb348c97df44 | 168 | |
lypinator | 0:bb348c97df44 | 169 | /** |
lypinator | 0:bb348c97df44 | 170 | * @brief Enables the selected ADC software start conversion of the injected channels. |
lypinator | 0:bb348c97df44 | 171 | * @param hadc pointer to a ADC_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 172 | * the configuration information for the specified ADC. |
lypinator | 0:bb348c97df44 | 173 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 174 | */ |
lypinator | 0:bb348c97df44 | 175 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc) |
lypinator | 0:bb348c97df44 | 176 | { |
lypinator | 0:bb348c97df44 | 177 | __IO uint32_t counter = 0U; |
lypinator | 0:bb348c97df44 | 178 | uint32_t tmp1 = 0U, tmp2 = 0U; |
lypinator | 0:bb348c97df44 | 179 | ADC_Common_TypeDef *tmpADC_Common; |
lypinator | 0:bb348c97df44 | 180 | |
lypinator | 0:bb348c97df44 | 181 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 182 | __HAL_LOCK(hadc); |
lypinator | 0:bb348c97df44 | 183 | |
lypinator | 0:bb348c97df44 | 184 | /* Enable the ADC peripheral */ |
lypinator | 0:bb348c97df44 | 185 | |
lypinator | 0:bb348c97df44 | 186 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
lypinator | 0:bb348c97df44 | 187 | Tstab time the ADC's stabilization */ |
lypinator | 0:bb348c97df44 | 188 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
lypinator | 0:bb348c97df44 | 189 | { |
lypinator | 0:bb348c97df44 | 190 | /* Enable the Peripheral */ |
lypinator | 0:bb348c97df44 | 191 | __HAL_ADC_ENABLE(hadc); |
lypinator | 0:bb348c97df44 | 192 | |
lypinator | 0:bb348c97df44 | 193 | /* Delay for ADC stabilization time */ |
lypinator | 0:bb348c97df44 | 194 | /* Compute number of CPU cycles to wait for */ |
lypinator | 0:bb348c97df44 | 195 | counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); |
lypinator | 0:bb348c97df44 | 196 | while(counter != 0U) |
lypinator | 0:bb348c97df44 | 197 | { |
lypinator | 0:bb348c97df44 | 198 | counter--; |
lypinator | 0:bb348c97df44 | 199 | } |
lypinator | 0:bb348c97df44 | 200 | } |
lypinator | 0:bb348c97df44 | 201 | |
lypinator | 0:bb348c97df44 | 202 | /* Start conversion if ADC is effectively enabled */ |
lypinator | 0:bb348c97df44 | 203 | if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON)) |
lypinator | 0:bb348c97df44 | 204 | { |
lypinator | 0:bb348c97df44 | 205 | /* Set ADC state */ |
lypinator | 0:bb348c97df44 | 206 | /* - Clear state bitfield related to injected group conversion results */ |
lypinator | 0:bb348c97df44 | 207 | /* - Set state bitfield related to injected operation */ |
lypinator | 0:bb348c97df44 | 208 | ADC_STATE_CLR_SET(hadc->State, |
lypinator | 0:bb348c97df44 | 209 | HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, |
lypinator | 0:bb348c97df44 | 210 | HAL_ADC_STATE_INJ_BUSY); |
lypinator | 0:bb348c97df44 | 211 | |
lypinator | 0:bb348c97df44 | 212 | /* Check if a regular conversion is ongoing */ |
lypinator | 0:bb348c97df44 | 213 | /* Note: On this device, there is no ADC error code fields related to */ |
lypinator | 0:bb348c97df44 | 214 | /* conversions on group injected only. In case of conversion on */ |
lypinator | 0:bb348c97df44 | 215 | /* going on group regular, no error code is reset. */ |
lypinator | 0:bb348c97df44 | 216 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY)) |
lypinator | 0:bb348c97df44 | 217 | { |
lypinator | 0:bb348c97df44 | 218 | /* Reset ADC all error code fields */ |
lypinator | 0:bb348c97df44 | 219 | ADC_CLEAR_ERRORCODE(hadc); |
lypinator | 0:bb348c97df44 | 220 | } |
lypinator | 0:bb348c97df44 | 221 | |
lypinator | 0:bb348c97df44 | 222 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 223 | /* Unlock before starting ADC conversions: in case of potential */ |
lypinator | 0:bb348c97df44 | 224 | /* interruption, to let the process to ADC IRQ Handler. */ |
lypinator | 0:bb348c97df44 | 225 | __HAL_UNLOCK(hadc); |
lypinator | 0:bb348c97df44 | 226 | |
lypinator | 0:bb348c97df44 | 227 | /* Clear injected group conversion flag */ |
lypinator | 0:bb348c97df44 | 228 | /* (To ensure of no unknown state from potential previous ADC operations) */ |
lypinator | 0:bb348c97df44 | 229 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC); |
lypinator | 0:bb348c97df44 | 230 | |
lypinator | 0:bb348c97df44 | 231 | /* Pointer to the common control register to which is belonging hadc */ |
lypinator | 0:bb348c97df44 | 232 | /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */ |
lypinator | 0:bb348c97df44 | 233 | /* control register) */ |
lypinator | 0:bb348c97df44 | 234 | tmpADC_Common = ADC_COMMON_REGISTER(hadc); |
lypinator | 0:bb348c97df44 | 235 | |
lypinator | 0:bb348c97df44 | 236 | /* Check if Multimode enabled */ |
lypinator | 0:bb348c97df44 | 237 | if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI)) |
lypinator | 0:bb348c97df44 | 238 | { |
lypinator | 0:bb348c97df44 | 239 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
lypinator | 0:bb348c97df44 | 240 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
lypinator | 0:bb348c97df44 | 241 | if(tmp1 && tmp2) |
lypinator | 0:bb348c97df44 | 242 | { |
lypinator | 0:bb348c97df44 | 243 | /* Enable the selected ADC software conversion for injected group */ |
lypinator | 0:bb348c97df44 | 244 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
lypinator | 0:bb348c97df44 | 245 | } |
lypinator | 0:bb348c97df44 | 246 | } |
lypinator | 0:bb348c97df44 | 247 | else |
lypinator | 0:bb348c97df44 | 248 | { |
lypinator | 0:bb348c97df44 | 249 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
lypinator | 0:bb348c97df44 | 250 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
lypinator | 0:bb348c97df44 | 251 | if((hadc->Instance == ADC1) && tmp1 && tmp2) |
lypinator | 0:bb348c97df44 | 252 | { |
lypinator | 0:bb348c97df44 | 253 | /* Enable the selected ADC software conversion for injected group */ |
lypinator | 0:bb348c97df44 | 254 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
lypinator | 0:bb348c97df44 | 255 | } |
lypinator | 0:bb348c97df44 | 256 | } |
lypinator | 0:bb348c97df44 | 257 | } |
lypinator | 0:bb348c97df44 | 258 | |
lypinator | 0:bb348c97df44 | 259 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 260 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 261 | } |
lypinator | 0:bb348c97df44 | 262 | |
lypinator | 0:bb348c97df44 | 263 | /** |
lypinator | 0:bb348c97df44 | 264 | * @brief Enables the interrupt and starts ADC conversion of injected channels. |
lypinator | 0:bb348c97df44 | 265 | * @param hadc pointer to a ADC_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 266 | * the configuration information for the specified ADC. |
lypinator | 0:bb348c97df44 | 267 | * |
lypinator | 0:bb348c97df44 | 268 | * @retval HAL status. |
lypinator | 0:bb348c97df44 | 269 | */ |
lypinator | 0:bb348c97df44 | 270 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc) |
lypinator | 0:bb348c97df44 | 271 | { |
lypinator | 0:bb348c97df44 | 272 | __IO uint32_t counter = 0U; |
lypinator | 0:bb348c97df44 | 273 | uint32_t tmp1 = 0U, tmp2 = 0U; |
lypinator | 0:bb348c97df44 | 274 | ADC_Common_TypeDef *tmpADC_Common; |
lypinator | 0:bb348c97df44 | 275 | |
lypinator | 0:bb348c97df44 | 276 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 277 | __HAL_LOCK(hadc); |
lypinator | 0:bb348c97df44 | 278 | |
lypinator | 0:bb348c97df44 | 279 | /* Enable the ADC peripheral */ |
lypinator | 0:bb348c97df44 | 280 | |
lypinator | 0:bb348c97df44 | 281 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
lypinator | 0:bb348c97df44 | 282 | Tstab time the ADC's stabilization */ |
lypinator | 0:bb348c97df44 | 283 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
lypinator | 0:bb348c97df44 | 284 | { |
lypinator | 0:bb348c97df44 | 285 | /* Enable the Peripheral */ |
lypinator | 0:bb348c97df44 | 286 | __HAL_ADC_ENABLE(hadc); |
lypinator | 0:bb348c97df44 | 287 | |
lypinator | 0:bb348c97df44 | 288 | /* Delay for ADC stabilization time */ |
lypinator | 0:bb348c97df44 | 289 | /* Compute number of CPU cycles to wait for */ |
lypinator | 0:bb348c97df44 | 290 | counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); |
lypinator | 0:bb348c97df44 | 291 | while(counter != 0U) |
lypinator | 0:bb348c97df44 | 292 | { |
lypinator | 0:bb348c97df44 | 293 | counter--; |
lypinator | 0:bb348c97df44 | 294 | } |
lypinator | 0:bb348c97df44 | 295 | } |
lypinator | 0:bb348c97df44 | 296 | |
lypinator | 0:bb348c97df44 | 297 | /* Start conversion if ADC is effectively enabled */ |
lypinator | 0:bb348c97df44 | 298 | if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON)) |
lypinator | 0:bb348c97df44 | 299 | { |
lypinator | 0:bb348c97df44 | 300 | /* Set ADC state */ |
lypinator | 0:bb348c97df44 | 301 | /* - Clear state bitfield related to injected group conversion results */ |
lypinator | 0:bb348c97df44 | 302 | /* - Set state bitfield related to injected operation */ |
lypinator | 0:bb348c97df44 | 303 | ADC_STATE_CLR_SET(hadc->State, |
lypinator | 0:bb348c97df44 | 304 | HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC, |
lypinator | 0:bb348c97df44 | 305 | HAL_ADC_STATE_INJ_BUSY); |
lypinator | 0:bb348c97df44 | 306 | |
lypinator | 0:bb348c97df44 | 307 | /* Check if a regular conversion is ongoing */ |
lypinator | 0:bb348c97df44 | 308 | /* Note: On this device, there is no ADC error code fields related to */ |
lypinator | 0:bb348c97df44 | 309 | /* conversions on group injected only. In case of conversion on */ |
lypinator | 0:bb348c97df44 | 310 | /* going on group regular, no error code is reset. */ |
lypinator | 0:bb348c97df44 | 311 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY)) |
lypinator | 0:bb348c97df44 | 312 | { |
lypinator | 0:bb348c97df44 | 313 | /* Reset ADC all error code fields */ |
lypinator | 0:bb348c97df44 | 314 | ADC_CLEAR_ERRORCODE(hadc); |
lypinator | 0:bb348c97df44 | 315 | } |
lypinator | 0:bb348c97df44 | 316 | |
lypinator | 0:bb348c97df44 | 317 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 318 | /* Unlock before starting ADC conversions: in case of potential */ |
lypinator | 0:bb348c97df44 | 319 | /* interruption, to let the process to ADC IRQ Handler. */ |
lypinator | 0:bb348c97df44 | 320 | __HAL_UNLOCK(hadc); |
lypinator | 0:bb348c97df44 | 321 | |
lypinator | 0:bb348c97df44 | 322 | /* Clear injected group conversion flag */ |
lypinator | 0:bb348c97df44 | 323 | /* (To ensure of no unknown state from potential previous ADC operations) */ |
lypinator | 0:bb348c97df44 | 324 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC); |
lypinator | 0:bb348c97df44 | 325 | |
lypinator | 0:bb348c97df44 | 326 | /* Enable end of conversion interrupt for injected channels */ |
lypinator | 0:bb348c97df44 | 327 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); |
lypinator | 0:bb348c97df44 | 328 | |
lypinator | 0:bb348c97df44 | 329 | /* Pointer to the common control register to which is belonging hadc */ |
lypinator | 0:bb348c97df44 | 330 | /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */ |
lypinator | 0:bb348c97df44 | 331 | /* control register) */ |
lypinator | 0:bb348c97df44 | 332 | tmpADC_Common = ADC_COMMON_REGISTER(hadc); |
lypinator | 0:bb348c97df44 | 333 | |
lypinator | 0:bb348c97df44 | 334 | /* Check if Multimode enabled */ |
lypinator | 0:bb348c97df44 | 335 | if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI)) |
lypinator | 0:bb348c97df44 | 336 | { |
lypinator | 0:bb348c97df44 | 337 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
lypinator | 0:bb348c97df44 | 338 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
lypinator | 0:bb348c97df44 | 339 | if(tmp1 && tmp2) |
lypinator | 0:bb348c97df44 | 340 | { |
lypinator | 0:bb348c97df44 | 341 | /* Enable the selected ADC software conversion for injected group */ |
lypinator | 0:bb348c97df44 | 342 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
lypinator | 0:bb348c97df44 | 343 | } |
lypinator | 0:bb348c97df44 | 344 | } |
lypinator | 0:bb348c97df44 | 345 | else |
lypinator | 0:bb348c97df44 | 346 | { |
lypinator | 0:bb348c97df44 | 347 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
lypinator | 0:bb348c97df44 | 348 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
lypinator | 0:bb348c97df44 | 349 | if((hadc->Instance == ADC1) && tmp1 && tmp2) |
lypinator | 0:bb348c97df44 | 350 | { |
lypinator | 0:bb348c97df44 | 351 | /* Enable the selected ADC software conversion for injected group */ |
lypinator | 0:bb348c97df44 | 352 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
lypinator | 0:bb348c97df44 | 353 | } |
lypinator | 0:bb348c97df44 | 354 | } |
lypinator | 0:bb348c97df44 | 355 | } |
lypinator | 0:bb348c97df44 | 356 | |
lypinator | 0:bb348c97df44 | 357 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 358 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 359 | } |
lypinator | 0:bb348c97df44 | 360 | |
lypinator | 0:bb348c97df44 | 361 | /** |
lypinator | 0:bb348c97df44 | 362 | * @brief Stop conversion of injected channels. Disable ADC peripheral if |
lypinator | 0:bb348c97df44 | 363 | * no regular conversion is on going. |
lypinator | 0:bb348c97df44 | 364 | * @note If ADC must be disabled and if conversion is on going on |
lypinator | 0:bb348c97df44 | 365 | * regular group, function HAL_ADC_Stop must be used to stop both |
lypinator | 0:bb348c97df44 | 366 | * injected and regular groups, and disable the ADC. |
lypinator | 0:bb348c97df44 | 367 | * @note If injected group mode auto-injection is enabled, |
lypinator | 0:bb348c97df44 | 368 | * function HAL_ADC_Stop must be used. |
lypinator | 0:bb348c97df44 | 369 | * @note In case of auto-injection mode, HAL_ADC_Stop must be used. |
lypinator | 0:bb348c97df44 | 370 | * @param hadc ADC handle |
lypinator | 0:bb348c97df44 | 371 | * @retval None |
lypinator | 0:bb348c97df44 | 372 | */ |
lypinator | 0:bb348c97df44 | 373 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc) |
lypinator | 0:bb348c97df44 | 374 | { |
lypinator | 0:bb348c97df44 | 375 | HAL_StatusTypeDef tmp_hal_status = HAL_OK; |
lypinator | 0:bb348c97df44 | 376 | |
lypinator | 0:bb348c97df44 | 377 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 378 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
lypinator | 0:bb348c97df44 | 379 | |
lypinator | 0:bb348c97df44 | 380 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 381 | __HAL_LOCK(hadc); |
lypinator | 0:bb348c97df44 | 382 | |
lypinator | 0:bb348c97df44 | 383 | /* Stop potential conversion and disable ADC peripheral */ |
lypinator | 0:bb348c97df44 | 384 | /* Conditioned to: */ |
lypinator | 0:bb348c97df44 | 385 | /* - No conversion on the other group (regular group) is intended to */ |
lypinator | 0:bb348c97df44 | 386 | /* continue (injected and regular groups stop conversion and ADC disable */ |
lypinator | 0:bb348c97df44 | 387 | /* are common) */ |
lypinator | 0:bb348c97df44 | 388 | /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */ |
lypinator | 0:bb348c97df44 | 389 | if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) && |
lypinator | 0:bb348c97df44 | 390 | HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) ) |
lypinator | 0:bb348c97df44 | 391 | { |
lypinator | 0:bb348c97df44 | 392 | /* Stop potential conversion on going, on regular and injected groups */ |
lypinator | 0:bb348c97df44 | 393 | /* Disable ADC peripheral */ |
lypinator | 0:bb348c97df44 | 394 | __HAL_ADC_DISABLE(hadc); |
lypinator | 0:bb348c97df44 | 395 | |
lypinator | 0:bb348c97df44 | 396 | /* Check if ADC is effectively disabled */ |
lypinator | 0:bb348c97df44 | 397 | if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON)) |
lypinator | 0:bb348c97df44 | 398 | { |
lypinator | 0:bb348c97df44 | 399 | /* Set ADC state */ |
lypinator | 0:bb348c97df44 | 400 | ADC_STATE_CLR_SET(hadc->State, |
lypinator | 0:bb348c97df44 | 401 | HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, |
lypinator | 0:bb348c97df44 | 402 | HAL_ADC_STATE_READY); |
lypinator | 0:bb348c97df44 | 403 | } |
lypinator | 0:bb348c97df44 | 404 | } |
lypinator | 0:bb348c97df44 | 405 | else |
lypinator | 0:bb348c97df44 | 406 | { |
lypinator | 0:bb348c97df44 | 407 | /* Update ADC state machine to error */ |
lypinator | 0:bb348c97df44 | 408 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); |
lypinator | 0:bb348c97df44 | 409 | |
lypinator | 0:bb348c97df44 | 410 | tmp_hal_status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 411 | } |
lypinator | 0:bb348c97df44 | 412 | |
lypinator | 0:bb348c97df44 | 413 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 414 | __HAL_UNLOCK(hadc); |
lypinator | 0:bb348c97df44 | 415 | |
lypinator | 0:bb348c97df44 | 416 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 417 | return tmp_hal_status; |
lypinator | 0:bb348c97df44 | 418 | } |
lypinator | 0:bb348c97df44 | 419 | |
lypinator | 0:bb348c97df44 | 420 | /** |
lypinator | 0:bb348c97df44 | 421 | * @brief Poll for injected conversion complete |
lypinator | 0:bb348c97df44 | 422 | * @param hadc pointer to a ADC_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 423 | * the configuration information for the specified ADC. |
lypinator | 0:bb348c97df44 | 424 | * @param Timeout Timeout value in millisecond. |
lypinator | 0:bb348c97df44 | 425 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 426 | */ |
lypinator | 0:bb348c97df44 | 427 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) |
lypinator | 0:bb348c97df44 | 428 | { |
lypinator | 0:bb348c97df44 | 429 | uint32_t tickstart = 0U; |
lypinator | 0:bb348c97df44 | 430 | |
lypinator | 0:bb348c97df44 | 431 | /* Get tick */ |
lypinator | 0:bb348c97df44 | 432 | tickstart = HAL_GetTick(); |
lypinator | 0:bb348c97df44 | 433 | |
lypinator | 0:bb348c97df44 | 434 | /* Check End of conversion flag */ |
lypinator | 0:bb348c97df44 | 435 | while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC))) |
lypinator | 0:bb348c97df44 | 436 | { |
lypinator | 0:bb348c97df44 | 437 | /* Check for the Timeout */ |
lypinator | 0:bb348c97df44 | 438 | if(Timeout != HAL_MAX_DELAY) |
lypinator | 0:bb348c97df44 | 439 | { |
lypinator | 0:bb348c97df44 | 440 | if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout)) |
lypinator | 0:bb348c97df44 | 441 | { |
lypinator | 0:bb348c97df44 | 442 | hadc->State= HAL_ADC_STATE_TIMEOUT; |
lypinator | 0:bb348c97df44 | 443 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 444 | __HAL_UNLOCK(hadc); |
lypinator | 0:bb348c97df44 | 445 | return HAL_TIMEOUT; |
lypinator | 0:bb348c97df44 | 446 | } |
lypinator | 0:bb348c97df44 | 447 | } |
lypinator | 0:bb348c97df44 | 448 | } |
lypinator | 0:bb348c97df44 | 449 | |
lypinator | 0:bb348c97df44 | 450 | /* Clear injected group conversion flag */ |
lypinator | 0:bb348c97df44 | 451 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC); |
lypinator | 0:bb348c97df44 | 452 | |
lypinator | 0:bb348c97df44 | 453 | /* Update ADC state machine */ |
lypinator | 0:bb348c97df44 | 454 | SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); |
lypinator | 0:bb348c97df44 | 455 | |
lypinator | 0:bb348c97df44 | 456 | /* Determine whether any further conversion upcoming on group injected */ |
lypinator | 0:bb348c97df44 | 457 | /* by external trigger, continuous mode or scan sequence on going. */ |
lypinator | 0:bb348c97df44 | 458 | /* Note: On STM32F4, there is no independent flag of end of sequence. */ |
lypinator | 0:bb348c97df44 | 459 | /* The test of scan sequence on going is done either with scan */ |
lypinator | 0:bb348c97df44 | 460 | /* sequence disabled or with end of conversion flag set to */ |
lypinator | 0:bb348c97df44 | 461 | /* of end of sequence. */ |
lypinator | 0:bb348c97df44 | 462 | if(ADC_IS_SOFTWARE_START_INJECTED(hadc) && |
lypinator | 0:bb348c97df44 | 463 | (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) || |
lypinator | 0:bb348c97df44 | 464 | HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) && |
lypinator | 0:bb348c97df44 | 465 | (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) && |
lypinator | 0:bb348c97df44 | 466 | (ADC_IS_SOFTWARE_START_REGULAR(hadc) && |
lypinator | 0:bb348c97df44 | 467 | (hadc->Init.ContinuousConvMode == DISABLE) ) ) ) |
lypinator | 0:bb348c97df44 | 468 | { |
lypinator | 0:bb348c97df44 | 469 | /* Set ADC state */ |
lypinator | 0:bb348c97df44 | 470 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); |
lypinator | 0:bb348c97df44 | 471 | |
lypinator | 0:bb348c97df44 | 472 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY)) |
lypinator | 0:bb348c97df44 | 473 | { |
lypinator | 0:bb348c97df44 | 474 | SET_BIT(hadc->State, HAL_ADC_STATE_READY); |
lypinator | 0:bb348c97df44 | 475 | } |
lypinator | 0:bb348c97df44 | 476 | } |
lypinator | 0:bb348c97df44 | 477 | |
lypinator | 0:bb348c97df44 | 478 | /* Return ADC state */ |
lypinator | 0:bb348c97df44 | 479 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 480 | } |
lypinator | 0:bb348c97df44 | 481 | |
lypinator | 0:bb348c97df44 | 482 | /** |
lypinator | 0:bb348c97df44 | 483 | * @brief Stop conversion of injected channels, disable interruption of |
lypinator | 0:bb348c97df44 | 484 | * end-of-conversion. Disable ADC peripheral if no regular conversion |
lypinator | 0:bb348c97df44 | 485 | * is on going. |
lypinator | 0:bb348c97df44 | 486 | * @note If ADC must be disabled and if conversion is on going on |
lypinator | 0:bb348c97df44 | 487 | * regular group, function HAL_ADC_Stop must be used to stop both |
lypinator | 0:bb348c97df44 | 488 | * injected and regular groups, and disable the ADC. |
lypinator | 0:bb348c97df44 | 489 | * @note If injected group mode auto-injection is enabled, |
lypinator | 0:bb348c97df44 | 490 | * function HAL_ADC_Stop must be used. |
lypinator | 0:bb348c97df44 | 491 | * @param hadc ADC handle |
lypinator | 0:bb348c97df44 | 492 | * @retval None |
lypinator | 0:bb348c97df44 | 493 | */ |
lypinator | 0:bb348c97df44 | 494 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc) |
lypinator | 0:bb348c97df44 | 495 | { |
lypinator | 0:bb348c97df44 | 496 | HAL_StatusTypeDef tmp_hal_status = HAL_OK; |
lypinator | 0:bb348c97df44 | 497 | |
lypinator | 0:bb348c97df44 | 498 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 499 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
lypinator | 0:bb348c97df44 | 500 | |
lypinator | 0:bb348c97df44 | 501 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 502 | __HAL_LOCK(hadc); |
lypinator | 0:bb348c97df44 | 503 | |
lypinator | 0:bb348c97df44 | 504 | /* Stop potential conversion and disable ADC peripheral */ |
lypinator | 0:bb348c97df44 | 505 | /* Conditioned to: */ |
lypinator | 0:bb348c97df44 | 506 | /* - No conversion on the other group (regular group) is intended to */ |
lypinator | 0:bb348c97df44 | 507 | /* continue (injected and regular groups stop conversion and ADC disable */ |
lypinator | 0:bb348c97df44 | 508 | /* are common) */ |
lypinator | 0:bb348c97df44 | 509 | /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */ |
lypinator | 0:bb348c97df44 | 510 | if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) && |
lypinator | 0:bb348c97df44 | 511 | HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) ) |
lypinator | 0:bb348c97df44 | 512 | { |
lypinator | 0:bb348c97df44 | 513 | /* Stop potential conversion on going, on regular and injected groups */ |
lypinator | 0:bb348c97df44 | 514 | /* Disable ADC peripheral */ |
lypinator | 0:bb348c97df44 | 515 | __HAL_ADC_DISABLE(hadc); |
lypinator | 0:bb348c97df44 | 516 | |
lypinator | 0:bb348c97df44 | 517 | /* Check if ADC is effectively disabled */ |
lypinator | 0:bb348c97df44 | 518 | if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON)) |
lypinator | 0:bb348c97df44 | 519 | { |
lypinator | 0:bb348c97df44 | 520 | /* Disable ADC end of conversion interrupt for injected channels */ |
lypinator | 0:bb348c97df44 | 521 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); |
lypinator | 0:bb348c97df44 | 522 | |
lypinator | 0:bb348c97df44 | 523 | /* Set ADC state */ |
lypinator | 0:bb348c97df44 | 524 | ADC_STATE_CLR_SET(hadc->State, |
lypinator | 0:bb348c97df44 | 525 | HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, |
lypinator | 0:bb348c97df44 | 526 | HAL_ADC_STATE_READY); |
lypinator | 0:bb348c97df44 | 527 | } |
lypinator | 0:bb348c97df44 | 528 | } |
lypinator | 0:bb348c97df44 | 529 | else |
lypinator | 0:bb348c97df44 | 530 | { |
lypinator | 0:bb348c97df44 | 531 | /* Update ADC state machine to error */ |
lypinator | 0:bb348c97df44 | 532 | SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); |
lypinator | 0:bb348c97df44 | 533 | |
lypinator | 0:bb348c97df44 | 534 | tmp_hal_status = HAL_ERROR; |
lypinator | 0:bb348c97df44 | 535 | } |
lypinator | 0:bb348c97df44 | 536 | |
lypinator | 0:bb348c97df44 | 537 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 538 | __HAL_UNLOCK(hadc); |
lypinator | 0:bb348c97df44 | 539 | |
lypinator | 0:bb348c97df44 | 540 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 541 | return tmp_hal_status; |
lypinator | 0:bb348c97df44 | 542 | } |
lypinator | 0:bb348c97df44 | 543 | |
lypinator | 0:bb348c97df44 | 544 | /** |
lypinator | 0:bb348c97df44 | 545 | * @brief Gets the converted value from data register of injected channel. |
lypinator | 0:bb348c97df44 | 546 | * @param hadc pointer to a ADC_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 547 | * the configuration information for the specified ADC. |
lypinator | 0:bb348c97df44 | 548 | * @param InjectedRank the ADC injected rank. |
lypinator | 0:bb348c97df44 | 549 | * This parameter can be one of the following values: |
lypinator | 0:bb348c97df44 | 550 | * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected |
lypinator | 0:bb348c97df44 | 551 | * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected |
lypinator | 0:bb348c97df44 | 552 | * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected |
lypinator | 0:bb348c97df44 | 553 | * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected |
lypinator | 0:bb348c97df44 | 554 | * @retval None |
lypinator | 0:bb348c97df44 | 555 | */ |
lypinator | 0:bb348c97df44 | 556 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank) |
lypinator | 0:bb348c97df44 | 557 | { |
lypinator | 0:bb348c97df44 | 558 | __IO uint32_t tmp = 0U; |
lypinator | 0:bb348c97df44 | 559 | |
lypinator | 0:bb348c97df44 | 560 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 561 | assert_param(IS_ADC_INJECTED_RANK(InjectedRank)); |
lypinator | 0:bb348c97df44 | 562 | |
lypinator | 0:bb348c97df44 | 563 | /* Clear injected group conversion flag to have similar behaviour as */ |
lypinator | 0:bb348c97df44 | 564 | /* regular group: reading data register also clears end of conversion flag. */ |
lypinator | 0:bb348c97df44 | 565 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC); |
lypinator | 0:bb348c97df44 | 566 | |
lypinator | 0:bb348c97df44 | 567 | /* Return the selected ADC converted value */ |
lypinator | 0:bb348c97df44 | 568 | switch(InjectedRank) |
lypinator | 0:bb348c97df44 | 569 | { |
lypinator | 0:bb348c97df44 | 570 | case ADC_INJECTED_RANK_4: |
lypinator | 0:bb348c97df44 | 571 | { |
lypinator | 0:bb348c97df44 | 572 | tmp = hadc->Instance->JDR4; |
lypinator | 0:bb348c97df44 | 573 | } |
lypinator | 0:bb348c97df44 | 574 | break; |
lypinator | 0:bb348c97df44 | 575 | case ADC_INJECTED_RANK_3: |
lypinator | 0:bb348c97df44 | 576 | { |
lypinator | 0:bb348c97df44 | 577 | tmp = hadc->Instance->JDR3; |
lypinator | 0:bb348c97df44 | 578 | } |
lypinator | 0:bb348c97df44 | 579 | break; |
lypinator | 0:bb348c97df44 | 580 | case ADC_INJECTED_RANK_2: |
lypinator | 0:bb348c97df44 | 581 | { |
lypinator | 0:bb348c97df44 | 582 | tmp = hadc->Instance->JDR2; |
lypinator | 0:bb348c97df44 | 583 | } |
lypinator | 0:bb348c97df44 | 584 | break; |
lypinator | 0:bb348c97df44 | 585 | case ADC_INJECTED_RANK_1: |
lypinator | 0:bb348c97df44 | 586 | { |
lypinator | 0:bb348c97df44 | 587 | tmp = hadc->Instance->JDR1; |
lypinator | 0:bb348c97df44 | 588 | } |
lypinator | 0:bb348c97df44 | 589 | break; |
lypinator | 0:bb348c97df44 | 590 | default: |
lypinator | 0:bb348c97df44 | 591 | break; |
lypinator | 0:bb348c97df44 | 592 | } |
lypinator | 0:bb348c97df44 | 593 | return tmp; |
lypinator | 0:bb348c97df44 | 594 | } |
lypinator | 0:bb348c97df44 | 595 | |
lypinator | 0:bb348c97df44 | 596 | /** |
lypinator | 0:bb348c97df44 | 597 | * @brief Enables ADC DMA request after last transfer (Multi-ADC mode) and enables ADC peripheral |
lypinator | 0:bb348c97df44 | 598 | * |
lypinator | 0:bb348c97df44 | 599 | * @note Caution: This function must be used only with the ADC master. |
lypinator | 0:bb348c97df44 | 600 | * |
lypinator | 0:bb348c97df44 | 601 | * @param hadc pointer to a ADC_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 602 | * the configuration information for the specified ADC. |
lypinator | 0:bb348c97df44 | 603 | * @param pData Pointer to buffer in which transferred from ADC peripheral to memory will be stored. |
lypinator | 0:bb348c97df44 | 604 | * @param Length The length of data to be transferred from ADC peripheral to memory. |
lypinator | 0:bb348c97df44 | 605 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 606 | */ |
lypinator | 0:bb348c97df44 | 607 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) |
lypinator | 0:bb348c97df44 | 608 | { |
lypinator | 0:bb348c97df44 | 609 | __IO uint32_t counter = 0U; |
lypinator | 0:bb348c97df44 | 610 | ADC_Common_TypeDef *tmpADC_Common; |
lypinator | 0:bb348c97df44 | 611 | |
lypinator | 0:bb348c97df44 | 612 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 613 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
lypinator | 0:bb348c97df44 | 614 | assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); |
lypinator | 0:bb348c97df44 | 615 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); |
lypinator | 0:bb348c97df44 | 616 | |
lypinator | 0:bb348c97df44 | 617 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 618 | __HAL_LOCK(hadc); |
lypinator | 0:bb348c97df44 | 619 | |
lypinator | 0:bb348c97df44 | 620 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
lypinator | 0:bb348c97df44 | 621 | Tstab time the ADC's stabilization */ |
lypinator | 0:bb348c97df44 | 622 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
lypinator | 0:bb348c97df44 | 623 | { |
lypinator | 0:bb348c97df44 | 624 | /* Enable the Peripheral */ |
lypinator | 0:bb348c97df44 | 625 | __HAL_ADC_ENABLE(hadc); |
lypinator | 0:bb348c97df44 | 626 | |
lypinator | 0:bb348c97df44 | 627 | /* Delay for temperature sensor stabilization time */ |
lypinator | 0:bb348c97df44 | 628 | /* Compute number of CPU cycles to wait for */ |
lypinator | 0:bb348c97df44 | 629 | counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); |
lypinator | 0:bb348c97df44 | 630 | while(counter != 0U) |
lypinator | 0:bb348c97df44 | 631 | { |
lypinator | 0:bb348c97df44 | 632 | counter--; |
lypinator | 0:bb348c97df44 | 633 | } |
lypinator | 0:bb348c97df44 | 634 | } |
lypinator | 0:bb348c97df44 | 635 | |
lypinator | 0:bb348c97df44 | 636 | /* Start conversion if ADC is effectively enabled */ |
lypinator | 0:bb348c97df44 | 637 | if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON)) |
lypinator | 0:bb348c97df44 | 638 | { |
lypinator | 0:bb348c97df44 | 639 | /* Set ADC state */ |
lypinator | 0:bb348c97df44 | 640 | /* - Clear state bitfield related to regular group conversion results */ |
lypinator | 0:bb348c97df44 | 641 | /* - Set state bitfield related to regular group operation */ |
lypinator | 0:bb348c97df44 | 642 | ADC_STATE_CLR_SET(hadc->State, |
lypinator | 0:bb348c97df44 | 643 | HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR, |
lypinator | 0:bb348c97df44 | 644 | HAL_ADC_STATE_REG_BUSY); |
lypinator | 0:bb348c97df44 | 645 | |
lypinator | 0:bb348c97df44 | 646 | /* If conversions on group regular are also triggering group injected, */ |
lypinator | 0:bb348c97df44 | 647 | /* update ADC state. */ |
lypinator | 0:bb348c97df44 | 648 | if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET) |
lypinator | 0:bb348c97df44 | 649 | { |
lypinator | 0:bb348c97df44 | 650 | ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); |
lypinator | 0:bb348c97df44 | 651 | } |
lypinator | 0:bb348c97df44 | 652 | |
lypinator | 0:bb348c97df44 | 653 | /* State machine update: Check if an injected conversion is ongoing */ |
lypinator | 0:bb348c97df44 | 654 | if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) |
lypinator | 0:bb348c97df44 | 655 | { |
lypinator | 0:bb348c97df44 | 656 | /* Reset ADC error code fields related to conversions on group regular */ |
lypinator | 0:bb348c97df44 | 657 | CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA)); |
lypinator | 0:bb348c97df44 | 658 | } |
lypinator | 0:bb348c97df44 | 659 | else |
lypinator | 0:bb348c97df44 | 660 | { |
lypinator | 0:bb348c97df44 | 661 | /* Reset ADC all error code fields */ |
lypinator | 0:bb348c97df44 | 662 | ADC_CLEAR_ERRORCODE(hadc); |
lypinator | 0:bb348c97df44 | 663 | } |
lypinator | 0:bb348c97df44 | 664 | |
lypinator | 0:bb348c97df44 | 665 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 666 | /* Unlock before starting ADC conversions: in case of potential */ |
lypinator | 0:bb348c97df44 | 667 | /* interruption, to let the process to ADC IRQ Handler. */ |
lypinator | 0:bb348c97df44 | 668 | __HAL_UNLOCK(hadc); |
lypinator | 0:bb348c97df44 | 669 | |
lypinator | 0:bb348c97df44 | 670 | /* Set the DMA transfer complete callback */ |
lypinator | 0:bb348c97df44 | 671 | hadc->DMA_Handle->XferCpltCallback = ADC_MultiModeDMAConvCplt; |
lypinator | 0:bb348c97df44 | 672 | |
lypinator | 0:bb348c97df44 | 673 | /* Set the DMA half transfer complete callback */ |
lypinator | 0:bb348c97df44 | 674 | hadc->DMA_Handle->XferHalfCpltCallback = ADC_MultiModeDMAHalfConvCplt; |
lypinator | 0:bb348c97df44 | 675 | |
lypinator | 0:bb348c97df44 | 676 | /* Set the DMA error callback */ |
lypinator | 0:bb348c97df44 | 677 | hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ; |
lypinator | 0:bb348c97df44 | 678 | |
lypinator | 0:bb348c97df44 | 679 | /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ |
lypinator | 0:bb348c97df44 | 680 | /* start (in case of SW start): */ |
lypinator | 0:bb348c97df44 | 681 | |
lypinator | 0:bb348c97df44 | 682 | /* Clear regular group conversion flag and overrun flag */ |
lypinator | 0:bb348c97df44 | 683 | /* (To ensure of no unknown state from potential previous ADC operations) */ |
lypinator | 0:bb348c97df44 | 684 | __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); |
lypinator | 0:bb348c97df44 | 685 | |
lypinator | 0:bb348c97df44 | 686 | /* Enable ADC overrun interrupt */ |
lypinator | 0:bb348c97df44 | 687 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
lypinator | 0:bb348c97df44 | 688 | |
lypinator | 0:bb348c97df44 | 689 | /* Pointer to the common control register to which is belonging hadc */ |
lypinator | 0:bb348c97df44 | 690 | /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */ |
lypinator | 0:bb348c97df44 | 691 | /* control register) */ |
lypinator | 0:bb348c97df44 | 692 | tmpADC_Common = ADC_COMMON_REGISTER(hadc); |
lypinator | 0:bb348c97df44 | 693 | |
lypinator | 0:bb348c97df44 | 694 | if (hadc->Init.DMAContinuousRequests != DISABLE) |
lypinator | 0:bb348c97df44 | 695 | { |
lypinator | 0:bb348c97df44 | 696 | /* Enable the selected ADC DMA request after last transfer */ |
lypinator | 0:bb348c97df44 | 697 | tmpADC_Common->CCR |= ADC_CCR_DDS; |
lypinator | 0:bb348c97df44 | 698 | } |
lypinator | 0:bb348c97df44 | 699 | else |
lypinator | 0:bb348c97df44 | 700 | { |
lypinator | 0:bb348c97df44 | 701 | /* Disable the selected ADC EOC rising on each regular channel conversion */ |
lypinator | 0:bb348c97df44 | 702 | tmpADC_Common->CCR &= ~ADC_CCR_DDS; |
lypinator | 0:bb348c97df44 | 703 | } |
lypinator | 0:bb348c97df44 | 704 | |
lypinator | 0:bb348c97df44 | 705 | /* Enable the DMA Stream */ |
lypinator | 0:bb348c97df44 | 706 | HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length); |
lypinator | 0:bb348c97df44 | 707 | |
lypinator | 0:bb348c97df44 | 708 | /* if no external trigger present enable software conversion of regular channels */ |
lypinator | 0:bb348c97df44 | 709 | if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET) |
lypinator | 0:bb348c97df44 | 710 | { |
lypinator | 0:bb348c97df44 | 711 | /* Enable the selected ADC software conversion for regular group */ |
lypinator | 0:bb348c97df44 | 712 | hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; |
lypinator | 0:bb348c97df44 | 713 | } |
lypinator | 0:bb348c97df44 | 714 | } |
lypinator | 0:bb348c97df44 | 715 | |
lypinator | 0:bb348c97df44 | 716 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 717 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 718 | } |
lypinator | 0:bb348c97df44 | 719 | |
lypinator | 0:bb348c97df44 | 720 | /** |
lypinator | 0:bb348c97df44 | 721 | * @brief Disables ADC DMA (multi-ADC mode) and disables ADC peripheral |
lypinator | 0:bb348c97df44 | 722 | * @param hadc pointer to a ADC_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 723 | * the configuration information for the specified ADC. |
lypinator | 0:bb348c97df44 | 724 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 725 | */ |
lypinator | 0:bb348c97df44 | 726 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc) |
lypinator | 0:bb348c97df44 | 727 | { |
lypinator | 0:bb348c97df44 | 728 | HAL_StatusTypeDef tmp_hal_status = HAL_OK; |
lypinator | 0:bb348c97df44 | 729 | ADC_Common_TypeDef *tmpADC_Common; |
lypinator | 0:bb348c97df44 | 730 | |
lypinator | 0:bb348c97df44 | 731 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 732 | assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); |
lypinator | 0:bb348c97df44 | 733 | |
lypinator | 0:bb348c97df44 | 734 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 735 | __HAL_LOCK(hadc); |
lypinator | 0:bb348c97df44 | 736 | |
lypinator | 0:bb348c97df44 | 737 | /* Stop potential conversion on going, on regular and injected groups */ |
lypinator | 0:bb348c97df44 | 738 | /* Disable ADC peripheral */ |
lypinator | 0:bb348c97df44 | 739 | __HAL_ADC_DISABLE(hadc); |
lypinator | 0:bb348c97df44 | 740 | |
lypinator | 0:bb348c97df44 | 741 | /* Pointer to the common control register to which is belonging hadc */ |
lypinator | 0:bb348c97df44 | 742 | /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */ |
lypinator | 0:bb348c97df44 | 743 | /* control register) */ |
lypinator | 0:bb348c97df44 | 744 | tmpADC_Common = ADC_COMMON_REGISTER(hadc); |
lypinator | 0:bb348c97df44 | 745 | |
lypinator | 0:bb348c97df44 | 746 | /* Check if ADC is effectively disabled */ |
lypinator | 0:bb348c97df44 | 747 | if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON)) |
lypinator | 0:bb348c97df44 | 748 | { |
lypinator | 0:bb348c97df44 | 749 | /* Disable the selected ADC DMA mode for multimode */ |
lypinator | 0:bb348c97df44 | 750 | tmpADC_Common->CCR &= ~ADC_CCR_DDS; |
lypinator | 0:bb348c97df44 | 751 | |
lypinator | 0:bb348c97df44 | 752 | /* Disable the DMA channel (in case of DMA in circular mode or stop while */ |
lypinator | 0:bb348c97df44 | 753 | /* DMA transfer is on going) */ |
lypinator | 0:bb348c97df44 | 754 | tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); |
lypinator | 0:bb348c97df44 | 755 | |
lypinator | 0:bb348c97df44 | 756 | /* Disable ADC overrun interrupt */ |
lypinator | 0:bb348c97df44 | 757 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); |
lypinator | 0:bb348c97df44 | 758 | |
lypinator | 0:bb348c97df44 | 759 | /* Set ADC state */ |
lypinator | 0:bb348c97df44 | 760 | ADC_STATE_CLR_SET(hadc->State, |
lypinator | 0:bb348c97df44 | 761 | HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY, |
lypinator | 0:bb348c97df44 | 762 | HAL_ADC_STATE_READY); |
lypinator | 0:bb348c97df44 | 763 | } |
lypinator | 0:bb348c97df44 | 764 | |
lypinator | 0:bb348c97df44 | 765 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 766 | __HAL_UNLOCK(hadc); |
lypinator | 0:bb348c97df44 | 767 | |
lypinator | 0:bb348c97df44 | 768 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 769 | return tmp_hal_status; |
lypinator | 0:bb348c97df44 | 770 | } |
lypinator | 0:bb348c97df44 | 771 | |
lypinator | 0:bb348c97df44 | 772 | /** |
lypinator | 0:bb348c97df44 | 773 | * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results |
lypinator | 0:bb348c97df44 | 774 | * data in the selected multi mode. |
lypinator | 0:bb348c97df44 | 775 | * @param hadc pointer to a ADC_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 776 | * the configuration information for the specified ADC. |
lypinator | 0:bb348c97df44 | 777 | * @retval The converted data value. |
lypinator | 0:bb348c97df44 | 778 | */ |
lypinator | 0:bb348c97df44 | 779 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc) |
lypinator | 0:bb348c97df44 | 780 | { |
lypinator | 0:bb348c97df44 | 781 | ADC_Common_TypeDef *tmpADC_Common; |
lypinator | 0:bb348c97df44 | 782 | |
lypinator | 0:bb348c97df44 | 783 | /* Pointer to the common control register to which is belonging hadc */ |
lypinator | 0:bb348c97df44 | 784 | /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */ |
lypinator | 0:bb348c97df44 | 785 | /* control register) */ |
lypinator | 0:bb348c97df44 | 786 | tmpADC_Common = ADC_COMMON_REGISTER(hadc); |
lypinator | 0:bb348c97df44 | 787 | |
lypinator | 0:bb348c97df44 | 788 | /* Return the multi mode conversion value */ |
lypinator | 0:bb348c97df44 | 789 | return tmpADC_Common->CDR; |
lypinator | 0:bb348c97df44 | 790 | } |
lypinator | 0:bb348c97df44 | 791 | |
lypinator | 0:bb348c97df44 | 792 | /** |
lypinator | 0:bb348c97df44 | 793 | * @brief Injected conversion complete callback in non blocking mode |
lypinator | 0:bb348c97df44 | 794 | * @param hadc pointer to a ADC_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 795 | * the configuration information for the specified ADC. |
lypinator | 0:bb348c97df44 | 796 | * @retval None |
lypinator | 0:bb348c97df44 | 797 | */ |
lypinator | 0:bb348c97df44 | 798 | __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc) |
lypinator | 0:bb348c97df44 | 799 | { |
lypinator | 0:bb348c97df44 | 800 | /* Prevent unused argument(s) compilation warning */ |
lypinator | 0:bb348c97df44 | 801 | UNUSED(hadc); |
lypinator | 0:bb348c97df44 | 802 | /* NOTE : This function Should not be modified, when the callback is needed, |
lypinator | 0:bb348c97df44 | 803 | the HAL_ADC_InjectedConvCpltCallback could be implemented in the user file |
lypinator | 0:bb348c97df44 | 804 | */ |
lypinator | 0:bb348c97df44 | 805 | } |
lypinator | 0:bb348c97df44 | 806 | |
lypinator | 0:bb348c97df44 | 807 | /** |
lypinator | 0:bb348c97df44 | 808 | * @brief Configures for the selected ADC injected channel its corresponding |
lypinator | 0:bb348c97df44 | 809 | * rank in the sequencer and its sample time. |
lypinator | 0:bb348c97df44 | 810 | * @param hadc pointer to a ADC_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 811 | * the configuration information for the specified ADC. |
lypinator | 0:bb348c97df44 | 812 | * @param sConfigInjected ADC configuration structure for injected channel. |
lypinator | 0:bb348c97df44 | 813 | * @retval None |
lypinator | 0:bb348c97df44 | 814 | */ |
lypinator | 0:bb348c97df44 | 815 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected) |
lypinator | 0:bb348c97df44 | 816 | { |
lypinator | 0:bb348c97df44 | 817 | |
lypinator | 0:bb348c97df44 | 818 | #ifdef USE_FULL_ASSERT |
lypinator | 0:bb348c97df44 | 819 | uint32_t tmp = 0U; |
lypinator | 0:bb348c97df44 | 820 | |
lypinator | 0:bb348c97df44 | 821 | #endif /* USE_FULL_ASSERT */ |
lypinator | 0:bb348c97df44 | 822 | |
lypinator | 0:bb348c97df44 | 823 | ADC_Common_TypeDef *tmpADC_Common; |
lypinator | 0:bb348c97df44 | 824 | |
lypinator | 0:bb348c97df44 | 825 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 826 | assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel)); |
lypinator | 0:bb348c97df44 | 827 | assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank)); |
lypinator | 0:bb348c97df44 | 828 | assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime)); |
lypinator | 0:bb348c97df44 | 829 | assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv)); |
lypinator | 0:bb348c97df44 | 830 | assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion)); |
lypinator | 0:bb348c97df44 | 831 | assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv)); |
lypinator | 0:bb348c97df44 | 832 | assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode)); |
lypinator | 0:bb348c97df44 | 833 | |
lypinator | 0:bb348c97df44 | 834 | #ifdef USE_FULL_ASSERT |
lypinator | 0:bb348c97df44 | 835 | tmp = ADC_GET_RESOLUTION(hadc); |
lypinator | 0:bb348c97df44 | 836 | assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset)); |
lypinator | 0:bb348c97df44 | 837 | #endif /* USE_FULL_ASSERT */ |
lypinator | 0:bb348c97df44 | 838 | |
lypinator | 0:bb348c97df44 | 839 | if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) |
lypinator | 0:bb348c97df44 | 840 | { |
lypinator | 0:bb348c97df44 | 841 | assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge)); |
lypinator | 0:bb348c97df44 | 842 | } |
lypinator | 0:bb348c97df44 | 843 | |
lypinator | 0:bb348c97df44 | 844 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 845 | __HAL_LOCK(hadc); |
lypinator | 0:bb348c97df44 | 846 | |
lypinator | 0:bb348c97df44 | 847 | /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ |
lypinator | 0:bb348c97df44 | 848 | if (sConfigInjected->InjectedChannel > ADC_CHANNEL_9) |
lypinator | 0:bb348c97df44 | 849 | { |
lypinator | 0:bb348c97df44 | 850 | /* Clear the old sample time */ |
lypinator | 0:bb348c97df44 | 851 | hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel); |
lypinator | 0:bb348c97df44 | 852 | |
lypinator | 0:bb348c97df44 | 853 | /* Set the new sample time */ |
lypinator | 0:bb348c97df44 | 854 | hadc->Instance->SMPR1 |= ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel); |
lypinator | 0:bb348c97df44 | 855 | } |
lypinator | 0:bb348c97df44 | 856 | else /* ADC_Channel include in ADC_Channel_[0..9] */ |
lypinator | 0:bb348c97df44 | 857 | { |
lypinator | 0:bb348c97df44 | 858 | /* Clear the old sample time */ |
lypinator | 0:bb348c97df44 | 859 | hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel); |
lypinator | 0:bb348c97df44 | 860 | |
lypinator | 0:bb348c97df44 | 861 | /* Set the new sample time */ |
lypinator | 0:bb348c97df44 | 862 | hadc->Instance->SMPR2 |= ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel); |
lypinator | 0:bb348c97df44 | 863 | } |
lypinator | 0:bb348c97df44 | 864 | |
lypinator | 0:bb348c97df44 | 865 | /*---------------------------- ADCx JSQR Configuration -----------------*/ |
lypinator | 0:bb348c97df44 | 866 | hadc->Instance->JSQR &= ~(ADC_JSQR_JL); |
lypinator | 0:bb348c97df44 | 867 | hadc->Instance->JSQR |= ADC_SQR1(sConfigInjected->InjectedNbrOfConversion); |
lypinator | 0:bb348c97df44 | 868 | |
lypinator | 0:bb348c97df44 | 869 | /* Rank configuration */ |
lypinator | 0:bb348c97df44 | 870 | |
lypinator | 0:bb348c97df44 | 871 | /* Clear the old SQx bits for the selected rank */ |
lypinator | 0:bb348c97df44 | 872 | hadc->Instance->JSQR &= ~ADC_JSQR(ADC_JSQR_JSQ1, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion); |
lypinator | 0:bb348c97df44 | 873 | |
lypinator | 0:bb348c97df44 | 874 | /* Set the SQx bits for the selected rank */ |
lypinator | 0:bb348c97df44 | 875 | hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion); |
lypinator | 0:bb348c97df44 | 876 | |
lypinator | 0:bb348c97df44 | 877 | /* Enable external trigger if trigger selection is different of software */ |
lypinator | 0:bb348c97df44 | 878 | /* start. */ |
lypinator | 0:bb348c97df44 | 879 | /* Note: This configuration keeps the hardware feature of parameter */ |
lypinator | 0:bb348c97df44 | 880 | /* ExternalTrigConvEdge "trigger edge none" equivalent to */ |
lypinator | 0:bb348c97df44 | 881 | /* software start. */ |
lypinator | 0:bb348c97df44 | 882 | if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) |
lypinator | 0:bb348c97df44 | 883 | { |
lypinator | 0:bb348c97df44 | 884 | /* Select external trigger to start conversion */ |
lypinator | 0:bb348c97df44 | 885 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL); |
lypinator | 0:bb348c97df44 | 886 | hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv; |
lypinator | 0:bb348c97df44 | 887 | |
lypinator | 0:bb348c97df44 | 888 | /* Select external trigger polarity */ |
lypinator | 0:bb348c97df44 | 889 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN); |
lypinator | 0:bb348c97df44 | 890 | hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge; |
lypinator | 0:bb348c97df44 | 891 | } |
lypinator | 0:bb348c97df44 | 892 | else |
lypinator | 0:bb348c97df44 | 893 | { |
lypinator | 0:bb348c97df44 | 894 | /* Reset the external trigger */ |
lypinator | 0:bb348c97df44 | 895 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL); |
lypinator | 0:bb348c97df44 | 896 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN); |
lypinator | 0:bb348c97df44 | 897 | } |
lypinator | 0:bb348c97df44 | 898 | |
lypinator | 0:bb348c97df44 | 899 | if (sConfigInjected->AutoInjectedConv != DISABLE) |
lypinator | 0:bb348c97df44 | 900 | { |
lypinator | 0:bb348c97df44 | 901 | /* Enable the selected ADC automatic injected group conversion */ |
lypinator | 0:bb348c97df44 | 902 | hadc->Instance->CR1 |= ADC_CR1_JAUTO; |
lypinator | 0:bb348c97df44 | 903 | } |
lypinator | 0:bb348c97df44 | 904 | else |
lypinator | 0:bb348c97df44 | 905 | { |
lypinator | 0:bb348c97df44 | 906 | /* Disable the selected ADC automatic injected group conversion */ |
lypinator | 0:bb348c97df44 | 907 | hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO); |
lypinator | 0:bb348c97df44 | 908 | } |
lypinator | 0:bb348c97df44 | 909 | |
lypinator | 0:bb348c97df44 | 910 | if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE) |
lypinator | 0:bb348c97df44 | 911 | { |
lypinator | 0:bb348c97df44 | 912 | /* Enable the selected ADC injected discontinuous mode */ |
lypinator | 0:bb348c97df44 | 913 | hadc->Instance->CR1 |= ADC_CR1_JDISCEN; |
lypinator | 0:bb348c97df44 | 914 | } |
lypinator | 0:bb348c97df44 | 915 | else |
lypinator | 0:bb348c97df44 | 916 | { |
lypinator | 0:bb348c97df44 | 917 | /* Disable the selected ADC injected discontinuous mode */ |
lypinator | 0:bb348c97df44 | 918 | hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN); |
lypinator | 0:bb348c97df44 | 919 | } |
lypinator | 0:bb348c97df44 | 920 | |
lypinator | 0:bb348c97df44 | 921 | switch(sConfigInjected->InjectedRank) |
lypinator | 0:bb348c97df44 | 922 | { |
lypinator | 0:bb348c97df44 | 923 | case 1U: |
lypinator | 0:bb348c97df44 | 924 | /* Set injected channel 1 offset */ |
lypinator | 0:bb348c97df44 | 925 | hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1); |
lypinator | 0:bb348c97df44 | 926 | hadc->Instance->JOFR1 |= sConfigInjected->InjectedOffset; |
lypinator | 0:bb348c97df44 | 927 | break; |
lypinator | 0:bb348c97df44 | 928 | case 2U: |
lypinator | 0:bb348c97df44 | 929 | /* Set injected channel 2 offset */ |
lypinator | 0:bb348c97df44 | 930 | hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2); |
lypinator | 0:bb348c97df44 | 931 | hadc->Instance->JOFR2 |= sConfigInjected->InjectedOffset; |
lypinator | 0:bb348c97df44 | 932 | break; |
lypinator | 0:bb348c97df44 | 933 | case 3U: |
lypinator | 0:bb348c97df44 | 934 | /* Set injected channel 3 offset */ |
lypinator | 0:bb348c97df44 | 935 | hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3); |
lypinator | 0:bb348c97df44 | 936 | hadc->Instance->JOFR3 |= sConfigInjected->InjectedOffset; |
lypinator | 0:bb348c97df44 | 937 | break; |
lypinator | 0:bb348c97df44 | 938 | default: |
lypinator | 0:bb348c97df44 | 939 | /* Set injected channel 4 offset */ |
lypinator | 0:bb348c97df44 | 940 | hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4); |
lypinator | 0:bb348c97df44 | 941 | hadc->Instance->JOFR4 |= sConfigInjected->InjectedOffset; |
lypinator | 0:bb348c97df44 | 942 | break; |
lypinator | 0:bb348c97df44 | 943 | } |
lypinator | 0:bb348c97df44 | 944 | |
lypinator | 0:bb348c97df44 | 945 | /* Pointer to the common control register to which is belonging hadc */ |
lypinator | 0:bb348c97df44 | 946 | /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */ |
lypinator | 0:bb348c97df44 | 947 | /* control register) */ |
lypinator | 0:bb348c97df44 | 948 | tmpADC_Common = ADC_COMMON_REGISTER(hadc); |
lypinator | 0:bb348c97df44 | 949 | |
lypinator | 0:bb348c97df44 | 950 | /* if ADC1 Channel_18 is selected enable VBAT Channel */ |
lypinator | 0:bb348c97df44 | 951 | if ((hadc->Instance == ADC1) && (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)) |
lypinator | 0:bb348c97df44 | 952 | { |
lypinator | 0:bb348c97df44 | 953 | /* Enable the VBAT channel*/ |
lypinator | 0:bb348c97df44 | 954 | tmpADC_Common->CCR |= ADC_CCR_VBATE; |
lypinator | 0:bb348c97df44 | 955 | } |
lypinator | 0:bb348c97df44 | 956 | |
lypinator | 0:bb348c97df44 | 957 | /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */ |
lypinator | 0:bb348c97df44 | 958 | if ((hadc->Instance == ADC1) && ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) || (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT))) |
lypinator | 0:bb348c97df44 | 959 | { |
lypinator | 0:bb348c97df44 | 960 | /* Enable the TSVREFE channel*/ |
lypinator | 0:bb348c97df44 | 961 | tmpADC_Common->CCR |= ADC_CCR_TSVREFE; |
lypinator | 0:bb348c97df44 | 962 | } |
lypinator | 0:bb348c97df44 | 963 | |
lypinator | 0:bb348c97df44 | 964 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 965 | __HAL_UNLOCK(hadc); |
lypinator | 0:bb348c97df44 | 966 | |
lypinator | 0:bb348c97df44 | 967 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 968 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 969 | } |
lypinator | 0:bb348c97df44 | 970 | |
lypinator | 0:bb348c97df44 | 971 | /** |
lypinator | 0:bb348c97df44 | 972 | * @brief Configures the ADC multi-mode |
lypinator | 0:bb348c97df44 | 973 | * @param hadc pointer to a ADC_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 974 | * the configuration information for the specified ADC. |
lypinator | 0:bb348c97df44 | 975 | * @param multimode pointer to an ADC_MultiModeTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 976 | * the configuration information for multimode. |
lypinator | 0:bb348c97df44 | 977 | * @retval HAL status |
lypinator | 0:bb348c97df44 | 978 | */ |
lypinator | 0:bb348c97df44 | 979 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode) |
lypinator | 0:bb348c97df44 | 980 | { |
lypinator | 0:bb348c97df44 | 981 | |
lypinator | 0:bb348c97df44 | 982 | ADC_Common_TypeDef *tmpADC_Common; |
lypinator | 0:bb348c97df44 | 983 | |
lypinator | 0:bb348c97df44 | 984 | /* Check the parameters */ |
lypinator | 0:bb348c97df44 | 985 | assert_param(IS_ADC_MODE(multimode->Mode)); |
lypinator | 0:bb348c97df44 | 986 | assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode)); |
lypinator | 0:bb348c97df44 | 987 | assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay)); |
lypinator | 0:bb348c97df44 | 988 | |
lypinator | 0:bb348c97df44 | 989 | /* Process locked */ |
lypinator | 0:bb348c97df44 | 990 | __HAL_LOCK(hadc); |
lypinator | 0:bb348c97df44 | 991 | |
lypinator | 0:bb348c97df44 | 992 | /* Pointer to the common control register to which is belonging hadc */ |
lypinator | 0:bb348c97df44 | 993 | /* (Depending on STM32F4 product, there may be up to 3 ADC and 1 common */ |
lypinator | 0:bb348c97df44 | 994 | /* control register) */ |
lypinator | 0:bb348c97df44 | 995 | tmpADC_Common = ADC_COMMON_REGISTER(hadc); |
lypinator | 0:bb348c97df44 | 996 | |
lypinator | 0:bb348c97df44 | 997 | /* Set ADC mode */ |
lypinator | 0:bb348c97df44 | 998 | tmpADC_Common->CCR &= ~(ADC_CCR_MULTI); |
lypinator | 0:bb348c97df44 | 999 | tmpADC_Common->CCR |= multimode->Mode; |
lypinator | 0:bb348c97df44 | 1000 | |
lypinator | 0:bb348c97df44 | 1001 | /* Set the ADC DMA access mode */ |
lypinator | 0:bb348c97df44 | 1002 | tmpADC_Common->CCR &= ~(ADC_CCR_DMA); |
lypinator | 0:bb348c97df44 | 1003 | tmpADC_Common->CCR |= multimode->DMAAccessMode; |
lypinator | 0:bb348c97df44 | 1004 | |
lypinator | 0:bb348c97df44 | 1005 | /* Set delay between two sampling phases */ |
lypinator | 0:bb348c97df44 | 1006 | tmpADC_Common->CCR &= ~(ADC_CCR_DELAY); |
lypinator | 0:bb348c97df44 | 1007 | tmpADC_Common->CCR |= multimode->TwoSamplingDelay; |
lypinator | 0:bb348c97df44 | 1008 | |
lypinator | 0:bb348c97df44 | 1009 | /* Process unlocked */ |
lypinator | 0:bb348c97df44 | 1010 | __HAL_UNLOCK(hadc); |
lypinator | 0:bb348c97df44 | 1011 | |
lypinator | 0:bb348c97df44 | 1012 | /* Return function status */ |
lypinator | 0:bb348c97df44 | 1013 | return HAL_OK; |
lypinator | 0:bb348c97df44 | 1014 | } |
lypinator | 0:bb348c97df44 | 1015 | |
lypinator | 0:bb348c97df44 | 1016 | /** |
lypinator | 0:bb348c97df44 | 1017 | * @} |
lypinator | 0:bb348c97df44 | 1018 | */ |
lypinator | 0:bb348c97df44 | 1019 | |
lypinator | 0:bb348c97df44 | 1020 | /** |
lypinator | 0:bb348c97df44 | 1021 | * @brief DMA transfer complete callback. |
lypinator | 0:bb348c97df44 | 1022 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1023 | * the configuration information for the specified DMA module. |
lypinator | 0:bb348c97df44 | 1024 | * @retval None |
lypinator | 0:bb348c97df44 | 1025 | */ |
lypinator | 0:bb348c97df44 | 1026 | static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 1027 | { |
lypinator | 0:bb348c97df44 | 1028 | /* Retrieve ADC handle corresponding to current DMA handle */ |
lypinator | 0:bb348c97df44 | 1029 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
lypinator | 0:bb348c97df44 | 1030 | |
lypinator | 0:bb348c97df44 | 1031 | /* Update state machine on conversion status if not in error state */ |
lypinator | 0:bb348c97df44 | 1032 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) |
lypinator | 0:bb348c97df44 | 1033 | { |
lypinator | 0:bb348c97df44 | 1034 | /* Update ADC state machine */ |
lypinator | 0:bb348c97df44 | 1035 | SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); |
lypinator | 0:bb348c97df44 | 1036 | |
lypinator | 0:bb348c97df44 | 1037 | /* Determine whether any further conversion upcoming on group regular */ |
lypinator | 0:bb348c97df44 | 1038 | /* by external trigger, continuous mode or scan sequence on going. */ |
lypinator | 0:bb348c97df44 | 1039 | /* Note: On STM32F4, there is no independent flag of end of sequence. */ |
lypinator | 0:bb348c97df44 | 1040 | /* The test of scan sequence on going is done either with scan */ |
lypinator | 0:bb348c97df44 | 1041 | /* sequence disabled or with end of conversion flag set to */ |
lypinator | 0:bb348c97df44 | 1042 | /* of end of sequence. */ |
lypinator | 0:bb348c97df44 | 1043 | if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && |
lypinator | 0:bb348c97df44 | 1044 | (hadc->Init.ContinuousConvMode == DISABLE) && |
lypinator | 0:bb348c97df44 | 1045 | (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) || |
lypinator | 0:bb348c97df44 | 1046 | HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) ) |
lypinator | 0:bb348c97df44 | 1047 | { |
lypinator | 0:bb348c97df44 | 1048 | /* Disable ADC end of single conversion interrupt on group regular */ |
lypinator | 0:bb348c97df44 | 1049 | /* Note: Overrun interrupt was enabled with EOC interrupt in */ |
lypinator | 0:bb348c97df44 | 1050 | /* HAL_ADC_Start_IT(), but is not disabled here because can be used */ |
lypinator | 0:bb348c97df44 | 1051 | /* by overrun IRQ process below. */ |
lypinator | 0:bb348c97df44 | 1052 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); |
lypinator | 0:bb348c97df44 | 1053 | |
lypinator | 0:bb348c97df44 | 1054 | /* Set ADC state */ |
lypinator | 0:bb348c97df44 | 1055 | CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); |
lypinator | 0:bb348c97df44 | 1056 | |
lypinator | 0:bb348c97df44 | 1057 | if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) |
lypinator | 0:bb348c97df44 | 1058 | { |
lypinator | 0:bb348c97df44 | 1059 | SET_BIT(hadc->State, HAL_ADC_STATE_READY); |
lypinator | 0:bb348c97df44 | 1060 | } |
lypinator | 0:bb348c97df44 | 1061 | } |
lypinator | 0:bb348c97df44 | 1062 | |
lypinator | 0:bb348c97df44 | 1063 | /* Conversion complete callback */ |
lypinator | 0:bb348c97df44 | 1064 | HAL_ADC_ConvCpltCallback(hadc); |
lypinator | 0:bb348c97df44 | 1065 | } |
lypinator | 0:bb348c97df44 | 1066 | else |
lypinator | 0:bb348c97df44 | 1067 | { |
lypinator | 0:bb348c97df44 | 1068 | /* Call DMA error callback */ |
lypinator | 0:bb348c97df44 | 1069 | hadc->DMA_Handle->XferErrorCallback(hdma); |
lypinator | 0:bb348c97df44 | 1070 | } |
lypinator | 0:bb348c97df44 | 1071 | } |
lypinator | 0:bb348c97df44 | 1072 | |
lypinator | 0:bb348c97df44 | 1073 | /** |
lypinator | 0:bb348c97df44 | 1074 | * @brief DMA half transfer complete callback. |
lypinator | 0:bb348c97df44 | 1075 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1076 | * the configuration information for the specified DMA module. |
lypinator | 0:bb348c97df44 | 1077 | * @retval None |
lypinator | 0:bb348c97df44 | 1078 | */ |
lypinator | 0:bb348c97df44 | 1079 | static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 1080 | { |
lypinator | 0:bb348c97df44 | 1081 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
lypinator | 0:bb348c97df44 | 1082 | /* Conversion complete callback */ |
lypinator | 0:bb348c97df44 | 1083 | HAL_ADC_ConvHalfCpltCallback(hadc); |
lypinator | 0:bb348c97df44 | 1084 | } |
lypinator | 0:bb348c97df44 | 1085 | |
lypinator | 0:bb348c97df44 | 1086 | /** |
lypinator | 0:bb348c97df44 | 1087 | * @brief DMA error callback |
lypinator | 0:bb348c97df44 | 1088 | * @param hdma pointer to a DMA_HandleTypeDef structure that contains |
lypinator | 0:bb348c97df44 | 1089 | * the configuration information for the specified DMA module. |
lypinator | 0:bb348c97df44 | 1090 | * @retval None |
lypinator | 0:bb348c97df44 | 1091 | */ |
lypinator | 0:bb348c97df44 | 1092 | static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma) |
lypinator | 0:bb348c97df44 | 1093 | { |
lypinator | 0:bb348c97df44 | 1094 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
lypinator | 0:bb348c97df44 | 1095 | hadc->State= HAL_ADC_STATE_ERROR_DMA; |
lypinator | 0:bb348c97df44 | 1096 | /* Set ADC error code to DMA error */ |
lypinator | 0:bb348c97df44 | 1097 | hadc->ErrorCode |= HAL_ADC_ERROR_DMA; |
lypinator | 0:bb348c97df44 | 1098 | HAL_ADC_ErrorCallback(hadc); |
lypinator | 0:bb348c97df44 | 1099 | } |
lypinator | 0:bb348c97df44 | 1100 | |
lypinator | 0:bb348c97df44 | 1101 | /** |
lypinator | 0:bb348c97df44 | 1102 | * @} |
lypinator | 0:bb348c97df44 | 1103 | */ |
lypinator | 0:bb348c97df44 | 1104 | |
lypinator | 0:bb348c97df44 | 1105 | #endif /* HAL_ADC_MODULE_ENABLED */ |
lypinator | 0:bb348c97df44 | 1106 | /** |
lypinator | 0:bb348c97df44 | 1107 | * @} |
lypinator | 0:bb348c97df44 | 1108 | */ |
lypinator | 0:bb348c97df44 | 1109 | |
lypinator | 0:bb348c97df44 | 1110 | /** |
lypinator | 0:bb348c97df44 | 1111 | * @} |
lypinator | 0:bb348c97df44 | 1112 | */ |
lypinator | 0:bb348c97df44 | 1113 | |
lypinator | 0:bb348c97df44 | 1114 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |