Initial commit
mbed-dev-master/cmsis/TARGET_CORTEX_A/cmsis_cp15.h@0:bb348c97df44, 2020-09-16 (annotated)
- Committer:
- lypinator
- Date:
- Wed Sep 16 01:11:49 2020 +0000
- Revision:
- 0:bb348c97df44
Added PWM
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
lypinator | 0:bb348c97df44 | 1 | /**************************************************************************//** |
lypinator | 0:bb348c97df44 | 2 | * @file cmsis_cp15.h |
lypinator | 0:bb348c97df44 | 3 | * @brief CMSIS compiler specific macros, functions, instructions |
lypinator | 0:bb348c97df44 | 4 | * @version V1.0.1 |
lypinator | 0:bb348c97df44 | 5 | * @date 07. Sep 2017 |
lypinator | 0:bb348c97df44 | 6 | ******************************************************************************/ |
lypinator | 0:bb348c97df44 | 7 | /* |
lypinator | 0:bb348c97df44 | 8 | * Copyright (c) 2009-2017 ARM Limited. All rights reserved. |
lypinator | 0:bb348c97df44 | 9 | * |
lypinator | 0:bb348c97df44 | 10 | * SPDX-License-Identifier: Apache-2.0 |
lypinator | 0:bb348c97df44 | 11 | * |
lypinator | 0:bb348c97df44 | 12 | * Licensed under the Apache License, Version 2.0 (the License); you may |
lypinator | 0:bb348c97df44 | 13 | * not use this file except in compliance with the License. |
lypinator | 0:bb348c97df44 | 14 | * You may obtain a copy of the License at |
lypinator | 0:bb348c97df44 | 15 | * |
lypinator | 0:bb348c97df44 | 16 | * www.apache.org/licenses/LICENSE-2.0 |
lypinator | 0:bb348c97df44 | 17 | * |
lypinator | 0:bb348c97df44 | 18 | * Unless required by applicable law or agreed to in writing, software |
lypinator | 0:bb348c97df44 | 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
lypinator | 0:bb348c97df44 | 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
lypinator | 0:bb348c97df44 | 21 | * See the License for the specific language governing permissions and |
lypinator | 0:bb348c97df44 | 22 | * limitations under the License. |
lypinator | 0:bb348c97df44 | 23 | */ |
lypinator | 0:bb348c97df44 | 24 | |
lypinator | 0:bb348c97df44 | 25 | #if defined ( __ICCARM__ ) |
lypinator | 0:bb348c97df44 | 26 | #pragma system_include /* treat file as system include file for MISRA check */ |
lypinator | 0:bb348c97df44 | 27 | #elif defined (__clang__) |
lypinator | 0:bb348c97df44 | 28 | #pragma clang system_header /* treat file as system include file */ |
lypinator | 0:bb348c97df44 | 29 | #endif |
lypinator | 0:bb348c97df44 | 30 | |
lypinator | 0:bb348c97df44 | 31 | #ifndef __CMSIS_CP15_H |
lypinator | 0:bb348c97df44 | 32 | #define __CMSIS_CP15_H |
lypinator | 0:bb348c97df44 | 33 | |
lypinator | 0:bb348c97df44 | 34 | /** \brief Get ACTLR |
lypinator | 0:bb348c97df44 | 35 | \return Auxiliary Control register value |
lypinator | 0:bb348c97df44 | 36 | */ |
lypinator | 0:bb348c97df44 | 37 | __STATIC_FORCEINLINE uint32_t __get_ACTLR(void) |
lypinator | 0:bb348c97df44 | 38 | { |
lypinator | 0:bb348c97df44 | 39 | uint32_t result; |
lypinator | 0:bb348c97df44 | 40 | __get_CP(15, 0, result, 1, 0, 1); |
lypinator | 0:bb348c97df44 | 41 | return(result); |
lypinator | 0:bb348c97df44 | 42 | } |
lypinator | 0:bb348c97df44 | 43 | |
lypinator | 0:bb348c97df44 | 44 | /** \brief Set ACTLR |
lypinator | 0:bb348c97df44 | 45 | \param [in] actlr Auxiliary Control value to set |
lypinator | 0:bb348c97df44 | 46 | */ |
lypinator | 0:bb348c97df44 | 47 | __STATIC_FORCEINLINE void __set_ACTLR(uint32_t actlr) |
lypinator | 0:bb348c97df44 | 48 | { |
lypinator | 0:bb348c97df44 | 49 | __set_CP(15, 0, actlr, 1, 0, 1); |
lypinator | 0:bb348c97df44 | 50 | } |
lypinator | 0:bb348c97df44 | 51 | |
lypinator | 0:bb348c97df44 | 52 | /** \brief Get CPACR |
lypinator | 0:bb348c97df44 | 53 | \return Coprocessor Access Control register value |
lypinator | 0:bb348c97df44 | 54 | */ |
lypinator | 0:bb348c97df44 | 55 | __STATIC_FORCEINLINE uint32_t __get_CPACR(void) |
lypinator | 0:bb348c97df44 | 56 | { |
lypinator | 0:bb348c97df44 | 57 | uint32_t result; |
lypinator | 0:bb348c97df44 | 58 | __get_CP(15, 0, result, 1, 0, 2); |
lypinator | 0:bb348c97df44 | 59 | return result; |
lypinator | 0:bb348c97df44 | 60 | } |
lypinator | 0:bb348c97df44 | 61 | |
lypinator | 0:bb348c97df44 | 62 | /** \brief Set CPACR |
lypinator | 0:bb348c97df44 | 63 | \param [in] cpacr Coprocessor Access Control value to set |
lypinator | 0:bb348c97df44 | 64 | */ |
lypinator | 0:bb348c97df44 | 65 | __STATIC_FORCEINLINE void __set_CPACR(uint32_t cpacr) |
lypinator | 0:bb348c97df44 | 66 | { |
lypinator | 0:bb348c97df44 | 67 | __set_CP(15, 0, cpacr, 1, 0, 2); |
lypinator | 0:bb348c97df44 | 68 | } |
lypinator | 0:bb348c97df44 | 69 | |
lypinator | 0:bb348c97df44 | 70 | /** \brief Get DFSR |
lypinator | 0:bb348c97df44 | 71 | \return Data Fault Status Register value |
lypinator | 0:bb348c97df44 | 72 | */ |
lypinator | 0:bb348c97df44 | 73 | __STATIC_FORCEINLINE uint32_t __get_DFSR(void) |
lypinator | 0:bb348c97df44 | 74 | { |
lypinator | 0:bb348c97df44 | 75 | uint32_t result; |
lypinator | 0:bb348c97df44 | 76 | __get_CP(15, 0, result, 5, 0, 0); |
lypinator | 0:bb348c97df44 | 77 | return result; |
lypinator | 0:bb348c97df44 | 78 | } |
lypinator | 0:bb348c97df44 | 79 | |
lypinator | 0:bb348c97df44 | 80 | /** \brief Set DFSR |
lypinator | 0:bb348c97df44 | 81 | \param [in] dfsr Data Fault Status value to set |
lypinator | 0:bb348c97df44 | 82 | */ |
lypinator | 0:bb348c97df44 | 83 | __STATIC_FORCEINLINE void __set_DFSR(uint32_t dfsr) |
lypinator | 0:bb348c97df44 | 84 | { |
lypinator | 0:bb348c97df44 | 85 | __set_CP(15, 0, dfsr, 5, 0, 0); |
lypinator | 0:bb348c97df44 | 86 | } |
lypinator | 0:bb348c97df44 | 87 | |
lypinator | 0:bb348c97df44 | 88 | /** \brief Get IFSR |
lypinator | 0:bb348c97df44 | 89 | \return Instruction Fault Status Register value |
lypinator | 0:bb348c97df44 | 90 | */ |
lypinator | 0:bb348c97df44 | 91 | __STATIC_FORCEINLINE uint32_t __get_IFSR(void) |
lypinator | 0:bb348c97df44 | 92 | { |
lypinator | 0:bb348c97df44 | 93 | uint32_t result; |
lypinator | 0:bb348c97df44 | 94 | __get_CP(15, 0, result, 5, 0, 1); |
lypinator | 0:bb348c97df44 | 95 | return result; |
lypinator | 0:bb348c97df44 | 96 | } |
lypinator | 0:bb348c97df44 | 97 | |
lypinator | 0:bb348c97df44 | 98 | /** \brief Set IFSR |
lypinator | 0:bb348c97df44 | 99 | \param [in] ifsr Instruction Fault Status value to set |
lypinator | 0:bb348c97df44 | 100 | */ |
lypinator | 0:bb348c97df44 | 101 | __STATIC_FORCEINLINE void __set_IFSR(uint32_t ifsr) |
lypinator | 0:bb348c97df44 | 102 | { |
lypinator | 0:bb348c97df44 | 103 | __set_CP(15, 0, ifsr, 5, 0, 1); |
lypinator | 0:bb348c97df44 | 104 | } |
lypinator | 0:bb348c97df44 | 105 | |
lypinator | 0:bb348c97df44 | 106 | /** \brief Get ISR |
lypinator | 0:bb348c97df44 | 107 | \return Interrupt Status Register value |
lypinator | 0:bb348c97df44 | 108 | */ |
lypinator | 0:bb348c97df44 | 109 | __STATIC_FORCEINLINE uint32_t __get_ISR(void) |
lypinator | 0:bb348c97df44 | 110 | { |
lypinator | 0:bb348c97df44 | 111 | uint32_t result; |
lypinator | 0:bb348c97df44 | 112 | __get_CP(15, 0, result, 12, 1, 0); |
lypinator | 0:bb348c97df44 | 113 | return result; |
lypinator | 0:bb348c97df44 | 114 | } |
lypinator | 0:bb348c97df44 | 115 | |
lypinator | 0:bb348c97df44 | 116 | /** \brief Get CBAR |
lypinator | 0:bb348c97df44 | 117 | \return Configuration Base Address register value |
lypinator | 0:bb348c97df44 | 118 | */ |
lypinator | 0:bb348c97df44 | 119 | __STATIC_FORCEINLINE uint32_t __get_CBAR(void) |
lypinator | 0:bb348c97df44 | 120 | { |
lypinator | 0:bb348c97df44 | 121 | uint32_t result; |
lypinator | 0:bb348c97df44 | 122 | __get_CP(15, 4, result, 15, 0, 0); |
lypinator | 0:bb348c97df44 | 123 | return result; |
lypinator | 0:bb348c97df44 | 124 | } |
lypinator | 0:bb348c97df44 | 125 | |
lypinator | 0:bb348c97df44 | 126 | /** \brief Get TTBR0 |
lypinator | 0:bb348c97df44 | 127 | |
lypinator | 0:bb348c97df44 | 128 | This function returns the value of the Translation Table Base Register 0. |
lypinator | 0:bb348c97df44 | 129 | |
lypinator | 0:bb348c97df44 | 130 | \return Translation Table Base Register 0 value |
lypinator | 0:bb348c97df44 | 131 | */ |
lypinator | 0:bb348c97df44 | 132 | __STATIC_FORCEINLINE uint32_t __get_TTBR0(void) |
lypinator | 0:bb348c97df44 | 133 | { |
lypinator | 0:bb348c97df44 | 134 | uint32_t result; |
lypinator | 0:bb348c97df44 | 135 | __get_CP(15, 0, result, 2, 0, 0); |
lypinator | 0:bb348c97df44 | 136 | return result; |
lypinator | 0:bb348c97df44 | 137 | } |
lypinator | 0:bb348c97df44 | 138 | |
lypinator | 0:bb348c97df44 | 139 | /** \brief Set TTBR0 |
lypinator | 0:bb348c97df44 | 140 | |
lypinator | 0:bb348c97df44 | 141 | This function assigns the given value to the Translation Table Base Register 0. |
lypinator | 0:bb348c97df44 | 142 | |
lypinator | 0:bb348c97df44 | 143 | \param [in] ttbr0 Translation Table Base Register 0 value to set |
lypinator | 0:bb348c97df44 | 144 | */ |
lypinator | 0:bb348c97df44 | 145 | __STATIC_FORCEINLINE void __set_TTBR0(uint32_t ttbr0) |
lypinator | 0:bb348c97df44 | 146 | { |
lypinator | 0:bb348c97df44 | 147 | __set_CP(15, 0, ttbr0, 2, 0, 0); |
lypinator | 0:bb348c97df44 | 148 | } |
lypinator | 0:bb348c97df44 | 149 | |
lypinator | 0:bb348c97df44 | 150 | /** \brief Get DACR |
lypinator | 0:bb348c97df44 | 151 | |
lypinator | 0:bb348c97df44 | 152 | This function returns the value of the Domain Access Control Register. |
lypinator | 0:bb348c97df44 | 153 | |
lypinator | 0:bb348c97df44 | 154 | \return Domain Access Control Register value |
lypinator | 0:bb348c97df44 | 155 | */ |
lypinator | 0:bb348c97df44 | 156 | __STATIC_FORCEINLINE uint32_t __get_DACR(void) |
lypinator | 0:bb348c97df44 | 157 | { |
lypinator | 0:bb348c97df44 | 158 | uint32_t result; |
lypinator | 0:bb348c97df44 | 159 | __get_CP(15, 0, result, 3, 0, 0); |
lypinator | 0:bb348c97df44 | 160 | return result; |
lypinator | 0:bb348c97df44 | 161 | } |
lypinator | 0:bb348c97df44 | 162 | |
lypinator | 0:bb348c97df44 | 163 | /** \brief Set DACR |
lypinator | 0:bb348c97df44 | 164 | |
lypinator | 0:bb348c97df44 | 165 | This function assigns the given value to the Domain Access Control Register. |
lypinator | 0:bb348c97df44 | 166 | |
lypinator | 0:bb348c97df44 | 167 | \param [in] dacr Domain Access Control Register value to set |
lypinator | 0:bb348c97df44 | 168 | */ |
lypinator | 0:bb348c97df44 | 169 | __STATIC_FORCEINLINE void __set_DACR(uint32_t dacr) |
lypinator | 0:bb348c97df44 | 170 | { |
lypinator | 0:bb348c97df44 | 171 | __set_CP(15, 0, dacr, 3, 0, 0); |
lypinator | 0:bb348c97df44 | 172 | } |
lypinator | 0:bb348c97df44 | 173 | |
lypinator | 0:bb348c97df44 | 174 | /** \brief Set SCTLR |
lypinator | 0:bb348c97df44 | 175 | |
lypinator | 0:bb348c97df44 | 176 | This function assigns the given value to the System Control Register. |
lypinator | 0:bb348c97df44 | 177 | |
lypinator | 0:bb348c97df44 | 178 | \param [in] sctlr System Control Register value to set |
lypinator | 0:bb348c97df44 | 179 | */ |
lypinator | 0:bb348c97df44 | 180 | __STATIC_FORCEINLINE void __set_SCTLR(uint32_t sctlr) |
lypinator | 0:bb348c97df44 | 181 | { |
lypinator | 0:bb348c97df44 | 182 | __set_CP(15, 0, sctlr, 1, 0, 0); |
lypinator | 0:bb348c97df44 | 183 | } |
lypinator | 0:bb348c97df44 | 184 | |
lypinator | 0:bb348c97df44 | 185 | /** \brief Get SCTLR |
lypinator | 0:bb348c97df44 | 186 | \return System Control Register value |
lypinator | 0:bb348c97df44 | 187 | */ |
lypinator | 0:bb348c97df44 | 188 | __STATIC_FORCEINLINE uint32_t __get_SCTLR(void) |
lypinator | 0:bb348c97df44 | 189 | { |
lypinator | 0:bb348c97df44 | 190 | uint32_t result; |
lypinator | 0:bb348c97df44 | 191 | __get_CP(15, 0, result, 1, 0, 0); |
lypinator | 0:bb348c97df44 | 192 | return result; |
lypinator | 0:bb348c97df44 | 193 | } |
lypinator | 0:bb348c97df44 | 194 | |
lypinator | 0:bb348c97df44 | 195 | /** \brief Set ACTRL |
lypinator | 0:bb348c97df44 | 196 | \param [in] actrl Auxiliary Control Register value to set |
lypinator | 0:bb348c97df44 | 197 | */ |
lypinator | 0:bb348c97df44 | 198 | __STATIC_FORCEINLINE void __set_ACTRL(uint32_t actrl) |
lypinator | 0:bb348c97df44 | 199 | { |
lypinator | 0:bb348c97df44 | 200 | __set_CP(15, 0, actrl, 1, 0, 1); |
lypinator | 0:bb348c97df44 | 201 | } |
lypinator | 0:bb348c97df44 | 202 | |
lypinator | 0:bb348c97df44 | 203 | /** \brief Get ACTRL |
lypinator | 0:bb348c97df44 | 204 | \return Auxiliary Control Register value |
lypinator | 0:bb348c97df44 | 205 | */ |
lypinator | 0:bb348c97df44 | 206 | __STATIC_FORCEINLINE uint32_t __get_ACTRL(void) |
lypinator | 0:bb348c97df44 | 207 | { |
lypinator | 0:bb348c97df44 | 208 | uint32_t result; |
lypinator | 0:bb348c97df44 | 209 | __get_CP(15, 0, result, 1, 0, 1); |
lypinator | 0:bb348c97df44 | 210 | return result; |
lypinator | 0:bb348c97df44 | 211 | } |
lypinator | 0:bb348c97df44 | 212 | |
lypinator | 0:bb348c97df44 | 213 | /** \brief Get MPIDR |
lypinator | 0:bb348c97df44 | 214 | |
lypinator | 0:bb348c97df44 | 215 | This function returns the value of the Multiprocessor Affinity Register. |
lypinator | 0:bb348c97df44 | 216 | |
lypinator | 0:bb348c97df44 | 217 | \return Multiprocessor Affinity Register value |
lypinator | 0:bb348c97df44 | 218 | */ |
lypinator | 0:bb348c97df44 | 219 | __STATIC_FORCEINLINE uint32_t __get_MPIDR(void) |
lypinator | 0:bb348c97df44 | 220 | { |
lypinator | 0:bb348c97df44 | 221 | uint32_t result; |
lypinator | 0:bb348c97df44 | 222 | __get_CP(15, 0, result, 0, 0, 5); |
lypinator | 0:bb348c97df44 | 223 | return result; |
lypinator | 0:bb348c97df44 | 224 | } |
lypinator | 0:bb348c97df44 | 225 | |
lypinator | 0:bb348c97df44 | 226 | /** \brief Get VBAR |
lypinator | 0:bb348c97df44 | 227 | |
lypinator | 0:bb348c97df44 | 228 | This function returns the value of the Vector Base Address Register. |
lypinator | 0:bb348c97df44 | 229 | |
lypinator | 0:bb348c97df44 | 230 | \return Vector Base Address Register |
lypinator | 0:bb348c97df44 | 231 | */ |
lypinator | 0:bb348c97df44 | 232 | __STATIC_FORCEINLINE uint32_t __get_VBAR(void) |
lypinator | 0:bb348c97df44 | 233 | { |
lypinator | 0:bb348c97df44 | 234 | uint32_t result; |
lypinator | 0:bb348c97df44 | 235 | __get_CP(15, 0, result, 12, 0, 0); |
lypinator | 0:bb348c97df44 | 236 | return result; |
lypinator | 0:bb348c97df44 | 237 | } |
lypinator | 0:bb348c97df44 | 238 | |
lypinator | 0:bb348c97df44 | 239 | /** \brief Set VBAR |
lypinator | 0:bb348c97df44 | 240 | |
lypinator | 0:bb348c97df44 | 241 | This function assigns the given value to the Vector Base Address Register. |
lypinator | 0:bb348c97df44 | 242 | |
lypinator | 0:bb348c97df44 | 243 | \param [in] vbar Vector Base Address Register value to set |
lypinator | 0:bb348c97df44 | 244 | */ |
lypinator | 0:bb348c97df44 | 245 | __STATIC_FORCEINLINE void __set_VBAR(uint32_t vbar) |
lypinator | 0:bb348c97df44 | 246 | { |
lypinator | 0:bb348c97df44 | 247 | __set_CP(15, 0, vbar, 12, 0, 0); |
lypinator | 0:bb348c97df44 | 248 | } |
lypinator | 0:bb348c97df44 | 249 | |
lypinator | 0:bb348c97df44 | 250 | /** \brief Get MVBAR |
lypinator | 0:bb348c97df44 | 251 | |
lypinator | 0:bb348c97df44 | 252 | This function returns the value of the Monitor Vector Base Address Register. |
lypinator | 0:bb348c97df44 | 253 | |
lypinator | 0:bb348c97df44 | 254 | \return Monitor Vector Base Address Register |
lypinator | 0:bb348c97df44 | 255 | */ |
lypinator | 0:bb348c97df44 | 256 | __STATIC_FORCEINLINE uint32_t __get_MVBAR(void) |
lypinator | 0:bb348c97df44 | 257 | { |
lypinator | 0:bb348c97df44 | 258 | uint32_t result; |
lypinator | 0:bb348c97df44 | 259 | __get_CP(15, 0, result, 12, 0, 1); |
lypinator | 0:bb348c97df44 | 260 | return result; |
lypinator | 0:bb348c97df44 | 261 | } |
lypinator | 0:bb348c97df44 | 262 | |
lypinator | 0:bb348c97df44 | 263 | /** \brief Set MVBAR |
lypinator | 0:bb348c97df44 | 264 | |
lypinator | 0:bb348c97df44 | 265 | This function assigns the given value to the Monitor Vector Base Address Register. |
lypinator | 0:bb348c97df44 | 266 | |
lypinator | 0:bb348c97df44 | 267 | \param [in] mvbar Monitor Vector Base Address Register value to set |
lypinator | 0:bb348c97df44 | 268 | */ |
lypinator | 0:bb348c97df44 | 269 | __STATIC_FORCEINLINE void __set_MVBAR(uint32_t mvbar) |
lypinator | 0:bb348c97df44 | 270 | { |
lypinator | 0:bb348c97df44 | 271 | __set_CP(15, 0, mvbar, 12, 0, 1); |
lypinator | 0:bb348c97df44 | 272 | } |
lypinator | 0:bb348c97df44 | 273 | |
lypinator | 0:bb348c97df44 | 274 | #if (defined(__CORTEX_A) && (__CORTEX_A == 7U) && \ |
lypinator | 0:bb348c97df44 | 275 | defined(__TIM_PRESENT) && (__TIM_PRESENT == 1U)) || \ |
lypinator | 0:bb348c97df44 | 276 | defined(DOXYGEN) |
lypinator | 0:bb348c97df44 | 277 | |
lypinator | 0:bb348c97df44 | 278 | /** \brief Set CNTFRQ |
lypinator | 0:bb348c97df44 | 279 | |
lypinator | 0:bb348c97df44 | 280 | This function assigns the given value to PL1 Physical Timer Counter Frequency Register (CNTFRQ). |
lypinator | 0:bb348c97df44 | 281 | |
lypinator | 0:bb348c97df44 | 282 | \param [in] value CNTFRQ Register value to set |
lypinator | 0:bb348c97df44 | 283 | */ |
lypinator | 0:bb348c97df44 | 284 | __STATIC_FORCEINLINE void __set_CNTFRQ(uint32_t value) |
lypinator | 0:bb348c97df44 | 285 | { |
lypinator | 0:bb348c97df44 | 286 | __set_CP(15, 0, value, 14, 0, 0); |
lypinator | 0:bb348c97df44 | 287 | } |
lypinator | 0:bb348c97df44 | 288 | |
lypinator | 0:bb348c97df44 | 289 | /** \brief Get CNTFRQ |
lypinator | 0:bb348c97df44 | 290 | |
lypinator | 0:bb348c97df44 | 291 | This function returns the value of the PL1 Physical Timer Counter Frequency Register (CNTFRQ). |
lypinator | 0:bb348c97df44 | 292 | |
lypinator | 0:bb348c97df44 | 293 | \return CNTFRQ Register value |
lypinator | 0:bb348c97df44 | 294 | */ |
lypinator | 0:bb348c97df44 | 295 | __STATIC_FORCEINLINE uint32_t __get_CNTFRQ(void) |
lypinator | 0:bb348c97df44 | 296 | { |
lypinator | 0:bb348c97df44 | 297 | uint32_t result; |
lypinator | 0:bb348c97df44 | 298 | __get_CP(15, 0, result, 14, 0 , 0); |
lypinator | 0:bb348c97df44 | 299 | return result; |
lypinator | 0:bb348c97df44 | 300 | } |
lypinator | 0:bb348c97df44 | 301 | |
lypinator | 0:bb348c97df44 | 302 | /** \brief Set CNTP_TVAL |
lypinator | 0:bb348c97df44 | 303 | |
lypinator | 0:bb348c97df44 | 304 | This function assigns the given value to PL1 Physical Timer Value Register (CNTP_TVAL). |
lypinator | 0:bb348c97df44 | 305 | |
lypinator | 0:bb348c97df44 | 306 | \param [in] value CNTP_TVAL Register value to set |
lypinator | 0:bb348c97df44 | 307 | */ |
lypinator | 0:bb348c97df44 | 308 | __STATIC_FORCEINLINE void __set_CNTP_TVAL(uint32_t value) |
lypinator | 0:bb348c97df44 | 309 | { |
lypinator | 0:bb348c97df44 | 310 | __set_CP(15, 0, value, 14, 2, 0); |
lypinator | 0:bb348c97df44 | 311 | } |
lypinator | 0:bb348c97df44 | 312 | |
lypinator | 0:bb348c97df44 | 313 | /** \brief Get CNTP_TVAL |
lypinator | 0:bb348c97df44 | 314 | |
lypinator | 0:bb348c97df44 | 315 | This function returns the value of the PL1 Physical Timer Value Register (CNTP_TVAL). |
lypinator | 0:bb348c97df44 | 316 | |
lypinator | 0:bb348c97df44 | 317 | \return CNTP_TVAL Register value |
lypinator | 0:bb348c97df44 | 318 | */ |
lypinator | 0:bb348c97df44 | 319 | __STATIC_FORCEINLINE uint32_t __get_CNTP_TVAL(void) |
lypinator | 0:bb348c97df44 | 320 | { |
lypinator | 0:bb348c97df44 | 321 | uint32_t result; |
lypinator | 0:bb348c97df44 | 322 | __get_CP(15, 0, result, 14, 2, 0); |
lypinator | 0:bb348c97df44 | 323 | return result; |
lypinator | 0:bb348c97df44 | 324 | } |
lypinator | 0:bb348c97df44 | 325 | |
lypinator | 0:bb348c97df44 | 326 | /** \brief Get CNTPCT |
lypinator | 0:bb348c97df44 | 327 | |
lypinator | 0:bb348c97df44 | 328 | This function returns the value of the 64 bits PL1 Physical Count Register (CNTPCT). |
lypinator | 0:bb348c97df44 | 329 | |
lypinator | 0:bb348c97df44 | 330 | \return CNTPCT Register value |
lypinator | 0:bb348c97df44 | 331 | */ |
lypinator | 0:bb348c97df44 | 332 | __STATIC_FORCEINLINE uint64_t __get_CNTPCT(void) |
lypinator | 0:bb348c97df44 | 333 | { |
lypinator | 0:bb348c97df44 | 334 | uint64_t result; |
lypinator | 0:bb348c97df44 | 335 | __get_CP64(15, 0, result, 14); |
lypinator | 0:bb348c97df44 | 336 | return result; |
lypinator | 0:bb348c97df44 | 337 | } |
lypinator | 0:bb348c97df44 | 338 | |
lypinator | 0:bb348c97df44 | 339 | /** \brief Set CNTP_CVAL |
lypinator | 0:bb348c97df44 | 340 | |
lypinator | 0:bb348c97df44 | 341 | This function assigns the given value to 64bits PL1 Physical Timer CompareValue Register (CNTP_CVAL). |
lypinator | 0:bb348c97df44 | 342 | |
lypinator | 0:bb348c97df44 | 343 | \param [in] value CNTP_CVAL Register value to set |
lypinator | 0:bb348c97df44 | 344 | */ |
lypinator | 0:bb348c97df44 | 345 | __STATIC_FORCEINLINE void __set_CNTP_CVAL(uint64_t value) |
lypinator | 0:bb348c97df44 | 346 | { |
lypinator | 0:bb348c97df44 | 347 | __set_CP64(15, 2, value, 14); |
lypinator | 0:bb348c97df44 | 348 | } |
lypinator | 0:bb348c97df44 | 349 | |
lypinator | 0:bb348c97df44 | 350 | /** \brief Get CNTP_CVAL |
lypinator | 0:bb348c97df44 | 351 | |
lypinator | 0:bb348c97df44 | 352 | This function returns the value of the 64 bits PL1 Physical Timer CompareValue Register (CNTP_CVAL). |
lypinator | 0:bb348c97df44 | 353 | |
lypinator | 0:bb348c97df44 | 354 | \return CNTP_CVAL Register value |
lypinator | 0:bb348c97df44 | 355 | */ |
lypinator | 0:bb348c97df44 | 356 | __STATIC_FORCEINLINE uint64_t __get_CNTP_CVAL(void) |
lypinator | 0:bb348c97df44 | 357 | { |
lypinator | 0:bb348c97df44 | 358 | uint64_t result; |
lypinator | 0:bb348c97df44 | 359 | __get_CP64(15, 2, result, 14); |
lypinator | 0:bb348c97df44 | 360 | return result; |
lypinator | 0:bb348c97df44 | 361 | } |
lypinator | 0:bb348c97df44 | 362 | |
lypinator | 0:bb348c97df44 | 363 | /** \brief Set CNTP_CTL |
lypinator | 0:bb348c97df44 | 364 | |
lypinator | 0:bb348c97df44 | 365 | This function assigns the given value to PL1 Physical Timer Control Register (CNTP_CTL). |
lypinator | 0:bb348c97df44 | 366 | |
lypinator | 0:bb348c97df44 | 367 | \param [in] value CNTP_CTL Register value to set |
lypinator | 0:bb348c97df44 | 368 | */ |
lypinator | 0:bb348c97df44 | 369 | __STATIC_FORCEINLINE void __set_CNTP_CTL(uint32_t value) |
lypinator | 0:bb348c97df44 | 370 | { |
lypinator | 0:bb348c97df44 | 371 | __set_CP(15, 0, value, 14, 2, 1); |
lypinator | 0:bb348c97df44 | 372 | } |
lypinator | 0:bb348c97df44 | 373 | |
lypinator | 0:bb348c97df44 | 374 | /** \brief Get CNTP_CTL register |
lypinator | 0:bb348c97df44 | 375 | \return CNTP_CTL Register value |
lypinator | 0:bb348c97df44 | 376 | */ |
lypinator | 0:bb348c97df44 | 377 | __STATIC_FORCEINLINE uint32_t __get_CNTP_CTL(void) |
lypinator | 0:bb348c97df44 | 378 | { |
lypinator | 0:bb348c97df44 | 379 | uint32_t result; |
lypinator | 0:bb348c97df44 | 380 | __get_CP(15, 0, result, 14, 2, 1); |
lypinator | 0:bb348c97df44 | 381 | return result; |
lypinator | 0:bb348c97df44 | 382 | } |
lypinator | 0:bb348c97df44 | 383 | |
lypinator | 0:bb348c97df44 | 384 | #endif |
lypinator | 0:bb348c97df44 | 385 | |
lypinator | 0:bb348c97df44 | 386 | /** \brief Set TLBIALL |
lypinator | 0:bb348c97df44 | 387 | |
lypinator | 0:bb348c97df44 | 388 | TLB Invalidate All |
lypinator | 0:bb348c97df44 | 389 | */ |
lypinator | 0:bb348c97df44 | 390 | __STATIC_FORCEINLINE void __set_TLBIALL(uint32_t value) |
lypinator | 0:bb348c97df44 | 391 | { |
lypinator | 0:bb348c97df44 | 392 | __set_CP(15, 0, value, 8, 7, 0); |
lypinator | 0:bb348c97df44 | 393 | } |
lypinator | 0:bb348c97df44 | 394 | |
lypinator | 0:bb348c97df44 | 395 | /** \brief Set BPIALL. |
lypinator | 0:bb348c97df44 | 396 | |
lypinator | 0:bb348c97df44 | 397 | Branch Predictor Invalidate All |
lypinator | 0:bb348c97df44 | 398 | */ |
lypinator | 0:bb348c97df44 | 399 | __STATIC_FORCEINLINE void __set_BPIALL(uint32_t value) |
lypinator | 0:bb348c97df44 | 400 | { |
lypinator | 0:bb348c97df44 | 401 | __set_CP(15, 0, value, 7, 5, 6); |
lypinator | 0:bb348c97df44 | 402 | } |
lypinator | 0:bb348c97df44 | 403 | |
lypinator | 0:bb348c97df44 | 404 | /** \brief Set ICIALLU |
lypinator | 0:bb348c97df44 | 405 | |
lypinator | 0:bb348c97df44 | 406 | Instruction Cache Invalidate All |
lypinator | 0:bb348c97df44 | 407 | */ |
lypinator | 0:bb348c97df44 | 408 | __STATIC_FORCEINLINE void __set_ICIALLU(uint32_t value) |
lypinator | 0:bb348c97df44 | 409 | { |
lypinator | 0:bb348c97df44 | 410 | __set_CP(15, 0, value, 7, 5, 0); |
lypinator | 0:bb348c97df44 | 411 | } |
lypinator | 0:bb348c97df44 | 412 | |
lypinator | 0:bb348c97df44 | 413 | /** \brief Set DCCMVAC |
lypinator | 0:bb348c97df44 | 414 | |
lypinator | 0:bb348c97df44 | 415 | Data cache clean |
lypinator | 0:bb348c97df44 | 416 | */ |
lypinator | 0:bb348c97df44 | 417 | __STATIC_FORCEINLINE void __set_DCCMVAC(uint32_t value) |
lypinator | 0:bb348c97df44 | 418 | { |
lypinator | 0:bb348c97df44 | 419 | __set_CP(15, 0, value, 7, 10, 1); |
lypinator | 0:bb348c97df44 | 420 | } |
lypinator | 0:bb348c97df44 | 421 | |
lypinator | 0:bb348c97df44 | 422 | /** \brief Set DCIMVAC |
lypinator | 0:bb348c97df44 | 423 | |
lypinator | 0:bb348c97df44 | 424 | Data cache invalidate |
lypinator | 0:bb348c97df44 | 425 | */ |
lypinator | 0:bb348c97df44 | 426 | __STATIC_FORCEINLINE void __set_DCIMVAC(uint32_t value) |
lypinator | 0:bb348c97df44 | 427 | { |
lypinator | 0:bb348c97df44 | 428 | __set_CP(15, 0, value, 7, 6, 1); |
lypinator | 0:bb348c97df44 | 429 | } |
lypinator | 0:bb348c97df44 | 430 | |
lypinator | 0:bb348c97df44 | 431 | /** \brief Set DCCIMVAC |
lypinator | 0:bb348c97df44 | 432 | |
lypinator | 0:bb348c97df44 | 433 | Data cache clean and invalidate |
lypinator | 0:bb348c97df44 | 434 | */ |
lypinator | 0:bb348c97df44 | 435 | __STATIC_FORCEINLINE void __set_DCCIMVAC(uint32_t value) |
lypinator | 0:bb348c97df44 | 436 | { |
lypinator | 0:bb348c97df44 | 437 | __set_CP(15, 0, value, 7, 14, 1); |
lypinator | 0:bb348c97df44 | 438 | } |
lypinator | 0:bb348c97df44 | 439 | |
lypinator | 0:bb348c97df44 | 440 | /** \brief Set CSSELR |
lypinator | 0:bb348c97df44 | 441 | */ |
lypinator | 0:bb348c97df44 | 442 | __STATIC_FORCEINLINE void __set_CSSELR(uint32_t value) |
lypinator | 0:bb348c97df44 | 443 | { |
lypinator | 0:bb348c97df44 | 444 | // __ASM volatile("MCR p15, 2, %0, c0, c0, 0" : : "r"(value) : "memory"); |
lypinator | 0:bb348c97df44 | 445 | __set_CP(15, 2, value, 0, 0, 0); |
lypinator | 0:bb348c97df44 | 446 | } |
lypinator | 0:bb348c97df44 | 447 | |
lypinator | 0:bb348c97df44 | 448 | /** \brief Get CSSELR |
lypinator | 0:bb348c97df44 | 449 | \return CSSELR Register value |
lypinator | 0:bb348c97df44 | 450 | */ |
lypinator | 0:bb348c97df44 | 451 | __STATIC_FORCEINLINE uint32_t __get_CSSELR(void) |
lypinator | 0:bb348c97df44 | 452 | { |
lypinator | 0:bb348c97df44 | 453 | uint32_t result; |
lypinator | 0:bb348c97df44 | 454 | // __ASM volatile("MRC p15, 2, %0, c0, c0, 0" : "=r"(result) : : "memory"); |
lypinator | 0:bb348c97df44 | 455 | __get_CP(15, 2, result, 0, 0, 0); |
lypinator | 0:bb348c97df44 | 456 | return result; |
lypinator | 0:bb348c97df44 | 457 | } |
lypinator | 0:bb348c97df44 | 458 | |
lypinator | 0:bb348c97df44 | 459 | /** \brief Set CCSIDR |
lypinator | 0:bb348c97df44 | 460 | \deprecated CCSIDR itself is read-only. Use __set_CSSELR to select cache level instead. |
lypinator | 0:bb348c97df44 | 461 | */ |
lypinator | 0:bb348c97df44 | 462 | CMSIS_DEPRECATED |
lypinator | 0:bb348c97df44 | 463 | __STATIC_FORCEINLINE void __set_CCSIDR(uint32_t value) |
lypinator | 0:bb348c97df44 | 464 | { |
lypinator | 0:bb348c97df44 | 465 | __set_CSSELR(value); |
lypinator | 0:bb348c97df44 | 466 | } |
lypinator | 0:bb348c97df44 | 467 | |
lypinator | 0:bb348c97df44 | 468 | /** \brief Get CCSIDR |
lypinator | 0:bb348c97df44 | 469 | \return CCSIDR Register value |
lypinator | 0:bb348c97df44 | 470 | */ |
lypinator | 0:bb348c97df44 | 471 | __STATIC_FORCEINLINE uint32_t __get_CCSIDR(void) |
lypinator | 0:bb348c97df44 | 472 | { |
lypinator | 0:bb348c97df44 | 473 | uint32_t result; |
lypinator | 0:bb348c97df44 | 474 | // __ASM volatile("MRC p15, 1, %0, c0, c0, 0" : "=r"(result) : : "memory"); |
lypinator | 0:bb348c97df44 | 475 | __get_CP(15, 1, result, 0, 0, 0); |
lypinator | 0:bb348c97df44 | 476 | return result; |
lypinator | 0:bb348c97df44 | 477 | } |
lypinator | 0:bb348c97df44 | 478 | |
lypinator | 0:bb348c97df44 | 479 | /** \brief Get CLIDR |
lypinator | 0:bb348c97df44 | 480 | \return CLIDR Register value |
lypinator | 0:bb348c97df44 | 481 | */ |
lypinator | 0:bb348c97df44 | 482 | __STATIC_FORCEINLINE uint32_t __get_CLIDR(void) |
lypinator | 0:bb348c97df44 | 483 | { |
lypinator | 0:bb348c97df44 | 484 | uint32_t result; |
lypinator | 0:bb348c97df44 | 485 | // __ASM volatile("MRC p15, 1, %0, c0, c0, 1" : "=r"(result) : : "memory"); |
lypinator | 0:bb348c97df44 | 486 | __get_CP(15, 1, result, 0, 0, 1); |
lypinator | 0:bb348c97df44 | 487 | return result; |
lypinator | 0:bb348c97df44 | 488 | } |
lypinator | 0:bb348c97df44 | 489 | |
lypinator | 0:bb348c97df44 | 490 | /** \brief Set DCISW |
lypinator | 0:bb348c97df44 | 491 | */ |
lypinator | 0:bb348c97df44 | 492 | __STATIC_FORCEINLINE void __set_DCISW(uint32_t value) |
lypinator | 0:bb348c97df44 | 493 | { |
lypinator | 0:bb348c97df44 | 494 | // __ASM volatile("MCR p15, 0, %0, c7, c6, 2" : : "r"(value) : "memory") |
lypinator | 0:bb348c97df44 | 495 | __set_CP(15, 0, value, 7, 6, 2); |
lypinator | 0:bb348c97df44 | 496 | } |
lypinator | 0:bb348c97df44 | 497 | |
lypinator | 0:bb348c97df44 | 498 | /** \brief Set DCCSW |
lypinator | 0:bb348c97df44 | 499 | */ |
lypinator | 0:bb348c97df44 | 500 | __STATIC_FORCEINLINE void __set_DCCSW(uint32_t value) |
lypinator | 0:bb348c97df44 | 501 | { |
lypinator | 0:bb348c97df44 | 502 | // __ASM volatile("MCR p15, 0, %0, c7, c10, 2" : : "r"(value) : "memory") |
lypinator | 0:bb348c97df44 | 503 | __set_CP(15, 0, value, 7, 10, 2); |
lypinator | 0:bb348c97df44 | 504 | } |
lypinator | 0:bb348c97df44 | 505 | |
lypinator | 0:bb348c97df44 | 506 | /** \brief Set DCCISW |
lypinator | 0:bb348c97df44 | 507 | */ |
lypinator | 0:bb348c97df44 | 508 | __STATIC_FORCEINLINE void __set_DCCISW(uint32_t value) |
lypinator | 0:bb348c97df44 | 509 | { |
lypinator | 0:bb348c97df44 | 510 | // __ASM volatile("MCR p15, 0, %0, c7, c14, 2" : : "r"(value) : "memory") |
lypinator | 0:bb348c97df44 | 511 | __set_CP(15, 0, value, 7, 14, 2); |
lypinator | 0:bb348c97df44 | 512 | } |
lypinator | 0:bb348c97df44 | 513 | |
lypinator | 0:bb348c97df44 | 514 | #endif |