Initial commit
mbed-dev-master/cmsis/TARGET_CORTEX_A/cmsis_armclang.h@0:bb348c97df44, 2020-09-16 (annotated)
- Committer:
- lypinator
- Date:
- Wed Sep 16 01:11:49 2020 +0000
- Revision:
- 0:bb348c97df44
Added PWM
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
lypinator | 0:bb348c97df44 | 1 | /**************************************************************************//** |
lypinator | 0:bb348c97df44 | 2 | * @file cmsis_armclang.h |
lypinator | 0:bb348c97df44 | 3 | * @brief CMSIS compiler specific macros, functions, instructions |
lypinator | 0:bb348c97df44 | 4 | * @version V1.0.2 |
lypinator | 0:bb348c97df44 | 5 | * @date 10. January 2018 |
lypinator | 0:bb348c97df44 | 6 | ******************************************************************************/ |
lypinator | 0:bb348c97df44 | 7 | /* |
lypinator | 0:bb348c97df44 | 8 | * Copyright (c) 2009-2018 Arm Limited. All rights reserved. |
lypinator | 0:bb348c97df44 | 9 | * |
lypinator | 0:bb348c97df44 | 10 | * SPDX-License-Identifier: Apache-2.0 |
lypinator | 0:bb348c97df44 | 11 | * |
lypinator | 0:bb348c97df44 | 12 | * Licensed under the Apache License, Version 2.0 (the License); you may |
lypinator | 0:bb348c97df44 | 13 | * not use this file except in compliance with the License. |
lypinator | 0:bb348c97df44 | 14 | * You may obtain a copy of the License at |
lypinator | 0:bb348c97df44 | 15 | * |
lypinator | 0:bb348c97df44 | 16 | * www.apache.org/licenses/LICENSE-2.0 |
lypinator | 0:bb348c97df44 | 17 | * |
lypinator | 0:bb348c97df44 | 18 | * Unless required by applicable law or agreed to in writing, software |
lypinator | 0:bb348c97df44 | 19 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
lypinator | 0:bb348c97df44 | 20 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
lypinator | 0:bb348c97df44 | 21 | * See the License for the specific language governing permissions and |
lypinator | 0:bb348c97df44 | 22 | * limitations under the License. |
lypinator | 0:bb348c97df44 | 23 | */ |
lypinator | 0:bb348c97df44 | 24 | |
lypinator | 0:bb348c97df44 | 25 | #ifndef __CMSIS_ARMCLANG_H |
lypinator | 0:bb348c97df44 | 26 | #define __CMSIS_ARMCLANG_H |
lypinator | 0:bb348c97df44 | 27 | |
lypinator | 0:bb348c97df44 | 28 | #pragma clang system_header /* treat file as system include file */ |
lypinator | 0:bb348c97df44 | 29 | |
lypinator | 0:bb348c97df44 | 30 | #ifndef __ARM_COMPAT_H |
lypinator | 0:bb348c97df44 | 31 | #include <arm_compat.h> /* Compatibility header for Arm Compiler 5 intrinsics */ |
lypinator | 0:bb348c97df44 | 32 | #endif |
lypinator | 0:bb348c97df44 | 33 | |
lypinator | 0:bb348c97df44 | 34 | /* CMSIS compiler specific defines */ |
lypinator | 0:bb348c97df44 | 35 | #ifndef __ASM |
lypinator | 0:bb348c97df44 | 36 | #define __ASM __asm |
lypinator | 0:bb348c97df44 | 37 | #endif |
lypinator | 0:bb348c97df44 | 38 | #ifndef __INLINE |
lypinator | 0:bb348c97df44 | 39 | #define __INLINE __inline |
lypinator | 0:bb348c97df44 | 40 | #endif |
lypinator | 0:bb348c97df44 | 41 | #ifndef __FORCEINLINE |
lypinator | 0:bb348c97df44 | 42 | #define __FORCEINLINE __attribute__((always_inline)) |
lypinator | 0:bb348c97df44 | 43 | #endif |
lypinator | 0:bb348c97df44 | 44 | #ifndef __STATIC_INLINE |
lypinator | 0:bb348c97df44 | 45 | #define __STATIC_INLINE static __inline |
lypinator | 0:bb348c97df44 | 46 | #endif |
lypinator | 0:bb348c97df44 | 47 | #ifndef __STATIC_FORCEINLINE |
lypinator | 0:bb348c97df44 | 48 | #define __STATIC_FORCEINLINE __attribute__((always_inline)) static __inline |
lypinator | 0:bb348c97df44 | 49 | #endif |
lypinator | 0:bb348c97df44 | 50 | #ifndef __NO_RETURN |
lypinator | 0:bb348c97df44 | 51 | #define __NO_RETURN __attribute__((__noreturn__)) |
lypinator | 0:bb348c97df44 | 52 | #endif |
lypinator | 0:bb348c97df44 | 53 | #ifndef CMSIS_DEPRECATED |
lypinator | 0:bb348c97df44 | 54 | #define CMSIS_DEPRECATED __attribute__((deprecated)) |
lypinator | 0:bb348c97df44 | 55 | #endif |
lypinator | 0:bb348c97df44 | 56 | #ifndef __USED |
lypinator | 0:bb348c97df44 | 57 | #define __USED __attribute__((used)) |
lypinator | 0:bb348c97df44 | 58 | #endif |
lypinator | 0:bb348c97df44 | 59 | #ifndef __WEAK |
lypinator | 0:bb348c97df44 | 60 | #define __WEAK __attribute__((weak)) |
lypinator | 0:bb348c97df44 | 61 | #endif |
lypinator | 0:bb348c97df44 | 62 | #ifndef __PACKED |
lypinator | 0:bb348c97df44 | 63 | #define __PACKED __attribute__((packed, aligned(1))) |
lypinator | 0:bb348c97df44 | 64 | #endif |
lypinator | 0:bb348c97df44 | 65 | #ifndef __PACKED_STRUCT |
lypinator | 0:bb348c97df44 | 66 | #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) |
lypinator | 0:bb348c97df44 | 67 | #endif |
lypinator | 0:bb348c97df44 | 68 | #ifndef __UNALIGNED_UINT16_WRITE |
lypinator | 0:bb348c97df44 | 69 | #pragma clang diagnostic push |
lypinator | 0:bb348c97df44 | 70 | #pragma clang diagnostic ignored "-Wpacked" |
lypinator | 0:bb348c97df44 | 71 | /*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */ |
lypinator | 0:bb348c97df44 | 72 | __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; |
lypinator | 0:bb348c97df44 | 73 | #pragma clang diagnostic pop |
lypinator | 0:bb348c97df44 | 74 | #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val)) |
lypinator | 0:bb348c97df44 | 75 | #endif |
lypinator | 0:bb348c97df44 | 76 | #ifndef __UNALIGNED_UINT16_READ |
lypinator | 0:bb348c97df44 | 77 | #pragma clang diagnostic push |
lypinator | 0:bb348c97df44 | 78 | #pragma clang diagnostic ignored "-Wpacked" |
lypinator | 0:bb348c97df44 | 79 | /*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */ |
lypinator | 0:bb348c97df44 | 80 | __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; |
lypinator | 0:bb348c97df44 | 81 | #pragma clang diagnostic pop |
lypinator | 0:bb348c97df44 | 82 | #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v) |
lypinator | 0:bb348c97df44 | 83 | #endif |
lypinator | 0:bb348c97df44 | 84 | #ifndef __UNALIGNED_UINT32_WRITE |
lypinator | 0:bb348c97df44 | 85 | #pragma clang diagnostic push |
lypinator | 0:bb348c97df44 | 86 | #pragma clang diagnostic ignored "-Wpacked" |
lypinator | 0:bb348c97df44 | 87 | /*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */ |
lypinator | 0:bb348c97df44 | 88 | __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; |
lypinator | 0:bb348c97df44 | 89 | #pragma clang diagnostic pop |
lypinator | 0:bb348c97df44 | 90 | #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val)) |
lypinator | 0:bb348c97df44 | 91 | #endif |
lypinator | 0:bb348c97df44 | 92 | #ifndef __UNALIGNED_UINT32_READ |
lypinator | 0:bb348c97df44 | 93 | #pragma clang diagnostic push |
lypinator | 0:bb348c97df44 | 94 | #pragma clang diagnostic ignored "-Wpacked" |
lypinator | 0:bb348c97df44 | 95 | __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; |
lypinator | 0:bb348c97df44 | 96 | #pragma clang diagnostic pop |
lypinator | 0:bb348c97df44 | 97 | #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v) |
lypinator | 0:bb348c97df44 | 98 | #endif |
lypinator | 0:bb348c97df44 | 99 | #ifndef __ALIGNED |
lypinator | 0:bb348c97df44 | 100 | #define __ALIGNED(x) __attribute__((aligned(x))) |
lypinator | 0:bb348c97df44 | 101 | #endif |
lypinator | 0:bb348c97df44 | 102 | #ifndef __PACKED |
lypinator | 0:bb348c97df44 | 103 | #define __PACKED __attribute__((packed)) |
lypinator | 0:bb348c97df44 | 104 | #endif |
lypinator | 0:bb348c97df44 | 105 | |
lypinator | 0:bb348c97df44 | 106 | /* ########################## Core Instruction Access ######################### */ |
lypinator | 0:bb348c97df44 | 107 | /** |
lypinator | 0:bb348c97df44 | 108 | \brief No Operation |
lypinator | 0:bb348c97df44 | 109 | */ |
lypinator | 0:bb348c97df44 | 110 | #define __NOP __builtin_arm_nop |
lypinator | 0:bb348c97df44 | 111 | |
lypinator | 0:bb348c97df44 | 112 | /** |
lypinator | 0:bb348c97df44 | 113 | \brief Wait For Interrupt |
lypinator | 0:bb348c97df44 | 114 | */ |
lypinator | 0:bb348c97df44 | 115 | #define __WFI __builtin_arm_wfi |
lypinator | 0:bb348c97df44 | 116 | |
lypinator | 0:bb348c97df44 | 117 | /** |
lypinator | 0:bb348c97df44 | 118 | \brief Wait For Event |
lypinator | 0:bb348c97df44 | 119 | */ |
lypinator | 0:bb348c97df44 | 120 | #define __WFE __builtin_arm_wfe |
lypinator | 0:bb348c97df44 | 121 | |
lypinator | 0:bb348c97df44 | 122 | /** |
lypinator | 0:bb348c97df44 | 123 | \brief Send Event |
lypinator | 0:bb348c97df44 | 124 | */ |
lypinator | 0:bb348c97df44 | 125 | #define __SEV __builtin_arm_sev |
lypinator | 0:bb348c97df44 | 126 | |
lypinator | 0:bb348c97df44 | 127 | /** |
lypinator | 0:bb348c97df44 | 128 | \brief Instruction Synchronization Barrier |
lypinator | 0:bb348c97df44 | 129 | */ |
lypinator | 0:bb348c97df44 | 130 | #define __ISB() do {\ |
lypinator | 0:bb348c97df44 | 131 | __schedule_barrier();\ |
lypinator | 0:bb348c97df44 | 132 | __builtin_arm_isb(0xF);\ |
lypinator | 0:bb348c97df44 | 133 | __schedule_barrier();\ |
lypinator | 0:bb348c97df44 | 134 | } while (0U) |
lypinator | 0:bb348c97df44 | 135 | |
lypinator | 0:bb348c97df44 | 136 | /** |
lypinator | 0:bb348c97df44 | 137 | \brief Data Synchronization Barrier |
lypinator | 0:bb348c97df44 | 138 | */ |
lypinator | 0:bb348c97df44 | 139 | #define __DSB() do {\ |
lypinator | 0:bb348c97df44 | 140 | __schedule_barrier();\ |
lypinator | 0:bb348c97df44 | 141 | __builtin_arm_dsb(0xF);\ |
lypinator | 0:bb348c97df44 | 142 | __schedule_barrier();\ |
lypinator | 0:bb348c97df44 | 143 | } while (0U) |
lypinator | 0:bb348c97df44 | 144 | |
lypinator | 0:bb348c97df44 | 145 | /** |
lypinator | 0:bb348c97df44 | 146 | \brief Data Memory Barrier |
lypinator | 0:bb348c97df44 | 147 | */ |
lypinator | 0:bb348c97df44 | 148 | #define __DMB() do {\ |
lypinator | 0:bb348c97df44 | 149 | __schedule_barrier();\ |
lypinator | 0:bb348c97df44 | 150 | __builtin_arm_dmb(0xF);\ |
lypinator | 0:bb348c97df44 | 151 | __schedule_barrier();\ |
lypinator | 0:bb348c97df44 | 152 | } while (0U) |
lypinator | 0:bb348c97df44 | 153 | |
lypinator | 0:bb348c97df44 | 154 | /** |
lypinator | 0:bb348c97df44 | 155 | \brief Reverse byte order (32 bit) |
lypinator | 0:bb348c97df44 | 156 | \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. |
lypinator | 0:bb348c97df44 | 157 | \param [in] value Value to reverse |
lypinator | 0:bb348c97df44 | 158 | \return Reversed value |
lypinator | 0:bb348c97df44 | 159 | */ |
lypinator | 0:bb348c97df44 | 160 | #define __REV(value) __builtin_bswap32(value) |
lypinator | 0:bb348c97df44 | 161 | |
lypinator | 0:bb348c97df44 | 162 | /** |
lypinator | 0:bb348c97df44 | 163 | \brief Reverse byte order (16 bit) |
lypinator | 0:bb348c97df44 | 164 | \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. |
lypinator | 0:bb348c97df44 | 165 | \param [in] value Value to reverse |
lypinator | 0:bb348c97df44 | 166 | \return Reversed value |
lypinator | 0:bb348c97df44 | 167 | */ |
lypinator | 0:bb348c97df44 | 168 | #define __REV16(value) __ROR(__REV(value), 16) |
lypinator | 0:bb348c97df44 | 169 | |
lypinator | 0:bb348c97df44 | 170 | |
lypinator | 0:bb348c97df44 | 171 | /** |
lypinator | 0:bb348c97df44 | 172 | \brief Reverse byte order (16 bit) |
lypinator | 0:bb348c97df44 | 173 | \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. |
lypinator | 0:bb348c97df44 | 174 | \param [in] value Value to reverse |
lypinator | 0:bb348c97df44 | 175 | \return Reversed value |
lypinator | 0:bb348c97df44 | 176 | */ |
lypinator | 0:bb348c97df44 | 177 | #define __REVSH(value) (int16_t)__builtin_bswap16(value) |
lypinator | 0:bb348c97df44 | 178 | |
lypinator | 0:bb348c97df44 | 179 | |
lypinator | 0:bb348c97df44 | 180 | /** |
lypinator | 0:bb348c97df44 | 181 | \brief Rotate Right in unsigned value (32 bit) |
lypinator | 0:bb348c97df44 | 182 | \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits. |
lypinator | 0:bb348c97df44 | 183 | \param [in] op1 Value to rotate |
lypinator | 0:bb348c97df44 | 184 | \param [in] op2 Number of Bits to rotate |
lypinator | 0:bb348c97df44 | 185 | \return Rotated value |
lypinator | 0:bb348c97df44 | 186 | */ |
lypinator | 0:bb348c97df44 | 187 | __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) |
lypinator | 0:bb348c97df44 | 188 | { |
lypinator | 0:bb348c97df44 | 189 | op2 %= 32U; |
lypinator | 0:bb348c97df44 | 190 | if (op2 == 0U) |
lypinator | 0:bb348c97df44 | 191 | { |
lypinator | 0:bb348c97df44 | 192 | return op1; |
lypinator | 0:bb348c97df44 | 193 | } |
lypinator | 0:bb348c97df44 | 194 | return (op1 >> op2) | (op1 << (32U - op2)); |
lypinator | 0:bb348c97df44 | 195 | } |
lypinator | 0:bb348c97df44 | 196 | |
lypinator | 0:bb348c97df44 | 197 | |
lypinator | 0:bb348c97df44 | 198 | /** |
lypinator | 0:bb348c97df44 | 199 | \brief Breakpoint |
lypinator | 0:bb348c97df44 | 200 | \param [in] value is ignored by the processor. |
lypinator | 0:bb348c97df44 | 201 | If required, a debugger can use it to store additional information about the breakpoint. |
lypinator | 0:bb348c97df44 | 202 | */ |
lypinator | 0:bb348c97df44 | 203 | #define __BKPT(value) __ASM volatile ("bkpt "#value) |
lypinator | 0:bb348c97df44 | 204 | |
lypinator | 0:bb348c97df44 | 205 | /** |
lypinator | 0:bb348c97df44 | 206 | \brief Reverse bit order of value |
lypinator | 0:bb348c97df44 | 207 | \param [in] value Value to reverse |
lypinator | 0:bb348c97df44 | 208 | \return Reversed value |
lypinator | 0:bb348c97df44 | 209 | */ |
lypinator | 0:bb348c97df44 | 210 | #define __RBIT __builtin_arm_rbit |
lypinator | 0:bb348c97df44 | 211 | |
lypinator | 0:bb348c97df44 | 212 | /** |
lypinator | 0:bb348c97df44 | 213 | \brief Count leading zeros |
lypinator | 0:bb348c97df44 | 214 | \param [in] value Value to count the leading zeros |
lypinator | 0:bb348c97df44 | 215 | \return number of leading zeros in value |
lypinator | 0:bb348c97df44 | 216 | */ |
lypinator | 0:bb348c97df44 | 217 | #define __CLZ (uint8_t)__builtin_clz |
lypinator | 0:bb348c97df44 | 218 | |
lypinator | 0:bb348c97df44 | 219 | /** |
lypinator | 0:bb348c97df44 | 220 | \brief LDR Exclusive (8 bit) |
lypinator | 0:bb348c97df44 | 221 | \details Executes a exclusive LDR instruction for 8 bit value. |
lypinator | 0:bb348c97df44 | 222 | \param [in] ptr Pointer to data |
lypinator | 0:bb348c97df44 | 223 | \return value of type uint8_t at (*ptr) |
lypinator | 0:bb348c97df44 | 224 | */ |
lypinator | 0:bb348c97df44 | 225 | #define __LDREXB (uint8_t)__builtin_arm_ldrex |
lypinator | 0:bb348c97df44 | 226 | |
lypinator | 0:bb348c97df44 | 227 | |
lypinator | 0:bb348c97df44 | 228 | /** |
lypinator | 0:bb348c97df44 | 229 | \brief LDR Exclusive (16 bit) |
lypinator | 0:bb348c97df44 | 230 | \details Executes a exclusive LDR instruction for 16 bit values. |
lypinator | 0:bb348c97df44 | 231 | \param [in] ptr Pointer to data |
lypinator | 0:bb348c97df44 | 232 | \return value of type uint16_t at (*ptr) |
lypinator | 0:bb348c97df44 | 233 | */ |
lypinator | 0:bb348c97df44 | 234 | #define __LDREXH (uint16_t)__builtin_arm_ldrex |
lypinator | 0:bb348c97df44 | 235 | |
lypinator | 0:bb348c97df44 | 236 | /** |
lypinator | 0:bb348c97df44 | 237 | \brief LDR Exclusive (32 bit) |
lypinator | 0:bb348c97df44 | 238 | \details Executes a exclusive LDR instruction for 32 bit values. |
lypinator | 0:bb348c97df44 | 239 | \param [in] ptr Pointer to data |
lypinator | 0:bb348c97df44 | 240 | \return value of type uint32_t at (*ptr) |
lypinator | 0:bb348c97df44 | 241 | */ |
lypinator | 0:bb348c97df44 | 242 | #define __LDREXW (uint32_t)__builtin_arm_ldrex |
lypinator | 0:bb348c97df44 | 243 | |
lypinator | 0:bb348c97df44 | 244 | /** |
lypinator | 0:bb348c97df44 | 245 | \brief STR Exclusive (8 bit) |
lypinator | 0:bb348c97df44 | 246 | \details Executes a exclusive STR instruction for 8 bit values. |
lypinator | 0:bb348c97df44 | 247 | \param [in] value Value to store |
lypinator | 0:bb348c97df44 | 248 | \param [in] ptr Pointer to location |
lypinator | 0:bb348c97df44 | 249 | \return 0 Function succeeded |
lypinator | 0:bb348c97df44 | 250 | \return 1 Function failed |
lypinator | 0:bb348c97df44 | 251 | */ |
lypinator | 0:bb348c97df44 | 252 | #define __STREXB (uint32_t)__builtin_arm_strex |
lypinator | 0:bb348c97df44 | 253 | |
lypinator | 0:bb348c97df44 | 254 | /** |
lypinator | 0:bb348c97df44 | 255 | \brief STR Exclusive (16 bit) |
lypinator | 0:bb348c97df44 | 256 | \details Executes a exclusive STR instruction for 16 bit values. |
lypinator | 0:bb348c97df44 | 257 | \param [in] value Value to store |
lypinator | 0:bb348c97df44 | 258 | \param [in] ptr Pointer to location |
lypinator | 0:bb348c97df44 | 259 | \return 0 Function succeeded |
lypinator | 0:bb348c97df44 | 260 | \return 1 Function failed |
lypinator | 0:bb348c97df44 | 261 | */ |
lypinator | 0:bb348c97df44 | 262 | #define __STREXH (uint32_t)__builtin_arm_strex |
lypinator | 0:bb348c97df44 | 263 | |
lypinator | 0:bb348c97df44 | 264 | /** |
lypinator | 0:bb348c97df44 | 265 | \brief STR Exclusive (32 bit) |
lypinator | 0:bb348c97df44 | 266 | \details Executes a exclusive STR instruction for 32 bit values. |
lypinator | 0:bb348c97df44 | 267 | \param [in] value Value to store |
lypinator | 0:bb348c97df44 | 268 | \param [in] ptr Pointer to location |
lypinator | 0:bb348c97df44 | 269 | \return 0 Function succeeded |
lypinator | 0:bb348c97df44 | 270 | \return 1 Function failed |
lypinator | 0:bb348c97df44 | 271 | */ |
lypinator | 0:bb348c97df44 | 272 | #define __STREXW (uint32_t)__builtin_arm_strex |
lypinator | 0:bb348c97df44 | 273 | |
lypinator | 0:bb348c97df44 | 274 | /** |
lypinator | 0:bb348c97df44 | 275 | \brief Remove the exclusive lock |
lypinator | 0:bb348c97df44 | 276 | \details Removes the exclusive lock which is created by LDREX. |
lypinator | 0:bb348c97df44 | 277 | */ |
lypinator | 0:bb348c97df44 | 278 | #define __CLREX __builtin_arm_clrex |
lypinator | 0:bb348c97df44 | 279 | |
lypinator | 0:bb348c97df44 | 280 | /** |
lypinator | 0:bb348c97df44 | 281 | \brief Signed Saturate |
lypinator | 0:bb348c97df44 | 282 | \details Saturates a signed value. |
lypinator | 0:bb348c97df44 | 283 | \param [in] value Value to be saturated |
lypinator | 0:bb348c97df44 | 284 | \param [in] sat Bit position to saturate to (1..32) |
lypinator | 0:bb348c97df44 | 285 | \return Saturated value |
lypinator | 0:bb348c97df44 | 286 | */ |
lypinator | 0:bb348c97df44 | 287 | #define __SSAT __builtin_arm_ssat |
lypinator | 0:bb348c97df44 | 288 | |
lypinator | 0:bb348c97df44 | 289 | /** |
lypinator | 0:bb348c97df44 | 290 | \brief Unsigned Saturate |
lypinator | 0:bb348c97df44 | 291 | \details Saturates an unsigned value. |
lypinator | 0:bb348c97df44 | 292 | \param [in] value Value to be saturated |
lypinator | 0:bb348c97df44 | 293 | \param [in] sat Bit position to saturate to (0..31) |
lypinator | 0:bb348c97df44 | 294 | \return Saturated value |
lypinator | 0:bb348c97df44 | 295 | */ |
lypinator | 0:bb348c97df44 | 296 | #define __USAT __builtin_arm_usat |
lypinator | 0:bb348c97df44 | 297 | |
lypinator | 0:bb348c97df44 | 298 | |
lypinator | 0:bb348c97df44 | 299 | /* ########################### Core Function Access ########################### */ |
lypinator | 0:bb348c97df44 | 300 | |
lypinator | 0:bb348c97df44 | 301 | /** |
lypinator | 0:bb348c97df44 | 302 | \brief Get FPSCR |
lypinator | 0:bb348c97df44 | 303 | \details Returns the current value of the Floating Point Status/Control register. |
lypinator | 0:bb348c97df44 | 304 | \return Floating Point Status/Control register value |
lypinator | 0:bb348c97df44 | 305 | */ |
lypinator | 0:bb348c97df44 | 306 | #define __get_FPSCR __builtin_arm_get_fpscr |
lypinator | 0:bb348c97df44 | 307 | |
lypinator | 0:bb348c97df44 | 308 | /** |
lypinator | 0:bb348c97df44 | 309 | \brief Set FPSCR |
lypinator | 0:bb348c97df44 | 310 | \details Assigns the given value to the Floating Point Status/Control register. |
lypinator | 0:bb348c97df44 | 311 | \param [in] fpscr Floating Point Status/Control value to set |
lypinator | 0:bb348c97df44 | 312 | */ |
lypinator | 0:bb348c97df44 | 313 | #define __set_FPSCR __builtin_arm_set_fpscr |
lypinator | 0:bb348c97df44 | 314 | |
lypinator | 0:bb348c97df44 | 315 | /** \brief Get CPSR Register |
lypinator | 0:bb348c97df44 | 316 | \return CPSR Register value |
lypinator | 0:bb348c97df44 | 317 | */ |
lypinator | 0:bb348c97df44 | 318 | __STATIC_FORCEINLINE uint32_t __get_CPSR(void) |
lypinator | 0:bb348c97df44 | 319 | { |
lypinator | 0:bb348c97df44 | 320 | uint32_t result; |
lypinator | 0:bb348c97df44 | 321 | __ASM volatile("MRS %0, cpsr" : "=r" (result) ); |
lypinator | 0:bb348c97df44 | 322 | return(result); |
lypinator | 0:bb348c97df44 | 323 | } |
lypinator | 0:bb348c97df44 | 324 | |
lypinator | 0:bb348c97df44 | 325 | /** \brief Set CPSR Register |
lypinator | 0:bb348c97df44 | 326 | \param [in] cpsr CPSR value to set |
lypinator | 0:bb348c97df44 | 327 | */ |
lypinator | 0:bb348c97df44 | 328 | __STATIC_FORCEINLINE void __set_CPSR(uint32_t cpsr) |
lypinator | 0:bb348c97df44 | 329 | { |
lypinator | 0:bb348c97df44 | 330 | __ASM volatile ("MSR cpsr, %0" : : "r" (cpsr) : "memory"); |
lypinator | 0:bb348c97df44 | 331 | } |
lypinator | 0:bb348c97df44 | 332 | |
lypinator | 0:bb348c97df44 | 333 | /** \brief Get Mode |
lypinator | 0:bb348c97df44 | 334 | \return Processor Mode |
lypinator | 0:bb348c97df44 | 335 | */ |
lypinator | 0:bb348c97df44 | 336 | __STATIC_FORCEINLINE uint32_t __get_mode(void) |
lypinator | 0:bb348c97df44 | 337 | { |
lypinator | 0:bb348c97df44 | 338 | return (__get_CPSR() & 0x1FU); |
lypinator | 0:bb348c97df44 | 339 | } |
lypinator | 0:bb348c97df44 | 340 | |
lypinator | 0:bb348c97df44 | 341 | /** \brief Set Mode |
lypinator | 0:bb348c97df44 | 342 | \param [in] mode Mode value to set |
lypinator | 0:bb348c97df44 | 343 | */ |
lypinator | 0:bb348c97df44 | 344 | __STATIC_FORCEINLINE void __set_mode(uint32_t mode) |
lypinator | 0:bb348c97df44 | 345 | { |
lypinator | 0:bb348c97df44 | 346 | __ASM volatile("MSR cpsr_c, %0" : : "r" (mode) : "memory"); |
lypinator | 0:bb348c97df44 | 347 | } |
lypinator | 0:bb348c97df44 | 348 | |
lypinator | 0:bb348c97df44 | 349 | /** \brief Get Stack Pointer |
lypinator | 0:bb348c97df44 | 350 | \return Stack Pointer value |
lypinator | 0:bb348c97df44 | 351 | */ |
lypinator | 0:bb348c97df44 | 352 | __STATIC_FORCEINLINE uint32_t __get_SP() |
lypinator | 0:bb348c97df44 | 353 | { |
lypinator | 0:bb348c97df44 | 354 | uint32_t result; |
lypinator | 0:bb348c97df44 | 355 | __ASM volatile("MOV %0, sp" : "=r" (result) : : "memory"); |
lypinator | 0:bb348c97df44 | 356 | return result; |
lypinator | 0:bb348c97df44 | 357 | } |
lypinator | 0:bb348c97df44 | 358 | |
lypinator | 0:bb348c97df44 | 359 | /** \brief Set Stack Pointer |
lypinator | 0:bb348c97df44 | 360 | \param [in] stack Stack Pointer value to set |
lypinator | 0:bb348c97df44 | 361 | */ |
lypinator | 0:bb348c97df44 | 362 | __STATIC_FORCEINLINE void __set_SP(uint32_t stack) |
lypinator | 0:bb348c97df44 | 363 | { |
lypinator | 0:bb348c97df44 | 364 | __ASM volatile("MOV sp, %0" : : "r" (stack) : "memory"); |
lypinator | 0:bb348c97df44 | 365 | } |
lypinator | 0:bb348c97df44 | 366 | |
lypinator | 0:bb348c97df44 | 367 | /** \brief Get USR/SYS Stack Pointer |
lypinator | 0:bb348c97df44 | 368 | \return USR/SYS Stack Pointer value |
lypinator | 0:bb348c97df44 | 369 | */ |
lypinator | 0:bb348c97df44 | 370 | __STATIC_FORCEINLINE uint32_t __get_SP_usr() |
lypinator | 0:bb348c97df44 | 371 | { |
lypinator | 0:bb348c97df44 | 372 | uint32_t cpsr; |
lypinator | 0:bb348c97df44 | 373 | uint32_t result; |
lypinator | 0:bb348c97df44 | 374 | __ASM volatile( |
lypinator | 0:bb348c97df44 | 375 | "MRS %0, cpsr \n" |
lypinator | 0:bb348c97df44 | 376 | "CPS #0x1F \n" // no effect in USR mode |
lypinator | 0:bb348c97df44 | 377 | "MOV %1, sp \n" |
lypinator | 0:bb348c97df44 | 378 | "MSR cpsr_c, %2 \n" // no effect in USR mode |
lypinator | 0:bb348c97df44 | 379 | "ISB" : "=r"(cpsr), "=r"(result) : "r"(cpsr) : "memory" |
lypinator | 0:bb348c97df44 | 380 | ); |
lypinator | 0:bb348c97df44 | 381 | return result; |
lypinator | 0:bb348c97df44 | 382 | } |
lypinator | 0:bb348c97df44 | 383 | |
lypinator | 0:bb348c97df44 | 384 | /** \brief Set USR/SYS Stack Pointer |
lypinator | 0:bb348c97df44 | 385 | \param [in] topOfProcStack USR/SYS Stack Pointer value to set |
lypinator | 0:bb348c97df44 | 386 | */ |
lypinator | 0:bb348c97df44 | 387 | __STATIC_FORCEINLINE void __set_SP_usr(uint32_t topOfProcStack) |
lypinator | 0:bb348c97df44 | 388 | { |
lypinator | 0:bb348c97df44 | 389 | uint32_t cpsr; |
lypinator | 0:bb348c97df44 | 390 | __ASM volatile( |
lypinator | 0:bb348c97df44 | 391 | "MRS %0, cpsr \n" |
lypinator | 0:bb348c97df44 | 392 | "CPS #0x1F \n" // no effect in USR mode |
lypinator | 0:bb348c97df44 | 393 | "MOV sp, %1 \n" |
lypinator | 0:bb348c97df44 | 394 | "MSR cpsr_c, %2 \n" // no effect in USR mode |
lypinator | 0:bb348c97df44 | 395 | "ISB" : "=r"(cpsr) : "r" (topOfProcStack), "r"(cpsr) : "memory" |
lypinator | 0:bb348c97df44 | 396 | ); |
lypinator | 0:bb348c97df44 | 397 | } |
lypinator | 0:bb348c97df44 | 398 | |
lypinator | 0:bb348c97df44 | 399 | /** \brief Get FPEXC |
lypinator | 0:bb348c97df44 | 400 | \return Floating Point Exception Control register value |
lypinator | 0:bb348c97df44 | 401 | */ |
lypinator | 0:bb348c97df44 | 402 | __STATIC_FORCEINLINE uint32_t __get_FPEXC(void) |
lypinator | 0:bb348c97df44 | 403 | { |
lypinator | 0:bb348c97df44 | 404 | #if (__FPU_PRESENT == 1) |
lypinator | 0:bb348c97df44 | 405 | uint32_t result; |
lypinator | 0:bb348c97df44 | 406 | __ASM volatile("VMRS %0, fpexc" : "=r" (result) : : "memory"); |
lypinator | 0:bb348c97df44 | 407 | return(result); |
lypinator | 0:bb348c97df44 | 408 | #else |
lypinator | 0:bb348c97df44 | 409 | return(0); |
lypinator | 0:bb348c97df44 | 410 | #endif |
lypinator | 0:bb348c97df44 | 411 | } |
lypinator | 0:bb348c97df44 | 412 | |
lypinator | 0:bb348c97df44 | 413 | /** \brief Set FPEXC |
lypinator | 0:bb348c97df44 | 414 | \param [in] fpexc Floating Point Exception Control value to set |
lypinator | 0:bb348c97df44 | 415 | */ |
lypinator | 0:bb348c97df44 | 416 | __STATIC_FORCEINLINE void __set_FPEXC(uint32_t fpexc) |
lypinator | 0:bb348c97df44 | 417 | { |
lypinator | 0:bb348c97df44 | 418 | #if (__FPU_PRESENT == 1) |
lypinator | 0:bb348c97df44 | 419 | __ASM volatile ("VMSR fpexc, %0" : : "r" (fpexc) : "memory"); |
lypinator | 0:bb348c97df44 | 420 | #endif |
lypinator | 0:bb348c97df44 | 421 | } |
lypinator | 0:bb348c97df44 | 422 | |
lypinator | 0:bb348c97df44 | 423 | /* |
lypinator | 0:bb348c97df44 | 424 | * Include common core functions to access Coprocessor 15 registers |
lypinator | 0:bb348c97df44 | 425 | */ |
lypinator | 0:bb348c97df44 | 426 | |
lypinator | 0:bb348c97df44 | 427 | #define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : "=r" (Rt) : : "memory" ) |
lypinator | 0:bb348c97df44 | 428 | #define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn ", c" # CRm ", " # op2 : : "r" (Rt) : "memory" ) |
lypinator | 0:bb348c97df44 | 429 | #define __get_CP64(cp, op1, Rt, CRm) __ASM volatile("MRRC p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : "=r" (Rt) : : "memory" ) |
lypinator | 0:bb348c97df44 | 430 | #define __set_CP64(cp, op1, Rt, CRm) __ASM volatile("MCRR p" # cp ", " # op1 ", %Q0, %R0, c" # CRm : : "r" (Rt) : "memory" ) |
lypinator | 0:bb348c97df44 | 431 | |
lypinator | 0:bb348c97df44 | 432 | #include "cmsis_cp15.h" |
lypinator | 0:bb348c97df44 | 433 | |
lypinator | 0:bb348c97df44 | 434 | /** \brief Enable Floating Point Unit |
lypinator | 0:bb348c97df44 | 435 | |
lypinator | 0:bb348c97df44 | 436 | Critical section, called from undef handler, so systick is disabled |
lypinator | 0:bb348c97df44 | 437 | */ |
lypinator | 0:bb348c97df44 | 438 | __STATIC_INLINE void __FPU_Enable(void) |
lypinator | 0:bb348c97df44 | 439 | { |
lypinator | 0:bb348c97df44 | 440 | __ASM volatile( |
lypinator | 0:bb348c97df44 | 441 | //Permit access to VFP/NEON, registers by modifying CPACR |
lypinator | 0:bb348c97df44 | 442 | " MRC p15,0,R1,c1,c0,2 \n" |
lypinator | 0:bb348c97df44 | 443 | " ORR R1,R1,#0x00F00000 \n" |
lypinator | 0:bb348c97df44 | 444 | " MCR p15,0,R1,c1,c0,2 \n" |
lypinator | 0:bb348c97df44 | 445 | |
lypinator | 0:bb348c97df44 | 446 | //Ensure that subsequent instructions occur in the context of VFP/NEON access permitted |
lypinator | 0:bb348c97df44 | 447 | " ISB \n" |
lypinator | 0:bb348c97df44 | 448 | |
lypinator | 0:bb348c97df44 | 449 | //Enable VFP/NEON |
lypinator | 0:bb348c97df44 | 450 | " VMRS R1,FPEXC \n" |
lypinator | 0:bb348c97df44 | 451 | " ORR R1,R1,#0x40000000 \n" |
lypinator | 0:bb348c97df44 | 452 | " VMSR FPEXC,R1 \n" |
lypinator | 0:bb348c97df44 | 453 | |
lypinator | 0:bb348c97df44 | 454 | //Initialise VFP/NEON registers to 0 |
lypinator | 0:bb348c97df44 | 455 | " MOV R2,#0 \n" |
lypinator | 0:bb348c97df44 | 456 | |
lypinator | 0:bb348c97df44 | 457 | //Initialise D16 registers to 0 |
lypinator | 0:bb348c97df44 | 458 | " VMOV D0, R2,R2 \n" |
lypinator | 0:bb348c97df44 | 459 | " VMOV D1, R2,R2 \n" |
lypinator | 0:bb348c97df44 | 460 | " VMOV D2, R2,R2 \n" |
lypinator | 0:bb348c97df44 | 461 | " VMOV D3, R2,R2 \n" |
lypinator | 0:bb348c97df44 | 462 | " VMOV D4, R2,R2 \n" |
lypinator | 0:bb348c97df44 | 463 | " VMOV D5, R2,R2 \n" |
lypinator | 0:bb348c97df44 | 464 | " VMOV D6, R2,R2 \n" |
lypinator | 0:bb348c97df44 | 465 | " VMOV D7, R2,R2 \n" |
lypinator | 0:bb348c97df44 | 466 | " VMOV D8, R2,R2 \n" |
lypinator | 0:bb348c97df44 | 467 | " VMOV D9, R2,R2 \n" |
lypinator | 0:bb348c97df44 | 468 | " VMOV D10,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 469 | " VMOV D11,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 470 | " VMOV D12,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 471 | " VMOV D13,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 472 | " VMOV D14,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 473 | " VMOV D15,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 474 | |
lypinator | 0:bb348c97df44 | 475 | #if __ARM_NEON == 1 |
lypinator | 0:bb348c97df44 | 476 | //Initialise D32 registers to 0 |
lypinator | 0:bb348c97df44 | 477 | " VMOV D16,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 478 | " VMOV D17,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 479 | " VMOV D18,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 480 | " VMOV D19,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 481 | " VMOV D20,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 482 | " VMOV D21,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 483 | " VMOV D22,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 484 | " VMOV D23,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 485 | " VMOV D24,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 486 | " VMOV D25,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 487 | " VMOV D26,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 488 | " VMOV D27,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 489 | " VMOV D28,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 490 | " VMOV D29,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 491 | " VMOV D30,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 492 | " VMOV D31,R2,R2 \n" |
lypinator | 0:bb348c97df44 | 493 | #endif |
lypinator | 0:bb348c97df44 | 494 | |
lypinator | 0:bb348c97df44 | 495 | //Initialise FPSCR to a known state |
lypinator | 0:bb348c97df44 | 496 | " VMRS R2,FPSCR \n" |
lypinator | 0:bb348c97df44 | 497 | " LDR R3,=0x00086060 \n" //Mask off all bits that do not have to be preserved. Non-preserved bits can/should be zero. |
lypinator | 0:bb348c97df44 | 498 | " AND R2,R2,R3 \n" |
lypinator | 0:bb348c97df44 | 499 | " VMSR FPSCR,R2 " |
lypinator | 0:bb348c97df44 | 500 | ); |
lypinator | 0:bb348c97df44 | 501 | } |
lypinator | 0:bb348c97df44 | 502 | |
lypinator | 0:bb348c97df44 | 503 | #endif /* __CMSIS_ARMCLANG_H */ |