Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/i2c_api.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /* mbed Microcontroller Library
lypinator 0:bb348c97df44 2 *******************************************************************************
lypinator 0:bb348c97df44 3 * Copyright (c) 2015, STMicroelectronics
lypinator 0:bb348c97df44 4 * All rights reserved.
lypinator 0:bb348c97df44 5 *
lypinator 0:bb348c97df44 6 * Redistribution and use in source and binary forms, with or without
lypinator 0:bb348c97df44 7 * modification, are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 10 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 12 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 13 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 15 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 16 * without specific prior written permission.
lypinator 0:bb348c97df44 17 *
lypinator 0:bb348c97df44 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 28 *******************************************************************************
lypinator 0:bb348c97df44 29 */
lypinator 0:bb348c97df44 30
lypinator 0:bb348c97df44 31
lypinator 0:bb348c97df44 32 #include "mbed_assert.h"
lypinator 0:bb348c97df44 33 #include "i2c_api.h"
lypinator 0:bb348c97df44 34 #include "platform/mbed_wait_api.h"
lypinator 0:bb348c97df44 35
lypinator 0:bb348c97df44 36 #if DEVICE_I2C
lypinator 0:bb348c97df44 37
lypinator 0:bb348c97df44 38 #include "cmsis.h"
lypinator 0:bb348c97df44 39 #include "pinmap.h"
lypinator 0:bb348c97df44 40 #include "PeripheralPins.h"
lypinator 0:bb348c97df44 41 #include "i2c_device.h" // family specific defines
lypinator 0:bb348c97df44 42
lypinator 0:bb348c97df44 43 #ifndef DEBUG_STDIO
lypinator 0:bb348c97df44 44 # define DEBUG_STDIO 0
lypinator 0:bb348c97df44 45 #endif
lypinator 0:bb348c97df44 46
lypinator 0:bb348c97df44 47 #if DEBUG_STDIO
lypinator 0:bb348c97df44 48 # include <stdio.h>
lypinator 0:bb348c97df44 49 # define DEBUG_PRINTF(...) do { printf(__VA_ARGS__); } while(0)
lypinator 0:bb348c97df44 50 #else
lypinator 0:bb348c97df44 51 # define DEBUG_PRINTF(...) {}
lypinator 0:bb348c97df44 52 #endif
lypinator 0:bb348c97df44 53
lypinator 0:bb348c97df44 54 #if DEVICE_I2C_ASYNCH
lypinator 0:bb348c97df44 55 #define I2C_S(obj) (struct i2c_s *) (&((obj)->i2c))
lypinator 0:bb348c97df44 56 #else
lypinator 0:bb348c97df44 57 #define I2C_S(obj) (struct i2c_s *) (obj)
lypinator 0:bb348c97df44 58 #endif
lypinator 0:bb348c97df44 59
lypinator 0:bb348c97df44 60 /* Family specific description for I2C */
lypinator 0:bb348c97df44 61 #define I2C_NUM (5)
lypinator 0:bb348c97df44 62 static I2C_HandleTypeDef *i2c_handles[I2C_NUM];
lypinator 0:bb348c97df44 63
lypinator 0:bb348c97df44 64 /* Timeout values are based on core clock and I2C clock.
lypinator 0:bb348c97df44 65 The BYTE_TIMEOUT is computed as twice the number of cycles it would
lypinator 0:bb348c97df44 66 take to send 10 bits over I2C. Most Flags should take less than that.
lypinator 0:bb348c97df44 67 This is for immediate FLAG or ACK check.
lypinator 0:bb348c97df44 68 */
lypinator 0:bb348c97df44 69 #define BYTE_TIMEOUT ((SystemCoreClock / obj_s->hz) * 2 * 10)
lypinator 0:bb348c97df44 70 /* Timeout values based on I2C clock.
lypinator 0:bb348c97df44 71 The BYTE_TIMEOUT_US is computed as 3x the time in us it would
lypinator 0:bb348c97df44 72 take to send 10 bits over I2C. Most Flags should take less than that.
lypinator 0:bb348c97df44 73 This is for complete transfers check.
lypinator 0:bb348c97df44 74 */
lypinator 0:bb348c97df44 75 #define BYTE_TIMEOUT_US ((SystemCoreClock / obj_s->hz) * 3 * 10)
lypinator 0:bb348c97df44 76 /* Timeout values for flags and events waiting loops. These timeouts are
lypinator 0:bb348c97df44 77 not based on accurate values, they just guarantee that the application will
lypinator 0:bb348c97df44 78 not remain stuck if the I2C communication is corrupted.
lypinator 0:bb348c97df44 79 */
lypinator 0:bb348c97df44 80 #define FLAG_TIMEOUT ((int)0x1000)
lypinator 0:bb348c97df44 81
lypinator 0:bb348c97df44 82 /* GENERIC INIT and HELPERS FUNCTIONS */
lypinator 0:bb348c97df44 83
lypinator 0:bb348c97df44 84 #if defined(I2C1_BASE)
lypinator 0:bb348c97df44 85 static void i2c1_irq(void)
lypinator 0:bb348c97df44 86 {
lypinator 0:bb348c97df44 87 I2C_HandleTypeDef *handle = i2c_handles[0];
lypinator 0:bb348c97df44 88 HAL_I2C_EV_IRQHandler(handle);
lypinator 0:bb348c97df44 89 HAL_I2C_ER_IRQHandler(handle);
lypinator 0:bb348c97df44 90 }
lypinator 0:bb348c97df44 91 #endif
lypinator 0:bb348c97df44 92 #if defined(I2C2_BASE)
lypinator 0:bb348c97df44 93 static void i2c2_irq(void)
lypinator 0:bb348c97df44 94 {
lypinator 0:bb348c97df44 95 I2C_HandleTypeDef *handle = i2c_handles[1];
lypinator 0:bb348c97df44 96 HAL_I2C_EV_IRQHandler(handle);
lypinator 0:bb348c97df44 97 HAL_I2C_ER_IRQHandler(handle);
lypinator 0:bb348c97df44 98 }
lypinator 0:bb348c97df44 99 #endif
lypinator 0:bb348c97df44 100 #if defined(I2C3_BASE)
lypinator 0:bb348c97df44 101 static void i2c3_irq(void)
lypinator 0:bb348c97df44 102 {
lypinator 0:bb348c97df44 103 I2C_HandleTypeDef *handle = i2c_handles[2];
lypinator 0:bb348c97df44 104 HAL_I2C_EV_IRQHandler(handle);
lypinator 0:bb348c97df44 105 HAL_I2C_ER_IRQHandler(handle);
lypinator 0:bb348c97df44 106 }
lypinator 0:bb348c97df44 107 #endif
lypinator 0:bb348c97df44 108 #if defined(I2C4_BASE)
lypinator 0:bb348c97df44 109 static void i2c4_irq(void)
lypinator 0:bb348c97df44 110 {
lypinator 0:bb348c97df44 111 I2C_HandleTypeDef *handle = i2c_handles[3];
lypinator 0:bb348c97df44 112 HAL_I2C_EV_IRQHandler(handle);
lypinator 0:bb348c97df44 113 HAL_I2C_ER_IRQHandler(handle);
lypinator 0:bb348c97df44 114 }
lypinator 0:bb348c97df44 115 #endif
lypinator 0:bb348c97df44 116 #if defined(FMPI2C1_BASE)
lypinator 0:bb348c97df44 117 static void i2c5_irq(void)
lypinator 0:bb348c97df44 118 {
lypinator 0:bb348c97df44 119 I2C_HandleTypeDef *handle = i2c_handles[4];
lypinator 0:bb348c97df44 120 HAL_I2C_EV_IRQHandler(handle);
lypinator 0:bb348c97df44 121 HAL_I2C_ER_IRQHandler(handle);
lypinator 0:bb348c97df44 122 }
lypinator 0:bb348c97df44 123 #endif
lypinator 0:bb348c97df44 124
lypinator 0:bb348c97df44 125 void i2c_ev_err_enable(i2c_t *obj, uint32_t handler)
lypinator 0:bb348c97df44 126 {
lypinator 0:bb348c97df44 127 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 128 IRQn_Type irq_event_n = obj_s->event_i2cIRQ;
lypinator 0:bb348c97df44 129 IRQn_Type irq_error_n = obj_s->error_i2cIRQ;
lypinator 0:bb348c97df44 130 /* default prio in master case is set to 2 */
lypinator 0:bb348c97df44 131 uint32_t prio = 2;
lypinator 0:bb348c97df44 132
lypinator 0:bb348c97df44 133 /* Set up ITs using IRQ and handler tables */
lypinator 0:bb348c97df44 134 NVIC_SetVector(irq_event_n, handler);
lypinator 0:bb348c97df44 135 NVIC_SetVector(irq_error_n, handler);
lypinator 0:bb348c97df44 136
lypinator 0:bb348c97df44 137 #if DEVICE_I2CSLAVE
lypinator 0:bb348c97df44 138 /* Set higher priority to slave device than master.
lypinator 0:bb348c97df44 139 * In case a device makes use of both master and slave, the
lypinator 0:bb348c97df44 140 * slave needs higher responsiveness.
lypinator 0:bb348c97df44 141 */
lypinator 0:bb348c97df44 142 if (obj_s->slave) {
lypinator 0:bb348c97df44 143 prio = 1;
lypinator 0:bb348c97df44 144 }
lypinator 0:bb348c97df44 145 #endif
lypinator 0:bb348c97df44 146
lypinator 0:bb348c97df44 147 NVIC_SetPriority(irq_event_n, prio);
lypinator 0:bb348c97df44 148 NVIC_SetPriority(irq_error_n, prio);
lypinator 0:bb348c97df44 149 NVIC_EnableIRQ(irq_event_n);
lypinator 0:bb348c97df44 150 NVIC_EnableIRQ(irq_error_n);
lypinator 0:bb348c97df44 151 }
lypinator 0:bb348c97df44 152
lypinator 0:bb348c97df44 153 void i2c_ev_err_disable(i2c_t *obj)
lypinator 0:bb348c97df44 154 {
lypinator 0:bb348c97df44 155 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 156 IRQn_Type irq_event_n = obj_s->event_i2cIRQ;
lypinator 0:bb348c97df44 157 IRQn_Type irq_error_n = obj_s->error_i2cIRQ;
lypinator 0:bb348c97df44 158
lypinator 0:bb348c97df44 159 HAL_NVIC_DisableIRQ(irq_event_n);
lypinator 0:bb348c97df44 160 HAL_NVIC_DisableIRQ(irq_error_n);
lypinator 0:bb348c97df44 161 }
lypinator 0:bb348c97df44 162
lypinator 0:bb348c97df44 163 uint32_t i2c_get_irq_handler(i2c_t *obj)
lypinator 0:bb348c97df44 164 {
lypinator 0:bb348c97df44 165 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 166 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 167 uint32_t handler = 0;
lypinator 0:bb348c97df44 168
lypinator 0:bb348c97df44 169 switch (obj_s->index) {
lypinator 0:bb348c97df44 170 #if defined(I2C1_BASE)
lypinator 0:bb348c97df44 171 case 0:
lypinator 0:bb348c97df44 172 handler = (uint32_t)&i2c1_irq;
lypinator 0:bb348c97df44 173 break;
lypinator 0:bb348c97df44 174 #endif
lypinator 0:bb348c97df44 175 #if defined(I2C2_BASE)
lypinator 0:bb348c97df44 176 case 1:
lypinator 0:bb348c97df44 177 handler = (uint32_t)&i2c2_irq;
lypinator 0:bb348c97df44 178 break;
lypinator 0:bb348c97df44 179 #endif
lypinator 0:bb348c97df44 180 #if defined(I2C3_BASE)
lypinator 0:bb348c97df44 181 case 2:
lypinator 0:bb348c97df44 182 handler = (uint32_t)&i2c3_irq;
lypinator 0:bb348c97df44 183 break;
lypinator 0:bb348c97df44 184 #endif
lypinator 0:bb348c97df44 185 #if defined(I2C4_BASE)
lypinator 0:bb348c97df44 186 case 3:
lypinator 0:bb348c97df44 187 handler = (uint32_t)&i2c4_irq;
lypinator 0:bb348c97df44 188 break;
lypinator 0:bb348c97df44 189 #endif
lypinator 0:bb348c97df44 190 #if defined(FMPI2C1_BASE)
lypinator 0:bb348c97df44 191 case 4:
lypinator 0:bb348c97df44 192 handler = (uint32_t)&i2c5_irq;
lypinator 0:bb348c97df44 193 break;
lypinator 0:bb348c97df44 194 #endif
lypinator 0:bb348c97df44 195 }
lypinator 0:bb348c97df44 196
lypinator 0:bb348c97df44 197 i2c_handles[obj_s->index] = handle;
lypinator 0:bb348c97df44 198 return handler;
lypinator 0:bb348c97df44 199 }
lypinator 0:bb348c97df44 200
lypinator 0:bb348c97df44 201 void i2c_hw_reset(i2c_t *obj)
lypinator 0:bb348c97df44 202 {
lypinator 0:bb348c97df44 203 int timeout;
lypinator 0:bb348c97df44 204 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 205 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 206
lypinator 0:bb348c97df44 207 handle->Instance = (I2C_TypeDef *)(obj_s->i2c);
lypinator 0:bb348c97df44 208
lypinator 0:bb348c97df44 209 // wait before reset
lypinator 0:bb348c97df44 210 timeout = BYTE_TIMEOUT;
lypinator 0:bb348c97df44 211 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0));
lypinator 0:bb348c97df44 212 #if defined I2C1_BASE
lypinator 0:bb348c97df44 213 if (obj_s->i2c == I2C_1) {
lypinator 0:bb348c97df44 214 __HAL_RCC_I2C1_FORCE_RESET();
lypinator 0:bb348c97df44 215 __HAL_RCC_I2C1_RELEASE_RESET();
lypinator 0:bb348c97df44 216 }
lypinator 0:bb348c97df44 217 #endif
lypinator 0:bb348c97df44 218 #if defined I2C2_BASE
lypinator 0:bb348c97df44 219 if (obj_s->i2c == I2C_2) {
lypinator 0:bb348c97df44 220 __HAL_RCC_I2C2_FORCE_RESET();
lypinator 0:bb348c97df44 221 __HAL_RCC_I2C2_RELEASE_RESET();
lypinator 0:bb348c97df44 222 }
lypinator 0:bb348c97df44 223 #endif
lypinator 0:bb348c97df44 224 #if defined I2C3_BASE
lypinator 0:bb348c97df44 225 if (obj_s->i2c == I2C_3) {
lypinator 0:bb348c97df44 226 __HAL_RCC_I2C3_FORCE_RESET();
lypinator 0:bb348c97df44 227 __HAL_RCC_I2C3_RELEASE_RESET();
lypinator 0:bb348c97df44 228 }
lypinator 0:bb348c97df44 229 #endif
lypinator 0:bb348c97df44 230 #if defined I2C4_BASE
lypinator 0:bb348c97df44 231 if (obj_s->i2c == I2C_4) {
lypinator 0:bb348c97df44 232 __HAL_RCC_I2C4_FORCE_RESET();
lypinator 0:bb348c97df44 233 __HAL_RCC_I2C4_RELEASE_RESET();
lypinator 0:bb348c97df44 234 }
lypinator 0:bb348c97df44 235 #endif
lypinator 0:bb348c97df44 236 #if defined FMPI2C1_BASE
lypinator 0:bb348c97df44 237 if (obj_s->i2c == FMPI2C_1) {
lypinator 0:bb348c97df44 238 __HAL_RCC_FMPI2C1_FORCE_RESET();
lypinator 0:bb348c97df44 239 __HAL_RCC_FMPI2C1_RELEASE_RESET();
lypinator 0:bb348c97df44 240 }
lypinator 0:bb348c97df44 241 #endif
lypinator 0:bb348c97df44 242 }
lypinator 0:bb348c97df44 243
lypinator 0:bb348c97df44 244 void i2c_sw_reset(i2c_t *obj)
lypinator 0:bb348c97df44 245 {
lypinator 0:bb348c97df44 246 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 247 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 248 /* SW reset procedure:
lypinator 0:bb348c97df44 249 * PE must be kept low during at least 3 APB clock cycles
lypinator 0:bb348c97df44 250 * in order to perform the software reset.
lypinator 0:bb348c97df44 251 * This is ensured by writing the following software sequence:
lypinator 0:bb348c97df44 252 * - Write PE=0
lypinator 0:bb348c97df44 253 * - Check PE=0
lypinator 0:bb348c97df44 254 * - Write PE=1.
lypinator 0:bb348c97df44 255 */
lypinator 0:bb348c97df44 256 handle->Instance->CR1 &= ~I2C_CR1_PE;
lypinator 0:bb348c97df44 257 while (handle->Instance->CR1 & I2C_CR1_PE);
lypinator 0:bb348c97df44 258 handle->Instance->CR1 |= I2C_CR1_PE;
lypinator 0:bb348c97df44 259 }
lypinator 0:bb348c97df44 260
lypinator 0:bb348c97df44 261 void i2c_init(i2c_t *obj, PinName sda, PinName scl)
lypinator 0:bb348c97df44 262 {
lypinator 0:bb348c97df44 263
lypinator 0:bb348c97df44 264 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 265
lypinator 0:bb348c97df44 266 // Determine the I2C to use
lypinator 0:bb348c97df44 267 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
lypinator 0:bb348c97df44 268 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
lypinator 0:bb348c97df44 269 obj_s->sda = sda;
lypinator 0:bb348c97df44 270 obj_s->scl = scl;
lypinator 0:bb348c97df44 271
lypinator 0:bb348c97df44 272 obj_s->i2c = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
lypinator 0:bb348c97df44 273 MBED_ASSERT(obj_s->i2c != (I2CName)NC);
lypinator 0:bb348c97df44 274
lypinator 0:bb348c97df44 275 #if defined I2C1_BASE
lypinator 0:bb348c97df44 276 // Enable I2C1 clock and pinout if not done
lypinator 0:bb348c97df44 277 if (obj_s->i2c == I2C_1) {
lypinator 0:bb348c97df44 278 obj_s->index = 0;
lypinator 0:bb348c97df44 279 __HAL_RCC_I2C1_CLK_ENABLE();
lypinator 0:bb348c97df44 280 // Configure I2C pins
lypinator 0:bb348c97df44 281 obj_s->event_i2cIRQ = I2C1_EV_IRQn;
lypinator 0:bb348c97df44 282 obj_s->error_i2cIRQ = I2C1_ER_IRQn;
lypinator 0:bb348c97df44 283 }
lypinator 0:bb348c97df44 284 #endif
lypinator 0:bb348c97df44 285 #if defined I2C2_BASE
lypinator 0:bb348c97df44 286 // Enable I2C2 clock and pinout if not done
lypinator 0:bb348c97df44 287 if (obj_s->i2c == I2C_2) {
lypinator 0:bb348c97df44 288 obj_s->index = 1;
lypinator 0:bb348c97df44 289 __HAL_RCC_I2C2_CLK_ENABLE();
lypinator 0:bb348c97df44 290 obj_s->event_i2cIRQ = I2C2_EV_IRQn;
lypinator 0:bb348c97df44 291 obj_s->error_i2cIRQ = I2C2_ER_IRQn;
lypinator 0:bb348c97df44 292 }
lypinator 0:bb348c97df44 293 #endif
lypinator 0:bb348c97df44 294 #if defined I2C3_BASE
lypinator 0:bb348c97df44 295 // Enable I2C3 clock and pinout if not done
lypinator 0:bb348c97df44 296 if (obj_s->i2c == I2C_3) {
lypinator 0:bb348c97df44 297 obj_s->index = 2;
lypinator 0:bb348c97df44 298 __HAL_RCC_I2C3_CLK_ENABLE();
lypinator 0:bb348c97df44 299 obj_s->event_i2cIRQ = I2C3_EV_IRQn;
lypinator 0:bb348c97df44 300 obj_s->error_i2cIRQ = I2C3_ER_IRQn;
lypinator 0:bb348c97df44 301 }
lypinator 0:bb348c97df44 302 #endif
lypinator 0:bb348c97df44 303 #if defined I2C4_BASE
lypinator 0:bb348c97df44 304 // Enable I2C3 clock and pinout if not done
lypinator 0:bb348c97df44 305 if (obj_s->i2c == I2C_4) {
lypinator 0:bb348c97df44 306 obj_s->index = 3;
lypinator 0:bb348c97df44 307 __HAL_RCC_I2C4_CLK_ENABLE();
lypinator 0:bb348c97df44 308 obj_s->event_i2cIRQ = I2C4_EV_IRQn;
lypinator 0:bb348c97df44 309 obj_s->error_i2cIRQ = I2C4_ER_IRQn;
lypinator 0:bb348c97df44 310 }
lypinator 0:bb348c97df44 311 #endif
lypinator 0:bb348c97df44 312 #if defined FMPI2C1_BASE
lypinator 0:bb348c97df44 313 // Enable I2C3 clock and pinout if not done
lypinator 0:bb348c97df44 314 if (obj_s->i2c == FMPI2C_1) {
lypinator 0:bb348c97df44 315 obj_s->index = 4;
lypinator 0:bb348c97df44 316 __HAL_RCC_FMPI2C1_CLK_ENABLE();
lypinator 0:bb348c97df44 317 obj_s->event_i2cIRQ = FMPI2C1_EV_IRQn;
lypinator 0:bb348c97df44 318 obj_s->error_i2cIRQ = FMPI2C1_ER_IRQn;
lypinator 0:bb348c97df44 319 }
lypinator 0:bb348c97df44 320 #endif
lypinator 0:bb348c97df44 321
lypinator 0:bb348c97df44 322 // Configure I2C pins
lypinator 0:bb348c97df44 323 pinmap_pinout(sda, PinMap_I2C_SDA);
lypinator 0:bb348c97df44 324 pinmap_pinout(scl, PinMap_I2C_SCL);
lypinator 0:bb348c97df44 325 pin_mode(sda, OpenDrainNoPull);
lypinator 0:bb348c97df44 326 pin_mode(scl, OpenDrainNoPull);
lypinator 0:bb348c97df44 327
lypinator 0:bb348c97df44 328 // I2C configuration
lypinator 0:bb348c97df44 329 // Default hz value used for timeout computation
lypinator 0:bb348c97df44 330 if (!obj_s->hz) {
lypinator 0:bb348c97df44 331 obj_s->hz = 100000; // 100 kHz per default
lypinator 0:bb348c97df44 332 }
lypinator 0:bb348c97df44 333
lypinator 0:bb348c97df44 334 // Reset to clear pending flags if any
lypinator 0:bb348c97df44 335 i2c_hw_reset(obj);
lypinator 0:bb348c97df44 336 i2c_frequency(obj, obj_s->hz);
lypinator 0:bb348c97df44 337
lypinator 0:bb348c97df44 338 #if DEVICE_I2CSLAVE
lypinator 0:bb348c97df44 339 // I2C master by default
lypinator 0:bb348c97df44 340 obj_s->slave = 0;
lypinator 0:bb348c97df44 341 obj_s->pending_slave_tx_master_rx = 0;
lypinator 0:bb348c97df44 342 obj_s->pending_slave_rx_maxter_tx = 0;
lypinator 0:bb348c97df44 343 #endif
lypinator 0:bb348c97df44 344
lypinator 0:bb348c97df44 345 // I2C Xfer operation init
lypinator 0:bb348c97df44 346 obj_s->event = 0;
lypinator 0:bb348c97df44 347 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
lypinator 0:bb348c97df44 348 #ifdef I2C_IP_VERSION_V2
lypinator 0:bb348c97df44 349 obj_s->pending_start = 0;
lypinator 0:bb348c97df44 350 #endif
lypinator 0:bb348c97df44 351 }
lypinator 0:bb348c97df44 352
lypinator 0:bb348c97df44 353 void i2c_frequency(i2c_t *obj, int hz)
lypinator 0:bb348c97df44 354 {
lypinator 0:bb348c97df44 355 int timeout;
lypinator 0:bb348c97df44 356 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 357 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 358
lypinator 0:bb348c97df44 359 // wait before init
lypinator 0:bb348c97df44 360 timeout = BYTE_TIMEOUT;
lypinator 0:bb348c97df44 361 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)) && (--timeout != 0));
lypinator 0:bb348c97df44 362
lypinator 0:bb348c97df44 363 #ifdef I2C_IP_VERSION_V1
lypinator 0:bb348c97df44 364 handle->Init.ClockSpeed = hz;
lypinator 0:bb348c97df44 365 handle->Init.DutyCycle = I2C_DUTYCYCLE_2;
lypinator 0:bb348c97df44 366 #endif
lypinator 0:bb348c97df44 367 #ifdef I2C_IP_VERSION_V2
lypinator 0:bb348c97df44 368 /* Only predefined timing for below frequencies are supported */
lypinator 0:bb348c97df44 369 MBED_ASSERT((hz == 100000) || (hz == 400000) || (hz == 1000000));
lypinator 0:bb348c97df44 370 handle->Init.Timing = get_i2c_timing(hz);
lypinator 0:bb348c97df44 371
lypinator 0:bb348c97df44 372 // Enable the Fast Mode Plus capability
lypinator 0:bb348c97df44 373 if (hz == 1000000) {
lypinator 0:bb348c97df44 374 #if defined(I2C1_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C1)
lypinator 0:bb348c97df44 375 if (obj_s->i2c == I2C_1) {
lypinator 0:bb348c97df44 376 HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C1);
lypinator 0:bb348c97df44 377 }
lypinator 0:bb348c97df44 378 #endif
lypinator 0:bb348c97df44 379 #if defined(I2C2_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C2)
lypinator 0:bb348c97df44 380 if (obj_s->i2c == I2C_2) {
lypinator 0:bb348c97df44 381 HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C2);
lypinator 0:bb348c97df44 382 }
lypinator 0:bb348c97df44 383 #endif
lypinator 0:bb348c97df44 384 #if defined(I2C3_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C3)
lypinator 0:bb348c97df44 385 if (obj_s->i2c == I2C_3) {
lypinator 0:bb348c97df44 386 HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C3);
lypinator 0:bb348c97df44 387 }
lypinator 0:bb348c97df44 388 #endif
lypinator 0:bb348c97df44 389 #if defined(I2C4_BASE) && defined(__HAL_SYSCFG_FASTMODEPLUS_ENABLE) && defined (I2C_FASTMODEPLUS_I2C4)
lypinator 0:bb348c97df44 390 if (obj_s->i2c == I2C_4) {
lypinator 0:bb348c97df44 391 HAL_I2CEx_EnableFastModePlus(I2C_FASTMODEPLUS_I2C4);
lypinator 0:bb348c97df44 392 }
lypinator 0:bb348c97df44 393 #endif
lypinator 0:bb348c97df44 394 }
lypinator 0:bb348c97df44 395 #endif //I2C_IP_VERSION_V2
lypinator 0:bb348c97df44 396
lypinator 0:bb348c97df44 397 /*##-1- Configure the I2C clock source. The clock is derived from the SYSCLK #*/
lypinator 0:bb348c97df44 398 #if defined(I2C1_BASE) && defined (__HAL_RCC_I2C1_CONFIG)
lypinator 0:bb348c97df44 399 if (obj_s->i2c == I2C_1) {
lypinator 0:bb348c97df44 400 __HAL_RCC_I2C1_CONFIG(I2CAPI_I2C1_CLKSRC);
lypinator 0:bb348c97df44 401 }
lypinator 0:bb348c97df44 402 #endif
lypinator 0:bb348c97df44 403 #if defined(I2C2_BASE) && defined(__HAL_RCC_I2C2_CONFIG)
lypinator 0:bb348c97df44 404 if (obj_s->i2c == I2C_2) {
lypinator 0:bb348c97df44 405 __HAL_RCC_I2C2_CONFIG(I2CAPI_I2C2_CLKSRC);
lypinator 0:bb348c97df44 406 }
lypinator 0:bb348c97df44 407 #endif
lypinator 0:bb348c97df44 408 #if defined(I2C3_BASE) && defined(__HAL_RCC_I2C3_CONFIG)
lypinator 0:bb348c97df44 409 if (obj_s->i2c == I2C_3) {
lypinator 0:bb348c97df44 410 __HAL_RCC_I2C3_CONFIG(I2CAPI_I2C3_CLKSRC);
lypinator 0:bb348c97df44 411 }
lypinator 0:bb348c97df44 412 #endif
lypinator 0:bb348c97df44 413 #if defined(I2C4_BASE) && defined(__HAL_RCC_I2C4_CONFIG)
lypinator 0:bb348c97df44 414 if (obj_s->i2c == I2C_4) {
lypinator 0:bb348c97df44 415 __HAL_RCC_I2C4_CONFIG(I2CAPI_I2C4_CLKSRC);
lypinator 0:bb348c97df44 416 }
lypinator 0:bb348c97df44 417 #endif
lypinator 0:bb348c97df44 418
lypinator 0:bb348c97df44 419 #ifdef I2C_ANALOGFILTER_ENABLE
lypinator 0:bb348c97df44 420 /* Enable the Analog I2C Filter */
lypinator 0:bb348c97df44 421 HAL_I2CEx_ConfigAnalogFilter(handle, I2C_ANALOGFILTER_ENABLE);
lypinator 0:bb348c97df44 422 #endif
lypinator 0:bb348c97df44 423
lypinator 0:bb348c97df44 424 // I2C configuration
lypinator 0:bb348c97df44 425 handle->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
lypinator 0:bb348c97df44 426 handle->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
lypinator 0:bb348c97df44 427 handle->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
lypinator 0:bb348c97df44 428 handle->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
lypinator 0:bb348c97df44 429 handle->Init.OwnAddress1 = 0;
lypinator 0:bb348c97df44 430 handle->Init.OwnAddress2 = 0;
lypinator 0:bb348c97df44 431 HAL_I2C_Init(handle);
lypinator 0:bb348c97df44 432
lypinator 0:bb348c97df44 433 /* store frequency for timeout computation */
lypinator 0:bb348c97df44 434 obj_s->hz = hz;
lypinator 0:bb348c97df44 435 }
lypinator 0:bb348c97df44 436
lypinator 0:bb348c97df44 437 i2c_t *get_i2c_obj(I2C_HandleTypeDef *hi2c)
lypinator 0:bb348c97df44 438 {
lypinator 0:bb348c97df44 439 /* Aim of the function is to get i2c_s pointer using hi2c pointer */
lypinator 0:bb348c97df44 440 /* Highly inspired from magical linux kernel's "container_of" */
lypinator 0:bb348c97df44 441 /* (which was not directly used since not compatible with IAR toolchain) */
lypinator 0:bb348c97df44 442 struct i2c_s *obj_s;
lypinator 0:bb348c97df44 443 i2c_t *obj;
lypinator 0:bb348c97df44 444
lypinator 0:bb348c97df44 445 obj_s = (struct i2c_s *)((char *)hi2c - offsetof(struct i2c_s, handle));
lypinator 0:bb348c97df44 446 obj = (i2c_t *)((char *)obj_s - offsetof(i2c_t, i2c));
lypinator 0:bb348c97df44 447
lypinator 0:bb348c97df44 448 return (obj);
lypinator 0:bb348c97df44 449 }
lypinator 0:bb348c97df44 450
lypinator 0:bb348c97df44 451 void i2c_reset(i2c_t *obj)
lypinator 0:bb348c97df44 452 {
lypinator 0:bb348c97df44 453 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 454 /* As recommended in i2c_api.h, mainly send stop */
lypinator 0:bb348c97df44 455 i2c_stop(obj);
lypinator 0:bb348c97df44 456 /* then re-init */
lypinator 0:bb348c97df44 457 i2c_init(obj, obj_s->sda, obj_s->scl);
lypinator 0:bb348c97df44 458 }
lypinator 0:bb348c97df44 459
lypinator 0:bb348c97df44 460 /*
lypinator 0:bb348c97df44 461 * UNITARY APIS.
lypinator 0:bb348c97df44 462 * For very basic operations, direct registers access is needed
lypinator 0:bb348c97df44 463 * There are 2 different IPs version that need to be supported
lypinator 0:bb348c97df44 464 */
lypinator 0:bb348c97df44 465 #ifdef I2C_IP_VERSION_V1
lypinator 0:bb348c97df44 466 int i2c_start(i2c_t *obj)
lypinator 0:bb348c97df44 467 {
lypinator 0:bb348c97df44 468
lypinator 0:bb348c97df44 469 int timeout;
lypinator 0:bb348c97df44 470 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 471 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 472
lypinator 0:bb348c97df44 473 // Clear Acknowledge failure flag
lypinator 0:bb348c97df44 474 __HAL_I2C_CLEAR_FLAG(handle, I2C_FLAG_AF);
lypinator 0:bb348c97df44 475
lypinator 0:bb348c97df44 476 // Wait the STOP condition has been previously correctly sent
lypinator 0:bb348c97df44 477 // This timeout can be avoid in some specific cases by simply clearing the STOP bit
lypinator 0:bb348c97df44 478 timeout = FLAG_TIMEOUT;
lypinator 0:bb348c97df44 479 while ((handle->Instance->CR1 & I2C_CR1_STOP) == I2C_CR1_STOP) {
lypinator 0:bb348c97df44 480 if ((timeout--) == 0) {
lypinator 0:bb348c97df44 481 return 1;
lypinator 0:bb348c97df44 482 }
lypinator 0:bb348c97df44 483 }
lypinator 0:bb348c97df44 484
lypinator 0:bb348c97df44 485 // Generate the START condition
lypinator 0:bb348c97df44 486 handle->Instance->CR1 |= I2C_CR1_START;
lypinator 0:bb348c97df44 487
lypinator 0:bb348c97df44 488 // Wait the START condition has been correctly sent
lypinator 0:bb348c97df44 489 timeout = FLAG_TIMEOUT;
lypinator 0:bb348c97df44 490 while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_SB) == RESET) {
lypinator 0:bb348c97df44 491 if ((timeout--) == 0) {
lypinator 0:bb348c97df44 492 return 1;
lypinator 0:bb348c97df44 493 }
lypinator 0:bb348c97df44 494 }
lypinator 0:bb348c97df44 495
lypinator 0:bb348c97df44 496 return 0;
lypinator 0:bb348c97df44 497 }
lypinator 0:bb348c97df44 498
lypinator 0:bb348c97df44 499 int i2c_stop(i2c_t *obj)
lypinator 0:bb348c97df44 500 {
lypinator 0:bb348c97df44 501 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 502 I2C_TypeDef *i2c = (I2C_TypeDef *)obj_s->i2c;
lypinator 0:bb348c97df44 503
lypinator 0:bb348c97df44 504 // Generate the STOP condition
lypinator 0:bb348c97df44 505 i2c->CR1 |= I2C_CR1_STOP;
lypinator 0:bb348c97df44 506
lypinator 0:bb348c97df44 507 /* In case of mixed usage of the APIs (unitary + SYNC)
lypinator 0:bb348c97df44 508 * re-init HAL state
lypinator 0:bb348c97df44 509 */
lypinator 0:bb348c97df44 510 if (obj_s->XferOperation != I2C_FIRST_AND_LAST_FRAME) {
lypinator 0:bb348c97df44 511 i2c_init(obj, obj_s->sda, obj_s->scl);
lypinator 0:bb348c97df44 512 }
lypinator 0:bb348c97df44 513
lypinator 0:bb348c97df44 514 return 0;
lypinator 0:bb348c97df44 515 }
lypinator 0:bb348c97df44 516
lypinator 0:bb348c97df44 517 int i2c_byte_read(i2c_t *obj, int last)
lypinator 0:bb348c97df44 518 {
lypinator 0:bb348c97df44 519
lypinator 0:bb348c97df44 520 int timeout;
lypinator 0:bb348c97df44 521 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 522 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 523
lypinator 0:bb348c97df44 524 if (last) {
lypinator 0:bb348c97df44 525 // Don't acknowledge the last byte
lypinator 0:bb348c97df44 526 handle->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator 0:bb348c97df44 527 } else {
lypinator 0:bb348c97df44 528 // Acknowledge the byte
lypinator 0:bb348c97df44 529 handle->Instance->CR1 |= I2C_CR1_ACK;
lypinator 0:bb348c97df44 530 }
lypinator 0:bb348c97df44 531
lypinator 0:bb348c97df44 532 // Wait until the byte is received
lypinator 0:bb348c97df44 533 timeout = FLAG_TIMEOUT;
lypinator 0:bb348c97df44 534 while (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_RXNE) == RESET) {
lypinator 0:bb348c97df44 535 if ((timeout--) == 0) {
lypinator 0:bb348c97df44 536 return -1;
lypinator 0:bb348c97df44 537 }
lypinator 0:bb348c97df44 538 }
lypinator 0:bb348c97df44 539
lypinator 0:bb348c97df44 540 return (int)handle->Instance->DR;
lypinator 0:bb348c97df44 541 }
lypinator 0:bb348c97df44 542
lypinator 0:bb348c97df44 543 int i2c_byte_write(i2c_t *obj, int data)
lypinator 0:bb348c97df44 544 {
lypinator 0:bb348c97df44 545
lypinator 0:bb348c97df44 546 int timeout;
lypinator 0:bb348c97df44 547 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 548 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 549
lypinator 0:bb348c97df44 550 handle->Instance->DR = (uint8_t)data;
lypinator 0:bb348c97df44 551
lypinator 0:bb348c97df44 552 // Wait until the byte (might be the address) is transmitted
lypinator 0:bb348c97df44 553 timeout = FLAG_TIMEOUT;
lypinator 0:bb348c97df44 554 while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXE) == RESET) &&
lypinator 0:bb348c97df44 555 (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BTF) == RESET) &&
lypinator 0:bb348c97df44 556 (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) == RESET)) {
lypinator 0:bb348c97df44 557 if ((timeout--) == 0) {
lypinator 0:bb348c97df44 558 return 2;
lypinator 0:bb348c97df44 559 }
lypinator 0:bb348c97df44 560 }
lypinator 0:bb348c97df44 561
lypinator 0:bb348c97df44 562 if (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) != RESET) {
lypinator 0:bb348c97df44 563 __HAL_I2C_CLEAR_ADDRFLAG(handle);
lypinator 0:bb348c97df44 564 }
lypinator 0:bb348c97df44 565
lypinator 0:bb348c97df44 566 return 1;
lypinator 0:bb348c97df44 567 }
lypinator 0:bb348c97df44 568 #endif //I2C_IP_VERSION_V1
lypinator 0:bb348c97df44 569 #ifdef I2C_IP_VERSION_V2
lypinator 0:bb348c97df44 570
lypinator 0:bb348c97df44 571 int i2c_start(i2c_t *obj)
lypinator 0:bb348c97df44 572 {
lypinator 0:bb348c97df44 573 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 574 /* This I2C IP doesn't */
lypinator 0:bb348c97df44 575 obj_s->pending_start = 1;
lypinator 0:bb348c97df44 576 return 0;
lypinator 0:bb348c97df44 577 }
lypinator 0:bb348c97df44 578
lypinator 0:bb348c97df44 579 int i2c_stop(i2c_t *obj)
lypinator 0:bb348c97df44 580 {
lypinator 0:bb348c97df44 581 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 582 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 583 int timeout = FLAG_TIMEOUT;
lypinator 0:bb348c97df44 584 #if DEVICE_I2CSLAVE
lypinator 0:bb348c97df44 585 if (obj_s->slave) {
lypinator 0:bb348c97df44 586 /* re-init slave when stop is requested */
lypinator 0:bb348c97df44 587 i2c_init(obj, obj_s->sda, obj_s->scl);
lypinator 0:bb348c97df44 588 return 0;
lypinator 0:bb348c97df44 589 }
lypinator 0:bb348c97df44 590 #endif
lypinator 0:bb348c97df44 591 // Disable reload mode
lypinator 0:bb348c97df44 592 handle->Instance->CR2 &= (uint32_t)~I2C_CR2_RELOAD;
lypinator 0:bb348c97df44 593 // Generate the STOP condition
lypinator 0:bb348c97df44 594 handle->Instance->CR2 |= I2C_CR2_STOP;
lypinator 0:bb348c97df44 595
lypinator 0:bb348c97df44 596 timeout = FLAG_TIMEOUT;
lypinator 0:bb348c97df44 597 while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_STOPF)) {
lypinator 0:bb348c97df44 598 if ((timeout--) == 0) {
lypinator 0:bb348c97df44 599 return I2C_ERROR_BUS_BUSY;
lypinator 0:bb348c97df44 600 }
lypinator 0:bb348c97df44 601 }
lypinator 0:bb348c97df44 602
lypinator 0:bb348c97df44 603 /* Clear STOP Flag */
lypinator 0:bb348c97df44 604 __HAL_I2C_CLEAR_FLAG(handle, I2C_FLAG_STOPF);
lypinator 0:bb348c97df44 605
lypinator 0:bb348c97df44 606 /* Erase slave address, this wiil be used as a marker
lypinator 0:bb348c97df44 607 * to know when we need to prepare next start */
lypinator 0:bb348c97df44 608 handle->Instance->CR2 &= ~I2C_CR2_SADD;
lypinator 0:bb348c97df44 609
lypinator 0:bb348c97df44 610 /*
lypinator 0:bb348c97df44 611 * V2 IP is meant for automatic STOP, not user STOP
lypinator 0:bb348c97df44 612 * SW reset the IP state machine before next transaction
lypinator 0:bb348c97df44 613 */
lypinator 0:bb348c97df44 614 i2c_sw_reset(obj);
lypinator 0:bb348c97df44 615
lypinator 0:bb348c97df44 616 /* In case of mixed usage of the APIs (unitary + SYNC)
lypinator 0:bb348c97df44 617 * re-init HAL state */
lypinator 0:bb348c97df44 618 if (obj_s->XferOperation != I2C_FIRST_AND_LAST_FRAME) {
lypinator 0:bb348c97df44 619 i2c_init(obj, obj_s->sda, obj_s->scl);
lypinator 0:bb348c97df44 620 }
lypinator 0:bb348c97df44 621
lypinator 0:bb348c97df44 622 return 0;
lypinator 0:bb348c97df44 623 }
lypinator 0:bb348c97df44 624
lypinator 0:bb348c97df44 625 int i2c_byte_read(i2c_t *obj, int last)
lypinator 0:bb348c97df44 626 {
lypinator 0:bb348c97df44 627 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 628 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 629 int timeout = FLAG_TIMEOUT;
lypinator 0:bb348c97df44 630 uint32_t tmpreg = handle->Instance->CR2;
lypinator 0:bb348c97df44 631 char data;
lypinator 0:bb348c97df44 632 #if DEVICE_I2CSLAVE
lypinator 0:bb348c97df44 633 if (obj_s->slave) {
lypinator 0:bb348c97df44 634 return i2c_slave_read(obj, &data, 1);
lypinator 0:bb348c97df44 635 }
lypinator 0:bb348c97df44 636 #endif
lypinator 0:bb348c97df44 637 /* Then send data when there's room in the TX fifo */
lypinator 0:bb348c97df44 638 if ((tmpreg & I2C_CR2_RELOAD) != 0) {
lypinator 0:bb348c97df44 639 while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TCR)) {
lypinator 0:bb348c97df44 640 if ((timeout--) == 0) {
lypinator 0:bb348c97df44 641 DEBUG_PRINTF("timeout in byte_read\r\n");
lypinator 0:bb348c97df44 642 return -1;
lypinator 0:bb348c97df44 643 }
lypinator 0:bb348c97df44 644 }
lypinator 0:bb348c97df44 645 }
lypinator 0:bb348c97df44 646
lypinator 0:bb348c97df44 647 /* Enable reload mode as we don't know how many bytes will be sent */
lypinator 0:bb348c97df44 648 /* and set transfer size to 1 */
lypinator 0:bb348c97df44 649 tmpreg |= I2C_CR2_RELOAD | (I2C_CR2_NBYTES & (1 << 16));
lypinator 0:bb348c97df44 650 /* Set the prepared configuration */
lypinator 0:bb348c97df44 651 handle->Instance->CR2 = tmpreg;
lypinator 0:bb348c97df44 652
lypinator 0:bb348c97df44 653 timeout = FLAG_TIMEOUT;
lypinator 0:bb348c97df44 654 while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_RXNE)) {
lypinator 0:bb348c97df44 655 if ((timeout--) == 0) {
lypinator 0:bb348c97df44 656 return -1;
lypinator 0:bb348c97df44 657 }
lypinator 0:bb348c97df44 658 }
lypinator 0:bb348c97df44 659
lypinator 0:bb348c97df44 660 /* Then Get Byte */
lypinator 0:bb348c97df44 661 data = handle->Instance->RXDR;
lypinator 0:bb348c97df44 662
lypinator 0:bb348c97df44 663 if (last) {
lypinator 0:bb348c97df44 664 /* Disable Address Acknowledge */
lypinator 0:bb348c97df44 665 handle->Instance->CR2 |= I2C_CR2_NACK;
lypinator 0:bb348c97df44 666 }
lypinator 0:bb348c97df44 667
lypinator 0:bb348c97df44 668 return data;
lypinator 0:bb348c97df44 669 }
lypinator 0:bb348c97df44 670
lypinator 0:bb348c97df44 671 int i2c_byte_write(i2c_t *obj, int data)
lypinator 0:bb348c97df44 672 {
lypinator 0:bb348c97df44 673 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 674 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 675 int timeout = FLAG_TIMEOUT;
lypinator 0:bb348c97df44 676 uint32_t tmpreg = handle->Instance->CR2;
lypinator 0:bb348c97df44 677 #if DEVICE_I2CSLAVE
lypinator 0:bb348c97df44 678 if (obj_s->slave) {
lypinator 0:bb348c97df44 679 return i2c_slave_write(obj, (char *) &data, 1);
lypinator 0:bb348c97df44 680 }
lypinator 0:bb348c97df44 681 #endif
lypinator 0:bb348c97df44 682 if (obj_s->pending_start) {
lypinator 0:bb348c97df44 683 obj_s->pending_start = 0;
lypinator 0:bb348c97df44 684 //* First byte after the start is the address */
lypinator 0:bb348c97df44 685 tmpreg |= (uint32_t)((uint32_t)data & I2C_CR2_SADD);
lypinator 0:bb348c97df44 686 if (data & 0x01) {
lypinator 0:bb348c97df44 687 tmpreg |= I2C_CR2_START | I2C_CR2_RD_WRN;
lypinator 0:bb348c97df44 688 } else {
lypinator 0:bb348c97df44 689 tmpreg |= I2C_CR2_START;
lypinator 0:bb348c97df44 690 tmpreg &= ~I2C_CR2_RD_WRN;
lypinator 0:bb348c97df44 691 }
lypinator 0:bb348c97df44 692 /* Disable reload first to use it later */
lypinator 0:bb348c97df44 693 tmpreg &= ~I2C_CR2_RELOAD;
lypinator 0:bb348c97df44 694 /* Disable Autoend */
lypinator 0:bb348c97df44 695 tmpreg &= ~I2C_CR2_AUTOEND;
lypinator 0:bb348c97df44 696 /* Do not set any transfer size for now */
lypinator 0:bb348c97df44 697 tmpreg |= (I2C_CR2_NBYTES & (1 << 16));
lypinator 0:bb348c97df44 698 /* Set the prepared configuration */
lypinator 0:bb348c97df44 699 handle->Instance->CR2 = tmpreg;
lypinator 0:bb348c97df44 700 } else {
lypinator 0:bb348c97df44 701 /* Set the prepared configuration */
lypinator 0:bb348c97df44 702 tmpreg = handle->Instance->CR2;
lypinator 0:bb348c97df44 703
lypinator 0:bb348c97df44 704 /* Then send data when there's room in the TX fifo */
lypinator 0:bb348c97df44 705 if ((tmpreg & I2C_CR2_RELOAD) != 0) {
lypinator 0:bb348c97df44 706 while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TCR)) {
lypinator 0:bb348c97df44 707 if ((timeout--) == 0) {
lypinator 0:bb348c97df44 708 DEBUG_PRINTF("timeout in byte_write\r\n");
lypinator 0:bb348c97df44 709 return 2;
lypinator 0:bb348c97df44 710 }
lypinator 0:bb348c97df44 711 }
lypinator 0:bb348c97df44 712 }
lypinator 0:bb348c97df44 713 /* Enable reload mode as we don't know how many bytes will eb sent */
lypinator 0:bb348c97df44 714 tmpreg |= I2C_CR2_RELOAD;
lypinator 0:bb348c97df44 715 /* Set transfer size to 1 */
lypinator 0:bb348c97df44 716 tmpreg |= (I2C_CR2_NBYTES & (1 << 16));
lypinator 0:bb348c97df44 717 /* Set the prepared configuration */
lypinator 0:bb348c97df44 718 handle->Instance->CR2 = tmpreg;
lypinator 0:bb348c97df44 719 /* Prepare next write */
lypinator 0:bb348c97df44 720 timeout = FLAG_TIMEOUT;
lypinator 0:bb348c97df44 721 while (!__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXE)) {
lypinator 0:bb348c97df44 722 if ((timeout--) == 0) {
lypinator 0:bb348c97df44 723 return 2;
lypinator 0:bb348c97df44 724 }
lypinator 0:bb348c97df44 725 }
lypinator 0:bb348c97df44 726 /* Write byte */
lypinator 0:bb348c97df44 727 handle->Instance->TXDR = data;
lypinator 0:bb348c97df44 728 }
lypinator 0:bb348c97df44 729
lypinator 0:bb348c97df44 730 return 1;
lypinator 0:bb348c97df44 731 }
lypinator 0:bb348c97df44 732 #endif //I2C_IP_VERSION_V2
lypinator 0:bb348c97df44 733
lypinator 0:bb348c97df44 734 /*
lypinator 0:bb348c97df44 735 * SYNC APIS
lypinator 0:bb348c97df44 736 */
lypinator 0:bb348c97df44 737 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
lypinator 0:bb348c97df44 738 {
lypinator 0:bb348c97df44 739 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 740 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 741 int count = I2C_ERROR_BUS_BUSY, ret = 0;
lypinator 0:bb348c97df44 742 uint32_t timeout = 0;
lypinator 0:bb348c97df44 743
lypinator 0:bb348c97df44 744 // Trick to remove compiler warning "left and right operands are identical" in some cases
lypinator 0:bb348c97df44 745 uint32_t op1 = I2C_FIRST_AND_LAST_FRAME;
lypinator 0:bb348c97df44 746 uint32_t op2 = I2C_LAST_FRAME;
lypinator 0:bb348c97df44 747 if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) {
lypinator 0:bb348c97df44 748 if (stop) {
lypinator 0:bb348c97df44 749 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
lypinator 0:bb348c97df44 750 } else {
lypinator 0:bb348c97df44 751 obj_s->XferOperation = I2C_FIRST_FRAME;
lypinator 0:bb348c97df44 752 }
lypinator 0:bb348c97df44 753 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
lypinator 0:bb348c97df44 754 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
lypinator 0:bb348c97df44 755 if (stop) {
lypinator 0:bb348c97df44 756 obj_s->XferOperation = I2C_LAST_FRAME;
lypinator 0:bb348c97df44 757 } else {
lypinator 0:bb348c97df44 758 obj_s->XferOperation = I2C_NEXT_FRAME;
lypinator 0:bb348c97df44 759 }
lypinator 0:bb348c97df44 760 }
lypinator 0:bb348c97df44 761
lypinator 0:bb348c97df44 762 obj_s->event = 0;
lypinator 0:bb348c97df44 763
lypinator 0:bb348c97df44 764 /* Activate default IRQ handlers for sync mode
lypinator 0:bb348c97df44 765 * which would be overwritten in async mode
lypinator 0:bb348c97df44 766 */
lypinator 0:bb348c97df44 767 i2c_ev_err_enable(obj, i2c_get_irq_handler(obj));
lypinator 0:bb348c97df44 768
lypinator 0:bb348c97df44 769 ret = HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation);
lypinator 0:bb348c97df44 770
lypinator 0:bb348c97df44 771 if (ret == HAL_OK) {
lypinator 0:bb348c97df44 772 timeout = BYTE_TIMEOUT_US * (length + 1);
lypinator 0:bb348c97df44 773 /* transfer started : wait completion or timeout */
lypinator 0:bb348c97df44 774 while (!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) {
lypinator 0:bb348c97df44 775 wait_us(1);
lypinator 0:bb348c97df44 776 }
lypinator 0:bb348c97df44 777
lypinator 0:bb348c97df44 778 i2c_ev_err_disable(obj);
lypinator 0:bb348c97df44 779
lypinator 0:bb348c97df44 780 if ((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) {
lypinator 0:bb348c97df44 781 DEBUG_PRINTF(" TIMEOUT or error in i2c_read\r\n");
lypinator 0:bb348c97df44 782 /* re-init IP to try and get back in a working state */
lypinator 0:bb348c97df44 783 i2c_init(obj, obj_s->sda, obj_s->scl);
lypinator 0:bb348c97df44 784 } else {
lypinator 0:bb348c97df44 785 count = length;
lypinator 0:bb348c97df44 786 }
lypinator 0:bb348c97df44 787 } else {
lypinator 0:bb348c97df44 788 DEBUG_PRINTF("ERROR in i2c_read:%d\r\n", ret);
lypinator 0:bb348c97df44 789 }
lypinator 0:bb348c97df44 790
lypinator 0:bb348c97df44 791 return count;
lypinator 0:bb348c97df44 792 }
lypinator 0:bb348c97df44 793
lypinator 0:bb348c97df44 794 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
lypinator 0:bb348c97df44 795 {
lypinator 0:bb348c97df44 796 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 797 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 798 int count = I2C_ERROR_BUS_BUSY, ret = 0;
lypinator 0:bb348c97df44 799 uint32_t timeout = 0;
lypinator 0:bb348c97df44 800
lypinator 0:bb348c97df44 801 // Trick to remove compiler warning "left and right operands are identical" in some cases
lypinator 0:bb348c97df44 802 uint32_t op1 = I2C_FIRST_AND_LAST_FRAME;
lypinator 0:bb348c97df44 803 uint32_t op2 = I2C_LAST_FRAME;
lypinator 0:bb348c97df44 804 if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) {
lypinator 0:bb348c97df44 805 if (stop) {
lypinator 0:bb348c97df44 806 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
lypinator 0:bb348c97df44 807 } else {
lypinator 0:bb348c97df44 808 obj_s->XferOperation = I2C_FIRST_FRAME;
lypinator 0:bb348c97df44 809 }
lypinator 0:bb348c97df44 810 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
lypinator 0:bb348c97df44 811 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
lypinator 0:bb348c97df44 812 if (stop) {
lypinator 0:bb348c97df44 813 obj_s->XferOperation = I2C_LAST_FRAME;
lypinator 0:bb348c97df44 814 } else {
lypinator 0:bb348c97df44 815 obj_s->XferOperation = I2C_NEXT_FRAME;
lypinator 0:bb348c97df44 816 }
lypinator 0:bb348c97df44 817 }
lypinator 0:bb348c97df44 818
lypinator 0:bb348c97df44 819 obj_s->event = 0;
lypinator 0:bb348c97df44 820
lypinator 0:bb348c97df44 821 i2c_ev_err_enable(obj, i2c_get_irq_handler(obj));
lypinator 0:bb348c97df44 822
lypinator 0:bb348c97df44 823 ret = HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation);
lypinator 0:bb348c97df44 824
lypinator 0:bb348c97df44 825 if (ret == HAL_OK) {
lypinator 0:bb348c97df44 826 timeout = BYTE_TIMEOUT_US * (length + 1);
lypinator 0:bb348c97df44 827 /* transfer started : wait completion or timeout */
lypinator 0:bb348c97df44 828 while (!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) {
lypinator 0:bb348c97df44 829 wait_us(1);
lypinator 0:bb348c97df44 830 }
lypinator 0:bb348c97df44 831
lypinator 0:bb348c97df44 832 i2c_ev_err_disable(obj);
lypinator 0:bb348c97df44 833
lypinator 0:bb348c97df44 834 if ((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) {
lypinator 0:bb348c97df44 835 DEBUG_PRINTF(" TIMEOUT or error in i2c_write\r\n");
lypinator 0:bb348c97df44 836 /* re-init IP to try and get back in a working state */
lypinator 0:bb348c97df44 837 i2c_init(obj, obj_s->sda, obj_s->scl);
lypinator 0:bb348c97df44 838 } else {
lypinator 0:bb348c97df44 839 count = length;
lypinator 0:bb348c97df44 840 }
lypinator 0:bb348c97df44 841 } else {
lypinator 0:bb348c97df44 842 DEBUG_PRINTF("ERROR in i2c_read\r\n");
lypinator 0:bb348c97df44 843 }
lypinator 0:bb348c97df44 844
lypinator 0:bb348c97df44 845 return count;
lypinator 0:bb348c97df44 846 }
lypinator 0:bb348c97df44 847
lypinator 0:bb348c97df44 848 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator 0:bb348c97df44 849 {
lypinator 0:bb348c97df44 850 /* Get object ptr based on handler ptr */
lypinator 0:bb348c97df44 851 i2c_t *obj = get_i2c_obj(hi2c);
lypinator 0:bb348c97df44 852 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 853
lypinator 0:bb348c97df44 854 #if DEVICE_I2C_ASYNCH
lypinator 0:bb348c97df44 855 /* Handle potential Tx/Rx use case */
lypinator 0:bb348c97df44 856 if ((obj->tx_buff.length) && (obj->rx_buff.length)) {
lypinator 0:bb348c97df44 857 if (obj_s->stop) {
lypinator 0:bb348c97df44 858 obj_s->XferOperation = I2C_LAST_FRAME;
lypinator 0:bb348c97df44 859 } else {
lypinator 0:bb348c97df44 860 obj_s->XferOperation = I2C_NEXT_FRAME;
lypinator 0:bb348c97df44 861 }
lypinator 0:bb348c97df44 862
lypinator 0:bb348c97df44 863 HAL_I2C_Master_Sequential_Receive_IT(hi2c, obj_s->address, (uint8_t *)obj->rx_buff.buffer, obj->rx_buff.length, obj_s->XferOperation);
lypinator 0:bb348c97df44 864 } else
lypinator 0:bb348c97df44 865 #endif
lypinator 0:bb348c97df44 866 {
lypinator 0:bb348c97df44 867 /* Set event flag */
lypinator 0:bb348c97df44 868 obj_s->event = I2C_EVENT_TRANSFER_COMPLETE;
lypinator 0:bb348c97df44 869 }
lypinator 0:bb348c97df44 870 }
lypinator 0:bb348c97df44 871
lypinator 0:bb348c97df44 872 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator 0:bb348c97df44 873 {
lypinator 0:bb348c97df44 874 /* Get object ptr based on handler ptr */
lypinator 0:bb348c97df44 875 i2c_t *obj = get_i2c_obj(hi2c);
lypinator 0:bb348c97df44 876 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 877
lypinator 0:bb348c97df44 878 /* Set event flag */
lypinator 0:bb348c97df44 879 obj_s->event = I2C_EVENT_TRANSFER_COMPLETE;
lypinator 0:bb348c97df44 880 }
lypinator 0:bb348c97df44 881
lypinator 0:bb348c97df44 882 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
lypinator 0:bb348c97df44 883 {
lypinator 0:bb348c97df44 884 /* Get object ptr based on handler ptr */
lypinator 0:bb348c97df44 885 i2c_t *obj = get_i2c_obj(hi2c);
lypinator 0:bb348c97df44 886 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 887 #if DEVICE_I2CSLAVE
lypinator 0:bb348c97df44 888 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 889 uint32_t address = 0;
lypinator 0:bb348c97df44 890 /* Store address to handle it after reset */
lypinator 0:bb348c97df44 891 if (obj_s->slave) {
lypinator 0:bb348c97df44 892 address = handle->Init.OwnAddress1;
lypinator 0:bb348c97df44 893 }
lypinator 0:bb348c97df44 894 #endif
lypinator 0:bb348c97df44 895
lypinator 0:bb348c97df44 896 DEBUG_PRINTF("HAL_I2C_ErrorCallback:%d, index=%d\r\n", (int) hi2c->ErrorCode, obj_s->index);
lypinator 0:bb348c97df44 897
lypinator 0:bb348c97df44 898 /* re-init IP to try and get back in a working state */
lypinator 0:bb348c97df44 899 i2c_init(obj, obj_s->sda, obj_s->scl);
lypinator 0:bb348c97df44 900
lypinator 0:bb348c97df44 901 #if DEVICE_I2CSLAVE
lypinator 0:bb348c97df44 902 /* restore slave address */
lypinator 0:bb348c97df44 903 if (address != 0) {
lypinator 0:bb348c97df44 904 obj_s->slave = 1;
lypinator 0:bb348c97df44 905 i2c_slave_address(obj, 0, address, 0);
lypinator 0:bb348c97df44 906 }
lypinator 0:bb348c97df44 907 #endif
lypinator 0:bb348c97df44 908
lypinator 0:bb348c97df44 909 /* Keep Set event flag */
lypinator 0:bb348c97df44 910 obj_s->event = I2C_EVENT_ERROR;
lypinator 0:bb348c97df44 911 }
lypinator 0:bb348c97df44 912
lypinator 0:bb348c97df44 913 #if DEVICE_I2CSLAVE
lypinator 0:bb348c97df44 914 /* SLAVE API FUNCTIONS */
lypinator 0:bb348c97df44 915 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask)
lypinator 0:bb348c97df44 916 {
lypinator 0:bb348c97df44 917 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 918 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 919
lypinator 0:bb348c97df44 920 // I2C configuration
lypinator 0:bb348c97df44 921 handle->Init.OwnAddress1 = address;
lypinator 0:bb348c97df44 922 HAL_I2C_Init(handle);
lypinator 0:bb348c97df44 923
lypinator 0:bb348c97df44 924 i2c_ev_err_enable(obj, i2c_get_irq_handler(obj));
lypinator 0:bb348c97df44 925
lypinator 0:bb348c97df44 926 HAL_I2C_EnableListen_IT(handle);
lypinator 0:bb348c97df44 927 }
lypinator 0:bb348c97df44 928
lypinator 0:bb348c97df44 929 void i2c_slave_mode(i2c_t *obj, int enable_slave)
lypinator 0:bb348c97df44 930 {
lypinator 0:bb348c97df44 931
lypinator 0:bb348c97df44 932 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 933 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 934
lypinator 0:bb348c97df44 935 if (enable_slave) {
lypinator 0:bb348c97df44 936 obj_s->slave = 1;
lypinator 0:bb348c97df44 937 HAL_I2C_EnableListen_IT(handle);
lypinator 0:bb348c97df44 938 } else {
lypinator 0:bb348c97df44 939 obj_s->slave = 0;
lypinator 0:bb348c97df44 940 HAL_I2C_DisableListen_IT(handle);
lypinator 0:bb348c97df44 941 }
lypinator 0:bb348c97df44 942 }
lypinator 0:bb348c97df44 943
lypinator 0:bb348c97df44 944 // See I2CSlave.h
lypinator 0:bb348c97df44 945 #define NoData 0 // the slave has not been addressed
lypinator 0:bb348c97df44 946 #define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
lypinator 0:bb348c97df44 947 #define WriteGeneral 2 // the master is writing to all slave
lypinator 0:bb348c97df44 948 #define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
lypinator 0:bb348c97df44 949
lypinator 0:bb348c97df44 950
lypinator 0:bb348c97df44 951 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
lypinator 0:bb348c97df44 952 {
lypinator 0:bb348c97df44 953 /* Get object ptr based on handler ptr */
lypinator 0:bb348c97df44 954 i2c_t *obj = get_i2c_obj(hi2c);
lypinator 0:bb348c97df44 955 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 956
lypinator 0:bb348c97df44 957 /* Transfer direction in HAL is from Master point of view */
lypinator 0:bb348c97df44 958 if (TransferDirection == I2C_DIRECTION_RECEIVE) {
lypinator 0:bb348c97df44 959 obj_s->pending_slave_tx_master_rx = 1;
lypinator 0:bb348c97df44 960 }
lypinator 0:bb348c97df44 961
lypinator 0:bb348c97df44 962 if (TransferDirection == I2C_DIRECTION_TRANSMIT) {
lypinator 0:bb348c97df44 963 obj_s->pending_slave_rx_maxter_tx = 1;
lypinator 0:bb348c97df44 964 }
lypinator 0:bb348c97df44 965 }
lypinator 0:bb348c97df44 966
lypinator 0:bb348c97df44 967 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *I2cHandle)
lypinator 0:bb348c97df44 968 {
lypinator 0:bb348c97df44 969 /* Get object ptr based on handler ptr */
lypinator 0:bb348c97df44 970 i2c_t *obj = get_i2c_obj(I2cHandle);
lypinator 0:bb348c97df44 971 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 972 obj_s->pending_slave_tx_master_rx = 0;
lypinator 0:bb348c97df44 973 }
lypinator 0:bb348c97df44 974
lypinator 0:bb348c97df44 975 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *I2cHandle)
lypinator 0:bb348c97df44 976 {
lypinator 0:bb348c97df44 977 /* Get object ptr based on handler ptr */
lypinator 0:bb348c97df44 978 i2c_t *obj = get_i2c_obj(I2cHandle);
lypinator 0:bb348c97df44 979 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 980 obj_s->pending_slave_rx_maxter_tx = 0;
lypinator 0:bb348c97df44 981 }
lypinator 0:bb348c97df44 982
lypinator 0:bb348c97df44 983 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator 0:bb348c97df44 984 {
lypinator 0:bb348c97df44 985 /* restart listening for master requests */
lypinator 0:bb348c97df44 986 HAL_I2C_EnableListen_IT(hi2c);
lypinator 0:bb348c97df44 987 }
lypinator 0:bb348c97df44 988
lypinator 0:bb348c97df44 989 int i2c_slave_receive(i2c_t *obj)
lypinator 0:bb348c97df44 990 {
lypinator 0:bb348c97df44 991
lypinator 0:bb348c97df44 992 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 993 int retValue = NoData;
lypinator 0:bb348c97df44 994
lypinator 0:bb348c97df44 995 if (obj_s->pending_slave_rx_maxter_tx) {
lypinator 0:bb348c97df44 996 retValue = WriteAddressed;
lypinator 0:bb348c97df44 997 }
lypinator 0:bb348c97df44 998
lypinator 0:bb348c97df44 999 if (obj_s->pending_slave_tx_master_rx) {
lypinator 0:bb348c97df44 1000 retValue = ReadAddressed;
lypinator 0:bb348c97df44 1001 }
lypinator 0:bb348c97df44 1002
lypinator 0:bb348c97df44 1003 return (retValue);
lypinator 0:bb348c97df44 1004 }
lypinator 0:bb348c97df44 1005
lypinator 0:bb348c97df44 1006 int i2c_slave_read(i2c_t *obj, char *data, int length)
lypinator 0:bb348c97df44 1007 {
lypinator 0:bb348c97df44 1008 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 1009 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 1010 int count = 0;
lypinator 0:bb348c97df44 1011 int ret = 0;
lypinator 0:bb348c97df44 1012 uint32_t timeout = 0;
lypinator 0:bb348c97df44 1013
lypinator 0:bb348c97df44 1014 /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */
lypinator 0:bb348c97df44 1015 ret = HAL_I2C_Slave_Sequential_Receive_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME);
lypinator 0:bb348c97df44 1016
lypinator 0:bb348c97df44 1017 if (ret == HAL_OK) {
lypinator 0:bb348c97df44 1018 timeout = BYTE_TIMEOUT_US * (length + 1);
lypinator 0:bb348c97df44 1019 while (obj_s->pending_slave_rx_maxter_tx && (--timeout != 0)) {
lypinator 0:bb348c97df44 1020 wait_us(1);
lypinator 0:bb348c97df44 1021 }
lypinator 0:bb348c97df44 1022
lypinator 0:bb348c97df44 1023 if (timeout != 0) {
lypinator 0:bb348c97df44 1024 count = length;
lypinator 0:bb348c97df44 1025 } else {
lypinator 0:bb348c97df44 1026 DEBUG_PRINTF("TIMEOUT or error in i2c_slave_read\r\n");
lypinator 0:bb348c97df44 1027 }
lypinator 0:bb348c97df44 1028 }
lypinator 0:bb348c97df44 1029 return count;
lypinator 0:bb348c97df44 1030 }
lypinator 0:bb348c97df44 1031
lypinator 0:bb348c97df44 1032 int i2c_slave_write(i2c_t *obj, const char *data, int length)
lypinator 0:bb348c97df44 1033 {
lypinator 0:bb348c97df44 1034 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 1035 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 1036 int count = 0;
lypinator 0:bb348c97df44 1037 int ret = 0;
lypinator 0:bb348c97df44 1038 uint32_t timeout = 0;
lypinator 0:bb348c97df44 1039
lypinator 0:bb348c97df44 1040 /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */
lypinator 0:bb348c97df44 1041 ret = HAL_I2C_Slave_Sequential_Transmit_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME);
lypinator 0:bb348c97df44 1042
lypinator 0:bb348c97df44 1043 if (ret == HAL_OK) {
lypinator 0:bb348c97df44 1044 timeout = BYTE_TIMEOUT_US * (length + 1);
lypinator 0:bb348c97df44 1045 while (obj_s->pending_slave_tx_master_rx && (--timeout != 0)) {
lypinator 0:bb348c97df44 1046 wait_us(1);
lypinator 0:bb348c97df44 1047 }
lypinator 0:bb348c97df44 1048
lypinator 0:bb348c97df44 1049 if (timeout != 0) {
lypinator 0:bb348c97df44 1050 count = length;
lypinator 0:bb348c97df44 1051 } else {
lypinator 0:bb348c97df44 1052 DEBUG_PRINTF("TIMEOUT or error in i2c_slave_write\r\n");
lypinator 0:bb348c97df44 1053 }
lypinator 0:bb348c97df44 1054 }
lypinator 0:bb348c97df44 1055
lypinator 0:bb348c97df44 1056 return count;
lypinator 0:bb348c97df44 1057 }
lypinator 0:bb348c97df44 1058 #endif // DEVICE_I2CSLAVE
lypinator 0:bb348c97df44 1059
lypinator 0:bb348c97df44 1060 #if DEVICE_I2C_ASYNCH
lypinator 0:bb348c97df44 1061 /* ASYNCH MASTER API FUNCTIONS */
lypinator 0:bb348c97df44 1062 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator 0:bb348c97df44 1063 {
lypinator 0:bb348c97df44 1064 /* Get object ptr based on handler ptr */
lypinator 0:bb348c97df44 1065 i2c_t *obj = get_i2c_obj(hi2c);
lypinator 0:bb348c97df44 1066 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 1067 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 1068
lypinator 0:bb348c97df44 1069 /* Disable IT. Not always done before calling macro */
lypinator 0:bb348c97df44 1070 __HAL_I2C_DISABLE_IT(handle, I2C_IT_ALL);
lypinator 0:bb348c97df44 1071 i2c_ev_err_disable(obj);
lypinator 0:bb348c97df44 1072
lypinator 0:bb348c97df44 1073 /* Set event flag */
lypinator 0:bb348c97df44 1074 obj_s->event = I2C_EVENT_ERROR;
lypinator 0:bb348c97df44 1075 }
lypinator 0:bb348c97df44 1076
lypinator 0:bb348c97df44 1077 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint)
lypinator 0:bb348c97df44 1078 {
lypinator 0:bb348c97df44 1079
lypinator 0:bb348c97df44 1080 // TODO: DMA usage is currently ignored by this way
lypinator 0:bb348c97df44 1081 (void) hint;
lypinator 0:bb348c97df44 1082
lypinator 0:bb348c97df44 1083 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 1084 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 1085
lypinator 0:bb348c97df44 1086 /* Update object */
lypinator 0:bb348c97df44 1087 obj->tx_buff.buffer = (void *)tx;
lypinator 0:bb348c97df44 1088 obj->tx_buff.length = tx_length;
lypinator 0:bb348c97df44 1089 obj->tx_buff.pos = 0;
lypinator 0:bb348c97df44 1090 obj->tx_buff.width = 8;
lypinator 0:bb348c97df44 1091
lypinator 0:bb348c97df44 1092 obj->rx_buff.buffer = (void *)rx;
lypinator 0:bb348c97df44 1093 obj->rx_buff.length = rx_length;
lypinator 0:bb348c97df44 1094 obj->rx_buff.pos = SIZE_MAX;
lypinator 0:bb348c97df44 1095 obj->rx_buff.width = 8;
lypinator 0:bb348c97df44 1096
lypinator 0:bb348c97df44 1097 obj_s->available_events = event;
lypinator 0:bb348c97df44 1098 obj_s->event = 0;
lypinator 0:bb348c97df44 1099 obj_s->address = address;
lypinator 0:bb348c97df44 1100 obj_s->stop = stop;
lypinator 0:bb348c97df44 1101
lypinator 0:bb348c97df44 1102 i2c_ev_err_enable(obj, handler);
lypinator 0:bb348c97df44 1103
lypinator 0:bb348c97df44 1104 /* Set operation step depending if stop sending required or not */
lypinator 0:bb348c97df44 1105 if ((tx_length && !rx_length) || (!tx_length && rx_length)) {
lypinator 0:bb348c97df44 1106 // Trick to remove compiler warning "left and right operands are identical" in some cases
lypinator 0:bb348c97df44 1107 uint32_t op1 = I2C_FIRST_AND_LAST_FRAME;
lypinator 0:bb348c97df44 1108 uint32_t op2 = I2C_LAST_FRAME;
lypinator 0:bb348c97df44 1109 if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) {
lypinator 0:bb348c97df44 1110 if (stop) {
lypinator 0:bb348c97df44 1111 obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME;
lypinator 0:bb348c97df44 1112 } else {
lypinator 0:bb348c97df44 1113 obj_s->XferOperation = I2C_FIRST_FRAME;
lypinator 0:bb348c97df44 1114 }
lypinator 0:bb348c97df44 1115 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
lypinator 0:bb348c97df44 1116 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
lypinator 0:bb348c97df44 1117 if (stop) {
lypinator 0:bb348c97df44 1118 obj_s->XferOperation = I2C_LAST_FRAME;
lypinator 0:bb348c97df44 1119 } else {
lypinator 0:bb348c97df44 1120 obj_s->XferOperation = I2C_NEXT_FRAME;
lypinator 0:bb348c97df44 1121 }
lypinator 0:bb348c97df44 1122 }
lypinator 0:bb348c97df44 1123
lypinator 0:bb348c97df44 1124 if (tx_length > 0) {
lypinator 0:bb348c97df44 1125 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *)tx, tx_length, obj_s->XferOperation);
lypinator 0:bb348c97df44 1126 }
lypinator 0:bb348c97df44 1127 if (rx_length > 0) {
lypinator 0:bb348c97df44 1128 HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t *)rx, rx_length, obj_s->XferOperation);
lypinator 0:bb348c97df44 1129 }
lypinator 0:bb348c97df44 1130 } else if (tx_length && rx_length) {
lypinator 0:bb348c97df44 1131 /* Two steps operation, don't modify XferOperation, keep it for next step */
lypinator 0:bb348c97df44 1132 // Trick to remove compiler warning "left and right operands are identical" in some cases
lypinator 0:bb348c97df44 1133 uint32_t op1 = I2C_FIRST_AND_LAST_FRAME;
lypinator 0:bb348c97df44 1134 uint32_t op2 = I2C_LAST_FRAME;
lypinator 0:bb348c97df44 1135 if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) {
lypinator 0:bb348c97df44 1136 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *)tx, tx_length, I2C_FIRST_FRAME);
lypinator 0:bb348c97df44 1137 } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) ||
lypinator 0:bb348c97df44 1138 (obj_s->XferOperation == I2C_NEXT_FRAME)) {
lypinator 0:bb348c97df44 1139 HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *)tx, tx_length, I2C_NEXT_FRAME);
lypinator 0:bb348c97df44 1140 }
lypinator 0:bb348c97df44 1141 }
lypinator 0:bb348c97df44 1142 }
lypinator 0:bb348c97df44 1143
lypinator 0:bb348c97df44 1144
lypinator 0:bb348c97df44 1145 uint32_t i2c_irq_handler_asynch(i2c_t *obj)
lypinator 0:bb348c97df44 1146 {
lypinator 0:bb348c97df44 1147
lypinator 0:bb348c97df44 1148 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 1149 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 1150
lypinator 0:bb348c97df44 1151 HAL_I2C_EV_IRQHandler(handle);
lypinator 0:bb348c97df44 1152 HAL_I2C_ER_IRQHandler(handle);
lypinator 0:bb348c97df44 1153
lypinator 0:bb348c97df44 1154 /* Return I2C event status */
lypinator 0:bb348c97df44 1155 return (obj_s->event & obj_s->available_events);
lypinator 0:bb348c97df44 1156 }
lypinator 0:bb348c97df44 1157
lypinator 0:bb348c97df44 1158 uint8_t i2c_active(i2c_t *obj)
lypinator 0:bb348c97df44 1159 {
lypinator 0:bb348c97df44 1160
lypinator 0:bb348c97df44 1161 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 1162 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 1163
lypinator 0:bb348c97df44 1164 if (handle->State == HAL_I2C_STATE_READY) {
lypinator 0:bb348c97df44 1165 return 0;
lypinator 0:bb348c97df44 1166 } else {
lypinator 0:bb348c97df44 1167 return 1;
lypinator 0:bb348c97df44 1168 }
lypinator 0:bb348c97df44 1169 }
lypinator 0:bb348c97df44 1170
lypinator 0:bb348c97df44 1171 void i2c_abort_asynch(i2c_t *obj)
lypinator 0:bb348c97df44 1172 {
lypinator 0:bb348c97df44 1173
lypinator 0:bb348c97df44 1174 struct i2c_s *obj_s = I2C_S(obj);
lypinator 0:bb348c97df44 1175 I2C_HandleTypeDef *handle = &(obj_s->handle);
lypinator 0:bb348c97df44 1176
lypinator 0:bb348c97df44 1177 /* Abort HAL requires DevAddress, but is not used. Use Dummy */
lypinator 0:bb348c97df44 1178 uint16_t Dummy_DevAddress = 0x00;
lypinator 0:bb348c97df44 1179
lypinator 0:bb348c97df44 1180 HAL_I2C_Master_Abort_IT(handle, Dummy_DevAddress);
lypinator 0:bb348c97df44 1181 }
lypinator 0:bb348c97df44 1182
lypinator 0:bb348c97df44 1183 #endif // DEVICE_I2C_ASYNCH
lypinator 0:bb348c97df44 1184
lypinator 0:bb348c97df44 1185 #endif // DEVICE_I2C