Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/gpio_api.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /* mbed Microcontroller Library
lypinator 0:bb348c97df44 2 *******************************************************************************
lypinator 0:bb348c97df44 3 * Copyright (c) 2015, STMicroelectronics
lypinator 0:bb348c97df44 4 * All rights reserved.
lypinator 0:bb348c97df44 5 *
lypinator 0:bb348c97df44 6 * Redistribution and use in source and binary forms, with or without
lypinator 0:bb348c97df44 7 * modification, are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 10 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 12 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 13 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 15 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 16 * without specific prior written permission.
lypinator 0:bb348c97df44 17 *
lypinator 0:bb348c97df44 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 28 *******************************************************************************
lypinator 0:bb348c97df44 29 */
lypinator 0:bb348c97df44 30 #include "mbed_assert.h"
lypinator 0:bb348c97df44 31 #include "gpio_api.h"
lypinator 0:bb348c97df44 32 #include "pinmap.h"
lypinator 0:bb348c97df44 33 #include "mbed_error.h"
lypinator 0:bb348c97df44 34 #include "pin_device.h"
lypinator 0:bb348c97df44 35
lypinator 0:bb348c97df44 36 extern const uint32_t ll_pin_defines[16];
lypinator 0:bb348c97df44 37
lypinator 0:bb348c97df44 38 // Enable GPIO clock and return GPIO base address
lypinator 0:bb348c97df44 39 GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx)
lypinator 0:bb348c97df44 40 {
lypinator 0:bb348c97df44 41 uint32_t gpio_add = 0;
lypinator 0:bb348c97df44 42 switch (port_idx) {
lypinator 0:bb348c97df44 43 case PortA:
lypinator 0:bb348c97df44 44 gpio_add = GPIOA_BASE;
lypinator 0:bb348c97df44 45 __HAL_RCC_GPIOA_CLK_ENABLE();
lypinator 0:bb348c97df44 46 break;
lypinator 0:bb348c97df44 47 case PortB:
lypinator 0:bb348c97df44 48 gpio_add = GPIOB_BASE;
lypinator 0:bb348c97df44 49 __HAL_RCC_GPIOB_CLK_ENABLE();
lypinator 0:bb348c97df44 50 break;
lypinator 0:bb348c97df44 51 #if defined(GPIOC_BASE)
lypinator 0:bb348c97df44 52 case PortC:
lypinator 0:bb348c97df44 53 gpio_add = GPIOC_BASE;
lypinator 0:bb348c97df44 54 __HAL_RCC_GPIOC_CLK_ENABLE();
lypinator 0:bb348c97df44 55 break;
lypinator 0:bb348c97df44 56 #endif
lypinator 0:bb348c97df44 57 #if defined GPIOD_BASE
lypinator 0:bb348c97df44 58 case PortD:
lypinator 0:bb348c97df44 59 gpio_add = GPIOD_BASE;
lypinator 0:bb348c97df44 60 __HAL_RCC_GPIOD_CLK_ENABLE();
lypinator 0:bb348c97df44 61 break;
lypinator 0:bb348c97df44 62 #endif
lypinator 0:bb348c97df44 63 #if defined GPIOE_BASE
lypinator 0:bb348c97df44 64 case PortE:
lypinator 0:bb348c97df44 65 gpio_add = GPIOE_BASE;
lypinator 0:bb348c97df44 66 __HAL_RCC_GPIOE_CLK_ENABLE();
lypinator 0:bb348c97df44 67 break;
lypinator 0:bb348c97df44 68 #endif
lypinator 0:bb348c97df44 69 #if defined GPIOF_BASE
lypinator 0:bb348c97df44 70 case PortF:
lypinator 0:bb348c97df44 71 gpio_add = GPIOF_BASE;
lypinator 0:bb348c97df44 72 __HAL_RCC_GPIOF_CLK_ENABLE();
lypinator 0:bb348c97df44 73 break;
lypinator 0:bb348c97df44 74 #endif
lypinator 0:bb348c97df44 75 #if defined GPIOG_BASE
lypinator 0:bb348c97df44 76 case PortG:
lypinator 0:bb348c97df44 77 #if defined TARGET_STM32L4
lypinator 0:bb348c97df44 78 __HAL_RCC_PWR_CLK_ENABLE();
lypinator 0:bb348c97df44 79 HAL_PWREx_EnableVddIO2();
lypinator 0:bb348c97df44 80 #endif
lypinator 0:bb348c97df44 81 gpio_add = GPIOG_BASE;
lypinator 0:bb348c97df44 82 __HAL_RCC_GPIOG_CLK_ENABLE();
lypinator 0:bb348c97df44 83 break;
lypinator 0:bb348c97df44 84 #endif
lypinator 0:bb348c97df44 85 #if defined GPIOH_BASE
lypinator 0:bb348c97df44 86 case PortH:
lypinator 0:bb348c97df44 87 gpio_add = GPIOH_BASE;
lypinator 0:bb348c97df44 88 __HAL_RCC_GPIOH_CLK_ENABLE();
lypinator 0:bb348c97df44 89 break;
lypinator 0:bb348c97df44 90 #endif
lypinator 0:bb348c97df44 91 #if defined GPIOI_BASE
lypinator 0:bb348c97df44 92 case PortI:
lypinator 0:bb348c97df44 93 gpio_add = GPIOI_BASE;
lypinator 0:bb348c97df44 94 __HAL_RCC_GPIOI_CLK_ENABLE();
lypinator 0:bb348c97df44 95 break;
lypinator 0:bb348c97df44 96 #endif
lypinator 0:bb348c97df44 97 #if defined GPIOJ_BASE
lypinator 0:bb348c97df44 98 case PortJ:
lypinator 0:bb348c97df44 99 gpio_add = GPIOJ_BASE;
lypinator 0:bb348c97df44 100 __HAL_RCC_GPIOJ_CLK_ENABLE();
lypinator 0:bb348c97df44 101 break;
lypinator 0:bb348c97df44 102 #endif
lypinator 0:bb348c97df44 103 #if defined GPIOK_BASE
lypinator 0:bb348c97df44 104 case PortK:
lypinator 0:bb348c97df44 105 gpio_add = GPIOK_BASE;
lypinator 0:bb348c97df44 106 __HAL_RCC_GPIOK_CLK_ENABLE();
lypinator 0:bb348c97df44 107 break;
lypinator 0:bb348c97df44 108 #endif
lypinator 0:bb348c97df44 109 default:
lypinator 0:bb348c97df44 110 error("Pinmap error: wrong port number.");
lypinator 0:bb348c97df44 111 break;
lypinator 0:bb348c97df44 112 }
lypinator 0:bb348c97df44 113 return (GPIO_TypeDef *) gpio_add;
lypinator 0:bb348c97df44 114 }
lypinator 0:bb348c97df44 115
lypinator 0:bb348c97df44 116 uint32_t gpio_set(PinName pin)
lypinator 0:bb348c97df44 117 {
lypinator 0:bb348c97df44 118 MBED_ASSERT(pin != (PinName)NC);
lypinator 0:bb348c97df44 119
lypinator 0:bb348c97df44 120 pin_function(pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
lypinator 0:bb348c97df44 121
lypinator 0:bb348c97df44 122 return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
lypinator 0:bb348c97df44 123 }
lypinator 0:bb348c97df44 124
lypinator 0:bb348c97df44 125
lypinator 0:bb348c97df44 126 void gpio_init(gpio_t *obj, PinName pin)
lypinator 0:bb348c97df44 127 {
lypinator 0:bb348c97df44 128 obj->pin = pin;
lypinator 0:bb348c97df44 129 if (pin == (PinName)NC) {
lypinator 0:bb348c97df44 130 return;
lypinator 0:bb348c97df44 131 }
lypinator 0:bb348c97df44 132
lypinator 0:bb348c97df44 133 uint32_t port_index = STM_PORT(pin);
lypinator 0:bb348c97df44 134
lypinator 0:bb348c97df44 135 // Enable GPIO clock
lypinator 0:bb348c97df44 136 GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
lypinator 0:bb348c97df44 137
lypinator 0:bb348c97df44 138 // Fill GPIO object structure for future use
lypinator 0:bb348c97df44 139 obj->mask = gpio_set(pin);
lypinator 0:bb348c97df44 140 obj->gpio = gpio;
lypinator 0:bb348c97df44 141 obj->ll_pin = ll_pin_defines[STM_PIN(obj->pin)];
lypinator 0:bb348c97df44 142 obj->reg_in = &gpio->IDR;
lypinator 0:bb348c97df44 143 obj->reg_set = &gpio->BSRR;
lypinator 0:bb348c97df44 144 #ifdef GPIO_IP_WITHOUT_BRR
lypinator 0:bb348c97df44 145 obj->reg_clr = &gpio->BSRR;
lypinator 0:bb348c97df44 146 #else
lypinator 0:bb348c97df44 147 obj->reg_clr = &gpio->BRR;
lypinator 0:bb348c97df44 148 #endif
lypinator 0:bb348c97df44 149 }
lypinator 0:bb348c97df44 150
lypinator 0:bb348c97df44 151 void gpio_mode(gpio_t *obj, PinMode mode)
lypinator 0:bb348c97df44 152 {
lypinator 0:bb348c97df44 153 pin_mode(obj->pin, mode);
lypinator 0:bb348c97df44 154 }
lypinator 0:bb348c97df44 155
lypinator 0:bb348c97df44 156 inline void gpio_dir(gpio_t *obj, PinDirection direction)
lypinator 0:bb348c97df44 157 {
lypinator 0:bb348c97df44 158 if (direction == PIN_INPUT) {
lypinator 0:bb348c97df44 159 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_INPUT);
lypinator 0:bb348c97df44 160 } else {
lypinator 0:bb348c97df44 161 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_OUTPUT);
lypinator 0:bb348c97df44 162 }
lypinator 0:bb348c97df44 163 }
lypinator 0:bb348c97df44 164