Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usart.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_ll_usart.c
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief USART LL module driver.
lypinator 0:bb348c97df44 6 ******************************************************************************
lypinator 0:bb348c97df44 7 * @attention
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 10 *
lypinator 0:bb348c97df44 11 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 12 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 13 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 14 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 16 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 17 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 19 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 20 * without specific prior written permission.
lypinator 0:bb348c97df44 21 *
lypinator 0:bb348c97df44 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 32 *
lypinator 0:bb348c97df44 33 ******************************************************************************
lypinator 0:bb348c97df44 34 */
lypinator 0:bb348c97df44 35 #if defined(USE_FULL_LL_DRIVER)
lypinator 0:bb348c97df44 36
lypinator 0:bb348c97df44 37 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 38 #include "stm32f4xx_ll_usart.h"
lypinator 0:bb348c97df44 39 #include "stm32f4xx_ll_rcc.h"
lypinator 0:bb348c97df44 40 #include "stm32f4xx_ll_bus.h"
lypinator 0:bb348c97df44 41 #ifdef USE_FULL_ASSERT
lypinator 0:bb348c97df44 42 #include "stm32_assert.h"
lypinator 0:bb348c97df44 43 #else
lypinator 0:bb348c97df44 44 #define assert_param(expr) ((void)0U)
lypinator 0:bb348c97df44 45 #endif
lypinator 0:bb348c97df44 46
lypinator 0:bb348c97df44 47 /** @addtogroup STM32F4xx_LL_Driver
lypinator 0:bb348c97df44 48 * @{
lypinator 0:bb348c97df44 49 */
lypinator 0:bb348c97df44 50
lypinator 0:bb348c97df44 51 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8) || defined (UART9) || defined (UART10)
lypinator 0:bb348c97df44 52
lypinator 0:bb348c97df44 53 /** @addtogroup USART_LL
lypinator 0:bb348c97df44 54 * @{
lypinator 0:bb348c97df44 55 */
lypinator 0:bb348c97df44 56
lypinator 0:bb348c97df44 57 /* Private types -------------------------------------------------------------*/
lypinator 0:bb348c97df44 58 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 59 /* Private constants ---------------------------------------------------------*/
lypinator 0:bb348c97df44 60 /** @addtogroup USART_LL_Private_Constants
lypinator 0:bb348c97df44 61 * @{
lypinator 0:bb348c97df44 62 */
lypinator 0:bb348c97df44 63
lypinator 0:bb348c97df44 64 /**
lypinator 0:bb348c97df44 65 * @}
lypinator 0:bb348c97df44 66 */
lypinator 0:bb348c97df44 67
lypinator 0:bb348c97df44 68
lypinator 0:bb348c97df44 69 /* Private macros ------------------------------------------------------------*/
lypinator 0:bb348c97df44 70 /** @addtogroup USART_LL_Private_Macros
lypinator 0:bb348c97df44 71 * @{
lypinator 0:bb348c97df44 72 */
lypinator 0:bb348c97df44 73
lypinator 0:bb348c97df44 74 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
lypinator 0:bb348c97df44 75 * divided by the smallest oversampling used on the USART (i.e. 8) */
lypinator 0:bb348c97df44 76 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U)
lypinator 0:bb348c97df44 77
lypinator 0:bb348c97df44 78 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
lypinator 0:bb348c97df44 79 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
lypinator 0:bb348c97df44 80
lypinator 0:bb348c97df44 81 /* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */
lypinator 0:bb348c97df44 82 #define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
lypinator 0:bb348c97df44 83
lypinator 0:bb348c97df44 84 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
lypinator 0:bb348c97df44 85 || ((__VALUE__) == LL_USART_DIRECTION_RX) \
lypinator 0:bb348c97df44 86 || ((__VALUE__) == LL_USART_DIRECTION_TX) \
lypinator 0:bb348c97df44 87 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
lypinator 0:bb348c97df44 88
lypinator 0:bb348c97df44 89 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
lypinator 0:bb348c97df44 90 || ((__VALUE__) == LL_USART_PARITY_EVEN) \
lypinator 0:bb348c97df44 91 || ((__VALUE__) == LL_USART_PARITY_ODD))
lypinator 0:bb348c97df44 92
lypinator 0:bb348c97df44 93 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
lypinator 0:bb348c97df44 94 || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
lypinator 0:bb348c97df44 95
lypinator 0:bb348c97df44 96 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
lypinator 0:bb348c97df44 97 || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
lypinator 0:bb348c97df44 98
lypinator 0:bb348c97df44 99 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
lypinator 0:bb348c97df44 100 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
lypinator 0:bb348c97df44 101
lypinator 0:bb348c97df44 102 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
lypinator 0:bb348c97df44 103 || ((__VALUE__) == LL_USART_PHASE_2EDGE))
lypinator 0:bb348c97df44 104
lypinator 0:bb348c97df44 105 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
lypinator 0:bb348c97df44 106 || ((__VALUE__) == LL_USART_POLARITY_HIGH))
lypinator 0:bb348c97df44 107
lypinator 0:bb348c97df44 108 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
lypinator 0:bb348c97df44 109 || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
lypinator 0:bb348c97df44 110
lypinator 0:bb348c97df44 111 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
lypinator 0:bb348c97df44 112 || ((__VALUE__) == LL_USART_STOPBITS_1) \
lypinator 0:bb348c97df44 113 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
lypinator 0:bb348c97df44 114 || ((__VALUE__) == LL_USART_STOPBITS_2))
lypinator 0:bb348c97df44 115
lypinator 0:bb348c97df44 116 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
lypinator 0:bb348c97df44 117 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
lypinator 0:bb348c97df44 118 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
lypinator 0:bb348c97df44 119 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
lypinator 0:bb348c97df44 120
lypinator 0:bb348c97df44 121 /**
lypinator 0:bb348c97df44 122 * @}
lypinator 0:bb348c97df44 123 */
lypinator 0:bb348c97df44 124
lypinator 0:bb348c97df44 125 /* Private function prototypes -----------------------------------------------*/
lypinator 0:bb348c97df44 126
lypinator 0:bb348c97df44 127 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 128 /** @addtogroup USART_LL_Exported_Functions
lypinator 0:bb348c97df44 129 * @{
lypinator 0:bb348c97df44 130 */
lypinator 0:bb348c97df44 131
lypinator 0:bb348c97df44 132 /** @addtogroup USART_LL_EF_Init
lypinator 0:bb348c97df44 133 * @{
lypinator 0:bb348c97df44 134 */
lypinator 0:bb348c97df44 135
lypinator 0:bb348c97df44 136 /**
lypinator 0:bb348c97df44 137 * @brief De-initialize USART registers (Registers restored to their default values).
lypinator 0:bb348c97df44 138 * @param USARTx USART Instance
lypinator 0:bb348c97df44 139 * @retval An ErrorStatus enumeration value:
lypinator 0:bb348c97df44 140 * - SUCCESS: USART registers are de-initialized
lypinator 0:bb348c97df44 141 * - ERROR: USART registers are not de-initialized
lypinator 0:bb348c97df44 142 */
lypinator 0:bb348c97df44 143 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
lypinator 0:bb348c97df44 144 {
lypinator 0:bb348c97df44 145 ErrorStatus status = SUCCESS;
lypinator 0:bb348c97df44 146
lypinator 0:bb348c97df44 147 /* Check the parameters */
lypinator 0:bb348c97df44 148 assert_param(IS_UART_INSTANCE(USARTx));
lypinator 0:bb348c97df44 149
lypinator 0:bb348c97df44 150 if (USARTx == USART1)
lypinator 0:bb348c97df44 151 {
lypinator 0:bb348c97df44 152 /* Force reset of USART clock */
lypinator 0:bb348c97df44 153 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
lypinator 0:bb348c97df44 154
lypinator 0:bb348c97df44 155 /* Release reset of USART clock */
lypinator 0:bb348c97df44 156 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
lypinator 0:bb348c97df44 157 }
lypinator 0:bb348c97df44 158 else if (USARTx == USART2)
lypinator 0:bb348c97df44 159 {
lypinator 0:bb348c97df44 160 /* Force reset of USART clock */
lypinator 0:bb348c97df44 161 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
lypinator 0:bb348c97df44 162
lypinator 0:bb348c97df44 163 /* Release reset of USART clock */
lypinator 0:bb348c97df44 164 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
lypinator 0:bb348c97df44 165 }
lypinator 0:bb348c97df44 166 #if defined(USART3)
lypinator 0:bb348c97df44 167 else if (USARTx == USART3)
lypinator 0:bb348c97df44 168 {
lypinator 0:bb348c97df44 169 /* Force reset of USART clock */
lypinator 0:bb348c97df44 170 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
lypinator 0:bb348c97df44 171
lypinator 0:bb348c97df44 172 /* Release reset of USART clock */
lypinator 0:bb348c97df44 173 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
lypinator 0:bb348c97df44 174 }
lypinator 0:bb348c97df44 175 #endif /* USART3 */
lypinator 0:bb348c97df44 176 #if defined(USART6)
lypinator 0:bb348c97df44 177 else if (USARTx == USART6)
lypinator 0:bb348c97df44 178 {
lypinator 0:bb348c97df44 179 /* Force reset of USART clock */
lypinator 0:bb348c97df44 180 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
lypinator 0:bb348c97df44 181
lypinator 0:bb348c97df44 182 /* Release reset of USART clock */
lypinator 0:bb348c97df44 183 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
lypinator 0:bb348c97df44 184 }
lypinator 0:bb348c97df44 185 #endif /* USART6 */
lypinator 0:bb348c97df44 186 #if defined(UART4)
lypinator 0:bb348c97df44 187 else if (USARTx == UART4)
lypinator 0:bb348c97df44 188 {
lypinator 0:bb348c97df44 189 /* Force reset of UART clock */
lypinator 0:bb348c97df44 190 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
lypinator 0:bb348c97df44 191
lypinator 0:bb348c97df44 192 /* Release reset of UART clock */
lypinator 0:bb348c97df44 193 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
lypinator 0:bb348c97df44 194 }
lypinator 0:bb348c97df44 195 #endif /* UART4 */
lypinator 0:bb348c97df44 196 #if defined(UART5)
lypinator 0:bb348c97df44 197 else if (USARTx == UART5)
lypinator 0:bb348c97df44 198 {
lypinator 0:bb348c97df44 199 /* Force reset of UART clock */
lypinator 0:bb348c97df44 200 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
lypinator 0:bb348c97df44 201
lypinator 0:bb348c97df44 202 /* Release reset of UART clock */
lypinator 0:bb348c97df44 203 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
lypinator 0:bb348c97df44 204 }
lypinator 0:bb348c97df44 205 #endif /* UART5 */
lypinator 0:bb348c97df44 206 #if defined(UART7)
lypinator 0:bb348c97df44 207 else if (USARTx == UART7)
lypinator 0:bb348c97df44 208 {
lypinator 0:bb348c97df44 209 /* Force reset of UART clock */
lypinator 0:bb348c97df44 210 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
lypinator 0:bb348c97df44 211
lypinator 0:bb348c97df44 212 /* Release reset of UART clock */
lypinator 0:bb348c97df44 213 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
lypinator 0:bb348c97df44 214 }
lypinator 0:bb348c97df44 215 #endif /* UART7 */
lypinator 0:bb348c97df44 216 #if defined(UART8)
lypinator 0:bb348c97df44 217 else if (USARTx == UART8)
lypinator 0:bb348c97df44 218 {
lypinator 0:bb348c97df44 219 /* Force reset of UART clock */
lypinator 0:bb348c97df44 220 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
lypinator 0:bb348c97df44 221
lypinator 0:bb348c97df44 222 /* Release reset of UART clock */
lypinator 0:bb348c97df44 223 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
lypinator 0:bb348c97df44 224 }
lypinator 0:bb348c97df44 225 #endif /* UART8 */
lypinator 0:bb348c97df44 226 #if defined(UART9)
lypinator 0:bb348c97df44 227 else if (USARTx == UART9)
lypinator 0:bb348c97df44 228 {
lypinator 0:bb348c97df44 229 /* Force reset of UART clock */
lypinator 0:bb348c97df44 230 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART9);
lypinator 0:bb348c97df44 231
lypinator 0:bb348c97df44 232 /* Release reset of UART clock */
lypinator 0:bb348c97df44 233 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART9);
lypinator 0:bb348c97df44 234 }
lypinator 0:bb348c97df44 235 #endif /* UART9 */
lypinator 0:bb348c97df44 236 #if defined(UART10)
lypinator 0:bb348c97df44 237 else if (USARTx == UART10)
lypinator 0:bb348c97df44 238 {
lypinator 0:bb348c97df44 239 /* Force reset of UART clock */
lypinator 0:bb348c97df44 240 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART10);
lypinator 0:bb348c97df44 241
lypinator 0:bb348c97df44 242 /* Release reset of UART clock */
lypinator 0:bb348c97df44 243 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART10);
lypinator 0:bb348c97df44 244 }
lypinator 0:bb348c97df44 245 #endif /* UART10 */
lypinator 0:bb348c97df44 246 else
lypinator 0:bb348c97df44 247 {
lypinator 0:bb348c97df44 248 status = ERROR;
lypinator 0:bb348c97df44 249 }
lypinator 0:bb348c97df44 250
lypinator 0:bb348c97df44 251 return (status);
lypinator 0:bb348c97df44 252 }
lypinator 0:bb348c97df44 253
lypinator 0:bb348c97df44 254 /**
lypinator 0:bb348c97df44 255 * @brief Initialize USART registers according to the specified
lypinator 0:bb348c97df44 256 * parameters in USART_InitStruct.
lypinator 0:bb348c97df44 257 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
lypinator 0:bb348c97df44 258 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
lypinator 0:bb348c97df44 259 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
lypinator 0:bb348c97df44 260 * @param USARTx USART Instance
lypinator 0:bb348c97df44 261 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure
lypinator 0:bb348c97df44 262 * that contains the configuration information for the specified USART peripheral.
lypinator 0:bb348c97df44 263 * @retval An ErrorStatus enumeration value:
lypinator 0:bb348c97df44 264 * - SUCCESS: USART registers are initialized according to USART_InitStruct content
lypinator 0:bb348c97df44 265 * - ERROR: Problem occurred during USART Registers initialization
lypinator 0:bb348c97df44 266 */
lypinator 0:bb348c97df44 267 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
lypinator 0:bb348c97df44 268 {
lypinator 0:bb348c97df44 269 ErrorStatus status = ERROR;
lypinator 0:bb348c97df44 270 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
lypinator 0:bb348c97df44 271 LL_RCC_ClocksTypeDef rcc_clocks;
lypinator 0:bb348c97df44 272
lypinator 0:bb348c97df44 273 /* Check the parameters */
lypinator 0:bb348c97df44 274 assert_param(IS_UART_INSTANCE(USARTx));
lypinator 0:bb348c97df44 275 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
lypinator 0:bb348c97df44 276 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
lypinator 0:bb348c97df44 277 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
lypinator 0:bb348c97df44 278 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
lypinator 0:bb348c97df44 279 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
lypinator 0:bb348c97df44 280 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
lypinator 0:bb348c97df44 281 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
lypinator 0:bb348c97df44 282
lypinator 0:bb348c97df44 283 /* USART needs to be in disabled state, in order to be able to configure some bits in
lypinator 0:bb348c97df44 284 CRx registers */
lypinator 0:bb348c97df44 285 if (LL_USART_IsEnabled(USARTx) == 0U)
lypinator 0:bb348c97df44 286 {
lypinator 0:bb348c97df44 287 /*---------------------------- USART CR1 Configuration -----------------------
lypinator 0:bb348c97df44 288 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
lypinator 0:bb348c97df44 289 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
lypinator 0:bb348c97df44 290 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
lypinator 0:bb348c97df44 291 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
lypinator 0:bb348c97df44 292 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
lypinator 0:bb348c97df44 293 */
lypinator 0:bb348c97df44 294 MODIFY_REG(USARTx->CR1,
lypinator 0:bb348c97df44 295 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
lypinator 0:bb348c97df44 296 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
lypinator 0:bb348c97df44 297 (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
lypinator 0:bb348c97df44 298 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
lypinator 0:bb348c97df44 299
lypinator 0:bb348c97df44 300 /*---------------------------- USART CR2 Configuration -----------------------
lypinator 0:bb348c97df44 301 * Configure USARTx CR2 (Stop bits) with parameters:
lypinator 0:bb348c97df44 302 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
lypinator 0:bb348c97df44 303 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
lypinator 0:bb348c97df44 304 */
lypinator 0:bb348c97df44 305 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
lypinator 0:bb348c97df44 306
lypinator 0:bb348c97df44 307 /*---------------------------- USART CR3 Configuration -----------------------
lypinator 0:bb348c97df44 308 * Configure USARTx CR3 (Hardware Flow Control) with parameters:
lypinator 0:bb348c97df44 309 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
lypinator 0:bb348c97df44 310 */
lypinator 0:bb348c97df44 311 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
lypinator 0:bb348c97df44 312
lypinator 0:bb348c97df44 313 /*---------------------------- USART BRR Configuration -----------------------
lypinator 0:bb348c97df44 314 * Retrieve Clock frequency used for USART Peripheral
lypinator 0:bb348c97df44 315 */
lypinator 0:bb348c97df44 316 LL_RCC_GetSystemClocksFreq(&rcc_clocks);
lypinator 0:bb348c97df44 317 if (USARTx == USART1)
lypinator 0:bb348c97df44 318 {
lypinator 0:bb348c97df44 319 periphclk = rcc_clocks.PCLK2_Frequency;
lypinator 0:bb348c97df44 320 }
lypinator 0:bb348c97df44 321 else if (USARTx == USART2)
lypinator 0:bb348c97df44 322 {
lypinator 0:bb348c97df44 323 periphclk = rcc_clocks.PCLK1_Frequency;
lypinator 0:bb348c97df44 324 }
lypinator 0:bb348c97df44 325 #if defined(USART3)
lypinator 0:bb348c97df44 326 else if (USARTx == USART3)
lypinator 0:bb348c97df44 327 {
lypinator 0:bb348c97df44 328 periphclk = rcc_clocks.PCLK1_Frequency;
lypinator 0:bb348c97df44 329 }
lypinator 0:bb348c97df44 330 #endif /* USART3 */
lypinator 0:bb348c97df44 331 #if defined(USART6)
lypinator 0:bb348c97df44 332 else if (USARTx == USART6)
lypinator 0:bb348c97df44 333 {
lypinator 0:bb348c97df44 334 periphclk = rcc_clocks.PCLK2_Frequency;
lypinator 0:bb348c97df44 335 }
lypinator 0:bb348c97df44 336 #endif /* USART6 */
lypinator 0:bb348c97df44 337 #if defined(UART4)
lypinator 0:bb348c97df44 338 else if (USARTx == UART4)
lypinator 0:bb348c97df44 339 {
lypinator 0:bb348c97df44 340 periphclk = rcc_clocks.PCLK1_Frequency;
lypinator 0:bb348c97df44 341 }
lypinator 0:bb348c97df44 342 #endif /* UART4 */
lypinator 0:bb348c97df44 343 #if defined(UART5)
lypinator 0:bb348c97df44 344 else if (USARTx == UART5)
lypinator 0:bb348c97df44 345 {
lypinator 0:bb348c97df44 346 periphclk = rcc_clocks.PCLK1_Frequency;
lypinator 0:bb348c97df44 347 }
lypinator 0:bb348c97df44 348 #endif /* UART5 */
lypinator 0:bb348c97df44 349 #if defined(UART7)
lypinator 0:bb348c97df44 350 else if (USARTx == UART7)
lypinator 0:bb348c97df44 351 {
lypinator 0:bb348c97df44 352 periphclk = rcc_clocks.PCLK1_Frequency;
lypinator 0:bb348c97df44 353 }
lypinator 0:bb348c97df44 354 #endif /* UART7 */
lypinator 0:bb348c97df44 355 #if defined(UART8)
lypinator 0:bb348c97df44 356 else if (USARTx == UART8)
lypinator 0:bb348c97df44 357 {
lypinator 0:bb348c97df44 358 periphclk = rcc_clocks.PCLK1_Frequency;
lypinator 0:bb348c97df44 359 }
lypinator 0:bb348c97df44 360 #endif /* UART8 */
lypinator 0:bb348c97df44 361 #if defined(UART9)
lypinator 0:bb348c97df44 362 else if (USARTx == UART9)
lypinator 0:bb348c97df44 363 {
lypinator 0:bb348c97df44 364 periphclk = rcc_clocks.PCLK1_Frequency;
lypinator 0:bb348c97df44 365 }
lypinator 0:bb348c97df44 366 #endif /* UART9 */
lypinator 0:bb348c97df44 367 #if defined(UART10)
lypinator 0:bb348c97df44 368 else if (USARTx == UART10)
lypinator 0:bb348c97df44 369 {
lypinator 0:bb348c97df44 370 periphclk = rcc_clocks.PCLK1_Frequency;
lypinator 0:bb348c97df44 371 }
lypinator 0:bb348c97df44 372 #endif /* UART10 */
lypinator 0:bb348c97df44 373 else
lypinator 0:bb348c97df44 374 {
lypinator 0:bb348c97df44 375 /* Nothing to do, as error code is already assigned to ERROR value */
lypinator 0:bb348c97df44 376 }
lypinator 0:bb348c97df44 377
lypinator 0:bb348c97df44 378 /* Configure the USART Baud Rate :
lypinator 0:bb348c97df44 379 - valid baud rate value (different from 0) is required
lypinator 0:bb348c97df44 380 - Peripheral clock as returned by RCC service, should be valid (different from 0).
lypinator 0:bb348c97df44 381 */
lypinator 0:bb348c97df44 382 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
lypinator 0:bb348c97df44 383 && (USART_InitStruct->BaudRate != 0U))
lypinator 0:bb348c97df44 384 {
lypinator 0:bb348c97df44 385 status = SUCCESS;
lypinator 0:bb348c97df44 386 LL_USART_SetBaudRate(USARTx,
lypinator 0:bb348c97df44 387 periphclk,
lypinator 0:bb348c97df44 388 USART_InitStruct->OverSampling,
lypinator 0:bb348c97df44 389 USART_InitStruct->BaudRate);
lypinator 0:bb348c97df44 390
lypinator 0:bb348c97df44 391 /* Check BRR is greater than or equal to 16d */
lypinator 0:bb348c97df44 392 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
lypinator 0:bb348c97df44 393
lypinator 0:bb348c97df44 394 /* Check BRR is greater than or equal to 16d */
lypinator 0:bb348c97df44 395 assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR));
lypinator 0:bb348c97df44 396 }
lypinator 0:bb348c97df44 397 }
lypinator 0:bb348c97df44 398 /* Endif (=> USART not in Disabled state => return ERROR) */
lypinator 0:bb348c97df44 399
lypinator 0:bb348c97df44 400 return (status);
lypinator 0:bb348c97df44 401 }
lypinator 0:bb348c97df44 402
lypinator 0:bb348c97df44 403 /**
lypinator 0:bb348c97df44 404 * @brief Set each @ref LL_USART_InitTypeDef field to default value.
lypinator 0:bb348c97df44 405 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
lypinator 0:bb348c97df44 406 * whose fields will be set to default values.
lypinator 0:bb348c97df44 407 * @retval None
lypinator 0:bb348c97df44 408 */
lypinator 0:bb348c97df44 409
lypinator 0:bb348c97df44 410 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
lypinator 0:bb348c97df44 411 {
lypinator 0:bb348c97df44 412 /* Set USART_InitStruct fields to default values */
lypinator 0:bb348c97df44 413 USART_InitStruct->BaudRate = 9600U;
lypinator 0:bb348c97df44 414 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B;
lypinator 0:bb348c97df44 415 USART_InitStruct->StopBits = LL_USART_STOPBITS_1;
lypinator 0:bb348c97df44 416 USART_InitStruct->Parity = LL_USART_PARITY_NONE ;
lypinator 0:bb348c97df44 417 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX;
lypinator 0:bb348c97df44 418 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
lypinator 0:bb348c97df44 419 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16;
lypinator 0:bb348c97df44 420 }
lypinator 0:bb348c97df44 421
lypinator 0:bb348c97df44 422 /**
lypinator 0:bb348c97df44 423 * @brief Initialize USART Clock related settings according to the
lypinator 0:bb348c97df44 424 * specified parameters in the USART_ClockInitStruct.
lypinator 0:bb348c97df44 425 * @note As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
lypinator 0:bb348c97df44 426 * USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
lypinator 0:bb348c97df44 427 * @param USARTx USART Instance
lypinator 0:bb348c97df44 428 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
lypinator 0:bb348c97df44 429 * that contains the Clock configuration information for the specified USART peripheral.
lypinator 0:bb348c97df44 430 * @retval An ErrorStatus enumeration value:
lypinator 0:bb348c97df44 431 * - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
lypinator 0:bb348c97df44 432 * - ERROR: Problem occurred during USART Registers initialization
lypinator 0:bb348c97df44 433 */
lypinator 0:bb348c97df44 434 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
lypinator 0:bb348c97df44 435 {
lypinator 0:bb348c97df44 436 ErrorStatus status = SUCCESS;
lypinator 0:bb348c97df44 437
lypinator 0:bb348c97df44 438 /* Check USART Instance and Clock signal output parameters */
lypinator 0:bb348c97df44 439 assert_param(IS_UART_INSTANCE(USARTx));
lypinator 0:bb348c97df44 440 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
lypinator 0:bb348c97df44 441
lypinator 0:bb348c97df44 442 /* USART needs to be in disabled state, in order to be able to configure some bits in
lypinator 0:bb348c97df44 443 CRx registers */
lypinator 0:bb348c97df44 444 if (LL_USART_IsEnabled(USARTx) == 0U)
lypinator 0:bb348c97df44 445 {
lypinator 0:bb348c97df44 446 /*---------------------------- USART CR2 Configuration -----------------------*/
lypinator 0:bb348c97df44 447 /* If Clock signal has to be output */
lypinator 0:bb348c97df44 448 if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
lypinator 0:bb348c97df44 449 {
lypinator 0:bb348c97df44 450 /* Deactivate Clock signal delivery :
lypinator 0:bb348c97df44 451 * - Disable Clock Output: USART_CR2_CLKEN cleared
lypinator 0:bb348c97df44 452 */
lypinator 0:bb348c97df44 453 LL_USART_DisableSCLKOutput(USARTx);
lypinator 0:bb348c97df44 454 }
lypinator 0:bb348c97df44 455 else
lypinator 0:bb348c97df44 456 {
lypinator 0:bb348c97df44 457 /* Ensure USART instance is USART capable */
lypinator 0:bb348c97df44 458 assert_param(IS_USART_INSTANCE(USARTx));
lypinator 0:bb348c97df44 459
lypinator 0:bb348c97df44 460 /* Check clock related parameters */
lypinator 0:bb348c97df44 461 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
lypinator 0:bb348c97df44 462 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
lypinator 0:bb348c97df44 463 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
lypinator 0:bb348c97df44 464
lypinator 0:bb348c97df44 465 /*---------------------------- USART CR2 Configuration -----------------------
lypinator 0:bb348c97df44 466 * Configure USARTx CR2 (Clock signal related bits) with parameters:
lypinator 0:bb348c97df44 467 * - Enable Clock Output: USART_CR2_CLKEN set
lypinator 0:bb348c97df44 468 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
lypinator 0:bb348c97df44 469 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
lypinator 0:bb348c97df44 470 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
lypinator 0:bb348c97df44 471 */
lypinator 0:bb348c97df44 472 MODIFY_REG(USARTx->CR2,
lypinator 0:bb348c97df44 473 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
lypinator 0:bb348c97df44 474 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
lypinator 0:bb348c97df44 475 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
lypinator 0:bb348c97df44 476 }
lypinator 0:bb348c97df44 477 }
lypinator 0:bb348c97df44 478 /* Else (USART not in Disabled state => return ERROR */
lypinator 0:bb348c97df44 479 else
lypinator 0:bb348c97df44 480 {
lypinator 0:bb348c97df44 481 status = ERROR;
lypinator 0:bb348c97df44 482 }
lypinator 0:bb348c97df44 483
lypinator 0:bb348c97df44 484 return (status);
lypinator 0:bb348c97df44 485 }
lypinator 0:bb348c97df44 486
lypinator 0:bb348c97df44 487 /**
lypinator 0:bb348c97df44 488 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
lypinator 0:bb348c97df44 489 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
lypinator 0:bb348c97df44 490 * whose fields will be set to default values.
lypinator 0:bb348c97df44 491 * @retval None
lypinator 0:bb348c97df44 492 */
lypinator 0:bb348c97df44 493 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
lypinator 0:bb348c97df44 494 {
lypinator 0:bb348c97df44 495 /* Set LL_USART_ClockInitStruct fields with default values */
lypinator 0:bb348c97df44 496 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE;
lypinator 0:bb348c97df44 497 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
lypinator 0:bb348c97df44 498 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
lypinator 0:bb348c97df44 499 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
lypinator 0:bb348c97df44 500 }
lypinator 0:bb348c97df44 501
lypinator 0:bb348c97df44 502 /**
lypinator 0:bb348c97df44 503 * @}
lypinator 0:bb348c97df44 504 */
lypinator 0:bb348c97df44 505
lypinator 0:bb348c97df44 506 /**
lypinator 0:bb348c97df44 507 * @}
lypinator 0:bb348c97df44 508 */
lypinator 0:bb348c97df44 509
lypinator 0:bb348c97df44 510 /**
lypinator 0:bb348c97df44 511 * @}
lypinator 0:bb348c97df44 512 */
lypinator 0:bb348c97df44 513
lypinator 0:bb348c97df44 514 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 || UART9 || UART10 */
lypinator 0:bb348c97df44 515
lypinator 0:bb348c97df44 516 /**
lypinator 0:bb348c97df44 517 * @}
lypinator 0:bb348c97df44 518 */
lypinator 0:bb348c97df44 519
lypinator 0:bb348c97df44 520 #endif /* USE_FULL_LL_DRIVER */
lypinator 0:bb348c97df44 521
lypinator 0:bb348c97df44 522 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
lypinator 0:bb348c97df44 523