DevLibMemoryController - Initial commit

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Initial commit

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_dac.h@0:bb348c97df44, 2020-09-16 (annotated)

Committer:: lypinator
Date:: Wed Sep 16 01:11:49 2020 +0000
Revision:: 0:bb348c97df44

Added PWM

Who changed what in which revision?

User	Revision	Line number	New contents of line
lypinator	0:bb348c97df44	1	/**
lypinator	0:bb348c97df44	2	******************************************************************************
lypinator	0:bb348c97df44	3	* @file stm32f4xx_ll_dac.h
lypinator	0:bb348c97df44	4	* @author MCD Application Team
lypinator	0:bb348c97df44	5	* @brief Header file of DAC LL module.
lypinator	0:bb348c97df44	6	******************************************************************************
lypinator	0:bb348c97df44	7	* @attention
lypinator	0:bb348c97df44	8	*
lypinator	0:bb348c97df44	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator	0:bb348c97df44	10	*
lypinator	0:bb348c97df44	11	* Redistribution and use in source and binary forms, with or without modification,
lypinator	0:bb348c97df44	12	* are permitted provided that the following conditions are met:
lypinator	0:bb348c97df44	13	* 1. Redistributions of source code must retain the above copyright notice,
lypinator	0:bb348c97df44	14	* this list of conditions and the following disclaimer.
lypinator	0:bb348c97df44	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator	0:bb348c97df44	16	* this list of conditions and the following disclaimer in the documentation
lypinator	0:bb348c97df44	17	* and/or other materials provided with the distribution.
lypinator	0:bb348c97df44	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator	0:bb348c97df44	19	* may be used to endorse or promote products derived from this software
lypinator	0:bb348c97df44	20	* without specific prior written permission.
lypinator	0:bb348c97df44	21	*
lypinator	0:bb348c97df44	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator	0:bb348c97df44	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator	0:bb348c97df44	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator	0:bb348c97df44	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator	0:bb348c97df44	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator	0:bb348c97df44	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator	0:bb348c97df44	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator	0:bb348c97df44	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator	0:bb348c97df44	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator	0:bb348c97df44	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator	0:bb348c97df44	32	*
lypinator	0:bb348c97df44	33	******************************************************************************
lypinator	0:bb348c97df44	34	*/
lypinator	0:bb348c97df44	35
lypinator	0:bb348c97df44	36	/* Define to prevent recursive inclusion -------------------------------------*/
lypinator	0:bb348c97df44	37	#ifndef __STM32F4xx_LL_DAC_H
lypinator	0:bb348c97df44	38	#define __STM32F4xx_LL_DAC_H
lypinator	0:bb348c97df44	39
lypinator	0:bb348c97df44	40	#ifdef __cplusplus
lypinator	0:bb348c97df44	41	extern "C" {
lypinator	0:bb348c97df44	42	#endif
lypinator	0:bb348c97df44	43
lypinator	0:bb348c97df44	44	/* Includes ------------------------------------------------------------------*/
lypinator	0:bb348c97df44	45	#include "stm32f4xx.h"
lypinator	0:bb348c97df44	46
lypinator	0:bb348c97df44	47	/** @addtogroup STM32F4xx_LL_Driver
lypinator	0:bb348c97df44	48	* @{
lypinator	0:bb348c97df44	49	*/
lypinator	0:bb348c97df44	50
lypinator	0:bb348c97df44	51	#if defined(DAC)
lypinator	0:bb348c97df44	52
lypinator	0:bb348c97df44	53	/** @defgroup DAC_LL DAC
lypinator	0:bb348c97df44	54	* @{
lypinator	0:bb348c97df44	55	*/
lypinator	0:bb348c97df44	56
lypinator	0:bb348c97df44	57	/* Private types -------------------------------------------------------------*/
lypinator	0:bb348c97df44	58	/* Private variables ---------------------------------------------------------*/
lypinator	0:bb348c97df44	59
lypinator	0:bb348c97df44	60	/* Private constants ---------------------------------------------------------*/
lypinator	0:bb348c97df44	61	/** @defgroup DAC_LL_Private_Constants DAC Private Constants
lypinator	0:bb348c97df44	62	* @{
lypinator	0:bb348c97df44	63	*/
lypinator	0:bb348c97df44	64
lypinator	0:bb348c97df44	65	/* Internal masks for DAC channels definition */
lypinator	0:bb348c97df44	66	/* To select into literal LL_DAC_CHANNEL_x the relevant bits for: */
lypinator	0:bb348c97df44	67	/* - channel bits position into register CR */
lypinator	0:bb348c97df44	68	/* - channel bits position into register SWTRIG */
lypinator	0:bb348c97df44	69	/* - channel register offset of data holding register DHRx */
lypinator	0:bb348c97df44	70	/* - channel register offset of data output register DORx */
lypinator	0:bb348c97df44	71	#define DAC_CR_CH1_BITOFFSET 0U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 1 */
lypinator	0:bb348c97df44	72	#define DAC_CR_CH2_BITOFFSET 16U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 2 */
lypinator	0:bb348c97df44	73	#define DAC_CR_CHX_BITOFFSET_MASK (DAC_CR_CH1_BITOFFSET \| DAC_CR_CH2_BITOFFSET)
lypinator	0:bb348c97df44	74
lypinator	0:bb348c97df44	75	#define DAC_SWTR_CH1 (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
lypinator	0:bb348c97df44	76	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	77	#define DAC_SWTR_CH2 (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
lypinator	0:bb348c97df44	78	#define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1 \| DAC_SWTR_CH2)
lypinator	0:bb348c97df44	79	#else
lypinator	0:bb348c97df44	80	#define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1)
lypinator	0:bb348c97df44	81	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	82
lypinator	0:bb348c97df44	83	#define DAC_REG_DHR12R1_REGOFFSET 0x00000000U /* Register DHR12Rx channel 1 taken as reference */
lypinator	0:bb348c97df44	84	#define DAC_REG_DHR12L1_REGOFFSET 0x00100000U /* Register offset of DHR12Lx channel 1 versus DHR12Rx channel 1 (shifted left of 20 bits) */
lypinator	0:bb348c97df44	85	#define DAC_REG_DHR8R1_REGOFFSET 0x02000000U /* Register offset of DHR8Rx channel 1 versus DHR12Rx channel 1 (shifted left of 24 bits) */
lypinator	0:bb348c97df44	86	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	87	#define DAC_REG_DHR12R2_REGOFFSET 0x00030000U /* Register offset of DHR12Rx channel 2 versus DHR12Rx channel 1 (shifted left of 16 bits) */
lypinator	0:bb348c97df44	88	#define DAC_REG_DHR12L2_REGOFFSET 0x00400000U /* Register offset of DHR12Lx channel 2 versus DHR12Rx channel 1 (shifted left of 20 bits) */
lypinator	0:bb348c97df44	89	#define DAC_REG_DHR8R2_REGOFFSET 0x05000000U /* Register offset of DHR8Rx channel 2 versus DHR12Rx channel 1 (shifted left of 24 bits) */
lypinator	0:bb348c97df44	90	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	91	#define DAC_REG_DHR12RX_REGOFFSET_MASK 0x000F0000U
lypinator	0:bb348c97df44	92	#define DAC_REG_DHR12LX_REGOFFSET_MASK 0x00F00000U
lypinator	0:bb348c97df44	93	#define DAC_REG_DHR8RX_REGOFFSET_MASK 0x0F000000U
lypinator	0:bb348c97df44	94	#define DAC_REG_DHRX_REGOFFSET_MASK (DAC_REG_DHR12RX_REGOFFSET_MASK \| DAC_REG_DHR12LX_REGOFFSET_MASK \| DAC_REG_DHR8RX_REGOFFSET_MASK)
lypinator	0:bb348c97df44	95
lypinator	0:bb348c97df44	96	#define DAC_REG_DOR1_REGOFFSET 0x00000000U /* Register DORx channel 1 taken as reference */
lypinator	0:bb348c97df44	97	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	98	#define DAC_REG_DOR2_REGOFFSET 0x10000000U /* Register offset of DORx channel 1 versus DORx channel 2 (shifted left of 28 bits) */
lypinator	0:bb348c97df44	99	#define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET \| DAC_REG_DOR2_REGOFFSET)
lypinator	0:bb348c97df44	100	#else
lypinator	0:bb348c97df44	101	#define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET)
lypinator	0:bb348c97df44	102	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	103
lypinator	0:bb348c97df44	104	/* DAC registers bits positions */
lypinator	0:bb348c97df44	105	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	106	#define DAC_DHR12RD_DACC2DHR_BITOFFSET_POS 16U /* Value equivalent to POSITION_VAL(DAC_DHR12RD_DACC2DHR) */
lypinator	0:bb348c97df44	107	#define DAC_DHR12LD_DACC2DHR_BITOFFSET_POS 20U /* Value equivalent to POSITION_VAL(DAC_DHR12LD_DACC2DHR) */
lypinator	0:bb348c97df44	108	#define DAC_DHR8RD_DACC2DHR_BITOFFSET_POS 8U /* Value equivalent to POSITION_VAL(DAC_DHR8RD_DACC2DHR) */
lypinator	0:bb348c97df44	109	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	110
lypinator	0:bb348c97df44	111	/* Miscellaneous data */
lypinator	0:bb348c97df44	112	#define DAC_DIGITAL_SCALE_12BITS 4095U /* Full-scale digital value with a resolution of 12 bits (voltage range determined by analog voltage references Vref+ and Vref-, refer to reference manual) */
lypinator	0:bb348c97df44	113
lypinator	0:bb348c97df44	114	/**
lypinator	0:bb348c97df44	115	* @}
lypinator	0:bb348c97df44	116	*/
lypinator	0:bb348c97df44	117
lypinator	0:bb348c97df44	118
lypinator	0:bb348c97df44	119	/* Private macros ------------------------------------------------------------*/
lypinator	0:bb348c97df44	120	/** @defgroup DAC_LL_Private_Macros DAC Private Macros
lypinator	0:bb348c97df44	121	* @{
lypinator	0:bb348c97df44	122	*/
lypinator	0:bb348c97df44	123
lypinator	0:bb348c97df44	124	/**
lypinator	0:bb348c97df44	125	* @brief Driver macro reserved for internal use: isolate bits with the
lypinator	0:bb348c97df44	126	* selected mask and shift them to the register LSB
lypinator	0:bb348c97df44	127	* (shift mask on register position bit 0).
lypinator	0:bb348c97df44	128	* @param __BITS__ Bits in register 32 bits
lypinator	0:bb348c97df44	129	* @param __MASK__ Mask in register 32 bits
lypinator	0:bb348c97df44	130	* @retval Bits in register 32 bits
lypinator	0:bb348c97df44	131	*/
lypinator	0:bb348c97df44	132	#define __DAC_MASK_SHIFT(__BITS__, __MASK__) \
lypinator	0:bb348c97df44	133	(((__BITS__) & (__MASK__)) >> POSITION_VAL((__MASK__)))
lypinator	0:bb348c97df44	134
lypinator	0:bb348c97df44	135	/**
lypinator	0:bb348c97df44	136	* @brief Driver macro reserved for internal use: set a pointer to
lypinator	0:bb348c97df44	137	* a register from a register basis from which an offset
lypinator	0:bb348c97df44	138	* is applied.
lypinator	0:bb348c97df44	139	* @param __REG__ Register basis from which the offset is applied.
lypinator	0:bb348c97df44	140	* @param __REG_OFFFSET__ Offset to be applied (unit number of registers).
lypinator	0:bb348c97df44	141	* @retval Pointer to register address
lypinator	0:bb348c97df44	142	*/
lypinator	0:bb348c97df44	143	#define __DAC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \
lypinator	0:bb348c97df44	144	((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2U))))
lypinator	0:bb348c97df44	145
lypinator	0:bb348c97df44	146	/**
lypinator	0:bb348c97df44	147	* @}
lypinator	0:bb348c97df44	148	*/
lypinator	0:bb348c97df44	149
lypinator	0:bb348c97df44	150
lypinator	0:bb348c97df44	151	/* Exported types ------------------------------------------------------------*/
lypinator	0:bb348c97df44	152	#if defined(USE_FULL_LL_DRIVER)
lypinator	0:bb348c97df44	153	/** @defgroup DAC_LL_ES_INIT DAC Exported Init structure
lypinator	0:bb348c97df44	154	* @{
lypinator	0:bb348c97df44	155	*/
lypinator	0:bb348c97df44	156
lypinator	0:bb348c97df44	157	/**
lypinator	0:bb348c97df44	158	* @brief Structure definition of some features of DAC instance.
lypinator	0:bb348c97df44	159	*/
lypinator	0:bb348c97df44	160	typedef struct
lypinator	0:bb348c97df44	161	{
lypinator	0:bb348c97df44	162	uint32_t TriggerSource; /*!< Set the conversion trigger source for the selected DAC channel: internal (SW start) or from external IP (timer event, external interrupt line).
lypinator	0:bb348c97df44	163	This parameter can be a value of @ref DAC_LL_EC_TRIGGER_SOURCE
lypinator	0:bb348c97df44	164
lypinator	0:bb348c97df44	165	This feature can be modified afterwards using unitary function @ref LL_DAC_SetTriggerSource(). */
lypinator	0:bb348c97df44	166
lypinator	0:bb348c97df44	167	uint32_t WaveAutoGeneration; /*!< Set the waveform automatic generation mode for the selected DAC channel.
lypinator	0:bb348c97df44	168	This parameter can be a value of @ref DAC_LL_EC_WAVE_AUTO_GENERATION_MODE
lypinator	0:bb348c97df44	169
lypinator	0:bb348c97df44	170	This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveAutoGeneration(). */
lypinator	0:bb348c97df44	171
lypinator	0:bb348c97df44	172	uint32_t WaveAutoGenerationConfig; /*!< Set the waveform automatic generation mode for the selected DAC channel.
lypinator	0:bb348c97df44	173	If waveform automatic generation mode is set to noise, this parameter can be a value of @ref DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS
lypinator	0:bb348c97df44	174	If waveform automatic generation mode is set to triangle, this parameter can be a value of @ref DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE
lypinator	0:bb348c97df44	175	@note If waveform automatic generation mode is disabled, this parameter is discarded.
lypinator	0:bb348c97df44	176
lypinator	0:bb348c97df44	177	This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveNoiseLFSR() or @ref LL_DAC_SetWaveTriangleAmplitude(), depending on the wave automatic generation selected. */
lypinator	0:bb348c97df44	178
lypinator	0:bb348c97df44	179	uint32_t OutputBuffer; /*!< Set the output buffer for the selected DAC channel.
lypinator	0:bb348c97df44	180	This parameter can be a value of @ref DAC_LL_EC_OUTPUT_BUFFER
lypinator	0:bb348c97df44	181
lypinator	0:bb348c97df44	182	This feature can be modified afterwards using unitary function @ref LL_DAC_SetOutputBuffer(). */
lypinator	0:bb348c97df44	183
lypinator	0:bb348c97df44	184	} LL_DAC_InitTypeDef;
lypinator	0:bb348c97df44	185
lypinator	0:bb348c97df44	186	/**
lypinator	0:bb348c97df44	187	* @}
lypinator	0:bb348c97df44	188	*/
lypinator	0:bb348c97df44	189	#endif /* USE_FULL_LL_DRIVER */
lypinator	0:bb348c97df44	190
lypinator	0:bb348c97df44	191	/* Exported constants --------------------------------------------------------*/
lypinator	0:bb348c97df44	192	/** @defgroup DAC_LL_Exported_Constants DAC Exported Constants
lypinator	0:bb348c97df44	193	* @{
lypinator	0:bb348c97df44	194	*/
lypinator	0:bb348c97df44	195
lypinator	0:bb348c97df44	196	/** @defgroup DAC_LL_EC_GET_FLAG DAC flags
lypinator	0:bb348c97df44	197	* @brief Flags defines which can be used with LL_DAC_ReadReg function
lypinator	0:bb348c97df44	198	* @{
lypinator	0:bb348c97df44	199	*/
lypinator	0:bb348c97df44	200	/* DAC channel 1 flags */
lypinator	0:bb348c97df44	201	#define LL_DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) /!< DAC channel 1 flag DMA underrun /
lypinator	0:bb348c97df44	202
lypinator	0:bb348c97df44	203	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	204	/* DAC channel 2 flags */
lypinator	0:bb348c97df44	205	#define LL_DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) /!< DAC channel 2 flag DMA underrun /
lypinator	0:bb348c97df44	206	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	207	/**
lypinator	0:bb348c97df44	208	* @}
lypinator	0:bb348c97df44	209	*/
lypinator	0:bb348c97df44	210
lypinator	0:bb348c97df44	211	/** @defgroup DAC_LL_EC_IT DAC interruptions
lypinator	0:bb348c97df44	212	* @brief IT defines which can be used with LL_DAC_ReadReg and LL_DAC_WriteReg functions
lypinator	0:bb348c97df44	213	* @{
lypinator	0:bb348c97df44	214	*/
lypinator	0:bb348c97df44	215	#define LL_DAC_IT_DMAUDRIE1 (DAC_CR_DMAUDRIE1) /!< DAC channel 1 interruption DMA underrun /
lypinator	0:bb348c97df44	216	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	217	#define LL_DAC_IT_DMAUDRIE2 (DAC_CR_DMAUDRIE2) /!< DAC channel 2 interruption DMA underrun /
lypinator	0:bb348c97df44	218	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	219	/**
lypinator	0:bb348c97df44	220	* @}
lypinator	0:bb348c97df44	221	*/
lypinator	0:bb348c97df44	222
lypinator	0:bb348c97df44	223	/** @defgroup DAC_LL_EC_CHANNEL DAC channels
lypinator	0:bb348c97df44	224	* @{
lypinator	0:bb348c97df44	225	*/
lypinator	0:bb348c97df44	226	#define LL_DAC_CHANNEL_1 (DAC_REG_DOR1_REGOFFSET \| DAC_REG_DHR12R1_REGOFFSET \| DAC_REG_DHR12L1_REGOFFSET \| DAC_REG_DHR8R1_REGOFFSET \| DAC_CR_CH1_BITOFFSET \| DAC_SWTR_CH1) /!< DAC channel 1 /
lypinator	0:bb348c97df44	227	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	228	#define LL_DAC_CHANNEL_2 (DAC_REG_DOR2_REGOFFSET \| DAC_REG_DHR12R2_REGOFFSET \| DAC_REG_DHR12L2_REGOFFSET \| DAC_REG_DHR8R2_REGOFFSET \| DAC_CR_CH2_BITOFFSET \| DAC_SWTR_CH2) /!< DAC channel 2 /
lypinator	0:bb348c97df44	229	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	230	/**
lypinator	0:bb348c97df44	231	* @}
lypinator	0:bb348c97df44	232	*/
lypinator	0:bb348c97df44	233
lypinator	0:bb348c97df44	234	/** @defgroup DAC_LL_EC_TRIGGER_SOURCE DAC trigger source
lypinator	0:bb348c97df44	235	* @{
lypinator	0:bb348c97df44	236	*/
lypinator	0:bb348c97df44	237	#define LL_DAC_TRIG_SOFTWARE (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_1 \| DAC_CR_TSEL1_0) /!< DAC channel conversion trigger internal (SW start) /
lypinator	0:bb348c97df44	238	#define LL_DAC_TRIG_EXT_TIM2_TRGO (DAC_CR_TSEL1_2 ) /!< DAC channel conversion trigger from external IP: TIM2 TRGO. /
lypinator	0:bb348c97df44	239	#define LL_DAC_TRIG_EXT_TIM8_TRGO ( DAC_CR_TSEL1_0) /!< DAC channel conversion trigger from external IP: TIM8 TRGO. /
lypinator	0:bb348c97df44	240	#define LL_DAC_TRIG_EXT_TIM4_TRGO (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_0) /!< DAC channel conversion trigger from external IP: TIM4 TRGO. /
lypinator	0:bb348c97df44	241	#define LL_DAC_TRIG_EXT_TIM6_TRGO 0x00000000U /!< DAC channel conversion trigger from external IP: TIM6 TRGO. /
lypinator	0:bb348c97df44	242	#define LL_DAC_TRIG_EXT_TIM7_TRGO ( DAC_CR_TSEL1_1 ) /!< DAC channel conversion trigger from external IP: TIM7 TRGO. /
lypinator	0:bb348c97df44	243	#define LL_DAC_TRIG_EXT_TIM5_TRGO ( DAC_CR_TSEL1_1 \| DAC_CR_TSEL1_0) /!< DAC channel conversion trigger from external IP: TIM5 TRGO. /
lypinator	0:bb348c97df44	244	#define LL_DAC_TRIG_EXT_EXTI_LINE9 (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_1 ) /!< DAC channel conversion trigger from external IP: external interrupt line 9. /
lypinator	0:bb348c97df44	245	/**
lypinator	0:bb348c97df44	246	* @}
lypinator	0:bb348c97df44	247	*/
lypinator	0:bb348c97df44	248
lypinator	0:bb348c97df44	249	/** @defgroup DAC_LL_EC_WAVE_AUTO_GENERATION_MODE DAC waveform automatic generation mode
lypinator	0:bb348c97df44	250	* @{
lypinator	0:bb348c97df44	251	*/
lypinator	0:bb348c97df44	252	#define LL_DAC_WAVE_AUTO_GENERATION_NONE 0x00000000U /!< DAC channel wave auto generation mode disabled. /
lypinator	0:bb348c97df44	253	#define LL_DAC_WAVE_AUTO_GENERATION_NOISE (DAC_CR_WAVE1_0) /!< DAC channel wave auto generation mode enabled, set generated noise waveform. /
lypinator	0:bb348c97df44	254	#define LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE (DAC_CR_WAVE1_1) /!< DAC channel wave auto generation mode enabled, set generated triangle waveform. /
lypinator	0:bb348c97df44	255	/**
lypinator	0:bb348c97df44	256	* @}
lypinator	0:bb348c97df44	257	*/
lypinator	0:bb348c97df44	258
lypinator	0:bb348c97df44	259	/** @defgroup DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS DAC wave generation - Noise LFSR unmask bits
lypinator	0:bb348c97df44	260	* @{
lypinator	0:bb348c97df44	261	*/
lypinator	0:bb348c97df44	262	#define LL_DAC_NOISE_LFSR_UNMASK_BIT0 0x00000000U /!< Noise wave generation, unmask LFSR bit0, for the selected DAC channel /
lypinator	0:bb348c97df44	263	#define LL_DAC_NOISE_LFSR_UNMASK_BITS1_0 ( DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[1:0], for the selected DAC channel /
lypinator	0:bb348c97df44	264	#define LL_DAC_NOISE_LFSR_UNMASK_BITS2_0 ( DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[2:0], for the selected DAC channel /
lypinator	0:bb348c97df44	265	#define LL_DAC_NOISE_LFSR_UNMASK_BITS3_0 ( DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[3:0], for the selected DAC channel /
lypinator	0:bb348c97df44	266	#define LL_DAC_NOISE_LFSR_UNMASK_BITS4_0 ( DAC_CR_MAMP1_2 ) /!< Noise wave generation, unmask LFSR bits[4:0], for the selected DAC channel /
lypinator	0:bb348c97df44	267	#define LL_DAC_NOISE_LFSR_UNMASK_BITS5_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[5:0], for the selected DAC channel /
lypinator	0:bb348c97df44	268	#define LL_DAC_NOISE_LFSR_UNMASK_BITS6_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[6:0], for the selected DAC channel /
lypinator	0:bb348c97df44	269	#define LL_DAC_NOISE_LFSR_UNMASK_BITS7_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[7:0], for the selected DAC channel /
lypinator	0:bb348c97df44	270	#define LL_DAC_NOISE_LFSR_UNMASK_BITS8_0 (DAC_CR_MAMP1_3 ) /!< Noise wave generation, unmask LFSR bits[8:0], for the selected DAC channel /
lypinator	0:bb348c97df44	271	#define LL_DAC_NOISE_LFSR_UNMASK_BITS9_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[9:0], for the selected DAC channel /
lypinator	0:bb348c97df44	272	#define LL_DAC_NOISE_LFSR_UNMASK_BITS10_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[10:0], for the selected DAC channel /
lypinator	0:bb348c97df44	273	#define LL_DAC_NOISE_LFSR_UNMASK_BITS11_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[11:0], for the selected DAC channel /
lypinator	0:bb348c97df44	274	/**
lypinator	0:bb348c97df44	275	* @}
lypinator	0:bb348c97df44	276	*/
lypinator	0:bb348c97df44	277
lypinator	0:bb348c97df44	278	/** @defgroup DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE DAC wave generation - Triangle amplitude
lypinator	0:bb348c97df44	279	* @{
lypinator	0:bb348c97df44	280	*/
lypinator	0:bb348c97df44	281	#define LL_DAC_TRIANGLE_AMPLITUDE_1 0x00000000U /!< Triangle wave generation, amplitude of 1 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	282	#define LL_DAC_TRIANGLE_AMPLITUDE_3 ( DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 3 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	283	#define LL_DAC_TRIANGLE_AMPLITUDE_7 ( DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 7 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	284	#define LL_DAC_TRIANGLE_AMPLITUDE_15 ( DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 15 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	285	#define LL_DAC_TRIANGLE_AMPLITUDE_31 ( DAC_CR_MAMP1_2 ) /!< Triangle wave generation, amplitude of 31 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	286	#define LL_DAC_TRIANGLE_AMPLITUDE_63 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 63 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	287	#define LL_DAC_TRIANGLE_AMPLITUDE_127 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 127 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	288	#define LL_DAC_TRIANGLE_AMPLITUDE_255 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 255 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	289	#define LL_DAC_TRIANGLE_AMPLITUDE_511 (DAC_CR_MAMP1_3 ) /!< Triangle wave generation, amplitude of 512 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	290	#define LL_DAC_TRIANGLE_AMPLITUDE_1023 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 1023 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	291	#define LL_DAC_TRIANGLE_AMPLITUDE_2047 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 2047 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	292	#define LL_DAC_TRIANGLE_AMPLITUDE_4095 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 4095 LSB of DAC output range, for the selected DAC channel /
lypinator	0:bb348c97df44	293	/**
lypinator	0:bb348c97df44	294	* @}
lypinator	0:bb348c97df44	295	*/
lypinator	0:bb348c97df44	296
lypinator	0:bb348c97df44	297	/** @defgroup DAC_LL_EC_OUTPUT_BUFFER DAC channel output buffer
lypinator	0:bb348c97df44	298	* @{
lypinator	0:bb348c97df44	299	*/
lypinator	0:bb348c97df44	300	#define LL_DAC_OUTPUT_BUFFER_ENABLE 0x00000000U /!< The selected DAC channel output is buffered: higher drive current capability, but also higher current consumption /
lypinator	0:bb348c97df44	301	#define LL_DAC_OUTPUT_BUFFER_DISABLE (DAC_CR_BOFF1) /!< The selected DAC channel output is not buffered: lower drive current capability, but also lower current consumption /
lypinator	0:bb348c97df44	302	/**
lypinator	0:bb348c97df44	303	* @}
lypinator	0:bb348c97df44	304	*/
lypinator	0:bb348c97df44	305
lypinator	0:bb348c97df44	306
lypinator	0:bb348c97df44	307	/** @defgroup DAC_LL_EC_RESOLUTION DAC channel output resolution
lypinator	0:bb348c97df44	308	* @{
lypinator	0:bb348c97df44	309	*/
lypinator	0:bb348c97df44	310	#define LL_DAC_RESOLUTION_12B 0x00000000U /!< DAC channel resolution 12 bits /
lypinator	0:bb348c97df44	311	#define LL_DAC_RESOLUTION_8B 0x00000002U /!< DAC channel resolution 8 bits /
lypinator	0:bb348c97df44	312	/**
lypinator	0:bb348c97df44	313	* @}
lypinator	0:bb348c97df44	314	*/
lypinator	0:bb348c97df44	315
lypinator	0:bb348c97df44	316	/** @defgroup DAC_LL_EC_REGISTERS DAC registers compliant with specific purpose
lypinator	0:bb348c97df44	317	* @{
lypinator	0:bb348c97df44	318	*/
lypinator	0:bb348c97df44	319	/* List of DAC registers intended to be used (most commonly) with */
lypinator	0:bb348c97df44	320	/* DMA transfer. */
lypinator	0:bb348c97df44	321	/* Refer to function @ref LL_DAC_DMA_GetRegAddr(). */
lypinator	0:bb348c97df44	322	#define LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED DAC_REG_DHR12RX_REGOFFSET_MASK /!< DAC channel data holding register 12 bits right aligned /
lypinator	0:bb348c97df44	323	#define LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED DAC_REG_DHR12LX_REGOFFSET_MASK /!< DAC channel data holding register 12 bits left aligned /
lypinator	0:bb348c97df44	324	#define LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED DAC_REG_DHR8RX_REGOFFSET_MASK /!< DAC channel data holding register 8 bits right aligned /
lypinator	0:bb348c97df44	325	/**
lypinator	0:bb348c97df44	326	* @}
lypinator	0:bb348c97df44	327	*/
lypinator	0:bb348c97df44	328
lypinator	0:bb348c97df44	329	/** @defgroup DAC_LL_EC_HW_DELAYS Definitions of DAC hardware constraints delays
lypinator	0:bb348c97df44	330	* @note Only DAC IP HW delays are defined in DAC LL driver driver,
lypinator	0:bb348c97df44	331	* not timeout values.
lypinator	0:bb348c97df44	332	* For details on delays values, refer to descriptions in source code
lypinator	0:bb348c97df44	333	* above each literal definition.
lypinator	0:bb348c97df44	334	* @{
lypinator	0:bb348c97df44	335	*/
lypinator	0:bb348c97df44	336
lypinator	0:bb348c97df44	337	/* Delay for DAC channel voltage settling time from DAC channel startup */
lypinator	0:bb348c97df44	338	/* (transition from disable to enable). */
lypinator	0:bb348c97df44	339	/* Note: DAC channel startup time depends on board application environment: */
lypinator	0:bb348c97df44	340	/* impedance connected to DAC channel output. */
lypinator	0:bb348c97df44	341	/* The delay below is specified under conditions: */
lypinator	0:bb348c97df44	342	/* - voltage maximum transition (lowest to highest value) */
lypinator	0:bb348c97df44	343	/* - until voltage reaches final value +-1LSB */
lypinator	0:bb348c97df44	344	/* - DAC channel output buffer enabled */
lypinator	0:bb348c97df44	345	/* - load impedance of 5kOhm (min), 50pF (max) */
lypinator	0:bb348c97df44	346	/* Literal set to maximum value (refer to device datasheet, */
lypinator	0:bb348c97df44	347	/* parameter "tWAKEUP"). */
lypinator	0:bb348c97df44	348	/* Unit: us */
lypinator	0:bb348c97df44	349	#define LL_DAC_DELAY_STARTUP_VOLTAGE_SETTLING_US 15U /!< Delay for DAC channel voltage settling time from DAC channel startup (transition from disable to enable) /
lypinator	0:bb348c97df44	350
lypinator	0:bb348c97df44	351	/* Delay for DAC channel voltage settling time. */
lypinator	0:bb348c97df44	352	/* Note: DAC channel startup time depends on board application environment: */
lypinator	0:bb348c97df44	353	/* impedance connected to DAC channel output. */
lypinator	0:bb348c97df44	354	/* The delay below is specified under conditions: */
lypinator	0:bb348c97df44	355	/* - voltage maximum transition (lowest to highest value) */
lypinator	0:bb348c97df44	356	/* - until voltage reaches final value +-1LSB */
lypinator	0:bb348c97df44	357	/* - DAC channel output buffer enabled */
lypinator	0:bb348c97df44	358	/* - load impedance of 5kOhm min, 50pF max */
lypinator	0:bb348c97df44	359	/* Literal set to maximum value (refer to device datasheet, */
lypinator	0:bb348c97df44	360	/* parameter "tSETTLING"). */
lypinator	0:bb348c97df44	361	/* Unit: us */
lypinator	0:bb348c97df44	362	#define LL_DAC_DELAY_VOLTAGE_SETTLING_US 12U /!< Delay for DAC channel voltage settling time /
lypinator	0:bb348c97df44	363	/**
lypinator	0:bb348c97df44	364	* @}
lypinator	0:bb348c97df44	365	*/
lypinator	0:bb348c97df44	366
lypinator	0:bb348c97df44	367	/**
lypinator	0:bb348c97df44	368	* @}
lypinator	0:bb348c97df44	369	*/
lypinator	0:bb348c97df44	370
lypinator	0:bb348c97df44	371	/* Exported macro ------------------------------------------------------------*/
lypinator	0:bb348c97df44	372	/** @defgroup DAC_LL_Exported_Macros DAC Exported Macros
lypinator	0:bb348c97df44	373	* @{
lypinator	0:bb348c97df44	374	*/
lypinator	0:bb348c97df44	375
lypinator	0:bb348c97df44	376	/** @defgroup DAC_LL_EM_WRITE_READ Common write and read registers macros
lypinator	0:bb348c97df44	377	* @{
lypinator	0:bb348c97df44	378	*/
lypinator	0:bb348c97df44	379
lypinator	0:bb348c97df44	380	/**
lypinator	0:bb348c97df44	381	* @brief Write a value in DAC register
lypinator	0:bb348c97df44	382	* @param __INSTANCE__ DAC Instance
lypinator	0:bb348c97df44	383	* @param __REG__ Register to be written
lypinator	0:bb348c97df44	384	* @param __VALUE__ Value to be written in the register
lypinator	0:bb348c97df44	385	* @retval None
lypinator	0:bb348c97df44	386	*/
lypinator	0:bb348c97df44	387	#define LL_DAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
lypinator	0:bb348c97df44	388
lypinator	0:bb348c97df44	389	/**
lypinator	0:bb348c97df44	390	* @brief Read a value in DAC register
lypinator	0:bb348c97df44	391	* @param __INSTANCE__ DAC Instance
lypinator	0:bb348c97df44	392	* @param __REG__ Register to be read
lypinator	0:bb348c97df44	393	* @retval Register value
lypinator	0:bb348c97df44	394	*/
lypinator	0:bb348c97df44	395	#define LL_DAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
lypinator	0:bb348c97df44	396
lypinator	0:bb348c97df44	397	/**
lypinator	0:bb348c97df44	398	* @}
lypinator	0:bb348c97df44	399	*/
lypinator	0:bb348c97df44	400
lypinator	0:bb348c97df44	401	/** @defgroup DAC_LL_EM_HELPER_MACRO DAC helper macro
lypinator	0:bb348c97df44	402	* @{
lypinator	0:bb348c97df44	403	*/
lypinator	0:bb348c97df44	404
lypinator	0:bb348c97df44	405	/**
lypinator	0:bb348c97df44	406	* @brief Helper macro to get DAC channel number in decimal format
lypinator	0:bb348c97df44	407	* from literals LL_DAC_CHANNEL_x.
lypinator	0:bb348c97df44	408	* Example:
lypinator	0:bb348c97df44	409	* __LL_DAC_CHANNEL_TO_DECIMAL_NB(LL_DAC_CHANNEL_1)
lypinator	0:bb348c97df44	410	* will return decimal number "1".
lypinator	0:bb348c97df44	411	* @note The input can be a value from functions where a channel
lypinator	0:bb348c97df44	412	* number is returned.
lypinator	0:bb348c97df44	413	* @param __CHANNEL__ This parameter can be one of the following values:
lypinator	0:bb348c97df44	414	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	415	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	416	*
lypinator	0:bb348c97df44	417	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	418	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	419	* @retval 1...2 (value "2" depending on DAC channel 2 availability)
lypinator	0:bb348c97df44	420	*/
lypinator	0:bb348c97df44	421	#define __LL_DAC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
lypinator	0:bb348c97df44	422	((__CHANNEL__) & DAC_SWTR_CHX_MASK)
lypinator	0:bb348c97df44	423
lypinator	0:bb348c97df44	424	/**
lypinator	0:bb348c97df44	425	* @brief Helper macro to get DAC channel in literal format LL_DAC_CHANNEL_x
lypinator	0:bb348c97df44	426	* from number in decimal format.
lypinator	0:bb348c97df44	427	* Example:
lypinator	0:bb348c97df44	428	* __LL_DAC_DECIMAL_NB_TO_CHANNEL(1)
lypinator	0:bb348c97df44	429	* will return a data equivalent to "LL_DAC_CHANNEL_1".
lypinator	0:bb348c97df44	430	* @note If the input parameter does not correspond to a DAC channel,
lypinator	0:bb348c97df44	431	* this macro returns value '0'.
lypinator	0:bb348c97df44	432	* @param __DECIMAL_NB__ 1...2 (value "2" depending on DAC channel 2 availability)
lypinator	0:bb348c97df44	433	* @retval Returned value can be one of the following values:
lypinator	0:bb348c97df44	434	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	435	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	436	*
lypinator	0:bb348c97df44	437	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	438	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	439	*/
lypinator	0:bb348c97df44	440	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	441	#define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
lypinator	0:bb348c97df44	442	(((__DECIMAL_NB__) == 1U) \
lypinator	0:bb348c97df44	443	? ( \
lypinator	0:bb348c97df44	444	LL_DAC_CHANNEL_1 \
lypinator	0:bb348c97df44	445	) \
lypinator	0:bb348c97df44	446	: \
lypinator	0:bb348c97df44	447	(((__DECIMAL_NB__) == 2U) \
lypinator	0:bb348c97df44	448	? ( \
lypinator	0:bb348c97df44	449	LL_DAC_CHANNEL_2 \
lypinator	0:bb348c97df44	450	) \
lypinator	0:bb348c97df44	451	: \
lypinator	0:bb348c97df44	452	( \
lypinator	0:bb348c97df44	453	0 \
lypinator	0:bb348c97df44	454	) \
lypinator	0:bb348c97df44	455	) \
lypinator	0:bb348c97df44	456	)
lypinator	0:bb348c97df44	457	#else
lypinator	0:bb348c97df44	458	#define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
lypinator	0:bb348c97df44	459	(((__DECIMAL_NB__) == 1U) \
lypinator	0:bb348c97df44	460	? ( \
lypinator	0:bb348c97df44	461	LL_DAC_CHANNEL_1 \
lypinator	0:bb348c97df44	462	) \
lypinator	0:bb348c97df44	463	: \
lypinator	0:bb348c97df44	464	( \
lypinator	0:bb348c97df44	465	0 \
lypinator	0:bb348c97df44	466	) \
lypinator	0:bb348c97df44	467	)
lypinator	0:bb348c97df44	468	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	469
lypinator	0:bb348c97df44	470	/**
lypinator	0:bb348c97df44	471	* @brief Helper macro to define the DAC conversion data full-scale digital
lypinator	0:bb348c97df44	472	* value corresponding to the selected DAC resolution.
lypinator	0:bb348c97df44	473	* @note DAC conversion data full-scale corresponds to voltage range
lypinator	0:bb348c97df44	474	* determined by analog voltage references Vref+ and Vref-
lypinator	0:bb348c97df44	475	* (refer to reference manual).
lypinator	0:bb348c97df44	476	* @param __DAC_RESOLUTION__ This parameter can be one of the following values:
lypinator	0:bb348c97df44	477	* @arg @ref LL_DAC_RESOLUTION_12B
lypinator	0:bb348c97df44	478	* @arg @ref LL_DAC_RESOLUTION_8B
lypinator	0:bb348c97df44	479	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
lypinator	0:bb348c97df44	480	*/
lypinator	0:bb348c97df44	481	#define __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
lypinator	0:bb348c97df44	482	((0x00000FFFU) >> ((__DAC_RESOLUTION__) << 1U))
lypinator	0:bb348c97df44	483
lypinator	0:bb348c97df44	484	/**
lypinator	0:bb348c97df44	485	* @brief Helper macro to calculate the DAC conversion data (unit: digital
lypinator	0:bb348c97df44	486	* value) corresponding to a voltage (unit: mVolt).
lypinator	0:bb348c97df44	487	* @note This helper macro is intended to provide input data in voltage
lypinator	0:bb348c97df44	488	* rather than digital value,
lypinator	0:bb348c97df44	489	* to be used with LL DAC functions such as
lypinator	0:bb348c97df44	490	* @ref LL_DAC_ConvertData12RightAligned().
lypinator	0:bb348c97df44	491	* @note Analog reference voltage (Vref+) must be either known from
lypinator	0:bb348c97df44	492	* user board environment or can be calculated using ADC measurement
lypinator	0:bb348c97df44	493	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
lypinator	0:bb348c97df44	494	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit mV)
lypinator	0:bb348c97df44	495	* @param __DAC_VOLTAGE__ Voltage to be generated by DAC channel
lypinator	0:bb348c97df44	496	* (unit: mVolt).
lypinator	0:bb348c97df44	497	* @param __DAC_RESOLUTION__ This parameter can be one of the following values:
lypinator	0:bb348c97df44	498	* @arg @ref LL_DAC_RESOLUTION_12B
lypinator	0:bb348c97df44	499	* @arg @ref LL_DAC_RESOLUTION_8B
lypinator	0:bb348c97df44	500	* @retval DAC conversion data (unit: digital value)
lypinator	0:bb348c97df44	501	*/
lypinator	0:bb348c97df44	502	#define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__,\
lypinator	0:bb348c97df44	503	__DAC_VOLTAGE__,\
lypinator	0:bb348c97df44	504	__DAC_RESOLUTION__) \
lypinator	0:bb348c97df44	505	((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
lypinator	0:bb348c97df44	506	/ (__VREFANALOG_VOLTAGE__) \
lypinator	0:bb348c97df44	507	)
lypinator	0:bb348c97df44	508
lypinator	0:bb348c97df44	509	/**
lypinator	0:bb348c97df44	510	* @}
lypinator	0:bb348c97df44	511	*/
lypinator	0:bb348c97df44	512
lypinator	0:bb348c97df44	513	/**
lypinator	0:bb348c97df44	514	* @}
lypinator	0:bb348c97df44	515	*/
lypinator	0:bb348c97df44	516
lypinator	0:bb348c97df44	517
lypinator	0:bb348c97df44	518	/* Exported functions --------------------------------------------------------*/
lypinator	0:bb348c97df44	519	/** @defgroup DAC_LL_Exported_Functions DAC Exported Functions
lypinator	0:bb348c97df44	520	* @{
lypinator	0:bb348c97df44	521	*/
lypinator	0:bb348c97df44	522	/** @defgroup DAC_LL_EF_Configuration Configuration of DAC channels
lypinator	0:bb348c97df44	523	* @{
lypinator	0:bb348c97df44	524	*/
lypinator	0:bb348c97df44	525
lypinator	0:bb348c97df44	526	/**
lypinator	0:bb348c97df44	527	* @brief Set the conversion trigger source for the selected DAC channel.
lypinator	0:bb348c97df44	528	* @note For conversion trigger source to be effective, DAC trigger
lypinator	0:bb348c97df44	529	* must be enabled using function @ref LL_DAC_EnableTrigger().
lypinator	0:bb348c97df44	530	* @note To set conversion trigger source, DAC channel must be disabled.
lypinator	0:bb348c97df44	531	* Otherwise, the setting is discarded.
lypinator	0:bb348c97df44	532	* @note Availability of parameters of trigger sources from timer
lypinator	0:bb348c97df44	533	* depends on timers availability on the selected device.
lypinator	0:bb348c97df44	534	* @rmtoll CR TSEL1 LL_DAC_SetTriggerSource\n
lypinator	0:bb348c97df44	535	* CR TSEL2 LL_DAC_SetTriggerSource
lypinator	0:bb348c97df44	536	* @param DACx DAC instance
lypinator	0:bb348c97df44	537	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	538	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	539	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	540	*
lypinator	0:bb348c97df44	541	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	542	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	543	* @param TriggerSource This parameter can be one of the following values:
lypinator	0:bb348c97df44	544	* @arg @ref LL_DAC_TRIG_SOFTWARE
lypinator	0:bb348c97df44	545	* @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO
lypinator	0:bb348c97df44	546	* @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
lypinator	0:bb348c97df44	547	* @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
lypinator	0:bb348c97df44	548	* @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO
lypinator	0:bb348c97df44	549	* @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
lypinator	0:bb348c97df44	550	* @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
lypinator	0:bb348c97df44	551	* @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
lypinator	0:bb348c97df44	552	* @retval None
lypinator	0:bb348c97df44	553	*/
lypinator	0:bb348c97df44	554	__STATIC_INLINE void LL_DAC_SetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriggerSource)
lypinator	0:bb348c97df44	555	{
lypinator	0:bb348c97df44	556	MODIFY_REG(DACx->CR,
lypinator	0:bb348c97df44	557	DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
lypinator	0:bb348c97df44	558	TriggerSource << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
lypinator	0:bb348c97df44	559	}
lypinator	0:bb348c97df44	560
lypinator	0:bb348c97df44	561	/**
lypinator	0:bb348c97df44	562	* @brief Get the conversion trigger source for the selected DAC channel.
lypinator	0:bb348c97df44	563	* @note For conversion trigger source to be effective, DAC trigger
lypinator	0:bb348c97df44	564	* must be enabled using function @ref LL_DAC_EnableTrigger().
lypinator	0:bb348c97df44	565	* @note Availability of parameters of trigger sources from timer
lypinator	0:bb348c97df44	566	* depends on timers availability on the selected device.
lypinator	0:bb348c97df44	567	* @rmtoll CR TSEL1 LL_DAC_GetTriggerSource\n
lypinator	0:bb348c97df44	568	* CR TSEL2 LL_DAC_GetTriggerSource
lypinator	0:bb348c97df44	569	* @param DACx DAC instance
lypinator	0:bb348c97df44	570	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	571	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	572	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	573	*
lypinator	0:bb348c97df44	574	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	575	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	576	* @retval Returned value can be one of the following values:
lypinator	0:bb348c97df44	577	* @arg @ref LL_DAC_TRIG_SOFTWARE
lypinator	0:bb348c97df44	578	* @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO
lypinator	0:bb348c97df44	579	* @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
lypinator	0:bb348c97df44	580	* @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
lypinator	0:bb348c97df44	581	* @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO
lypinator	0:bb348c97df44	582	* @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
lypinator	0:bb348c97df44	583	* @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
lypinator	0:bb348c97df44	584	* @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
lypinator	0:bb348c97df44	585	*/
lypinator	0:bb348c97df44	586	__STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	587	{
lypinator	0:bb348c97df44	588	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
lypinator	0:bb348c97df44	589	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
lypinator	0:bb348c97df44	590	);
lypinator	0:bb348c97df44	591	}
lypinator	0:bb348c97df44	592
lypinator	0:bb348c97df44	593	/**
lypinator	0:bb348c97df44	594	* @brief Set the waveform automatic generation mode
lypinator	0:bb348c97df44	595	* for the selected DAC channel.
lypinator	0:bb348c97df44	596	* @rmtoll CR WAVE1 LL_DAC_SetWaveAutoGeneration\n
lypinator	0:bb348c97df44	597	* CR WAVE2 LL_DAC_SetWaveAutoGeneration
lypinator	0:bb348c97df44	598	* @param DACx DAC instance
lypinator	0:bb348c97df44	599	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	600	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	601	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	602	*
lypinator	0:bb348c97df44	603	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	604	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	605	* @param WaveAutoGeneration This parameter can be one of the following values:
lypinator	0:bb348c97df44	606	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
lypinator	0:bb348c97df44	607	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
lypinator	0:bb348c97df44	608	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
lypinator	0:bb348c97df44	609	* @retval None
lypinator	0:bb348c97df44	610	*/
lypinator	0:bb348c97df44	611	__STATIC_INLINE void LL_DAC_SetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t WaveAutoGeneration)
lypinator	0:bb348c97df44	612	{
lypinator	0:bb348c97df44	613	MODIFY_REG(DACx->CR,
lypinator	0:bb348c97df44	614	DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
lypinator	0:bb348c97df44	615	WaveAutoGeneration << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
lypinator	0:bb348c97df44	616	}
lypinator	0:bb348c97df44	617
lypinator	0:bb348c97df44	618	/**
lypinator	0:bb348c97df44	619	* @brief Get the waveform automatic generation mode
lypinator	0:bb348c97df44	620	* for the selected DAC channel.
lypinator	0:bb348c97df44	621	* @rmtoll CR WAVE1 LL_DAC_GetWaveAutoGeneration\n
lypinator	0:bb348c97df44	622	* CR WAVE2 LL_DAC_GetWaveAutoGeneration
lypinator	0:bb348c97df44	623	* @param DACx DAC instance
lypinator	0:bb348c97df44	624	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	625	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	626	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	627	*
lypinator	0:bb348c97df44	628	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	629	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	630	* @retval Returned value can be one of the following values:
lypinator	0:bb348c97df44	631	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
lypinator	0:bb348c97df44	632	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
lypinator	0:bb348c97df44	633	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
lypinator	0:bb348c97df44	634	*/
lypinator	0:bb348c97df44	635	__STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	636	{
lypinator	0:bb348c97df44	637	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
lypinator	0:bb348c97df44	638	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
lypinator	0:bb348c97df44	639	);
lypinator	0:bb348c97df44	640	}
lypinator	0:bb348c97df44	641
lypinator	0:bb348c97df44	642	/**
lypinator	0:bb348c97df44	643	* @brief Set the noise waveform generation for the selected DAC channel:
lypinator	0:bb348c97df44	644	* Noise mode and parameters LFSR (linear feedback shift register).
lypinator	0:bb348c97df44	645	* @note For wave generation to be effective, DAC channel
lypinator	0:bb348c97df44	646	* wave generation mode must be enabled using
lypinator	0:bb348c97df44	647	* function @ref LL_DAC_SetWaveAutoGeneration().
lypinator	0:bb348c97df44	648	* @note This setting can be set when the selected DAC channel is disabled
lypinator	0:bb348c97df44	649	* (otherwise, the setting operation is ignored).
lypinator	0:bb348c97df44	650	* @rmtoll CR MAMP1 LL_DAC_SetWaveNoiseLFSR\n
lypinator	0:bb348c97df44	651	* CR MAMP2 LL_DAC_SetWaveNoiseLFSR
lypinator	0:bb348c97df44	652	* @param DACx DAC instance
lypinator	0:bb348c97df44	653	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	654	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	655	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	656	*
lypinator	0:bb348c97df44	657	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	658	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	659	* @param NoiseLFSRMask This parameter can be one of the following values:
lypinator	0:bb348c97df44	660	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
lypinator	0:bb348c97df44	661	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
lypinator	0:bb348c97df44	662	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
lypinator	0:bb348c97df44	663	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
lypinator	0:bb348c97df44	664	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
lypinator	0:bb348c97df44	665	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
lypinator	0:bb348c97df44	666	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
lypinator	0:bb348c97df44	667	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
lypinator	0:bb348c97df44	668	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
lypinator	0:bb348c97df44	669	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
lypinator	0:bb348c97df44	670	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
lypinator	0:bb348c97df44	671	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
lypinator	0:bb348c97df44	672	* @retval None
lypinator	0:bb348c97df44	673	*/
lypinator	0:bb348c97df44	674	__STATIC_INLINE void LL_DAC_SetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t NoiseLFSRMask)
lypinator	0:bb348c97df44	675	{
lypinator	0:bb348c97df44	676	MODIFY_REG(DACx->CR,
lypinator	0:bb348c97df44	677	DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
lypinator	0:bb348c97df44	678	NoiseLFSRMask << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
lypinator	0:bb348c97df44	679	}
lypinator	0:bb348c97df44	680
lypinator	0:bb348c97df44	681	/**
lypinator	0:bb348c97df44	682	* @brief Set the noise waveform generation for the selected DAC channel:
lypinator	0:bb348c97df44	683	* Noise mode and parameters LFSR (linear feedback shift register).
lypinator	0:bb348c97df44	684	* @rmtoll CR MAMP1 LL_DAC_GetWaveNoiseLFSR\n
lypinator	0:bb348c97df44	685	* CR MAMP2 LL_DAC_GetWaveNoiseLFSR
lypinator	0:bb348c97df44	686	* @param DACx DAC instance
lypinator	0:bb348c97df44	687	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	688	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	689	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	690	*
lypinator	0:bb348c97df44	691	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	692	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	693	* @retval Returned value can be one of the following values:
lypinator	0:bb348c97df44	694	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
lypinator	0:bb348c97df44	695	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
lypinator	0:bb348c97df44	696	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
lypinator	0:bb348c97df44	697	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
lypinator	0:bb348c97df44	698	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
lypinator	0:bb348c97df44	699	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
lypinator	0:bb348c97df44	700	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
lypinator	0:bb348c97df44	701	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
lypinator	0:bb348c97df44	702	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
lypinator	0:bb348c97df44	703	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
lypinator	0:bb348c97df44	704	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
lypinator	0:bb348c97df44	705	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
lypinator	0:bb348c97df44	706	*/
lypinator	0:bb348c97df44	707	__STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	708	{
lypinator	0:bb348c97df44	709	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
lypinator	0:bb348c97df44	710	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
lypinator	0:bb348c97df44	711	);
lypinator	0:bb348c97df44	712	}
lypinator	0:bb348c97df44	713
lypinator	0:bb348c97df44	714	/**
lypinator	0:bb348c97df44	715	* @brief Set the triangle waveform generation for the selected DAC channel:
lypinator	0:bb348c97df44	716	* triangle mode and amplitude.
lypinator	0:bb348c97df44	717	* @note For wave generation to be effective, DAC channel
lypinator	0:bb348c97df44	718	* wave generation mode must be enabled using
lypinator	0:bb348c97df44	719	* function @ref LL_DAC_SetWaveAutoGeneration().
lypinator	0:bb348c97df44	720	* @note This setting can be set when the selected DAC channel is disabled
lypinator	0:bb348c97df44	721	* (otherwise, the setting operation is ignored).
lypinator	0:bb348c97df44	722	* @rmtoll CR MAMP1 LL_DAC_SetWaveTriangleAmplitude\n
lypinator	0:bb348c97df44	723	* CR MAMP2 LL_DAC_SetWaveTriangleAmplitude
lypinator	0:bb348c97df44	724	* @param DACx DAC instance
lypinator	0:bb348c97df44	725	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	726	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	727	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	728	*
lypinator	0:bb348c97df44	729	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	730	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	731	* @param TriangleAmplitude This parameter can be one of the following values:
lypinator	0:bb348c97df44	732	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
lypinator	0:bb348c97df44	733	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
lypinator	0:bb348c97df44	734	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
lypinator	0:bb348c97df44	735	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
lypinator	0:bb348c97df44	736	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
lypinator	0:bb348c97df44	737	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
lypinator	0:bb348c97df44	738	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
lypinator	0:bb348c97df44	739	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
lypinator	0:bb348c97df44	740	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
lypinator	0:bb348c97df44	741	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
lypinator	0:bb348c97df44	742	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
lypinator	0:bb348c97df44	743	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
lypinator	0:bb348c97df44	744	* @retval None
lypinator	0:bb348c97df44	745	*/
lypinator	0:bb348c97df44	746	__STATIC_INLINE void LL_DAC_SetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriangleAmplitude)
lypinator	0:bb348c97df44	747	{
lypinator	0:bb348c97df44	748	MODIFY_REG(DACx->CR,
lypinator	0:bb348c97df44	749	DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
lypinator	0:bb348c97df44	750	TriangleAmplitude << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
lypinator	0:bb348c97df44	751	}
lypinator	0:bb348c97df44	752
lypinator	0:bb348c97df44	753	/**
lypinator	0:bb348c97df44	754	* @brief Set the triangle waveform generation for the selected DAC channel:
lypinator	0:bb348c97df44	755	* triangle mode and amplitude.
lypinator	0:bb348c97df44	756	* @rmtoll CR MAMP1 LL_DAC_GetWaveTriangleAmplitude\n
lypinator	0:bb348c97df44	757	* CR MAMP2 LL_DAC_GetWaveTriangleAmplitude
lypinator	0:bb348c97df44	758	* @param DACx DAC instance
lypinator	0:bb348c97df44	759	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	760	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	761	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	762	*
lypinator	0:bb348c97df44	763	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	764	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	765	* @retval Returned value can be one of the following values:
lypinator	0:bb348c97df44	766	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
lypinator	0:bb348c97df44	767	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
lypinator	0:bb348c97df44	768	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
lypinator	0:bb348c97df44	769	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
lypinator	0:bb348c97df44	770	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
lypinator	0:bb348c97df44	771	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
lypinator	0:bb348c97df44	772	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
lypinator	0:bb348c97df44	773	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
lypinator	0:bb348c97df44	774	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
lypinator	0:bb348c97df44	775	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
lypinator	0:bb348c97df44	776	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
lypinator	0:bb348c97df44	777	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
lypinator	0:bb348c97df44	778	*/
lypinator	0:bb348c97df44	779	__STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	780	{
lypinator	0:bb348c97df44	781	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
lypinator	0:bb348c97df44	782	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
lypinator	0:bb348c97df44	783	);
lypinator	0:bb348c97df44	784	}
lypinator	0:bb348c97df44	785
lypinator	0:bb348c97df44	786	/**
lypinator	0:bb348c97df44	787	* @brief Set the output buffer for the selected DAC channel.
lypinator	0:bb348c97df44	788	* @rmtoll CR BOFF1 LL_DAC_SetOutputBuffer\n
lypinator	0:bb348c97df44	789	* CR BOFF2 LL_DAC_SetOutputBuffer
lypinator	0:bb348c97df44	790	* @param DACx DAC instance
lypinator	0:bb348c97df44	791	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	792	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	793	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	794	*
lypinator	0:bb348c97df44	795	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	796	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	797	* @param OutputBuffer This parameter can be one of the following values:
lypinator	0:bb348c97df44	798	* @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
lypinator	0:bb348c97df44	799	* @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
lypinator	0:bb348c97df44	800	* @retval None
lypinator	0:bb348c97df44	801	*/
lypinator	0:bb348c97df44	802	__STATIC_INLINE void LL_DAC_SetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputBuffer)
lypinator	0:bb348c97df44	803	{
lypinator	0:bb348c97df44	804	MODIFY_REG(DACx->CR,
lypinator	0:bb348c97df44	805	DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
lypinator	0:bb348c97df44	806	OutputBuffer << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
lypinator	0:bb348c97df44	807	}
lypinator	0:bb348c97df44	808
lypinator	0:bb348c97df44	809	/**
lypinator	0:bb348c97df44	810	* @brief Get the output buffer state for the selected DAC channel.
lypinator	0:bb348c97df44	811	* @rmtoll CR BOFF1 LL_DAC_GetOutputBuffer\n
lypinator	0:bb348c97df44	812	* CR BOFF2 LL_DAC_GetOutputBuffer
lypinator	0:bb348c97df44	813	* @param DACx DAC instance
lypinator	0:bb348c97df44	814	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	815	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	816	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	817	*
lypinator	0:bb348c97df44	818	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	819	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	820	* @retval Returned value can be one of the following values:
lypinator	0:bb348c97df44	821	* @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
lypinator	0:bb348c97df44	822	* @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
lypinator	0:bb348c97df44	823	*/
lypinator	0:bb348c97df44	824	__STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	825	{
lypinator	0:bb348c97df44	826	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
lypinator	0:bb348c97df44	827	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
lypinator	0:bb348c97df44	828	);
lypinator	0:bb348c97df44	829	}
lypinator	0:bb348c97df44	830
lypinator	0:bb348c97df44	831	/**
lypinator	0:bb348c97df44	832	* @}
lypinator	0:bb348c97df44	833	*/
lypinator	0:bb348c97df44	834
lypinator	0:bb348c97df44	835	/** @defgroup DAC_LL_EF_DMA_Management DMA Management
lypinator	0:bb348c97df44	836	* @{
lypinator	0:bb348c97df44	837	*/
lypinator	0:bb348c97df44	838
lypinator	0:bb348c97df44	839	/**
lypinator	0:bb348c97df44	840	* @brief Enable DAC DMA transfer request of the selected channel.
lypinator	0:bb348c97df44	841	* @note To configure DMA source address (peripheral address),
lypinator	0:bb348c97df44	842	* use function @ref LL_DAC_DMA_GetRegAddr().
lypinator	0:bb348c97df44	843	* @rmtoll CR DMAEN1 LL_DAC_EnableDMAReq\n
lypinator	0:bb348c97df44	844	* CR DMAEN2 LL_DAC_EnableDMAReq
lypinator	0:bb348c97df44	845	* @param DACx DAC instance
lypinator	0:bb348c97df44	846	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	847	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	848	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	849	*
lypinator	0:bb348c97df44	850	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	851	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	852	* @retval None
lypinator	0:bb348c97df44	853	*/
lypinator	0:bb348c97df44	854	__STATIC_INLINE void LL_DAC_EnableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	855	{
lypinator	0:bb348c97df44	856	SET_BIT(DACx->CR,
lypinator	0:bb348c97df44	857	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
lypinator	0:bb348c97df44	858	}
lypinator	0:bb348c97df44	859
lypinator	0:bb348c97df44	860	/**
lypinator	0:bb348c97df44	861	* @brief Disable DAC DMA transfer request of the selected channel.
lypinator	0:bb348c97df44	862	* @note To configure DMA source address (peripheral address),
lypinator	0:bb348c97df44	863	* use function @ref LL_DAC_DMA_GetRegAddr().
lypinator	0:bb348c97df44	864	* @rmtoll CR DMAEN1 LL_DAC_DisableDMAReq\n
lypinator	0:bb348c97df44	865	* CR DMAEN2 LL_DAC_DisableDMAReq
lypinator	0:bb348c97df44	866	* @param DACx DAC instance
lypinator	0:bb348c97df44	867	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	868	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	869	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	870	*
lypinator	0:bb348c97df44	871	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	872	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	873	* @retval None
lypinator	0:bb348c97df44	874	*/
lypinator	0:bb348c97df44	875	__STATIC_INLINE void LL_DAC_DisableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	876	{
lypinator	0:bb348c97df44	877	CLEAR_BIT(DACx->CR,
lypinator	0:bb348c97df44	878	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
lypinator	0:bb348c97df44	879	}
lypinator	0:bb348c97df44	880
lypinator	0:bb348c97df44	881	/**
lypinator	0:bb348c97df44	882	* @brief Get DAC DMA transfer request state of the selected channel.
lypinator	0:bb348c97df44	883	* (0: DAC DMA transfer request is disabled, 1: DAC DMA transfer request is enabled)
lypinator	0:bb348c97df44	884	* @rmtoll CR DMAEN1 LL_DAC_IsDMAReqEnabled\n
lypinator	0:bb348c97df44	885	* CR DMAEN2 LL_DAC_IsDMAReqEnabled
lypinator	0:bb348c97df44	886	* @param DACx DAC instance
lypinator	0:bb348c97df44	887	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	888	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	889	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	890	*
lypinator	0:bb348c97df44	891	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	892	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	893	* @retval State of bit (1 or 0).
lypinator	0:bb348c97df44	894	*/
lypinator	0:bb348c97df44	895	__STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	896	{
lypinator	0:bb348c97df44	897	return (READ_BIT(DACx->CR,
lypinator	0:bb348c97df44	898	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
lypinator	0:bb348c97df44	899	== (DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
lypinator	0:bb348c97df44	900	}
lypinator	0:bb348c97df44	901
lypinator	0:bb348c97df44	902	/**
lypinator	0:bb348c97df44	903	* @brief Function to help to configure DMA transfer to DAC: retrieve the
lypinator	0:bb348c97df44	904	* DAC register address from DAC instance and a list of DAC registers
lypinator	0:bb348c97df44	905	* intended to be used (most commonly) with DMA transfer.
lypinator	0:bb348c97df44	906	* @note These DAC registers are data holding registers:
lypinator	0:bb348c97df44	907	* when DAC conversion is requested, DAC generates a DMA transfer
lypinator	0:bb348c97df44	908	* request to have data available in DAC data holding registers.
lypinator	0:bb348c97df44	909	* @note This macro is intended to be used with LL DMA driver, refer to
lypinator	0:bb348c97df44	910	* function "LL_DMA_ConfigAddresses()".
lypinator	0:bb348c97df44	911	* Example:
lypinator	0:bb348c97df44	912	* LL_DMA_ConfigAddresses(DMA1,
lypinator	0:bb348c97df44	913	* LL_DMA_CHANNEL_1,
lypinator	0:bb348c97df44	914	* (uint32_t)&< array or variable >,
lypinator	0:bb348c97df44	915	* LL_DAC_DMA_GetRegAddr(DAC1, LL_DAC_CHANNEL_1, LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED),
lypinator	0:bb348c97df44	916	* LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
lypinator	0:bb348c97df44	917	* @rmtoll DHR12R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
lypinator	0:bb348c97df44	918	* DHR12L1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
lypinator	0:bb348c97df44	919	* DHR8R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
lypinator	0:bb348c97df44	920	* DHR12R2 DACC2DHR LL_DAC_DMA_GetRegAddr\n
lypinator	0:bb348c97df44	921	* DHR12L2 DACC2DHR LL_DAC_DMA_GetRegAddr\n
lypinator	0:bb348c97df44	922	* DHR8R2 DACC2DHR LL_DAC_DMA_GetRegAddr
lypinator	0:bb348c97df44	923	* @param DACx DAC instance
lypinator	0:bb348c97df44	924	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	925	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	926	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	927	*
lypinator	0:bb348c97df44	928	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	929	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	930	* @param Register This parameter can be one of the following values:
lypinator	0:bb348c97df44	931	* @arg @ref LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED
lypinator	0:bb348c97df44	932	* @arg @ref LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED
lypinator	0:bb348c97df44	933	* @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED
lypinator	0:bb348c97df44	934	* @retval DAC register address
lypinator	0:bb348c97df44	935	*/
lypinator	0:bb348c97df44	936	__STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
lypinator	0:bb348c97df44	937	{
lypinator	0:bb348c97df44	938	/* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on */
lypinator	0:bb348c97df44	939	/* DAC channel selected. */
lypinator	0:bb348c97df44	940	return ((uint32_t)(__DAC_PTR_REG_OFFSET((DACx)->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, Register))));
lypinator	0:bb348c97df44	941	}
lypinator	0:bb348c97df44	942	/**
lypinator	0:bb348c97df44	943	* @}
lypinator	0:bb348c97df44	944	*/
lypinator	0:bb348c97df44	945
lypinator	0:bb348c97df44	946	/** @defgroup DAC_LL_EF_Operation Operation on DAC channels
lypinator	0:bb348c97df44	947	* @{
lypinator	0:bb348c97df44	948	*/
lypinator	0:bb348c97df44	949
lypinator	0:bb348c97df44	950	/**
lypinator	0:bb348c97df44	951	* @brief Enable DAC selected channel.
lypinator	0:bb348c97df44	952	* @rmtoll CR EN1 LL_DAC_Enable\n
lypinator	0:bb348c97df44	953	* CR EN2 LL_DAC_Enable
lypinator	0:bb348c97df44	954	* @note After enable from off state, DAC channel requires a delay
lypinator	0:bb348c97df44	955	* for output voltage to reach accuracy +/- 1 LSB.
lypinator	0:bb348c97df44	956	* Refer to device datasheet, parameter "tWAKEUP".
lypinator	0:bb348c97df44	957	* @param DACx DAC instance
lypinator	0:bb348c97df44	958	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	959	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	960	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	961	*
lypinator	0:bb348c97df44	962	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	963	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	964	* @retval None
lypinator	0:bb348c97df44	965	*/
lypinator	0:bb348c97df44	966	__STATIC_INLINE void LL_DAC_Enable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	967	{
lypinator	0:bb348c97df44	968	SET_BIT(DACx->CR,
lypinator	0:bb348c97df44	969	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
lypinator	0:bb348c97df44	970	}
lypinator	0:bb348c97df44	971
lypinator	0:bb348c97df44	972	/**
lypinator	0:bb348c97df44	973	* @brief Disable DAC selected channel.
lypinator	0:bb348c97df44	974	* @rmtoll CR EN1 LL_DAC_Disable\n
lypinator	0:bb348c97df44	975	* CR EN2 LL_DAC_Disable
lypinator	0:bb348c97df44	976	* @param DACx DAC instance
lypinator	0:bb348c97df44	977	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	978	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	979	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	980	*
lypinator	0:bb348c97df44	981	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	982	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	983	* @retval None
lypinator	0:bb348c97df44	984	*/
lypinator	0:bb348c97df44	985	__STATIC_INLINE void LL_DAC_Disable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	986	{
lypinator	0:bb348c97df44	987	CLEAR_BIT(DACx->CR,
lypinator	0:bb348c97df44	988	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
lypinator	0:bb348c97df44	989	}
lypinator	0:bb348c97df44	990
lypinator	0:bb348c97df44	991	/**
lypinator	0:bb348c97df44	992	* @brief Get DAC enable state of the selected channel.
lypinator	0:bb348c97df44	993	* (0: DAC channel is disabled, 1: DAC channel is enabled)
lypinator	0:bb348c97df44	994	* @rmtoll CR EN1 LL_DAC_IsEnabled\n
lypinator	0:bb348c97df44	995	* CR EN2 LL_DAC_IsEnabled
lypinator	0:bb348c97df44	996	* @param DACx DAC instance
lypinator	0:bb348c97df44	997	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	998	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	999	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	1000	*
lypinator	0:bb348c97df44	1001	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	1002	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	1003	* @retval State of bit (1 or 0).
lypinator	0:bb348c97df44	1004	*/
lypinator	0:bb348c97df44	1005	__STATIC_INLINE uint32_t LL_DAC_IsEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	1006	{
lypinator	0:bb348c97df44	1007	return (READ_BIT(DACx->CR,
lypinator	0:bb348c97df44	1008	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
lypinator	0:bb348c97df44	1009	== (DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
lypinator	0:bb348c97df44	1010	}
lypinator	0:bb348c97df44	1011
lypinator	0:bb348c97df44	1012	/**
lypinator	0:bb348c97df44	1013	* @brief Enable DAC trigger of the selected channel.
lypinator	0:bb348c97df44	1014	* @note - If DAC trigger is disabled, DAC conversion is performed
lypinator	0:bb348c97df44	1015	* automatically once the data holding register is updated,
lypinator	0:bb348c97df44	1016	* using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
lypinator	0:bb348c97df44	1017	* @ref LL_DAC_ConvertData12RightAligned(), ...
lypinator	0:bb348c97df44	1018	* - If DAC trigger is enabled, DAC conversion is performed
lypinator	0:bb348c97df44	1019	* only when a hardware of software trigger event is occurring.
lypinator	0:bb348c97df44	1020	* Select trigger source using
lypinator	0:bb348c97df44	1021	* function @ref LL_DAC_SetTriggerSource().
lypinator	0:bb348c97df44	1022	* @rmtoll CR TEN1 LL_DAC_EnableTrigger\n
lypinator	0:bb348c97df44	1023	* CR TEN2 LL_DAC_EnableTrigger
lypinator	0:bb348c97df44	1024	* @param DACx DAC instance
lypinator	0:bb348c97df44	1025	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	1026	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	1027	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	1028	*
lypinator	0:bb348c97df44	1029	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	1030	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	1031	* @retval None
lypinator	0:bb348c97df44	1032	*/
lypinator	0:bb348c97df44	1033	__STATIC_INLINE void LL_DAC_EnableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	1034	{
lypinator	0:bb348c97df44	1035	SET_BIT(DACx->CR,
lypinator	0:bb348c97df44	1036	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
lypinator	0:bb348c97df44	1037	}
lypinator	0:bb348c97df44	1038
lypinator	0:bb348c97df44	1039	/**
lypinator	0:bb348c97df44	1040	* @brief Disable DAC trigger of the selected channel.
lypinator	0:bb348c97df44	1041	* @rmtoll CR TEN1 LL_DAC_DisableTrigger\n
lypinator	0:bb348c97df44	1042	* CR TEN2 LL_DAC_DisableTrigger
lypinator	0:bb348c97df44	1043	* @param DACx DAC instance
lypinator	0:bb348c97df44	1044	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	1045	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	1046	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	1047	*
lypinator	0:bb348c97df44	1048	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	1049	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	1050	* @retval None
lypinator	0:bb348c97df44	1051	*/
lypinator	0:bb348c97df44	1052	__STATIC_INLINE void LL_DAC_DisableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	1053	{
lypinator	0:bb348c97df44	1054	CLEAR_BIT(DACx->CR,
lypinator	0:bb348c97df44	1055	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
lypinator	0:bb348c97df44	1056	}
lypinator	0:bb348c97df44	1057
lypinator	0:bb348c97df44	1058	/**
lypinator	0:bb348c97df44	1059	* @brief Get DAC trigger state of the selected channel.
lypinator	0:bb348c97df44	1060	* (0: DAC trigger is disabled, 1: DAC trigger is enabled)
lypinator	0:bb348c97df44	1061	* @rmtoll CR TEN1 LL_DAC_IsTriggerEnabled\n
lypinator	0:bb348c97df44	1062	* CR TEN2 LL_DAC_IsTriggerEnabled
lypinator	0:bb348c97df44	1063	* @param DACx DAC instance
lypinator	0:bb348c97df44	1064	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	1065	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	1066	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	1067	*
lypinator	0:bb348c97df44	1068	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	1069	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	1070	* @retval State of bit (1 or 0).
lypinator	0:bb348c97df44	1071	*/
lypinator	0:bb348c97df44	1072	__STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	1073	{
lypinator	0:bb348c97df44	1074	return (READ_BIT(DACx->CR,
lypinator	0:bb348c97df44	1075	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
lypinator	0:bb348c97df44	1076	== (DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
lypinator	0:bb348c97df44	1077	}
lypinator	0:bb348c97df44	1078
lypinator	0:bb348c97df44	1079	/**
lypinator	0:bb348c97df44	1080	* @brief Trig DAC conversion by software for the selected DAC channel.
lypinator	0:bb348c97df44	1081	* @note Preliminarily, DAC trigger must be set to software trigger
lypinator	0:bb348c97df44	1082	* using function @ref LL_DAC_SetTriggerSource()
lypinator	0:bb348c97df44	1083	* with parameter "LL_DAC_TRIGGER_SOFTWARE".
lypinator	0:bb348c97df44	1084	* and DAC trigger must be enabled using
lypinator	0:bb348c97df44	1085	* function @ref LL_DAC_EnableTrigger().
lypinator	0:bb348c97df44	1086	* @note For devices featuring DAC with 2 channels: this function
lypinator	0:bb348c97df44	1087	* can perform a SW start of both DAC channels simultaneously.
lypinator	0:bb348c97df44	1088	* Two channels can be selected as parameter.
lypinator	0:bb348c97df44	1089	* Example: (LL_DAC_CHANNEL_1 \| LL_DAC_CHANNEL_2)
lypinator	0:bb348c97df44	1090	* @rmtoll SWTRIGR SWTRIG1 LL_DAC_TrigSWConversion\n
lypinator	0:bb348c97df44	1091	* SWTRIGR SWTRIG2 LL_DAC_TrigSWConversion
lypinator	0:bb348c97df44	1092	* @param DACx DAC instance
lypinator	0:bb348c97df44	1093	* @param DAC_Channel This parameter can a combination of the following values:
lypinator	0:bb348c97df44	1094	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	1095	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	1096	*
lypinator	0:bb348c97df44	1097	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	1098	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	1099	* @retval None
lypinator	0:bb348c97df44	1100	*/
lypinator	0:bb348c97df44	1101	__STATIC_INLINE void LL_DAC_TrigSWConversion(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	1102	{
lypinator	0:bb348c97df44	1103	SET_BIT(DACx->SWTRIGR,
lypinator	0:bb348c97df44	1104	(DAC_Channel & DAC_SWTR_CHX_MASK));
lypinator	0:bb348c97df44	1105	}
lypinator	0:bb348c97df44	1106
lypinator	0:bb348c97df44	1107	/**
lypinator	0:bb348c97df44	1108	* @brief Set the data to be loaded in the data holding register
lypinator	0:bb348c97df44	1109	* in format 12 bits left alignment (LSB aligned on bit 0),
lypinator	0:bb348c97df44	1110	* for the selected DAC channel.
lypinator	0:bb348c97df44	1111	* @rmtoll DHR12R1 DACC1DHR LL_DAC_ConvertData12RightAligned\n
lypinator	0:bb348c97df44	1112	* DHR12R2 DACC2DHR LL_DAC_ConvertData12RightAligned
lypinator	0:bb348c97df44	1113	* @param DACx DAC instance
lypinator	0:bb348c97df44	1114	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	1115	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	1116	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	1117	*
lypinator	0:bb348c97df44	1118	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	1119	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	1120	* @param Data Value between Min_Data=0x000 and Max_Data=0xFFF
lypinator	0:bb348c97df44	1121	* @retval None
lypinator	0:bb348c97df44	1122	*/
lypinator	0:bb348c97df44	1123	__STATIC_INLINE void LL_DAC_ConvertData12RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
lypinator	0:bb348c97df44	1124	{
lypinator	0:bb348c97df44	1125	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12RX_REGOFFSET_MASK));
lypinator	0:bb348c97df44	1126
lypinator	0:bb348c97df44	1127	MODIFY_REG(*preg,
lypinator	0:bb348c97df44	1128	DAC_DHR12R1_DACC1DHR,
lypinator	0:bb348c97df44	1129	Data);
lypinator	0:bb348c97df44	1130	}
lypinator	0:bb348c97df44	1131
lypinator	0:bb348c97df44	1132	/**
lypinator	0:bb348c97df44	1133	* @brief Set the data to be loaded in the data holding register
lypinator	0:bb348c97df44	1134	* in format 12 bits left alignment (MSB aligned on bit 15),
lypinator	0:bb348c97df44	1135	* for the selected DAC channel.
lypinator	0:bb348c97df44	1136	* @rmtoll DHR12L1 DACC1DHR LL_DAC_ConvertData12LeftAligned\n
lypinator	0:bb348c97df44	1137	* DHR12L2 DACC2DHR LL_DAC_ConvertData12LeftAligned
lypinator	0:bb348c97df44	1138	* @param DACx DAC instance
lypinator	0:bb348c97df44	1139	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	1140	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	1141	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	1142	*
lypinator	0:bb348c97df44	1143	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	1144	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	1145	* @param Data Value between Min_Data=0x000 and Max_Data=0xFFF
lypinator	0:bb348c97df44	1146	* @retval None
lypinator	0:bb348c97df44	1147	*/
lypinator	0:bb348c97df44	1148	__STATIC_INLINE void LL_DAC_ConvertData12LeftAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
lypinator	0:bb348c97df44	1149	{
lypinator	0:bb348c97df44	1150	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12LX_REGOFFSET_MASK));
lypinator	0:bb348c97df44	1151
lypinator	0:bb348c97df44	1152	MODIFY_REG(*preg,
lypinator	0:bb348c97df44	1153	DAC_DHR12L1_DACC1DHR,
lypinator	0:bb348c97df44	1154	Data);
lypinator	0:bb348c97df44	1155	}
lypinator	0:bb348c97df44	1156
lypinator	0:bb348c97df44	1157	/**
lypinator	0:bb348c97df44	1158	* @brief Set the data to be loaded in the data holding register
lypinator	0:bb348c97df44	1159	* in format 8 bits left alignment (LSB aligned on bit 0),
lypinator	0:bb348c97df44	1160	* for the selected DAC channel.
lypinator	0:bb348c97df44	1161	* @rmtoll DHR8R1 DACC1DHR LL_DAC_ConvertData8RightAligned\n
lypinator	0:bb348c97df44	1162	* DHR8R2 DACC2DHR LL_DAC_ConvertData8RightAligned
lypinator	0:bb348c97df44	1163	* @param DACx DAC instance
lypinator	0:bb348c97df44	1164	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	1165	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	1166	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	1167	*
lypinator	0:bb348c97df44	1168	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	1169	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	1170	* @param Data Value between Min_Data=0x00 and Max_Data=0xFF
lypinator	0:bb348c97df44	1171	* @retval None
lypinator	0:bb348c97df44	1172	*/
lypinator	0:bb348c97df44	1173	__STATIC_INLINE void LL_DAC_ConvertData8RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
lypinator	0:bb348c97df44	1174	{
lypinator	0:bb348c97df44	1175	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR8RX_REGOFFSET_MASK));
lypinator	0:bb348c97df44	1176
lypinator	0:bb348c97df44	1177	MODIFY_REG(*preg,
lypinator	0:bb348c97df44	1178	DAC_DHR8R1_DACC1DHR,
lypinator	0:bb348c97df44	1179	Data);
lypinator	0:bb348c97df44	1180	}
lypinator	0:bb348c97df44	1181
lypinator	0:bb348c97df44	1182	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	1183	/**
lypinator	0:bb348c97df44	1184	* @brief Set the data to be loaded in the data holding register
lypinator	0:bb348c97df44	1185	* in format 12 bits left alignment (LSB aligned on bit 0),
lypinator	0:bb348c97df44	1186	* for both DAC channels.
lypinator	0:bb348c97df44	1187	* @rmtoll DHR12RD DACC1DHR LL_DAC_ConvertDualData12RightAligned\n
lypinator	0:bb348c97df44	1188	* DHR12RD DACC2DHR LL_DAC_ConvertDualData12RightAligned
lypinator	0:bb348c97df44	1189	* @param DACx DAC instance
lypinator	0:bb348c97df44	1190	* @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
lypinator	0:bb348c97df44	1191	* @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
lypinator	0:bb348c97df44	1192	* @retval None
lypinator	0:bb348c97df44	1193	*/
lypinator	0:bb348c97df44	1194	__STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
lypinator	0:bb348c97df44	1195	{
lypinator	0:bb348c97df44	1196	MODIFY_REG(DACx->DHR12RD,
lypinator	0:bb348c97df44	1197	(DAC_DHR12RD_DACC2DHR \| DAC_DHR12RD_DACC1DHR),
lypinator	0:bb348c97df44	1198	((DataChannel2 << DAC_DHR12RD_DACC2DHR_BITOFFSET_POS) \| DataChannel1));
lypinator	0:bb348c97df44	1199	}
lypinator	0:bb348c97df44	1200
lypinator	0:bb348c97df44	1201	/**
lypinator	0:bb348c97df44	1202	* @brief Set the data to be loaded in the data holding register
lypinator	0:bb348c97df44	1203	* in format 12 bits left alignment (MSB aligned on bit 15),
lypinator	0:bb348c97df44	1204	* for both DAC channels.
lypinator	0:bb348c97df44	1205	* @rmtoll DHR12LD DACC1DHR LL_DAC_ConvertDualData12LeftAligned\n
lypinator	0:bb348c97df44	1206	* DHR12LD DACC2DHR LL_DAC_ConvertDualData12LeftAligned
lypinator	0:bb348c97df44	1207	* @param DACx DAC instance
lypinator	0:bb348c97df44	1208	* @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
lypinator	0:bb348c97df44	1209	* @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
lypinator	0:bb348c97df44	1210	* @retval None
lypinator	0:bb348c97df44	1211	*/
lypinator	0:bb348c97df44	1212	__STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
lypinator	0:bb348c97df44	1213	{
lypinator	0:bb348c97df44	1214	/* Note: Data of DAC channel 2 shift value subtracted of 4 because */
lypinator	0:bb348c97df44	1215	/* data on 16 bits and DAC channel 2 bits field is on the 12 MSB, */
lypinator	0:bb348c97df44	1216	/* the 4 LSB must be taken into account for the shift value. */
lypinator	0:bb348c97df44	1217	MODIFY_REG(DACx->DHR12LD,
lypinator	0:bb348c97df44	1218	(DAC_DHR12LD_DACC2DHR \| DAC_DHR12LD_DACC1DHR),
lypinator	0:bb348c97df44	1219	((DataChannel2 << (DAC_DHR12LD_DACC2DHR_BITOFFSET_POS - 4U)) \| DataChannel1));
lypinator	0:bb348c97df44	1220	}
lypinator	0:bb348c97df44	1221
lypinator	0:bb348c97df44	1222	/**
lypinator	0:bb348c97df44	1223	* @brief Set the data to be loaded in the data holding register
lypinator	0:bb348c97df44	1224	* in format 8 bits left alignment (LSB aligned on bit 0),
lypinator	0:bb348c97df44	1225	* for both DAC channels.
lypinator	0:bb348c97df44	1226	* @rmtoll DHR8RD DACC1DHR LL_DAC_ConvertDualData8RightAligned\n
lypinator	0:bb348c97df44	1227	* DHR8RD DACC2DHR LL_DAC_ConvertDualData8RightAligned
lypinator	0:bb348c97df44	1228	* @param DACx DAC instance
lypinator	0:bb348c97df44	1229	* @param DataChannel1 Value between Min_Data=0x00 and Max_Data=0xFF
lypinator	0:bb348c97df44	1230	* @param DataChannel2 Value between Min_Data=0x00 and Max_Data=0xFF
lypinator	0:bb348c97df44	1231	* @retval None
lypinator	0:bb348c97df44	1232	*/
lypinator	0:bb348c97df44	1233	__STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
lypinator	0:bb348c97df44	1234	{
lypinator	0:bb348c97df44	1235	MODIFY_REG(DACx->DHR8RD,
lypinator	0:bb348c97df44	1236	(DAC_DHR8RD_DACC2DHR \| DAC_DHR8RD_DACC1DHR),
lypinator	0:bb348c97df44	1237	((DataChannel2 << DAC_DHR8RD_DACC2DHR_BITOFFSET_POS) \| DataChannel1));
lypinator	0:bb348c97df44	1238	}
lypinator	0:bb348c97df44	1239
lypinator	0:bb348c97df44	1240	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	1241	/**
lypinator	0:bb348c97df44	1242	* @brief Retrieve output data currently generated for the selected DAC channel.
lypinator	0:bb348c97df44	1243	* @note Whatever alignment and resolution settings
lypinator	0:bb348c97df44	1244	* (using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
lypinator	0:bb348c97df44	1245	* @ref LL_DAC_ConvertData12RightAligned(), ...),
lypinator	0:bb348c97df44	1246	* output data format is 12 bits right aligned (LSB aligned on bit 0).
lypinator	0:bb348c97df44	1247	* @rmtoll DOR1 DACC1DOR LL_DAC_RetrieveOutputData\n
lypinator	0:bb348c97df44	1248	* DOR2 DACC2DOR LL_DAC_RetrieveOutputData
lypinator	0:bb348c97df44	1249	* @param DACx DAC instance
lypinator	0:bb348c97df44	1250	* @param DAC_Channel This parameter can be one of the following values:
lypinator	0:bb348c97df44	1251	* @arg @ref LL_DAC_CHANNEL_1
lypinator	0:bb348c97df44	1252	* @arg @ref LL_DAC_CHANNEL_2 (1)
lypinator	0:bb348c97df44	1253	*
lypinator	0:bb348c97df44	1254	* (1) On this STM32 serie, parameter not available on all devices.
lypinator	0:bb348c97df44	1255	* Refer to device datasheet for channels availability.
lypinator	0:bb348c97df44	1256	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
lypinator	0:bb348c97df44	1257	*/
lypinator	0:bb348c97df44	1258	__STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t DAC_Channel)
lypinator	0:bb348c97df44	1259	{
lypinator	0:bb348c97df44	1260	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DORX_REGOFFSET_MASK));
lypinator	0:bb348c97df44	1261
lypinator	0:bb348c97df44	1262	return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR);
lypinator	0:bb348c97df44	1263	}
lypinator	0:bb348c97df44	1264
lypinator	0:bb348c97df44	1265	/**
lypinator	0:bb348c97df44	1266	* @}
lypinator	0:bb348c97df44	1267	*/
lypinator	0:bb348c97df44	1268
lypinator	0:bb348c97df44	1269	/** @defgroup DAC_LL_EF_FLAG_Management FLAG Management
lypinator	0:bb348c97df44	1270	* @{
lypinator	0:bb348c97df44	1271	*/
lypinator	0:bb348c97df44	1272	/**
lypinator	0:bb348c97df44	1273	* @brief Get DAC underrun flag for DAC channel 1
lypinator	0:bb348c97df44	1274	* @rmtoll SR DMAUDR1 LL_DAC_IsActiveFlag_DMAUDR1
lypinator	0:bb348c97df44	1275	* @param DACx DAC instance
lypinator	0:bb348c97df44	1276	* @retval State of bit (1 or 0).
lypinator	0:bb348c97df44	1277	*/
lypinator	0:bb348c97df44	1278	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx)
lypinator	0:bb348c97df44	1279	{
lypinator	0:bb348c97df44	1280	return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1));
lypinator	0:bb348c97df44	1281	}
lypinator	0:bb348c97df44	1282
lypinator	0:bb348c97df44	1283	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	1284	/**
lypinator	0:bb348c97df44	1285	* @brief Get DAC underrun flag for DAC channel 2
lypinator	0:bb348c97df44	1286	* @rmtoll SR DMAUDR2 LL_DAC_IsActiveFlag_DMAUDR2
lypinator	0:bb348c97df44	1287	* @param DACx DAC instance
lypinator	0:bb348c97df44	1288	* @retval State of bit (1 or 0).
lypinator	0:bb348c97df44	1289	*/
lypinator	0:bb348c97df44	1290	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(DAC_TypeDef *DACx)
lypinator	0:bb348c97df44	1291	{
lypinator	0:bb348c97df44	1292	return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2));
lypinator	0:bb348c97df44	1293	}
lypinator	0:bb348c97df44	1294	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	1295
lypinator	0:bb348c97df44	1296	/**
lypinator	0:bb348c97df44	1297	* @brief Clear DAC underrun flag for DAC channel 1
lypinator	0:bb348c97df44	1298	* @rmtoll SR DMAUDR1 LL_DAC_ClearFlag_DMAUDR1
lypinator	0:bb348c97df44	1299	* @param DACx DAC instance
lypinator	0:bb348c97df44	1300	* @retval None
lypinator	0:bb348c97df44	1301	*/
lypinator	0:bb348c97df44	1302	__STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR1(DAC_TypeDef *DACx)
lypinator	0:bb348c97df44	1303	{
lypinator	0:bb348c97df44	1304	WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR1);
lypinator	0:bb348c97df44	1305	}
lypinator	0:bb348c97df44	1306
lypinator	0:bb348c97df44	1307	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	1308	/**
lypinator	0:bb348c97df44	1309	* @brief Clear DAC underrun flag for DAC channel 2
lypinator	0:bb348c97df44	1310	* @rmtoll SR DMAUDR2 LL_DAC_ClearFlag_DMAUDR2
lypinator	0:bb348c97df44	1311	* @param DACx DAC instance
lypinator	0:bb348c97df44	1312	* @retval None
lypinator	0:bb348c97df44	1313	*/
lypinator	0:bb348c97df44	1314	__STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR2(DAC_TypeDef *DACx)
lypinator	0:bb348c97df44	1315	{
lypinator	0:bb348c97df44	1316	WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR2);
lypinator	0:bb348c97df44	1317	}
lypinator	0:bb348c97df44	1318	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	1319
lypinator	0:bb348c97df44	1320	/**
lypinator	0:bb348c97df44	1321	* @}
lypinator	0:bb348c97df44	1322	*/
lypinator	0:bb348c97df44	1323
lypinator	0:bb348c97df44	1324	/** @defgroup DAC_LL_EF_IT_Management IT management
lypinator	0:bb348c97df44	1325	* @{
lypinator	0:bb348c97df44	1326	*/
lypinator	0:bb348c97df44	1327
lypinator	0:bb348c97df44	1328	/**
lypinator	0:bb348c97df44	1329	* @brief Enable DMA underrun interrupt for DAC channel 1
lypinator	0:bb348c97df44	1330	* @rmtoll CR DMAUDRIE1 LL_DAC_EnableIT_DMAUDR1
lypinator	0:bb348c97df44	1331	* @param DACx DAC instance
lypinator	0:bb348c97df44	1332	* @retval None
lypinator	0:bb348c97df44	1333	*/
lypinator	0:bb348c97df44	1334	__STATIC_INLINE void LL_DAC_EnableIT_DMAUDR1(DAC_TypeDef *DACx)
lypinator	0:bb348c97df44	1335	{
lypinator	0:bb348c97df44	1336	SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
lypinator	0:bb348c97df44	1337	}
lypinator	0:bb348c97df44	1338
lypinator	0:bb348c97df44	1339	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	1340	/**
lypinator	0:bb348c97df44	1341	* @brief Enable DMA underrun interrupt for DAC channel 2
lypinator	0:bb348c97df44	1342	* @rmtoll CR DMAUDRIE2 LL_DAC_EnableIT_DMAUDR2
lypinator	0:bb348c97df44	1343	* @param DACx DAC instance
lypinator	0:bb348c97df44	1344	* @retval None
lypinator	0:bb348c97df44	1345	*/
lypinator	0:bb348c97df44	1346	__STATIC_INLINE void LL_DAC_EnableIT_DMAUDR2(DAC_TypeDef *DACx)
lypinator	0:bb348c97df44	1347	{
lypinator	0:bb348c97df44	1348	SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
lypinator	0:bb348c97df44	1349	}
lypinator	0:bb348c97df44	1350	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	1351
lypinator	0:bb348c97df44	1352	/**
lypinator	0:bb348c97df44	1353	* @brief Disable DMA underrun interrupt for DAC channel 1
lypinator	0:bb348c97df44	1354	* @rmtoll CR DMAUDRIE1 LL_DAC_DisableIT_DMAUDR1
lypinator	0:bb348c97df44	1355	* @param DACx DAC instance
lypinator	0:bb348c97df44	1356	* @retval None
lypinator	0:bb348c97df44	1357	*/
lypinator	0:bb348c97df44	1358	__STATIC_INLINE void LL_DAC_DisableIT_DMAUDR1(DAC_TypeDef *DACx)
lypinator	0:bb348c97df44	1359	{
lypinator	0:bb348c97df44	1360	CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
lypinator	0:bb348c97df44	1361	}
lypinator	0:bb348c97df44	1362
lypinator	0:bb348c97df44	1363	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	1364	/**
lypinator	0:bb348c97df44	1365	* @brief Disable DMA underrun interrupt for DAC channel 2
lypinator	0:bb348c97df44	1366	* @rmtoll CR DMAUDRIE2 LL_DAC_DisableIT_DMAUDR2
lypinator	0:bb348c97df44	1367	* @param DACx DAC instance
lypinator	0:bb348c97df44	1368	* @retval None
lypinator	0:bb348c97df44	1369	*/
lypinator	0:bb348c97df44	1370	__STATIC_INLINE void LL_DAC_DisableIT_DMAUDR2(DAC_TypeDef *DACx)
lypinator	0:bb348c97df44	1371	{
lypinator	0:bb348c97df44	1372	CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
lypinator	0:bb348c97df44	1373	}
lypinator	0:bb348c97df44	1374	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	1375
lypinator	0:bb348c97df44	1376	/**
lypinator	0:bb348c97df44	1377	* @brief Get DMA underrun interrupt for DAC channel 1
lypinator	0:bb348c97df44	1378	* @rmtoll CR DMAUDRIE1 LL_DAC_IsEnabledIT_DMAUDR1
lypinator	0:bb348c97df44	1379	* @param DACx DAC instance
lypinator	0:bb348c97df44	1380	* @retval State of bit (1 or 0).
lypinator	0:bb348c97df44	1381	*/
lypinator	0:bb348c97df44	1382	__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx)
lypinator	0:bb348c97df44	1383	{
lypinator	0:bb348c97df44	1384	return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1));
lypinator	0:bb348c97df44	1385	}
lypinator	0:bb348c97df44	1386
lypinator	0:bb348c97df44	1387	#if defined(DAC_CHANNEL2_SUPPORT)
lypinator	0:bb348c97df44	1388	/**
lypinator	0:bb348c97df44	1389	* @brief Get DMA underrun interrupt for DAC channel 2
lypinator	0:bb348c97df44	1390	* @rmtoll CR DMAUDRIE2 LL_DAC_IsEnabledIT_DMAUDR2
lypinator	0:bb348c97df44	1391	* @param DACx DAC instance
lypinator	0:bb348c97df44	1392	* @retval State of bit (1 or 0).
lypinator	0:bb348c97df44	1393	*/
lypinator	0:bb348c97df44	1394	__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx)
lypinator	0:bb348c97df44	1395	{
lypinator	0:bb348c97df44	1396	return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2) == (LL_DAC_IT_DMAUDRIE2));
lypinator	0:bb348c97df44	1397	}
lypinator	0:bb348c97df44	1398	#endif /* DAC_CHANNEL2_SUPPORT */
lypinator	0:bb348c97df44	1399
lypinator	0:bb348c97df44	1400	/**
lypinator	0:bb348c97df44	1401	* @}
lypinator	0:bb348c97df44	1402	*/
lypinator	0:bb348c97df44	1403
lypinator	0:bb348c97df44	1404	#if defined(USE_FULL_LL_DRIVER)
lypinator	0:bb348c97df44	1405	/** @defgroup DAC_LL_EF_Init Initialization and de-initialization functions
lypinator	0:bb348c97df44	1406	* @{
lypinator	0:bb348c97df44	1407	*/
lypinator	0:bb348c97df44	1408
lypinator	0:bb348c97df44	1409	ErrorStatus LL_DAC_DeInit(DAC_TypeDef* DACx);
lypinator	0:bb348c97df44	1410	ErrorStatus LL_DAC_Init(DAC_TypeDef* DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef* DAC_InitStruct);
lypinator	0:bb348c97df44	1411	void LL_DAC_StructInit(LL_DAC_InitTypeDef* DAC_InitStruct);
lypinator	0:bb348c97df44	1412
lypinator	0:bb348c97df44	1413	/**
lypinator	0:bb348c97df44	1414	* @}
lypinator	0:bb348c97df44	1415	*/
lypinator	0:bb348c97df44	1416	#endif /* USE_FULL_LL_DRIVER */
lypinator	0:bb348c97df44	1417
lypinator	0:bb348c97df44	1418	/**
lypinator	0:bb348c97df44	1419	* @}
lypinator	0:bb348c97df44	1420	*/
lypinator	0:bb348c97df44	1421
lypinator	0:bb348c97df44	1422	/**
lypinator	0:bb348c97df44	1423	* @}
lypinator	0:bb348c97df44	1424	*/
lypinator	0:bb348c97df44	1425
lypinator	0:bb348c97df44	1426	#endif /* DAC */
lypinator	0:bb348c97df44	1427
lypinator	0:bb348c97df44	1428	/**
lypinator	0:bb348c97df44	1429	* @}
lypinator	0:bb348c97df44	1430	*/
lypinator	0:bb348c97df44	1431
lypinator	0:bb348c97df44	1432	#ifdef __cplusplus
lypinator	0:bb348c97df44	1433	}
lypinator	0:bb348c97df44	1434	#endif
lypinator	0:bb348c97df44	1435
lypinator	0:bb348c97df44	1436	#endif /* __STM32F4xx_LL_DAC_H */
lypinator	0:bb348c97df44	1437
lypinator	0:bb348c97df44	1438	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	16 Sep 2020
Imports:	1
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	1
Followers:	1

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_dac.h@0:bb348c97df44, 2020-09-16 (annotated)

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