Thomas Lyp
Initial commit
mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_bus.h@0:bb348c97df44, 2020-09-16 (annotated)
- Committer:
- lypinator
- Date:
- Wed Sep 16 01:11:49 2020 +0000
- Revision:
- 0:bb348c97df44
Added PWM
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| lypinator | 0:bb348c97df44 | 1 | /** |
| lypinator | 0:bb348c97df44 | 2 | ****************************************************************************** |
| lypinator | 0:bb348c97df44 | 3 | * @file stm32f4xx_ll_bus.h |
| lypinator | 0:bb348c97df44 | 4 | * @author MCD Application Team |
| lypinator | 0:bb348c97df44 | 5 | * @brief Header file of BUS LL module. |
| lypinator | 0:bb348c97df44 | 6 | |
| lypinator | 0:bb348c97df44 | 7 | @verbatim |
| lypinator | 0:bb348c97df44 | 8 | ##### RCC Limitations ##### |
| lypinator | 0:bb348c97df44 | 9 | ============================================================================== |
| lypinator | 0:bb348c97df44 | 10 | [..] |
| lypinator | 0:bb348c97df44 | 11 | A delay between an RCC peripheral clock enable and the effective peripheral |
| lypinator | 0:bb348c97df44 | 12 | enabling should be taken into account in order to manage the peripheral read/write |
| lypinator | 0:bb348c97df44 | 13 | from/to registers. |
| lypinator | 0:bb348c97df44 | 14 | (+) This delay depends on the peripheral mapping. |
| lypinator | 0:bb348c97df44 | 15 | (++) AHB & APB peripherals, 1 dummy read is necessary |
| lypinator | 0:bb348c97df44 | 16 | |
| lypinator | 0:bb348c97df44 | 17 | [..] |
| lypinator | 0:bb348c97df44 | 18 | Workarounds: |
| lypinator | 0:bb348c97df44 | 19 | (#) For AHB & APB peripherals, a dummy read to the peripheral register has been |
| lypinator | 0:bb348c97df44 | 20 | inserted in each LL_{BUS}_GRP{x}_EnableClock() function. |
| lypinator | 0:bb348c97df44 | 21 | |
| lypinator | 0:bb348c97df44 | 22 | @endverbatim |
| lypinator | 0:bb348c97df44 | 23 | ****************************************************************************** |
| lypinator | 0:bb348c97df44 | 24 | * @attention |
| lypinator | 0:bb348c97df44 | 25 | * |
| lypinator | 0:bb348c97df44 | 26 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| lypinator | 0:bb348c97df44 | 27 | * |
| lypinator | 0:bb348c97df44 | 28 | * Redistribution and use in source and binary forms, with or without modification, |
| lypinator | 0:bb348c97df44 | 29 | * are permitted provided that the following conditions are met: |
| lypinator | 0:bb348c97df44 | 30 | * 1. Redistributions of source code must retain the above copyright notice, |
| lypinator | 0:bb348c97df44 | 31 | * this list of conditions and the following disclaimer. |
| lypinator | 0:bb348c97df44 | 32 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| lypinator | 0:bb348c97df44 | 33 | * this list of conditions and the following disclaimer in the documentation |
| lypinator | 0:bb348c97df44 | 34 | * and/or other materials provided with the distribution. |
| lypinator | 0:bb348c97df44 | 35 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| lypinator | 0:bb348c97df44 | 36 | * may be used to endorse or promote products derived from this software |
| lypinator | 0:bb348c97df44 | 37 | * without specific prior written permission. |
| lypinator | 0:bb348c97df44 | 38 | * |
| lypinator | 0:bb348c97df44 | 39 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| lypinator | 0:bb348c97df44 | 40 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| lypinator | 0:bb348c97df44 | 41 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| lypinator | 0:bb348c97df44 | 42 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| lypinator | 0:bb348c97df44 | 43 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| lypinator | 0:bb348c97df44 | 44 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| lypinator | 0:bb348c97df44 | 45 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| lypinator | 0:bb348c97df44 | 46 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| lypinator | 0:bb348c97df44 | 47 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| lypinator | 0:bb348c97df44 | 48 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| lypinator | 0:bb348c97df44 | 49 | * |
| lypinator | 0:bb348c97df44 | 50 | ****************************************************************************** |
| lypinator | 0:bb348c97df44 | 51 | */ |
| lypinator | 0:bb348c97df44 | 52 | |
| lypinator | 0:bb348c97df44 | 53 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| lypinator | 0:bb348c97df44 | 54 | #ifndef __STM32F4xx_LL_BUS_H |
| lypinator | 0:bb348c97df44 | 55 | #define __STM32F4xx_LL_BUS_H |
| lypinator | 0:bb348c97df44 | 56 | |
| lypinator | 0:bb348c97df44 | 57 | #ifdef __cplusplus |
| lypinator | 0:bb348c97df44 | 58 | extern "C" { |
| lypinator | 0:bb348c97df44 | 59 | #endif |
| lypinator | 0:bb348c97df44 | 60 | |
| lypinator | 0:bb348c97df44 | 61 | /* Includes ------------------------------------------------------------------*/ |
| lypinator | 0:bb348c97df44 | 62 | #include "stm32f4xx.h" |
| lypinator | 0:bb348c97df44 | 63 | |
| lypinator | 0:bb348c97df44 | 64 | /** @addtogroup STM32F4xx_LL_Driver |
| lypinator | 0:bb348c97df44 | 65 | * @{ |
| lypinator | 0:bb348c97df44 | 66 | */ |
| lypinator | 0:bb348c97df44 | 67 | |
| lypinator | 0:bb348c97df44 | 68 | #if defined(RCC) |
| lypinator | 0:bb348c97df44 | 69 | |
| lypinator | 0:bb348c97df44 | 70 | /** @defgroup BUS_LL BUS |
| lypinator | 0:bb348c97df44 | 71 | * @{ |
| lypinator | 0:bb348c97df44 | 72 | */ |
| lypinator | 0:bb348c97df44 | 73 | |
| lypinator | 0:bb348c97df44 | 74 | /* Private types -------------------------------------------------------------*/ |
| lypinator | 0:bb348c97df44 | 75 | /* Private variables ---------------------------------------------------------*/ |
| lypinator | 0:bb348c97df44 | 76 | /* Private constants ---------------------------------------------------------*/ |
| lypinator | 0:bb348c97df44 | 77 | /* Private macros ------------------------------------------------------------*/ |
| lypinator | 0:bb348c97df44 | 78 | /* Exported types ------------------------------------------------------------*/ |
| lypinator | 0:bb348c97df44 | 79 | /* Exported constants --------------------------------------------------------*/ |
| lypinator | 0:bb348c97df44 | 80 | /** @defgroup BUS_LL_Exported_Constants BUS Exported Constants |
| lypinator | 0:bb348c97df44 | 81 | * @{ |
| lypinator | 0:bb348c97df44 | 82 | */ |
| lypinator | 0:bb348c97df44 | 83 | |
| lypinator | 0:bb348c97df44 | 84 | /** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH AHB1 GRP1 PERIPH |
| lypinator | 0:bb348c97df44 | 85 | * @{ |
| lypinator | 0:bb348c97df44 | 86 | */ |
| lypinator | 0:bb348c97df44 | 87 | #define LL_AHB1_GRP1_PERIPH_ALL 0xFFFFFFFFU |
| lypinator | 0:bb348c97df44 | 88 | #define LL_AHB1_GRP1_PERIPH_GPIOA RCC_AHB1ENR_GPIOAEN |
| lypinator | 0:bb348c97df44 | 89 | #define LL_AHB1_GRP1_PERIPH_GPIOB RCC_AHB1ENR_GPIOBEN |
| lypinator | 0:bb348c97df44 | 90 | #define LL_AHB1_GRP1_PERIPH_GPIOC RCC_AHB1ENR_GPIOCEN |
| lypinator | 0:bb348c97df44 | 91 | #if defined(GPIOD) |
| lypinator | 0:bb348c97df44 | 92 | #define LL_AHB1_GRP1_PERIPH_GPIOD RCC_AHB1ENR_GPIODEN |
| lypinator | 0:bb348c97df44 | 93 | #endif /* GPIOD */ |
| lypinator | 0:bb348c97df44 | 94 | #if defined(GPIOE) |
| lypinator | 0:bb348c97df44 | 95 | #define LL_AHB1_GRP1_PERIPH_GPIOE RCC_AHB1ENR_GPIOEEN |
| lypinator | 0:bb348c97df44 | 96 | #endif /* GPIOE */ |
| lypinator | 0:bb348c97df44 | 97 | #if defined(GPIOF) |
| lypinator | 0:bb348c97df44 | 98 | #define LL_AHB1_GRP1_PERIPH_GPIOF RCC_AHB1ENR_GPIOFEN |
| lypinator | 0:bb348c97df44 | 99 | #endif /* GPIOF */ |
| lypinator | 0:bb348c97df44 | 100 | #if defined(GPIOG) |
| lypinator | 0:bb348c97df44 | 101 | #define LL_AHB1_GRP1_PERIPH_GPIOG RCC_AHB1ENR_GPIOGEN |
| lypinator | 0:bb348c97df44 | 102 | #endif /* GPIOG */ |
| lypinator | 0:bb348c97df44 | 103 | #if defined(GPIOH) |
| lypinator | 0:bb348c97df44 | 104 | #define LL_AHB1_GRP1_PERIPH_GPIOH RCC_AHB1ENR_GPIOHEN |
| lypinator | 0:bb348c97df44 | 105 | #endif /* GPIOH */ |
| lypinator | 0:bb348c97df44 | 106 | #if defined(GPIOI) |
| lypinator | 0:bb348c97df44 | 107 | #define LL_AHB1_GRP1_PERIPH_GPIOI RCC_AHB1ENR_GPIOIEN |
| lypinator | 0:bb348c97df44 | 108 | #endif /* GPIOI */ |
| lypinator | 0:bb348c97df44 | 109 | #if defined(GPIOJ) |
| lypinator | 0:bb348c97df44 | 110 | #define LL_AHB1_GRP1_PERIPH_GPIOJ RCC_AHB1ENR_GPIOJEN |
| lypinator | 0:bb348c97df44 | 111 | #endif /* GPIOJ */ |
| lypinator | 0:bb348c97df44 | 112 | #if defined(GPIOK) |
| lypinator | 0:bb348c97df44 | 113 | #define LL_AHB1_GRP1_PERIPH_GPIOK RCC_AHB1ENR_GPIOKEN |
| lypinator | 0:bb348c97df44 | 114 | #endif /* GPIOK */ |
| lypinator | 0:bb348c97df44 | 115 | #define LL_AHB1_GRP1_PERIPH_CRC RCC_AHB1ENR_CRCEN |
| lypinator | 0:bb348c97df44 | 116 | #if defined(RCC_AHB1ENR_BKPSRAMEN) |
| lypinator | 0:bb348c97df44 | 117 | #define LL_AHB1_GRP1_PERIPH_BKPSRAM RCC_AHB1ENR_BKPSRAMEN |
| lypinator | 0:bb348c97df44 | 118 | #endif /* RCC_AHB1ENR_BKPSRAMEN */ |
| lypinator | 0:bb348c97df44 | 119 | #if defined(RCC_AHB1ENR_CCMDATARAMEN) |
| lypinator | 0:bb348c97df44 | 120 | #define LL_AHB1_GRP1_PERIPH_CCMDATARAM RCC_AHB1ENR_CCMDATARAMEN |
| lypinator | 0:bb348c97df44 | 121 | #endif /* RCC_AHB1ENR_CCMDATARAMEN */ |
| lypinator | 0:bb348c97df44 | 122 | #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHB1ENR_DMA1EN |
| lypinator | 0:bb348c97df44 | 123 | #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHB1ENR_DMA2EN |
| lypinator | 0:bb348c97df44 | 124 | #if defined(RCC_AHB1ENR_RNGEN) |
| lypinator | 0:bb348c97df44 | 125 | #define LL_AHB1_GRP1_PERIPH_RNG RCC_AHB1ENR_RNGEN |
| lypinator | 0:bb348c97df44 | 126 | #endif /* RCC_AHB1ENR_RNGEN */ |
| lypinator | 0:bb348c97df44 | 127 | #if defined(DMA2D) |
| lypinator | 0:bb348c97df44 | 128 | #define LL_AHB1_GRP1_PERIPH_DMA2D RCC_AHB1ENR_DMA2DEN |
| lypinator | 0:bb348c97df44 | 129 | #endif /* DMA2D */ |
| lypinator | 0:bb348c97df44 | 130 | #if defined(ETH) |
| lypinator | 0:bb348c97df44 | 131 | #define LL_AHB1_GRP1_PERIPH_ETHMAC RCC_AHB1ENR_ETHMACEN |
| lypinator | 0:bb348c97df44 | 132 | #define LL_AHB1_GRP1_PERIPH_ETHMACTX RCC_AHB1ENR_ETHMACTXEN |
| lypinator | 0:bb348c97df44 | 133 | #define LL_AHB1_GRP1_PERIPH_ETHMACRX RCC_AHB1ENR_ETHMACRXEN |
| lypinator | 0:bb348c97df44 | 134 | #define LL_AHB1_GRP1_PERIPH_ETHMACPTP RCC_AHB1ENR_ETHMACPTPEN |
| lypinator | 0:bb348c97df44 | 135 | #endif /* ETH */ |
| lypinator | 0:bb348c97df44 | 136 | #if defined(USB_OTG_HS) |
| lypinator | 0:bb348c97df44 | 137 | #define LL_AHB1_GRP1_PERIPH_OTGHS RCC_AHB1ENR_OTGHSEN |
| lypinator | 0:bb348c97df44 | 138 | #define LL_AHB1_GRP1_PERIPH_OTGHSULPI RCC_AHB1ENR_OTGHSULPIEN |
| lypinator | 0:bb348c97df44 | 139 | #endif /* USB_OTG_HS */ |
| lypinator | 0:bb348c97df44 | 140 | #define LL_AHB1_GRP1_PERIPH_FLITF RCC_AHB1LPENR_FLITFLPEN |
| lypinator | 0:bb348c97df44 | 141 | #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1LPENR_SRAM1LPEN |
| lypinator | 0:bb348c97df44 | 142 | #if defined(RCC_AHB1LPENR_SRAM2LPEN) |
| lypinator | 0:bb348c97df44 | 143 | #define LL_AHB1_GRP1_PERIPH_SRAM2 RCC_AHB1LPENR_SRAM2LPEN |
| lypinator | 0:bb348c97df44 | 144 | #endif /* RCC_AHB1LPENR_SRAM2LPEN */ |
| lypinator | 0:bb348c97df44 | 145 | #if defined(RCC_AHB1LPENR_SRAM3LPEN) |
| lypinator | 0:bb348c97df44 | 146 | #define LL_AHB1_GRP1_PERIPH_SRAM3 RCC_AHB1LPENR_SRAM3LPEN |
| lypinator | 0:bb348c97df44 | 147 | #endif /* RCC_AHB1LPENR_SRAM3LPEN */ |
| lypinator | 0:bb348c97df44 | 148 | /** |
| lypinator | 0:bb348c97df44 | 149 | * @} |
| lypinator | 0:bb348c97df44 | 150 | */ |
| lypinator | 0:bb348c97df44 | 151 | |
| lypinator | 0:bb348c97df44 | 152 | #if defined(RCC_AHB2_SUPPORT) |
| lypinator | 0:bb348c97df44 | 153 | /** @defgroup BUS_LL_EC_AHB2_GRP1_PERIPH AHB2 GRP1 PERIPH |
| lypinator | 0:bb348c97df44 | 154 | * @{ |
| lypinator | 0:bb348c97df44 | 155 | */ |
| lypinator | 0:bb348c97df44 | 156 | #define LL_AHB2_GRP1_PERIPH_ALL 0xFFFFFFFFU |
| lypinator | 0:bb348c97df44 | 157 | #if defined(DCMI) |
| lypinator | 0:bb348c97df44 | 158 | #define LL_AHB2_GRP1_PERIPH_DCMI RCC_AHB2ENR_DCMIEN |
| lypinator | 0:bb348c97df44 | 159 | #endif /* DCMI */ |
| lypinator | 0:bb348c97df44 | 160 | #if defined(CRYP) |
| lypinator | 0:bb348c97df44 | 161 | #define LL_AHB2_GRP1_PERIPH_CRYP RCC_AHB2ENR_CRYPEN |
| lypinator | 0:bb348c97df44 | 162 | #endif /* CRYP */ |
| lypinator | 0:bb348c97df44 | 163 | #if defined(AES) |
| lypinator | 0:bb348c97df44 | 164 | #define LL_AHB2_GRP1_PERIPH_AES RCC_AHB2ENR_AESEN |
| lypinator | 0:bb348c97df44 | 165 | #endif /* AES */ |
| lypinator | 0:bb348c97df44 | 166 | #if defined(HASH) |
| lypinator | 0:bb348c97df44 | 167 | #define LL_AHB2_GRP1_PERIPH_HASH RCC_AHB2ENR_HASHEN |
| lypinator | 0:bb348c97df44 | 168 | #endif /* HASH */ |
| lypinator | 0:bb348c97df44 | 169 | #if defined(RCC_AHB2ENR_RNGEN) |
| lypinator | 0:bb348c97df44 | 170 | #define LL_AHB2_GRP1_PERIPH_RNG RCC_AHB2ENR_RNGEN |
| lypinator | 0:bb348c97df44 | 171 | #endif /* RCC_AHB2ENR_RNGEN */ |
| lypinator | 0:bb348c97df44 | 172 | #if defined(USB_OTG_FS) |
| lypinator | 0:bb348c97df44 | 173 | #define LL_AHB2_GRP1_PERIPH_OTGFS RCC_AHB2ENR_OTGFSEN |
| lypinator | 0:bb348c97df44 | 174 | #endif /* USB_OTG_FS */ |
| lypinator | 0:bb348c97df44 | 175 | /** |
| lypinator | 0:bb348c97df44 | 176 | * @} |
| lypinator | 0:bb348c97df44 | 177 | */ |
| lypinator | 0:bb348c97df44 | 178 | #endif /* RCC_AHB2_SUPPORT */ |
| lypinator | 0:bb348c97df44 | 179 | |
| lypinator | 0:bb348c97df44 | 180 | #if defined(RCC_AHB3_SUPPORT) |
| lypinator | 0:bb348c97df44 | 181 | /** @defgroup BUS_LL_EC_AHB3_GRP1_PERIPH AHB3 GRP1 PERIPH |
| lypinator | 0:bb348c97df44 | 182 | * @{ |
| lypinator | 0:bb348c97df44 | 183 | */ |
| lypinator | 0:bb348c97df44 | 184 | #define LL_AHB3_GRP1_PERIPH_ALL 0xFFFFFFFFU |
| lypinator | 0:bb348c97df44 | 185 | #if defined(FSMC_Bank1) |
| lypinator | 0:bb348c97df44 | 186 | #define LL_AHB3_GRP1_PERIPH_FSMC RCC_AHB3ENR_FSMCEN |
| lypinator | 0:bb348c97df44 | 187 | #endif /* FSMC_Bank1 */ |
| lypinator | 0:bb348c97df44 | 188 | #if defined(FMC_Bank1) |
| lypinator | 0:bb348c97df44 | 189 | #define LL_AHB3_GRP1_PERIPH_FMC RCC_AHB3ENR_FMCEN |
| lypinator | 0:bb348c97df44 | 190 | #endif /* FMC_Bank1 */ |
| lypinator | 0:bb348c97df44 | 191 | #if defined(QUADSPI) |
| lypinator | 0:bb348c97df44 | 192 | #define LL_AHB3_GRP1_PERIPH_QSPI RCC_AHB3ENR_QSPIEN |
| lypinator | 0:bb348c97df44 | 193 | #endif /* QUADSPI */ |
| lypinator | 0:bb348c97df44 | 194 | /** |
| lypinator | 0:bb348c97df44 | 195 | * @} |
| lypinator | 0:bb348c97df44 | 196 | */ |
| lypinator | 0:bb348c97df44 | 197 | #endif /* RCC_AHB3_SUPPORT */ |
| lypinator | 0:bb348c97df44 | 198 | |
| lypinator | 0:bb348c97df44 | 199 | /** @defgroup BUS_LL_EC_APB1_GRP1_PERIPH APB1 GRP1 PERIPH |
| lypinator | 0:bb348c97df44 | 200 | * @{ |
| lypinator | 0:bb348c97df44 | 201 | */ |
| lypinator | 0:bb348c97df44 | 202 | #define LL_APB1_GRP1_PERIPH_ALL 0xFFFFFFFFU |
| lypinator | 0:bb348c97df44 | 203 | #if defined(TIM2) |
| lypinator | 0:bb348c97df44 | 204 | #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR_TIM2EN |
| lypinator | 0:bb348c97df44 | 205 | #endif /* TIM2 */ |
| lypinator | 0:bb348c97df44 | 206 | #if defined(TIM3) |
| lypinator | 0:bb348c97df44 | 207 | #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1ENR_TIM3EN |
| lypinator | 0:bb348c97df44 | 208 | #endif /* TIM3 */ |
| lypinator | 0:bb348c97df44 | 209 | #if defined(TIM4) |
| lypinator | 0:bb348c97df44 | 210 | #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR_TIM4EN |
| lypinator | 0:bb348c97df44 | 211 | #endif /* TIM4 */ |
| lypinator | 0:bb348c97df44 | 212 | #define LL_APB1_GRP1_PERIPH_TIM5 RCC_APB1ENR_TIM5EN |
| lypinator | 0:bb348c97df44 | 213 | #if defined(TIM6) |
| lypinator | 0:bb348c97df44 | 214 | #define LL_APB1_GRP1_PERIPH_TIM6 RCC_APB1ENR_TIM6EN |
| lypinator | 0:bb348c97df44 | 215 | #endif /* TIM6 */ |
| lypinator | 0:bb348c97df44 | 216 | #if defined(TIM7) |
| lypinator | 0:bb348c97df44 | 217 | #define LL_APB1_GRP1_PERIPH_TIM7 RCC_APB1ENR_TIM7EN |
| lypinator | 0:bb348c97df44 | 218 | #endif /* TIM7 */ |
| lypinator | 0:bb348c97df44 | 219 | #if defined(TIM12) |
| lypinator | 0:bb348c97df44 | 220 | #define LL_APB1_GRP1_PERIPH_TIM12 RCC_APB1ENR_TIM12EN |
| lypinator | 0:bb348c97df44 | 221 | #endif /* TIM12 */ |
| lypinator | 0:bb348c97df44 | 222 | #if defined(TIM13) |
| lypinator | 0:bb348c97df44 | 223 | #define LL_APB1_GRP1_PERIPH_TIM13 RCC_APB1ENR_TIM13EN |
| lypinator | 0:bb348c97df44 | 224 | #endif /* TIM13 */ |
| lypinator | 0:bb348c97df44 | 225 | #if defined(TIM14) |
| lypinator | 0:bb348c97df44 | 226 | #define LL_APB1_GRP1_PERIPH_TIM14 RCC_APB1ENR_TIM14EN |
| lypinator | 0:bb348c97df44 | 227 | #endif /* TIM14 */ |
| lypinator | 0:bb348c97df44 | 228 | #if defined(LPTIM1) |
| lypinator | 0:bb348c97df44 | 229 | #define LL_APB1_GRP1_PERIPH_LPTIM1 RCC_APB1ENR_LPTIM1EN |
| lypinator | 0:bb348c97df44 | 230 | #endif /* LPTIM1 */ |
| lypinator | 0:bb348c97df44 | 231 | #if defined(RCC_APB1ENR_RTCAPBEN) |
| lypinator | 0:bb348c97df44 | 232 | #define LL_APB1_GRP1_PERIPH_RTCAPB RCC_APB1ENR_RTCAPBEN |
| lypinator | 0:bb348c97df44 | 233 | #endif /* RCC_APB1ENR_RTCAPBEN */ |
| lypinator | 0:bb348c97df44 | 234 | #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN |
| lypinator | 0:bb348c97df44 | 235 | #if defined(SPI2) |
| lypinator | 0:bb348c97df44 | 236 | #define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN |
| lypinator | 0:bb348c97df44 | 237 | #endif /* SPI2 */ |
| lypinator | 0:bb348c97df44 | 238 | #if defined(SPI3) |
| lypinator | 0:bb348c97df44 | 239 | #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN |
| lypinator | 0:bb348c97df44 | 240 | #endif /* SPI3 */ |
| lypinator | 0:bb348c97df44 | 241 | #if defined(SPDIFRX) |
| lypinator | 0:bb348c97df44 | 242 | #define LL_APB1_GRP1_PERIPH_SPDIFRX RCC_APB1ENR_SPDIFRXEN |
| lypinator | 0:bb348c97df44 | 243 | #endif /* SPDIFRX */ |
| lypinator | 0:bb348c97df44 | 244 | #define LL_APB1_GRP1_PERIPH_USART2 RCC_APB1ENR_USART2EN |
| lypinator | 0:bb348c97df44 | 245 | #if defined(USART3) |
| lypinator | 0:bb348c97df44 | 246 | #define LL_APB1_GRP1_PERIPH_USART3 RCC_APB1ENR_USART3EN |
| lypinator | 0:bb348c97df44 | 247 | #endif /* USART3 */ |
| lypinator | 0:bb348c97df44 | 248 | #if defined(UART4) |
| lypinator | 0:bb348c97df44 | 249 | #define LL_APB1_GRP1_PERIPH_UART4 RCC_APB1ENR_UART4EN |
| lypinator | 0:bb348c97df44 | 250 | #endif /* UART4 */ |
| lypinator | 0:bb348c97df44 | 251 | #if defined(UART5) |
| lypinator | 0:bb348c97df44 | 252 | #define LL_APB1_GRP1_PERIPH_UART5 RCC_APB1ENR_UART5EN |
| lypinator | 0:bb348c97df44 | 253 | #endif /* UART5 */ |
| lypinator | 0:bb348c97df44 | 254 | #define LL_APB1_GRP1_PERIPH_I2C1 RCC_APB1ENR_I2C1EN |
| lypinator | 0:bb348c97df44 | 255 | #define LL_APB1_GRP1_PERIPH_I2C2 RCC_APB1ENR_I2C2EN |
| lypinator | 0:bb348c97df44 | 256 | #if defined(I2C3) |
| lypinator | 0:bb348c97df44 | 257 | #define LL_APB1_GRP1_PERIPH_I2C3 RCC_APB1ENR_I2C3EN |
| lypinator | 0:bb348c97df44 | 258 | #endif /* I2C3 */ |
| lypinator | 0:bb348c97df44 | 259 | #if defined(FMPI2C1) |
| lypinator | 0:bb348c97df44 | 260 | #define LL_APB1_GRP1_PERIPH_FMPI2C1 RCC_APB1ENR_FMPI2C1EN |
| lypinator | 0:bb348c97df44 | 261 | #endif /* FMPI2C1 */ |
| lypinator | 0:bb348c97df44 | 262 | #if defined(CAN1) |
| lypinator | 0:bb348c97df44 | 263 | #define LL_APB1_GRP1_PERIPH_CAN1 RCC_APB1ENR_CAN1EN |
| lypinator | 0:bb348c97df44 | 264 | #endif /* CAN1 */ |
| lypinator | 0:bb348c97df44 | 265 | #if defined(CAN2) |
| lypinator | 0:bb348c97df44 | 266 | #define LL_APB1_GRP1_PERIPH_CAN2 RCC_APB1ENR_CAN2EN |
| lypinator | 0:bb348c97df44 | 267 | #endif /* CAN2 */ |
| lypinator | 0:bb348c97df44 | 268 | #if defined(CAN3) |
| lypinator | 0:bb348c97df44 | 269 | #define LL_APB1_GRP1_PERIPH_CAN3 RCC_APB1ENR_CAN3EN |
| lypinator | 0:bb348c97df44 | 270 | #endif /* CAN3 */ |
| lypinator | 0:bb348c97df44 | 271 | #if defined(CEC) |
| lypinator | 0:bb348c97df44 | 272 | #define LL_APB1_GRP1_PERIPH_CEC RCC_APB1ENR_CECEN |
| lypinator | 0:bb348c97df44 | 273 | #endif /* CEC */ |
| lypinator | 0:bb348c97df44 | 274 | #define LL_APB1_GRP1_PERIPH_PWR RCC_APB1ENR_PWREN |
| lypinator | 0:bb348c97df44 | 275 | #if defined(DAC1) |
| lypinator | 0:bb348c97df44 | 276 | #define LL_APB1_GRP1_PERIPH_DAC1 RCC_APB1ENR_DACEN |
| lypinator | 0:bb348c97df44 | 277 | #endif /* DAC1 */ |
| lypinator | 0:bb348c97df44 | 278 | #if defined(UART7) |
| lypinator | 0:bb348c97df44 | 279 | #define LL_APB1_GRP1_PERIPH_UART7 RCC_APB1ENR_UART7EN |
| lypinator | 0:bb348c97df44 | 280 | #endif /* UART7 */ |
| lypinator | 0:bb348c97df44 | 281 | #if defined(UART8) |
| lypinator | 0:bb348c97df44 | 282 | #define LL_APB1_GRP1_PERIPH_UART8 RCC_APB1ENR_UART8EN |
| lypinator | 0:bb348c97df44 | 283 | #endif /* UART8 */ |
| lypinator | 0:bb348c97df44 | 284 | /** |
| lypinator | 0:bb348c97df44 | 285 | * @} |
| lypinator | 0:bb348c97df44 | 286 | */ |
| lypinator | 0:bb348c97df44 | 287 | |
| lypinator | 0:bb348c97df44 | 288 | /** @defgroup BUS_LL_EC_APB2_GRP1_PERIPH APB2 GRP1 PERIPH |
| lypinator | 0:bb348c97df44 | 289 | * @{ |
| lypinator | 0:bb348c97df44 | 290 | */ |
| lypinator | 0:bb348c97df44 | 291 | #define LL_APB2_GRP1_PERIPH_ALL 0xFFFFFFFFU |
| lypinator | 0:bb348c97df44 | 292 | #define LL_APB2_GRP1_PERIPH_TIM1 RCC_APB2ENR_TIM1EN |
| lypinator | 0:bb348c97df44 | 293 | #if defined(TIM8) |
| lypinator | 0:bb348c97df44 | 294 | #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN |
| lypinator | 0:bb348c97df44 | 295 | #endif /* TIM8 */ |
| lypinator | 0:bb348c97df44 | 296 | #define LL_APB2_GRP1_PERIPH_USART1 RCC_APB2ENR_USART1EN |
| lypinator | 0:bb348c97df44 | 297 | #if defined(USART6) |
| lypinator | 0:bb348c97df44 | 298 | #define LL_APB2_GRP1_PERIPH_USART6 RCC_APB2ENR_USART6EN |
| lypinator | 0:bb348c97df44 | 299 | #endif /* USART6 */ |
| lypinator | 0:bb348c97df44 | 300 | #if defined(UART9) |
| lypinator | 0:bb348c97df44 | 301 | #define LL_APB2_GRP1_PERIPH_UART9 RCC_APB2ENR_UART9EN |
| lypinator | 0:bb348c97df44 | 302 | #endif /* UART9 */ |
| lypinator | 0:bb348c97df44 | 303 | #if defined(UART10) |
| lypinator | 0:bb348c97df44 | 304 | #define LL_APB2_GRP1_PERIPH_UART10 RCC_APB2ENR_UART10EN |
| lypinator | 0:bb348c97df44 | 305 | #endif /* UART10 */ |
| lypinator | 0:bb348c97df44 | 306 | #define LL_APB2_GRP1_PERIPH_ADC1 RCC_APB2ENR_ADC1EN |
| lypinator | 0:bb348c97df44 | 307 | #if defined(ADC2) |
| lypinator | 0:bb348c97df44 | 308 | #define LL_APB2_GRP1_PERIPH_ADC2 RCC_APB2ENR_ADC2EN |
| lypinator | 0:bb348c97df44 | 309 | #endif /* ADC2 */ |
| lypinator | 0:bb348c97df44 | 310 | #if defined(ADC3) |
| lypinator | 0:bb348c97df44 | 311 | #define LL_APB2_GRP1_PERIPH_ADC3 RCC_APB2ENR_ADC3EN |
| lypinator | 0:bb348c97df44 | 312 | #endif /* ADC3 */ |
| lypinator | 0:bb348c97df44 | 313 | #if defined(SDIO) |
| lypinator | 0:bb348c97df44 | 314 | #define LL_APB2_GRP1_PERIPH_SDIO RCC_APB2ENR_SDIOEN |
| lypinator | 0:bb348c97df44 | 315 | #endif /* SDIO */ |
| lypinator | 0:bb348c97df44 | 316 | #define LL_APB2_GRP1_PERIPH_SPI1 RCC_APB2ENR_SPI1EN |
| lypinator | 0:bb348c97df44 | 317 | #if defined(SPI4) |
| lypinator | 0:bb348c97df44 | 318 | #define LL_APB2_GRP1_PERIPH_SPI4 RCC_APB2ENR_SPI4EN |
| lypinator | 0:bb348c97df44 | 319 | #endif /* SPI4 */ |
| lypinator | 0:bb348c97df44 | 320 | #define LL_APB2_GRP1_PERIPH_SYSCFG RCC_APB2ENR_SYSCFGEN |
| lypinator | 0:bb348c97df44 | 321 | #if defined(RCC_APB2ENR_EXTITEN) |
| lypinator | 0:bb348c97df44 | 322 | #define LL_APB2_GRP1_PERIPH_EXTI RCC_APB2ENR_EXTITEN |
| lypinator | 0:bb348c97df44 | 323 | #endif /* RCC_APB2ENR_EXTITEN */ |
| lypinator | 0:bb348c97df44 | 324 | #define LL_APB2_GRP1_PERIPH_TIM9 RCC_APB2ENR_TIM9EN |
| lypinator | 0:bb348c97df44 | 325 | #if defined(TIM10) |
| lypinator | 0:bb348c97df44 | 326 | #define LL_APB2_GRP1_PERIPH_TIM10 RCC_APB2ENR_TIM10EN |
| lypinator | 0:bb348c97df44 | 327 | #endif /* TIM10 */ |
| lypinator | 0:bb348c97df44 | 328 | #define LL_APB2_GRP1_PERIPH_TIM11 RCC_APB2ENR_TIM11EN |
| lypinator | 0:bb348c97df44 | 329 | #if defined(SPI5) |
| lypinator | 0:bb348c97df44 | 330 | #define LL_APB2_GRP1_PERIPH_SPI5 RCC_APB2ENR_SPI5EN |
| lypinator | 0:bb348c97df44 | 331 | #endif /* SPI5 */ |
| lypinator | 0:bb348c97df44 | 332 | #if defined(SPI6) |
| lypinator | 0:bb348c97df44 | 333 | #define LL_APB2_GRP1_PERIPH_SPI6 RCC_APB2ENR_SPI6EN |
| lypinator | 0:bb348c97df44 | 334 | #endif /* SPI6 */ |
| lypinator | 0:bb348c97df44 | 335 | #if defined(SAI1) |
| lypinator | 0:bb348c97df44 | 336 | #define LL_APB2_GRP1_PERIPH_SAI1 RCC_APB2ENR_SAI1EN |
| lypinator | 0:bb348c97df44 | 337 | #endif /* SAI1 */ |
| lypinator | 0:bb348c97df44 | 338 | #if defined(SAI2) |
| lypinator | 0:bb348c97df44 | 339 | #define LL_APB2_GRP1_PERIPH_SAI2 RCC_APB2ENR_SAI2EN |
| lypinator | 0:bb348c97df44 | 340 | #endif /* SAI2 */ |
| lypinator | 0:bb348c97df44 | 341 | #if defined(LTDC) |
| lypinator | 0:bb348c97df44 | 342 | #define LL_APB2_GRP1_PERIPH_LTDC RCC_APB2ENR_LTDCEN |
| lypinator | 0:bb348c97df44 | 343 | #endif /* LTDC */ |
| lypinator | 0:bb348c97df44 | 344 | #if defined(DSI) |
| lypinator | 0:bb348c97df44 | 345 | #define LL_APB2_GRP1_PERIPH_DSI RCC_APB2ENR_DSIEN |
| lypinator | 0:bb348c97df44 | 346 | #endif /* DSI */ |
| lypinator | 0:bb348c97df44 | 347 | #if defined(DFSDM1_Channel0) |
| lypinator | 0:bb348c97df44 | 348 | #define LL_APB2_GRP1_PERIPH_DFSDM1 RCC_APB2ENR_DFSDM1EN |
| lypinator | 0:bb348c97df44 | 349 | #endif /* DFSDM1_Channel0 */ |
| lypinator | 0:bb348c97df44 | 350 | #if defined(DFSDM2_Channel0) |
| lypinator | 0:bb348c97df44 | 351 | #define LL_APB2_GRP1_PERIPH_DFSDM2 RCC_APB2ENR_DFSDM2EN |
| lypinator | 0:bb348c97df44 | 352 | #endif /* DFSDM2_Channel0 */ |
| lypinator | 0:bb348c97df44 | 353 | #define LL_APB2_GRP1_PERIPH_ADC RCC_APB2RSTR_ADCRST |
| lypinator | 0:bb348c97df44 | 354 | /** |
| lypinator | 0:bb348c97df44 | 355 | * @} |
| lypinator | 0:bb348c97df44 | 356 | */ |
| lypinator | 0:bb348c97df44 | 357 | |
| lypinator | 0:bb348c97df44 | 358 | /** |
| lypinator | 0:bb348c97df44 | 359 | * @} |
| lypinator | 0:bb348c97df44 | 360 | */ |
| lypinator | 0:bb348c97df44 | 361 | |
| lypinator | 0:bb348c97df44 | 362 | /* Exported macro ------------------------------------------------------------*/ |
| lypinator | 0:bb348c97df44 | 363 | /* Exported functions --------------------------------------------------------*/ |
| lypinator | 0:bb348c97df44 | 364 | /** @defgroup BUS_LL_Exported_Functions BUS Exported Functions |
| lypinator | 0:bb348c97df44 | 365 | * @{ |
| lypinator | 0:bb348c97df44 | 366 | */ |
| lypinator | 0:bb348c97df44 | 367 | |
| lypinator | 0:bb348c97df44 | 368 | /** @defgroup BUS_LL_EF_AHB1 AHB1 |
| lypinator | 0:bb348c97df44 | 369 | * @{ |
| lypinator | 0:bb348c97df44 | 370 | */ |
| lypinator | 0:bb348c97df44 | 371 | |
| lypinator | 0:bb348c97df44 | 372 | /** |
| lypinator | 0:bb348c97df44 | 373 | * @brief Enable AHB1 peripherals clock. |
| lypinator | 0:bb348c97df44 | 374 | * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 375 | * AHB1ENR GPIOBEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 376 | * AHB1ENR GPIOCEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 377 | * AHB1ENR GPIODEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 378 | * AHB1ENR GPIOEEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 379 | * AHB1ENR GPIOFEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 380 | * AHB1ENR GPIOGEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 381 | * AHB1ENR GPIOHEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 382 | * AHB1ENR GPIOIEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 383 | * AHB1ENR GPIOJEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 384 | * AHB1ENR GPIOKEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 385 | * AHB1ENR CRCEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 386 | * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 387 | * AHB1ENR CCMDATARAMEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 388 | * AHB1ENR DMA1EN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 389 | * AHB1ENR DMA2EN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 390 | * AHB1ENR RNGEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 391 | * AHB1ENR DMA2DEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 392 | * AHB1ENR ETHMACEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 393 | * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 394 | * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 395 | * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 396 | * AHB1ENR OTGHSEN LL_AHB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 397 | * AHB1ENR OTGHSULPIEN LL_AHB1_GRP1_EnableClock |
| lypinator | 0:bb348c97df44 | 398 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 399 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA |
| lypinator | 0:bb348c97df44 | 400 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB |
| lypinator | 0:bb348c97df44 | 401 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC |
| lypinator | 0:bb348c97df44 | 402 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*) |
| lypinator | 0:bb348c97df44 | 403 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*) |
| lypinator | 0:bb348c97df44 | 404 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*) |
| lypinator | 0:bb348c97df44 | 405 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*) |
| lypinator | 0:bb348c97df44 | 406 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*) |
| lypinator | 0:bb348c97df44 | 407 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*) |
| lypinator | 0:bb348c97df44 | 408 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) |
| lypinator | 0:bb348c97df44 | 409 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) |
| lypinator | 0:bb348c97df44 | 410 | * @arg @ref LL_AHB1_GRP1_PERIPH_CRC |
| lypinator | 0:bb348c97df44 | 411 | * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM (*) |
| lypinator | 0:bb348c97df44 | 412 | * @arg @ref LL_AHB1_GRP1_PERIPH_CCMDATARAM (*) |
| lypinator | 0:bb348c97df44 | 413 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 |
| lypinator | 0:bb348c97df44 | 414 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 |
| lypinator | 0:bb348c97df44 | 415 | * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 416 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*) |
| lypinator | 0:bb348c97df44 | 417 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) |
| lypinator | 0:bb348c97df44 | 418 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*) |
| lypinator | 0:bb348c97df44 | 419 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*) |
| lypinator | 0:bb348c97df44 | 420 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*) |
| lypinator | 0:bb348c97df44 | 421 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*) |
| lypinator | 0:bb348c97df44 | 422 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI (*) |
| lypinator | 0:bb348c97df44 | 423 | * |
| lypinator | 0:bb348c97df44 | 424 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 425 | * @retval None |
| lypinator | 0:bb348c97df44 | 426 | */ |
| lypinator | 0:bb348c97df44 | 427 | __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 428 | { |
| lypinator | 0:bb348c97df44 | 429 | __IO uint32_t tmpreg; |
| lypinator | 0:bb348c97df44 | 430 | SET_BIT(RCC->AHB1ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 431 | /* Delay after an RCC peripheral clock enabling */ |
| lypinator | 0:bb348c97df44 | 432 | tmpreg = READ_BIT(RCC->AHB1ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 433 | (void)tmpreg; |
| lypinator | 0:bb348c97df44 | 434 | } |
| lypinator | 0:bb348c97df44 | 435 | |
| lypinator | 0:bb348c97df44 | 436 | /** |
| lypinator | 0:bb348c97df44 | 437 | * @brief Check if AHB1 peripheral clock is enabled or not |
| lypinator | 0:bb348c97df44 | 438 | * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 439 | * AHB1ENR GPIOBEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 440 | * AHB1ENR GPIOCEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 441 | * AHB1ENR GPIODEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 442 | * AHB1ENR GPIOEEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 443 | * AHB1ENR GPIOFEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 444 | * AHB1ENR GPIOGEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 445 | * AHB1ENR GPIOHEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 446 | * AHB1ENR GPIOIEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 447 | * AHB1ENR GPIOJEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 448 | * AHB1ENR GPIOKEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 449 | * AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 450 | * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 451 | * AHB1ENR CCMDATARAMEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 452 | * AHB1ENR DMA1EN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 453 | * AHB1ENR DMA2EN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 454 | * AHB1ENR RNGEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 455 | * AHB1ENR DMA2DEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 456 | * AHB1ENR ETHMACEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 457 | * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 458 | * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 459 | * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 460 | * AHB1ENR OTGHSEN LL_AHB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 461 | * AHB1ENR OTGHSULPIEN LL_AHB1_GRP1_IsEnabledClock |
| lypinator | 0:bb348c97df44 | 462 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 463 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA |
| lypinator | 0:bb348c97df44 | 464 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB |
| lypinator | 0:bb348c97df44 | 465 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC |
| lypinator | 0:bb348c97df44 | 466 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*) |
| lypinator | 0:bb348c97df44 | 467 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*) |
| lypinator | 0:bb348c97df44 | 468 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*) |
| lypinator | 0:bb348c97df44 | 469 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*) |
| lypinator | 0:bb348c97df44 | 470 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*) |
| lypinator | 0:bb348c97df44 | 471 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*) |
| lypinator | 0:bb348c97df44 | 472 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) |
| lypinator | 0:bb348c97df44 | 473 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) |
| lypinator | 0:bb348c97df44 | 474 | * @arg @ref LL_AHB1_GRP1_PERIPH_CRC |
| lypinator | 0:bb348c97df44 | 475 | * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM (*) |
| lypinator | 0:bb348c97df44 | 476 | * @arg @ref LL_AHB1_GRP1_PERIPH_CCMDATARAM (*) |
| lypinator | 0:bb348c97df44 | 477 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 |
| lypinator | 0:bb348c97df44 | 478 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 |
| lypinator | 0:bb348c97df44 | 479 | * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 480 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*) |
| lypinator | 0:bb348c97df44 | 481 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) |
| lypinator | 0:bb348c97df44 | 482 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*) |
| lypinator | 0:bb348c97df44 | 483 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*) |
| lypinator | 0:bb348c97df44 | 484 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*) |
| lypinator | 0:bb348c97df44 | 485 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*) |
| lypinator | 0:bb348c97df44 | 486 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI (*) |
| lypinator | 0:bb348c97df44 | 487 | * |
| lypinator | 0:bb348c97df44 | 488 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 489 | * @retval State of Periphs (1 or 0). |
| lypinator | 0:bb348c97df44 | 490 | */ |
| lypinator | 0:bb348c97df44 | 491 | __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 492 | { |
| lypinator | 0:bb348c97df44 | 493 | return (READ_BIT(RCC->AHB1ENR, Periphs) == Periphs); |
| lypinator | 0:bb348c97df44 | 494 | } |
| lypinator | 0:bb348c97df44 | 495 | |
| lypinator | 0:bb348c97df44 | 496 | /** |
| lypinator | 0:bb348c97df44 | 497 | * @brief Disable AHB1 peripherals clock. |
| lypinator | 0:bb348c97df44 | 498 | * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 499 | * AHB1ENR GPIOBEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 500 | * AHB1ENR GPIOCEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 501 | * AHB1ENR GPIODEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 502 | * AHB1ENR GPIOEEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 503 | * AHB1ENR GPIOFEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 504 | * AHB1ENR GPIOGEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 505 | * AHB1ENR GPIOHEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 506 | * AHB1ENR GPIOIEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 507 | * AHB1ENR GPIOJEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 508 | * AHB1ENR GPIOKEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 509 | * AHB1ENR CRCEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 510 | * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 511 | * AHB1ENR CCMDATARAMEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 512 | * AHB1ENR DMA1EN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 513 | * AHB1ENR DMA2EN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 514 | * AHB1ENR RNGEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 515 | * AHB1ENR DMA2DEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 516 | * AHB1ENR ETHMACEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 517 | * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 518 | * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 519 | * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 520 | * AHB1ENR OTGHSEN LL_AHB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 521 | * AHB1ENR OTGHSULPIEN LL_AHB1_GRP1_DisableClock |
| lypinator | 0:bb348c97df44 | 522 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 523 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA |
| lypinator | 0:bb348c97df44 | 524 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB |
| lypinator | 0:bb348c97df44 | 525 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC |
| lypinator | 0:bb348c97df44 | 526 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*) |
| lypinator | 0:bb348c97df44 | 527 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*) |
| lypinator | 0:bb348c97df44 | 528 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*) |
| lypinator | 0:bb348c97df44 | 529 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*) |
| lypinator | 0:bb348c97df44 | 530 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*) |
| lypinator | 0:bb348c97df44 | 531 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*) |
| lypinator | 0:bb348c97df44 | 532 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) |
| lypinator | 0:bb348c97df44 | 533 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) |
| lypinator | 0:bb348c97df44 | 534 | * @arg @ref LL_AHB1_GRP1_PERIPH_CRC |
| lypinator | 0:bb348c97df44 | 535 | * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM (*) |
| lypinator | 0:bb348c97df44 | 536 | * @arg @ref LL_AHB1_GRP1_PERIPH_CCMDATARAM (*) |
| lypinator | 0:bb348c97df44 | 537 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 |
| lypinator | 0:bb348c97df44 | 538 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 |
| lypinator | 0:bb348c97df44 | 539 | * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 540 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*) |
| lypinator | 0:bb348c97df44 | 541 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) |
| lypinator | 0:bb348c97df44 | 542 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*) |
| lypinator | 0:bb348c97df44 | 543 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*) |
| lypinator | 0:bb348c97df44 | 544 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*) |
| lypinator | 0:bb348c97df44 | 545 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*) |
| lypinator | 0:bb348c97df44 | 546 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI (*) |
| lypinator | 0:bb348c97df44 | 547 | * |
| lypinator | 0:bb348c97df44 | 548 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 549 | * @retval None |
| lypinator | 0:bb348c97df44 | 550 | */ |
| lypinator | 0:bb348c97df44 | 551 | __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 552 | { |
| lypinator | 0:bb348c97df44 | 553 | CLEAR_BIT(RCC->AHB1ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 554 | } |
| lypinator | 0:bb348c97df44 | 555 | |
| lypinator | 0:bb348c97df44 | 556 | /** |
| lypinator | 0:bb348c97df44 | 557 | * @brief Force AHB1 peripherals reset. |
| lypinator | 0:bb348c97df44 | 558 | * @rmtoll AHB1RSTR GPIOARST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 559 | * AHB1RSTR GPIOBRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 560 | * AHB1RSTR GPIOCRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 561 | * AHB1RSTR GPIODRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 562 | * AHB1RSTR GPIOERST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 563 | * AHB1RSTR GPIOFRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 564 | * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 565 | * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 566 | * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 567 | * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 568 | * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 569 | * AHB1RSTR CRCRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 570 | * AHB1RSTR DMA1RST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 571 | * AHB1RSTR DMA2RST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 572 | * AHB1RSTR RNGRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 573 | * AHB1RSTR DMA2DRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 574 | * AHB1RSTR ETHMACRST LL_AHB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 575 | * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ForceReset |
| lypinator | 0:bb348c97df44 | 576 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 577 | * @arg @ref LL_AHB1_GRP1_PERIPH_ALL |
| lypinator | 0:bb348c97df44 | 578 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA |
| lypinator | 0:bb348c97df44 | 579 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB |
| lypinator | 0:bb348c97df44 | 580 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC |
| lypinator | 0:bb348c97df44 | 581 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*) |
| lypinator | 0:bb348c97df44 | 582 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*) |
| lypinator | 0:bb348c97df44 | 583 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*) |
| lypinator | 0:bb348c97df44 | 584 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*) |
| lypinator | 0:bb348c97df44 | 585 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*) |
| lypinator | 0:bb348c97df44 | 586 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*) |
| lypinator | 0:bb348c97df44 | 587 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) |
| lypinator | 0:bb348c97df44 | 588 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) |
| lypinator | 0:bb348c97df44 | 589 | * @arg @ref LL_AHB1_GRP1_PERIPH_CRC |
| lypinator | 0:bb348c97df44 | 590 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 |
| lypinator | 0:bb348c97df44 | 591 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 |
| lypinator | 0:bb348c97df44 | 592 | * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 593 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*) |
| lypinator | 0:bb348c97df44 | 594 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) |
| lypinator | 0:bb348c97df44 | 595 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*) |
| lypinator | 0:bb348c97df44 | 596 | * |
| lypinator | 0:bb348c97df44 | 597 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 598 | * @retval None |
| lypinator | 0:bb348c97df44 | 599 | */ |
| lypinator | 0:bb348c97df44 | 600 | __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 601 | { |
| lypinator | 0:bb348c97df44 | 602 | SET_BIT(RCC->AHB1RSTR, Periphs); |
| lypinator | 0:bb348c97df44 | 603 | } |
| lypinator | 0:bb348c97df44 | 604 | |
| lypinator | 0:bb348c97df44 | 605 | /** |
| lypinator | 0:bb348c97df44 | 606 | * @brief Release AHB1 peripherals reset. |
| lypinator | 0:bb348c97df44 | 607 | * @rmtoll AHB1RSTR GPIOARST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 608 | * AHB1RSTR GPIOBRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 609 | * AHB1RSTR GPIOCRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 610 | * AHB1RSTR GPIODRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 611 | * AHB1RSTR GPIOERST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 612 | * AHB1RSTR GPIOFRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 613 | * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 614 | * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 615 | * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 616 | * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 617 | * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 618 | * AHB1RSTR CRCRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 619 | * AHB1RSTR DMA1RST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 620 | * AHB1RSTR DMA2RST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 621 | * AHB1RSTR RNGRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 622 | * AHB1RSTR DMA2DRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 623 | * AHB1RSTR ETHMACRST LL_AHB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 624 | * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ReleaseReset |
| lypinator | 0:bb348c97df44 | 625 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 626 | * @arg @ref LL_AHB1_GRP1_PERIPH_ALL |
| lypinator | 0:bb348c97df44 | 627 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA |
| lypinator | 0:bb348c97df44 | 628 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB |
| lypinator | 0:bb348c97df44 | 629 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC |
| lypinator | 0:bb348c97df44 | 630 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*) |
| lypinator | 0:bb348c97df44 | 631 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*) |
| lypinator | 0:bb348c97df44 | 632 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*) |
| lypinator | 0:bb348c97df44 | 633 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*) |
| lypinator | 0:bb348c97df44 | 634 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*) |
| lypinator | 0:bb348c97df44 | 635 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*) |
| lypinator | 0:bb348c97df44 | 636 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) |
| lypinator | 0:bb348c97df44 | 637 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) |
| lypinator | 0:bb348c97df44 | 638 | * @arg @ref LL_AHB1_GRP1_PERIPH_CRC |
| lypinator | 0:bb348c97df44 | 639 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 |
| lypinator | 0:bb348c97df44 | 640 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 |
| lypinator | 0:bb348c97df44 | 641 | * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 642 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*) |
| lypinator | 0:bb348c97df44 | 643 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) |
| lypinator | 0:bb348c97df44 | 644 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*) |
| lypinator | 0:bb348c97df44 | 645 | * |
| lypinator | 0:bb348c97df44 | 646 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 647 | * @retval None |
| lypinator | 0:bb348c97df44 | 648 | */ |
| lypinator | 0:bb348c97df44 | 649 | __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 650 | { |
| lypinator | 0:bb348c97df44 | 651 | CLEAR_BIT(RCC->AHB1RSTR, Periphs); |
| lypinator | 0:bb348c97df44 | 652 | } |
| lypinator | 0:bb348c97df44 | 653 | |
| lypinator | 0:bb348c97df44 | 654 | /** |
| lypinator | 0:bb348c97df44 | 655 | * @brief Enable AHB1 peripheral clocks in low-power mode |
| lypinator | 0:bb348c97df44 | 656 | * @rmtoll AHB1LPENR GPIOALPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 657 | * AHB1LPENR GPIOBLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 658 | * AHB1LPENR GPIOCLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 659 | * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 660 | * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 661 | * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 662 | * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 663 | * AHB1LPENR GPIOHLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 664 | * AHB1LPENR GPIOILPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 665 | * AHB1LPENR GPIOJLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 666 | * AHB1LPENR GPIOKLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 667 | * AHB1LPENR CRCLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 668 | * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 669 | * AHB1LPENR FLITFLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 670 | * AHB1LPENR SRAM1LPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 671 | * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 672 | * AHB1LPENR SRAM3LPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 673 | * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 674 | * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 675 | * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 676 | * AHB1LPENR DMA2DLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 677 | * AHB1LPENR RNGLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 678 | * AHB1LPENR ETHMACLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 679 | * AHB1LPENR ETHMACTXLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 680 | * AHB1LPENR ETHMACRXLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 681 | * AHB1LPENR ETHMACPTPLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 682 | * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 683 | * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_EnableClockLowPower |
| lypinator | 0:bb348c97df44 | 684 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 685 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA |
| lypinator | 0:bb348c97df44 | 686 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB |
| lypinator | 0:bb348c97df44 | 687 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC |
| lypinator | 0:bb348c97df44 | 688 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*) |
| lypinator | 0:bb348c97df44 | 689 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*) |
| lypinator | 0:bb348c97df44 | 690 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*) |
| lypinator | 0:bb348c97df44 | 691 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*) |
| lypinator | 0:bb348c97df44 | 692 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*) |
| lypinator | 0:bb348c97df44 | 693 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*) |
| lypinator | 0:bb348c97df44 | 694 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) |
| lypinator | 0:bb348c97df44 | 695 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) |
| lypinator | 0:bb348c97df44 | 696 | * @arg @ref LL_AHB1_GRP1_PERIPH_CRC |
| lypinator | 0:bb348c97df44 | 697 | * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM (*) |
| lypinator | 0:bb348c97df44 | 698 | * @arg @ref LL_AHB1_GRP1_PERIPH_FLITF |
| lypinator | 0:bb348c97df44 | 699 | * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1 |
| lypinator | 0:bb348c97df44 | 700 | * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM2 (*) |
| lypinator | 0:bb348c97df44 | 701 | * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM3 (*) |
| lypinator | 0:bb348c97df44 | 702 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 |
| lypinator | 0:bb348c97df44 | 703 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 |
| lypinator | 0:bb348c97df44 | 704 | * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 705 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*) |
| lypinator | 0:bb348c97df44 | 706 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) |
| lypinator | 0:bb348c97df44 | 707 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*) |
| lypinator | 0:bb348c97df44 | 708 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*) |
| lypinator | 0:bb348c97df44 | 709 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*) |
| lypinator | 0:bb348c97df44 | 710 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*) |
| lypinator | 0:bb348c97df44 | 711 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI (*) |
| lypinator | 0:bb348c97df44 | 712 | * |
| lypinator | 0:bb348c97df44 | 713 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 714 | * @retval None |
| lypinator | 0:bb348c97df44 | 715 | */ |
| lypinator | 0:bb348c97df44 | 716 | __STATIC_INLINE void LL_AHB1_GRP1_EnableClockLowPower(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 717 | { |
| lypinator | 0:bb348c97df44 | 718 | __IO uint32_t tmpreg; |
| lypinator | 0:bb348c97df44 | 719 | SET_BIT(RCC->AHB1LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 720 | /* Delay after an RCC peripheral clock enabling */ |
| lypinator | 0:bb348c97df44 | 721 | tmpreg = READ_BIT(RCC->AHB1LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 722 | (void)tmpreg; |
| lypinator | 0:bb348c97df44 | 723 | } |
| lypinator | 0:bb348c97df44 | 724 | |
| lypinator | 0:bb348c97df44 | 725 | /** |
| lypinator | 0:bb348c97df44 | 726 | * @brief Disable AHB1 peripheral clocks in low-power mode |
| lypinator | 0:bb348c97df44 | 727 | * @rmtoll AHB1LPENR GPIOALPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 728 | * AHB1LPENR GPIOBLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 729 | * AHB1LPENR GPIOCLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 730 | * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 731 | * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 732 | * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 733 | * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 734 | * AHB1LPENR GPIOHLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 735 | * AHB1LPENR GPIOILPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 736 | * AHB1LPENR GPIOJLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 737 | * AHB1LPENR GPIOKLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 738 | * AHB1LPENR CRCLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 739 | * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 740 | * AHB1LPENR FLITFLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 741 | * AHB1LPENR SRAM1LPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 742 | * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 743 | * AHB1LPENR SRAM3LPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 744 | * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 745 | * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 746 | * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 747 | * AHB1LPENR DMA2DLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 748 | * AHB1LPENR RNGLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 749 | * AHB1LPENR ETHMACLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 750 | * AHB1LPENR ETHMACTXLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 751 | * AHB1LPENR ETHMACRXLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 752 | * AHB1LPENR ETHMACPTPLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 753 | * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 754 | * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_DisableClockLowPower |
| lypinator | 0:bb348c97df44 | 755 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 756 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA |
| lypinator | 0:bb348c97df44 | 757 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB |
| lypinator | 0:bb348c97df44 | 758 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC |
| lypinator | 0:bb348c97df44 | 759 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD (*) |
| lypinator | 0:bb348c97df44 | 760 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE (*) |
| lypinator | 0:bb348c97df44 | 761 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF (*) |
| lypinator | 0:bb348c97df44 | 762 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG (*) |
| lypinator | 0:bb348c97df44 | 763 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH (*) |
| lypinator | 0:bb348c97df44 | 764 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI (*) |
| lypinator | 0:bb348c97df44 | 765 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) |
| lypinator | 0:bb348c97df44 | 766 | * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) |
| lypinator | 0:bb348c97df44 | 767 | * @arg @ref LL_AHB1_GRP1_PERIPH_CRC |
| lypinator | 0:bb348c97df44 | 768 | * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM (*) |
| lypinator | 0:bb348c97df44 | 769 | * @arg @ref LL_AHB1_GRP1_PERIPH_FLITF |
| lypinator | 0:bb348c97df44 | 770 | * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1 |
| lypinator | 0:bb348c97df44 | 771 | * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM2 (*) |
| lypinator | 0:bb348c97df44 | 772 | * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM3 (*) |
| lypinator | 0:bb348c97df44 | 773 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 |
| lypinator | 0:bb348c97df44 | 774 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 |
| lypinator | 0:bb348c97df44 | 775 | * @arg @ref LL_AHB1_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 776 | * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*) |
| lypinator | 0:bb348c97df44 | 777 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) |
| lypinator | 0:bb348c97df44 | 778 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*) |
| lypinator | 0:bb348c97df44 | 779 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*) |
| lypinator | 0:bb348c97df44 | 780 | * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*) |
| lypinator | 0:bb348c97df44 | 781 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS (*) |
| lypinator | 0:bb348c97df44 | 782 | * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI (*) |
| lypinator | 0:bb348c97df44 | 783 | * |
| lypinator | 0:bb348c97df44 | 784 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 785 | * @retval None |
| lypinator | 0:bb348c97df44 | 786 | */ |
| lypinator | 0:bb348c97df44 | 787 | __STATIC_INLINE void LL_AHB1_GRP1_DisableClockLowPower(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 788 | { |
| lypinator | 0:bb348c97df44 | 789 | CLEAR_BIT(RCC->AHB1LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 790 | } |
| lypinator | 0:bb348c97df44 | 791 | |
| lypinator | 0:bb348c97df44 | 792 | /** |
| lypinator | 0:bb348c97df44 | 793 | * @} |
| lypinator | 0:bb348c97df44 | 794 | */ |
| lypinator | 0:bb348c97df44 | 795 | |
| lypinator | 0:bb348c97df44 | 796 | #if defined(RCC_AHB2_SUPPORT) |
| lypinator | 0:bb348c97df44 | 797 | /** @defgroup BUS_LL_EF_AHB2 AHB2 |
| lypinator | 0:bb348c97df44 | 798 | * @{ |
| lypinator | 0:bb348c97df44 | 799 | */ |
| lypinator | 0:bb348c97df44 | 800 | |
| lypinator | 0:bb348c97df44 | 801 | /** |
| lypinator | 0:bb348c97df44 | 802 | * @brief Enable AHB2 peripherals clock. |
| lypinator | 0:bb348c97df44 | 803 | * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 804 | * AHB2ENR CRYPEN LL_AHB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 805 | * AHB2ENR AESEN LL_AHB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 806 | * AHB2ENR HASHEN LL_AHB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 807 | * AHB2ENR RNGEN LL_AHB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 808 | * AHB2ENR OTGFSEN LL_AHB2_GRP1_EnableClock |
| lypinator | 0:bb348c97df44 | 809 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 810 | * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) |
| lypinator | 0:bb348c97df44 | 811 | * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) |
| lypinator | 0:bb348c97df44 | 812 | * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) |
| lypinator | 0:bb348c97df44 | 813 | * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) |
| lypinator | 0:bb348c97df44 | 814 | * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 815 | * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*) |
| lypinator | 0:bb348c97df44 | 816 | * |
| lypinator | 0:bb348c97df44 | 817 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 818 | * @retval None |
| lypinator | 0:bb348c97df44 | 819 | */ |
| lypinator | 0:bb348c97df44 | 820 | __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 821 | { |
| lypinator | 0:bb348c97df44 | 822 | __IO uint32_t tmpreg; |
| lypinator | 0:bb348c97df44 | 823 | SET_BIT(RCC->AHB2ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 824 | /* Delay after an RCC peripheral clock enabling */ |
| lypinator | 0:bb348c97df44 | 825 | tmpreg = READ_BIT(RCC->AHB2ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 826 | (void)tmpreg; |
| lypinator | 0:bb348c97df44 | 827 | } |
| lypinator | 0:bb348c97df44 | 828 | |
| lypinator | 0:bb348c97df44 | 829 | /** |
| lypinator | 0:bb348c97df44 | 830 | * @brief Check if AHB2 peripheral clock is enabled or not |
| lypinator | 0:bb348c97df44 | 831 | * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 832 | * AHB2ENR CRYPEN LL_AHB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 833 | * AHB2ENR AESEN LL_AHB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 834 | * AHB2ENR HASHEN LL_AHB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 835 | * AHB2ENR RNGEN LL_AHB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 836 | * AHB2ENR OTGFSEN LL_AHB2_GRP1_IsEnabledClock |
| lypinator | 0:bb348c97df44 | 837 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 838 | * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) |
| lypinator | 0:bb348c97df44 | 839 | * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) |
| lypinator | 0:bb348c97df44 | 840 | * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) |
| lypinator | 0:bb348c97df44 | 841 | * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) |
| lypinator | 0:bb348c97df44 | 842 | * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 843 | * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*) |
| lypinator | 0:bb348c97df44 | 844 | * |
| lypinator | 0:bb348c97df44 | 845 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 846 | * @retval State of Periphs (1 or 0). |
| lypinator | 0:bb348c97df44 | 847 | */ |
| lypinator | 0:bb348c97df44 | 848 | __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 849 | { |
| lypinator | 0:bb348c97df44 | 850 | return (READ_BIT(RCC->AHB2ENR, Periphs) == Periphs); |
| lypinator | 0:bb348c97df44 | 851 | } |
| lypinator | 0:bb348c97df44 | 852 | |
| lypinator | 0:bb348c97df44 | 853 | /** |
| lypinator | 0:bb348c97df44 | 854 | * @brief Disable AHB2 peripherals clock. |
| lypinator | 0:bb348c97df44 | 855 | * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 856 | * AHB2ENR CRYPEN LL_AHB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 857 | * AHB2ENR AESEN LL_AHB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 858 | * AHB2ENR HASHEN LL_AHB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 859 | * AHB2ENR RNGEN LL_AHB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 860 | * AHB2ENR OTGFSEN LL_AHB2_GRP1_DisableClock |
| lypinator | 0:bb348c97df44 | 861 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 862 | * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) |
| lypinator | 0:bb348c97df44 | 863 | * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) |
| lypinator | 0:bb348c97df44 | 864 | * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) |
| lypinator | 0:bb348c97df44 | 865 | * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) |
| lypinator | 0:bb348c97df44 | 866 | * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 867 | * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*) |
| lypinator | 0:bb348c97df44 | 868 | * |
| lypinator | 0:bb348c97df44 | 869 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 870 | * @retval None |
| lypinator | 0:bb348c97df44 | 871 | */ |
| lypinator | 0:bb348c97df44 | 872 | __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 873 | { |
| lypinator | 0:bb348c97df44 | 874 | CLEAR_BIT(RCC->AHB2ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 875 | } |
| lypinator | 0:bb348c97df44 | 876 | |
| lypinator | 0:bb348c97df44 | 877 | /** |
| lypinator | 0:bb348c97df44 | 878 | * @brief Force AHB2 peripherals reset. |
| lypinator | 0:bb348c97df44 | 879 | * @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 880 | * AHB2RSTR CRYPRST LL_AHB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 881 | * AHB2RSTR AESRST LL_AHB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 882 | * AHB2RSTR HASHRST LL_AHB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 883 | * AHB2RSTR RNGRST LL_AHB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 884 | * AHB2RSTR OTGFSRST LL_AHB2_GRP1_ForceReset |
| lypinator | 0:bb348c97df44 | 885 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 886 | * @arg @ref LL_AHB2_GRP1_PERIPH_ALL |
| lypinator | 0:bb348c97df44 | 887 | * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) |
| lypinator | 0:bb348c97df44 | 888 | * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) |
| lypinator | 0:bb348c97df44 | 889 | * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) |
| lypinator | 0:bb348c97df44 | 890 | * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) |
| lypinator | 0:bb348c97df44 | 891 | * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 892 | * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*) |
| lypinator | 0:bb348c97df44 | 893 | * |
| lypinator | 0:bb348c97df44 | 894 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 895 | * @retval None |
| lypinator | 0:bb348c97df44 | 896 | */ |
| lypinator | 0:bb348c97df44 | 897 | __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 898 | { |
| lypinator | 0:bb348c97df44 | 899 | SET_BIT(RCC->AHB2RSTR, Periphs); |
| lypinator | 0:bb348c97df44 | 900 | } |
| lypinator | 0:bb348c97df44 | 901 | |
| lypinator | 0:bb348c97df44 | 902 | /** |
| lypinator | 0:bb348c97df44 | 903 | * @brief Release AHB2 peripherals reset. |
| lypinator | 0:bb348c97df44 | 904 | * @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 905 | * AHB2RSTR CRYPRST LL_AHB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 906 | * AHB2RSTR AESRST LL_AHB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 907 | * AHB2RSTR HASHRST LL_AHB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 908 | * AHB2RSTR RNGRST LL_AHB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 909 | * AHB2RSTR OTGFSRST LL_AHB2_GRP1_ReleaseReset |
| lypinator | 0:bb348c97df44 | 910 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 911 | * @arg @ref LL_AHB2_GRP1_PERIPH_ALL |
| lypinator | 0:bb348c97df44 | 912 | * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) |
| lypinator | 0:bb348c97df44 | 913 | * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) |
| lypinator | 0:bb348c97df44 | 914 | * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) |
| lypinator | 0:bb348c97df44 | 915 | * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) |
| lypinator | 0:bb348c97df44 | 916 | * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 917 | * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*) |
| lypinator | 0:bb348c97df44 | 918 | * |
| lypinator | 0:bb348c97df44 | 919 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 920 | * @retval None |
| lypinator | 0:bb348c97df44 | 921 | */ |
| lypinator | 0:bb348c97df44 | 922 | __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 923 | { |
| lypinator | 0:bb348c97df44 | 924 | CLEAR_BIT(RCC->AHB2RSTR, Periphs); |
| lypinator | 0:bb348c97df44 | 925 | } |
| lypinator | 0:bb348c97df44 | 926 | |
| lypinator | 0:bb348c97df44 | 927 | /** |
| lypinator | 0:bb348c97df44 | 928 | * @brief Enable AHB2 peripheral clocks in low-power mode |
| lypinator | 0:bb348c97df44 | 929 | * @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 930 | * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 931 | * AHB2LPENR AESLPEN LL_AHB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 932 | * AHB2LPENR HASHLPEN LL_AHB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 933 | * AHB2LPENR RNGLPEN LL_AHB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 934 | * AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_EnableClockLowPower |
| lypinator | 0:bb348c97df44 | 935 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 936 | * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) |
| lypinator | 0:bb348c97df44 | 937 | * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) |
| lypinator | 0:bb348c97df44 | 938 | * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) |
| lypinator | 0:bb348c97df44 | 939 | * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) |
| lypinator | 0:bb348c97df44 | 940 | * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 941 | * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*) |
| lypinator | 0:bb348c97df44 | 942 | * |
| lypinator | 0:bb348c97df44 | 943 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 944 | * @retval None |
| lypinator | 0:bb348c97df44 | 945 | */ |
| lypinator | 0:bb348c97df44 | 946 | __STATIC_INLINE void LL_AHB2_GRP1_EnableClockLowPower(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 947 | { |
| lypinator | 0:bb348c97df44 | 948 | __IO uint32_t tmpreg; |
| lypinator | 0:bb348c97df44 | 949 | SET_BIT(RCC->AHB2LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 950 | /* Delay after an RCC peripheral clock enabling */ |
| lypinator | 0:bb348c97df44 | 951 | tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 952 | (void)tmpreg; |
| lypinator | 0:bb348c97df44 | 953 | } |
| lypinator | 0:bb348c97df44 | 954 | |
| lypinator | 0:bb348c97df44 | 955 | /** |
| lypinator | 0:bb348c97df44 | 956 | * @brief Disable AHB2 peripheral clocks in low-power mode |
| lypinator | 0:bb348c97df44 | 957 | * @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 958 | * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 959 | * AHB2LPENR AESLPEN LL_AHB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 960 | * AHB2LPENR HASHLPEN LL_AHB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 961 | * AHB2LPENR RNGLPEN LL_AHB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 962 | * AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_DisableClockLowPower |
| lypinator | 0:bb348c97df44 | 963 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 964 | * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*) |
| lypinator | 0:bb348c97df44 | 965 | * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*) |
| lypinator | 0:bb348c97df44 | 966 | * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*) |
| lypinator | 0:bb348c97df44 | 967 | * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*) |
| lypinator | 0:bb348c97df44 | 968 | * @arg @ref LL_AHB2_GRP1_PERIPH_RNG (*) |
| lypinator | 0:bb348c97df44 | 969 | * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS (*) |
| lypinator | 0:bb348c97df44 | 970 | * |
| lypinator | 0:bb348c97df44 | 971 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 972 | * @retval None |
| lypinator | 0:bb348c97df44 | 973 | */ |
| lypinator | 0:bb348c97df44 | 974 | __STATIC_INLINE void LL_AHB2_GRP1_DisableClockLowPower(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 975 | { |
| lypinator | 0:bb348c97df44 | 976 | CLEAR_BIT(RCC->AHB2LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 977 | } |
| lypinator | 0:bb348c97df44 | 978 | |
| lypinator | 0:bb348c97df44 | 979 | /** |
| lypinator | 0:bb348c97df44 | 980 | * @} |
| lypinator | 0:bb348c97df44 | 981 | */ |
| lypinator | 0:bb348c97df44 | 982 | #endif /* RCC_AHB2_SUPPORT */ |
| lypinator | 0:bb348c97df44 | 983 | |
| lypinator | 0:bb348c97df44 | 984 | #if defined(RCC_AHB3_SUPPORT) |
| lypinator | 0:bb348c97df44 | 985 | /** @defgroup BUS_LL_EF_AHB3 AHB3 |
| lypinator | 0:bb348c97df44 | 986 | * @{ |
| lypinator | 0:bb348c97df44 | 987 | */ |
| lypinator | 0:bb348c97df44 | 988 | |
| lypinator | 0:bb348c97df44 | 989 | /** |
| lypinator | 0:bb348c97df44 | 990 | * @brief Enable AHB3 peripherals clock. |
| lypinator | 0:bb348c97df44 | 991 | * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 992 | * AHB3ENR FSMCEN LL_AHB3_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 993 | * AHB3ENR QSPIEN LL_AHB3_GRP1_EnableClock |
| lypinator | 0:bb348c97df44 | 994 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 995 | * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) |
| lypinator | 0:bb348c97df44 | 996 | * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*) |
| lypinator | 0:bb348c97df44 | 997 | * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) |
| lypinator | 0:bb348c97df44 | 998 | * |
| lypinator | 0:bb348c97df44 | 999 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1000 | * @retval None |
| lypinator | 0:bb348c97df44 | 1001 | */ |
| lypinator | 0:bb348c97df44 | 1002 | __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1003 | { |
| lypinator | 0:bb348c97df44 | 1004 | __IO uint32_t tmpreg; |
| lypinator | 0:bb348c97df44 | 1005 | SET_BIT(RCC->AHB3ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1006 | /* Delay after an RCC peripheral clock enabling */ |
| lypinator | 0:bb348c97df44 | 1007 | tmpreg = READ_BIT(RCC->AHB3ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1008 | (void)tmpreg; |
| lypinator | 0:bb348c97df44 | 1009 | } |
| lypinator | 0:bb348c97df44 | 1010 | |
| lypinator | 0:bb348c97df44 | 1011 | /** |
| lypinator | 0:bb348c97df44 | 1012 | * @brief Check if AHB3 peripheral clock is enabled or not |
| lypinator | 0:bb348c97df44 | 1013 | * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1014 | * AHB3ENR FSMCEN LL_AHB3_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1015 | * AHB3ENR QSPIEN LL_AHB3_GRP1_IsEnabledClock |
| lypinator | 0:bb348c97df44 | 1016 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1017 | * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) |
| lypinator | 0:bb348c97df44 | 1018 | * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*) |
| lypinator | 0:bb348c97df44 | 1019 | * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) |
| lypinator | 0:bb348c97df44 | 1020 | * |
| lypinator | 0:bb348c97df44 | 1021 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1022 | * @retval State of Periphs (1 or 0). |
| lypinator | 0:bb348c97df44 | 1023 | */ |
| lypinator | 0:bb348c97df44 | 1024 | __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1025 | { |
| lypinator | 0:bb348c97df44 | 1026 | return (READ_BIT(RCC->AHB3ENR, Periphs) == Periphs); |
| lypinator | 0:bb348c97df44 | 1027 | } |
| lypinator | 0:bb348c97df44 | 1028 | |
| lypinator | 0:bb348c97df44 | 1029 | /** |
| lypinator | 0:bb348c97df44 | 1030 | * @brief Disable AHB3 peripherals clock. |
| lypinator | 0:bb348c97df44 | 1031 | * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1032 | * AHB3ENR FSMCEN LL_AHB3_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1033 | * AHB3ENR QSPIEN LL_AHB3_GRP1_DisableClock |
| lypinator | 0:bb348c97df44 | 1034 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1035 | * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) |
| lypinator | 0:bb348c97df44 | 1036 | * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*) |
| lypinator | 0:bb348c97df44 | 1037 | * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) |
| lypinator | 0:bb348c97df44 | 1038 | * |
| lypinator | 0:bb348c97df44 | 1039 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1040 | * @retval None |
| lypinator | 0:bb348c97df44 | 1041 | */ |
| lypinator | 0:bb348c97df44 | 1042 | __STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1043 | { |
| lypinator | 0:bb348c97df44 | 1044 | CLEAR_BIT(RCC->AHB3ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1045 | } |
| lypinator | 0:bb348c97df44 | 1046 | |
| lypinator | 0:bb348c97df44 | 1047 | /** |
| lypinator | 0:bb348c97df44 | 1048 | * @brief Force AHB3 peripherals reset. |
| lypinator | 0:bb348c97df44 | 1049 | * @rmtoll AHB3RSTR FMCRST LL_AHB3_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1050 | * AHB3RSTR FSMCRST LL_AHB3_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1051 | * AHB3RSTR QSPIRST LL_AHB3_GRP1_ForceReset |
| lypinator | 0:bb348c97df44 | 1052 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1053 | * @arg @ref LL_AHB3_GRP1_PERIPH_ALL |
| lypinator | 0:bb348c97df44 | 1054 | * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) |
| lypinator | 0:bb348c97df44 | 1055 | * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*) |
| lypinator | 0:bb348c97df44 | 1056 | * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) |
| lypinator | 0:bb348c97df44 | 1057 | * |
| lypinator | 0:bb348c97df44 | 1058 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1059 | * @retval None |
| lypinator | 0:bb348c97df44 | 1060 | */ |
| lypinator | 0:bb348c97df44 | 1061 | __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1062 | { |
| lypinator | 0:bb348c97df44 | 1063 | SET_BIT(RCC->AHB3RSTR, Periphs); |
| lypinator | 0:bb348c97df44 | 1064 | } |
| lypinator | 0:bb348c97df44 | 1065 | |
| lypinator | 0:bb348c97df44 | 1066 | /** |
| lypinator | 0:bb348c97df44 | 1067 | * @brief Release AHB3 peripherals reset. |
| lypinator | 0:bb348c97df44 | 1068 | * @rmtoll AHB3RSTR FMCRST LL_AHB3_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1069 | * AHB3RSTR FSMCRST LL_AHB3_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1070 | * AHB3RSTR QSPIRST LL_AHB3_GRP1_ReleaseReset |
| lypinator | 0:bb348c97df44 | 1071 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1072 | * @arg @ref LL_AHB2_GRP1_PERIPH_ALL |
| lypinator | 0:bb348c97df44 | 1073 | * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) |
| lypinator | 0:bb348c97df44 | 1074 | * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*) |
| lypinator | 0:bb348c97df44 | 1075 | * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) |
| lypinator | 0:bb348c97df44 | 1076 | * |
| lypinator | 0:bb348c97df44 | 1077 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1078 | * @retval None |
| lypinator | 0:bb348c97df44 | 1079 | */ |
| lypinator | 0:bb348c97df44 | 1080 | __STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1081 | { |
| lypinator | 0:bb348c97df44 | 1082 | CLEAR_BIT(RCC->AHB3RSTR, Periphs); |
| lypinator | 0:bb348c97df44 | 1083 | } |
| lypinator | 0:bb348c97df44 | 1084 | |
| lypinator | 0:bb348c97df44 | 1085 | /** |
| lypinator | 0:bb348c97df44 | 1086 | * @brief Enable AHB3 peripheral clocks in low-power mode |
| lypinator | 0:bb348c97df44 | 1087 | * @rmtoll AHB3LPENR FMCLPEN LL_AHB3_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1088 | * AHB3LPENR FSMCLPEN LL_AHB3_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1089 | * AHB3LPENR QSPILPEN LL_AHB3_GRP1_EnableClockLowPower |
| lypinator | 0:bb348c97df44 | 1090 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1091 | * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) |
| lypinator | 0:bb348c97df44 | 1092 | * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*) |
| lypinator | 0:bb348c97df44 | 1093 | * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) |
| lypinator | 0:bb348c97df44 | 1094 | * |
| lypinator | 0:bb348c97df44 | 1095 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1096 | * @retval None |
| lypinator | 0:bb348c97df44 | 1097 | */ |
| lypinator | 0:bb348c97df44 | 1098 | __STATIC_INLINE void LL_AHB3_GRP1_EnableClockLowPower(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1099 | { |
| lypinator | 0:bb348c97df44 | 1100 | __IO uint32_t tmpreg; |
| lypinator | 0:bb348c97df44 | 1101 | SET_BIT(RCC->AHB3LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1102 | /* Delay after an RCC peripheral clock enabling */ |
| lypinator | 0:bb348c97df44 | 1103 | tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1104 | (void)tmpreg; |
| lypinator | 0:bb348c97df44 | 1105 | } |
| lypinator | 0:bb348c97df44 | 1106 | |
| lypinator | 0:bb348c97df44 | 1107 | /** |
| lypinator | 0:bb348c97df44 | 1108 | * @brief Disable AHB3 peripheral clocks in low-power mode |
| lypinator | 0:bb348c97df44 | 1109 | * @rmtoll AHB3LPENR FMCLPEN LL_AHB3_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1110 | * AHB3LPENR FSMCLPEN LL_AHB3_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1111 | * AHB3LPENR QSPILPEN LL_AHB3_GRP1_DisableClockLowPower |
| lypinator | 0:bb348c97df44 | 1112 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1113 | * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) |
| lypinator | 0:bb348c97df44 | 1114 | * @arg @ref LL_AHB3_GRP1_PERIPH_FSMC (*) |
| lypinator | 0:bb348c97df44 | 1115 | * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI (*) |
| lypinator | 0:bb348c97df44 | 1116 | * |
| lypinator | 0:bb348c97df44 | 1117 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1118 | * @retval None |
| lypinator | 0:bb348c97df44 | 1119 | */ |
| lypinator | 0:bb348c97df44 | 1120 | __STATIC_INLINE void LL_AHB3_GRP1_DisableClockLowPower(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1121 | { |
| lypinator | 0:bb348c97df44 | 1122 | CLEAR_BIT(RCC->AHB3LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1123 | } |
| lypinator | 0:bb348c97df44 | 1124 | |
| lypinator | 0:bb348c97df44 | 1125 | /** |
| lypinator | 0:bb348c97df44 | 1126 | * @} |
| lypinator | 0:bb348c97df44 | 1127 | */ |
| lypinator | 0:bb348c97df44 | 1128 | #endif /* RCC_AHB3_SUPPORT */ |
| lypinator | 0:bb348c97df44 | 1129 | |
| lypinator | 0:bb348c97df44 | 1130 | /** @defgroup BUS_LL_EF_APB1 APB1 |
| lypinator | 0:bb348c97df44 | 1131 | * @{ |
| lypinator | 0:bb348c97df44 | 1132 | */ |
| lypinator | 0:bb348c97df44 | 1133 | |
| lypinator | 0:bb348c97df44 | 1134 | /** |
| lypinator | 0:bb348c97df44 | 1135 | * @brief Enable APB1 peripherals clock. |
| lypinator | 0:bb348c97df44 | 1136 | * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1137 | * APB1ENR TIM3EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1138 | * APB1ENR TIM4EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1139 | * APB1ENR TIM5EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1140 | * APB1ENR TIM6EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1141 | * APB1ENR TIM7EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1142 | * APB1ENR TIM12EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1143 | * APB1ENR TIM13EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1144 | * APB1ENR TIM14EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1145 | * APB1ENR LPTIM1EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1146 | * APB1ENR WWDGEN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1147 | * APB1ENR SPI2EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1148 | * APB1ENR SPI3EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1149 | * APB1ENR SPDIFRXEN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1150 | * APB1ENR USART2EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1151 | * APB1ENR USART3EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1152 | * APB1ENR UART4EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1153 | * APB1ENR UART5EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1154 | * APB1ENR I2C1EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1155 | * APB1ENR I2C2EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1156 | * APB1ENR I2C3EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1157 | * APB1ENR FMPI2C1EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1158 | * APB1ENR CAN1EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1159 | * APB1ENR CAN2EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1160 | * APB1ENR CAN3EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1161 | * APB1ENR CECEN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1162 | * APB1ENR PWREN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1163 | * APB1ENR DACEN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1164 | * APB1ENR UART7EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1165 | * APB1ENR UART8EN LL_APB1_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1166 | * APB1ENR RTCAPBEN LL_APB1_GRP1_EnableClock |
| lypinator | 0:bb348c97df44 | 1167 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1168 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*) |
| lypinator | 0:bb348c97df44 | 1169 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) |
| lypinator | 0:bb348c97df44 | 1170 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) |
| lypinator | 0:bb348c97df44 | 1171 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 |
| lypinator | 0:bb348c97df44 | 1172 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) |
| lypinator | 0:bb348c97df44 | 1173 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) |
| lypinator | 0:bb348c97df44 | 1174 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) |
| lypinator | 0:bb348c97df44 | 1175 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) |
| lypinator | 0:bb348c97df44 | 1176 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) |
| lypinator | 0:bb348c97df44 | 1177 | * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*) |
| lypinator | 0:bb348c97df44 | 1178 | * @arg @ref LL_APB1_GRP1_PERIPH_WWDG |
| lypinator | 0:bb348c97df44 | 1179 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) |
| lypinator | 0:bb348c97df44 | 1180 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) |
| lypinator | 0:bb348c97df44 | 1181 | * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) |
| lypinator | 0:bb348c97df44 | 1182 | * @arg @ref LL_APB1_GRP1_PERIPH_USART2 |
| lypinator | 0:bb348c97df44 | 1183 | * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) |
| lypinator | 0:bb348c97df44 | 1184 | * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) |
| lypinator | 0:bb348c97df44 | 1185 | * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) |
| lypinator | 0:bb348c97df44 | 1186 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 |
| lypinator | 0:bb348c97df44 | 1187 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 |
| lypinator | 0:bb348c97df44 | 1188 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) |
| lypinator | 0:bb348c97df44 | 1189 | * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*) |
| lypinator | 0:bb348c97df44 | 1190 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) |
| lypinator | 0:bb348c97df44 | 1191 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) |
| lypinator | 0:bb348c97df44 | 1192 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) |
| lypinator | 0:bb348c97df44 | 1193 | * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) |
| lypinator | 0:bb348c97df44 | 1194 | * @arg @ref LL_APB1_GRP1_PERIPH_PWR |
| lypinator | 0:bb348c97df44 | 1195 | * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) |
| lypinator | 0:bb348c97df44 | 1196 | * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*) |
| lypinator | 0:bb348c97df44 | 1197 | * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*) |
| lypinator | 0:bb348c97df44 | 1198 | * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*) |
| lypinator | 0:bb348c97df44 | 1199 | * |
| lypinator | 0:bb348c97df44 | 1200 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1201 | * @retval None |
| lypinator | 0:bb348c97df44 | 1202 | */ |
| lypinator | 0:bb348c97df44 | 1203 | __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1204 | { |
| lypinator | 0:bb348c97df44 | 1205 | __IO uint32_t tmpreg; |
| lypinator | 0:bb348c97df44 | 1206 | SET_BIT(RCC->APB1ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1207 | /* Delay after an RCC peripheral clock enabling */ |
| lypinator | 0:bb348c97df44 | 1208 | tmpreg = READ_BIT(RCC->APB1ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1209 | (void)tmpreg; |
| lypinator | 0:bb348c97df44 | 1210 | } |
| lypinator | 0:bb348c97df44 | 1211 | |
| lypinator | 0:bb348c97df44 | 1212 | /** |
| lypinator | 0:bb348c97df44 | 1213 | * @brief Check if APB1 peripheral clock is enabled or not |
| lypinator | 0:bb348c97df44 | 1214 | * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1215 | * APB1ENR TIM3EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1216 | * APB1ENR TIM4EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1217 | * APB1ENR TIM5EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1218 | * APB1ENR TIM6EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1219 | * APB1ENR TIM7EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1220 | * APB1ENR TIM12EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1221 | * APB1ENR TIM13EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1222 | * APB1ENR TIM14EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1223 | * APB1ENR LPTIM1EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1224 | * APB1ENR WWDGEN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1225 | * APB1ENR SPI2EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1226 | * APB1ENR SPI3EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1227 | * APB1ENR SPDIFRXEN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1228 | * APB1ENR USART2EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1229 | * APB1ENR USART3EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1230 | * APB1ENR UART4EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1231 | * APB1ENR UART5EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1232 | * APB1ENR I2C1EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1233 | * APB1ENR I2C2EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1234 | * APB1ENR I2C3EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1235 | * APB1ENR FMPI2C1EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1236 | * APB1ENR CAN1EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1237 | * APB1ENR CAN2EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1238 | * APB1ENR CAN3EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1239 | * APB1ENR CECEN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1240 | * APB1ENR PWREN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1241 | * APB1ENR DACEN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1242 | * APB1ENR UART7EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1243 | * APB1ENR UART8EN LL_APB1_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1244 | * APB1ENR RTCAPBEN LL_APB1_GRP1_IsEnabledClock |
| lypinator | 0:bb348c97df44 | 1245 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1246 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*) |
| lypinator | 0:bb348c97df44 | 1247 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) |
| lypinator | 0:bb348c97df44 | 1248 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) |
| lypinator | 0:bb348c97df44 | 1249 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 |
| lypinator | 0:bb348c97df44 | 1250 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) |
| lypinator | 0:bb348c97df44 | 1251 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) |
| lypinator | 0:bb348c97df44 | 1252 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) |
| lypinator | 0:bb348c97df44 | 1253 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) |
| lypinator | 0:bb348c97df44 | 1254 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) |
| lypinator | 0:bb348c97df44 | 1255 | * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*) |
| lypinator | 0:bb348c97df44 | 1256 | * @arg @ref LL_APB1_GRP1_PERIPH_WWDG |
| lypinator | 0:bb348c97df44 | 1257 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) |
| lypinator | 0:bb348c97df44 | 1258 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) |
| lypinator | 0:bb348c97df44 | 1259 | * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) |
| lypinator | 0:bb348c97df44 | 1260 | * @arg @ref LL_APB1_GRP1_PERIPH_USART2 |
| lypinator | 0:bb348c97df44 | 1261 | * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) |
| lypinator | 0:bb348c97df44 | 1262 | * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) |
| lypinator | 0:bb348c97df44 | 1263 | * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) |
| lypinator | 0:bb348c97df44 | 1264 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 |
| lypinator | 0:bb348c97df44 | 1265 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 |
| lypinator | 0:bb348c97df44 | 1266 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) |
| lypinator | 0:bb348c97df44 | 1267 | * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*) |
| lypinator | 0:bb348c97df44 | 1268 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) |
| lypinator | 0:bb348c97df44 | 1269 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) |
| lypinator | 0:bb348c97df44 | 1270 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) |
| lypinator | 0:bb348c97df44 | 1271 | * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) |
| lypinator | 0:bb348c97df44 | 1272 | * @arg @ref LL_APB1_GRP1_PERIPH_PWR |
| lypinator | 0:bb348c97df44 | 1273 | * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) |
| lypinator | 0:bb348c97df44 | 1274 | * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*) |
| lypinator | 0:bb348c97df44 | 1275 | * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*) |
| lypinator | 0:bb348c97df44 | 1276 | * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*) |
| lypinator | 0:bb348c97df44 | 1277 | * |
| lypinator | 0:bb348c97df44 | 1278 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1279 | * @retval State of Periphs (1 or 0). |
| lypinator | 0:bb348c97df44 | 1280 | */ |
| lypinator | 0:bb348c97df44 | 1281 | __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1282 | { |
| lypinator | 0:bb348c97df44 | 1283 | return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs); |
| lypinator | 0:bb348c97df44 | 1284 | } |
| lypinator | 0:bb348c97df44 | 1285 | |
| lypinator | 0:bb348c97df44 | 1286 | /** |
| lypinator | 0:bb348c97df44 | 1287 | * @brief Disable APB1 peripherals clock. |
| lypinator | 0:bb348c97df44 | 1288 | * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1289 | * APB1ENR TIM3EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1290 | * APB1ENR TIM4EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1291 | * APB1ENR TIM5EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1292 | * APB1ENR TIM6EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1293 | * APB1ENR TIM7EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1294 | * APB1ENR TIM12EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1295 | * APB1ENR TIM13EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1296 | * APB1ENR TIM14EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1297 | * APB1ENR LPTIM1EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1298 | * APB1ENR WWDGEN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1299 | * APB1ENR SPI2EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1300 | * APB1ENR SPI3EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1301 | * APB1ENR SPDIFRXEN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1302 | * APB1ENR USART2EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1303 | * APB1ENR USART3EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1304 | * APB1ENR UART4EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1305 | * APB1ENR UART5EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1306 | * APB1ENR I2C1EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1307 | * APB1ENR I2C2EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1308 | * APB1ENR I2C3EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1309 | * APB1ENR FMPI2C1EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1310 | * APB1ENR CAN1EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1311 | * APB1ENR CAN2EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1312 | * APB1ENR CAN3EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1313 | * APB1ENR CECEN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1314 | * APB1ENR PWREN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1315 | * APB1ENR DACEN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1316 | * APB1ENR UART7EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1317 | * APB1ENR UART8EN LL_APB1_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1318 | * APB1ENR RTCAPBEN LL_APB1_GRP1_DisableClock |
| lypinator | 0:bb348c97df44 | 1319 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1320 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*) |
| lypinator | 0:bb348c97df44 | 1321 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) |
| lypinator | 0:bb348c97df44 | 1322 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) |
| lypinator | 0:bb348c97df44 | 1323 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 |
| lypinator | 0:bb348c97df44 | 1324 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) |
| lypinator | 0:bb348c97df44 | 1325 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) |
| lypinator | 0:bb348c97df44 | 1326 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) |
| lypinator | 0:bb348c97df44 | 1327 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) |
| lypinator | 0:bb348c97df44 | 1328 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) |
| lypinator | 0:bb348c97df44 | 1329 | * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*) |
| lypinator | 0:bb348c97df44 | 1330 | * @arg @ref LL_APB1_GRP1_PERIPH_WWDG |
| lypinator | 0:bb348c97df44 | 1331 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) |
| lypinator | 0:bb348c97df44 | 1332 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) |
| lypinator | 0:bb348c97df44 | 1333 | * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) |
| lypinator | 0:bb348c97df44 | 1334 | * @arg @ref LL_APB1_GRP1_PERIPH_USART2 |
| lypinator | 0:bb348c97df44 | 1335 | * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) |
| lypinator | 0:bb348c97df44 | 1336 | * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) |
| lypinator | 0:bb348c97df44 | 1337 | * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) |
| lypinator | 0:bb348c97df44 | 1338 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 |
| lypinator | 0:bb348c97df44 | 1339 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 |
| lypinator | 0:bb348c97df44 | 1340 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) |
| lypinator | 0:bb348c97df44 | 1341 | * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*) |
| lypinator | 0:bb348c97df44 | 1342 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) |
| lypinator | 0:bb348c97df44 | 1343 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) |
| lypinator | 0:bb348c97df44 | 1344 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) |
| lypinator | 0:bb348c97df44 | 1345 | * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) |
| lypinator | 0:bb348c97df44 | 1346 | * @arg @ref LL_APB1_GRP1_PERIPH_PWR |
| lypinator | 0:bb348c97df44 | 1347 | * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) |
| lypinator | 0:bb348c97df44 | 1348 | * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*) |
| lypinator | 0:bb348c97df44 | 1349 | * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*) |
| lypinator | 0:bb348c97df44 | 1350 | * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*) |
| lypinator | 0:bb348c97df44 | 1351 | * |
| lypinator | 0:bb348c97df44 | 1352 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1353 | * @retval None |
| lypinator | 0:bb348c97df44 | 1354 | */ |
| lypinator | 0:bb348c97df44 | 1355 | __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1356 | { |
| lypinator | 0:bb348c97df44 | 1357 | CLEAR_BIT(RCC->APB1ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1358 | } |
| lypinator | 0:bb348c97df44 | 1359 | |
| lypinator | 0:bb348c97df44 | 1360 | /** |
| lypinator | 0:bb348c97df44 | 1361 | * @brief Force APB1 peripherals reset. |
| lypinator | 0:bb348c97df44 | 1362 | * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1363 | * APB1RSTR TIM3RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1364 | * APB1RSTR TIM4RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1365 | * APB1RSTR TIM5RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1366 | * APB1RSTR TIM6RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1367 | * APB1RSTR TIM7RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1368 | * APB1RSTR TIM12RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1369 | * APB1RSTR TIM13RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1370 | * APB1RSTR TIM14RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1371 | * APB1RSTR LPTIM1RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1372 | * APB1RSTR WWDGRST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1373 | * APB1RSTR SPI2RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1374 | * APB1RSTR SPI3RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1375 | * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1376 | * APB1RSTR USART2RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1377 | * APB1RSTR USART3RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1378 | * APB1RSTR UART4RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1379 | * APB1RSTR UART5RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1380 | * APB1RSTR I2C1RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1381 | * APB1RSTR I2C2RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1382 | * APB1RSTR I2C3RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1383 | * APB1RSTR FMPI2C1RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1384 | * APB1RSTR CAN1RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1385 | * APB1RSTR CAN2RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1386 | * APB1RSTR CAN3RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1387 | * APB1RSTR CECRST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1388 | * APB1RSTR PWRRST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1389 | * APB1RSTR DACRST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1390 | * APB1RSTR UART7RST LL_APB1_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1391 | * APB1RSTR UART8RST LL_APB1_GRP1_ForceReset |
| lypinator | 0:bb348c97df44 | 1392 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1393 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*) |
| lypinator | 0:bb348c97df44 | 1394 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) |
| lypinator | 0:bb348c97df44 | 1395 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) |
| lypinator | 0:bb348c97df44 | 1396 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 |
| lypinator | 0:bb348c97df44 | 1397 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) |
| lypinator | 0:bb348c97df44 | 1398 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) |
| lypinator | 0:bb348c97df44 | 1399 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) |
| lypinator | 0:bb348c97df44 | 1400 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) |
| lypinator | 0:bb348c97df44 | 1401 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) |
| lypinator | 0:bb348c97df44 | 1402 | * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*) |
| lypinator | 0:bb348c97df44 | 1403 | * @arg @ref LL_APB1_GRP1_PERIPH_WWDG |
| lypinator | 0:bb348c97df44 | 1404 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) |
| lypinator | 0:bb348c97df44 | 1405 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) |
| lypinator | 0:bb348c97df44 | 1406 | * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) |
| lypinator | 0:bb348c97df44 | 1407 | * @arg @ref LL_APB1_GRP1_PERIPH_USART2 |
| lypinator | 0:bb348c97df44 | 1408 | * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) |
| lypinator | 0:bb348c97df44 | 1409 | * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) |
| lypinator | 0:bb348c97df44 | 1410 | * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) |
| lypinator | 0:bb348c97df44 | 1411 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 |
| lypinator | 0:bb348c97df44 | 1412 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 |
| lypinator | 0:bb348c97df44 | 1413 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) |
| lypinator | 0:bb348c97df44 | 1414 | * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*) |
| lypinator | 0:bb348c97df44 | 1415 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) |
| lypinator | 0:bb348c97df44 | 1416 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) |
| lypinator | 0:bb348c97df44 | 1417 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) |
| lypinator | 0:bb348c97df44 | 1418 | * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) |
| lypinator | 0:bb348c97df44 | 1419 | * @arg @ref LL_APB1_GRP1_PERIPH_PWR |
| lypinator | 0:bb348c97df44 | 1420 | * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) |
| lypinator | 0:bb348c97df44 | 1421 | * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*) |
| lypinator | 0:bb348c97df44 | 1422 | * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*) |
| lypinator | 0:bb348c97df44 | 1423 | * |
| lypinator | 0:bb348c97df44 | 1424 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1425 | * @retval None |
| lypinator | 0:bb348c97df44 | 1426 | */ |
| lypinator | 0:bb348c97df44 | 1427 | __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1428 | { |
| lypinator | 0:bb348c97df44 | 1429 | SET_BIT(RCC->APB1RSTR, Periphs); |
| lypinator | 0:bb348c97df44 | 1430 | } |
| lypinator | 0:bb348c97df44 | 1431 | |
| lypinator | 0:bb348c97df44 | 1432 | /** |
| lypinator | 0:bb348c97df44 | 1433 | * @brief Release APB1 peripherals reset. |
| lypinator | 0:bb348c97df44 | 1434 | * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1435 | * APB1RSTR TIM3RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1436 | * APB1RSTR TIM4RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1437 | * APB1RSTR TIM5RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1438 | * APB1RSTR TIM6RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1439 | * APB1RSTR TIM7RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1440 | * APB1RSTR TIM12RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1441 | * APB1RSTR TIM13RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1442 | * APB1RSTR TIM14RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1443 | * APB1RSTR LPTIM1RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1444 | * APB1RSTR WWDGRST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1445 | * APB1RSTR SPI2RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1446 | * APB1RSTR SPI3RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1447 | * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1448 | * APB1RSTR USART2RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1449 | * APB1RSTR USART3RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1450 | * APB1RSTR UART4RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1451 | * APB1RSTR UART5RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1452 | * APB1RSTR I2C1RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1453 | * APB1RSTR I2C2RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1454 | * APB1RSTR I2C3RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1455 | * APB1RSTR FMPI2C1RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1456 | * APB1RSTR CAN1RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1457 | * APB1RSTR CAN2RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1458 | * APB1RSTR CAN3RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1459 | * APB1RSTR CECRST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1460 | * APB1RSTR PWRRST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1461 | * APB1RSTR DACRST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1462 | * APB1RSTR UART7RST LL_APB1_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1463 | * APB1RSTR UART8RST LL_APB1_GRP1_ReleaseReset |
| lypinator | 0:bb348c97df44 | 1464 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1465 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*) |
| lypinator | 0:bb348c97df44 | 1466 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) |
| lypinator | 0:bb348c97df44 | 1467 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) |
| lypinator | 0:bb348c97df44 | 1468 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 |
| lypinator | 0:bb348c97df44 | 1469 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) |
| lypinator | 0:bb348c97df44 | 1470 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) |
| lypinator | 0:bb348c97df44 | 1471 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) |
| lypinator | 0:bb348c97df44 | 1472 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) |
| lypinator | 0:bb348c97df44 | 1473 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) |
| lypinator | 0:bb348c97df44 | 1474 | * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*) |
| lypinator | 0:bb348c97df44 | 1475 | * @arg @ref LL_APB1_GRP1_PERIPH_WWDG |
| lypinator | 0:bb348c97df44 | 1476 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) |
| lypinator | 0:bb348c97df44 | 1477 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) |
| lypinator | 0:bb348c97df44 | 1478 | * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) |
| lypinator | 0:bb348c97df44 | 1479 | * @arg @ref LL_APB1_GRP1_PERIPH_USART2 |
| lypinator | 0:bb348c97df44 | 1480 | * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) |
| lypinator | 0:bb348c97df44 | 1481 | * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) |
| lypinator | 0:bb348c97df44 | 1482 | * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) |
| lypinator | 0:bb348c97df44 | 1483 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 |
| lypinator | 0:bb348c97df44 | 1484 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 |
| lypinator | 0:bb348c97df44 | 1485 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) |
| lypinator | 0:bb348c97df44 | 1486 | * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*) |
| lypinator | 0:bb348c97df44 | 1487 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) |
| lypinator | 0:bb348c97df44 | 1488 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) |
| lypinator | 0:bb348c97df44 | 1489 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) |
| lypinator | 0:bb348c97df44 | 1490 | * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) |
| lypinator | 0:bb348c97df44 | 1491 | * @arg @ref LL_APB1_GRP1_PERIPH_PWR |
| lypinator | 0:bb348c97df44 | 1492 | * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) |
| lypinator | 0:bb348c97df44 | 1493 | * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*) |
| lypinator | 0:bb348c97df44 | 1494 | * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*) |
| lypinator | 0:bb348c97df44 | 1495 | * |
| lypinator | 0:bb348c97df44 | 1496 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1497 | * @retval None |
| lypinator | 0:bb348c97df44 | 1498 | */ |
| lypinator | 0:bb348c97df44 | 1499 | __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1500 | { |
| lypinator | 0:bb348c97df44 | 1501 | CLEAR_BIT(RCC->APB1RSTR, Periphs); |
| lypinator | 0:bb348c97df44 | 1502 | } |
| lypinator | 0:bb348c97df44 | 1503 | |
| lypinator | 0:bb348c97df44 | 1504 | /** |
| lypinator | 0:bb348c97df44 | 1505 | * @brief Enable APB1 peripheral clocks in low-power mode |
| lypinator | 0:bb348c97df44 | 1506 | * @rmtoll APB1LPENR TIM2LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1507 | * APB1LPENR TIM3LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1508 | * APB1LPENR TIM4LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1509 | * APB1LPENR TIM5LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1510 | * APB1LPENR TIM6LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1511 | * APB1LPENR TIM7LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1512 | * APB1LPENR TIM12LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1513 | * APB1LPENR TIM13LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1514 | * APB1LPENR TIM14LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1515 | * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1516 | * APB1LPENR WWDGLPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1517 | * APB1LPENR SPI2LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1518 | * APB1LPENR SPI3LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1519 | * APB1LPENR SPDIFRXLPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1520 | * APB1LPENR USART2LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1521 | * APB1LPENR USART3LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1522 | * APB1LPENR UART4LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1523 | * APB1LPENR UART5LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1524 | * APB1LPENR I2C1LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1525 | * APB1LPENR I2C2LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1526 | * APB1LPENR I2C3LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1527 | * APB1LPENR FMPI2C1LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1528 | * APB1LPENR CAN1LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1529 | * APB1LPENR CAN2LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1530 | * APB1LPENR CAN3LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1531 | * APB1LPENR CECLPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1532 | * APB1LPENR PWRLPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1533 | * APB1LPENR DACLPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1534 | * APB1LPENR UART7LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1535 | * APB1LPENR UART8LPEN LL_APB1_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1536 | * APB1LPENR RTCAPBLPEN LL_APB1_GRP1_EnableClockLowPower |
| lypinator | 0:bb348c97df44 | 1537 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1538 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*) |
| lypinator | 0:bb348c97df44 | 1539 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) |
| lypinator | 0:bb348c97df44 | 1540 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) |
| lypinator | 0:bb348c97df44 | 1541 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 |
| lypinator | 0:bb348c97df44 | 1542 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) |
| lypinator | 0:bb348c97df44 | 1543 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) |
| lypinator | 0:bb348c97df44 | 1544 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) |
| lypinator | 0:bb348c97df44 | 1545 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) |
| lypinator | 0:bb348c97df44 | 1546 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) |
| lypinator | 0:bb348c97df44 | 1547 | * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*) |
| lypinator | 0:bb348c97df44 | 1548 | * @arg @ref LL_APB1_GRP1_PERIPH_WWDG |
| lypinator | 0:bb348c97df44 | 1549 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) |
| lypinator | 0:bb348c97df44 | 1550 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) |
| lypinator | 0:bb348c97df44 | 1551 | * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) |
| lypinator | 0:bb348c97df44 | 1552 | * @arg @ref LL_APB1_GRP1_PERIPH_USART2 |
| lypinator | 0:bb348c97df44 | 1553 | * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) |
| lypinator | 0:bb348c97df44 | 1554 | * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) |
| lypinator | 0:bb348c97df44 | 1555 | * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) |
| lypinator | 0:bb348c97df44 | 1556 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 |
| lypinator | 0:bb348c97df44 | 1557 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 |
| lypinator | 0:bb348c97df44 | 1558 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) |
| lypinator | 0:bb348c97df44 | 1559 | * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*) |
| lypinator | 0:bb348c97df44 | 1560 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) |
| lypinator | 0:bb348c97df44 | 1561 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) |
| lypinator | 0:bb348c97df44 | 1562 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) |
| lypinator | 0:bb348c97df44 | 1563 | * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) |
| lypinator | 0:bb348c97df44 | 1564 | * @arg @ref LL_APB1_GRP1_PERIPH_PWR |
| lypinator | 0:bb348c97df44 | 1565 | * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) |
| lypinator | 0:bb348c97df44 | 1566 | * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*) |
| lypinator | 0:bb348c97df44 | 1567 | * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*) |
| lypinator | 0:bb348c97df44 | 1568 | * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*) |
| lypinator | 0:bb348c97df44 | 1569 | * |
| lypinator | 0:bb348c97df44 | 1570 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1571 | * @retval None |
| lypinator | 0:bb348c97df44 | 1572 | */ |
| lypinator | 0:bb348c97df44 | 1573 | __STATIC_INLINE void LL_APB1_GRP1_EnableClockLowPower(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1574 | { |
| lypinator | 0:bb348c97df44 | 1575 | __IO uint32_t tmpreg; |
| lypinator | 0:bb348c97df44 | 1576 | SET_BIT(RCC->APB1LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1577 | /* Delay after an RCC peripheral clock enabling */ |
| lypinator | 0:bb348c97df44 | 1578 | tmpreg = READ_BIT(RCC->APB1LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1579 | (void)tmpreg; |
| lypinator | 0:bb348c97df44 | 1580 | } |
| lypinator | 0:bb348c97df44 | 1581 | |
| lypinator | 0:bb348c97df44 | 1582 | /** |
| lypinator | 0:bb348c97df44 | 1583 | * @brief Disable APB1 peripheral clocks in low-power mode |
| lypinator | 0:bb348c97df44 | 1584 | * @rmtoll APB1LPENR TIM2LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1585 | * APB1LPENR TIM3LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1586 | * APB1LPENR TIM4LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1587 | * APB1LPENR TIM5LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1588 | * APB1LPENR TIM6LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1589 | * APB1LPENR TIM7LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1590 | * APB1LPENR TIM12LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1591 | * APB1LPENR TIM13LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1592 | * APB1LPENR TIM14LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1593 | * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1594 | * APB1LPENR WWDGLPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1595 | * APB1LPENR SPI2LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1596 | * APB1LPENR SPI3LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1597 | * APB1LPENR SPDIFRXLPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1598 | * APB1LPENR USART2LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1599 | * APB1LPENR USART3LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1600 | * APB1LPENR UART4LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1601 | * APB1LPENR UART5LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1602 | * APB1LPENR I2C1LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1603 | * APB1LPENR I2C2LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1604 | * APB1LPENR I2C3LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1605 | * APB1LPENR FMPI2C1LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1606 | * APB1LPENR CAN1LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1607 | * APB1LPENR CAN2LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1608 | * APB1LPENR CAN3LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1609 | * APB1LPENR CECLPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1610 | * APB1LPENR PWRLPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1611 | * APB1LPENR DACLPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1612 | * APB1LPENR UART7LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1613 | * APB1LPENR UART8LPEN LL_APB1_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1614 | * APB1LPENR RTCAPBLPEN LL_APB1_GRP1_DisableClockLowPower |
| lypinator | 0:bb348c97df44 | 1615 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1616 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 (*) |
| lypinator | 0:bb348c97df44 | 1617 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 (*) |
| lypinator | 0:bb348c97df44 | 1618 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 (*) |
| lypinator | 0:bb348c97df44 | 1619 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 |
| lypinator | 0:bb348c97df44 | 1620 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 (*) |
| lypinator | 0:bb348c97df44 | 1621 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 (*) |
| lypinator | 0:bb348c97df44 | 1622 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 (*) |
| lypinator | 0:bb348c97df44 | 1623 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 (*) |
| lypinator | 0:bb348c97df44 | 1624 | * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 (*) |
| lypinator | 0:bb348c97df44 | 1625 | * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 (*) |
| lypinator | 0:bb348c97df44 | 1626 | * @arg @ref LL_APB1_GRP1_PERIPH_WWDG |
| lypinator | 0:bb348c97df44 | 1627 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 (*) |
| lypinator | 0:bb348c97df44 | 1628 | * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 (*) |
| lypinator | 0:bb348c97df44 | 1629 | * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) |
| lypinator | 0:bb348c97df44 | 1630 | * @arg @ref LL_APB1_GRP1_PERIPH_USART2 |
| lypinator | 0:bb348c97df44 | 1631 | * @arg @ref LL_APB1_GRP1_PERIPH_USART3 (*) |
| lypinator | 0:bb348c97df44 | 1632 | * @arg @ref LL_APB1_GRP1_PERIPH_UART4 (*) |
| lypinator | 0:bb348c97df44 | 1633 | * @arg @ref LL_APB1_GRP1_PERIPH_UART5 (*) |
| lypinator | 0:bb348c97df44 | 1634 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 |
| lypinator | 0:bb348c97df44 | 1635 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 |
| lypinator | 0:bb348c97df44 | 1636 | * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 (*) |
| lypinator | 0:bb348c97df44 | 1637 | * @arg @ref LL_APB1_GRP1_PERIPH_FMPI2C1 (*) |
| lypinator | 0:bb348c97df44 | 1638 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 (*) |
| lypinator | 0:bb348c97df44 | 1639 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) |
| lypinator | 0:bb348c97df44 | 1640 | * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) |
| lypinator | 0:bb348c97df44 | 1641 | * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) |
| lypinator | 0:bb348c97df44 | 1642 | * @arg @ref LL_APB1_GRP1_PERIPH_PWR |
| lypinator | 0:bb348c97df44 | 1643 | * @arg @ref LL_APB1_GRP1_PERIPH_DAC1 (*) |
| lypinator | 0:bb348c97df44 | 1644 | * @arg @ref LL_APB1_GRP1_PERIPH_UART7 (*) |
| lypinator | 0:bb348c97df44 | 1645 | * @arg @ref LL_APB1_GRP1_PERIPH_UART8 (*) |
| lypinator | 0:bb348c97df44 | 1646 | * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*) |
| lypinator | 0:bb348c97df44 | 1647 | * |
| lypinator | 0:bb348c97df44 | 1648 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1649 | * @retval None |
| lypinator | 0:bb348c97df44 | 1650 | */ |
| lypinator | 0:bb348c97df44 | 1651 | __STATIC_INLINE void LL_APB1_GRP1_DisableClockLowPower(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1652 | { |
| lypinator | 0:bb348c97df44 | 1653 | CLEAR_BIT(RCC->APB1LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1654 | } |
| lypinator | 0:bb348c97df44 | 1655 | |
| lypinator | 0:bb348c97df44 | 1656 | /** |
| lypinator | 0:bb348c97df44 | 1657 | * @} |
| lypinator | 0:bb348c97df44 | 1658 | */ |
| lypinator | 0:bb348c97df44 | 1659 | |
| lypinator | 0:bb348c97df44 | 1660 | /** @defgroup BUS_LL_EF_APB2 APB2 |
| lypinator | 0:bb348c97df44 | 1661 | * @{ |
| lypinator | 0:bb348c97df44 | 1662 | */ |
| lypinator | 0:bb348c97df44 | 1663 | |
| lypinator | 0:bb348c97df44 | 1664 | /** |
| lypinator | 0:bb348c97df44 | 1665 | * @brief Enable APB2 peripherals clock. |
| lypinator | 0:bb348c97df44 | 1666 | * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1667 | * APB2ENR TIM8EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1668 | * APB2ENR USART1EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1669 | * APB2ENR USART6EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1670 | * APB2ENR UART9EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1671 | * APB2ENR UART10EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1672 | * APB2ENR ADC1EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1673 | * APB2ENR ADC2EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1674 | * APB2ENR ADC3EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1675 | * APB2ENR SDIOEN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1676 | * APB2ENR SPI1EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1677 | * APB2ENR SPI4EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1678 | * APB2ENR SYSCFGEN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1679 | * APB2ENR EXTITEN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1680 | * APB2ENR TIM9EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1681 | * APB2ENR TIM10EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1682 | * APB2ENR TIM11EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1683 | * APB2ENR SPI5EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1684 | * APB2ENR SPI6EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1685 | * APB2ENR SAI1EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1686 | * APB2ENR SAI2EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1687 | * APB2ENR LTDCEN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1688 | * APB2ENR DSIEN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1689 | * APB2ENR DFSDM1EN LL_APB2_GRP1_EnableClock\n |
| lypinator | 0:bb348c97df44 | 1690 | * APB2ENR DFSDM2EN LL_APB2_GRP1_EnableClock |
| lypinator | 0:bb348c97df44 | 1691 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1692 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 |
| lypinator | 0:bb348c97df44 | 1693 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) |
| lypinator | 0:bb348c97df44 | 1694 | * @arg @ref LL_APB2_GRP1_PERIPH_USART1 |
| lypinator | 0:bb348c97df44 | 1695 | * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*) |
| lypinator | 0:bb348c97df44 | 1696 | * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*) |
| lypinator | 0:bb348c97df44 | 1697 | * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*) |
| lypinator | 0:bb348c97df44 | 1698 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 |
| lypinator | 0:bb348c97df44 | 1699 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*) |
| lypinator | 0:bb348c97df44 | 1700 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*) |
| lypinator | 0:bb348c97df44 | 1701 | * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*) |
| lypinator | 0:bb348c97df44 | 1702 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 |
| lypinator | 0:bb348c97df44 | 1703 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) |
| lypinator | 0:bb348c97df44 | 1704 | * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG |
| lypinator | 0:bb348c97df44 | 1705 | * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*) |
| lypinator | 0:bb348c97df44 | 1706 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 |
| lypinator | 0:bb348c97df44 | 1707 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) |
| lypinator | 0:bb348c97df44 | 1708 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 |
| lypinator | 0:bb348c97df44 | 1709 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*) |
| lypinator | 0:bb348c97df44 | 1710 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) |
| lypinator | 0:bb348c97df44 | 1711 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*) |
| lypinator | 0:bb348c97df44 | 1712 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*) |
| lypinator | 0:bb348c97df44 | 1713 | * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*) |
| lypinator | 0:bb348c97df44 | 1714 | * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*) |
| lypinator | 0:bb348c97df44 | 1715 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*) |
| lypinator | 0:bb348c97df44 | 1716 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*) |
| lypinator | 0:bb348c97df44 | 1717 | |
| lypinator | 0:bb348c97df44 | 1718 | * |
| lypinator | 0:bb348c97df44 | 1719 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1720 | * @retval None |
| lypinator | 0:bb348c97df44 | 1721 | */ |
| lypinator | 0:bb348c97df44 | 1722 | __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1723 | { |
| lypinator | 0:bb348c97df44 | 1724 | __IO uint32_t tmpreg; |
| lypinator | 0:bb348c97df44 | 1725 | SET_BIT(RCC->APB2ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1726 | /* Delay after an RCC peripheral clock enabling */ |
| lypinator | 0:bb348c97df44 | 1727 | tmpreg = READ_BIT(RCC->APB2ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1728 | (void)tmpreg; |
| lypinator | 0:bb348c97df44 | 1729 | } |
| lypinator | 0:bb348c97df44 | 1730 | |
| lypinator | 0:bb348c97df44 | 1731 | /** |
| lypinator | 0:bb348c97df44 | 1732 | * @brief Check if APB2 peripheral clock is enabled or not |
| lypinator | 0:bb348c97df44 | 1733 | * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1734 | * APB2ENR TIM8EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1735 | * APB2ENR USART1EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1736 | * APB2ENR USART6EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1737 | * APB2ENR UART9EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1738 | * APB2ENR UART10EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1739 | * APB2ENR ADC1EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1740 | * APB2ENR ADC2EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1741 | * APB2ENR ADC3EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1742 | * APB2ENR SDIOEN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1743 | * APB2ENR SPI1EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1744 | * APB2ENR SPI4EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1745 | * APB2ENR SYSCFGEN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1746 | * APB2ENR EXTITEN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1747 | * APB2ENR TIM9EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1748 | * APB2ENR TIM10EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1749 | * APB2ENR TIM11EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1750 | * APB2ENR SPI5EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1751 | * APB2ENR SPI6EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1752 | * APB2ENR SAI1EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1753 | * APB2ENR SAI2EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1754 | * APB2ENR LTDCEN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1755 | * APB2ENR DSIEN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1756 | * APB2ENR DFSDM1EN LL_APB2_GRP1_IsEnabledClock\n |
| lypinator | 0:bb348c97df44 | 1757 | * APB2ENR DFSDM2EN LL_APB2_GRP1_IsEnabledClock |
| lypinator | 0:bb348c97df44 | 1758 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1759 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 |
| lypinator | 0:bb348c97df44 | 1760 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) |
| lypinator | 0:bb348c97df44 | 1761 | * @arg @ref LL_APB2_GRP1_PERIPH_USART1 |
| lypinator | 0:bb348c97df44 | 1762 | * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*) |
| lypinator | 0:bb348c97df44 | 1763 | * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*) |
| lypinator | 0:bb348c97df44 | 1764 | * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*) |
| lypinator | 0:bb348c97df44 | 1765 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 |
| lypinator | 0:bb348c97df44 | 1766 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*) |
| lypinator | 0:bb348c97df44 | 1767 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*) |
| lypinator | 0:bb348c97df44 | 1768 | * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*) |
| lypinator | 0:bb348c97df44 | 1769 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 |
| lypinator | 0:bb348c97df44 | 1770 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) |
| lypinator | 0:bb348c97df44 | 1771 | * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG |
| lypinator | 0:bb348c97df44 | 1772 | * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*) |
| lypinator | 0:bb348c97df44 | 1773 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 |
| lypinator | 0:bb348c97df44 | 1774 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) |
| lypinator | 0:bb348c97df44 | 1775 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 |
| lypinator | 0:bb348c97df44 | 1776 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*) |
| lypinator | 0:bb348c97df44 | 1777 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) |
| lypinator | 0:bb348c97df44 | 1778 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*) |
| lypinator | 0:bb348c97df44 | 1779 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*) |
| lypinator | 0:bb348c97df44 | 1780 | * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*) |
| lypinator | 0:bb348c97df44 | 1781 | * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*) |
| lypinator | 0:bb348c97df44 | 1782 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*) |
| lypinator | 0:bb348c97df44 | 1783 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*) |
| lypinator | 0:bb348c97df44 | 1784 | * |
| lypinator | 0:bb348c97df44 | 1785 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1786 | * @retval State of Periphs (1 or 0). |
| lypinator | 0:bb348c97df44 | 1787 | */ |
| lypinator | 0:bb348c97df44 | 1788 | __STATIC_INLINE uint32_t LL_APB2_GRP1_IsEnabledClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1789 | { |
| lypinator | 0:bb348c97df44 | 1790 | return (READ_BIT(RCC->APB2ENR, Periphs) == Periphs); |
| lypinator | 0:bb348c97df44 | 1791 | } |
| lypinator | 0:bb348c97df44 | 1792 | |
| lypinator | 0:bb348c97df44 | 1793 | /** |
| lypinator | 0:bb348c97df44 | 1794 | * @brief Disable APB2 peripherals clock. |
| lypinator | 0:bb348c97df44 | 1795 | * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1796 | * APB2ENR TIM8EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1797 | * APB2ENR USART1EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1798 | * APB2ENR USART6EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1799 | * APB2ENR UART9EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1800 | * APB2ENR UART10EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1801 | * APB2ENR ADC1EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1802 | * APB2ENR ADC2EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1803 | * APB2ENR ADC3EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1804 | * APB2ENR SDIOEN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1805 | * APB2ENR SPI1EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1806 | * APB2ENR SPI4EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1807 | * APB2ENR SYSCFGEN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1808 | * APB2ENR EXTITEN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1809 | * APB2ENR TIM9EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1810 | * APB2ENR TIM10EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1811 | * APB2ENR TIM11EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1812 | * APB2ENR SPI5EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1813 | * APB2ENR SPI6EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1814 | * APB2ENR SAI1EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1815 | * APB2ENR SAI2EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1816 | * APB2ENR LTDCEN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1817 | * APB2ENR DSIEN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1818 | * APB2ENR DFSDM1EN LL_APB2_GRP1_DisableClock\n |
| lypinator | 0:bb348c97df44 | 1819 | * APB2ENR DFSDM2EN LL_APB2_GRP1_DisableClock |
| lypinator | 0:bb348c97df44 | 1820 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1821 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 |
| lypinator | 0:bb348c97df44 | 1822 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) |
| lypinator | 0:bb348c97df44 | 1823 | * @arg @ref LL_APB2_GRP1_PERIPH_USART1 |
| lypinator | 0:bb348c97df44 | 1824 | * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*) |
| lypinator | 0:bb348c97df44 | 1825 | * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*) |
| lypinator | 0:bb348c97df44 | 1826 | * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*) |
| lypinator | 0:bb348c97df44 | 1827 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 |
| lypinator | 0:bb348c97df44 | 1828 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*) |
| lypinator | 0:bb348c97df44 | 1829 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*) |
| lypinator | 0:bb348c97df44 | 1830 | * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*) |
| lypinator | 0:bb348c97df44 | 1831 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 |
| lypinator | 0:bb348c97df44 | 1832 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) |
| lypinator | 0:bb348c97df44 | 1833 | * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG |
| lypinator | 0:bb348c97df44 | 1834 | * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*) |
| lypinator | 0:bb348c97df44 | 1835 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 |
| lypinator | 0:bb348c97df44 | 1836 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) |
| lypinator | 0:bb348c97df44 | 1837 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 |
| lypinator | 0:bb348c97df44 | 1838 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*) |
| lypinator | 0:bb348c97df44 | 1839 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) |
| lypinator | 0:bb348c97df44 | 1840 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*) |
| lypinator | 0:bb348c97df44 | 1841 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*) |
| lypinator | 0:bb348c97df44 | 1842 | * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*) |
| lypinator | 0:bb348c97df44 | 1843 | * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*) |
| lypinator | 0:bb348c97df44 | 1844 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*) |
| lypinator | 0:bb348c97df44 | 1845 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*) |
| lypinator | 0:bb348c97df44 | 1846 | * |
| lypinator | 0:bb348c97df44 | 1847 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1848 | * @retval None |
| lypinator | 0:bb348c97df44 | 1849 | */ |
| lypinator | 0:bb348c97df44 | 1850 | __STATIC_INLINE void LL_APB2_GRP1_DisableClock(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1851 | { |
| lypinator | 0:bb348c97df44 | 1852 | CLEAR_BIT(RCC->APB2ENR, Periphs); |
| lypinator | 0:bb348c97df44 | 1853 | } |
| lypinator | 0:bb348c97df44 | 1854 | |
| lypinator | 0:bb348c97df44 | 1855 | /** |
| lypinator | 0:bb348c97df44 | 1856 | * @brief Force APB2 peripherals reset. |
| lypinator | 0:bb348c97df44 | 1857 | * @rmtoll APB2RSTR TIM1RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1858 | * APB2RSTR TIM8RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1859 | * APB2RSTR USART1RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1860 | * APB2RSTR USART6RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1861 | * APB2RSTR UART9RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1862 | * APB2RSTR UART10RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1863 | * APB2RSTR ADCRST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1864 | * APB2RSTR SDIORST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1865 | * APB2RSTR SPI1RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1866 | * APB2RSTR SPI4RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1867 | * APB2RSTR SYSCFGRST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1868 | * APB2RSTR TIM9RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1869 | * APB2RSTR TIM10RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1870 | * APB2RSTR TIM11RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1871 | * APB2RSTR SPI5RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1872 | * APB2RSTR SPI6RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1873 | * APB2RSTR SAI1RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1874 | * APB2RSTR SAI2RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1875 | * APB2RSTR LTDCRST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1876 | * APB2RSTR DSIRST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1877 | * APB2RSTR DFSDM1RST LL_APB2_GRP1_ForceReset\n |
| lypinator | 0:bb348c97df44 | 1878 | * APB2RSTR DFSDM2RST LL_APB2_GRP1_ForceReset |
| lypinator | 0:bb348c97df44 | 1879 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1880 | * @arg @ref LL_APB2_GRP1_PERIPH_ALL |
| lypinator | 0:bb348c97df44 | 1881 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 |
| lypinator | 0:bb348c97df44 | 1882 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) |
| lypinator | 0:bb348c97df44 | 1883 | * @arg @ref LL_APB2_GRP1_PERIPH_USART1 |
| lypinator | 0:bb348c97df44 | 1884 | * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*) |
| lypinator | 0:bb348c97df44 | 1885 | * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*) |
| lypinator | 0:bb348c97df44 | 1886 | * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*) |
| lypinator | 0:bb348c97df44 | 1887 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC |
| lypinator | 0:bb348c97df44 | 1888 | * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*) |
| lypinator | 0:bb348c97df44 | 1889 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 |
| lypinator | 0:bb348c97df44 | 1890 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) |
| lypinator | 0:bb348c97df44 | 1891 | * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG |
| lypinator | 0:bb348c97df44 | 1892 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 |
| lypinator | 0:bb348c97df44 | 1893 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) |
| lypinator | 0:bb348c97df44 | 1894 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 |
| lypinator | 0:bb348c97df44 | 1895 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*) |
| lypinator | 0:bb348c97df44 | 1896 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) |
| lypinator | 0:bb348c97df44 | 1897 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*) |
| lypinator | 0:bb348c97df44 | 1898 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*) |
| lypinator | 0:bb348c97df44 | 1899 | * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*) |
| lypinator | 0:bb348c97df44 | 1900 | * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*) |
| lypinator | 0:bb348c97df44 | 1901 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*) |
| lypinator | 0:bb348c97df44 | 1902 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*) |
| lypinator | 0:bb348c97df44 | 1903 | * |
| lypinator | 0:bb348c97df44 | 1904 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1905 | * @retval None |
| lypinator | 0:bb348c97df44 | 1906 | */ |
| lypinator | 0:bb348c97df44 | 1907 | __STATIC_INLINE void LL_APB2_GRP1_ForceReset(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1908 | { |
| lypinator | 0:bb348c97df44 | 1909 | SET_BIT(RCC->APB2RSTR, Periphs); |
| lypinator | 0:bb348c97df44 | 1910 | } |
| lypinator | 0:bb348c97df44 | 1911 | |
| lypinator | 0:bb348c97df44 | 1912 | /** |
| lypinator | 0:bb348c97df44 | 1913 | * @brief Release APB2 peripherals reset. |
| lypinator | 0:bb348c97df44 | 1914 | * @rmtoll APB2RSTR TIM1RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1915 | * APB2RSTR TIM8RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1916 | * APB2RSTR USART1RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1917 | * APB2RSTR USART6RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1918 | * APB2RSTR UART9RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1919 | * APB2RSTR UART10RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1920 | * APB2RSTR ADCRST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1921 | * APB2RSTR SDIORST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1922 | * APB2RSTR SPI1RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1923 | * APB2RSTR SPI4RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1924 | * APB2RSTR SYSCFGRST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1925 | * APB2RSTR TIM9RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1926 | * APB2RSTR TIM10RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1927 | * APB2RSTR TIM11RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1928 | * APB2RSTR SPI5RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1929 | * APB2RSTR SPI6RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1930 | * APB2RSTR SAI1RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1931 | * APB2RSTR SAI2RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1932 | * APB2RSTR LTDCRST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1933 | * APB2RSTR DSIRST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1934 | * APB2RSTR DFSDM1RST LL_APB2_GRP1_ReleaseReset\n |
| lypinator | 0:bb348c97df44 | 1935 | * APB2RSTR DFSDM2RST LL_APB2_GRP1_ReleaseReset |
| lypinator | 0:bb348c97df44 | 1936 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1937 | * @arg @ref LL_APB2_GRP1_PERIPH_ALL |
| lypinator | 0:bb348c97df44 | 1938 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 |
| lypinator | 0:bb348c97df44 | 1939 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) |
| lypinator | 0:bb348c97df44 | 1940 | * @arg @ref LL_APB2_GRP1_PERIPH_USART1 |
| lypinator | 0:bb348c97df44 | 1941 | * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*) |
| lypinator | 0:bb348c97df44 | 1942 | * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*) |
| lypinator | 0:bb348c97df44 | 1943 | * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*) |
| lypinator | 0:bb348c97df44 | 1944 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC |
| lypinator | 0:bb348c97df44 | 1945 | * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*) |
| lypinator | 0:bb348c97df44 | 1946 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 |
| lypinator | 0:bb348c97df44 | 1947 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) |
| lypinator | 0:bb348c97df44 | 1948 | * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG |
| lypinator | 0:bb348c97df44 | 1949 | * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*) |
| lypinator | 0:bb348c97df44 | 1950 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 |
| lypinator | 0:bb348c97df44 | 1951 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) |
| lypinator | 0:bb348c97df44 | 1952 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 |
| lypinator | 0:bb348c97df44 | 1953 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*) |
| lypinator | 0:bb348c97df44 | 1954 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) |
| lypinator | 0:bb348c97df44 | 1955 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*) |
| lypinator | 0:bb348c97df44 | 1956 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*) |
| lypinator | 0:bb348c97df44 | 1957 | * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*) |
| lypinator | 0:bb348c97df44 | 1958 | * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*) |
| lypinator | 0:bb348c97df44 | 1959 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*) |
| lypinator | 0:bb348c97df44 | 1960 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*) |
| lypinator | 0:bb348c97df44 | 1961 | * |
| lypinator | 0:bb348c97df44 | 1962 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 1963 | * @retval None |
| lypinator | 0:bb348c97df44 | 1964 | */ |
| lypinator | 0:bb348c97df44 | 1965 | __STATIC_INLINE void LL_APB2_GRP1_ReleaseReset(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 1966 | { |
| lypinator | 0:bb348c97df44 | 1967 | CLEAR_BIT(RCC->APB2RSTR, Periphs); |
| lypinator | 0:bb348c97df44 | 1968 | } |
| lypinator | 0:bb348c97df44 | 1969 | |
| lypinator | 0:bb348c97df44 | 1970 | /** |
| lypinator | 0:bb348c97df44 | 1971 | * @brief Enable APB2 peripheral clocks in low-power mode |
| lypinator | 0:bb348c97df44 | 1972 | * @rmtoll APB2LPENR TIM1LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1973 | * APB2LPENR TIM8LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1974 | * APB2LPENR USART1LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1975 | * APB2LPENR USART6LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1976 | * APB2LPENR UART9LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1977 | * APB2LPENR UART10LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1978 | * APB2LPENR ADC1LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1979 | * APB2LPENR ADC2LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1980 | * APB2LPENR ADC3LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1981 | * APB2LPENR SDIOLPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1982 | * APB2LPENR SPI1LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1983 | * APB2LPENR SPI4LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1984 | * APB2LPENR SYSCFGLPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1985 | * APB2LPENR EXTITLPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1986 | * APB2LPENR TIM9LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1987 | * APB2LPENR TIM10LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1988 | * APB2LPENR TIM11LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1989 | * APB2LPENR SPI5LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1990 | * APB2LPENR SPI6LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1991 | * APB2LPENR SAI1LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1992 | * APB2LPENR SAI2LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1993 | * APB2LPENR LTDCLPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1994 | * APB2LPENR DSILPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1995 | * APB2LPENR DFSDM1LPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1996 | * APB2LPENR DSILPEN LL_APB2_GRP1_EnableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 1997 | * APB2LPENR DFSDM2LPEN LL_APB2_GRP1_EnableClockLowPower |
| lypinator | 0:bb348c97df44 | 1998 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 1999 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 |
| lypinator | 0:bb348c97df44 | 2000 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) |
| lypinator | 0:bb348c97df44 | 2001 | * @arg @ref LL_APB2_GRP1_PERIPH_USART1 |
| lypinator | 0:bb348c97df44 | 2002 | * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*) |
| lypinator | 0:bb348c97df44 | 2003 | * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*) |
| lypinator | 0:bb348c97df44 | 2004 | * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*) |
| lypinator | 0:bb348c97df44 | 2005 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 |
| lypinator | 0:bb348c97df44 | 2006 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*) |
| lypinator | 0:bb348c97df44 | 2007 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*) |
| lypinator | 0:bb348c97df44 | 2008 | * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*) |
| lypinator | 0:bb348c97df44 | 2009 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 |
| lypinator | 0:bb348c97df44 | 2010 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) |
| lypinator | 0:bb348c97df44 | 2011 | * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG |
| lypinator | 0:bb348c97df44 | 2012 | * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*) |
| lypinator | 0:bb348c97df44 | 2013 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 |
| lypinator | 0:bb348c97df44 | 2014 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) |
| lypinator | 0:bb348c97df44 | 2015 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 |
| lypinator | 0:bb348c97df44 | 2016 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*) |
| lypinator | 0:bb348c97df44 | 2017 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) |
| lypinator | 0:bb348c97df44 | 2018 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*) |
| lypinator | 0:bb348c97df44 | 2019 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*) |
| lypinator | 0:bb348c97df44 | 2020 | * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*) |
| lypinator | 0:bb348c97df44 | 2021 | * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*) |
| lypinator | 0:bb348c97df44 | 2022 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*) |
| lypinator | 0:bb348c97df44 | 2023 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*) |
| lypinator | 0:bb348c97df44 | 2024 | * |
| lypinator | 0:bb348c97df44 | 2025 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 2026 | * @retval None |
| lypinator | 0:bb348c97df44 | 2027 | */ |
| lypinator | 0:bb348c97df44 | 2028 | __STATIC_INLINE void LL_APB2_GRP1_EnableClockLowPower(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 2029 | { |
| lypinator | 0:bb348c97df44 | 2030 | __IO uint32_t tmpreg; |
| lypinator | 0:bb348c97df44 | 2031 | SET_BIT(RCC->APB2LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 2032 | /* Delay after an RCC peripheral clock enabling */ |
| lypinator | 0:bb348c97df44 | 2033 | tmpreg = READ_BIT(RCC->APB2LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 2034 | (void)tmpreg; |
| lypinator | 0:bb348c97df44 | 2035 | } |
| lypinator | 0:bb348c97df44 | 2036 | |
| lypinator | 0:bb348c97df44 | 2037 | /** |
| lypinator | 0:bb348c97df44 | 2038 | * @brief Disable APB2 peripheral clocks in low-power mode |
| lypinator | 0:bb348c97df44 | 2039 | * @rmtoll APB2LPENR TIM1LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2040 | * APB2LPENR TIM8LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2041 | * APB2LPENR USART1LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2042 | * APB2LPENR USART6LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2043 | * APB2LPENR UART9LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2044 | * APB2LPENR UART10LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2045 | * APB2LPENR ADC1LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2046 | * APB2LPENR ADC2LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2047 | * APB2LPENR ADC3LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2048 | * APB2LPENR SDIOLPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2049 | * APB2LPENR SPI1LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2050 | * APB2LPENR SPI4LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2051 | * APB2LPENR SYSCFGLPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2052 | * APB2LPENR EXTITLPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2053 | * APB2LPENR TIM9LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2054 | * APB2LPENR TIM10LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2055 | * APB2LPENR TIM11LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2056 | * APB2LPENR SPI5LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2057 | * APB2LPENR SPI6LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2058 | * APB2LPENR SAI1LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2059 | * APB2LPENR SAI2LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2060 | * APB2LPENR LTDCLPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2061 | * APB2LPENR DSILPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2062 | * APB2LPENR DFSDM1LPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2063 | * APB2LPENR DSILPEN LL_APB2_GRP1_DisableClockLowPower\n |
| lypinator | 0:bb348c97df44 | 2064 | * APB2LPENR DFSDM2LPEN LL_APB2_GRP1_DisableClockLowPower |
| lypinator | 0:bb348c97df44 | 2065 | * @param Periphs This parameter can be a combination of the following values: |
| lypinator | 0:bb348c97df44 | 2066 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM1 |
| lypinator | 0:bb348c97df44 | 2067 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM8 (*) |
| lypinator | 0:bb348c97df44 | 2068 | * @arg @ref LL_APB2_GRP1_PERIPH_USART1 |
| lypinator | 0:bb348c97df44 | 2069 | * @arg @ref LL_APB2_GRP1_PERIPH_USART6 (*) |
| lypinator | 0:bb348c97df44 | 2070 | * @arg @ref LL_APB2_GRP1_PERIPH_UART9 (*) |
| lypinator | 0:bb348c97df44 | 2071 | * @arg @ref LL_APB2_GRP1_PERIPH_UART10 (*) |
| lypinator | 0:bb348c97df44 | 2072 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC1 |
| lypinator | 0:bb348c97df44 | 2073 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC2 (*) |
| lypinator | 0:bb348c97df44 | 2074 | * @arg @ref LL_APB2_GRP1_PERIPH_ADC3 (*) |
| lypinator | 0:bb348c97df44 | 2075 | * @arg @ref LL_APB2_GRP1_PERIPH_SDIO (*) |
| lypinator | 0:bb348c97df44 | 2076 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI1 |
| lypinator | 0:bb348c97df44 | 2077 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI4 (*) |
| lypinator | 0:bb348c97df44 | 2078 | * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG |
| lypinator | 0:bb348c97df44 | 2079 | * @arg @ref LL_APB2_GRP1_PERIPH_EXTI (*) |
| lypinator | 0:bb348c97df44 | 2080 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM9 |
| lypinator | 0:bb348c97df44 | 2081 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM10 (*) |
| lypinator | 0:bb348c97df44 | 2082 | * @arg @ref LL_APB2_GRP1_PERIPH_TIM11 |
| lypinator | 0:bb348c97df44 | 2083 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI5 (*) |
| lypinator | 0:bb348c97df44 | 2084 | * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*) |
| lypinator | 0:bb348c97df44 | 2085 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI1 (*) |
| lypinator | 0:bb348c97df44 | 2086 | * @arg @ref LL_APB2_GRP1_PERIPH_SAI2 (*) |
| lypinator | 0:bb348c97df44 | 2087 | * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*) |
| lypinator | 0:bb348c97df44 | 2088 | * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*) |
| lypinator | 0:bb348c97df44 | 2089 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*) |
| lypinator | 0:bb348c97df44 | 2090 | * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM2 (*) |
| lypinator | 0:bb348c97df44 | 2091 | * |
| lypinator | 0:bb348c97df44 | 2092 | * (*) value not defined in all devices. |
| lypinator | 0:bb348c97df44 | 2093 | * @retval None |
| lypinator | 0:bb348c97df44 | 2094 | */ |
| lypinator | 0:bb348c97df44 | 2095 | __STATIC_INLINE void LL_APB2_GRP1_DisableClockLowPower(uint32_t Periphs) |
| lypinator | 0:bb348c97df44 | 2096 | { |
| lypinator | 0:bb348c97df44 | 2097 | CLEAR_BIT(RCC->APB2LPENR, Periphs); |
| lypinator | 0:bb348c97df44 | 2098 | } |
| lypinator | 0:bb348c97df44 | 2099 | |
| lypinator | 0:bb348c97df44 | 2100 | /** |
| lypinator | 0:bb348c97df44 | 2101 | * @} |
| lypinator | 0:bb348c97df44 | 2102 | */ |
| lypinator | 0:bb348c97df44 | 2103 | |
| lypinator | 0:bb348c97df44 | 2104 | /** |
| lypinator | 0:bb348c97df44 | 2105 | * @} |
| lypinator | 0:bb348c97df44 | 2106 | */ |
| lypinator | 0:bb348c97df44 | 2107 | |
| lypinator | 0:bb348c97df44 | 2108 | /** |
| lypinator | 0:bb348c97df44 | 2109 | * @} |
| lypinator | 0:bb348c97df44 | 2110 | */ |
| lypinator | 0:bb348c97df44 | 2111 | |
| lypinator | 0:bb348c97df44 | 2112 | #endif /* defined(RCC) */ |
| lypinator | 0:bb348c97df44 | 2113 | |
| lypinator | 0:bb348c97df44 | 2114 | /** |
| lypinator | 0:bb348c97df44 | 2115 | * @} |
| lypinator | 0:bb348c97df44 | 2116 | */ |
| lypinator | 0:bb348c97df44 | 2117 | |
| lypinator | 0:bb348c97df44 | 2118 | #ifdef __cplusplus |
| lypinator | 0:bb348c97df44 | 2119 | } |
| lypinator | 0:bb348c97df44 | 2120 | #endif |
| lypinator | 0:bb348c97df44 | 2121 | |
| lypinator | 0:bb348c97df44 | 2122 | #endif /* __STM32F4xx_LL_BUS_H */ |
| lypinator | 0:bb348c97df44 | 2123 | |
| lypinator | 0:bb348c97df44 | 2124 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |