Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_uart.h@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_uart.h
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief Header file of UART HAL module.
lypinator 0:bb348c97df44 6 ******************************************************************************
lypinator 0:bb348c97df44 7 * @attention
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 10 *
lypinator 0:bb348c97df44 11 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 12 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 13 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 14 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 16 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 17 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 19 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 20 * without specific prior written permission.
lypinator 0:bb348c97df44 21 *
lypinator 0:bb348c97df44 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 32 *
lypinator 0:bb348c97df44 33 ******************************************************************************
lypinator 0:bb348c97df44 34 */
lypinator 0:bb348c97df44 35
lypinator 0:bb348c97df44 36 /* Define to prevent recursive inclusion -------------------------------------*/
lypinator 0:bb348c97df44 37 #ifndef __STM32F4xx_HAL_UART_H
lypinator 0:bb348c97df44 38 #define __STM32F4xx_HAL_UART_H
lypinator 0:bb348c97df44 39
lypinator 0:bb348c97df44 40 #ifdef __cplusplus
lypinator 0:bb348c97df44 41 extern "C" {
lypinator 0:bb348c97df44 42 #endif
lypinator 0:bb348c97df44 43
lypinator 0:bb348c97df44 44 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 45 #include "stm32f4xx_hal_def.h"
lypinator 0:bb348c97df44 46
lypinator 0:bb348c97df44 47 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 48 * @{
lypinator 0:bb348c97df44 49 */
lypinator 0:bb348c97df44 50
lypinator 0:bb348c97df44 51 /** @addtogroup UART
lypinator 0:bb348c97df44 52 * @{
lypinator 0:bb348c97df44 53 */
lypinator 0:bb348c97df44 54
lypinator 0:bb348c97df44 55 /* Exported types ------------------------------------------------------------*/
lypinator 0:bb348c97df44 56 /** @defgroup UART_Exported_Types UART Exported Types
lypinator 0:bb348c97df44 57 * @{
lypinator 0:bb348c97df44 58 */
lypinator 0:bb348c97df44 59
lypinator 0:bb348c97df44 60 /**
lypinator 0:bb348c97df44 61 * @brief UART Init Structure definition
lypinator 0:bb348c97df44 62 */
lypinator 0:bb348c97df44 63 typedef struct
lypinator 0:bb348c97df44 64 {
lypinator 0:bb348c97df44 65 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
lypinator 0:bb348c97df44 66 The baud rate is computed using the following formula:
lypinator 0:bb348c97df44 67 - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
lypinator 0:bb348c97df44 68 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
lypinator 0:bb348c97df44 69 Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
lypinator 0:bb348c97df44 70
lypinator 0:bb348c97df44 71 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
lypinator 0:bb348c97df44 72 This parameter can be a value of @ref UART_Word_Length */
lypinator 0:bb348c97df44 73
lypinator 0:bb348c97df44 74 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
lypinator 0:bb348c97df44 75 This parameter can be a value of @ref UART_Stop_Bits */
lypinator 0:bb348c97df44 76
lypinator 0:bb348c97df44 77 uint32_t Parity; /*!< Specifies the parity mode.
lypinator 0:bb348c97df44 78 This parameter can be a value of @ref UART_Parity
lypinator 0:bb348c97df44 79 @note When parity is enabled, the computed parity is inserted
lypinator 0:bb348c97df44 80 at the MSB position of the transmitted data (9th bit when
lypinator 0:bb348c97df44 81 the word length is set to 9 data bits; 8th bit when the
lypinator 0:bb348c97df44 82 word length is set to 8 data bits). */
lypinator 0:bb348c97df44 83
lypinator 0:bb348c97df44 84 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
lypinator 0:bb348c97df44 85 This parameter can be a value of @ref UART_Mode */
lypinator 0:bb348c97df44 86
lypinator 0:bb348c97df44 87 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
lypinator 0:bb348c97df44 88 or disabled.
lypinator 0:bb348c97df44 89 This parameter can be a value of @ref UART_Hardware_Flow_Control */
lypinator 0:bb348c97df44 90
lypinator 0:bb348c97df44 91 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
lypinator 0:bb348c97df44 92 This parameter can be a value of @ref UART_Over_Sampling */
lypinator 0:bb348c97df44 93 }UART_InitTypeDef;
lypinator 0:bb348c97df44 94
lypinator 0:bb348c97df44 95 /**
lypinator 0:bb348c97df44 96 * @brief HAL UART State structures definition
lypinator 0:bb348c97df44 97 * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
lypinator 0:bb348c97df44 98 * - gState contains UART state information related to global Handle management
lypinator 0:bb348c97df44 99 * and also information related to Tx operations.
lypinator 0:bb348c97df44 100 * gState value coding follow below described bitmap :
lypinator 0:bb348c97df44 101 * b7-b6 Error information
lypinator 0:bb348c97df44 102 * 00 : No Error
lypinator 0:bb348c97df44 103 * 01 : (Not Used)
lypinator 0:bb348c97df44 104 * 10 : Timeout
lypinator 0:bb348c97df44 105 * 11 : Error
lypinator 0:bb348c97df44 106 * b5 IP initilisation status
lypinator 0:bb348c97df44 107 * 0 : Reset (IP not initialized)
lypinator 0:bb348c97df44 108 * 1 : Init done (IP not initialized. HAL UART Init function already called)
lypinator 0:bb348c97df44 109 * b4-b3 (not used)
lypinator 0:bb348c97df44 110 * xx : Should be set to 00
lypinator 0:bb348c97df44 111 * b2 Intrinsic process state
lypinator 0:bb348c97df44 112 * 0 : Ready
lypinator 0:bb348c97df44 113 * 1 : Busy (IP busy with some configuration or internal operations)
lypinator 0:bb348c97df44 114 * b1 (not used)
lypinator 0:bb348c97df44 115 * x : Should be set to 0
lypinator 0:bb348c97df44 116 * b0 Tx state
lypinator 0:bb348c97df44 117 * 0 : Ready (no Tx operation ongoing)
lypinator 0:bb348c97df44 118 * 1 : Busy (Tx operation ongoing)
lypinator 0:bb348c97df44 119 * - RxState contains information related to Rx operations.
lypinator 0:bb348c97df44 120 * RxState value coding follow below described bitmap :
lypinator 0:bb348c97df44 121 * b7-b6 (not used)
lypinator 0:bb348c97df44 122 * xx : Should be set to 00
lypinator 0:bb348c97df44 123 * b5 IP initilisation status
lypinator 0:bb348c97df44 124 * 0 : Reset (IP not initialized)
lypinator 0:bb348c97df44 125 * 1 : Init done (IP not initialized)
lypinator 0:bb348c97df44 126 * b4-b2 (not used)
lypinator 0:bb348c97df44 127 * xxx : Should be set to 000
lypinator 0:bb348c97df44 128 * b1 Rx state
lypinator 0:bb348c97df44 129 * 0 : Ready (no Rx operation ongoing)
lypinator 0:bb348c97df44 130 * 1 : Busy (Rx operation ongoing)
lypinator 0:bb348c97df44 131 * b0 (not used)
lypinator 0:bb348c97df44 132 * x : Should be set to 0.
lypinator 0:bb348c97df44 133 */
lypinator 0:bb348c97df44 134 typedef enum
lypinator 0:bb348c97df44 135 {
lypinator 0:bb348c97df44 136 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
lypinator 0:bb348c97df44 137 Value is allowed for gState and RxState */
lypinator 0:bb348c97df44 138 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
lypinator 0:bb348c97df44 139 Value is allowed for gState and RxState */
lypinator 0:bb348c97df44 140 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
lypinator 0:bb348c97df44 141 Value is allowed for gState only */
lypinator 0:bb348c97df44 142 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
lypinator 0:bb348c97df44 143 Value is allowed for gState only */
lypinator 0:bb348c97df44 144 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
lypinator 0:bb348c97df44 145 Value is allowed for RxState only */
lypinator 0:bb348c97df44 146 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
lypinator 0:bb348c97df44 147 Not to be used for neither gState nor RxState.
lypinator 0:bb348c97df44 148 Value is result of combination (Or) between gState and RxState values */
lypinator 0:bb348c97df44 149 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
lypinator 0:bb348c97df44 150 Value is allowed for gState only */
lypinator 0:bb348c97df44 151 HAL_UART_STATE_ERROR = 0xE0U /*!< Error
lypinator 0:bb348c97df44 152 Value is allowed for gState only */
lypinator 0:bb348c97df44 153 }HAL_UART_StateTypeDef;
lypinator 0:bb348c97df44 154
lypinator 0:bb348c97df44 155 /**
lypinator 0:bb348c97df44 156 * @brief UART handle Structure definition
lypinator 0:bb348c97df44 157 */
lypinator 0:bb348c97df44 158 typedef struct
lypinator 0:bb348c97df44 159 {
lypinator 0:bb348c97df44 160 USART_TypeDef *Instance; /*!< UART registers base address */
lypinator 0:bb348c97df44 161
lypinator 0:bb348c97df44 162 UART_InitTypeDef Init; /*!< UART communication parameters */
lypinator 0:bb348c97df44 163
lypinator 0:bb348c97df44 164 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
lypinator 0:bb348c97df44 165
lypinator 0:bb348c97df44 166 uint16_t TxXferSize; /*!< UART Tx Transfer size */
lypinator 0:bb348c97df44 167
lypinator 0:bb348c97df44 168 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
lypinator 0:bb348c97df44 169
lypinator 0:bb348c97df44 170 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
lypinator 0:bb348c97df44 171
lypinator 0:bb348c97df44 172 uint16_t RxXferSize; /*!< UART Rx Transfer size */
lypinator 0:bb348c97df44 173
lypinator 0:bb348c97df44 174 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
lypinator 0:bb348c97df44 175
lypinator 0:bb348c97df44 176 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
lypinator 0:bb348c97df44 177
lypinator 0:bb348c97df44 178 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
lypinator 0:bb348c97df44 179
lypinator 0:bb348c97df44 180 HAL_LockTypeDef Lock; /*!< Locking object */
lypinator 0:bb348c97df44 181
lypinator 0:bb348c97df44 182 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
lypinator 0:bb348c97df44 183 and also related to Tx operations.
lypinator 0:bb348c97df44 184 This parameter can be a value of @ref HAL_UART_StateTypeDef */
lypinator 0:bb348c97df44 185
lypinator 0:bb348c97df44 186 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
lypinator 0:bb348c97df44 187 This parameter can be a value of @ref HAL_UART_StateTypeDef */
lypinator 0:bb348c97df44 188
lypinator 0:bb348c97df44 189 __IO uint32_t ErrorCode; /*!< UART Error code */
lypinator 0:bb348c97df44 190
lypinator 0:bb348c97df44 191 }UART_HandleTypeDef;
lypinator 0:bb348c97df44 192 /**
lypinator 0:bb348c97df44 193 * @}
lypinator 0:bb348c97df44 194 */
lypinator 0:bb348c97df44 195
lypinator 0:bb348c97df44 196 /* Exported constants --------------------------------------------------------*/
lypinator 0:bb348c97df44 197 /** @defgroup UART_Exported_Constants UART Exported constants
lypinator 0:bb348c97df44 198 * @{
lypinator 0:bb348c97df44 199 */
lypinator 0:bb348c97df44 200
lypinator 0:bb348c97df44 201 /** @defgroup UART_Error_Code UART Error Code
lypinator 0:bb348c97df44 202 * @brief UART Error Code
lypinator 0:bb348c97df44 203 * @{
lypinator 0:bb348c97df44 204 */
lypinator 0:bb348c97df44 205 #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */
lypinator 0:bb348c97df44 206 #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */
lypinator 0:bb348c97df44 207 #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */
lypinator 0:bb348c97df44 208 #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */
lypinator 0:bb348c97df44 209 #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */
lypinator 0:bb348c97df44 210 #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */
lypinator 0:bb348c97df44 211 /**
lypinator 0:bb348c97df44 212 * @}
lypinator 0:bb348c97df44 213 */
lypinator 0:bb348c97df44 214
lypinator 0:bb348c97df44 215 /** @defgroup UART_Word_Length UART Word Length
lypinator 0:bb348c97df44 216 * @{
lypinator 0:bb348c97df44 217 */
lypinator 0:bb348c97df44 218 #define UART_WORDLENGTH_8B 0x00000000U
lypinator 0:bb348c97df44 219 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
lypinator 0:bb348c97df44 220 /**
lypinator 0:bb348c97df44 221 * @}
lypinator 0:bb348c97df44 222 */
lypinator 0:bb348c97df44 223
lypinator 0:bb348c97df44 224 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
lypinator 0:bb348c97df44 225 * @{
lypinator 0:bb348c97df44 226 */
lypinator 0:bb348c97df44 227 #define UART_STOPBITS_1 0x00000000U
lypinator 0:bb348c97df44 228 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
lypinator 0:bb348c97df44 229 /**
lypinator 0:bb348c97df44 230 * @}
lypinator 0:bb348c97df44 231 */
lypinator 0:bb348c97df44 232
lypinator 0:bb348c97df44 233 /** @defgroup UART_Parity UART Parity
lypinator 0:bb348c97df44 234 * @{
lypinator 0:bb348c97df44 235 */
lypinator 0:bb348c97df44 236 #define UART_PARITY_NONE 0x00000000U
lypinator 0:bb348c97df44 237 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
lypinator 0:bb348c97df44 238 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
lypinator 0:bb348c97df44 239 /**
lypinator 0:bb348c97df44 240 * @}
lypinator 0:bb348c97df44 241 */
lypinator 0:bb348c97df44 242
lypinator 0:bb348c97df44 243 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
lypinator 0:bb348c97df44 244 * @{
lypinator 0:bb348c97df44 245 */
lypinator 0:bb348c97df44 246 #define UART_HWCONTROL_NONE 0x00000000U
lypinator 0:bb348c97df44 247 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
lypinator 0:bb348c97df44 248 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
lypinator 0:bb348c97df44 249 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
lypinator 0:bb348c97df44 250 /**
lypinator 0:bb348c97df44 251 * @}
lypinator 0:bb348c97df44 252 */
lypinator 0:bb348c97df44 253
lypinator 0:bb348c97df44 254 /** @defgroup UART_Mode UART Transfer Mode
lypinator 0:bb348c97df44 255 * @{
lypinator 0:bb348c97df44 256 */
lypinator 0:bb348c97df44 257 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
lypinator 0:bb348c97df44 258 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
lypinator 0:bb348c97df44 259 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
lypinator 0:bb348c97df44 260 /**
lypinator 0:bb348c97df44 261 * @}
lypinator 0:bb348c97df44 262 */
lypinator 0:bb348c97df44 263
lypinator 0:bb348c97df44 264 /** @defgroup UART_State UART State
lypinator 0:bb348c97df44 265 * @{
lypinator 0:bb348c97df44 266 */
lypinator 0:bb348c97df44 267 #define UART_STATE_DISABLE 0x00000000U
lypinator 0:bb348c97df44 268 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
lypinator 0:bb348c97df44 269 /**
lypinator 0:bb348c97df44 270 * @}
lypinator 0:bb348c97df44 271 */
lypinator 0:bb348c97df44 272
lypinator 0:bb348c97df44 273 /** @defgroup UART_Over_Sampling UART Over Sampling
lypinator 0:bb348c97df44 274 * @{
lypinator 0:bb348c97df44 275 */
lypinator 0:bb348c97df44 276 #define UART_OVERSAMPLING_16 0x00000000U
lypinator 0:bb348c97df44 277 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
lypinator 0:bb348c97df44 278 /**
lypinator 0:bb348c97df44 279 * @}
lypinator 0:bb348c97df44 280 */
lypinator 0:bb348c97df44 281
lypinator 0:bb348c97df44 282 /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
lypinator 0:bb348c97df44 283 * @{
lypinator 0:bb348c97df44 284 */
lypinator 0:bb348c97df44 285 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U
lypinator 0:bb348c97df44 286 #define UART_LINBREAKDETECTLENGTH_11B 0x00000020U
lypinator 0:bb348c97df44 287 /**
lypinator 0:bb348c97df44 288 * @}
lypinator 0:bb348c97df44 289 */
lypinator 0:bb348c97df44 290
lypinator 0:bb348c97df44 291 /** @defgroup UART_WakeUp_functions UART Wakeup Functions
lypinator 0:bb348c97df44 292 * @{
lypinator 0:bb348c97df44 293 */
lypinator 0:bb348c97df44 294 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U
lypinator 0:bb348c97df44 295 #define UART_WAKEUPMETHOD_ADDRESSMARK 0x00000800U
lypinator 0:bb348c97df44 296 /**
lypinator 0:bb348c97df44 297 * @}
lypinator 0:bb348c97df44 298 */
lypinator 0:bb348c97df44 299
lypinator 0:bb348c97df44 300 /** @defgroup UART_Flags UART FLags
lypinator 0:bb348c97df44 301 * Elements values convention: 0xXXXX
lypinator 0:bb348c97df44 302 * - 0xXXXX : Flag mask in the SR register
lypinator 0:bb348c97df44 303 * @{
lypinator 0:bb348c97df44 304 */
lypinator 0:bb348c97df44 305 #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
lypinator 0:bb348c97df44 306 #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
lypinator 0:bb348c97df44 307 #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
lypinator 0:bb348c97df44 308 #define UART_FLAG_TC ((uint32_t)USART_SR_TC)
lypinator 0:bb348c97df44 309 #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
lypinator 0:bb348c97df44 310 #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
lypinator 0:bb348c97df44 311 #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
lypinator 0:bb348c97df44 312 #define UART_FLAG_NE ((uint32_t)USART_SR_NE)
lypinator 0:bb348c97df44 313 #define UART_FLAG_FE ((uint32_t)USART_SR_FE)
lypinator 0:bb348c97df44 314 #define UART_FLAG_PE ((uint32_t)USART_SR_PE)
lypinator 0:bb348c97df44 315 /**
lypinator 0:bb348c97df44 316 * @}
lypinator 0:bb348c97df44 317 */
lypinator 0:bb348c97df44 318
lypinator 0:bb348c97df44 319 /** @defgroup UART_Interrupt_definition UART Interrupt Definitions
lypinator 0:bb348c97df44 320 * Elements values convention: 0xY000XXXX
lypinator 0:bb348c97df44 321 * - XXXX : Interrupt mask (16 bits) in the Y register
lypinator 0:bb348c97df44 322 * - Y : Interrupt source register (2bits)
lypinator 0:bb348c97df44 323 * - 0001: CR1 register
lypinator 0:bb348c97df44 324 * - 0010: CR2 register
lypinator 0:bb348c97df44 325 * - 0011: CR3 register
lypinator 0:bb348c97df44 326 *
lypinator 0:bb348c97df44 327 * @{
lypinator 0:bb348c97df44 328 */
lypinator 0:bb348c97df44 329
lypinator 0:bb348c97df44 330 #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
lypinator 0:bb348c97df44 331 #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
lypinator 0:bb348c97df44 332 #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
lypinator 0:bb348c97df44 333 #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
lypinator 0:bb348c97df44 334 #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
lypinator 0:bb348c97df44 335
lypinator 0:bb348c97df44 336 #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
lypinator 0:bb348c97df44 337
lypinator 0:bb348c97df44 338 #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
lypinator 0:bb348c97df44 339 #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
lypinator 0:bb348c97df44 340 /**
lypinator 0:bb348c97df44 341 * @}
lypinator 0:bb348c97df44 342 */
lypinator 0:bb348c97df44 343
lypinator 0:bb348c97df44 344 /**
lypinator 0:bb348c97df44 345 * @}
lypinator 0:bb348c97df44 346 */
lypinator 0:bb348c97df44 347
lypinator 0:bb348c97df44 348 /* Exported macro ------------------------------------------------------------*/
lypinator 0:bb348c97df44 349 /** @defgroup UART_Exported_Macros UART Exported Macros
lypinator 0:bb348c97df44 350 * @{
lypinator 0:bb348c97df44 351 */
lypinator 0:bb348c97df44 352
lypinator 0:bb348c97df44 353 /** @brief Reset UART handle gstate & RxState
lypinator 0:bb348c97df44 354 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 355 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
lypinator 0:bb348c97df44 356 * UART peripheral.
lypinator 0:bb348c97df44 357 * @retval None
lypinator 0:bb348c97df44 358 */
lypinator 0:bb348c97df44 359 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
lypinator 0:bb348c97df44 360 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
lypinator 0:bb348c97df44 361 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
lypinator 0:bb348c97df44 362 } while(0U)
lypinator 0:bb348c97df44 363
lypinator 0:bb348c97df44 364 /** @brief Flushes the UART DR register
lypinator 0:bb348c97df44 365 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 366 */
lypinator 0:bb348c97df44 367 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
lypinator 0:bb348c97df44 368
lypinator 0:bb348c97df44 369 /** @brief Checks whether the specified UART flag is set or not.
lypinator 0:bb348c97df44 370 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 371 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
lypinator 0:bb348c97df44 372 * UART peripheral.
lypinator 0:bb348c97df44 373 * @param __FLAG__ specifies the flag to check.
lypinator 0:bb348c97df44 374 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 375 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
lypinator 0:bb348c97df44 376 * @arg UART_FLAG_LBD: LIN Break detection flag
lypinator 0:bb348c97df44 377 * @arg UART_FLAG_TXE: Transmit data register empty flag
lypinator 0:bb348c97df44 378 * @arg UART_FLAG_TC: Transmission Complete flag
lypinator 0:bb348c97df44 379 * @arg UART_FLAG_RXNE: Receive data register not empty flag
lypinator 0:bb348c97df44 380 * @arg UART_FLAG_IDLE: Idle Line detection flag
lypinator 0:bb348c97df44 381 * @arg UART_FLAG_ORE: Overrun Error flag
lypinator 0:bb348c97df44 382 * @arg UART_FLAG_NE: Noise Error flag
lypinator 0:bb348c97df44 383 * @arg UART_FLAG_FE: Framing Error flag
lypinator 0:bb348c97df44 384 * @arg UART_FLAG_PE: Parity Error flag
lypinator 0:bb348c97df44 385 * @retval The new state of __FLAG__ (TRUE or FALSE).
lypinator 0:bb348c97df44 386 */
lypinator 0:bb348c97df44 387
lypinator 0:bb348c97df44 388 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
lypinator 0:bb348c97df44 389
lypinator 0:bb348c97df44 390 /** @brief Clears the specified UART pending flag.
lypinator 0:bb348c97df44 391 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 392 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
lypinator 0:bb348c97df44 393 * UART peripheral.
lypinator 0:bb348c97df44 394 * @param __FLAG__ specifies the flag to check.
lypinator 0:bb348c97df44 395 * This parameter can be any combination of the following values:
lypinator 0:bb348c97df44 396 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
lypinator 0:bb348c97df44 397 * @arg UART_FLAG_LBD: LIN Break detection flag.
lypinator 0:bb348c97df44 398 * @arg UART_FLAG_TC: Transmission Complete flag.
lypinator 0:bb348c97df44 399 * @arg UART_FLAG_RXNE: Receive data register not empty flag.
lypinator 0:bb348c97df44 400 *
lypinator 0:bb348c97df44 401 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
lypinator 0:bb348c97df44 402 * error) and IDLE (Idle line detected) flags are cleared by software
lypinator 0:bb348c97df44 403 * sequence: a read operation to USART_SR register followed by a read
lypinator 0:bb348c97df44 404 * operation to USART_DR register.
lypinator 0:bb348c97df44 405 * @note RXNE flag can be also cleared by a read to the USART_DR register.
lypinator 0:bb348c97df44 406 * @note TC flag can be also cleared by software sequence: a read operation to
lypinator 0:bb348c97df44 407 * USART_SR register followed by a write operation to USART_DR register.
lypinator 0:bb348c97df44 408 * @note TXE flag is cleared only by a write to the USART_DR register.
lypinator 0:bb348c97df44 409 *
lypinator 0:bb348c97df44 410 * @retval None
lypinator 0:bb348c97df44 411 */
lypinator 0:bb348c97df44 412 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
lypinator 0:bb348c97df44 413
lypinator 0:bb348c97df44 414 /** @brief Clear the UART PE pending flag.
lypinator 0:bb348c97df44 415 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 416 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
lypinator 0:bb348c97df44 417 * UART peripheral.
lypinator 0:bb348c97df44 418 * @retval None
lypinator 0:bb348c97df44 419 */
lypinator 0:bb348c97df44 420 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
lypinator 0:bb348c97df44 421 do{ \
lypinator 0:bb348c97df44 422 __IO uint32_t tmpreg = 0x00U; \
lypinator 0:bb348c97df44 423 tmpreg = (__HANDLE__)->Instance->SR; \
lypinator 0:bb348c97df44 424 tmpreg = (__HANDLE__)->Instance->DR; \
lypinator 0:bb348c97df44 425 UNUSED(tmpreg); \
lypinator 0:bb348c97df44 426 } while(0U)
lypinator 0:bb348c97df44 427
lypinator 0:bb348c97df44 428 /** @brief Clear the UART FE pending flag.
lypinator 0:bb348c97df44 429 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 430 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
lypinator 0:bb348c97df44 431 * UART peripheral.
lypinator 0:bb348c97df44 432 * @retval None
lypinator 0:bb348c97df44 433 */
lypinator 0:bb348c97df44 434 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
lypinator 0:bb348c97df44 435
lypinator 0:bb348c97df44 436 /** @brief Clear the UART NE pending flag.
lypinator 0:bb348c97df44 437 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 438 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
lypinator 0:bb348c97df44 439 * UART peripheral.
lypinator 0:bb348c97df44 440 * @retval None
lypinator 0:bb348c97df44 441 */
lypinator 0:bb348c97df44 442 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
lypinator 0:bb348c97df44 443
lypinator 0:bb348c97df44 444 /** @brief Clear the UART ORE pending flag.
lypinator 0:bb348c97df44 445 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 446 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
lypinator 0:bb348c97df44 447 * UART peripheral.
lypinator 0:bb348c97df44 448 * @retval None
lypinator 0:bb348c97df44 449 */
lypinator 0:bb348c97df44 450 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
lypinator 0:bb348c97df44 451
lypinator 0:bb348c97df44 452 /** @brief Clear the UART IDLE pending flag.
lypinator 0:bb348c97df44 453 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 454 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
lypinator 0:bb348c97df44 455 * UART peripheral.
lypinator 0:bb348c97df44 456 * @retval None
lypinator 0:bb348c97df44 457 */
lypinator 0:bb348c97df44 458 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
lypinator 0:bb348c97df44 459
lypinator 0:bb348c97df44 460 /** @brief Enable the specified UART interrupt.
lypinator 0:bb348c97df44 461 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 462 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
lypinator 0:bb348c97df44 463 * UART peripheral.
lypinator 0:bb348c97df44 464 * @param __INTERRUPT__ specifies the UART interrupt source to enable.
lypinator 0:bb348c97df44 465 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 466 * @arg UART_IT_CTS: CTS change interrupt
lypinator 0:bb348c97df44 467 * @arg UART_IT_LBD: LIN Break detection interrupt
lypinator 0:bb348c97df44 468 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
lypinator 0:bb348c97df44 469 * @arg UART_IT_TC: Transmission complete interrupt
lypinator 0:bb348c97df44 470 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
lypinator 0:bb348c97df44 471 * @arg UART_IT_IDLE: Idle line detection interrupt
lypinator 0:bb348c97df44 472 * @arg UART_IT_PE: Parity Error interrupt
lypinator 0:bb348c97df44 473 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
lypinator 0:bb348c97df44 474 * @retval None
lypinator 0:bb348c97df44 475 */
lypinator 0:bb348c97df44 476 #define UART_IT_MASK 0x0000FFFFU
lypinator 0:bb348c97df44 477 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
lypinator 0:bb348c97df44 478 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
lypinator 0:bb348c97df44 479 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
lypinator 0:bb348c97df44 480 /** @brief Disable the specified UART interrupt.
lypinator 0:bb348c97df44 481 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 482 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
lypinator 0:bb348c97df44 483 * UART peripheral.
lypinator 0:bb348c97df44 484 * @param __INTERRUPT__ specifies the UART interrupt source to disable.
lypinator 0:bb348c97df44 485 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 486 * @arg UART_IT_CTS: CTS change interrupt
lypinator 0:bb348c97df44 487 * @arg UART_IT_LBD: LIN Break detection interrupt
lypinator 0:bb348c97df44 488 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
lypinator 0:bb348c97df44 489 * @arg UART_IT_TC: Transmission complete interrupt
lypinator 0:bb348c97df44 490 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
lypinator 0:bb348c97df44 491 * @arg UART_IT_IDLE: Idle line detection interrupt
lypinator 0:bb348c97df44 492 * @arg UART_IT_PE: Parity Error interrupt
lypinator 0:bb348c97df44 493 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
lypinator 0:bb348c97df44 494 * @retval None
lypinator 0:bb348c97df44 495 */
lypinator 0:bb348c97df44 496 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
lypinator 0:bb348c97df44 497 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
lypinator 0:bb348c97df44 498 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
lypinator 0:bb348c97df44 499
lypinator 0:bb348c97df44 500 /** @brief Checks whether the specified UART interrupt has occurred or not.
lypinator 0:bb348c97df44 501 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 502 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
lypinator 0:bb348c97df44 503 * UART peripheral.
lypinator 0:bb348c97df44 504 * @param __IT__ specifies the UART interrupt source to check.
lypinator 0:bb348c97df44 505 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 506 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
lypinator 0:bb348c97df44 507 * @arg UART_IT_LBD: LIN Break detection interrupt
lypinator 0:bb348c97df44 508 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
lypinator 0:bb348c97df44 509 * @arg UART_IT_TC: Transmission complete interrupt
lypinator 0:bb348c97df44 510 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
lypinator 0:bb348c97df44 511 * @arg UART_IT_IDLE: Idle line detection interrupt
lypinator 0:bb348c97df44 512 * @arg USART_IT_ERR: Error interrupt
lypinator 0:bb348c97df44 513 * @retval The new state of __IT__ (TRUE or FALSE).
lypinator 0:bb348c97df44 514 */
lypinator 0:bb348c97df44 515 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \
lypinator 0:bb348c97df44 516 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
lypinator 0:bb348c97df44 517
lypinator 0:bb348c97df44 518 /** @brief Enable CTS flow control
lypinator 0:bb348c97df44 519 * This macro allows to enable CTS hardware flow control for a given UART instance,
lypinator 0:bb348c97df44 520 * without need to call HAL_UART_Init() function.
lypinator 0:bb348c97df44 521 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
lypinator 0:bb348c97df44 522 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
lypinator 0:bb348c97df44 523 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
lypinator 0:bb348c97df44 524 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
lypinator 0:bb348c97df44 525 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
lypinator 0:bb348c97df44 526 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
lypinator 0:bb348c97df44 527 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 528 * The Handle Instance can be USART1, USART2 or LPUART.
lypinator 0:bb348c97df44 529 * @retval None
lypinator 0:bb348c97df44 530 */
lypinator 0:bb348c97df44 531 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
lypinator 0:bb348c97df44 532 do{ \
lypinator 0:bb348c97df44 533 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
lypinator 0:bb348c97df44 534 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
lypinator 0:bb348c97df44 535 } while(0U)
lypinator 0:bb348c97df44 536
lypinator 0:bb348c97df44 537 /** @brief Disable CTS flow control
lypinator 0:bb348c97df44 538 * This macro allows to disable CTS hardware flow control for a given UART instance,
lypinator 0:bb348c97df44 539 * without need to call HAL_UART_Init() function.
lypinator 0:bb348c97df44 540 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
lypinator 0:bb348c97df44 541 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
lypinator 0:bb348c97df44 542 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
lypinator 0:bb348c97df44 543 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
lypinator 0:bb348c97df44 544 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
lypinator 0:bb348c97df44 545 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
lypinator 0:bb348c97df44 546 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 547 * The Handle Instance can be USART1, USART2 or LPUART.
lypinator 0:bb348c97df44 548 * @retval None
lypinator 0:bb348c97df44 549 */
lypinator 0:bb348c97df44 550 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
lypinator 0:bb348c97df44 551 do{ \
lypinator 0:bb348c97df44 552 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
lypinator 0:bb348c97df44 553 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
lypinator 0:bb348c97df44 554 } while(0U)
lypinator 0:bb348c97df44 555
lypinator 0:bb348c97df44 556 /** @brief Enable RTS flow control
lypinator 0:bb348c97df44 557 * This macro allows to enable RTS hardware flow control for a given UART instance,
lypinator 0:bb348c97df44 558 * without need to call HAL_UART_Init() function.
lypinator 0:bb348c97df44 559 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
lypinator 0:bb348c97df44 560 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
lypinator 0:bb348c97df44 561 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
lypinator 0:bb348c97df44 562 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
lypinator 0:bb348c97df44 563 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
lypinator 0:bb348c97df44 564 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
lypinator 0:bb348c97df44 565 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 566 * The Handle Instance can be USART1, USART2 or LPUART.
lypinator 0:bb348c97df44 567 * @retval None
lypinator 0:bb348c97df44 568 */
lypinator 0:bb348c97df44 569 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
lypinator 0:bb348c97df44 570 do{ \
lypinator 0:bb348c97df44 571 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
lypinator 0:bb348c97df44 572 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
lypinator 0:bb348c97df44 573 } while(0U)
lypinator 0:bb348c97df44 574
lypinator 0:bb348c97df44 575 /** @brief Disable RTS flow control
lypinator 0:bb348c97df44 576 * This macro allows to disable RTS hardware flow control for a given UART instance,
lypinator 0:bb348c97df44 577 * without need to call HAL_UART_Init() function.
lypinator 0:bb348c97df44 578 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
lypinator 0:bb348c97df44 579 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
lypinator 0:bb348c97df44 580 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
lypinator 0:bb348c97df44 581 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
lypinator 0:bb348c97df44 582 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
lypinator 0:bb348c97df44 583 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
lypinator 0:bb348c97df44 584 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 585 * The Handle Instance can be USART1, USART2 or LPUART.
lypinator 0:bb348c97df44 586 * @retval None
lypinator 0:bb348c97df44 587 */
lypinator 0:bb348c97df44 588 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
lypinator 0:bb348c97df44 589 do{ \
lypinator 0:bb348c97df44 590 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
lypinator 0:bb348c97df44 591 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
lypinator 0:bb348c97df44 592 } while(0U)
lypinator 0:bb348c97df44 593
lypinator 0:bb348c97df44 594 /** @brief macros to enables the UART's one bit sample method
lypinator 0:bb348c97df44 595 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 596 * @retval None
lypinator 0:bb348c97df44 597 */
lypinator 0:bb348c97df44 598 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
lypinator 0:bb348c97df44 599
lypinator 0:bb348c97df44 600 /** @brief macros to disables the UART's one bit sample method
lypinator 0:bb348c97df44 601 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 602 * @retval None
lypinator 0:bb348c97df44 603 */
lypinator 0:bb348c97df44 604 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
lypinator 0:bb348c97df44 605
lypinator 0:bb348c97df44 606 /** @brief Enable UART
lypinator 0:bb348c97df44 607 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 608 * @retval None
lypinator 0:bb348c97df44 609 */
lypinator 0:bb348c97df44 610 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
lypinator 0:bb348c97df44 611
lypinator 0:bb348c97df44 612 /** @brief Disable UART
lypinator 0:bb348c97df44 613 * @param __HANDLE__ specifies the UART Handle.
lypinator 0:bb348c97df44 614 * @retval None
lypinator 0:bb348c97df44 615 */
lypinator 0:bb348c97df44 616 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
lypinator 0:bb348c97df44 617 /**
lypinator 0:bb348c97df44 618 * @}
lypinator 0:bb348c97df44 619 */
lypinator 0:bb348c97df44 620
lypinator 0:bb348c97df44 621 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 622 /** @addtogroup UART_Exported_Functions
lypinator 0:bb348c97df44 623 * @{
lypinator 0:bb348c97df44 624 */
lypinator 0:bb348c97df44 625
lypinator 0:bb348c97df44 626 /** @addtogroup UART_Exported_Functions_Group1
lypinator 0:bb348c97df44 627 * @{
lypinator 0:bb348c97df44 628 */
lypinator 0:bb348c97df44 629 /* Initialization/de-initialization functions **********************************/
lypinator 0:bb348c97df44 630 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 631 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 632 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
lypinator 0:bb348c97df44 633 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
lypinator 0:bb348c97df44 634 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 635 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 636 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 637 /**
lypinator 0:bb348c97df44 638 * @}
lypinator 0:bb348c97df44 639 */
lypinator 0:bb348c97df44 640
lypinator 0:bb348c97df44 641 /** @addtogroup UART_Exported_Functions_Group2
lypinator 0:bb348c97df44 642 * @{
lypinator 0:bb348c97df44 643 */
lypinator 0:bb348c97df44 644 /* IO operation functions *******************************************************/
lypinator 0:bb348c97df44 645 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
lypinator 0:bb348c97df44 646 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
lypinator 0:bb348c97df44 647 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
lypinator 0:bb348c97df44 648 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
lypinator 0:bb348c97df44 649 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
lypinator 0:bb348c97df44 650 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
lypinator 0:bb348c97df44 651 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 652 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 653 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 654 /* Transfer Abort functions */
lypinator 0:bb348c97df44 655 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 656 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 657 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 658 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 659 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 660 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 661
lypinator 0:bb348c97df44 662 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 663 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 664 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 665 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 666 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 667 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 668 void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 669 void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 670 void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 671 /**
lypinator 0:bb348c97df44 672 * @}
lypinator 0:bb348c97df44 673 */
lypinator 0:bb348c97df44 674
lypinator 0:bb348c97df44 675 /** @addtogroup UART_Exported_Functions_Group3
lypinator 0:bb348c97df44 676 * @{
lypinator 0:bb348c97df44 677 */
lypinator 0:bb348c97df44 678 /* Peripheral Control functions ************************************************/
lypinator 0:bb348c97df44 679 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 680 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 681 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 682 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 683 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 684 /**
lypinator 0:bb348c97df44 685 * @}
lypinator 0:bb348c97df44 686 */
lypinator 0:bb348c97df44 687
lypinator 0:bb348c97df44 688 /** @addtogroup UART_Exported_Functions_Group4
lypinator 0:bb348c97df44 689 * @{
lypinator 0:bb348c97df44 690 */
lypinator 0:bb348c97df44 691 /* Peripheral State functions **************************************************/
lypinator 0:bb348c97df44 692 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 693 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 694 /**
lypinator 0:bb348c97df44 695 * @}
lypinator 0:bb348c97df44 696 */
lypinator 0:bb348c97df44 697
lypinator 0:bb348c97df44 698 /**
lypinator 0:bb348c97df44 699 * @}
lypinator 0:bb348c97df44 700 */
lypinator 0:bb348c97df44 701 /* Private types -------------------------------------------------------------*/
lypinator 0:bb348c97df44 702 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 703 /* Private constants ---------------------------------------------------------*/
lypinator 0:bb348c97df44 704 /** @defgroup UART_Private_Constants UART Private Constants
lypinator 0:bb348c97df44 705 * @{
lypinator 0:bb348c97df44 706 */
lypinator 0:bb348c97df44 707 /** @brief UART interruptions flag mask
lypinator 0:bb348c97df44 708 *
lypinator 0:bb348c97df44 709 */
lypinator 0:bb348c97df44 710 #define UART_CR1_REG_INDEX 1U
lypinator 0:bb348c97df44 711 #define UART_CR2_REG_INDEX 2U
lypinator 0:bb348c97df44 712 #define UART_CR3_REG_INDEX 3U
lypinator 0:bb348c97df44 713 /**
lypinator 0:bb348c97df44 714 * @}
lypinator 0:bb348c97df44 715 */
lypinator 0:bb348c97df44 716
lypinator 0:bb348c97df44 717 /* Private macros ------------------------------------------------------------*/
lypinator 0:bb348c97df44 718 /** @defgroup UART_Private_Macros UART Private Macros
lypinator 0:bb348c97df44 719 * @{
lypinator 0:bb348c97df44 720 */
lypinator 0:bb348c97df44 721 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
lypinator 0:bb348c97df44 722 ((LENGTH) == UART_WORDLENGTH_9B))
lypinator 0:bb348c97df44 723 #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
lypinator 0:bb348c97df44 724 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
lypinator 0:bb348c97df44 725 ((STOPBITS) == UART_STOPBITS_2))
lypinator 0:bb348c97df44 726 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
lypinator 0:bb348c97df44 727 ((PARITY) == UART_PARITY_EVEN) || \
lypinator 0:bb348c97df44 728 ((PARITY) == UART_PARITY_ODD))
lypinator 0:bb348c97df44 729 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
lypinator 0:bb348c97df44 730 (((CONTROL) == UART_HWCONTROL_NONE) || \
lypinator 0:bb348c97df44 731 ((CONTROL) == UART_HWCONTROL_RTS) || \
lypinator 0:bb348c97df44 732 ((CONTROL) == UART_HWCONTROL_CTS) || \
lypinator 0:bb348c97df44 733 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
lypinator 0:bb348c97df44 734 #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U))
lypinator 0:bb348c97df44 735 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
lypinator 0:bb348c97df44 736 ((STATE) == UART_STATE_ENABLE))
lypinator 0:bb348c97df44 737 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
lypinator 0:bb348c97df44 738 ((SAMPLING) == UART_OVERSAMPLING_8))
lypinator 0:bb348c97df44 739 #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
lypinator 0:bb348c97df44 740 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
lypinator 0:bb348c97df44 741 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
lypinator 0:bb348c97df44 742 #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
lypinator 0:bb348c97df44 743 ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
lypinator 0:bb348c97df44 744 #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001U)
lypinator 0:bb348c97df44 745 #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU)
lypinator 0:bb348c97df44 746
lypinator 0:bb348c97df44 747 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_)))
lypinator 0:bb348c97df44 748 #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
lypinator 0:bb348c97df44 749 #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
lypinator 0:bb348c97df44 750 /* UART BRR = mantissa + overflow + fraction
lypinator 0:bb348c97df44 751 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
lypinator 0:bb348c97df44 752 #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
lypinator 0:bb348c97df44 753 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \
lypinator 0:bb348c97df44 754 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
lypinator 0:bb348c97df44 755
lypinator 0:bb348c97df44 756 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
lypinator 0:bb348c97df44 757 #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
lypinator 0:bb348c97df44 758 #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U)
lypinator 0:bb348c97df44 759 /* UART BRR = mantissa + overflow + fraction
lypinator 0:bb348c97df44 760 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
lypinator 0:bb348c97df44 761 #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
lypinator 0:bb348c97df44 762 ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
lypinator 0:bb348c97df44 763 (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
lypinator 0:bb348c97df44 764
lypinator 0:bb348c97df44 765 /**
lypinator 0:bb348c97df44 766 * @}
lypinator 0:bb348c97df44 767 */
lypinator 0:bb348c97df44 768
lypinator 0:bb348c97df44 769 /* Private functions ---------------------------------------------------------*/
lypinator 0:bb348c97df44 770 /** @defgroup UART_Private_Functions UART Private Functions
lypinator 0:bb348c97df44 771 * @{
lypinator 0:bb348c97df44 772 */
lypinator 0:bb348c97df44 773
lypinator 0:bb348c97df44 774 /**
lypinator 0:bb348c97df44 775 * @}
lypinator 0:bb348c97df44 776 */
lypinator 0:bb348c97df44 777
lypinator 0:bb348c97df44 778 /**
lypinator 0:bb348c97df44 779 * @}
lypinator 0:bb348c97df44 780 */
lypinator 0:bb348c97df44 781
lypinator 0:bb348c97df44 782 /**
lypinator 0:bb348c97df44 783 * @}
lypinator 0:bb348c97df44 784 */
lypinator 0:bb348c97df44 785
lypinator 0:bb348c97df44 786 #ifdef __cplusplus
lypinator 0:bb348c97df44 787 }
lypinator 0:bb348c97df44 788 #endif
lypinator 0:bb348c97df44 789
lypinator 0:bb348c97df44 790 #endif /* __STM32F4xx_HAL_UART_H */
lypinator 0:bb348c97df44 791
lypinator 0:bb348c97df44 792 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/