Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_uart.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_uart.c
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief UART HAL module driver.
lypinator 0:bb348c97df44 6 * This file provides firmware functions to manage the following
lypinator 0:bb348c97df44 7 * functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
lypinator 0:bb348c97df44 8 * + Initialization and de-initialization functions
lypinator 0:bb348c97df44 9 * + IO operation functions
lypinator 0:bb348c97df44 10 * + Peripheral Control functions
lypinator 0:bb348c97df44 11 * + Peripheral State and Errors functions
lypinator 0:bb348c97df44 12 *
lypinator 0:bb348c97df44 13 @verbatim
lypinator 0:bb348c97df44 14 ==============================================================================
lypinator 0:bb348c97df44 15 ##### How to use this driver #####
lypinator 0:bb348c97df44 16 ==============================================================================
lypinator 0:bb348c97df44 17 [..]
lypinator 0:bb348c97df44 18 The UART HAL driver can be used as follows:
lypinator 0:bb348c97df44 19
lypinator 0:bb348c97df44 20 (#) Declare a UART_HandleTypeDef handle structure.
lypinator 0:bb348c97df44 21
lypinator 0:bb348c97df44 22 (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
lypinator 0:bb348c97df44 23 (##) Enable the USARTx interface clock.
lypinator 0:bb348c97df44 24 (##) UART pins configuration:
lypinator 0:bb348c97df44 25 (+++) Enable the clock for the UART GPIOs.
lypinator 0:bb348c97df44 26 (+++) Configure these UART pins as alternate function pull-up.
lypinator 0:bb348c97df44 27 (##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
lypinator 0:bb348c97df44 28 and HAL_UART_Receive_IT() APIs):
lypinator 0:bb348c97df44 29 (+++) Configure the USARTx interrupt priority.
lypinator 0:bb348c97df44 30 (+++) Enable the NVIC USART IRQ handle.
lypinator 0:bb348c97df44 31 (##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
lypinator 0:bb348c97df44 32 and HAL_UART_Receive_DMA() APIs):
lypinator 0:bb348c97df44 33 (+++) Declare a DMA handle structure for the Tx/Rx stream.
lypinator 0:bb348c97df44 34 (+++) Enable the DMAx interface clock.
lypinator 0:bb348c97df44 35 (+++) Configure the declared DMA handle structure with the required
lypinator 0:bb348c97df44 36 Tx/Rx parameters.
lypinator 0:bb348c97df44 37 (+++) Configure the DMA Tx/Rx Stream.
lypinator 0:bb348c97df44 38 (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
lypinator 0:bb348c97df44 39 (+++) Configure the priority and enable the NVIC for the transfer complete
lypinator 0:bb348c97df44 40 interrupt on the DMA Tx/Rx Stream.
lypinator 0:bb348c97df44 41
lypinator 0:bb348c97df44 42 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
lypinator 0:bb348c97df44 43 flow control and Mode(Receiver/Transmitter) in the Init structure.
lypinator 0:bb348c97df44 44
lypinator 0:bb348c97df44 45 (#) For the UART asynchronous mode, initialize the UART registers by calling
lypinator 0:bb348c97df44 46 the HAL_UART_Init() API.
lypinator 0:bb348c97df44 47
lypinator 0:bb348c97df44 48 (#) For the UART Half duplex mode, initialize the UART registers by calling
lypinator 0:bb348c97df44 49 the HAL_HalfDuplex_Init() API.
lypinator 0:bb348c97df44 50
lypinator 0:bb348c97df44 51 (#) For the LIN mode, initialize the UART registers by calling the HAL_LIN_Init() API.
lypinator 0:bb348c97df44 52
lypinator 0:bb348c97df44 53 (#) For the Multi-Processor mode, initialize the UART registers by calling
lypinator 0:bb348c97df44 54 the HAL_MultiProcessor_Init() API.
lypinator 0:bb348c97df44 55
lypinator 0:bb348c97df44 56 [..]
lypinator 0:bb348c97df44 57 (@) The specific UART interrupts (Transmission complete interrupt,
lypinator 0:bb348c97df44 58 RXNE interrupt and Error Interrupts) will be managed using the macros
lypinator 0:bb348c97df44 59 __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit
lypinator 0:bb348c97df44 60 and receive process.
lypinator 0:bb348c97df44 61
lypinator 0:bb348c97df44 62 [..]
lypinator 0:bb348c97df44 63 (@) These APIs (HAL_UART_Init() and HAL_HalfDuplex_Init()) configure also the
lypinator 0:bb348c97df44 64 low level Hardware GPIO, CLOCK, CORTEX...etc) by calling the customized
lypinator 0:bb348c97df44 65 HAL_UART_MspInit() API.
lypinator 0:bb348c97df44 66
lypinator 0:bb348c97df44 67 [..]
lypinator 0:bb348c97df44 68 Three operation modes are available within this driver :
lypinator 0:bb348c97df44 69
lypinator 0:bb348c97df44 70 *** Polling mode IO operation ***
lypinator 0:bb348c97df44 71 =================================
lypinator 0:bb348c97df44 72 [..]
lypinator 0:bb348c97df44 73 (+) Send an amount of data in blocking mode using HAL_UART_Transmit()
lypinator 0:bb348c97df44 74 (+) Receive an amount of data in blocking mode using HAL_UART_Receive()
lypinator 0:bb348c97df44 75
lypinator 0:bb348c97df44 76 *** Interrupt mode IO operation ***
lypinator 0:bb348c97df44 77 ===================================
lypinator 0:bb348c97df44 78 [..]
lypinator 0:bb348c97df44 79 (+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
lypinator 0:bb348c97df44 80 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
lypinator 0:bb348c97df44 81 add his own code by customization of function pointer HAL_UART_TxCpltCallback
lypinator 0:bb348c97df44 82 (+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
lypinator 0:bb348c97df44 83 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
lypinator 0:bb348c97df44 84 add his own code by customization of function pointer HAL_UART_RxCpltCallback
lypinator 0:bb348c97df44 85 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
lypinator 0:bb348c97df44 86 add his own code by customization of function pointer HAL_UART_ErrorCallback
lypinator 0:bb348c97df44 87
lypinator 0:bb348c97df44 88 *** DMA mode IO operation ***
lypinator 0:bb348c97df44 89 ==============================
lypinator 0:bb348c97df44 90 [..]
lypinator 0:bb348c97df44 91 (+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
lypinator 0:bb348c97df44 92 (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
lypinator 0:bb348c97df44 93 add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
lypinator 0:bb348c97df44 94 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
lypinator 0:bb348c97df44 95 add his own code by customization of function pointer HAL_UART_TxCpltCallback
lypinator 0:bb348c97df44 96 (+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
lypinator 0:bb348c97df44 97 (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
lypinator 0:bb348c97df44 98 add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
lypinator 0:bb348c97df44 99 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
lypinator 0:bb348c97df44 100 add his own code by customization of function pointer HAL_UART_RxCpltCallback
lypinator 0:bb348c97df44 101 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
lypinator 0:bb348c97df44 102 add his own code by customization of function pointer HAL_UART_ErrorCallback
lypinator 0:bb348c97df44 103 (+) Pause the DMA Transfer using HAL_UART_DMAPause()
lypinator 0:bb348c97df44 104 (+) Resume the DMA Transfer using HAL_UART_DMAResume()
lypinator 0:bb348c97df44 105 (+) Stop the DMA Transfer using HAL_UART_DMAStop()
lypinator 0:bb348c97df44 106
lypinator 0:bb348c97df44 107 *** UART HAL driver macros list ***
lypinator 0:bb348c97df44 108 =============================================
lypinator 0:bb348c97df44 109 [..]
lypinator 0:bb348c97df44 110 Below the list of most used macros in UART HAL driver.
lypinator 0:bb348c97df44 111
lypinator 0:bb348c97df44 112 (+) __HAL_UART_ENABLE: Enable the UART peripheral
lypinator 0:bb348c97df44 113 (+) __HAL_UART_DISABLE: Disable the UART peripheral
lypinator 0:bb348c97df44 114 (+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
lypinator 0:bb348c97df44 115 (+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
lypinator 0:bb348c97df44 116 (+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
lypinator 0:bb348c97df44 117 (+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
lypinator 0:bb348c97df44 118 (+) __HAL_UART_GET_IT_SOURCE: Check whether the specified UART interrupt has occurred or not
lypinator 0:bb348c97df44 119
lypinator 0:bb348c97df44 120 [..]
lypinator 0:bb348c97df44 121 (@) You can refer to the UART HAL driver header file for more useful macros
lypinator 0:bb348c97df44 122
lypinator 0:bb348c97df44 123 @endverbatim
lypinator 0:bb348c97df44 124 ******************************************************************************
lypinator 0:bb348c97df44 125 * @attention
lypinator 0:bb348c97df44 126 *
lypinator 0:bb348c97df44 127 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 128 *
lypinator 0:bb348c97df44 129 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 130 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 131 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 132 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 133 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 134 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 135 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 136 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 137 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 138 * without specific prior written permission.
lypinator 0:bb348c97df44 139 *
lypinator 0:bb348c97df44 140 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 141 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 142 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 143 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 144 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 145 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 146 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 147 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 148 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 149 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 150 *
lypinator 0:bb348c97df44 151 ******************************************************************************
lypinator 0:bb348c97df44 152 */
lypinator 0:bb348c97df44 153
lypinator 0:bb348c97df44 154 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 155 #include "stm32f4xx_hal.h"
lypinator 0:bb348c97df44 156
lypinator 0:bb348c97df44 157 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 158 * @{
lypinator 0:bb348c97df44 159 */
lypinator 0:bb348c97df44 160
lypinator 0:bb348c97df44 161 /** @defgroup UART UART
lypinator 0:bb348c97df44 162 * @brief HAL UART module driver
lypinator 0:bb348c97df44 163 * @{
lypinator 0:bb348c97df44 164 */
lypinator 0:bb348c97df44 165 #ifdef HAL_UART_MODULE_ENABLED
lypinator 0:bb348c97df44 166
lypinator 0:bb348c97df44 167 /* Private typedef -----------------------------------------------------------*/
lypinator 0:bb348c97df44 168 /* Private define ------------------------------------------------------------*/
lypinator 0:bb348c97df44 169 /** @addtogroup UART_Private_Constants
lypinator 0:bb348c97df44 170 * @{
lypinator 0:bb348c97df44 171 */
lypinator 0:bb348c97df44 172 /**
lypinator 0:bb348c97df44 173 * @}
lypinator 0:bb348c97df44 174 */
lypinator 0:bb348c97df44 175 /* Private macro -------------------------------------------------------------*/
lypinator 0:bb348c97df44 176 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 177 /* Private function prototypes -----------------------------------------------*/
lypinator 0:bb348c97df44 178 /** @addtogroup UART_Private_Functions UART Private Functions
lypinator 0:bb348c97df44 179 * @{
lypinator 0:bb348c97df44 180 */
lypinator 0:bb348c97df44 181 static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 182 static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 183 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
lypinator 0:bb348c97df44 184 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
lypinator 0:bb348c97df44 185 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
lypinator 0:bb348c97df44 186 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
lypinator 0:bb348c97df44 187 static void UART_DMAError(DMA_HandleTypeDef *hdma);
lypinator 0:bb348c97df44 188 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
lypinator 0:bb348c97df44 189 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
lypinator 0:bb348c97df44 190 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
lypinator 0:bb348c97df44 191 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
lypinator 0:bb348c97df44 192 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
lypinator 0:bb348c97df44 193 static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 194 static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 195 static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 196 static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
lypinator 0:bb348c97df44 197 static void UART_SetConfig (UART_HandleTypeDef *huart);
lypinator 0:bb348c97df44 198 /**
lypinator 0:bb348c97df44 199 * @}
lypinator 0:bb348c97df44 200 */
lypinator 0:bb348c97df44 201
lypinator 0:bb348c97df44 202 /* Exported functions ---------------------------------------------------------*/
lypinator 0:bb348c97df44 203 /** @defgroup UART_Exported_Functions UART Exported Functions
lypinator 0:bb348c97df44 204 * @{
lypinator 0:bb348c97df44 205 */
lypinator 0:bb348c97df44 206
lypinator 0:bb348c97df44 207 /** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
lypinator 0:bb348c97df44 208 * @brief Initialization and Configuration functions
lypinator 0:bb348c97df44 209 *
lypinator 0:bb348c97df44 210 @verbatim
lypinator 0:bb348c97df44 211 ===============================================================================
lypinator 0:bb348c97df44 212 ##### Initialization and Configuration functions #####
lypinator 0:bb348c97df44 213 ===============================================================================
lypinator 0:bb348c97df44 214 [..]
lypinator 0:bb348c97df44 215 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
lypinator 0:bb348c97df44 216 in asynchronous mode.
lypinator 0:bb348c97df44 217 (+) For the asynchronous mode only these parameters can be configured:
lypinator 0:bb348c97df44 218 (++) Baud Rate
lypinator 0:bb348c97df44 219 (++) Word Length
lypinator 0:bb348c97df44 220 (++) Stop Bit
lypinator 0:bb348c97df44 221 (++) Parity: If the parity is enabled, then the MSB bit of the data written
lypinator 0:bb348c97df44 222 in the data register is transmitted but is changed by the parity bit.
lypinator 0:bb348c97df44 223 Depending on the frame length defined by the M bit (8-bits or 9-bits),
lypinator 0:bb348c97df44 224 please refer to Reference manual for possible UART frame formats.
lypinator 0:bb348c97df44 225 (++) Hardware flow control
lypinator 0:bb348c97df44 226 (++) Receiver/transmitter modes
lypinator 0:bb348c97df44 227 (++) Over Sampling Method
lypinator 0:bb348c97df44 228 [..]
lypinator 0:bb348c97df44 229 The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init() and HAL_MultiProcessor_Init() APIs
lypinator 0:bb348c97df44 230 follow respectively the UART asynchronous, UART Half duplex, LIN and Multi-Processor
lypinator 0:bb348c97df44 231 configuration procedures (details for the procedures are available in reference manual (RM0329)).
lypinator 0:bb348c97df44 232
lypinator 0:bb348c97df44 233 @endverbatim
lypinator 0:bb348c97df44 234 * @{
lypinator 0:bb348c97df44 235 */
lypinator 0:bb348c97df44 236
lypinator 0:bb348c97df44 237 /**
lypinator 0:bb348c97df44 238 * @brief Initializes the UART mode according to the specified parameters in
lypinator 0:bb348c97df44 239 * the UART_InitTypeDef and create the associated handle.
lypinator 0:bb348c97df44 240 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 241 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 242 * @retval HAL status
lypinator 0:bb348c97df44 243 */
lypinator 0:bb348c97df44 244 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 245 {
lypinator 0:bb348c97df44 246 /* Check the UART handle allocation */
lypinator 0:bb348c97df44 247 if(huart == NULL)
lypinator 0:bb348c97df44 248 {
lypinator 0:bb348c97df44 249 return HAL_ERROR;
lypinator 0:bb348c97df44 250 }
lypinator 0:bb348c97df44 251
lypinator 0:bb348c97df44 252 /* Check the parameters */
lypinator 0:bb348c97df44 253 if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
lypinator 0:bb348c97df44 254 {
lypinator 0:bb348c97df44 255 /* The hardware flow control is available only for USART1, USART2, USART3 and USART6 */
lypinator 0:bb348c97df44 256 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
lypinator 0:bb348c97df44 257 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
lypinator 0:bb348c97df44 258 }
lypinator 0:bb348c97df44 259 else
lypinator 0:bb348c97df44 260 {
lypinator 0:bb348c97df44 261 assert_param(IS_UART_INSTANCE(huart->Instance));
lypinator 0:bb348c97df44 262 }
lypinator 0:bb348c97df44 263 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
lypinator 0:bb348c97df44 264 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
lypinator 0:bb348c97df44 265
lypinator 0:bb348c97df44 266 if(huart->gState == HAL_UART_STATE_RESET)
lypinator 0:bb348c97df44 267 {
lypinator 0:bb348c97df44 268 /* Allocate lock resource and initialize it */
lypinator 0:bb348c97df44 269 huart->Lock = HAL_UNLOCKED;
lypinator 0:bb348c97df44 270 /* Init the low level hardware */
lypinator 0:bb348c97df44 271 HAL_UART_MspInit(huart);
lypinator 0:bb348c97df44 272 }
lypinator 0:bb348c97df44 273
lypinator 0:bb348c97df44 274 huart->gState = HAL_UART_STATE_BUSY;
lypinator 0:bb348c97df44 275
lypinator 0:bb348c97df44 276 /* Disable the peripheral */
lypinator 0:bb348c97df44 277 __HAL_UART_DISABLE(huart);
lypinator 0:bb348c97df44 278
lypinator 0:bb348c97df44 279 /* Set the UART Communication parameters */
lypinator 0:bb348c97df44 280 UART_SetConfig(huart);
lypinator 0:bb348c97df44 281
lypinator 0:bb348c97df44 282 /* In asynchronous mode, the following bits must be kept cleared:
lypinator 0:bb348c97df44 283 - LINEN and CLKEN bits in the USART_CR2 register,
lypinator 0:bb348c97df44 284 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
lypinator 0:bb348c97df44 285 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
lypinator 0:bb348c97df44 286 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
lypinator 0:bb348c97df44 287
lypinator 0:bb348c97df44 288 /* Enable the peripheral */
lypinator 0:bb348c97df44 289 __HAL_UART_ENABLE(huart);
lypinator 0:bb348c97df44 290
lypinator 0:bb348c97df44 291 /* Initialize the UART state */
lypinator 0:bb348c97df44 292 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 293 huart->gState= HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 294 huart->RxState= HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 295
lypinator 0:bb348c97df44 296 return HAL_OK;
lypinator 0:bb348c97df44 297 }
lypinator 0:bb348c97df44 298
lypinator 0:bb348c97df44 299 /**
lypinator 0:bb348c97df44 300 * @brief Initializes the half-duplex mode according to the specified
lypinator 0:bb348c97df44 301 * parameters in the UART_InitTypeDef and create the associated handle.
lypinator 0:bb348c97df44 302 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 303 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 304 * @retval HAL status
lypinator 0:bb348c97df44 305 */
lypinator 0:bb348c97df44 306 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 307 {
lypinator 0:bb348c97df44 308 /* Check the UART handle allocation */
lypinator 0:bb348c97df44 309 if(huart == NULL)
lypinator 0:bb348c97df44 310 {
lypinator 0:bb348c97df44 311 return HAL_ERROR;
lypinator 0:bb348c97df44 312 }
lypinator 0:bb348c97df44 313
lypinator 0:bb348c97df44 314 /* Check the parameters */
lypinator 0:bb348c97df44 315 assert_param(IS_UART_INSTANCE(huart->Instance));
lypinator 0:bb348c97df44 316 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
lypinator 0:bb348c97df44 317 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
lypinator 0:bb348c97df44 318
lypinator 0:bb348c97df44 319 if(huart->gState == HAL_UART_STATE_RESET)
lypinator 0:bb348c97df44 320 {
lypinator 0:bb348c97df44 321 /* Allocate lock resource and initialize it */
lypinator 0:bb348c97df44 322 huart->Lock = HAL_UNLOCKED;
lypinator 0:bb348c97df44 323 /* Init the low level hardware */
lypinator 0:bb348c97df44 324 HAL_UART_MspInit(huart);
lypinator 0:bb348c97df44 325 }
lypinator 0:bb348c97df44 326
lypinator 0:bb348c97df44 327 huart->gState = HAL_UART_STATE_BUSY;
lypinator 0:bb348c97df44 328
lypinator 0:bb348c97df44 329 /* Disable the peripheral */
lypinator 0:bb348c97df44 330 __HAL_UART_DISABLE(huart);
lypinator 0:bb348c97df44 331
lypinator 0:bb348c97df44 332 /* Set the UART Communication parameters */
lypinator 0:bb348c97df44 333 UART_SetConfig(huart);
lypinator 0:bb348c97df44 334
lypinator 0:bb348c97df44 335 /* In half-duplex mode, the following bits must be kept cleared:
lypinator 0:bb348c97df44 336 - LINEN and CLKEN bits in the USART_CR2 register,
lypinator 0:bb348c97df44 337 - SCEN and IREN bits in the USART_CR3 register.*/
lypinator 0:bb348c97df44 338 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
lypinator 0:bb348c97df44 339 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN | USART_CR3_SCEN));
lypinator 0:bb348c97df44 340
lypinator 0:bb348c97df44 341 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
lypinator 0:bb348c97df44 342 SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
lypinator 0:bb348c97df44 343
lypinator 0:bb348c97df44 344 /* Enable the peripheral */
lypinator 0:bb348c97df44 345 __HAL_UART_ENABLE(huart);
lypinator 0:bb348c97df44 346
lypinator 0:bb348c97df44 347 /* Initialize the UART state*/
lypinator 0:bb348c97df44 348 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 349 huart->gState= HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 350 huart->RxState= HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 351
lypinator 0:bb348c97df44 352 return HAL_OK;
lypinator 0:bb348c97df44 353 }
lypinator 0:bb348c97df44 354
lypinator 0:bb348c97df44 355 /**
lypinator 0:bb348c97df44 356 * @brief Initializes the LIN mode according to the specified
lypinator 0:bb348c97df44 357 * parameters in the UART_InitTypeDef and create the associated handle.
lypinator 0:bb348c97df44 358 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 359 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 360 * @param BreakDetectLength Specifies the LIN break detection length.
lypinator 0:bb348c97df44 361 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 362 * @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection
lypinator 0:bb348c97df44 363 * @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection
lypinator 0:bb348c97df44 364 * @retval HAL status
lypinator 0:bb348c97df44 365 */
lypinator 0:bb348c97df44 366 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
lypinator 0:bb348c97df44 367 {
lypinator 0:bb348c97df44 368 /* Check the UART handle allocation */
lypinator 0:bb348c97df44 369 if(huart == NULL)
lypinator 0:bb348c97df44 370 {
lypinator 0:bb348c97df44 371 return HAL_ERROR;
lypinator 0:bb348c97df44 372 }
lypinator 0:bb348c97df44 373
lypinator 0:bb348c97df44 374 /* Check the parameters */
lypinator 0:bb348c97df44 375 assert_param(IS_UART_INSTANCE(huart->Instance));
lypinator 0:bb348c97df44 376 assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
lypinator 0:bb348c97df44 377 assert_param(IS_UART_LIN_WORD_LENGTH(huart->Init.WordLength));
lypinator 0:bb348c97df44 378 assert_param(IS_UART_LIN_OVERSAMPLING(huart->Init.OverSampling));
lypinator 0:bb348c97df44 379
lypinator 0:bb348c97df44 380 if(huart->gState == HAL_UART_STATE_RESET)
lypinator 0:bb348c97df44 381 {
lypinator 0:bb348c97df44 382 /* Allocate lock resource and initialize it */
lypinator 0:bb348c97df44 383 huart->Lock = HAL_UNLOCKED;
lypinator 0:bb348c97df44 384 /* Init the low level hardware */
lypinator 0:bb348c97df44 385 HAL_UART_MspInit(huart);
lypinator 0:bb348c97df44 386 }
lypinator 0:bb348c97df44 387
lypinator 0:bb348c97df44 388 huart->gState = HAL_UART_STATE_BUSY;
lypinator 0:bb348c97df44 389
lypinator 0:bb348c97df44 390 /* Disable the peripheral */
lypinator 0:bb348c97df44 391 __HAL_UART_DISABLE(huart);
lypinator 0:bb348c97df44 392
lypinator 0:bb348c97df44 393 /* Set the UART Communication parameters */
lypinator 0:bb348c97df44 394 UART_SetConfig(huart);
lypinator 0:bb348c97df44 395
lypinator 0:bb348c97df44 396 /* In LIN mode, the following bits must be kept cleared:
lypinator 0:bb348c97df44 397 - LINEN and CLKEN bits in the USART_CR2 register,
lypinator 0:bb348c97df44 398 - SCEN and IREN bits in the USART_CR3 register.*/
lypinator 0:bb348c97df44 399 CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
lypinator 0:bb348c97df44 400 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN));
lypinator 0:bb348c97df44 401
lypinator 0:bb348c97df44 402 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
lypinator 0:bb348c97df44 403 SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
lypinator 0:bb348c97df44 404
lypinator 0:bb348c97df44 405 /* Set the USART LIN Break detection length. */
lypinator 0:bb348c97df44 406 CLEAR_BIT(huart->Instance->CR2, USART_CR2_LBDL);
lypinator 0:bb348c97df44 407 SET_BIT(huart->Instance->CR2, BreakDetectLength);
lypinator 0:bb348c97df44 408
lypinator 0:bb348c97df44 409 /* Enable the peripheral */
lypinator 0:bb348c97df44 410 __HAL_UART_ENABLE(huart);
lypinator 0:bb348c97df44 411
lypinator 0:bb348c97df44 412 /* Initialize the UART state*/
lypinator 0:bb348c97df44 413 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 414 huart->gState= HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 415 huart->RxState= HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 416
lypinator 0:bb348c97df44 417 return HAL_OK;
lypinator 0:bb348c97df44 418 }
lypinator 0:bb348c97df44 419
lypinator 0:bb348c97df44 420 /**
lypinator 0:bb348c97df44 421 * @brief Initializes the Multi-Processor mode according to the specified
lypinator 0:bb348c97df44 422 * parameters in the UART_InitTypeDef and create the associated handle.
lypinator 0:bb348c97df44 423 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 424 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 425 * @param Address USART address
lypinator 0:bb348c97df44 426 * @param WakeUpMethod specifies the USART wake-up method.
lypinator 0:bb348c97df44 427 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 428 * @arg UART_WAKEUPMETHOD_IDLELINE: Wake-up by an idle line detection
lypinator 0:bb348c97df44 429 * @arg UART_WAKEUPMETHOD_ADDRESSMARK: Wake-up by an address mark
lypinator 0:bb348c97df44 430 * @retval HAL status
lypinator 0:bb348c97df44 431 */
lypinator 0:bb348c97df44 432 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
lypinator 0:bb348c97df44 433 {
lypinator 0:bb348c97df44 434 /* Check the UART handle allocation */
lypinator 0:bb348c97df44 435 if(huart == NULL)
lypinator 0:bb348c97df44 436 {
lypinator 0:bb348c97df44 437 return HAL_ERROR;
lypinator 0:bb348c97df44 438 }
lypinator 0:bb348c97df44 439
lypinator 0:bb348c97df44 440 /* Check the parameters */
lypinator 0:bb348c97df44 441 assert_param(IS_UART_INSTANCE(huart->Instance));
lypinator 0:bb348c97df44 442 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
lypinator 0:bb348c97df44 443 assert_param(IS_UART_ADDRESS(Address));
lypinator 0:bb348c97df44 444 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
lypinator 0:bb348c97df44 445 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
lypinator 0:bb348c97df44 446
lypinator 0:bb348c97df44 447 if(huart->gState == HAL_UART_STATE_RESET)
lypinator 0:bb348c97df44 448 {
lypinator 0:bb348c97df44 449 /* Allocate lock resource and initialize it */
lypinator 0:bb348c97df44 450 huart->Lock = HAL_UNLOCKED;
lypinator 0:bb348c97df44 451 /* Init the low level hardware */
lypinator 0:bb348c97df44 452 HAL_UART_MspInit(huart);
lypinator 0:bb348c97df44 453 }
lypinator 0:bb348c97df44 454
lypinator 0:bb348c97df44 455 huart->gState = HAL_UART_STATE_BUSY;
lypinator 0:bb348c97df44 456
lypinator 0:bb348c97df44 457 /* Disable the peripheral */
lypinator 0:bb348c97df44 458 __HAL_UART_DISABLE(huart);
lypinator 0:bb348c97df44 459
lypinator 0:bb348c97df44 460 /* Set the UART Communication parameters */
lypinator 0:bb348c97df44 461 UART_SetConfig(huart);
lypinator 0:bb348c97df44 462
lypinator 0:bb348c97df44 463 /* In Multi-Processor mode, the following bits must be kept cleared:
lypinator 0:bb348c97df44 464 - LINEN and CLKEN bits in the USART_CR2 register,
lypinator 0:bb348c97df44 465 - SCEN, HDSEL and IREN bits in the USART_CR3 register */
lypinator 0:bb348c97df44 466 CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
lypinator 0:bb348c97df44 467 CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
lypinator 0:bb348c97df44 468
lypinator 0:bb348c97df44 469 /* Clear the USART address */
lypinator 0:bb348c97df44 470 CLEAR_BIT(huart->Instance->CR2, USART_CR2_ADD);
lypinator 0:bb348c97df44 471 /* Set the USART address node */
lypinator 0:bb348c97df44 472 SET_BIT(huart->Instance->CR2, Address);
lypinator 0:bb348c97df44 473
lypinator 0:bb348c97df44 474 /* Set the wake up method by setting the WAKE bit in the CR1 register */
lypinator 0:bb348c97df44 475 CLEAR_BIT(huart->Instance->CR1, USART_CR1_WAKE);
lypinator 0:bb348c97df44 476 SET_BIT(huart->Instance->CR1, WakeUpMethod);
lypinator 0:bb348c97df44 477
lypinator 0:bb348c97df44 478 /* Enable the peripheral */
lypinator 0:bb348c97df44 479 __HAL_UART_ENABLE(huart);
lypinator 0:bb348c97df44 480
lypinator 0:bb348c97df44 481 /* Initialize the UART state */
lypinator 0:bb348c97df44 482 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 483 huart->gState= HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 484 huart->RxState= HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 485
lypinator 0:bb348c97df44 486 return HAL_OK;
lypinator 0:bb348c97df44 487 }
lypinator 0:bb348c97df44 488
lypinator 0:bb348c97df44 489 /**
lypinator 0:bb348c97df44 490 * @brief DeInitializes the UART peripheral.
lypinator 0:bb348c97df44 491 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 492 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 493 * @retval HAL status
lypinator 0:bb348c97df44 494 */
lypinator 0:bb348c97df44 495 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 496 {
lypinator 0:bb348c97df44 497 /* Check the UART handle allocation */
lypinator 0:bb348c97df44 498 if(huart == NULL)
lypinator 0:bb348c97df44 499 {
lypinator 0:bb348c97df44 500 return HAL_ERROR;
lypinator 0:bb348c97df44 501 }
lypinator 0:bb348c97df44 502
lypinator 0:bb348c97df44 503 /* Check the parameters */
lypinator 0:bb348c97df44 504 assert_param(IS_UART_INSTANCE(huart->Instance));
lypinator 0:bb348c97df44 505
lypinator 0:bb348c97df44 506 huart->gState = HAL_UART_STATE_BUSY;
lypinator 0:bb348c97df44 507
lypinator 0:bb348c97df44 508 /* DeInit the low level hardware */
lypinator 0:bb348c97df44 509 HAL_UART_MspDeInit(huart);
lypinator 0:bb348c97df44 510
lypinator 0:bb348c97df44 511 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 512 huart->gState = HAL_UART_STATE_RESET;
lypinator 0:bb348c97df44 513 huart->RxState = HAL_UART_STATE_RESET;
lypinator 0:bb348c97df44 514
lypinator 0:bb348c97df44 515 /* Process Lock */
lypinator 0:bb348c97df44 516 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 517
lypinator 0:bb348c97df44 518 return HAL_OK;
lypinator 0:bb348c97df44 519 }
lypinator 0:bb348c97df44 520
lypinator 0:bb348c97df44 521 /**
lypinator 0:bb348c97df44 522 * @brief UART MSP Init.
lypinator 0:bb348c97df44 523 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 524 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 525 * @retval None
lypinator 0:bb348c97df44 526 */
lypinator 0:bb348c97df44 527 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 528 {
lypinator 0:bb348c97df44 529 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 530 UNUSED(huart);
lypinator 0:bb348c97df44 531 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 532 the HAL_UART_MspInit could be implemented in the user file
lypinator 0:bb348c97df44 533 */
lypinator 0:bb348c97df44 534 }
lypinator 0:bb348c97df44 535
lypinator 0:bb348c97df44 536 /**
lypinator 0:bb348c97df44 537 * @brief UART MSP DeInit.
lypinator 0:bb348c97df44 538 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 539 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 540 * @retval None
lypinator 0:bb348c97df44 541 */
lypinator 0:bb348c97df44 542 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 543 {
lypinator 0:bb348c97df44 544 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 545 UNUSED(huart);
lypinator 0:bb348c97df44 546 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 547 the HAL_UART_MspDeInit could be implemented in the user file
lypinator 0:bb348c97df44 548 */
lypinator 0:bb348c97df44 549 }
lypinator 0:bb348c97df44 550
lypinator 0:bb348c97df44 551 /**
lypinator 0:bb348c97df44 552 * @}
lypinator 0:bb348c97df44 553 */
lypinator 0:bb348c97df44 554
lypinator 0:bb348c97df44 555 /** @defgroup UART_Exported_Functions_Group2 IO operation functions
lypinator 0:bb348c97df44 556 * @brief UART Transmit and Receive functions
lypinator 0:bb348c97df44 557 *
lypinator 0:bb348c97df44 558 @verbatim
lypinator 0:bb348c97df44 559 ==============================================================================
lypinator 0:bb348c97df44 560 ##### IO operation functions #####
lypinator 0:bb348c97df44 561 ==============================================================================
lypinator 0:bb348c97df44 562 [..]
lypinator 0:bb348c97df44 563 This subsection provides a set of functions allowing to manage the UART asynchronous
lypinator 0:bb348c97df44 564 and Half duplex data transfers.
lypinator 0:bb348c97df44 565
lypinator 0:bb348c97df44 566 (#) There are two modes of transfer:
lypinator 0:bb348c97df44 567 (++) Blocking mode: The communication is performed in polling mode.
lypinator 0:bb348c97df44 568 The HAL status of all data processing is returned by the same function
lypinator 0:bb348c97df44 569 after finishing transfer.
lypinator 0:bb348c97df44 570 (++) Non blocking mode: The communication is performed using Interrupts
lypinator 0:bb348c97df44 571 or DMA, these APIs return the HAL status.
lypinator 0:bb348c97df44 572 The end of the data processing will be indicated through the
lypinator 0:bb348c97df44 573 dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
lypinator 0:bb348c97df44 574 using DMA mode.
lypinator 0:bb348c97df44 575 The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
lypinator 0:bb348c97df44 576 will be executed respectively at the end of the transmit or receive process.
lypinator 0:bb348c97df44 577 The HAL_UART_ErrorCallback() user callback will be executed when
lypinator 0:bb348c97df44 578 a communication error is detected.
lypinator 0:bb348c97df44 579
lypinator 0:bb348c97df44 580 (#) Blocking mode APIs are:
lypinator 0:bb348c97df44 581 (++) HAL_UART_Transmit()
lypinator 0:bb348c97df44 582 (++) HAL_UART_Receive()
lypinator 0:bb348c97df44 583
lypinator 0:bb348c97df44 584 (#) Non Blocking mode APIs with Interrupt are:
lypinator 0:bb348c97df44 585 (++) HAL_UART_Transmit_IT()
lypinator 0:bb348c97df44 586 (++) HAL_UART_Receive_IT()
lypinator 0:bb348c97df44 587 (++) HAL_UART_IRQHandler()
lypinator 0:bb348c97df44 588
lypinator 0:bb348c97df44 589 (#) Non Blocking mode functions with DMA are:
lypinator 0:bb348c97df44 590 (++) HAL_UART_Transmit_DMA()
lypinator 0:bb348c97df44 591 (++) HAL_UART_Receive_DMA()
lypinator 0:bb348c97df44 592
lypinator 0:bb348c97df44 593 (#) A set of Transfer Complete Callbacks are provided in non blocking mode:
lypinator 0:bb348c97df44 594 (++) HAL_UART_TxCpltCallback()
lypinator 0:bb348c97df44 595 (++) HAL_UART_RxCpltCallback()
lypinator 0:bb348c97df44 596 (++) HAL_UART_ErrorCallback()
lypinator 0:bb348c97df44 597
lypinator 0:bb348c97df44 598 [..]
lypinator 0:bb348c97df44 599 (@) In the Half duplex communication, it is forbidden to run the transmit
lypinator 0:bb348c97df44 600 and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX
lypinator 0:bb348c97df44 601 can't be useful.
lypinator 0:bb348c97df44 602
lypinator 0:bb348c97df44 603 @endverbatim
lypinator 0:bb348c97df44 604 * @{
lypinator 0:bb348c97df44 605 */
lypinator 0:bb348c97df44 606
lypinator 0:bb348c97df44 607 /**
lypinator 0:bb348c97df44 608 * @brief Sends an amount of data in blocking mode.
lypinator 0:bb348c97df44 609 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 610 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 611 * @param pData Pointer to data buffer
lypinator 0:bb348c97df44 612 * @param Size Amount of data to be sent
lypinator 0:bb348c97df44 613 * @param Timeout Timeout duration
lypinator 0:bb348c97df44 614 * @retval HAL status
lypinator 0:bb348c97df44 615 */
lypinator 0:bb348c97df44 616 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
lypinator 0:bb348c97df44 617 {
lypinator 0:bb348c97df44 618 uint16_t* tmp;
lypinator 0:bb348c97df44 619 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 620
lypinator 0:bb348c97df44 621 /* Check that a Tx process is not already ongoing */
lypinator 0:bb348c97df44 622 if(huart->gState == HAL_UART_STATE_READY)
lypinator 0:bb348c97df44 623 {
lypinator 0:bb348c97df44 624 if((pData == NULL ) || (Size == 0))
lypinator 0:bb348c97df44 625 {
lypinator 0:bb348c97df44 626 return HAL_ERROR;
lypinator 0:bb348c97df44 627 }
lypinator 0:bb348c97df44 628
lypinator 0:bb348c97df44 629 /* Process Locked */
lypinator 0:bb348c97df44 630 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 631
lypinator 0:bb348c97df44 632 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 633 huart->gState = HAL_UART_STATE_BUSY_TX;
lypinator 0:bb348c97df44 634
lypinator 0:bb348c97df44 635 /* Init tickstart for timeout managment */
lypinator 0:bb348c97df44 636 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 637
lypinator 0:bb348c97df44 638 huart->TxXferSize = Size;
lypinator 0:bb348c97df44 639 huart->TxXferCount = Size;
lypinator 0:bb348c97df44 640 while(huart->TxXferCount > 0U)
lypinator 0:bb348c97df44 641 {
lypinator 0:bb348c97df44 642 huart->TxXferCount--;
lypinator 0:bb348c97df44 643 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
lypinator 0:bb348c97df44 644 {
lypinator 0:bb348c97df44 645 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
lypinator 0:bb348c97df44 646 {
lypinator 0:bb348c97df44 647 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 648 }
lypinator 0:bb348c97df44 649 tmp = (uint16_t*) pData;
lypinator 0:bb348c97df44 650 huart->Instance->DR = (*tmp & (uint16_t)0x01FF);
lypinator 0:bb348c97df44 651 if(huart->Init.Parity == UART_PARITY_NONE)
lypinator 0:bb348c97df44 652 {
lypinator 0:bb348c97df44 653 pData +=2U;
lypinator 0:bb348c97df44 654 }
lypinator 0:bb348c97df44 655 else
lypinator 0:bb348c97df44 656 {
lypinator 0:bb348c97df44 657 pData +=1U;
lypinator 0:bb348c97df44 658 }
lypinator 0:bb348c97df44 659 }
lypinator 0:bb348c97df44 660 else
lypinator 0:bb348c97df44 661 {
lypinator 0:bb348c97df44 662 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
lypinator 0:bb348c97df44 663 {
lypinator 0:bb348c97df44 664 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 665 }
lypinator 0:bb348c97df44 666 huart->Instance->DR = (*pData++ & (uint8_t)0xFF);
lypinator 0:bb348c97df44 667 }
lypinator 0:bb348c97df44 668 }
lypinator 0:bb348c97df44 669
lypinator 0:bb348c97df44 670 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
lypinator 0:bb348c97df44 671 {
lypinator 0:bb348c97df44 672 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 673 }
lypinator 0:bb348c97df44 674
lypinator 0:bb348c97df44 675 /* At end of Tx process, restore huart->gState to Ready */
lypinator 0:bb348c97df44 676 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 677
lypinator 0:bb348c97df44 678 /* Process Unlocked */
lypinator 0:bb348c97df44 679 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 680
lypinator 0:bb348c97df44 681 return HAL_OK;
lypinator 0:bb348c97df44 682 }
lypinator 0:bb348c97df44 683 else
lypinator 0:bb348c97df44 684 {
lypinator 0:bb348c97df44 685 return HAL_BUSY;
lypinator 0:bb348c97df44 686 }
lypinator 0:bb348c97df44 687 }
lypinator 0:bb348c97df44 688
lypinator 0:bb348c97df44 689 /**
lypinator 0:bb348c97df44 690 * @brief Receives an amount of data in blocking mode.
lypinator 0:bb348c97df44 691 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 692 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 693 * @param pData Pointer to data buffer
lypinator 0:bb348c97df44 694 * @param Size Amount of data to be received
lypinator 0:bb348c97df44 695 * @param Timeout Timeout duration
lypinator 0:bb348c97df44 696 * @retval HAL status
lypinator 0:bb348c97df44 697 */
lypinator 0:bb348c97df44 698 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
lypinator 0:bb348c97df44 699 {
lypinator 0:bb348c97df44 700 uint16_t* tmp;
lypinator 0:bb348c97df44 701 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 702
lypinator 0:bb348c97df44 703 /* Check that a Rx process is not already ongoing */
lypinator 0:bb348c97df44 704 if(huart->RxState == HAL_UART_STATE_READY)
lypinator 0:bb348c97df44 705 {
lypinator 0:bb348c97df44 706 if((pData == NULL ) || (Size == 0))
lypinator 0:bb348c97df44 707 {
lypinator 0:bb348c97df44 708 return HAL_ERROR;
lypinator 0:bb348c97df44 709 }
lypinator 0:bb348c97df44 710
lypinator 0:bb348c97df44 711 /* Process Locked */
lypinator 0:bb348c97df44 712 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 713
lypinator 0:bb348c97df44 714 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 715 huart->RxState = HAL_UART_STATE_BUSY_RX;
lypinator 0:bb348c97df44 716
lypinator 0:bb348c97df44 717 /* Init tickstart for timeout managment */
lypinator 0:bb348c97df44 718 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 719
lypinator 0:bb348c97df44 720 huart->RxXferSize = Size;
lypinator 0:bb348c97df44 721 huart->RxXferCount = Size;
lypinator 0:bb348c97df44 722
lypinator 0:bb348c97df44 723 /* Check the remain data to be received */
lypinator 0:bb348c97df44 724 while(huart->RxXferCount > 0U)
lypinator 0:bb348c97df44 725 {
lypinator 0:bb348c97df44 726 huart->RxXferCount--;
lypinator 0:bb348c97df44 727 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
lypinator 0:bb348c97df44 728 {
lypinator 0:bb348c97df44 729 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
lypinator 0:bb348c97df44 730 {
lypinator 0:bb348c97df44 731 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 732 }
lypinator 0:bb348c97df44 733 tmp = (uint16_t*) pData;
lypinator 0:bb348c97df44 734 if(huart->Init.Parity == UART_PARITY_NONE)
lypinator 0:bb348c97df44 735 {
lypinator 0:bb348c97df44 736 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
lypinator 0:bb348c97df44 737 pData +=2U;
lypinator 0:bb348c97df44 738 }
lypinator 0:bb348c97df44 739 else
lypinator 0:bb348c97df44 740 {
lypinator 0:bb348c97df44 741 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
lypinator 0:bb348c97df44 742 pData +=1U;
lypinator 0:bb348c97df44 743 }
lypinator 0:bb348c97df44 744
lypinator 0:bb348c97df44 745 }
lypinator 0:bb348c97df44 746 else
lypinator 0:bb348c97df44 747 {
lypinator 0:bb348c97df44 748 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
lypinator 0:bb348c97df44 749 {
lypinator 0:bb348c97df44 750 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 751 }
lypinator 0:bb348c97df44 752 if(huart->Init.Parity == UART_PARITY_NONE)
lypinator 0:bb348c97df44 753 {
lypinator 0:bb348c97df44 754 *pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
lypinator 0:bb348c97df44 755 }
lypinator 0:bb348c97df44 756 else
lypinator 0:bb348c97df44 757 {
lypinator 0:bb348c97df44 758 *pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
lypinator 0:bb348c97df44 759 }
lypinator 0:bb348c97df44 760
lypinator 0:bb348c97df44 761 }
lypinator 0:bb348c97df44 762 }
lypinator 0:bb348c97df44 763
lypinator 0:bb348c97df44 764 /* At end of Rx process, restore huart->RxState to Ready */
lypinator 0:bb348c97df44 765 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 766
lypinator 0:bb348c97df44 767 /* Process Unlocked */
lypinator 0:bb348c97df44 768 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 769
lypinator 0:bb348c97df44 770 return HAL_OK;
lypinator 0:bb348c97df44 771 }
lypinator 0:bb348c97df44 772 else
lypinator 0:bb348c97df44 773 {
lypinator 0:bb348c97df44 774 return HAL_BUSY;
lypinator 0:bb348c97df44 775 }
lypinator 0:bb348c97df44 776 }
lypinator 0:bb348c97df44 777
lypinator 0:bb348c97df44 778 /**
lypinator 0:bb348c97df44 779 * @brief Sends an amount of data in non blocking mode.
lypinator 0:bb348c97df44 780 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 781 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 782 * @param pData Pointer to data buffer
lypinator 0:bb348c97df44 783 * @param Size Amount of data to be sent
lypinator 0:bb348c97df44 784 * @retval HAL status
lypinator 0:bb348c97df44 785 */
lypinator 0:bb348c97df44 786 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
lypinator 0:bb348c97df44 787 {
lypinator 0:bb348c97df44 788 /* Check that a Tx process is not already ongoing */
lypinator 0:bb348c97df44 789 if(huart->gState == HAL_UART_STATE_READY)
lypinator 0:bb348c97df44 790 {
lypinator 0:bb348c97df44 791 if((pData == NULL ) || (Size == 0))
lypinator 0:bb348c97df44 792 {
lypinator 0:bb348c97df44 793 return HAL_ERROR;
lypinator 0:bb348c97df44 794 }
lypinator 0:bb348c97df44 795
lypinator 0:bb348c97df44 796 /* Process Locked */
lypinator 0:bb348c97df44 797 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 798
lypinator 0:bb348c97df44 799 huart->pTxBuffPtr = pData;
lypinator 0:bb348c97df44 800 huart->TxXferSize = Size;
lypinator 0:bb348c97df44 801 huart->TxXferCount = Size;
lypinator 0:bb348c97df44 802
lypinator 0:bb348c97df44 803 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 804 huart->gState = HAL_UART_STATE_BUSY_TX;
lypinator 0:bb348c97df44 805
lypinator 0:bb348c97df44 806 /* Process Unlocked */
lypinator 0:bb348c97df44 807 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 808
lypinator 0:bb348c97df44 809 /* Enable the UART Transmit data register empty Interrupt */
lypinator 0:bb348c97df44 810 SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
lypinator 0:bb348c97df44 811
lypinator 0:bb348c97df44 812 return HAL_OK;
lypinator 0:bb348c97df44 813 }
lypinator 0:bb348c97df44 814 else
lypinator 0:bb348c97df44 815 {
lypinator 0:bb348c97df44 816 return HAL_BUSY;
lypinator 0:bb348c97df44 817 }
lypinator 0:bb348c97df44 818 }
lypinator 0:bb348c97df44 819
lypinator 0:bb348c97df44 820 /**
lypinator 0:bb348c97df44 821 * @brief Receives an amount of data in non blocking mode
lypinator 0:bb348c97df44 822 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 823 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 824 * @param pData Pointer to data buffer
lypinator 0:bb348c97df44 825 * @param Size Amount of data to be received
lypinator 0:bb348c97df44 826 * @retval HAL status
lypinator 0:bb348c97df44 827 */
lypinator 0:bb348c97df44 828 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
lypinator 0:bb348c97df44 829 {
lypinator 0:bb348c97df44 830 /* Check that a Rx process is not already ongoing */
lypinator 0:bb348c97df44 831 if(huart->RxState == HAL_UART_STATE_READY)
lypinator 0:bb348c97df44 832 {
lypinator 0:bb348c97df44 833 if((pData == NULL ) || (Size == 0))
lypinator 0:bb348c97df44 834 {
lypinator 0:bb348c97df44 835 return HAL_ERROR;
lypinator 0:bb348c97df44 836 }
lypinator 0:bb348c97df44 837
lypinator 0:bb348c97df44 838 /* Process Locked */
lypinator 0:bb348c97df44 839 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 840
lypinator 0:bb348c97df44 841 huart->pRxBuffPtr = pData;
lypinator 0:bb348c97df44 842 huart->RxXferSize = Size;
lypinator 0:bb348c97df44 843 huart->RxXferCount = Size;
lypinator 0:bb348c97df44 844
lypinator 0:bb348c97df44 845 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 846 huart->RxState = HAL_UART_STATE_BUSY_RX;
lypinator 0:bb348c97df44 847
lypinator 0:bb348c97df44 848 /* Process Unlocked */
lypinator 0:bb348c97df44 849 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 850
lypinator 0:bb348c97df44 851 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
lypinator 0:bb348c97df44 852 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 853
lypinator 0:bb348c97df44 854 /* Enable the UART Parity Error and Data Register not empty Interrupts */
lypinator 0:bb348c97df44 855 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
lypinator 0:bb348c97df44 856
lypinator 0:bb348c97df44 857 return HAL_OK;
lypinator 0:bb348c97df44 858 }
lypinator 0:bb348c97df44 859 else
lypinator 0:bb348c97df44 860 {
lypinator 0:bb348c97df44 861 return HAL_BUSY;
lypinator 0:bb348c97df44 862 }
lypinator 0:bb348c97df44 863 }
lypinator 0:bb348c97df44 864
lypinator 0:bb348c97df44 865 /**
lypinator 0:bb348c97df44 866 * @brief Sends an amount of data in non blocking mode.
lypinator 0:bb348c97df44 867 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 868 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 869 * @param pData Pointer to data buffer
lypinator 0:bb348c97df44 870 * @param Size Amount of data to be sent
lypinator 0:bb348c97df44 871 * @retval HAL status
lypinator 0:bb348c97df44 872 */
lypinator 0:bb348c97df44 873 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
lypinator 0:bb348c97df44 874 {
lypinator 0:bb348c97df44 875 uint32_t *tmp;
lypinator 0:bb348c97df44 876
lypinator 0:bb348c97df44 877 /* Check that a Tx process is not already ongoing */
lypinator 0:bb348c97df44 878 if(huart->gState == HAL_UART_STATE_READY)
lypinator 0:bb348c97df44 879 {
lypinator 0:bb348c97df44 880 if((pData == NULL ) || (Size == 0))
lypinator 0:bb348c97df44 881 {
lypinator 0:bb348c97df44 882 return HAL_ERROR;
lypinator 0:bb348c97df44 883 }
lypinator 0:bb348c97df44 884
lypinator 0:bb348c97df44 885 /* Process Locked */
lypinator 0:bb348c97df44 886 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 887
lypinator 0:bb348c97df44 888 huart->pTxBuffPtr = pData;
lypinator 0:bb348c97df44 889 huart->TxXferSize = Size;
lypinator 0:bb348c97df44 890 huart->TxXferCount = Size;
lypinator 0:bb348c97df44 891
lypinator 0:bb348c97df44 892 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 893 huart->gState = HAL_UART_STATE_BUSY_TX;
lypinator 0:bb348c97df44 894
lypinator 0:bb348c97df44 895 /* Set the UART DMA transfer complete callback */
lypinator 0:bb348c97df44 896 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
lypinator 0:bb348c97df44 897
lypinator 0:bb348c97df44 898 /* Set the UART DMA Half transfer complete callback */
lypinator 0:bb348c97df44 899 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
lypinator 0:bb348c97df44 900
lypinator 0:bb348c97df44 901 /* Set the DMA error callback */
lypinator 0:bb348c97df44 902 huart->hdmatx->XferErrorCallback = UART_DMAError;
lypinator 0:bb348c97df44 903
lypinator 0:bb348c97df44 904 /* Set the DMA abort callback */
lypinator 0:bb348c97df44 905 huart->hdmatx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 906
lypinator 0:bb348c97df44 907 /* Enable the UART transmit DMA Stream */
lypinator 0:bb348c97df44 908 tmp = (uint32_t*)&pData;
lypinator 0:bb348c97df44 909 HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t*)tmp, (uint32_t)&huart->Instance->DR, Size);
lypinator 0:bb348c97df44 910
lypinator 0:bb348c97df44 911 /* Clear the TC flag in the SR register by writing 0 to it */
lypinator 0:bb348c97df44 912 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
lypinator 0:bb348c97df44 913
lypinator 0:bb348c97df44 914 /* Process Unlocked */
lypinator 0:bb348c97df44 915 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 916
lypinator 0:bb348c97df44 917 /* Enable the DMA transfer for transmit request by setting the DMAT bit
lypinator 0:bb348c97df44 918 in the UART CR3 register */
lypinator 0:bb348c97df44 919 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 920
lypinator 0:bb348c97df44 921 return HAL_OK;
lypinator 0:bb348c97df44 922 }
lypinator 0:bb348c97df44 923 else
lypinator 0:bb348c97df44 924 {
lypinator 0:bb348c97df44 925 return HAL_BUSY;
lypinator 0:bb348c97df44 926 }
lypinator 0:bb348c97df44 927 }
lypinator 0:bb348c97df44 928
lypinator 0:bb348c97df44 929 /**
lypinator 0:bb348c97df44 930 * @brief Receives an amount of data in non blocking mode.
lypinator 0:bb348c97df44 931 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 932 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 933 * @param pData Pointer to data buffer
lypinator 0:bb348c97df44 934 * @param Size Amount of data to be received
lypinator 0:bb348c97df44 935 * @note When the UART parity is enabled (PCE = 1) the data received contain the parity bit.
lypinator 0:bb348c97df44 936 * @retval HAL status
lypinator 0:bb348c97df44 937 */
lypinator 0:bb348c97df44 938 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
lypinator 0:bb348c97df44 939 {
lypinator 0:bb348c97df44 940 uint32_t *tmp;
lypinator 0:bb348c97df44 941
lypinator 0:bb348c97df44 942 /* Check that a Rx process is not already ongoing */
lypinator 0:bb348c97df44 943 if(huart->RxState == HAL_UART_STATE_READY)
lypinator 0:bb348c97df44 944 {
lypinator 0:bb348c97df44 945 if((pData == NULL ) || (Size == 0))
lypinator 0:bb348c97df44 946 {
lypinator 0:bb348c97df44 947 return HAL_ERROR;
lypinator 0:bb348c97df44 948 }
lypinator 0:bb348c97df44 949
lypinator 0:bb348c97df44 950 /* Process Locked */
lypinator 0:bb348c97df44 951 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 952
lypinator 0:bb348c97df44 953 huart->pRxBuffPtr = pData;
lypinator 0:bb348c97df44 954 huart->RxXferSize = Size;
lypinator 0:bb348c97df44 955
lypinator 0:bb348c97df44 956 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 957 huart->RxState = HAL_UART_STATE_BUSY_RX;
lypinator 0:bb348c97df44 958
lypinator 0:bb348c97df44 959 /* Set the UART DMA transfer complete callback */
lypinator 0:bb348c97df44 960 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
lypinator 0:bb348c97df44 961
lypinator 0:bb348c97df44 962 /* Set the UART DMA Half transfer complete callback */
lypinator 0:bb348c97df44 963 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
lypinator 0:bb348c97df44 964
lypinator 0:bb348c97df44 965 /* Set the DMA error callback */
lypinator 0:bb348c97df44 966 huart->hdmarx->XferErrorCallback = UART_DMAError;
lypinator 0:bb348c97df44 967
lypinator 0:bb348c97df44 968 /* Set the DMA abort callback */
lypinator 0:bb348c97df44 969 huart->hdmarx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 970
lypinator 0:bb348c97df44 971 /* Enable the DMA Stream */
lypinator 0:bb348c97df44 972 tmp = (uint32_t*)&pData;
lypinator 0:bb348c97df44 973 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t*)tmp, Size);
lypinator 0:bb348c97df44 974
lypinator 0:bb348c97df44 975 /* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */
lypinator 0:bb348c97df44 976 __HAL_UART_CLEAR_OREFLAG(huart);
lypinator 0:bb348c97df44 977
lypinator 0:bb348c97df44 978 /* Process Unlocked */
lypinator 0:bb348c97df44 979 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 980
lypinator 0:bb348c97df44 981 /* Enable the UART Parity Error Interrupt */
lypinator 0:bb348c97df44 982 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
lypinator 0:bb348c97df44 983
lypinator 0:bb348c97df44 984 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
lypinator 0:bb348c97df44 985 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 986
lypinator 0:bb348c97df44 987 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
lypinator 0:bb348c97df44 988 in the UART CR3 register */
lypinator 0:bb348c97df44 989 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 990
lypinator 0:bb348c97df44 991 return HAL_OK;
lypinator 0:bb348c97df44 992 }
lypinator 0:bb348c97df44 993 else
lypinator 0:bb348c97df44 994 {
lypinator 0:bb348c97df44 995 return HAL_BUSY;
lypinator 0:bb348c97df44 996 }
lypinator 0:bb348c97df44 997 }
lypinator 0:bb348c97df44 998
lypinator 0:bb348c97df44 999 /**
lypinator 0:bb348c97df44 1000 * @brief Pauses the DMA Transfer.
lypinator 0:bb348c97df44 1001 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1002 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1003 * @retval HAL status
lypinator 0:bb348c97df44 1004 */
lypinator 0:bb348c97df44 1005 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1006 {
lypinator 0:bb348c97df44 1007 uint32_t dmarequest = 0x00U;
lypinator 0:bb348c97df44 1008
lypinator 0:bb348c97df44 1009 /* Process Locked */
lypinator 0:bb348c97df44 1010 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 1011 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 1012 if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
lypinator 0:bb348c97df44 1013 {
lypinator 0:bb348c97df44 1014 /* Disable the UART DMA Tx request */
lypinator 0:bb348c97df44 1015 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 1016 }
lypinator 0:bb348c97df44 1017 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 1018 if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
lypinator 0:bb348c97df44 1019 {
lypinator 0:bb348c97df44 1020 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
lypinator 0:bb348c97df44 1021 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
lypinator 0:bb348c97df44 1022 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 1023
lypinator 0:bb348c97df44 1024 /* Disable the UART DMA Rx request */
lypinator 0:bb348c97df44 1025 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 1026 }
lypinator 0:bb348c97df44 1027
lypinator 0:bb348c97df44 1028 /* Process Unlocked */
lypinator 0:bb348c97df44 1029 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 1030
lypinator 0:bb348c97df44 1031 return HAL_OK;
lypinator 0:bb348c97df44 1032 }
lypinator 0:bb348c97df44 1033
lypinator 0:bb348c97df44 1034 /**
lypinator 0:bb348c97df44 1035 * @brief Resumes the DMA Transfer.
lypinator 0:bb348c97df44 1036 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1037 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1038 * @retval HAL status
lypinator 0:bb348c97df44 1039 */
lypinator 0:bb348c97df44 1040 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1041 {
lypinator 0:bb348c97df44 1042 /* Process Locked */
lypinator 0:bb348c97df44 1043 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 1044
lypinator 0:bb348c97df44 1045 if(huart->gState == HAL_UART_STATE_BUSY_TX)
lypinator 0:bb348c97df44 1046 {
lypinator 0:bb348c97df44 1047 /* Enable the UART DMA Tx request */
lypinator 0:bb348c97df44 1048 SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 1049 }
lypinator 0:bb348c97df44 1050 if(huart->RxState == HAL_UART_STATE_BUSY_RX)
lypinator 0:bb348c97df44 1051 {
lypinator 0:bb348c97df44 1052 /* Clear the Overrun flag before resuming the Rx transfer*/
lypinator 0:bb348c97df44 1053 __HAL_UART_CLEAR_OREFLAG(huart);
lypinator 0:bb348c97df44 1054
lypinator 0:bb348c97df44 1055 /* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
lypinator 0:bb348c97df44 1056 SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
lypinator 0:bb348c97df44 1057 SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 1058
lypinator 0:bb348c97df44 1059 /* Enable the UART DMA Rx request */
lypinator 0:bb348c97df44 1060 SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 1061 }
lypinator 0:bb348c97df44 1062
lypinator 0:bb348c97df44 1063 /* Process Unlocked */
lypinator 0:bb348c97df44 1064 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 1065
lypinator 0:bb348c97df44 1066 return HAL_OK;
lypinator 0:bb348c97df44 1067 }
lypinator 0:bb348c97df44 1068
lypinator 0:bb348c97df44 1069 /**
lypinator 0:bb348c97df44 1070 * @brief Stops the DMA Transfer.
lypinator 0:bb348c97df44 1071 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1072 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1073 * @retval HAL status
lypinator 0:bb348c97df44 1074 */
lypinator 0:bb348c97df44 1075 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1076 {
lypinator 0:bb348c97df44 1077 uint32_t dmarequest = 0x00U;
lypinator 0:bb348c97df44 1078 /* The Lock is not implemented on this API to allow the user application
lypinator 0:bb348c97df44 1079 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback():
lypinator 0:bb348c97df44 1080 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
lypinator 0:bb348c97df44 1081 and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
lypinator 0:bb348c97df44 1082 */
lypinator 0:bb348c97df44 1083
lypinator 0:bb348c97df44 1084 /* Stop UART DMA Tx request if ongoing */
lypinator 0:bb348c97df44 1085 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 1086 if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
lypinator 0:bb348c97df44 1087 {
lypinator 0:bb348c97df44 1088 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 1089
lypinator 0:bb348c97df44 1090 /* Abort the UART DMA Tx channel */
lypinator 0:bb348c97df44 1091 if(huart->hdmatx != NULL)
lypinator 0:bb348c97df44 1092 {
lypinator 0:bb348c97df44 1093 HAL_DMA_Abort(huart->hdmatx);
lypinator 0:bb348c97df44 1094 }
lypinator 0:bb348c97df44 1095 UART_EndTxTransfer(huart);
lypinator 0:bb348c97df44 1096 }
lypinator 0:bb348c97df44 1097
lypinator 0:bb348c97df44 1098 /* Stop UART DMA Rx request if ongoing */
lypinator 0:bb348c97df44 1099 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 1100 if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
lypinator 0:bb348c97df44 1101 {
lypinator 0:bb348c97df44 1102 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 1103
lypinator 0:bb348c97df44 1104 /* Abort the UART DMA Rx channel */
lypinator 0:bb348c97df44 1105 if(huart->hdmarx != NULL)
lypinator 0:bb348c97df44 1106 {
lypinator 0:bb348c97df44 1107 HAL_DMA_Abort(huart->hdmarx);
lypinator 0:bb348c97df44 1108 }
lypinator 0:bb348c97df44 1109 UART_EndRxTransfer(huart);
lypinator 0:bb348c97df44 1110 }
lypinator 0:bb348c97df44 1111
lypinator 0:bb348c97df44 1112 return HAL_OK;
lypinator 0:bb348c97df44 1113 }
lypinator 0:bb348c97df44 1114
lypinator 0:bb348c97df44 1115 /**
lypinator 0:bb348c97df44 1116 * @brief Abort ongoing transfers (blocking mode).
lypinator 0:bb348c97df44 1117 * @param huart UART handle.
lypinator 0:bb348c97df44 1118 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
lypinator 0:bb348c97df44 1119 * This procedure performs following operations :
lypinator 0:bb348c97df44 1120 * - Disable PPP Interrupts
lypinator 0:bb348c97df44 1121 * - Disable the DMA transfer in the peripheral register (if enabled)
lypinator 0:bb348c97df44 1122 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
lypinator 0:bb348c97df44 1123 * - Set handle State to READY
lypinator 0:bb348c97df44 1124 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
lypinator 0:bb348c97df44 1125 * @retval HAL status
lypinator 0:bb348c97df44 1126 */
lypinator 0:bb348c97df44 1127 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1128 {
lypinator 0:bb348c97df44 1129 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
lypinator 0:bb348c97df44 1130 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
lypinator 0:bb348c97df44 1131 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 1132
lypinator 0:bb348c97df44 1133 /* Disable the UART DMA Tx request if enabled */
lypinator 0:bb348c97df44 1134 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
lypinator 0:bb348c97df44 1135 {
lypinator 0:bb348c97df44 1136 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 1137
lypinator 0:bb348c97df44 1138 /* Abort the UART DMA Tx channel: use blocking DMA Abort API (no callback) */
lypinator 0:bb348c97df44 1139 if(huart->hdmatx != NULL)
lypinator 0:bb348c97df44 1140 {
lypinator 0:bb348c97df44 1141 /* Set the UART DMA Abort callback to Null.
lypinator 0:bb348c97df44 1142 No call back execution at end of DMA abort procedure */
lypinator 0:bb348c97df44 1143 huart->hdmatx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 1144
lypinator 0:bb348c97df44 1145 HAL_DMA_Abort(huart->hdmatx);
lypinator 0:bb348c97df44 1146 }
lypinator 0:bb348c97df44 1147 }
lypinator 0:bb348c97df44 1148
lypinator 0:bb348c97df44 1149 /* Disable the UART DMA Rx request if enabled */
lypinator 0:bb348c97df44 1150 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
lypinator 0:bb348c97df44 1151 {
lypinator 0:bb348c97df44 1152 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 1153
lypinator 0:bb348c97df44 1154 /* Abort the UART DMA Rx channel: use blocking DMA Abort API (no callback) */
lypinator 0:bb348c97df44 1155 if(huart->hdmarx != NULL)
lypinator 0:bb348c97df44 1156 {
lypinator 0:bb348c97df44 1157 /* Set the UART DMA Abort callback to Null.
lypinator 0:bb348c97df44 1158 No call back execution at end of DMA abort procedure */
lypinator 0:bb348c97df44 1159 huart->hdmarx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 1160
lypinator 0:bb348c97df44 1161 HAL_DMA_Abort(huart->hdmarx);
lypinator 0:bb348c97df44 1162 }
lypinator 0:bb348c97df44 1163 }
lypinator 0:bb348c97df44 1164
lypinator 0:bb348c97df44 1165 /* Reset Tx and Rx transfer counters */
lypinator 0:bb348c97df44 1166 huart->TxXferCount = 0x00U;
lypinator 0:bb348c97df44 1167 huart->RxXferCount = 0x00U;
lypinator 0:bb348c97df44 1168
lypinator 0:bb348c97df44 1169 /* Reset ErrorCode */
lypinator 0:bb348c97df44 1170 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 1171
lypinator 0:bb348c97df44 1172 /* Restore huart->RxState and huart->gState to Ready */
lypinator 0:bb348c97df44 1173 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1174 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1175
lypinator 0:bb348c97df44 1176 return HAL_OK;
lypinator 0:bb348c97df44 1177 }
lypinator 0:bb348c97df44 1178
lypinator 0:bb348c97df44 1179 /**
lypinator 0:bb348c97df44 1180 * @brief Abort ongoing Transmit transfer (blocking mode).
lypinator 0:bb348c97df44 1181 * @param huart UART handle.
lypinator 0:bb348c97df44 1182 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
lypinator 0:bb348c97df44 1183 * This procedure performs following operations :
lypinator 0:bb348c97df44 1184 * - Disable PPP Interrupts
lypinator 0:bb348c97df44 1185 * - Disable the DMA transfer in the peripheral register (if enabled)
lypinator 0:bb348c97df44 1186 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
lypinator 0:bb348c97df44 1187 * - Set handle State to READY
lypinator 0:bb348c97df44 1188 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
lypinator 0:bb348c97df44 1189 * @retval HAL status
lypinator 0:bb348c97df44 1190 */
lypinator 0:bb348c97df44 1191 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1192 {
lypinator 0:bb348c97df44 1193 /* Disable TXEIE and TCIE interrupts */
lypinator 0:bb348c97df44 1194 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
lypinator 0:bb348c97df44 1195
lypinator 0:bb348c97df44 1196 /* Disable the UART DMA Tx request if enabled */
lypinator 0:bb348c97df44 1197 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
lypinator 0:bb348c97df44 1198 {
lypinator 0:bb348c97df44 1199 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 1200
lypinator 0:bb348c97df44 1201 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
lypinator 0:bb348c97df44 1202 if(huart->hdmatx != NULL)
lypinator 0:bb348c97df44 1203 {
lypinator 0:bb348c97df44 1204 /* Set the UART DMA Abort callback to Null.
lypinator 0:bb348c97df44 1205 No call back execution at end of DMA abort procedure */
lypinator 0:bb348c97df44 1206 huart->hdmatx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 1207
lypinator 0:bb348c97df44 1208 HAL_DMA_Abort(huart->hdmatx);
lypinator 0:bb348c97df44 1209 }
lypinator 0:bb348c97df44 1210 }
lypinator 0:bb348c97df44 1211
lypinator 0:bb348c97df44 1212 /* Reset Tx transfer counter */
lypinator 0:bb348c97df44 1213 huart->TxXferCount = 0x00U;
lypinator 0:bb348c97df44 1214
lypinator 0:bb348c97df44 1215 /* Restore huart->gState to Ready */
lypinator 0:bb348c97df44 1216 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1217
lypinator 0:bb348c97df44 1218 return HAL_OK;
lypinator 0:bb348c97df44 1219 }
lypinator 0:bb348c97df44 1220
lypinator 0:bb348c97df44 1221 /**
lypinator 0:bb348c97df44 1222 * @brief Abort ongoing Receive transfer (blocking mode).
lypinator 0:bb348c97df44 1223 * @param huart UART handle.
lypinator 0:bb348c97df44 1224 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
lypinator 0:bb348c97df44 1225 * This procedure performs following operations :
lypinator 0:bb348c97df44 1226 * - Disable PPP Interrupts
lypinator 0:bb348c97df44 1227 * - Disable the DMA transfer in the peripheral register (if enabled)
lypinator 0:bb348c97df44 1228 * - Abort DMA transfer by calling HAL_DMA_Abort (in case of transfer in DMA mode)
lypinator 0:bb348c97df44 1229 * - Set handle State to READY
lypinator 0:bb348c97df44 1230 * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
lypinator 0:bb348c97df44 1231 * @retval HAL status
lypinator 0:bb348c97df44 1232 */
lypinator 0:bb348c97df44 1233 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1234 {
lypinator 0:bb348c97df44 1235 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
lypinator 0:bb348c97df44 1236 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
lypinator 0:bb348c97df44 1237 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 1238
lypinator 0:bb348c97df44 1239 /* Disable the UART DMA Rx request if enabled */
lypinator 0:bb348c97df44 1240 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
lypinator 0:bb348c97df44 1241 {
lypinator 0:bb348c97df44 1242 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 1243
lypinator 0:bb348c97df44 1244 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
lypinator 0:bb348c97df44 1245 if(huart->hdmarx != NULL)
lypinator 0:bb348c97df44 1246 {
lypinator 0:bb348c97df44 1247 /* Set the UART DMA Abort callback to Null.
lypinator 0:bb348c97df44 1248 No call back execution at end of DMA abort procedure */
lypinator 0:bb348c97df44 1249 huart->hdmarx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 1250
lypinator 0:bb348c97df44 1251 HAL_DMA_Abort(huart->hdmarx);
lypinator 0:bb348c97df44 1252 }
lypinator 0:bb348c97df44 1253 }
lypinator 0:bb348c97df44 1254
lypinator 0:bb348c97df44 1255 /* Reset Rx transfer counter */
lypinator 0:bb348c97df44 1256 huart->RxXferCount = 0x00U;
lypinator 0:bb348c97df44 1257
lypinator 0:bb348c97df44 1258 /* Restore huart->RxState to Ready */
lypinator 0:bb348c97df44 1259 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1260
lypinator 0:bb348c97df44 1261 return HAL_OK;
lypinator 0:bb348c97df44 1262 }
lypinator 0:bb348c97df44 1263
lypinator 0:bb348c97df44 1264 /**
lypinator 0:bb348c97df44 1265 * @brief Abort ongoing transfers (Interrupt mode).
lypinator 0:bb348c97df44 1266 * @param huart UART handle.
lypinator 0:bb348c97df44 1267 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
lypinator 0:bb348c97df44 1268 * This procedure performs following operations :
lypinator 0:bb348c97df44 1269 * - Disable PPP Interrupts
lypinator 0:bb348c97df44 1270 * - Disable the DMA transfer in the peripheral register (if enabled)
lypinator 0:bb348c97df44 1271 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
lypinator 0:bb348c97df44 1272 * - Set handle State to READY
lypinator 0:bb348c97df44 1273 * - At abort completion, call user abort complete callback
lypinator 0:bb348c97df44 1274 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
lypinator 0:bb348c97df44 1275 * considered as completed only when user abort complete callback is executed (not when exiting function).
lypinator 0:bb348c97df44 1276 * @retval HAL status
lypinator 0:bb348c97df44 1277 */
lypinator 0:bb348c97df44 1278 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1279 {
lypinator 0:bb348c97df44 1280 uint32_t AbortCplt = 0x01U;
lypinator 0:bb348c97df44 1281
lypinator 0:bb348c97df44 1282 /* Disable TXEIE, TCIE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
lypinator 0:bb348c97df44 1283 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE));
lypinator 0:bb348c97df44 1284 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 1285
lypinator 0:bb348c97df44 1286 /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised
lypinator 0:bb348c97df44 1287 before any call to DMA Abort functions */
lypinator 0:bb348c97df44 1288 /* DMA Tx Handle is valid */
lypinator 0:bb348c97df44 1289 if(huart->hdmatx != NULL)
lypinator 0:bb348c97df44 1290 {
lypinator 0:bb348c97df44 1291 /* Set DMA Abort Complete callback if UART DMA Tx request if enabled.
lypinator 0:bb348c97df44 1292 Otherwise, set it to NULL */
lypinator 0:bb348c97df44 1293 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
lypinator 0:bb348c97df44 1294 {
lypinator 0:bb348c97df44 1295 huart->hdmatx->XferAbortCallback = UART_DMATxAbortCallback;
lypinator 0:bb348c97df44 1296 }
lypinator 0:bb348c97df44 1297 else
lypinator 0:bb348c97df44 1298 {
lypinator 0:bb348c97df44 1299 huart->hdmatx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 1300 }
lypinator 0:bb348c97df44 1301 }
lypinator 0:bb348c97df44 1302 /* DMA Rx Handle is valid */
lypinator 0:bb348c97df44 1303 if(huart->hdmarx != NULL)
lypinator 0:bb348c97df44 1304 {
lypinator 0:bb348c97df44 1305 /* Set DMA Abort Complete callback if UART DMA Rx request if enabled.
lypinator 0:bb348c97df44 1306 Otherwise, set it to NULL */
lypinator 0:bb348c97df44 1307 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
lypinator 0:bb348c97df44 1308 {
lypinator 0:bb348c97df44 1309 huart->hdmarx->XferAbortCallback = UART_DMARxAbortCallback;
lypinator 0:bb348c97df44 1310 }
lypinator 0:bb348c97df44 1311 else
lypinator 0:bb348c97df44 1312 {
lypinator 0:bb348c97df44 1313 huart->hdmarx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 1314 }
lypinator 0:bb348c97df44 1315 }
lypinator 0:bb348c97df44 1316
lypinator 0:bb348c97df44 1317 /* Disable the UART DMA Tx request if enabled */
lypinator 0:bb348c97df44 1318 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
lypinator 0:bb348c97df44 1319 {
lypinator 0:bb348c97df44 1320 /* Disable DMA Tx at UART level */
lypinator 0:bb348c97df44 1321 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 1322
lypinator 0:bb348c97df44 1323 /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
lypinator 0:bb348c97df44 1324 if(huart->hdmatx != NULL)
lypinator 0:bb348c97df44 1325 {
lypinator 0:bb348c97df44 1326 /* UART Tx DMA Abort callback has already been initialised :
lypinator 0:bb348c97df44 1327 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
lypinator 0:bb348c97df44 1328
lypinator 0:bb348c97df44 1329 /* Abort DMA TX */
lypinator 0:bb348c97df44 1330 if(HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
lypinator 0:bb348c97df44 1331 {
lypinator 0:bb348c97df44 1332 huart->hdmatx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 1333 }
lypinator 0:bb348c97df44 1334 else
lypinator 0:bb348c97df44 1335 {
lypinator 0:bb348c97df44 1336 AbortCplt = 0x00U;
lypinator 0:bb348c97df44 1337 }
lypinator 0:bb348c97df44 1338 }
lypinator 0:bb348c97df44 1339 }
lypinator 0:bb348c97df44 1340
lypinator 0:bb348c97df44 1341 /* Disable the UART DMA Rx request if enabled */
lypinator 0:bb348c97df44 1342 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
lypinator 0:bb348c97df44 1343 {
lypinator 0:bb348c97df44 1344 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 1345
lypinator 0:bb348c97df44 1346 /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */
lypinator 0:bb348c97df44 1347 if(huart->hdmarx != NULL)
lypinator 0:bb348c97df44 1348 {
lypinator 0:bb348c97df44 1349 /* UART Rx DMA Abort callback has already been initialised :
lypinator 0:bb348c97df44 1350 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
lypinator 0:bb348c97df44 1351
lypinator 0:bb348c97df44 1352 /* Abort DMA RX */
lypinator 0:bb348c97df44 1353 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
lypinator 0:bb348c97df44 1354 {
lypinator 0:bb348c97df44 1355 huart->hdmarx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 1356 AbortCplt = 0x01U;
lypinator 0:bb348c97df44 1357 }
lypinator 0:bb348c97df44 1358 else
lypinator 0:bb348c97df44 1359 {
lypinator 0:bb348c97df44 1360 AbortCplt = 0x00U;
lypinator 0:bb348c97df44 1361 }
lypinator 0:bb348c97df44 1362 }
lypinator 0:bb348c97df44 1363 }
lypinator 0:bb348c97df44 1364
lypinator 0:bb348c97df44 1365 /* if no DMA abort complete callback execution is required => call user Abort Complete callback */
lypinator 0:bb348c97df44 1366 if(AbortCplt == 0x01U)
lypinator 0:bb348c97df44 1367 {
lypinator 0:bb348c97df44 1368 /* Reset Tx and Rx transfer counters */
lypinator 0:bb348c97df44 1369 huart->TxXferCount = 0x00U;
lypinator 0:bb348c97df44 1370 huart->RxXferCount = 0x00U;
lypinator 0:bb348c97df44 1371
lypinator 0:bb348c97df44 1372 /* Reset ErrorCode */
lypinator 0:bb348c97df44 1373 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 1374
lypinator 0:bb348c97df44 1375 /* Restore huart->gState and huart->RxState to Ready */
lypinator 0:bb348c97df44 1376 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1377 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1378
lypinator 0:bb348c97df44 1379 /* As no DMA to be aborted, call directly user Abort complete callback */
lypinator 0:bb348c97df44 1380 HAL_UART_AbortCpltCallback(huart);
lypinator 0:bb348c97df44 1381 }
lypinator 0:bb348c97df44 1382
lypinator 0:bb348c97df44 1383 return HAL_OK;
lypinator 0:bb348c97df44 1384 }
lypinator 0:bb348c97df44 1385
lypinator 0:bb348c97df44 1386 /**
lypinator 0:bb348c97df44 1387 * @brief Abort ongoing Transmit transfer (Interrupt mode).
lypinator 0:bb348c97df44 1388 * @param huart UART handle.
lypinator 0:bb348c97df44 1389 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
lypinator 0:bb348c97df44 1390 * This procedure performs following operations :
lypinator 0:bb348c97df44 1391 * - Disable PPP Interrupts
lypinator 0:bb348c97df44 1392 * - Disable the DMA transfer in the peripheral register (if enabled)
lypinator 0:bb348c97df44 1393 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
lypinator 0:bb348c97df44 1394 * - Set handle State to READY
lypinator 0:bb348c97df44 1395 * - At abort completion, call user abort complete callback
lypinator 0:bb348c97df44 1396 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
lypinator 0:bb348c97df44 1397 * considered as completed only when user abort complete callback is executed (not when exiting function).
lypinator 0:bb348c97df44 1398 * @retval HAL status
lypinator 0:bb348c97df44 1399 */
lypinator 0:bb348c97df44 1400 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1401 {
lypinator 0:bb348c97df44 1402 /* Disable TXEIE and TCIE interrupts */
lypinator 0:bb348c97df44 1403 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
lypinator 0:bb348c97df44 1404
lypinator 0:bb348c97df44 1405 /* Disable the UART DMA Tx request if enabled */
lypinator 0:bb348c97df44 1406 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT))
lypinator 0:bb348c97df44 1407 {
lypinator 0:bb348c97df44 1408 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 1409
lypinator 0:bb348c97df44 1410 /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */
lypinator 0:bb348c97df44 1411 if(huart->hdmatx != NULL)
lypinator 0:bb348c97df44 1412 {
lypinator 0:bb348c97df44 1413 /* Set the UART DMA Abort callback :
lypinator 0:bb348c97df44 1414 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
lypinator 0:bb348c97df44 1415 huart->hdmatx->XferAbortCallback = UART_DMATxOnlyAbortCallback;
lypinator 0:bb348c97df44 1416
lypinator 0:bb348c97df44 1417 /* Abort DMA TX */
lypinator 0:bb348c97df44 1418 if(HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
lypinator 0:bb348c97df44 1419 {
lypinator 0:bb348c97df44 1420 /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
lypinator 0:bb348c97df44 1421 huart->hdmatx->XferAbortCallback(huart->hdmatx);
lypinator 0:bb348c97df44 1422 }
lypinator 0:bb348c97df44 1423 }
lypinator 0:bb348c97df44 1424 else
lypinator 0:bb348c97df44 1425 {
lypinator 0:bb348c97df44 1426 /* Reset Tx transfer counter */
lypinator 0:bb348c97df44 1427 huart->TxXferCount = 0x00U;
lypinator 0:bb348c97df44 1428
lypinator 0:bb348c97df44 1429 /* Restore huart->gState to Ready */
lypinator 0:bb348c97df44 1430 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1431
lypinator 0:bb348c97df44 1432 /* As no DMA to be aborted, call directly user Abort complete callback */
lypinator 0:bb348c97df44 1433 HAL_UART_AbortTransmitCpltCallback(huart);
lypinator 0:bb348c97df44 1434 }
lypinator 0:bb348c97df44 1435 }
lypinator 0:bb348c97df44 1436 else
lypinator 0:bb348c97df44 1437 {
lypinator 0:bb348c97df44 1438 /* Reset Tx transfer counter */
lypinator 0:bb348c97df44 1439 huart->TxXferCount = 0x00U;
lypinator 0:bb348c97df44 1440
lypinator 0:bb348c97df44 1441 /* Restore huart->gState to Ready */
lypinator 0:bb348c97df44 1442 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1443
lypinator 0:bb348c97df44 1444 /* As no DMA to be aborted, call directly user Abort complete callback */
lypinator 0:bb348c97df44 1445 HAL_UART_AbortTransmitCpltCallback(huart);
lypinator 0:bb348c97df44 1446 }
lypinator 0:bb348c97df44 1447
lypinator 0:bb348c97df44 1448 return HAL_OK;
lypinator 0:bb348c97df44 1449 }
lypinator 0:bb348c97df44 1450
lypinator 0:bb348c97df44 1451 /**
lypinator 0:bb348c97df44 1452 * @brief Abort ongoing Receive transfer (Interrupt mode).
lypinator 0:bb348c97df44 1453 * @param huart UART handle.
lypinator 0:bb348c97df44 1454 * @note This procedure could be used for aborting any ongoing transfer started in Interrupt or DMA mode.
lypinator 0:bb348c97df44 1455 * This procedure performs following operations :
lypinator 0:bb348c97df44 1456 * - Disable PPP Interrupts
lypinator 0:bb348c97df44 1457 * - Disable the DMA transfer in the peripheral register (if enabled)
lypinator 0:bb348c97df44 1458 * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
lypinator 0:bb348c97df44 1459 * - Set handle State to READY
lypinator 0:bb348c97df44 1460 * - At abort completion, call user abort complete callback
lypinator 0:bb348c97df44 1461 * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
lypinator 0:bb348c97df44 1462 * considered as completed only when user abort complete callback is executed (not when exiting function).
lypinator 0:bb348c97df44 1463 * @retval HAL status
lypinator 0:bb348c97df44 1464 */
lypinator 0:bb348c97df44 1465 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1466 {
lypinator 0:bb348c97df44 1467 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
lypinator 0:bb348c97df44 1468 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
lypinator 0:bb348c97df44 1469 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 1470
lypinator 0:bb348c97df44 1471 /* Disable the UART DMA Rx request if enabled */
lypinator 0:bb348c97df44 1472 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
lypinator 0:bb348c97df44 1473 {
lypinator 0:bb348c97df44 1474 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 1475
lypinator 0:bb348c97df44 1476 /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
lypinator 0:bb348c97df44 1477 if(huart->hdmarx != NULL)
lypinator 0:bb348c97df44 1478 {
lypinator 0:bb348c97df44 1479 /* Set the UART DMA Abort callback :
lypinator 0:bb348c97df44 1480 will lead to call HAL_UART_AbortCpltCallback() at end of DMA abort procedure */
lypinator 0:bb348c97df44 1481 huart->hdmarx->XferAbortCallback = UART_DMARxOnlyAbortCallback;
lypinator 0:bb348c97df44 1482
lypinator 0:bb348c97df44 1483 /* Abort DMA RX */
lypinator 0:bb348c97df44 1484 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
lypinator 0:bb348c97df44 1485 {
lypinator 0:bb348c97df44 1486 /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
lypinator 0:bb348c97df44 1487 huart->hdmarx->XferAbortCallback(huart->hdmarx);
lypinator 0:bb348c97df44 1488 }
lypinator 0:bb348c97df44 1489 }
lypinator 0:bb348c97df44 1490 else
lypinator 0:bb348c97df44 1491 {
lypinator 0:bb348c97df44 1492 /* Reset Rx transfer counter */
lypinator 0:bb348c97df44 1493 huart->RxXferCount = 0x00U;
lypinator 0:bb348c97df44 1494
lypinator 0:bb348c97df44 1495 /* Restore huart->RxState to Ready */
lypinator 0:bb348c97df44 1496 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1497
lypinator 0:bb348c97df44 1498 /* As no DMA to be aborted, call directly user Abort complete callback */
lypinator 0:bb348c97df44 1499 HAL_UART_AbortReceiveCpltCallback(huart);
lypinator 0:bb348c97df44 1500 }
lypinator 0:bb348c97df44 1501 }
lypinator 0:bb348c97df44 1502 else
lypinator 0:bb348c97df44 1503 {
lypinator 0:bb348c97df44 1504 /* Reset Rx transfer counter */
lypinator 0:bb348c97df44 1505 huart->RxXferCount = 0x00U;
lypinator 0:bb348c97df44 1506
lypinator 0:bb348c97df44 1507 /* Restore huart->RxState to Ready */
lypinator 0:bb348c97df44 1508 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1509
lypinator 0:bb348c97df44 1510 /* As no DMA to be aborted, call directly user Abort complete callback */
lypinator 0:bb348c97df44 1511 HAL_UART_AbortReceiveCpltCallback(huart);
lypinator 0:bb348c97df44 1512 }
lypinator 0:bb348c97df44 1513
lypinator 0:bb348c97df44 1514 return HAL_OK;
lypinator 0:bb348c97df44 1515 }
lypinator 0:bb348c97df44 1516
lypinator 0:bb348c97df44 1517 /**
lypinator 0:bb348c97df44 1518 * @brief This function handles UART interrupt request.
lypinator 0:bb348c97df44 1519 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1520 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1521 * @retval None
lypinator 0:bb348c97df44 1522 */
lypinator 0:bb348c97df44 1523 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1524 {
lypinator 0:bb348c97df44 1525 uint32_t isrflags = READ_REG(huart->Instance->SR);
lypinator 0:bb348c97df44 1526 uint32_t cr1its = READ_REG(huart->Instance->CR1);
lypinator 0:bb348c97df44 1527 uint32_t cr3its = READ_REG(huart->Instance->CR3);
lypinator 0:bb348c97df44 1528 uint32_t errorflags = 0x00U;
lypinator 0:bb348c97df44 1529 uint32_t dmarequest = 0x00U;
lypinator 0:bb348c97df44 1530
lypinator 0:bb348c97df44 1531 /* If no error occurs */
lypinator 0:bb348c97df44 1532 errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE));
lypinator 0:bb348c97df44 1533 if(errorflags == RESET)
lypinator 0:bb348c97df44 1534 {
lypinator 0:bb348c97df44 1535 /* UART in mode Receiver -------------------------------------------------*/
lypinator 0:bb348c97df44 1536 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
lypinator 0:bb348c97df44 1537 {
lypinator 0:bb348c97df44 1538 UART_Receive_IT(huart);
lypinator 0:bb348c97df44 1539 return;
lypinator 0:bb348c97df44 1540 }
lypinator 0:bb348c97df44 1541 }
lypinator 0:bb348c97df44 1542
lypinator 0:bb348c97df44 1543 /* If some errors occur */
lypinator 0:bb348c97df44 1544 if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
lypinator 0:bb348c97df44 1545 {
lypinator 0:bb348c97df44 1546 /* UART parity error interrupt occurred ----------------------------------*/
lypinator 0:bb348c97df44 1547 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
lypinator 0:bb348c97df44 1548 {
lypinator 0:bb348c97df44 1549 huart->ErrorCode |= HAL_UART_ERROR_PE;
lypinator 0:bb348c97df44 1550 }
lypinator 0:bb348c97df44 1551
lypinator 0:bb348c97df44 1552 /* UART noise error interrupt occurred -----------------------------------*/
lypinator 0:bb348c97df44 1553 if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
lypinator 0:bb348c97df44 1554 {
lypinator 0:bb348c97df44 1555 huart->ErrorCode |= HAL_UART_ERROR_NE;
lypinator 0:bb348c97df44 1556 }
lypinator 0:bb348c97df44 1557
lypinator 0:bb348c97df44 1558 /* UART frame error interrupt occurred -----------------------------------*/
lypinator 0:bb348c97df44 1559 if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
lypinator 0:bb348c97df44 1560 {
lypinator 0:bb348c97df44 1561 huart->ErrorCode |= HAL_UART_ERROR_FE;
lypinator 0:bb348c97df44 1562 }
lypinator 0:bb348c97df44 1563
lypinator 0:bb348c97df44 1564 /* UART Over-Run interrupt occurred --------------------------------------*/
lypinator 0:bb348c97df44 1565 if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
lypinator 0:bb348c97df44 1566 {
lypinator 0:bb348c97df44 1567 huart->ErrorCode |= HAL_UART_ERROR_ORE;
lypinator 0:bb348c97df44 1568 }
lypinator 0:bb348c97df44 1569
lypinator 0:bb348c97df44 1570 /* Call UART Error Call back function if need be --------------------------*/
lypinator 0:bb348c97df44 1571 if(huart->ErrorCode != HAL_UART_ERROR_NONE)
lypinator 0:bb348c97df44 1572 {
lypinator 0:bb348c97df44 1573 /* UART in mode Receiver -----------------------------------------------*/
lypinator 0:bb348c97df44 1574 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
lypinator 0:bb348c97df44 1575 {
lypinator 0:bb348c97df44 1576 UART_Receive_IT(huart);
lypinator 0:bb348c97df44 1577 }
lypinator 0:bb348c97df44 1578
lypinator 0:bb348c97df44 1579 /* If Overrun error occurs, or if any error occurs in DMA mode reception,
lypinator 0:bb348c97df44 1580 consider error as blocking */
lypinator 0:bb348c97df44 1581 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 1582 if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) || dmarequest)
lypinator 0:bb348c97df44 1583 {
lypinator 0:bb348c97df44 1584 /* Blocking error : transfer is aborted
lypinator 0:bb348c97df44 1585 Set the UART state ready to be able to start again the process,
lypinator 0:bb348c97df44 1586 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
lypinator 0:bb348c97df44 1587 UART_EndRxTransfer(huart);
lypinator 0:bb348c97df44 1588
lypinator 0:bb348c97df44 1589 /* Disable the UART DMA Rx request if enabled */
lypinator 0:bb348c97df44 1590 if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
lypinator 0:bb348c97df44 1591 {
lypinator 0:bb348c97df44 1592 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 1593
lypinator 0:bb348c97df44 1594 /* Abort the UART DMA Rx channel */
lypinator 0:bb348c97df44 1595 if(huart->hdmarx != NULL)
lypinator 0:bb348c97df44 1596 {
lypinator 0:bb348c97df44 1597 /* Set the UART DMA Abort callback :
lypinator 0:bb348c97df44 1598 will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
lypinator 0:bb348c97df44 1599 huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
lypinator 0:bb348c97df44 1600 if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
lypinator 0:bb348c97df44 1601 {
lypinator 0:bb348c97df44 1602 /* Call Directly XferAbortCallback function in case of error */
lypinator 0:bb348c97df44 1603 huart->hdmarx->XferAbortCallback(huart->hdmarx);
lypinator 0:bb348c97df44 1604 }
lypinator 0:bb348c97df44 1605 }
lypinator 0:bb348c97df44 1606 else
lypinator 0:bb348c97df44 1607 {
lypinator 0:bb348c97df44 1608 /* Call user error callback */
lypinator 0:bb348c97df44 1609 HAL_UART_ErrorCallback(huart);
lypinator 0:bb348c97df44 1610 }
lypinator 0:bb348c97df44 1611 }
lypinator 0:bb348c97df44 1612 else
lypinator 0:bb348c97df44 1613 {
lypinator 0:bb348c97df44 1614 /* Call user error callback */
lypinator 0:bb348c97df44 1615 HAL_UART_ErrorCallback(huart);
lypinator 0:bb348c97df44 1616 }
lypinator 0:bb348c97df44 1617 }
lypinator 0:bb348c97df44 1618 else
lypinator 0:bb348c97df44 1619 {
lypinator 0:bb348c97df44 1620 /* Non Blocking error : transfer could go on.
lypinator 0:bb348c97df44 1621 Error is notified to user through user error callback */
lypinator 0:bb348c97df44 1622 HAL_UART_ErrorCallback(huart);
lypinator 0:bb348c97df44 1623 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 1624 }
lypinator 0:bb348c97df44 1625 }
lypinator 0:bb348c97df44 1626 return;
lypinator 0:bb348c97df44 1627 } /* End if some error occurs */
lypinator 0:bb348c97df44 1628
lypinator 0:bb348c97df44 1629 /* UART in mode Transmitter ------------------------------------------------*/
lypinator 0:bb348c97df44 1630 if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
lypinator 0:bb348c97df44 1631 {
lypinator 0:bb348c97df44 1632 UART_Transmit_IT(huart);
lypinator 0:bb348c97df44 1633 return;
lypinator 0:bb348c97df44 1634 }
lypinator 0:bb348c97df44 1635
lypinator 0:bb348c97df44 1636 /* UART in mode Transmitter end --------------------------------------------*/
lypinator 0:bb348c97df44 1637 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
lypinator 0:bb348c97df44 1638 {
lypinator 0:bb348c97df44 1639 UART_EndTransmit_IT(huart);
lypinator 0:bb348c97df44 1640 return;
lypinator 0:bb348c97df44 1641 }
lypinator 0:bb348c97df44 1642 }
lypinator 0:bb348c97df44 1643
lypinator 0:bb348c97df44 1644 /**
lypinator 0:bb348c97df44 1645 * @brief Tx Transfer completed callbacks.
lypinator 0:bb348c97df44 1646 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1647 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1648 * @retval None
lypinator 0:bb348c97df44 1649 */
lypinator 0:bb348c97df44 1650 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1651 {
lypinator 0:bb348c97df44 1652 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 1653 UNUSED(huart);
lypinator 0:bb348c97df44 1654 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 1655 the HAL_UART_TxCpltCallback could be implemented in the user file
lypinator 0:bb348c97df44 1656 */
lypinator 0:bb348c97df44 1657 }
lypinator 0:bb348c97df44 1658
lypinator 0:bb348c97df44 1659 /**
lypinator 0:bb348c97df44 1660 * @brief Tx Half Transfer completed callbacks.
lypinator 0:bb348c97df44 1661 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1662 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1663 * @retval None
lypinator 0:bb348c97df44 1664 */
lypinator 0:bb348c97df44 1665 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1666 {
lypinator 0:bb348c97df44 1667 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 1668 UNUSED(huart);
lypinator 0:bb348c97df44 1669 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 1670 the HAL_UART_TxCpltCallback could be implemented in the user file
lypinator 0:bb348c97df44 1671 */
lypinator 0:bb348c97df44 1672 }
lypinator 0:bb348c97df44 1673
lypinator 0:bb348c97df44 1674 /**
lypinator 0:bb348c97df44 1675 * @brief Rx Transfer completed callbacks.
lypinator 0:bb348c97df44 1676 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1677 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1678 * @retval None
lypinator 0:bb348c97df44 1679 */
lypinator 0:bb348c97df44 1680 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1681 {
lypinator 0:bb348c97df44 1682 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 1683 UNUSED(huart);
lypinator 0:bb348c97df44 1684 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 1685 the HAL_UART_TxCpltCallback could be implemented in the user file
lypinator 0:bb348c97df44 1686 */
lypinator 0:bb348c97df44 1687 }
lypinator 0:bb348c97df44 1688
lypinator 0:bb348c97df44 1689 /**
lypinator 0:bb348c97df44 1690 * @brief Rx Half Transfer completed callbacks.
lypinator 0:bb348c97df44 1691 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1692 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1693 * @retval None
lypinator 0:bb348c97df44 1694 */
lypinator 0:bb348c97df44 1695 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1696 {
lypinator 0:bb348c97df44 1697 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 1698 UNUSED(huart);
lypinator 0:bb348c97df44 1699 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 1700 the HAL_UART_TxCpltCallback could be implemented in the user file
lypinator 0:bb348c97df44 1701 */
lypinator 0:bb348c97df44 1702 }
lypinator 0:bb348c97df44 1703
lypinator 0:bb348c97df44 1704 /**
lypinator 0:bb348c97df44 1705 * @brief UART error callbacks.
lypinator 0:bb348c97df44 1706 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1707 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1708 * @retval None
lypinator 0:bb348c97df44 1709 */
lypinator 0:bb348c97df44 1710 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1711 {
lypinator 0:bb348c97df44 1712 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 1713 UNUSED(huart);
lypinator 0:bb348c97df44 1714 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 1715 the HAL_UART_ErrorCallback could be implemented in the user file
lypinator 0:bb348c97df44 1716 */
lypinator 0:bb348c97df44 1717 }
lypinator 0:bb348c97df44 1718
lypinator 0:bb348c97df44 1719 /**
lypinator 0:bb348c97df44 1720 * @brief UART Abort Complete callback.
lypinator 0:bb348c97df44 1721 * @param huart UART handle.
lypinator 0:bb348c97df44 1722 * @retval None
lypinator 0:bb348c97df44 1723 */
lypinator 0:bb348c97df44 1724 __weak void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1725 {
lypinator 0:bb348c97df44 1726 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 1727 UNUSED(huart);
lypinator 0:bb348c97df44 1728
lypinator 0:bb348c97df44 1729 /* NOTE : This function should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 1730 the HAL_UART_AbortCpltCallback can be implemented in the user file.
lypinator 0:bb348c97df44 1731 */
lypinator 0:bb348c97df44 1732 }
lypinator 0:bb348c97df44 1733 /**
lypinator 0:bb348c97df44 1734 * @brief UART Abort Complete callback.
lypinator 0:bb348c97df44 1735 * @param huart UART handle.
lypinator 0:bb348c97df44 1736 * @retval None
lypinator 0:bb348c97df44 1737 */
lypinator 0:bb348c97df44 1738 __weak void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1739 {
lypinator 0:bb348c97df44 1740 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 1741 UNUSED(huart);
lypinator 0:bb348c97df44 1742
lypinator 0:bb348c97df44 1743 /* NOTE : This function should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 1744 the HAL_UART_AbortTransmitCpltCallback can be implemented in the user file.
lypinator 0:bb348c97df44 1745 */
lypinator 0:bb348c97df44 1746 }
lypinator 0:bb348c97df44 1747
lypinator 0:bb348c97df44 1748 /**
lypinator 0:bb348c97df44 1749 * @brief UART Abort Receive Complete callback.
lypinator 0:bb348c97df44 1750 * @param huart UART handle.
lypinator 0:bb348c97df44 1751 * @retval None
lypinator 0:bb348c97df44 1752 */
lypinator 0:bb348c97df44 1753 __weak void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1754 {
lypinator 0:bb348c97df44 1755 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 1756 UNUSED(huart);
lypinator 0:bb348c97df44 1757
lypinator 0:bb348c97df44 1758 /* NOTE : This function should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 1759 the HAL_UART_AbortReceiveCpltCallback can be implemented in the user file.
lypinator 0:bb348c97df44 1760 */
lypinator 0:bb348c97df44 1761 }
lypinator 0:bb348c97df44 1762
lypinator 0:bb348c97df44 1763 /**
lypinator 0:bb348c97df44 1764 * @}
lypinator 0:bb348c97df44 1765 */
lypinator 0:bb348c97df44 1766
lypinator 0:bb348c97df44 1767 /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
lypinator 0:bb348c97df44 1768 * @brief UART control functions
lypinator 0:bb348c97df44 1769 *
lypinator 0:bb348c97df44 1770 @verbatim
lypinator 0:bb348c97df44 1771 ==============================================================================
lypinator 0:bb348c97df44 1772 ##### Peripheral Control functions #####
lypinator 0:bb348c97df44 1773 ==============================================================================
lypinator 0:bb348c97df44 1774 [..]
lypinator 0:bb348c97df44 1775 This subsection provides a set of functions allowing to control the UART:
lypinator 0:bb348c97df44 1776 (+) HAL_LIN_SendBreak() API can be helpful to transmit the break character.
lypinator 0:bb348c97df44 1777 (+) HAL_MultiProcessor_EnterMuteMode() API can be helpful to enter the UART in mute mode.
lypinator 0:bb348c97df44 1778 (+) HAL_MultiProcessor_ExitMuteMode() API can be helpful to exit the UART mute mode by software.
lypinator 0:bb348c97df44 1779
lypinator 0:bb348c97df44 1780 @endverbatim
lypinator 0:bb348c97df44 1781 * @{
lypinator 0:bb348c97df44 1782 */
lypinator 0:bb348c97df44 1783
lypinator 0:bb348c97df44 1784 /**
lypinator 0:bb348c97df44 1785 * @brief Transmits break characters.
lypinator 0:bb348c97df44 1786 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1787 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1788 * @retval HAL status
lypinator 0:bb348c97df44 1789 */
lypinator 0:bb348c97df44 1790 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1791 {
lypinator 0:bb348c97df44 1792 /* Check the parameters */
lypinator 0:bb348c97df44 1793 assert_param(IS_UART_INSTANCE(huart->Instance));
lypinator 0:bb348c97df44 1794
lypinator 0:bb348c97df44 1795 /* Process Locked */
lypinator 0:bb348c97df44 1796 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 1797
lypinator 0:bb348c97df44 1798 huart->gState = HAL_UART_STATE_BUSY;
lypinator 0:bb348c97df44 1799
lypinator 0:bb348c97df44 1800 /* Send break characters */
lypinator 0:bb348c97df44 1801 SET_BIT(huart->Instance->CR1, USART_CR1_SBK);
lypinator 0:bb348c97df44 1802
lypinator 0:bb348c97df44 1803 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1804
lypinator 0:bb348c97df44 1805 /* Process Unlocked */
lypinator 0:bb348c97df44 1806 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 1807
lypinator 0:bb348c97df44 1808 return HAL_OK;
lypinator 0:bb348c97df44 1809 }
lypinator 0:bb348c97df44 1810
lypinator 0:bb348c97df44 1811 /**
lypinator 0:bb348c97df44 1812 * @brief Enters the UART in mute mode.
lypinator 0:bb348c97df44 1813 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1814 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1815 * @retval HAL status
lypinator 0:bb348c97df44 1816 */
lypinator 0:bb348c97df44 1817 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1818 {
lypinator 0:bb348c97df44 1819 /* Check the parameters */
lypinator 0:bb348c97df44 1820 assert_param(IS_UART_INSTANCE(huart->Instance));
lypinator 0:bb348c97df44 1821
lypinator 0:bb348c97df44 1822 /* Process Locked */
lypinator 0:bb348c97df44 1823 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 1824
lypinator 0:bb348c97df44 1825 huart->gState = HAL_UART_STATE_BUSY;
lypinator 0:bb348c97df44 1826
lypinator 0:bb348c97df44 1827 /* Enable the USART mute mode by setting the RWU bit in the CR1 register */
lypinator 0:bb348c97df44 1828 SET_BIT(huart->Instance->CR1, USART_CR1_RWU);
lypinator 0:bb348c97df44 1829
lypinator 0:bb348c97df44 1830 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1831
lypinator 0:bb348c97df44 1832 /* Process Unlocked */
lypinator 0:bb348c97df44 1833 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 1834
lypinator 0:bb348c97df44 1835 return HAL_OK;
lypinator 0:bb348c97df44 1836 }
lypinator 0:bb348c97df44 1837
lypinator 0:bb348c97df44 1838 /**
lypinator 0:bb348c97df44 1839 * @brief Exits the UART mute mode: wake up software.
lypinator 0:bb348c97df44 1840 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1841 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1842 * @retval HAL status
lypinator 0:bb348c97df44 1843 */
lypinator 0:bb348c97df44 1844 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1845 {
lypinator 0:bb348c97df44 1846 /* Check the parameters */
lypinator 0:bb348c97df44 1847 assert_param(IS_UART_INSTANCE(huart->Instance));
lypinator 0:bb348c97df44 1848
lypinator 0:bb348c97df44 1849 /* Process Locked */
lypinator 0:bb348c97df44 1850 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 1851
lypinator 0:bb348c97df44 1852 huart->gState = HAL_UART_STATE_BUSY;
lypinator 0:bb348c97df44 1853
lypinator 0:bb348c97df44 1854 /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
lypinator 0:bb348c97df44 1855 CLEAR_BIT(huart->Instance->CR1, USART_CR1_RWU);
lypinator 0:bb348c97df44 1856
lypinator 0:bb348c97df44 1857 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1858
lypinator 0:bb348c97df44 1859 /* Process Unlocked */
lypinator 0:bb348c97df44 1860 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 1861
lypinator 0:bb348c97df44 1862 return HAL_OK;
lypinator 0:bb348c97df44 1863 }
lypinator 0:bb348c97df44 1864
lypinator 0:bb348c97df44 1865 /**
lypinator 0:bb348c97df44 1866 * @brief Enables the UART transmitter and disables the UART receiver.
lypinator 0:bb348c97df44 1867 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1868 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1869 * @retval HAL status
lypinator 0:bb348c97df44 1870 */
lypinator 0:bb348c97df44 1871 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1872 {
lypinator 0:bb348c97df44 1873 uint32_t tmpreg = 0x00U;
lypinator 0:bb348c97df44 1874
lypinator 0:bb348c97df44 1875 /* Process Locked */
lypinator 0:bb348c97df44 1876 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 1877
lypinator 0:bb348c97df44 1878 huart->gState = HAL_UART_STATE_BUSY;
lypinator 0:bb348c97df44 1879
lypinator 0:bb348c97df44 1880 /*-------------------------- USART CR1 Configuration -----------------------*/
lypinator 0:bb348c97df44 1881 tmpreg = huart->Instance->CR1;
lypinator 0:bb348c97df44 1882
lypinator 0:bb348c97df44 1883 /* Clear TE and RE bits */
lypinator 0:bb348c97df44 1884 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
lypinator 0:bb348c97df44 1885
lypinator 0:bb348c97df44 1886 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
lypinator 0:bb348c97df44 1887 tmpreg |= (uint32_t)USART_CR1_TE;
lypinator 0:bb348c97df44 1888
lypinator 0:bb348c97df44 1889 /* Write to USART CR1 */
lypinator 0:bb348c97df44 1890 WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
lypinator 0:bb348c97df44 1891
lypinator 0:bb348c97df44 1892 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1893
lypinator 0:bb348c97df44 1894 /* Process Unlocked */
lypinator 0:bb348c97df44 1895 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 1896
lypinator 0:bb348c97df44 1897 return HAL_OK;
lypinator 0:bb348c97df44 1898 }
lypinator 0:bb348c97df44 1899
lypinator 0:bb348c97df44 1900 /**
lypinator 0:bb348c97df44 1901 * @brief Enables the UART receiver and disables the UART transmitter.
lypinator 0:bb348c97df44 1902 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1903 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1904 * @retval HAL status
lypinator 0:bb348c97df44 1905 */
lypinator 0:bb348c97df44 1906 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1907 {
lypinator 0:bb348c97df44 1908 uint32_t tmpreg = 0x00U;
lypinator 0:bb348c97df44 1909
lypinator 0:bb348c97df44 1910 /* Process Locked */
lypinator 0:bb348c97df44 1911 __HAL_LOCK(huart);
lypinator 0:bb348c97df44 1912
lypinator 0:bb348c97df44 1913 huart->gState = HAL_UART_STATE_BUSY;
lypinator 0:bb348c97df44 1914
lypinator 0:bb348c97df44 1915 /*-------------------------- USART CR1 Configuration -----------------------*/
lypinator 0:bb348c97df44 1916 tmpreg = huart->Instance->CR1;
lypinator 0:bb348c97df44 1917
lypinator 0:bb348c97df44 1918 /* Clear TE and RE bits */
lypinator 0:bb348c97df44 1919 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE | USART_CR1_RE));
lypinator 0:bb348c97df44 1920
lypinator 0:bb348c97df44 1921 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
lypinator 0:bb348c97df44 1922 tmpreg |= (uint32_t)USART_CR1_RE;
lypinator 0:bb348c97df44 1923
lypinator 0:bb348c97df44 1924 /* Write to USART CR1 */
lypinator 0:bb348c97df44 1925 WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
lypinator 0:bb348c97df44 1926
lypinator 0:bb348c97df44 1927 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 1928
lypinator 0:bb348c97df44 1929 /* Process Unlocked */
lypinator 0:bb348c97df44 1930 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 1931
lypinator 0:bb348c97df44 1932 return HAL_OK;
lypinator 0:bb348c97df44 1933 }
lypinator 0:bb348c97df44 1934
lypinator 0:bb348c97df44 1935 /**
lypinator 0:bb348c97df44 1936 * @}
lypinator 0:bb348c97df44 1937 */
lypinator 0:bb348c97df44 1938
lypinator 0:bb348c97df44 1939 /** @defgroup UART_Exported_Functions_Group4 Peripheral State and Errors functions
lypinator 0:bb348c97df44 1940 * @brief UART State and Errors functions
lypinator 0:bb348c97df44 1941 *
lypinator 0:bb348c97df44 1942 @verbatim
lypinator 0:bb348c97df44 1943 ==============================================================================
lypinator 0:bb348c97df44 1944 ##### Peripheral State and Errors functions #####
lypinator 0:bb348c97df44 1945 ==============================================================================
lypinator 0:bb348c97df44 1946 [..]
lypinator 0:bb348c97df44 1947 This subsection provides a set of functions allowing to return the State of
lypinator 0:bb348c97df44 1948 UART communication process, return Peripheral Errors occurred during communication
lypinator 0:bb348c97df44 1949 process
lypinator 0:bb348c97df44 1950 (+) HAL_UART_GetState() API can be helpful to check in run-time the state of the UART peripheral.
lypinator 0:bb348c97df44 1951 (+) HAL_UART_GetError() check in run-time errors that could be occurred during communication.
lypinator 0:bb348c97df44 1952
lypinator 0:bb348c97df44 1953 @endverbatim
lypinator 0:bb348c97df44 1954 * @{
lypinator 0:bb348c97df44 1955 */
lypinator 0:bb348c97df44 1956
lypinator 0:bb348c97df44 1957 /**
lypinator 0:bb348c97df44 1958 * @brief Returns the UART state.
lypinator 0:bb348c97df44 1959 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1960 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 1961 * @retval HAL state
lypinator 0:bb348c97df44 1962 */
lypinator 0:bb348c97df44 1963 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1964 {
lypinator 0:bb348c97df44 1965 uint32_t temp1= 0x00U, temp2 = 0x00U;
lypinator 0:bb348c97df44 1966 temp1 = huart->gState;
lypinator 0:bb348c97df44 1967 temp2 = huart->RxState;
lypinator 0:bb348c97df44 1968
lypinator 0:bb348c97df44 1969 return (HAL_UART_StateTypeDef)(temp1 | temp2);
lypinator 0:bb348c97df44 1970 }
lypinator 0:bb348c97df44 1971
lypinator 0:bb348c97df44 1972 /**
lypinator 0:bb348c97df44 1973 * @brief Return the UART error code
lypinator 0:bb348c97df44 1974 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1975 * the configuration information for the specified UART.
lypinator 0:bb348c97df44 1976 * @retval UART Error Code
lypinator 0:bb348c97df44 1977 */
lypinator 0:bb348c97df44 1978 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 1979 {
lypinator 0:bb348c97df44 1980 return huart->ErrorCode;
lypinator 0:bb348c97df44 1981 }
lypinator 0:bb348c97df44 1982
lypinator 0:bb348c97df44 1983 /**
lypinator 0:bb348c97df44 1984 * @}
lypinator 0:bb348c97df44 1985 */
lypinator 0:bb348c97df44 1986
lypinator 0:bb348c97df44 1987 /**
lypinator 0:bb348c97df44 1988 * @brief DMA UART transmit process complete callback.
lypinator 0:bb348c97df44 1989 * @param hdma DMA handle
lypinator 0:bb348c97df44 1990 * @retval None
lypinator 0:bb348c97df44 1991 */
lypinator 0:bb348c97df44 1992 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 1993 {
lypinator 0:bb348c97df44 1994 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator 0:bb348c97df44 1995 /* DMA Normal mode*/
lypinator 0:bb348c97df44 1996 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
lypinator 0:bb348c97df44 1997 {
lypinator 0:bb348c97df44 1998 huart->TxXferCount = 0U;
lypinator 0:bb348c97df44 1999
lypinator 0:bb348c97df44 2000 /* Disable the DMA transfer for transmit request by setting the DMAT bit
lypinator 0:bb348c97df44 2001 in the UART CR3 register */
lypinator 0:bb348c97df44 2002 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 2003
lypinator 0:bb348c97df44 2004 /* Enable the UART Transmit Complete Interrupt */
lypinator 0:bb348c97df44 2005 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
lypinator 0:bb348c97df44 2006
lypinator 0:bb348c97df44 2007 }
lypinator 0:bb348c97df44 2008 /* DMA Circular mode */
lypinator 0:bb348c97df44 2009 else
lypinator 0:bb348c97df44 2010 {
lypinator 0:bb348c97df44 2011 HAL_UART_TxCpltCallback(huart);
lypinator 0:bb348c97df44 2012 }
lypinator 0:bb348c97df44 2013 }
lypinator 0:bb348c97df44 2014
lypinator 0:bb348c97df44 2015 /**
lypinator 0:bb348c97df44 2016 * @brief DMA UART transmit process half complete callback
lypinator 0:bb348c97df44 2017 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2018 * the configuration information for the specified DMA module.
lypinator 0:bb348c97df44 2019 * @retval None
lypinator 0:bb348c97df44 2020 */
lypinator 0:bb348c97df44 2021 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 2022 {
lypinator 0:bb348c97df44 2023 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
lypinator 0:bb348c97df44 2024
lypinator 0:bb348c97df44 2025 HAL_UART_TxHalfCpltCallback(huart);
lypinator 0:bb348c97df44 2026 }
lypinator 0:bb348c97df44 2027
lypinator 0:bb348c97df44 2028 /**
lypinator 0:bb348c97df44 2029 * @brief DMA UART receive process complete callback.
lypinator 0:bb348c97df44 2030 * @param hdma DMA handle
lypinator 0:bb348c97df44 2031 * @retval None
lypinator 0:bb348c97df44 2032 */
lypinator 0:bb348c97df44 2033 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 2034 {
lypinator 0:bb348c97df44 2035 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator 0:bb348c97df44 2036 /* DMA Normal mode*/
lypinator 0:bb348c97df44 2037 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
lypinator 0:bb348c97df44 2038 {
lypinator 0:bb348c97df44 2039 huart->RxXferCount = 0U;
lypinator 0:bb348c97df44 2040
lypinator 0:bb348c97df44 2041 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
lypinator 0:bb348c97df44 2042 CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
lypinator 0:bb348c97df44 2043 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 2044
lypinator 0:bb348c97df44 2045 /* Disable the DMA transfer for the receiver request by setting the DMAR bit
lypinator 0:bb348c97df44 2046 in the UART CR3 register */
lypinator 0:bb348c97df44 2047 CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 2048
lypinator 0:bb348c97df44 2049 /* At end of Rx process, restore huart->RxState to Ready */
lypinator 0:bb348c97df44 2050 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2051 }
lypinator 0:bb348c97df44 2052 HAL_UART_RxCpltCallback(huart);
lypinator 0:bb348c97df44 2053 }
lypinator 0:bb348c97df44 2054
lypinator 0:bb348c97df44 2055 /**
lypinator 0:bb348c97df44 2056 * @brief DMA UART receive process half complete callback
lypinator 0:bb348c97df44 2057 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2058 * the configuration information for the specified DMA module.
lypinator 0:bb348c97df44 2059 * @retval None
lypinator 0:bb348c97df44 2060 */
lypinator 0:bb348c97df44 2061 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 2062 {
lypinator 0:bb348c97df44 2063 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
lypinator 0:bb348c97df44 2064
lypinator 0:bb348c97df44 2065 HAL_UART_RxHalfCpltCallback(huart);
lypinator 0:bb348c97df44 2066 }
lypinator 0:bb348c97df44 2067
lypinator 0:bb348c97df44 2068 /**
lypinator 0:bb348c97df44 2069 * @brief DMA UART communication error callback.
lypinator 0:bb348c97df44 2070 * @param hdma DMA handle
lypinator 0:bb348c97df44 2071 * @retval None
lypinator 0:bb348c97df44 2072 */
lypinator 0:bb348c97df44 2073 static void UART_DMAError(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 2074 {
lypinator 0:bb348c97df44 2075 uint32_t dmarequest = 0x00U;
lypinator 0:bb348c97df44 2076 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator 0:bb348c97df44 2077
lypinator 0:bb348c97df44 2078 /* Stop UART DMA Tx request if ongoing */
lypinator 0:bb348c97df44 2079 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
lypinator 0:bb348c97df44 2080 if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
lypinator 0:bb348c97df44 2081 {
lypinator 0:bb348c97df44 2082 huart->TxXferCount = 0U;
lypinator 0:bb348c97df44 2083 UART_EndTxTransfer(huart);
lypinator 0:bb348c97df44 2084 }
lypinator 0:bb348c97df44 2085
lypinator 0:bb348c97df44 2086 /* Stop UART DMA Rx request if ongoing */
lypinator 0:bb348c97df44 2087 dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
lypinator 0:bb348c97df44 2088 if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
lypinator 0:bb348c97df44 2089 {
lypinator 0:bb348c97df44 2090 huart->RxXferCount = 0U;
lypinator 0:bb348c97df44 2091 UART_EndRxTransfer(huart);
lypinator 0:bb348c97df44 2092 }
lypinator 0:bb348c97df44 2093
lypinator 0:bb348c97df44 2094 huart->ErrorCode |= HAL_UART_ERROR_DMA;
lypinator 0:bb348c97df44 2095 HAL_UART_ErrorCallback(huart);
lypinator 0:bb348c97df44 2096 }
lypinator 0:bb348c97df44 2097
lypinator 0:bb348c97df44 2098 /**
lypinator 0:bb348c97df44 2099 * @brief This function handles UART Communication Timeout.
lypinator 0:bb348c97df44 2100 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2101 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 2102 * @param Flag specifies the UART flag to check.
lypinator 0:bb348c97df44 2103 * @param Status The new Flag status (SET or RESET).
lypinator 0:bb348c97df44 2104 * @param Tickstart Tick start value
lypinator 0:bb348c97df44 2105 * @param Timeout Timeout duration
lypinator 0:bb348c97df44 2106 * @retval HAL status
lypinator 0:bb348c97df44 2107 */
lypinator 0:bb348c97df44 2108 static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
lypinator 0:bb348c97df44 2109 {
lypinator 0:bb348c97df44 2110 /* Wait until flag is set */
lypinator 0:bb348c97df44 2111 while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
lypinator 0:bb348c97df44 2112 {
lypinator 0:bb348c97df44 2113 /* Check for the Timeout */
lypinator 0:bb348c97df44 2114 if(Timeout != HAL_MAX_DELAY)
lypinator 0:bb348c97df44 2115 {
lypinator 0:bb348c97df44 2116 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
lypinator 0:bb348c97df44 2117 {
lypinator 0:bb348c97df44 2118 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
lypinator 0:bb348c97df44 2119 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_TXEIE));
lypinator 0:bb348c97df44 2120 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 2121
lypinator 0:bb348c97df44 2122 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2123 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2124
lypinator 0:bb348c97df44 2125 /* Process Unlocked */
lypinator 0:bb348c97df44 2126 __HAL_UNLOCK(huart);
lypinator 0:bb348c97df44 2127
lypinator 0:bb348c97df44 2128 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 2129 }
lypinator 0:bb348c97df44 2130 }
lypinator 0:bb348c97df44 2131 }
lypinator 0:bb348c97df44 2132
lypinator 0:bb348c97df44 2133 return HAL_OK;
lypinator 0:bb348c97df44 2134 }
lypinator 0:bb348c97df44 2135
lypinator 0:bb348c97df44 2136 /**
lypinator 0:bb348c97df44 2137 * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
lypinator 0:bb348c97df44 2138 * @param huart UART handle.
lypinator 0:bb348c97df44 2139 * @retval None
lypinator 0:bb348c97df44 2140 */
lypinator 0:bb348c97df44 2141 static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 2142 {
lypinator 0:bb348c97df44 2143 /* Disable TXEIE and TCIE interrupts */
lypinator 0:bb348c97df44 2144 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
lypinator 0:bb348c97df44 2145
lypinator 0:bb348c97df44 2146 /* At end of Tx process, restore huart->gState to Ready */
lypinator 0:bb348c97df44 2147 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2148 }
lypinator 0:bb348c97df44 2149
lypinator 0:bb348c97df44 2150 /**
lypinator 0:bb348c97df44 2151 * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
lypinator 0:bb348c97df44 2152 * @param huart UART handle.
lypinator 0:bb348c97df44 2153 * @retval None
lypinator 0:bb348c97df44 2154 */
lypinator 0:bb348c97df44 2155 static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 2156 {
lypinator 0:bb348c97df44 2157 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
lypinator 0:bb348c97df44 2158 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
lypinator 0:bb348c97df44 2159 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 2160
lypinator 0:bb348c97df44 2161 /* At end of Rx process, restore huart->RxState to Ready */
lypinator 0:bb348c97df44 2162 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2163 }
lypinator 0:bb348c97df44 2164
lypinator 0:bb348c97df44 2165 /**
lypinator 0:bb348c97df44 2166 * @brief DMA UART communication abort callback, when initiated by HAL services on Error
lypinator 0:bb348c97df44 2167 * (To be called at end of DMA Abort procedure following error occurrence).
lypinator 0:bb348c97df44 2168 * @param hdma DMA handle.
lypinator 0:bb348c97df44 2169 * @retval None
lypinator 0:bb348c97df44 2170 */
lypinator 0:bb348c97df44 2171 static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 2172 {
lypinator 0:bb348c97df44 2173 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator 0:bb348c97df44 2174 huart->RxXferCount = 0U;
lypinator 0:bb348c97df44 2175 huart->TxXferCount = 0U;
lypinator 0:bb348c97df44 2176
lypinator 0:bb348c97df44 2177 HAL_UART_ErrorCallback(huart);
lypinator 0:bb348c97df44 2178 }
lypinator 0:bb348c97df44 2179
lypinator 0:bb348c97df44 2180 /**
lypinator 0:bb348c97df44 2181 * @brief DMA UART Tx communication abort callback, when initiated by user
lypinator 0:bb348c97df44 2182 * (To be called at end of DMA Tx Abort procedure following user abort request).
lypinator 0:bb348c97df44 2183 * @note When this callback is executed, User Abort complete call back is called only if no
lypinator 0:bb348c97df44 2184 * Abort still ongoing for Rx DMA Handle.
lypinator 0:bb348c97df44 2185 * @param hdma DMA handle.
lypinator 0:bb348c97df44 2186 * @retval None
lypinator 0:bb348c97df44 2187 */
lypinator 0:bb348c97df44 2188 static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 2189 {
lypinator 0:bb348c97df44 2190 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator 0:bb348c97df44 2191
lypinator 0:bb348c97df44 2192 huart->hdmatx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 2193
lypinator 0:bb348c97df44 2194 /* Check if an Abort process is still ongoing */
lypinator 0:bb348c97df44 2195 if(huart->hdmarx != NULL)
lypinator 0:bb348c97df44 2196 {
lypinator 0:bb348c97df44 2197 if(huart->hdmarx->XferAbortCallback != NULL)
lypinator 0:bb348c97df44 2198 {
lypinator 0:bb348c97df44 2199 return;
lypinator 0:bb348c97df44 2200 }
lypinator 0:bb348c97df44 2201 }
lypinator 0:bb348c97df44 2202
lypinator 0:bb348c97df44 2203 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
lypinator 0:bb348c97df44 2204 huart->TxXferCount = 0x00U;
lypinator 0:bb348c97df44 2205 huart->RxXferCount = 0x00U;
lypinator 0:bb348c97df44 2206
lypinator 0:bb348c97df44 2207 /* Reset ErrorCode */
lypinator 0:bb348c97df44 2208 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 2209
lypinator 0:bb348c97df44 2210 /* Restore huart->gState and huart->RxState to Ready */
lypinator 0:bb348c97df44 2211 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2212 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2213
lypinator 0:bb348c97df44 2214 /* Call user Abort complete callback */
lypinator 0:bb348c97df44 2215 HAL_UART_AbortCpltCallback(huart);
lypinator 0:bb348c97df44 2216 }
lypinator 0:bb348c97df44 2217
lypinator 0:bb348c97df44 2218 /**
lypinator 0:bb348c97df44 2219 * @brief DMA UART Rx communication abort callback, when initiated by user
lypinator 0:bb348c97df44 2220 * (To be called at end of DMA Rx Abort procedure following user abort request).
lypinator 0:bb348c97df44 2221 * @note When this callback is executed, User Abort complete call back is called only if no
lypinator 0:bb348c97df44 2222 * Abort still ongoing for Tx DMA Handle.
lypinator 0:bb348c97df44 2223 * @param hdma DMA handle.
lypinator 0:bb348c97df44 2224 * @retval None
lypinator 0:bb348c97df44 2225 */
lypinator 0:bb348c97df44 2226 static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 2227 {
lypinator 0:bb348c97df44 2228 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator 0:bb348c97df44 2229
lypinator 0:bb348c97df44 2230 huart->hdmarx->XferAbortCallback = NULL;
lypinator 0:bb348c97df44 2231
lypinator 0:bb348c97df44 2232 /* Check if an Abort process is still ongoing */
lypinator 0:bb348c97df44 2233 if(huart->hdmatx != NULL)
lypinator 0:bb348c97df44 2234 {
lypinator 0:bb348c97df44 2235 if(huart->hdmatx->XferAbortCallback != NULL)
lypinator 0:bb348c97df44 2236 {
lypinator 0:bb348c97df44 2237 return;
lypinator 0:bb348c97df44 2238 }
lypinator 0:bb348c97df44 2239 }
lypinator 0:bb348c97df44 2240
lypinator 0:bb348c97df44 2241 /* No Abort process still ongoing : All DMA channels are aborted, call user Abort Complete callback */
lypinator 0:bb348c97df44 2242 huart->TxXferCount = 0x00U;
lypinator 0:bb348c97df44 2243 huart->RxXferCount = 0x00U;
lypinator 0:bb348c97df44 2244
lypinator 0:bb348c97df44 2245 /* Reset ErrorCode */
lypinator 0:bb348c97df44 2246 huart->ErrorCode = HAL_UART_ERROR_NONE;
lypinator 0:bb348c97df44 2247
lypinator 0:bb348c97df44 2248 /* Restore huart->gState and huart->RxState to Ready */
lypinator 0:bb348c97df44 2249 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2250 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2251
lypinator 0:bb348c97df44 2252 /* Call user Abort complete callback */
lypinator 0:bb348c97df44 2253 HAL_UART_AbortCpltCallback(huart);
lypinator 0:bb348c97df44 2254 }
lypinator 0:bb348c97df44 2255
lypinator 0:bb348c97df44 2256 /**
lypinator 0:bb348c97df44 2257 * @brief DMA UART Tx communication abort callback, when initiated by user by a call to
lypinator 0:bb348c97df44 2258 * HAL_UART_AbortTransmit_IT API (Abort only Tx transfer)
lypinator 0:bb348c97df44 2259 * (This callback is executed at end of DMA Tx Abort procedure following user abort request,
lypinator 0:bb348c97df44 2260 * and leads to user Tx Abort Complete callback execution).
lypinator 0:bb348c97df44 2261 * @param hdma DMA handle.
lypinator 0:bb348c97df44 2262 * @retval None
lypinator 0:bb348c97df44 2263 */
lypinator 0:bb348c97df44 2264 static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 2265 {
lypinator 0:bb348c97df44 2266 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator 0:bb348c97df44 2267
lypinator 0:bb348c97df44 2268 huart->TxXferCount = 0x00U;
lypinator 0:bb348c97df44 2269
lypinator 0:bb348c97df44 2270 /* Restore huart->gState to Ready */
lypinator 0:bb348c97df44 2271 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2272
lypinator 0:bb348c97df44 2273 /* Call user Abort complete callback */
lypinator 0:bb348c97df44 2274 HAL_UART_AbortTransmitCpltCallback(huart);
lypinator 0:bb348c97df44 2275 }
lypinator 0:bb348c97df44 2276
lypinator 0:bb348c97df44 2277 /**
lypinator 0:bb348c97df44 2278 * @brief DMA UART Rx communication abort callback, when initiated by user by a call to
lypinator 0:bb348c97df44 2279 * HAL_UART_AbortReceive_IT API (Abort only Rx transfer)
lypinator 0:bb348c97df44 2280 * (This callback is executed at end of DMA Rx Abort procedure following user abort request,
lypinator 0:bb348c97df44 2281 * and leads to user Rx Abort Complete callback execution).
lypinator 0:bb348c97df44 2282 * @param hdma DMA handle.
lypinator 0:bb348c97df44 2283 * @retval None
lypinator 0:bb348c97df44 2284 */
lypinator 0:bb348c97df44 2285 static void UART_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 2286 {
lypinator 0:bb348c97df44 2287 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator 0:bb348c97df44 2288
lypinator 0:bb348c97df44 2289 huart->RxXferCount = 0x00U;
lypinator 0:bb348c97df44 2290
lypinator 0:bb348c97df44 2291 /* Restore huart->RxState to Ready */
lypinator 0:bb348c97df44 2292 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2293
lypinator 0:bb348c97df44 2294 /* Call user Abort complete callback */
lypinator 0:bb348c97df44 2295 HAL_UART_AbortReceiveCpltCallback(huart);
lypinator 0:bb348c97df44 2296 }
lypinator 0:bb348c97df44 2297
lypinator 0:bb348c97df44 2298 /**
lypinator 0:bb348c97df44 2299 * @brief Sends an amount of data in non blocking mode.
lypinator 0:bb348c97df44 2300 * @param huart Pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2301 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 2302 * @retval HAL status
lypinator 0:bb348c97df44 2303 */
lypinator 0:bb348c97df44 2304 static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 2305 {
lypinator 0:bb348c97df44 2306 uint16_t* tmp;
lypinator 0:bb348c97df44 2307
lypinator 0:bb348c97df44 2308 /* Check that a Tx process is ongoing */
lypinator 0:bb348c97df44 2309 if(huart->gState == HAL_UART_STATE_BUSY_TX)
lypinator 0:bb348c97df44 2310 {
lypinator 0:bb348c97df44 2311 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
lypinator 0:bb348c97df44 2312 {
lypinator 0:bb348c97df44 2313 tmp = (uint16_t*) huart->pTxBuffPtr;
lypinator 0:bb348c97df44 2314 huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FF);
lypinator 0:bb348c97df44 2315 if(huart->Init.Parity == UART_PARITY_NONE)
lypinator 0:bb348c97df44 2316 {
lypinator 0:bb348c97df44 2317 huart->pTxBuffPtr += 2U;
lypinator 0:bb348c97df44 2318 }
lypinator 0:bb348c97df44 2319 else
lypinator 0:bb348c97df44 2320 {
lypinator 0:bb348c97df44 2321 huart->pTxBuffPtr += 1U;
lypinator 0:bb348c97df44 2322 }
lypinator 0:bb348c97df44 2323 }
lypinator 0:bb348c97df44 2324 else
lypinator 0:bb348c97df44 2325 {
lypinator 0:bb348c97df44 2326 huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FF);
lypinator 0:bb348c97df44 2327 }
lypinator 0:bb348c97df44 2328
lypinator 0:bb348c97df44 2329 if(--huart->TxXferCount == 0U)
lypinator 0:bb348c97df44 2330 {
lypinator 0:bb348c97df44 2331 /* Disable the UART Transmit Complete Interrupt */
lypinator 0:bb348c97df44 2332 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
lypinator 0:bb348c97df44 2333
lypinator 0:bb348c97df44 2334 /* Enable the UART Transmit Complete Interrupt */
lypinator 0:bb348c97df44 2335 SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
lypinator 0:bb348c97df44 2336 }
lypinator 0:bb348c97df44 2337 return HAL_OK;
lypinator 0:bb348c97df44 2338 }
lypinator 0:bb348c97df44 2339 else
lypinator 0:bb348c97df44 2340 {
lypinator 0:bb348c97df44 2341 return HAL_BUSY;
lypinator 0:bb348c97df44 2342 }
lypinator 0:bb348c97df44 2343 }
lypinator 0:bb348c97df44 2344
lypinator 0:bb348c97df44 2345 /**
lypinator 0:bb348c97df44 2346 * @brief Wraps up transmission in non blocking mode.
lypinator 0:bb348c97df44 2347 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2348 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 2349 * @retval HAL status
lypinator 0:bb348c97df44 2350 */
lypinator 0:bb348c97df44 2351 static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 2352 {
lypinator 0:bb348c97df44 2353 /* Disable the UART Transmit Complete Interrupt */
lypinator 0:bb348c97df44 2354 CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
lypinator 0:bb348c97df44 2355
lypinator 0:bb348c97df44 2356 /* Tx process is ended, restore huart->gState to Ready */
lypinator 0:bb348c97df44 2357 huart->gState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2358
lypinator 0:bb348c97df44 2359 HAL_UART_TxCpltCallback(huart);
lypinator 0:bb348c97df44 2360
lypinator 0:bb348c97df44 2361 return HAL_OK;
lypinator 0:bb348c97df44 2362 }
lypinator 0:bb348c97df44 2363
lypinator 0:bb348c97df44 2364 /**
lypinator 0:bb348c97df44 2365 * @brief Receives an amount of data in non blocking mode
lypinator 0:bb348c97df44 2366 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2367 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 2368 * @retval HAL status
lypinator 0:bb348c97df44 2369 */
lypinator 0:bb348c97df44 2370 static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 2371 {
lypinator 0:bb348c97df44 2372 uint16_t* tmp;
lypinator 0:bb348c97df44 2373
lypinator 0:bb348c97df44 2374 /* Check that a Rx process is ongoing */
lypinator 0:bb348c97df44 2375 if(huart->RxState == HAL_UART_STATE_BUSY_RX)
lypinator 0:bb348c97df44 2376 {
lypinator 0:bb348c97df44 2377 if(huart->Init.WordLength == UART_WORDLENGTH_9B)
lypinator 0:bb348c97df44 2378 {
lypinator 0:bb348c97df44 2379 tmp = (uint16_t*) huart->pRxBuffPtr;
lypinator 0:bb348c97df44 2380 if(huart->Init.Parity == UART_PARITY_NONE)
lypinator 0:bb348c97df44 2381 {
lypinator 0:bb348c97df44 2382 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FF);
lypinator 0:bb348c97df44 2383 huart->pRxBuffPtr += 2U;
lypinator 0:bb348c97df44 2384 }
lypinator 0:bb348c97df44 2385 else
lypinator 0:bb348c97df44 2386 {
lypinator 0:bb348c97df44 2387 *tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FF);
lypinator 0:bb348c97df44 2388 huart->pRxBuffPtr += 1U;
lypinator 0:bb348c97df44 2389 }
lypinator 0:bb348c97df44 2390 }
lypinator 0:bb348c97df44 2391 else
lypinator 0:bb348c97df44 2392 {
lypinator 0:bb348c97df44 2393 if(huart->Init.Parity == UART_PARITY_NONE)
lypinator 0:bb348c97df44 2394 {
lypinator 0:bb348c97df44 2395 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FF);
lypinator 0:bb348c97df44 2396 }
lypinator 0:bb348c97df44 2397 else
lypinator 0:bb348c97df44 2398 {
lypinator 0:bb348c97df44 2399 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007F);
lypinator 0:bb348c97df44 2400 }
lypinator 0:bb348c97df44 2401 }
lypinator 0:bb348c97df44 2402
lypinator 0:bb348c97df44 2403 if(--huart->RxXferCount == 0U)
lypinator 0:bb348c97df44 2404 {
lypinator 0:bb348c97df44 2405 /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
lypinator 0:bb348c97df44 2406 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
lypinator 0:bb348c97df44 2407
lypinator 0:bb348c97df44 2408 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
lypinator 0:bb348c97df44 2409 CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
lypinator 0:bb348c97df44 2410
lypinator 0:bb348c97df44 2411 /* Rx process is completed, restore huart->RxState to Ready */
lypinator 0:bb348c97df44 2412 huart->RxState = HAL_UART_STATE_READY;
lypinator 0:bb348c97df44 2413
lypinator 0:bb348c97df44 2414 HAL_UART_RxCpltCallback(huart);
lypinator 0:bb348c97df44 2415
lypinator 0:bb348c97df44 2416 return HAL_OK;
lypinator 0:bb348c97df44 2417 }
lypinator 0:bb348c97df44 2418 return HAL_OK;
lypinator 0:bb348c97df44 2419 }
lypinator 0:bb348c97df44 2420 else
lypinator 0:bb348c97df44 2421 {
lypinator 0:bb348c97df44 2422 return HAL_BUSY;
lypinator 0:bb348c97df44 2423 }
lypinator 0:bb348c97df44 2424 }
lypinator 0:bb348c97df44 2425
lypinator 0:bb348c97df44 2426 /**
lypinator 0:bb348c97df44 2427 * @brief Configures the UART peripheral.
lypinator 0:bb348c97df44 2428 * @param huart pointer to a UART_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2429 * the configuration information for the specified UART module.
lypinator 0:bb348c97df44 2430 * @retval None
lypinator 0:bb348c97df44 2431 */
lypinator 0:bb348c97df44 2432 static void UART_SetConfig(UART_HandleTypeDef *huart)
lypinator 0:bb348c97df44 2433 {
lypinator 0:bb348c97df44 2434 uint32_t tmpreg = 0x00U;
lypinator 0:bb348c97df44 2435
lypinator 0:bb348c97df44 2436 /* Check the parameters */
lypinator 0:bb348c97df44 2437 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
lypinator 0:bb348c97df44 2438 assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
lypinator 0:bb348c97df44 2439 assert_param(IS_UART_PARITY(huart->Init.Parity));
lypinator 0:bb348c97df44 2440 assert_param(IS_UART_MODE(huart->Init.Mode));
lypinator 0:bb348c97df44 2441
lypinator 0:bb348c97df44 2442 /*-------------------------- USART CR2 Configuration -----------------------*/
lypinator 0:bb348c97df44 2443 tmpreg = huart->Instance->CR2;
lypinator 0:bb348c97df44 2444
lypinator 0:bb348c97df44 2445 /* Clear STOP[13:12] bits */
lypinator 0:bb348c97df44 2446 tmpreg &= (uint32_t)~((uint32_t)USART_CR2_STOP);
lypinator 0:bb348c97df44 2447
lypinator 0:bb348c97df44 2448 /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */
lypinator 0:bb348c97df44 2449 tmpreg |= (uint32_t)huart->Init.StopBits;
lypinator 0:bb348c97df44 2450
lypinator 0:bb348c97df44 2451 /* Write to USART CR2 */
lypinator 0:bb348c97df44 2452 WRITE_REG(huart->Instance->CR2, (uint32_t)tmpreg);
lypinator 0:bb348c97df44 2453
lypinator 0:bb348c97df44 2454 /*-------------------------- USART CR1 Configuration -----------------------*/
lypinator 0:bb348c97df44 2455 tmpreg = huart->Instance->CR1;
lypinator 0:bb348c97df44 2456
lypinator 0:bb348c97df44 2457 /* Clear M, PCE, PS, TE and RE bits */
lypinator 0:bb348c97df44 2458 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | \
lypinator 0:bb348c97df44 2459 USART_CR1_RE | USART_CR1_OVER8));
lypinator 0:bb348c97df44 2460
lypinator 0:bb348c97df44 2461 /* Configure the UART Word Length, Parity and mode:
lypinator 0:bb348c97df44 2462 Set the M bits according to huart->Init.WordLength value
lypinator 0:bb348c97df44 2463 Set PCE and PS bits according to huart->Init.Parity value
lypinator 0:bb348c97df44 2464 Set TE and RE bits according to huart->Init.Mode value
lypinator 0:bb348c97df44 2465 Set OVER8 bit according to huart->Init.OverSampling value */
lypinator 0:bb348c97df44 2466 tmpreg |= (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
lypinator 0:bb348c97df44 2467
lypinator 0:bb348c97df44 2468 /* Write to USART CR1 */
lypinator 0:bb348c97df44 2469 WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
lypinator 0:bb348c97df44 2470
lypinator 0:bb348c97df44 2471 /*-------------------------- USART CR3 Configuration -----------------------*/
lypinator 0:bb348c97df44 2472 tmpreg = huart->Instance->CR3;
lypinator 0:bb348c97df44 2473
lypinator 0:bb348c97df44 2474 /* Clear CTSE and RTSE bits */
lypinator 0:bb348c97df44 2475 tmpreg &= (uint32_t)~((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE));
lypinator 0:bb348c97df44 2476
lypinator 0:bb348c97df44 2477 /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
lypinator 0:bb348c97df44 2478 tmpreg |= huart->Init.HwFlowCtl;
lypinator 0:bb348c97df44 2479
lypinator 0:bb348c97df44 2480 /* Write to USART CR3 */
lypinator 0:bb348c97df44 2481 WRITE_REG(huart->Instance->CR3, (uint32_t)tmpreg);
lypinator 0:bb348c97df44 2482
lypinator 0:bb348c97df44 2483 /* Check the Over Sampling */
lypinator 0:bb348c97df44 2484 if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
lypinator 0:bb348c97df44 2485 {
lypinator 0:bb348c97df44 2486 /*-------------------------- USART BRR Configuration ---------------------*/
lypinator 0:bb348c97df44 2487 #if defined(USART6)
lypinator 0:bb348c97df44 2488 if((huart->Instance == USART1) || (huart->Instance == USART6))
lypinator 0:bb348c97df44 2489 {
lypinator 0:bb348c97df44 2490 huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
lypinator 0:bb348c97df44 2491 }
lypinator 0:bb348c97df44 2492 #else
lypinator 0:bb348c97df44 2493 if(huart->Instance == USART1)
lypinator 0:bb348c97df44 2494 {
lypinator 0:bb348c97df44 2495 huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
lypinator 0:bb348c97df44 2496 }
lypinator 0:bb348c97df44 2497 #endif /* USART6 */
lypinator 0:bb348c97df44 2498 else
lypinator 0:bb348c97df44 2499 {
lypinator 0:bb348c97df44 2500 huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
lypinator 0:bb348c97df44 2501 }
lypinator 0:bb348c97df44 2502 }
lypinator 0:bb348c97df44 2503 else
lypinator 0:bb348c97df44 2504 {
lypinator 0:bb348c97df44 2505 /*-------------------------- USART BRR Configuration ---------------------*/
lypinator 0:bb348c97df44 2506 #if defined(USART6)
lypinator 0:bb348c97df44 2507 if((huart->Instance == USART1) || (huart->Instance == USART6))
lypinator 0:bb348c97df44 2508 {
lypinator 0:bb348c97df44 2509 huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
lypinator 0:bb348c97df44 2510 }
lypinator 0:bb348c97df44 2511 #else
lypinator 0:bb348c97df44 2512 if(huart->Instance == USART1)
lypinator 0:bb348c97df44 2513 {
lypinator 0:bb348c97df44 2514 huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
lypinator 0:bb348c97df44 2515 }
lypinator 0:bb348c97df44 2516 #endif /* USART6 */
lypinator 0:bb348c97df44 2517 else
lypinator 0:bb348c97df44 2518 {
lypinator 0:bb348c97df44 2519 huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
lypinator 0:bb348c97df44 2520 }
lypinator 0:bb348c97df44 2521 }
lypinator 0:bb348c97df44 2522 }
lypinator 0:bb348c97df44 2523
lypinator 0:bb348c97df44 2524 /**
lypinator 0:bb348c97df44 2525 * @}
lypinator 0:bb348c97df44 2526 */
lypinator 0:bb348c97df44 2527
lypinator 0:bb348c97df44 2528 #endif /* HAL_UART_MODULE_ENABLED */
lypinator 0:bb348c97df44 2529 /**
lypinator 0:bb348c97df44 2530 * @}
lypinator 0:bb348c97df44 2531 */
lypinator 0:bb348c97df44 2532
lypinator 0:bb348c97df44 2533 /**
lypinator 0:bb348c97df44 2534 * @}
lypinator 0:bb348c97df44 2535 */
lypinator 0:bb348c97df44 2536
lypinator 0:bb348c97df44 2537 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/