Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_sram.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_sram.c
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief SRAM HAL module driver.
lypinator 0:bb348c97df44 6 * This file provides a generic firmware to drive SRAM memories
lypinator 0:bb348c97df44 7 * mounted as external device.
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 @verbatim
lypinator 0:bb348c97df44 10 ==============================================================================
lypinator 0:bb348c97df44 11 ##### How to use this driver #####
lypinator 0:bb348c97df44 12 ==============================================================================
lypinator 0:bb348c97df44 13 [..]
lypinator 0:bb348c97df44 14 This driver is a generic layered driver which contains a set of APIs used to
lypinator 0:bb348c97df44 15 control SRAM memories. It uses the FMC layer functions to interface
lypinator 0:bb348c97df44 16 with SRAM devices.
lypinator 0:bb348c97df44 17 The following sequence should be followed to configure the FMC/FSMC to interface
lypinator 0:bb348c97df44 18 with SRAM/PSRAM memories:
lypinator 0:bb348c97df44 19
lypinator 0:bb348c97df44 20 (#) Declare a SRAM_HandleTypeDef handle structure, for example:
lypinator 0:bb348c97df44 21 SRAM_HandleTypeDef hsram; and:
lypinator 0:bb348c97df44 22
lypinator 0:bb348c97df44 23 (++) Fill the SRAM_HandleTypeDef handle "Init" field with the allowed
lypinator 0:bb348c97df44 24 values of the structure member.
lypinator 0:bb348c97df44 25
lypinator 0:bb348c97df44 26 (++) Fill the SRAM_HandleTypeDef handle "Instance" field with a predefined
lypinator 0:bb348c97df44 27 base register instance for NOR or SRAM device
lypinator 0:bb348c97df44 28
lypinator 0:bb348c97df44 29 (++) Fill the SRAM_HandleTypeDef handle "Extended" field with a predefined
lypinator 0:bb348c97df44 30 base register instance for NOR or SRAM extended mode
lypinator 0:bb348c97df44 31
lypinator 0:bb348c97df44 32 (#) Declare two FMC_NORSRAM_TimingTypeDef structures, for both normal and extended
lypinator 0:bb348c97df44 33 mode timings; for example:
lypinator 0:bb348c97df44 34 FMC_NORSRAM_TimingTypeDef Timing and FMC_NORSRAM_TimingTypeDef ExTiming;
lypinator 0:bb348c97df44 35 and fill its fields with the allowed values of the structure member.
lypinator 0:bb348c97df44 36
lypinator 0:bb348c97df44 37 (#) Initialize the SRAM Controller by calling the function HAL_SRAM_Init(). This function
lypinator 0:bb348c97df44 38 performs the following sequence:
lypinator 0:bb348c97df44 39
lypinator 0:bb348c97df44 40 (##) MSP hardware layer configuration using the function HAL_SRAM_MspInit()
lypinator 0:bb348c97df44 41 (##) Control register configuration using the FMC NORSRAM interface function
lypinator 0:bb348c97df44 42 FMC_NORSRAM_Init()
lypinator 0:bb348c97df44 43 (##) Timing register configuration using the FMC NORSRAM interface function
lypinator 0:bb348c97df44 44 FMC_NORSRAM_Timing_Init()
lypinator 0:bb348c97df44 45 (##) Extended mode Timing register configuration using the FMC NORSRAM interface function
lypinator 0:bb348c97df44 46 FMC_NORSRAM_Extended_Timing_Init()
lypinator 0:bb348c97df44 47 (##) Enable the SRAM device using the macro __FMC_NORSRAM_ENABLE()
lypinator 0:bb348c97df44 48
lypinator 0:bb348c97df44 49 (#) At this stage you can perform read/write accesses from/to the memory connected
lypinator 0:bb348c97df44 50 to the NOR/SRAM Bank. You can perform either polling or DMA transfer using the
lypinator 0:bb348c97df44 51 following APIs:
lypinator 0:bb348c97df44 52 (++) HAL_SRAM_Read()/HAL_SRAM_Write() for polling read/write access
lypinator 0:bb348c97df44 53 (++) HAL_SRAM_Read_DMA()/HAL_SRAM_Write_DMA() for DMA read/write transfer
lypinator 0:bb348c97df44 54
lypinator 0:bb348c97df44 55 (#) You can also control the SRAM device by calling the control APIs HAL_SRAM_WriteOperation_Enable()/
lypinator 0:bb348c97df44 56 HAL_SRAM_WriteOperation_Disable() to respectively enable/disable the SRAM write operation
lypinator 0:bb348c97df44 57
lypinator 0:bb348c97df44 58 (#) You can continuously monitor the SRAM device HAL state by calling the function
lypinator 0:bb348c97df44 59 HAL_SRAM_GetState()
lypinator 0:bb348c97df44 60
lypinator 0:bb348c97df44 61 @endverbatim
lypinator 0:bb348c97df44 62 ******************************************************************************
lypinator 0:bb348c97df44 63 * @attention
lypinator 0:bb348c97df44 64 *
lypinator 0:bb348c97df44 65 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 66 *
lypinator 0:bb348c97df44 67 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 68 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 69 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 70 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 71 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 72 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 73 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 74 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 75 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 76 * without specific prior written permission.
lypinator 0:bb348c97df44 77 *
lypinator 0:bb348c97df44 78 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 79 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 80 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 81 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 82 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 83 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 84 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 85 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 86 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 87 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 88 *
lypinator 0:bb348c97df44 89 ******************************************************************************
lypinator 0:bb348c97df44 90 */
lypinator 0:bb348c97df44 91
lypinator 0:bb348c97df44 92 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 93 #include "stm32f4xx_hal.h"
lypinator 0:bb348c97df44 94
lypinator 0:bb348c97df44 95 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 96 * @{
lypinator 0:bb348c97df44 97 */
lypinator 0:bb348c97df44 98
lypinator 0:bb348c97df44 99 /** @defgroup SRAM SRAM
lypinator 0:bb348c97df44 100 * @brief SRAM driver modules
lypinator 0:bb348c97df44 101 * @{
lypinator 0:bb348c97df44 102 */
lypinator 0:bb348c97df44 103 #ifdef HAL_SRAM_MODULE_ENABLED
lypinator 0:bb348c97df44 104
lypinator 0:bb348c97df44 105 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
lypinator 0:bb348c97df44 106 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
lypinator 0:bb348c97df44 107 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
lypinator 0:bb348c97df44 108 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
lypinator 0:bb348c97df44 109
lypinator 0:bb348c97df44 110 /* Private typedef -----------------------------------------------------------*/
lypinator 0:bb348c97df44 111 /* Private define ------------------------------------------------------------*/
lypinator 0:bb348c97df44 112 /* Private macro -------------------------------------------------------------*/
lypinator 0:bb348c97df44 113 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 114 /* Private functions ---------------------------------------------------------*/
lypinator 0:bb348c97df44 115
lypinator 0:bb348c97df44 116 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 117 /** @defgroup SRAM_Exported_Functions SRAM Exported Functions
lypinator 0:bb348c97df44 118 * @{
lypinator 0:bb348c97df44 119 */
lypinator 0:bb348c97df44 120 /** @defgroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
lypinator 0:bb348c97df44 121 * @brief Initialization and Configuration functions
lypinator 0:bb348c97df44 122 *
lypinator 0:bb348c97df44 123 @verbatim
lypinator 0:bb348c97df44 124 ==============================================================================
lypinator 0:bb348c97df44 125 ##### SRAM Initialization and de_initialization functions #####
lypinator 0:bb348c97df44 126 ==============================================================================
lypinator 0:bb348c97df44 127 [..] This section provides functions allowing to initialize/de-initialize
lypinator 0:bb348c97df44 128 the SRAM memory
lypinator 0:bb348c97df44 129
lypinator 0:bb348c97df44 130 @endverbatim
lypinator 0:bb348c97df44 131 * @{
lypinator 0:bb348c97df44 132 */
lypinator 0:bb348c97df44 133
lypinator 0:bb348c97df44 134 /**
lypinator 0:bb348c97df44 135 * @brief Performs the SRAM device initialization sequence
lypinator 0:bb348c97df44 136 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 137 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 138 * @param Timing Pointer to SRAM control timing structure
lypinator 0:bb348c97df44 139 * @param ExtTiming Pointer to SRAM extended mode timing structure
lypinator 0:bb348c97df44 140 * @retval HAL status
lypinator 0:bb348c97df44 141 */
lypinator 0:bb348c97df44 142 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
lypinator 0:bb348c97df44 143 {
lypinator 0:bb348c97df44 144 /* Check the SRAM handle parameter */
lypinator 0:bb348c97df44 145 if(hsram == NULL)
lypinator 0:bb348c97df44 146 {
lypinator 0:bb348c97df44 147 return HAL_ERROR;
lypinator 0:bb348c97df44 148 }
lypinator 0:bb348c97df44 149
lypinator 0:bb348c97df44 150 if(hsram->State == HAL_SRAM_STATE_RESET)
lypinator 0:bb348c97df44 151 {
lypinator 0:bb348c97df44 152 /* Allocate lock resource and initialize it */
lypinator 0:bb348c97df44 153 hsram->Lock = HAL_UNLOCKED;
lypinator 0:bb348c97df44 154 /* Initialize the low level hardware (MSP) */
lypinator 0:bb348c97df44 155 HAL_SRAM_MspInit(hsram);
lypinator 0:bb348c97df44 156 }
lypinator 0:bb348c97df44 157
lypinator 0:bb348c97df44 158 /* Initialize SRAM control Interface */
lypinator 0:bb348c97df44 159 FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init));
lypinator 0:bb348c97df44 160
lypinator 0:bb348c97df44 161 /* Initialize SRAM timing Interface */
lypinator 0:bb348c97df44 162 FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank);
lypinator 0:bb348c97df44 163
lypinator 0:bb348c97df44 164 /* Initialize SRAM extended mode timing Interface */
lypinator 0:bb348c97df44 165 FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, hsram->Init.ExtendedMode);
lypinator 0:bb348c97df44 166
lypinator 0:bb348c97df44 167 /* Enable the NORSRAM device */
lypinator 0:bb348c97df44 168 __FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank);
lypinator 0:bb348c97df44 169
lypinator 0:bb348c97df44 170 return HAL_OK;
lypinator 0:bb348c97df44 171 }
lypinator 0:bb348c97df44 172
lypinator 0:bb348c97df44 173 /**
lypinator 0:bb348c97df44 174 * @brief Performs the SRAM device De-initialization sequence.
lypinator 0:bb348c97df44 175 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 176 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 177 * @retval HAL status
lypinator 0:bb348c97df44 178 */
lypinator 0:bb348c97df44 179 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram)
lypinator 0:bb348c97df44 180 {
lypinator 0:bb348c97df44 181 /* De-Initialize the low level hardware (MSP) */
lypinator 0:bb348c97df44 182 HAL_SRAM_MspDeInit(hsram);
lypinator 0:bb348c97df44 183
lypinator 0:bb348c97df44 184 /* Configure the SRAM registers with their reset values */
lypinator 0:bb348c97df44 185 FMC_NORSRAM_DeInit(hsram->Instance, hsram->Extended, hsram->Init.NSBank);
lypinator 0:bb348c97df44 186
lypinator 0:bb348c97df44 187 hsram->State = HAL_SRAM_STATE_RESET;
lypinator 0:bb348c97df44 188
lypinator 0:bb348c97df44 189 /* Release Lock */
lypinator 0:bb348c97df44 190 __HAL_UNLOCK(hsram);
lypinator 0:bb348c97df44 191
lypinator 0:bb348c97df44 192 return HAL_OK;
lypinator 0:bb348c97df44 193 }
lypinator 0:bb348c97df44 194
lypinator 0:bb348c97df44 195 /**
lypinator 0:bb348c97df44 196 * @brief SRAM MSP Init.
lypinator 0:bb348c97df44 197 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 198 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 199 * @retval None
lypinator 0:bb348c97df44 200 */
lypinator 0:bb348c97df44 201 __weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram)
lypinator 0:bb348c97df44 202 {
lypinator 0:bb348c97df44 203 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 204 UNUSED(hsram);
lypinator 0:bb348c97df44 205 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 206 the HAL_SRAM_MspInit could be implemented in the user file
lypinator 0:bb348c97df44 207 */
lypinator 0:bb348c97df44 208 }
lypinator 0:bb348c97df44 209
lypinator 0:bb348c97df44 210 /**
lypinator 0:bb348c97df44 211 * @brief SRAM MSP DeInit.
lypinator 0:bb348c97df44 212 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 213 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 214 * @retval None
lypinator 0:bb348c97df44 215 */
lypinator 0:bb348c97df44 216 __weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram)
lypinator 0:bb348c97df44 217 {
lypinator 0:bb348c97df44 218 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 219 UNUSED(hsram);
lypinator 0:bb348c97df44 220 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 221 the HAL_SRAM_MspDeInit could be implemented in the user file
lypinator 0:bb348c97df44 222 */
lypinator 0:bb348c97df44 223 }
lypinator 0:bb348c97df44 224
lypinator 0:bb348c97df44 225 /**
lypinator 0:bb348c97df44 226 * @brief DMA transfer complete callback.
lypinator 0:bb348c97df44 227 * @param hdma pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 228 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 229 * @retval None
lypinator 0:bb348c97df44 230 */
lypinator 0:bb348c97df44 231 __weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 232 {
lypinator 0:bb348c97df44 233 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 234 UNUSED(hdma);
lypinator 0:bb348c97df44 235 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 236 the HAL_SRAM_DMA_XferCpltCallback could be implemented in the user file
lypinator 0:bb348c97df44 237 */
lypinator 0:bb348c97df44 238 }
lypinator 0:bb348c97df44 239
lypinator 0:bb348c97df44 240 /**
lypinator 0:bb348c97df44 241 * @brief DMA transfer complete error callback.
lypinator 0:bb348c97df44 242 * @param hdma pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 243 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 244 * @retval None
lypinator 0:bb348c97df44 245 */
lypinator 0:bb348c97df44 246 __weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 247 {
lypinator 0:bb348c97df44 248 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 249 UNUSED(hdma);
lypinator 0:bb348c97df44 250 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 251 the HAL_SRAM_DMA_XferErrorCallback could be implemented in the user file
lypinator 0:bb348c97df44 252 */
lypinator 0:bb348c97df44 253 }
lypinator 0:bb348c97df44 254
lypinator 0:bb348c97df44 255 /**
lypinator 0:bb348c97df44 256 * @}
lypinator 0:bb348c97df44 257 */
lypinator 0:bb348c97df44 258
lypinator 0:bb348c97df44 259 /** @defgroup SRAM_Exported_Functions_Group2 Input and Output functions
lypinator 0:bb348c97df44 260 * @brief Input Output and memory control functions
lypinator 0:bb348c97df44 261 *
lypinator 0:bb348c97df44 262 @verbatim
lypinator 0:bb348c97df44 263 ==============================================================================
lypinator 0:bb348c97df44 264 ##### SRAM Input and Output functions #####
lypinator 0:bb348c97df44 265 ==============================================================================
lypinator 0:bb348c97df44 266 [..]
lypinator 0:bb348c97df44 267 This section provides functions allowing to use and control the SRAM memory
lypinator 0:bb348c97df44 268
lypinator 0:bb348c97df44 269 @endverbatim
lypinator 0:bb348c97df44 270 * @{
lypinator 0:bb348c97df44 271 */
lypinator 0:bb348c97df44 272
lypinator 0:bb348c97df44 273 /**
lypinator 0:bb348c97df44 274 * @brief Reads 8-bit buffer from SRAM memory.
lypinator 0:bb348c97df44 275 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 276 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 277 * @param pAddress Pointer to read start address
lypinator 0:bb348c97df44 278 * @param pDstBuffer Pointer to destination buffer
lypinator 0:bb348c97df44 279 * @param BufferSize Size of the buffer to read from memory
lypinator 0:bb348c97df44 280 * @retval HAL status
lypinator 0:bb348c97df44 281 */
lypinator 0:bb348c97df44 282 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 283 {
lypinator 0:bb348c97df44 284 __IO uint8_t * pSramAddress = (uint8_t *)pAddress;
lypinator 0:bb348c97df44 285
lypinator 0:bb348c97df44 286 /* Process Locked */
lypinator 0:bb348c97df44 287 __HAL_LOCK(hsram);
lypinator 0:bb348c97df44 288
lypinator 0:bb348c97df44 289 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 290 hsram->State = HAL_SRAM_STATE_BUSY;
lypinator 0:bb348c97df44 291
lypinator 0:bb348c97df44 292 /* Read data from memory */
lypinator 0:bb348c97df44 293 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 294 {
lypinator 0:bb348c97df44 295 *pDstBuffer = *(__IO uint8_t *)pSramAddress;
lypinator 0:bb348c97df44 296 pDstBuffer++;
lypinator 0:bb348c97df44 297 pSramAddress++;
lypinator 0:bb348c97df44 298 }
lypinator 0:bb348c97df44 299
lypinator 0:bb348c97df44 300 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 301 hsram->State = HAL_SRAM_STATE_READY;
lypinator 0:bb348c97df44 302
lypinator 0:bb348c97df44 303 /* Process unlocked */
lypinator 0:bb348c97df44 304 __HAL_UNLOCK(hsram);
lypinator 0:bb348c97df44 305
lypinator 0:bb348c97df44 306 return HAL_OK;
lypinator 0:bb348c97df44 307 }
lypinator 0:bb348c97df44 308
lypinator 0:bb348c97df44 309 /**
lypinator 0:bb348c97df44 310 * @brief Writes 8-bit buffer to SRAM memory.
lypinator 0:bb348c97df44 311 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 312 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 313 * @param pAddress Pointer to write start address
lypinator 0:bb348c97df44 314 * @param pSrcBuffer Pointer to source buffer to write
lypinator 0:bb348c97df44 315 * @param BufferSize Size of the buffer to write to memory
lypinator 0:bb348c97df44 316 * @retval HAL status
lypinator 0:bb348c97df44 317 */
lypinator 0:bb348c97df44 318 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 319 {
lypinator 0:bb348c97df44 320 __IO uint8_t * pSramAddress = (uint8_t *)pAddress;
lypinator 0:bb348c97df44 321
lypinator 0:bb348c97df44 322 /* Check the SRAM controller state */
lypinator 0:bb348c97df44 323 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
lypinator 0:bb348c97df44 324 {
lypinator 0:bb348c97df44 325 return HAL_ERROR;
lypinator 0:bb348c97df44 326 }
lypinator 0:bb348c97df44 327
lypinator 0:bb348c97df44 328 /* Process Locked */
lypinator 0:bb348c97df44 329 __HAL_LOCK(hsram);
lypinator 0:bb348c97df44 330
lypinator 0:bb348c97df44 331 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 332 hsram->State = HAL_SRAM_STATE_BUSY;
lypinator 0:bb348c97df44 333
lypinator 0:bb348c97df44 334 /* Write data to memory */
lypinator 0:bb348c97df44 335 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 336 {
lypinator 0:bb348c97df44 337 *(__IO uint8_t *)pSramAddress = *pSrcBuffer;
lypinator 0:bb348c97df44 338 pSrcBuffer++;
lypinator 0:bb348c97df44 339 pSramAddress++;
lypinator 0:bb348c97df44 340 }
lypinator 0:bb348c97df44 341
lypinator 0:bb348c97df44 342 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 343 hsram->State = HAL_SRAM_STATE_READY;
lypinator 0:bb348c97df44 344
lypinator 0:bb348c97df44 345 /* Process unlocked */
lypinator 0:bb348c97df44 346 __HAL_UNLOCK(hsram);
lypinator 0:bb348c97df44 347
lypinator 0:bb348c97df44 348 return HAL_OK;
lypinator 0:bb348c97df44 349 }
lypinator 0:bb348c97df44 350
lypinator 0:bb348c97df44 351 /**
lypinator 0:bb348c97df44 352 * @brief Reads 16-bit buffer from SRAM memory.
lypinator 0:bb348c97df44 353 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 354 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 355 * @param pAddress Pointer to read start address
lypinator 0:bb348c97df44 356 * @param pDstBuffer Pointer to destination buffer
lypinator 0:bb348c97df44 357 * @param BufferSize Size of the buffer to read from memory
lypinator 0:bb348c97df44 358 * @retval HAL status
lypinator 0:bb348c97df44 359 */
lypinator 0:bb348c97df44 360 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 361 {
lypinator 0:bb348c97df44 362 __IO uint16_t * pSramAddress = (uint16_t *)pAddress;
lypinator 0:bb348c97df44 363
lypinator 0:bb348c97df44 364 /* Process Locked */
lypinator 0:bb348c97df44 365 __HAL_LOCK(hsram);
lypinator 0:bb348c97df44 366
lypinator 0:bb348c97df44 367 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 368 hsram->State = HAL_SRAM_STATE_BUSY;
lypinator 0:bb348c97df44 369
lypinator 0:bb348c97df44 370 /* Read data from memory */
lypinator 0:bb348c97df44 371 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 372 {
lypinator 0:bb348c97df44 373 *pDstBuffer = *(__IO uint16_t *)pSramAddress;
lypinator 0:bb348c97df44 374 pDstBuffer++;
lypinator 0:bb348c97df44 375 pSramAddress++;
lypinator 0:bb348c97df44 376 }
lypinator 0:bb348c97df44 377
lypinator 0:bb348c97df44 378 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 379 hsram->State = HAL_SRAM_STATE_READY;
lypinator 0:bb348c97df44 380
lypinator 0:bb348c97df44 381 /* Process unlocked */
lypinator 0:bb348c97df44 382 __HAL_UNLOCK(hsram);
lypinator 0:bb348c97df44 383
lypinator 0:bb348c97df44 384 return HAL_OK;
lypinator 0:bb348c97df44 385 }
lypinator 0:bb348c97df44 386
lypinator 0:bb348c97df44 387 /**
lypinator 0:bb348c97df44 388 * @brief Writes 16-bit buffer to SRAM memory.
lypinator 0:bb348c97df44 389 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 390 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 391 * @param pAddress Pointer to write start address
lypinator 0:bb348c97df44 392 * @param pSrcBuffer Pointer to source buffer to write
lypinator 0:bb348c97df44 393 * @param BufferSize Size of the buffer to write to memory
lypinator 0:bb348c97df44 394 * @retval HAL status
lypinator 0:bb348c97df44 395 */
lypinator 0:bb348c97df44 396 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 397 {
lypinator 0:bb348c97df44 398 __IO uint16_t * pSramAddress = (uint16_t *)pAddress;
lypinator 0:bb348c97df44 399
lypinator 0:bb348c97df44 400 /* Check the SRAM controller state */
lypinator 0:bb348c97df44 401 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
lypinator 0:bb348c97df44 402 {
lypinator 0:bb348c97df44 403 return HAL_ERROR;
lypinator 0:bb348c97df44 404 }
lypinator 0:bb348c97df44 405
lypinator 0:bb348c97df44 406 /* Process Locked */
lypinator 0:bb348c97df44 407 __HAL_LOCK(hsram);
lypinator 0:bb348c97df44 408
lypinator 0:bb348c97df44 409 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 410 hsram->State = HAL_SRAM_STATE_BUSY;
lypinator 0:bb348c97df44 411
lypinator 0:bb348c97df44 412 /* Write data to memory */
lypinator 0:bb348c97df44 413 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 414 {
lypinator 0:bb348c97df44 415 *(__IO uint16_t *)pSramAddress = *pSrcBuffer;
lypinator 0:bb348c97df44 416 pSrcBuffer++;
lypinator 0:bb348c97df44 417 pSramAddress++;
lypinator 0:bb348c97df44 418 }
lypinator 0:bb348c97df44 419
lypinator 0:bb348c97df44 420 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 421 hsram->State = HAL_SRAM_STATE_READY;
lypinator 0:bb348c97df44 422
lypinator 0:bb348c97df44 423 /* Process unlocked */
lypinator 0:bb348c97df44 424 __HAL_UNLOCK(hsram);
lypinator 0:bb348c97df44 425
lypinator 0:bb348c97df44 426 return HAL_OK;
lypinator 0:bb348c97df44 427 }
lypinator 0:bb348c97df44 428
lypinator 0:bb348c97df44 429 /**
lypinator 0:bb348c97df44 430 * @brief Reads 32-bit buffer from SRAM memory.
lypinator 0:bb348c97df44 431 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 432 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 433 * @param pAddress Pointer to read start address
lypinator 0:bb348c97df44 434 * @param pDstBuffer Pointer to destination buffer
lypinator 0:bb348c97df44 435 * @param BufferSize Size of the buffer to read from memory
lypinator 0:bb348c97df44 436 * @retval HAL status
lypinator 0:bb348c97df44 437 */
lypinator 0:bb348c97df44 438 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 439 {
lypinator 0:bb348c97df44 440 /* Process Locked */
lypinator 0:bb348c97df44 441 __HAL_LOCK(hsram);
lypinator 0:bb348c97df44 442
lypinator 0:bb348c97df44 443 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 444 hsram->State = HAL_SRAM_STATE_BUSY;
lypinator 0:bb348c97df44 445
lypinator 0:bb348c97df44 446 /* Read data from memory */
lypinator 0:bb348c97df44 447 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 448 {
lypinator 0:bb348c97df44 449 *pDstBuffer = *(__IO uint32_t *)pAddress;
lypinator 0:bb348c97df44 450 pDstBuffer++;
lypinator 0:bb348c97df44 451 pAddress++;
lypinator 0:bb348c97df44 452 }
lypinator 0:bb348c97df44 453
lypinator 0:bb348c97df44 454 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 455 hsram->State = HAL_SRAM_STATE_READY;
lypinator 0:bb348c97df44 456
lypinator 0:bb348c97df44 457 /* Process unlocked */
lypinator 0:bb348c97df44 458 __HAL_UNLOCK(hsram);
lypinator 0:bb348c97df44 459
lypinator 0:bb348c97df44 460 return HAL_OK;
lypinator 0:bb348c97df44 461 }
lypinator 0:bb348c97df44 462
lypinator 0:bb348c97df44 463 /**
lypinator 0:bb348c97df44 464 * @brief Writes 32-bit buffer to SRAM memory.
lypinator 0:bb348c97df44 465 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 466 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 467 * @param pAddress Pointer to write start address
lypinator 0:bb348c97df44 468 * @param pSrcBuffer Pointer to source buffer to write
lypinator 0:bb348c97df44 469 * @param BufferSize Size of the buffer to write to memory
lypinator 0:bb348c97df44 470 * @retval HAL status
lypinator 0:bb348c97df44 471 */
lypinator 0:bb348c97df44 472 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 473 {
lypinator 0:bb348c97df44 474 /* Check the SRAM controller state */
lypinator 0:bb348c97df44 475 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
lypinator 0:bb348c97df44 476 {
lypinator 0:bb348c97df44 477 return HAL_ERROR;
lypinator 0:bb348c97df44 478 }
lypinator 0:bb348c97df44 479
lypinator 0:bb348c97df44 480 /* Process Locked */
lypinator 0:bb348c97df44 481 __HAL_LOCK(hsram);
lypinator 0:bb348c97df44 482
lypinator 0:bb348c97df44 483 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 484 hsram->State = HAL_SRAM_STATE_BUSY;
lypinator 0:bb348c97df44 485
lypinator 0:bb348c97df44 486 /* Write data to memory */
lypinator 0:bb348c97df44 487 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 488 {
lypinator 0:bb348c97df44 489 *(__IO uint32_t *)pAddress = *pSrcBuffer;
lypinator 0:bb348c97df44 490 pSrcBuffer++;
lypinator 0:bb348c97df44 491 pAddress++;
lypinator 0:bb348c97df44 492 }
lypinator 0:bb348c97df44 493
lypinator 0:bb348c97df44 494 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 495 hsram->State = HAL_SRAM_STATE_READY;
lypinator 0:bb348c97df44 496
lypinator 0:bb348c97df44 497 /* Process unlocked */
lypinator 0:bb348c97df44 498 __HAL_UNLOCK(hsram);
lypinator 0:bb348c97df44 499
lypinator 0:bb348c97df44 500 return HAL_OK;
lypinator 0:bb348c97df44 501 }
lypinator 0:bb348c97df44 502
lypinator 0:bb348c97df44 503 /**
lypinator 0:bb348c97df44 504 * @brief Reads a Words data from the SRAM memory using DMA transfer.
lypinator 0:bb348c97df44 505 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 506 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 507 * @param pAddress Pointer to read start address
lypinator 0:bb348c97df44 508 * @param pDstBuffer Pointer to destination buffer
lypinator 0:bb348c97df44 509 * @param BufferSize Size of the buffer to read from memory
lypinator 0:bb348c97df44 510 * @retval HAL status
lypinator 0:bb348c97df44 511 */
lypinator 0:bb348c97df44 512 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 513 {
lypinator 0:bb348c97df44 514 /* Process Locked */
lypinator 0:bb348c97df44 515 __HAL_LOCK(hsram);
lypinator 0:bb348c97df44 516
lypinator 0:bb348c97df44 517 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 518 hsram->State = HAL_SRAM_STATE_BUSY;
lypinator 0:bb348c97df44 519
lypinator 0:bb348c97df44 520 /* Configure DMA user callbacks */
lypinator 0:bb348c97df44 521 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
lypinator 0:bb348c97df44 522 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
lypinator 0:bb348c97df44 523
lypinator 0:bb348c97df44 524 /* Enable the DMA Stream */
lypinator 0:bb348c97df44 525 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
lypinator 0:bb348c97df44 526
lypinator 0:bb348c97df44 527 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 528 hsram->State = HAL_SRAM_STATE_READY;
lypinator 0:bb348c97df44 529
lypinator 0:bb348c97df44 530 /* Process unlocked */
lypinator 0:bb348c97df44 531 __HAL_UNLOCK(hsram);
lypinator 0:bb348c97df44 532
lypinator 0:bb348c97df44 533 return HAL_OK;
lypinator 0:bb348c97df44 534 }
lypinator 0:bb348c97df44 535
lypinator 0:bb348c97df44 536 /**
lypinator 0:bb348c97df44 537 * @brief Writes a Words data buffer to SRAM memory using DMA transfer.
lypinator 0:bb348c97df44 538 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 539 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 540 * @param pAddress Pointer to write start address
lypinator 0:bb348c97df44 541 * @param pSrcBuffer Pointer to source buffer to write
lypinator 0:bb348c97df44 542 * @param BufferSize Size of the buffer to write to memory
lypinator 0:bb348c97df44 543 * @retval HAL status
lypinator 0:bb348c97df44 544 */
lypinator 0:bb348c97df44 545 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 546 {
lypinator 0:bb348c97df44 547 /* Check the SRAM controller state */
lypinator 0:bb348c97df44 548 if(hsram->State == HAL_SRAM_STATE_PROTECTED)
lypinator 0:bb348c97df44 549 {
lypinator 0:bb348c97df44 550 return HAL_ERROR;
lypinator 0:bb348c97df44 551 }
lypinator 0:bb348c97df44 552
lypinator 0:bb348c97df44 553 /* Process Locked */
lypinator 0:bb348c97df44 554 __HAL_LOCK(hsram);
lypinator 0:bb348c97df44 555
lypinator 0:bb348c97df44 556 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 557 hsram->State = HAL_SRAM_STATE_BUSY;
lypinator 0:bb348c97df44 558
lypinator 0:bb348c97df44 559 /* Configure DMA user callbacks */
lypinator 0:bb348c97df44 560 hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback;
lypinator 0:bb348c97df44 561 hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback;
lypinator 0:bb348c97df44 562
lypinator 0:bb348c97df44 563 /* Enable the DMA Stream */
lypinator 0:bb348c97df44 564 HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
lypinator 0:bb348c97df44 565
lypinator 0:bb348c97df44 566 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 567 hsram->State = HAL_SRAM_STATE_READY;
lypinator 0:bb348c97df44 568
lypinator 0:bb348c97df44 569 /* Process unlocked */
lypinator 0:bb348c97df44 570 __HAL_UNLOCK(hsram);
lypinator 0:bb348c97df44 571
lypinator 0:bb348c97df44 572 return HAL_OK;
lypinator 0:bb348c97df44 573 }
lypinator 0:bb348c97df44 574
lypinator 0:bb348c97df44 575 /**
lypinator 0:bb348c97df44 576 * @}
lypinator 0:bb348c97df44 577 */
lypinator 0:bb348c97df44 578
lypinator 0:bb348c97df44 579 /** @defgroup SRAM_Exported_Functions_Group3 Control functions
lypinator 0:bb348c97df44 580 * @brief management functions
lypinator 0:bb348c97df44 581 *
lypinator 0:bb348c97df44 582 @verbatim
lypinator 0:bb348c97df44 583 ==============================================================================
lypinator 0:bb348c97df44 584 ##### SRAM Control functions #####
lypinator 0:bb348c97df44 585 ==============================================================================
lypinator 0:bb348c97df44 586 [..]
lypinator 0:bb348c97df44 587 This subsection provides a set of functions allowing to control dynamically
lypinator 0:bb348c97df44 588 the SRAM interface.
lypinator 0:bb348c97df44 589
lypinator 0:bb348c97df44 590 @endverbatim
lypinator 0:bb348c97df44 591 * @{
lypinator 0:bb348c97df44 592 */
lypinator 0:bb348c97df44 593
lypinator 0:bb348c97df44 594 /**
lypinator 0:bb348c97df44 595 * @brief Enables dynamically SRAM write operation.
lypinator 0:bb348c97df44 596 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 597 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 598 * @retval HAL status
lypinator 0:bb348c97df44 599 */
lypinator 0:bb348c97df44 600 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram)
lypinator 0:bb348c97df44 601 {
lypinator 0:bb348c97df44 602 /* Process Locked */
lypinator 0:bb348c97df44 603 __HAL_LOCK(hsram);
lypinator 0:bb348c97df44 604
lypinator 0:bb348c97df44 605 /* Enable write operation */
lypinator 0:bb348c97df44 606 FMC_NORSRAM_WriteOperation_Enable(hsram->Instance, hsram->Init.NSBank);
lypinator 0:bb348c97df44 607
lypinator 0:bb348c97df44 608 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 609 hsram->State = HAL_SRAM_STATE_READY;
lypinator 0:bb348c97df44 610
lypinator 0:bb348c97df44 611 /* Process unlocked */
lypinator 0:bb348c97df44 612 __HAL_UNLOCK(hsram);
lypinator 0:bb348c97df44 613
lypinator 0:bb348c97df44 614 return HAL_OK;
lypinator 0:bb348c97df44 615 }
lypinator 0:bb348c97df44 616
lypinator 0:bb348c97df44 617 /**
lypinator 0:bb348c97df44 618 * @brief Disables dynamically SRAM write operation.
lypinator 0:bb348c97df44 619 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 620 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 621 * @retval HAL status
lypinator 0:bb348c97df44 622 */
lypinator 0:bb348c97df44 623 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram)
lypinator 0:bb348c97df44 624 {
lypinator 0:bb348c97df44 625 /* Process Locked */
lypinator 0:bb348c97df44 626 __HAL_LOCK(hsram);
lypinator 0:bb348c97df44 627
lypinator 0:bb348c97df44 628 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 629 hsram->State = HAL_SRAM_STATE_BUSY;
lypinator 0:bb348c97df44 630
lypinator 0:bb348c97df44 631 /* Disable write operation */
lypinator 0:bb348c97df44 632 FMC_NORSRAM_WriteOperation_Disable(hsram->Instance, hsram->Init.NSBank);
lypinator 0:bb348c97df44 633
lypinator 0:bb348c97df44 634 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 635 hsram->State = HAL_SRAM_STATE_PROTECTED;
lypinator 0:bb348c97df44 636
lypinator 0:bb348c97df44 637 /* Process unlocked */
lypinator 0:bb348c97df44 638 __HAL_UNLOCK(hsram);
lypinator 0:bb348c97df44 639
lypinator 0:bb348c97df44 640 return HAL_OK;
lypinator 0:bb348c97df44 641 }
lypinator 0:bb348c97df44 642
lypinator 0:bb348c97df44 643 /**
lypinator 0:bb348c97df44 644 * @}
lypinator 0:bb348c97df44 645 */
lypinator 0:bb348c97df44 646
lypinator 0:bb348c97df44 647 /** @defgroup SRAM_Exported_Functions_Group4 State functions
lypinator 0:bb348c97df44 648 * @brief Peripheral State functions
lypinator 0:bb348c97df44 649 *
lypinator 0:bb348c97df44 650 @verbatim
lypinator 0:bb348c97df44 651 ==============================================================================
lypinator 0:bb348c97df44 652 ##### SRAM State functions #####
lypinator 0:bb348c97df44 653 ==============================================================================
lypinator 0:bb348c97df44 654 [..]
lypinator 0:bb348c97df44 655 This subsection permits to get in run-time the status of the SRAM controller
lypinator 0:bb348c97df44 656 and the data flow.
lypinator 0:bb348c97df44 657
lypinator 0:bb348c97df44 658 @endverbatim
lypinator 0:bb348c97df44 659 * @{
lypinator 0:bb348c97df44 660 */
lypinator 0:bb348c97df44 661
lypinator 0:bb348c97df44 662 /**
lypinator 0:bb348c97df44 663 * @brief Returns the SRAM controller state
lypinator 0:bb348c97df44 664 * @param hsram pointer to a SRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 665 * the configuration information for SRAM module.
lypinator 0:bb348c97df44 666 * @retval HAL state
lypinator 0:bb348c97df44 667 */
lypinator 0:bb348c97df44 668 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram)
lypinator 0:bb348c97df44 669 {
lypinator 0:bb348c97df44 670 return hsram->State;
lypinator 0:bb348c97df44 671 }
lypinator 0:bb348c97df44 672 /**
lypinator 0:bb348c97df44 673 * @}
lypinator 0:bb348c97df44 674 */
lypinator 0:bb348c97df44 675
lypinator 0:bb348c97df44 676 /**
lypinator 0:bb348c97df44 677 * @}
lypinator 0:bb348c97df44 678 */
lypinator 0:bb348c97df44 679 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx ||\
lypinator 0:bb348c97df44 680 STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx ||\
lypinator 0:bb348c97df44 681 STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
lypinator 0:bb348c97df44 682 #endif /* HAL_SRAM_MODULE_ENABLED */
lypinator 0:bb348c97df44 683 /**
lypinator 0:bb348c97df44 684 * @}
lypinator 0:bb348c97df44 685 */
lypinator 0:bb348c97df44 686
lypinator 0:bb348c97df44 687 /**
lypinator 0:bb348c97df44 688 * @}
lypinator 0:bb348c97df44 689 */
lypinator 0:bb348c97df44 690
lypinator 0:bb348c97df44 691 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/