Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_sdram.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_sdram.c
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief SDRAM HAL module driver.
lypinator 0:bb348c97df44 6 * This file provides a generic firmware to drive SDRAM memories mounted
lypinator 0:bb348c97df44 7 * as external device.
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 @verbatim
lypinator 0:bb348c97df44 10 ==============================================================================
lypinator 0:bb348c97df44 11 ##### How to use this driver #####
lypinator 0:bb348c97df44 12 ==============================================================================
lypinator 0:bb348c97df44 13 [..]
lypinator 0:bb348c97df44 14 This driver is a generic layered driver which contains a set of APIs used to
lypinator 0:bb348c97df44 15 control SDRAM memories. It uses the FMC layer functions to interface
lypinator 0:bb348c97df44 16 with SDRAM devices.
lypinator 0:bb348c97df44 17 The following sequence should be followed to configure the FMC to interface
lypinator 0:bb348c97df44 18 with SDRAM memories:
lypinator 0:bb348c97df44 19
lypinator 0:bb348c97df44 20 (#) Declare a SDRAM_HandleTypeDef handle structure, for example:
lypinator 0:bb348c97df44 21 SDRAM_HandleTypeDef hdsram
lypinator 0:bb348c97df44 22
lypinator 0:bb348c97df44 23 (++) Fill the SDRAM_HandleTypeDef handle "Init" field with the allowed
lypinator 0:bb348c97df44 24 values of the structure member.
lypinator 0:bb348c97df44 25
lypinator 0:bb348c97df44 26 (++) Fill the SDRAM_HandleTypeDef handle "Instance" field with a predefined
lypinator 0:bb348c97df44 27 base register instance for NOR or SDRAM device
lypinator 0:bb348c97df44 28
lypinator 0:bb348c97df44 29 (#) Declare a FMC_SDRAM_TimingTypeDef structure; for example:
lypinator 0:bb348c97df44 30 FMC_SDRAM_TimingTypeDef Timing;
lypinator 0:bb348c97df44 31 and fill its fields with the allowed values of the structure member.
lypinator 0:bb348c97df44 32
lypinator 0:bb348c97df44 33 (#) Initialize the SDRAM Controller by calling the function HAL_SDRAM_Init(). This function
lypinator 0:bb348c97df44 34 performs the following sequence:
lypinator 0:bb348c97df44 35
lypinator 0:bb348c97df44 36 (##) MSP hardware layer configuration using the function HAL_SDRAM_MspInit()
lypinator 0:bb348c97df44 37 (##) Control register configuration using the FMC SDRAM interface function
lypinator 0:bb348c97df44 38 FMC_SDRAM_Init()
lypinator 0:bb348c97df44 39 (##) Timing register configuration using the FMC SDRAM interface function
lypinator 0:bb348c97df44 40 FMC_SDRAM_Timing_Init()
lypinator 0:bb348c97df44 41 (##) Program the SDRAM external device by applying its initialization sequence
lypinator 0:bb348c97df44 42 according to the device plugged in your hardware. This step is mandatory
lypinator 0:bb348c97df44 43 for accessing the SDRAM device.
lypinator 0:bb348c97df44 44
lypinator 0:bb348c97df44 45 (#) At this stage you can perform read/write accesses from/to the memory connected
lypinator 0:bb348c97df44 46 to the SDRAM Bank. You can perform either polling or DMA transfer using the
lypinator 0:bb348c97df44 47 following APIs:
lypinator 0:bb348c97df44 48 (++) HAL_SDRAM_Read()/HAL_SDRAM_Write() for polling read/write access
lypinator 0:bb348c97df44 49 (++) HAL_SDRAM_Read_DMA()/HAL_SDRAM_Write_DMA() for DMA read/write transfer
lypinator 0:bb348c97df44 50
lypinator 0:bb348c97df44 51 (#) You can also control the SDRAM device by calling the control APIs HAL_SDRAM_WriteOperation_Enable()/
lypinator 0:bb348c97df44 52 HAL_SDRAM_WriteOperation_Disable() to respectively enable/disable the SDRAM write operation or
lypinator 0:bb348c97df44 53 the function HAL_SDRAM_SendCommand() to send a specified command to the SDRAM
lypinator 0:bb348c97df44 54 device. The command to be sent must be configured with the FMC_SDRAM_CommandTypeDef
lypinator 0:bb348c97df44 55 structure.
lypinator 0:bb348c97df44 56
lypinator 0:bb348c97df44 57 (#) You can continuously monitor the SDRAM device HAL state by calling the function
lypinator 0:bb348c97df44 58 HAL_SDRAM_GetState()
lypinator 0:bb348c97df44 59
lypinator 0:bb348c97df44 60 @endverbatim
lypinator 0:bb348c97df44 61 ******************************************************************************
lypinator 0:bb348c97df44 62 * @attention
lypinator 0:bb348c97df44 63 *
lypinator 0:bb348c97df44 64 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 65 *
lypinator 0:bb348c97df44 66 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 67 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 68 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 69 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 70 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 71 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 72 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 73 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 74 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 75 * without specific prior written permission.
lypinator 0:bb348c97df44 76 *
lypinator 0:bb348c97df44 77 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 78 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 79 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 80 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 81 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 82 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 83 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 84 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 85 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 86 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 87 *
lypinator 0:bb348c97df44 88 ******************************************************************************
lypinator 0:bb348c97df44 89 */
lypinator 0:bb348c97df44 90
lypinator 0:bb348c97df44 91 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 92 #include "stm32f4xx_hal.h"
lypinator 0:bb348c97df44 93
lypinator 0:bb348c97df44 94 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 95 * @{
lypinator 0:bb348c97df44 96 */
lypinator 0:bb348c97df44 97
lypinator 0:bb348c97df44 98 /** @defgroup SDRAM SDRAM
lypinator 0:bb348c97df44 99 * @brief SDRAM driver modules
lypinator 0:bb348c97df44 100 * @{
lypinator 0:bb348c97df44 101 */
lypinator 0:bb348c97df44 102 #ifdef HAL_SDRAM_MODULE_ENABLED
lypinator 0:bb348c97df44 103 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
lypinator 0:bb348c97df44 104 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
lypinator 0:bb348c97df44 105
lypinator 0:bb348c97df44 106 /* Private typedef -----------------------------------------------------------*/
lypinator 0:bb348c97df44 107 /* Private define ------------------------------------------------------------*/
lypinator 0:bb348c97df44 108 /* Private macro -------------------------------------------------------------*/
lypinator 0:bb348c97df44 109 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 110 /* Private functions ---------------------------------------------------------*/
lypinator 0:bb348c97df44 111 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 112 /** @defgroup SDRAM_Exported_Functions SDRAM Exported Functions
lypinator 0:bb348c97df44 113 * @{
lypinator 0:bb348c97df44 114 */
lypinator 0:bb348c97df44 115
lypinator 0:bb348c97df44 116 /** @defgroup SDRAM_Exported_Functions_Group1 Initialization and de-initialization functions
lypinator 0:bb348c97df44 117 * @brief Initialization and Configuration functions
lypinator 0:bb348c97df44 118 *
lypinator 0:bb348c97df44 119 @verbatim
lypinator 0:bb348c97df44 120 ==============================================================================
lypinator 0:bb348c97df44 121 ##### SDRAM Initialization and de_initialization functions #####
lypinator 0:bb348c97df44 122 ==============================================================================
lypinator 0:bb348c97df44 123 [..]
lypinator 0:bb348c97df44 124 This section provides functions allowing to initialize/de-initialize
lypinator 0:bb348c97df44 125 the SDRAM memory
lypinator 0:bb348c97df44 126
lypinator 0:bb348c97df44 127 @endverbatim
lypinator 0:bb348c97df44 128 * @{
lypinator 0:bb348c97df44 129 */
lypinator 0:bb348c97df44 130
lypinator 0:bb348c97df44 131 /**
lypinator 0:bb348c97df44 132 * @brief Performs the SDRAM device initialization sequence.
lypinator 0:bb348c97df44 133 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 134 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 135 * @param Timing Pointer to SDRAM control timing structure
lypinator 0:bb348c97df44 136 * @retval HAL status
lypinator 0:bb348c97df44 137 */
lypinator 0:bb348c97df44 138 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
lypinator 0:bb348c97df44 139 {
lypinator 0:bb348c97df44 140 /* Check the SDRAM handle parameter */
lypinator 0:bb348c97df44 141 if(hsdram == NULL)
lypinator 0:bb348c97df44 142 {
lypinator 0:bb348c97df44 143 return HAL_ERROR;
lypinator 0:bb348c97df44 144 }
lypinator 0:bb348c97df44 145
lypinator 0:bb348c97df44 146 if(hsdram->State == HAL_SDRAM_STATE_RESET)
lypinator 0:bb348c97df44 147 {
lypinator 0:bb348c97df44 148 /* Allocate lock resource and initialize it */
lypinator 0:bb348c97df44 149 hsdram->Lock = HAL_UNLOCKED;
lypinator 0:bb348c97df44 150 /* Initialize the low level hardware (MSP) */
lypinator 0:bb348c97df44 151 HAL_SDRAM_MspInit(hsdram);
lypinator 0:bb348c97df44 152 }
lypinator 0:bb348c97df44 153
lypinator 0:bb348c97df44 154 /* Initialize the SDRAM controller state */
lypinator 0:bb348c97df44 155 hsdram->State = HAL_SDRAM_STATE_BUSY;
lypinator 0:bb348c97df44 156
lypinator 0:bb348c97df44 157 /* Initialize SDRAM control Interface */
lypinator 0:bb348c97df44 158 FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
lypinator 0:bb348c97df44 159
lypinator 0:bb348c97df44 160 /* Initialize SDRAM timing Interface */
lypinator 0:bb348c97df44 161 FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank);
lypinator 0:bb348c97df44 162
lypinator 0:bb348c97df44 163 /* Update the SDRAM controller state */
lypinator 0:bb348c97df44 164 hsdram->State = HAL_SDRAM_STATE_READY;
lypinator 0:bb348c97df44 165
lypinator 0:bb348c97df44 166 return HAL_OK;
lypinator 0:bb348c97df44 167 }
lypinator 0:bb348c97df44 168
lypinator 0:bb348c97df44 169 /**
lypinator 0:bb348c97df44 170 * @brief Perform the SDRAM device initialization sequence.
lypinator 0:bb348c97df44 171 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 172 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 173 * @retval HAL status
lypinator 0:bb348c97df44 174 */
lypinator 0:bb348c97df44 175 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
lypinator 0:bb348c97df44 176 {
lypinator 0:bb348c97df44 177 /* Initialize the low level hardware (MSP) */
lypinator 0:bb348c97df44 178 HAL_SDRAM_MspDeInit(hsdram);
lypinator 0:bb348c97df44 179
lypinator 0:bb348c97df44 180 /* Configure the SDRAM registers with their reset values */
lypinator 0:bb348c97df44 181 FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank);
lypinator 0:bb348c97df44 182
lypinator 0:bb348c97df44 183 /* Reset the SDRAM controller state */
lypinator 0:bb348c97df44 184 hsdram->State = HAL_SDRAM_STATE_RESET;
lypinator 0:bb348c97df44 185
lypinator 0:bb348c97df44 186 /* Release Lock */
lypinator 0:bb348c97df44 187 __HAL_UNLOCK(hsdram);
lypinator 0:bb348c97df44 188
lypinator 0:bb348c97df44 189 return HAL_OK;
lypinator 0:bb348c97df44 190 }
lypinator 0:bb348c97df44 191
lypinator 0:bb348c97df44 192 /**
lypinator 0:bb348c97df44 193 * @brief SDRAM MSP Init.
lypinator 0:bb348c97df44 194 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 195 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 196 * @retval None
lypinator 0:bb348c97df44 197 */
lypinator 0:bb348c97df44 198 __weak void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram)
lypinator 0:bb348c97df44 199 {
lypinator 0:bb348c97df44 200 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 201 UNUSED(hsdram);
lypinator 0:bb348c97df44 202 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 203 the HAL_SDRAM_MspInit could be implemented in the user file
lypinator 0:bb348c97df44 204 */
lypinator 0:bb348c97df44 205 }
lypinator 0:bb348c97df44 206
lypinator 0:bb348c97df44 207 /**
lypinator 0:bb348c97df44 208 * @brief SDRAM MSP DeInit.
lypinator 0:bb348c97df44 209 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 210 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 211 * @retval None
lypinator 0:bb348c97df44 212 */
lypinator 0:bb348c97df44 213 __weak void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram)
lypinator 0:bb348c97df44 214 {
lypinator 0:bb348c97df44 215 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 216 UNUSED(hsdram);
lypinator 0:bb348c97df44 217 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 218 the HAL_SDRAM_MspDeInit could be implemented in the user file
lypinator 0:bb348c97df44 219 */
lypinator 0:bb348c97df44 220 }
lypinator 0:bb348c97df44 221
lypinator 0:bb348c97df44 222 /**
lypinator 0:bb348c97df44 223 * @brief This function handles SDRAM refresh error interrupt request.
lypinator 0:bb348c97df44 224 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 225 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 226 * @retval HAL status
lypinator 0:bb348c97df44 227 */
lypinator 0:bb348c97df44 228 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
lypinator 0:bb348c97df44 229 {
lypinator 0:bb348c97df44 230 /* Check SDRAM interrupt Rising edge flag */
lypinator 0:bb348c97df44 231 if(__FMC_SDRAM_GET_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_IT))
lypinator 0:bb348c97df44 232 {
lypinator 0:bb348c97df44 233 /* SDRAM refresh error interrupt callback */
lypinator 0:bb348c97df44 234 HAL_SDRAM_RefreshErrorCallback(hsdram);
lypinator 0:bb348c97df44 235
lypinator 0:bb348c97df44 236 /* Clear SDRAM refresh error interrupt pending bit */
lypinator 0:bb348c97df44 237 __FMC_SDRAM_CLEAR_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_ERROR);
lypinator 0:bb348c97df44 238 }
lypinator 0:bb348c97df44 239 }
lypinator 0:bb348c97df44 240
lypinator 0:bb348c97df44 241 /**
lypinator 0:bb348c97df44 242 * @brief SDRAM Refresh error callback.
lypinator 0:bb348c97df44 243 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 244 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 245 * @retval None
lypinator 0:bb348c97df44 246 */
lypinator 0:bb348c97df44 247 __weak void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram)
lypinator 0:bb348c97df44 248 {
lypinator 0:bb348c97df44 249 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 250 UNUSED(hsdram);
lypinator 0:bb348c97df44 251 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 252 the HAL_SDRAM_RefreshErrorCallback could be implemented in the user file
lypinator 0:bb348c97df44 253 */
lypinator 0:bb348c97df44 254 }
lypinator 0:bb348c97df44 255
lypinator 0:bb348c97df44 256 /**
lypinator 0:bb348c97df44 257 * @brief DMA transfer complete callback.
lypinator 0:bb348c97df44 258 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 259 * the configuration information for the specified DMA module.
lypinator 0:bb348c97df44 260 * @retval None
lypinator 0:bb348c97df44 261 */
lypinator 0:bb348c97df44 262 __weak void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 263 {
lypinator 0:bb348c97df44 264 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 265 UNUSED(hdma);
lypinator 0:bb348c97df44 266 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 267 the HAL_SDRAM_DMA_XferCpltCallback could be implemented in the user file
lypinator 0:bb348c97df44 268 */
lypinator 0:bb348c97df44 269 }
lypinator 0:bb348c97df44 270
lypinator 0:bb348c97df44 271 /**
lypinator 0:bb348c97df44 272 * @brief DMA transfer complete error callback.
lypinator 0:bb348c97df44 273 * @param hdma DMA handle
lypinator 0:bb348c97df44 274 * @retval None
lypinator 0:bb348c97df44 275 */
lypinator 0:bb348c97df44 276 __weak void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
lypinator 0:bb348c97df44 277 {
lypinator 0:bb348c97df44 278 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 279 UNUSED(hdma);
lypinator 0:bb348c97df44 280 /* NOTE: This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 281 the HAL_SDRAM_DMA_XferErrorCallback could be implemented in the user file
lypinator 0:bb348c97df44 282 */
lypinator 0:bb348c97df44 283 }
lypinator 0:bb348c97df44 284 /**
lypinator 0:bb348c97df44 285 * @}
lypinator 0:bb348c97df44 286 */
lypinator 0:bb348c97df44 287
lypinator 0:bb348c97df44 288 /** @defgroup SDRAM_Exported_Functions_Group2 Input and Output functions
lypinator 0:bb348c97df44 289 * @brief Input Output and memory control functions
lypinator 0:bb348c97df44 290 *
lypinator 0:bb348c97df44 291 @verbatim
lypinator 0:bb348c97df44 292 ==============================================================================
lypinator 0:bb348c97df44 293 ##### SDRAM Input and Output functions #####
lypinator 0:bb348c97df44 294 ==============================================================================
lypinator 0:bb348c97df44 295 [..]
lypinator 0:bb348c97df44 296 This section provides functions allowing to use and control the SDRAM memory
lypinator 0:bb348c97df44 297
lypinator 0:bb348c97df44 298 @endverbatim
lypinator 0:bb348c97df44 299 * @{
lypinator 0:bb348c97df44 300 */
lypinator 0:bb348c97df44 301
lypinator 0:bb348c97df44 302 /**
lypinator 0:bb348c97df44 303 * @brief Reads 8-bit data buffer from the SDRAM memory.
lypinator 0:bb348c97df44 304 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 305 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 306 * @param pAddress Pointer to read start address
lypinator 0:bb348c97df44 307 * @param pDstBuffer Pointer to destination buffer
lypinator 0:bb348c97df44 308 * @param BufferSize Size of the buffer to read from memory
lypinator 0:bb348c97df44 309 * @retval HAL status
lypinator 0:bb348c97df44 310 */
lypinator 0:bb348c97df44 311 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 312 {
lypinator 0:bb348c97df44 313 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
lypinator 0:bb348c97df44 314
lypinator 0:bb348c97df44 315 /* Process Locked */
lypinator 0:bb348c97df44 316 __HAL_LOCK(hsdram);
lypinator 0:bb348c97df44 317
lypinator 0:bb348c97df44 318 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 319 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 320 {
lypinator 0:bb348c97df44 321 return HAL_BUSY;
lypinator 0:bb348c97df44 322 }
lypinator 0:bb348c97df44 323 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
lypinator 0:bb348c97df44 324 {
lypinator 0:bb348c97df44 325 return HAL_ERROR;
lypinator 0:bb348c97df44 326 }
lypinator 0:bb348c97df44 327
lypinator 0:bb348c97df44 328 /* Read data from source */
lypinator 0:bb348c97df44 329 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 330 {
lypinator 0:bb348c97df44 331 *pDstBuffer = *(__IO uint8_t *)pSdramAddress;
lypinator 0:bb348c97df44 332 pDstBuffer++;
lypinator 0:bb348c97df44 333 pSdramAddress++;
lypinator 0:bb348c97df44 334 }
lypinator 0:bb348c97df44 335
lypinator 0:bb348c97df44 336 /* Process Unlocked */
lypinator 0:bb348c97df44 337 __HAL_UNLOCK(hsdram);
lypinator 0:bb348c97df44 338
lypinator 0:bb348c97df44 339 return HAL_OK;
lypinator 0:bb348c97df44 340 }
lypinator 0:bb348c97df44 341
lypinator 0:bb348c97df44 342 /**
lypinator 0:bb348c97df44 343 * @brief Writes 8-bit data buffer to SDRAM memory.
lypinator 0:bb348c97df44 344 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 345 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 346 * @param pAddress Pointer to write start address
lypinator 0:bb348c97df44 347 * @param pSrcBuffer Pointer to source buffer to write
lypinator 0:bb348c97df44 348 * @param BufferSize Size of the buffer to write to memory
lypinator 0:bb348c97df44 349 * @retval HAL status
lypinator 0:bb348c97df44 350 */
lypinator 0:bb348c97df44 351 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 352 {
lypinator 0:bb348c97df44 353 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
lypinator 0:bb348c97df44 354 uint32_t tmp = 0U;
lypinator 0:bb348c97df44 355
lypinator 0:bb348c97df44 356 /* Process Locked */
lypinator 0:bb348c97df44 357 __HAL_LOCK(hsdram);
lypinator 0:bb348c97df44 358
lypinator 0:bb348c97df44 359 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 360 tmp = hsdram->State;
lypinator 0:bb348c97df44 361
lypinator 0:bb348c97df44 362 if(tmp == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 363 {
lypinator 0:bb348c97df44 364 return HAL_BUSY;
lypinator 0:bb348c97df44 365 }
lypinator 0:bb348c97df44 366 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
lypinator 0:bb348c97df44 367 {
lypinator 0:bb348c97df44 368 return HAL_ERROR;
lypinator 0:bb348c97df44 369 }
lypinator 0:bb348c97df44 370
lypinator 0:bb348c97df44 371 /* Write data to memory */
lypinator 0:bb348c97df44 372 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 373 {
lypinator 0:bb348c97df44 374 *(__IO uint8_t *)pSdramAddress = *pSrcBuffer;
lypinator 0:bb348c97df44 375 pSrcBuffer++;
lypinator 0:bb348c97df44 376 pSdramAddress++;
lypinator 0:bb348c97df44 377 }
lypinator 0:bb348c97df44 378
lypinator 0:bb348c97df44 379 /* Process Unlocked */
lypinator 0:bb348c97df44 380 __HAL_UNLOCK(hsdram);
lypinator 0:bb348c97df44 381
lypinator 0:bb348c97df44 382 return HAL_OK;
lypinator 0:bb348c97df44 383 }
lypinator 0:bb348c97df44 384
lypinator 0:bb348c97df44 385 /**
lypinator 0:bb348c97df44 386 * @brief Reads 16-bit data buffer from the SDRAM memory.
lypinator 0:bb348c97df44 387 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 388 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 389 * @param pAddress Pointer to read start address
lypinator 0:bb348c97df44 390 * @param pDstBuffer Pointer to destination buffer
lypinator 0:bb348c97df44 391 * @param BufferSize Size of the buffer to read from memory
lypinator 0:bb348c97df44 392 * @retval HAL status
lypinator 0:bb348c97df44 393 */
lypinator 0:bb348c97df44 394 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 395 {
lypinator 0:bb348c97df44 396 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
lypinator 0:bb348c97df44 397
lypinator 0:bb348c97df44 398 /* Process Locked */
lypinator 0:bb348c97df44 399 __HAL_LOCK(hsdram);
lypinator 0:bb348c97df44 400
lypinator 0:bb348c97df44 401 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 402 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 403 {
lypinator 0:bb348c97df44 404 return HAL_BUSY;
lypinator 0:bb348c97df44 405 }
lypinator 0:bb348c97df44 406 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
lypinator 0:bb348c97df44 407 {
lypinator 0:bb348c97df44 408 return HAL_ERROR;
lypinator 0:bb348c97df44 409 }
lypinator 0:bb348c97df44 410
lypinator 0:bb348c97df44 411 /* Read data from source */
lypinator 0:bb348c97df44 412 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 413 {
lypinator 0:bb348c97df44 414 *pDstBuffer = *(__IO uint16_t *)pSdramAddress;
lypinator 0:bb348c97df44 415 pDstBuffer++;
lypinator 0:bb348c97df44 416 pSdramAddress++;
lypinator 0:bb348c97df44 417 }
lypinator 0:bb348c97df44 418
lypinator 0:bb348c97df44 419 /* Process Unlocked */
lypinator 0:bb348c97df44 420 __HAL_UNLOCK(hsdram);
lypinator 0:bb348c97df44 421
lypinator 0:bb348c97df44 422 return HAL_OK;
lypinator 0:bb348c97df44 423 }
lypinator 0:bb348c97df44 424
lypinator 0:bb348c97df44 425 /**
lypinator 0:bb348c97df44 426 * @brief Writes 16-bit data buffer to SDRAM memory.
lypinator 0:bb348c97df44 427 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 428 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 429 * @param pAddress Pointer to write start address
lypinator 0:bb348c97df44 430 * @param pSrcBuffer Pointer to source buffer to write
lypinator 0:bb348c97df44 431 * @param BufferSize Size of the buffer to write to memory
lypinator 0:bb348c97df44 432 * @retval HAL status
lypinator 0:bb348c97df44 433 */
lypinator 0:bb348c97df44 434 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 435 {
lypinator 0:bb348c97df44 436 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
lypinator 0:bb348c97df44 437 uint32_t tmp = 0U;
lypinator 0:bb348c97df44 438
lypinator 0:bb348c97df44 439 /* Process Locked */
lypinator 0:bb348c97df44 440 __HAL_LOCK(hsdram);
lypinator 0:bb348c97df44 441
lypinator 0:bb348c97df44 442 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 443 tmp = hsdram->State;
lypinator 0:bb348c97df44 444
lypinator 0:bb348c97df44 445 if(tmp == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 446 {
lypinator 0:bb348c97df44 447 return HAL_BUSY;
lypinator 0:bb348c97df44 448 }
lypinator 0:bb348c97df44 449 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
lypinator 0:bb348c97df44 450 {
lypinator 0:bb348c97df44 451 return HAL_ERROR;
lypinator 0:bb348c97df44 452 }
lypinator 0:bb348c97df44 453
lypinator 0:bb348c97df44 454 /* Write data to memory */
lypinator 0:bb348c97df44 455 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 456 {
lypinator 0:bb348c97df44 457 *(__IO uint16_t *)pSdramAddress = *pSrcBuffer;
lypinator 0:bb348c97df44 458 pSrcBuffer++;
lypinator 0:bb348c97df44 459 pSdramAddress++;
lypinator 0:bb348c97df44 460 }
lypinator 0:bb348c97df44 461
lypinator 0:bb348c97df44 462 /* Process Unlocked */
lypinator 0:bb348c97df44 463 __HAL_UNLOCK(hsdram);
lypinator 0:bb348c97df44 464
lypinator 0:bb348c97df44 465 return HAL_OK;
lypinator 0:bb348c97df44 466 }
lypinator 0:bb348c97df44 467
lypinator 0:bb348c97df44 468 /**
lypinator 0:bb348c97df44 469 * @brief Reads 32-bit data buffer from the SDRAM memory.
lypinator 0:bb348c97df44 470 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 471 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 472 * @param pAddress Pointer to read start address
lypinator 0:bb348c97df44 473 * @param pDstBuffer Pointer to destination buffer
lypinator 0:bb348c97df44 474 * @param BufferSize Size of the buffer to read from memory
lypinator 0:bb348c97df44 475 * @retval HAL status
lypinator 0:bb348c97df44 476 */
lypinator 0:bb348c97df44 477 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 478 {
lypinator 0:bb348c97df44 479 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
lypinator 0:bb348c97df44 480
lypinator 0:bb348c97df44 481 /* Process Locked */
lypinator 0:bb348c97df44 482 __HAL_LOCK(hsdram);
lypinator 0:bb348c97df44 483
lypinator 0:bb348c97df44 484 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 485 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 486 {
lypinator 0:bb348c97df44 487 return HAL_BUSY;
lypinator 0:bb348c97df44 488 }
lypinator 0:bb348c97df44 489 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
lypinator 0:bb348c97df44 490 {
lypinator 0:bb348c97df44 491 return HAL_ERROR;
lypinator 0:bb348c97df44 492 }
lypinator 0:bb348c97df44 493
lypinator 0:bb348c97df44 494 /* Read data from source */
lypinator 0:bb348c97df44 495 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 496 {
lypinator 0:bb348c97df44 497 *pDstBuffer = *(__IO uint32_t *)pSdramAddress;
lypinator 0:bb348c97df44 498 pDstBuffer++;
lypinator 0:bb348c97df44 499 pSdramAddress++;
lypinator 0:bb348c97df44 500 }
lypinator 0:bb348c97df44 501
lypinator 0:bb348c97df44 502 /* Process Unlocked */
lypinator 0:bb348c97df44 503 __HAL_UNLOCK(hsdram);
lypinator 0:bb348c97df44 504
lypinator 0:bb348c97df44 505 return HAL_OK;
lypinator 0:bb348c97df44 506 }
lypinator 0:bb348c97df44 507
lypinator 0:bb348c97df44 508 /**
lypinator 0:bb348c97df44 509 * @brief Writes 32-bit data buffer to SDRAM memory.
lypinator 0:bb348c97df44 510 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 511 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 512 * @param pAddress Pointer to write start address
lypinator 0:bb348c97df44 513 * @param pSrcBuffer Pointer to source buffer to write
lypinator 0:bb348c97df44 514 * @param BufferSize Size of the buffer to write to memory
lypinator 0:bb348c97df44 515 * @retval HAL status
lypinator 0:bb348c97df44 516 */
lypinator 0:bb348c97df44 517 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 518 {
lypinator 0:bb348c97df44 519 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
lypinator 0:bb348c97df44 520 uint32_t tmp = 0U;
lypinator 0:bb348c97df44 521
lypinator 0:bb348c97df44 522 /* Process Locked */
lypinator 0:bb348c97df44 523 __HAL_LOCK(hsdram);
lypinator 0:bb348c97df44 524
lypinator 0:bb348c97df44 525 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 526 tmp = hsdram->State;
lypinator 0:bb348c97df44 527
lypinator 0:bb348c97df44 528 if(tmp == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 529 {
lypinator 0:bb348c97df44 530 return HAL_BUSY;
lypinator 0:bb348c97df44 531 }
lypinator 0:bb348c97df44 532 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
lypinator 0:bb348c97df44 533 {
lypinator 0:bb348c97df44 534 return HAL_ERROR;
lypinator 0:bb348c97df44 535 }
lypinator 0:bb348c97df44 536
lypinator 0:bb348c97df44 537 /* Write data to memory */
lypinator 0:bb348c97df44 538 for(; BufferSize != 0U; BufferSize--)
lypinator 0:bb348c97df44 539 {
lypinator 0:bb348c97df44 540 *(__IO uint32_t *)pSdramAddress = *pSrcBuffer;
lypinator 0:bb348c97df44 541 pSrcBuffer++;
lypinator 0:bb348c97df44 542 pSdramAddress++;
lypinator 0:bb348c97df44 543 }
lypinator 0:bb348c97df44 544
lypinator 0:bb348c97df44 545 /* Process Unlocked */
lypinator 0:bb348c97df44 546 __HAL_UNLOCK(hsdram);
lypinator 0:bb348c97df44 547
lypinator 0:bb348c97df44 548 return HAL_OK;
lypinator 0:bb348c97df44 549 }
lypinator 0:bb348c97df44 550
lypinator 0:bb348c97df44 551 /**
lypinator 0:bb348c97df44 552 * @brief Reads a Words data from the SDRAM memory using DMA transfer.
lypinator 0:bb348c97df44 553 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 554 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 555 * @param pAddress Pointer to read start address
lypinator 0:bb348c97df44 556 * @param pDstBuffer Pointer to destination buffer
lypinator 0:bb348c97df44 557 * @param BufferSize Size of the buffer to read from memory
lypinator 0:bb348c97df44 558 * @retval HAL status
lypinator 0:bb348c97df44 559 */
lypinator 0:bb348c97df44 560 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 561 {
lypinator 0:bb348c97df44 562 uint32_t tmp = 0U;
lypinator 0:bb348c97df44 563
lypinator 0:bb348c97df44 564 /* Process Locked */
lypinator 0:bb348c97df44 565 __HAL_LOCK(hsdram);
lypinator 0:bb348c97df44 566
lypinator 0:bb348c97df44 567 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 568 tmp = hsdram->State;
lypinator 0:bb348c97df44 569
lypinator 0:bb348c97df44 570 if(tmp == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 571 {
lypinator 0:bb348c97df44 572 return HAL_BUSY;
lypinator 0:bb348c97df44 573 }
lypinator 0:bb348c97df44 574 else if(tmp == HAL_SDRAM_STATE_PRECHARGED)
lypinator 0:bb348c97df44 575 {
lypinator 0:bb348c97df44 576 return HAL_ERROR;
lypinator 0:bb348c97df44 577 }
lypinator 0:bb348c97df44 578
lypinator 0:bb348c97df44 579 /* Configure DMA user callbacks */
lypinator 0:bb348c97df44 580 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
lypinator 0:bb348c97df44 581 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
lypinator 0:bb348c97df44 582
lypinator 0:bb348c97df44 583 /* Enable the DMA Stream */
lypinator 0:bb348c97df44 584 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
lypinator 0:bb348c97df44 585
lypinator 0:bb348c97df44 586 /* Process Unlocked */
lypinator 0:bb348c97df44 587 __HAL_UNLOCK(hsdram);
lypinator 0:bb348c97df44 588
lypinator 0:bb348c97df44 589 return HAL_OK;
lypinator 0:bb348c97df44 590 }
lypinator 0:bb348c97df44 591
lypinator 0:bb348c97df44 592 /**
lypinator 0:bb348c97df44 593 * @brief Writes a Words data buffer to SDRAM memory using DMA transfer.
lypinator 0:bb348c97df44 594 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 595 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 596 * @param pAddress Pointer to write start address
lypinator 0:bb348c97df44 597 * @param pSrcBuffer Pointer to source buffer to write
lypinator 0:bb348c97df44 598 * @param BufferSize Size of the buffer to write to memory
lypinator 0:bb348c97df44 599 * @retval HAL status
lypinator 0:bb348c97df44 600 */
lypinator 0:bb348c97df44 601 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
lypinator 0:bb348c97df44 602 {
lypinator 0:bb348c97df44 603 uint32_t tmp = 0U;
lypinator 0:bb348c97df44 604
lypinator 0:bb348c97df44 605 /* Process Locked */
lypinator 0:bb348c97df44 606 __HAL_LOCK(hsdram);
lypinator 0:bb348c97df44 607
lypinator 0:bb348c97df44 608 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 609 tmp = hsdram->State;
lypinator 0:bb348c97df44 610
lypinator 0:bb348c97df44 611 if(tmp == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 612 {
lypinator 0:bb348c97df44 613 return HAL_BUSY;
lypinator 0:bb348c97df44 614 }
lypinator 0:bb348c97df44 615 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
lypinator 0:bb348c97df44 616 {
lypinator 0:bb348c97df44 617 return HAL_ERROR;
lypinator 0:bb348c97df44 618 }
lypinator 0:bb348c97df44 619
lypinator 0:bb348c97df44 620 /* Configure DMA user callbacks */
lypinator 0:bb348c97df44 621 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
lypinator 0:bb348c97df44 622 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
lypinator 0:bb348c97df44 623
lypinator 0:bb348c97df44 624 /* Enable the DMA Stream */
lypinator 0:bb348c97df44 625 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
lypinator 0:bb348c97df44 626
lypinator 0:bb348c97df44 627 /* Process Unlocked */
lypinator 0:bb348c97df44 628 __HAL_UNLOCK(hsdram);
lypinator 0:bb348c97df44 629
lypinator 0:bb348c97df44 630 return HAL_OK;
lypinator 0:bb348c97df44 631 }
lypinator 0:bb348c97df44 632 /**
lypinator 0:bb348c97df44 633 * @}
lypinator 0:bb348c97df44 634 */
lypinator 0:bb348c97df44 635
lypinator 0:bb348c97df44 636 /** @defgroup SDRAM_Exported_Functions_Group3 Control functions
lypinator 0:bb348c97df44 637 * @brief management functions
lypinator 0:bb348c97df44 638 *
lypinator 0:bb348c97df44 639 @verbatim
lypinator 0:bb348c97df44 640 ==============================================================================
lypinator 0:bb348c97df44 641 ##### SDRAM Control functions #####
lypinator 0:bb348c97df44 642 ==============================================================================
lypinator 0:bb348c97df44 643 [..]
lypinator 0:bb348c97df44 644 This subsection provides a set of functions allowing to control dynamically
lypinator 0:bb348c97df44 645 the SDRAM interface.
lypinator 0:bb348c97df44 646
lypinator 0:bb348c97df44 647 @endverbatim
lypinator 0:bb348c97df44 648 * @{
lypinator 0:bb348c97df44 649 */
lypinator 0:bb348c97df44 650
lypinator 0:bb348c97df44 651 /**
lypinator 0:bb348c97df44 652 * @brief Enables dynamically SDRAM write protection.
lypinator 0:bb348c97df44 653 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 654 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 655 * @retval HAL status
lypinator 0:bb348c97df44 656 */
lypinator 0:bb348c97df44 657 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram)
lypinator 0:bb348c97df44 658 {
lypinator 0:bb348c97df44 659 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 660 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 661 {
lypinator 0:bb348c97df44 662 return HAL_BUSY;
lypinator 0:bb348c97df44 663 }
lypinator 0:bb348c97df44 664
lypinator 0:bb348c97df44 665 /* Update the SDRAM state */
lypinator 0:bb348c97df44 666 hsdram->State = HAL_SDRAM_STATE_BUSY;
lypinator 0:bb348c97df44 667
lypinator 0:bb348c97df44 668 /* Enable write protection */
lypinator 0:bb348c97df44 669 FMC_SDRAM_WriteProtection_Enable(hsdram->Instance, hsdram->Init.SDBank);
lypinator 0:bb348c97df44 670
lypinator 0:bb348c97df44 671 /* Update the SDRAM state */
lypinator 0:bb348c97df44 672 hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED;
lypinator 0:bb348c97df44 673
lypinator 0:bb348c97df44 674 return HAL_OK;
lypinator 0:bb348c97df44 675 }
lypinator 0:bb348c97df44 676
lypinator 0:bb348c97df44 677 /**
lypinator 0:bb348c97df44 678 * @brief Disables dynamically SDRAM write protection.
lypinator 0:bb348c97df44 679 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 680 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 681 * @retval HAL status
lypinator 0:bb348c97df44 682 */
lypinator 0:bb348c97df44 683 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
lypinator 0:bb348c97df44 684 {
lypinator 0:bb348c97df44 685 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 686 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 687 {
lypinator 0:bb348c97df44 688 return HAL_BUSY;
lypinator 0:bb348c97df44 689 }
lypinator 0:bb348c97df44 690
lypinator 0:bb348c97df44 691 /* Update the SDRAM state */
lypinator 0:bb348c97df44 692 hsdram->State = HAL_SDRAM_STATE_BUSY;
lypinator 0:bb348c97df44 693
lypinator 0:bb348c97df44 694 /* Disable write protection */
lypinator 0:bb348c97df44 695 FMC_SDRAM_WriteProtection_Disable(hsdram->Instance, hsdram->Init.SDBank);
lypinator 0:bb348c97df44 696
lypinator 0:bb348c97df44 697 /* Update the SDRAM state */
lypinator 0:bb348c97df44 698 hsdram->State = HAL_SDRAM_STATE_READY;
lypinator 0:bb348c97df44 699
lypinator 0:bb348c97df44 700 return HAL_OK;
lypinator 0:bb348c97df44 701 }
lypinator 0:bb348c97df44 702
lypinator 0:bb348c97df44 703 /**
lypinator 0:bb348c97df44 704 * @brief Sends Command to the SDRAM bank.
lypinator 0:bb348c97df44 705 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 706 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 707 * @param Command SDRAM command structure
lypinator 0:bb348c97df44 708 * @param Timeout Timeout duration
lypinator 0:bb348c97df44 709 * @retval HAL status
lypinator 0:bb348c97df44 710 */
lypinator 0:bb348c97df44 711 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
lypinator 0:bb348c97df44 712 {
lypinator 0:bb348c97df44 713 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 714 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 715 {
lypinator 0:bb348c97df44 716 return HAL_BUSY;
lypinator 0:bb348c97df44 717 }
lypinator 0:bb348c97df44 718
lypinator 0:bb348c97df44 719 /* Update the SDRAM state */
lypinator 0:bb348c97df44 720 hsdram->State = HAL_SDRAM_STATE_BUSY;
lypinator 0:bb348c97df44 721
lypinator 0:bb348c97df44 722 /* Send SDRAM command */
lypinator 0:bb348c97df44 723 FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout);
lypinator 0:bb348c97df44 724
lypinator 0:bb348c97df44 725 /* Update the SDRAM controller state */
lypinator 0:bb348c97df44 726 if(Command->CommandMode == FMC_SDRAM_CMD_PALL)
lypinator 0:bb348c97df44 727 {
lypinator 0:bb348c97df44 728 hsdram->State = HAL_SDRAM_STATE_PRECHARGED;
lypinator 0:bb348c97df44 729 }
lypinator 0:bb348c97df44 730 else
lypinator 0:bb348c97df44 731 {
lypinator 0:bb348c97df44 732 hsdram->State = HAL_SDRAM_STATE_READY;
lypinator 0:bb348c97df44 733 }
lypinator 0:bb348c97df44 734
lypinator 0:bb348c97df44 735 return HAL_OK;
lypinator 0:bb348c97df44 736 }
lypinator 0:bb348c97df44 737
lypinator 0:bb348c97df44 738 /**
lypinator 0:bb348c97df44 739 * @brief Programs the SDRAM Memory Refresh rate.
lypinator 0:bb348c97df44 740 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 741 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 742 * @param RefreshRate The SDRAM refresh rate value
lypinator 0:bb348c97df44 743 * @retval HAL status
lypinator 0:bb348c97df44 744 */
lypinator 0:bb348c97df44 745 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
lypinator 0:bb348c97df44 746 {
lypinator 0:bb348c97df44 747 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 748 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 749 {
lypinator 0:bb348c97df44 750 return HAL_BUSY;
lypinator 0:bb348c97df44 751 }
lypinator 0:bb348c97df44 752
lypinator 0:bb348c97df44 753 /* Update the SDRAM state */
lypinator 0:bb348c97df44 754 hsdram->State = HAL_SDRAM_STATE_BUSY;
lypinator 0:bb348c97df44 755
lypinator 0:bb348c97df44 756 /* Program the refresh rate */
lypinator 0:bb348c97df44 757 FMC_SDRAM_ProgramRefreshRate(hsdram->Instance ,RefreshRate);
lypinator 0:bb348c97df44 758
lypinator 0:bb348c97df44 759 /* Update the SDRAM state */
lypinator 0:bb348c97df44 760 hsdram->State = HAL_SDRAM_STATE_READY;
lypinator 0:bb348c97df44 761
lypinator 0:bb348c97df44 762 return HAL_OK;
lypinator 0:bb348c97df44 763 }
lypinator 0:bb348c97df44 764
lypinator 0:bb348c97df44 765 /**
lypinator 0:bb348c97df44 766 * @brief Sets the Number of consecutive SDRAM Memory auto Refresh commands.
lypinator 0:bb348c97df44 767 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 768 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 769 * @param AutoRefreshNumber The SDRAM auto Refresh number
lypinator 0:bb348c97df44 770 * @retval HAL status
lypinator 0:bb348c97df44 771 */
lypinator 0:bb348c97df44 772 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber)
lypinator 0:bb348c97df44 773 {
lypinator 0:bb348c97df44 774 /* Check the SDRAM controller state */
lypinator 0:bb348c97df44 775 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
lypinator 0:bb348c97df44 776 {
lypinator 0:bb348c97df44 777 return HAL_BUSY;
lypinator 0:bb348c97df44 778 }
lypinator 0:bb348c97df44 779
lypinator 0:bb348c97df44 780 /* Update the SDRAM state */
lypinator 0:bb348c97df44 781 hsdram->State = HAL_SDRAM_STATE_BUSY;
lypinator 0:bb348c97df44 782
lypinator 0:bb348c97df44 783 /* Set the Auto-Refresh number */
lypinator 0:bb348c97df44 784 FMC_SDRAM_SetAutoRefreshNumber(hsdram->Instance ,AutoRefreshNumber);
lypinator 0:bb348c97df44 785
lypinator 0:bb348c97df44 786 /* Update the SDRAM state */
lypinator 0:bb348c97df44 787 hsdram->State = HAL_SDRAM_STATE_READY;
lypinator 0:bb348c97df44 788
lypinator 0:bb348c97df44 789 return HAL_OK;
lypinator 0:bb348c97df44 790 }
lypinator 0:bb348c97df44 791
lypinator 0:bb348c97df44 792 /**
lypinator 0:bb348c97df44 793 * @brief Returns the SDRAM memory current mode.
lypinator 0:bb348c97df44 794 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 795 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 796 * @retval The SDRAM memory mode.
lypinator 0:bb348c97df44 797 */
lypinator 0:bb348c97df44 798 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram)
lypinator 0:bb348c97df44 799 {
lypinator 0:bb348c97df44 800 /* Return the SDRAM memory current mode */
lypinator 0:bb348c97df44 801 return(FMC_SDRAM_GetModeStatus(hsdram->Instance, hsdram->Init.SDBank));
lypinator 0:bb348c97df44 802 }
lypinator 0:bb348c97df44 803
lypinator 0:bb348c97df44 804 /**
lypinator 0:bb348c97df44 805 * @}
lypinator 0:bb348c97df44 806 */
lypinator 0:bb348c97df44 807
lypinator 0:bb348c97df44 808 /** @defgroup SDRAM_Exported_Functions_Group4 State functions
lypinator 0:bb348c97df44 809 * @brief Peripheral State functions
lypinator 0:bb348c97df44 810 *
lypinator 0:bb348c97df44 811 @verbatim
lypinator 0:bb348c97df44 812 ==============================================================================
lypinator 0:bb348c97df44 813 ##### SDRAM State functions #####
lypinator 0:bb348c97df44 814 ==============================================================================
lypinator 0:bb348c97df44 815 [..]
lypinator 0:bb348c97df44 816 This subsection permits to get in run-time the status of the SDRAM controller
lypinator 0:bb348c97df44 817 and the data flow.
lypinator 0:bb348c97df44 818
lypinator 0:bb348c97df44 819 @endverbatim
lypinator 0:bb348c97df44 820 * @{
lypinator 0:bb348c97df44 821 */
lypinator 0:bb348c97df44 822
lypinator 0:bb348c97df44 823 /**
lypinator 0:bb348c97df44 824 * @brief Returns the SDRAM state.
lypinator 0:bb348c97df44 825 * @param hsdram pointer to a SDRAM_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 826 * the configuration information for SDRAM module.
lypinator 0:bb348c97df44 827 * @retval HAL state
lypinator 0:bb348c97df44 828 */
lypinator 0:bb348c97df44 829 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram)
lypinator 0:bb348c97df44 830 {
lypinator 0:bb348c97df44 831 return hsdram->State;
lypinator 0:bb348c97df44 832 }
lypinator 0:bb348c97df44 833
lypinator 0:bb348c97df44 834 /**
lypinator 0:bb348c97df44 835 * @}
lypinator 0:bb348c97df44 836 */
lypinator 0:bb348c97df44 837
lypinator 0:bb348c97df44 838 /**
lypinator 0:bb348c97df44 839 * @}
lypinator 0:bb348c97df44 840 */
lypinator 0:bb348c97df44 841 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
lypinator 0:bb348c97df44 842 #endif /* HAL_SDRAM_MODULE_ENABLED */
lypinator 0:bb348c97df44 843 /**
lypinator 0:bb348c97df44 844 * @}
lypinator 0:bb348c97df44 845 */
lypinator 0:bb348c97df44 846
lypinator 0:bb348c97df44 847 /**
lypinator 0:bb348c97df44 848 * @}
lypinator 0:bb348c97df44 849 */
lypinator 0:bb348c97df44 850
lypinator 0:bb348c97df44 851 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/