Initial commit

Dependencies:   FastPWM

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_sai_ex.c
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief SAI Extension HAL module driver.
lypinator 0:bb348c97df44 6 * This file provides firmware functions to manage the following
lypinator 0:bb348c97df44 7 * functionalities of SAI extension peripheral:
lypinator 0:bb348c97df44 8 * + Extension features functions
lypinator 0:bb348c97df44 9 *
lypinator 0:bb348c97df44 10 @verbatim
lypinator 0:bb348c97df44 11 ==============================================================================
lypinator 0:bb348c97df44 12 ##### SAI peripheral extension features #####
lypinator 0:bb348c97df44 13 ==============================================================================
lypinator 0:bb348c97df44 14
lypinator 0:bb348c97df44 15 [..] Comparing to other previous devices, the SAI interface for STM32F446xx
lypinator 0:bb348c97df44 16 devices contains the following additional features :
lypinator 0:bb348c97df44 17
lypinator 0:bb348c97df44 18 (+) Possibility to be clocked from PLLR
lypinator 0:bb348c97df44 19
lypinator 0:bb348c97df44 20 ##### How to use this driver #####
lypinator 0:bb348c97df44 21 ==============================================================================
lypinator 0:bb348c97df44 22 [..] This driver provides functions to manage several sources to clock SAI
lypinator 0:bb348c97df44 23
lypinator 0:bb348c97df44 24 @endverbatim
lypinator 0:bb348c97df44 25 ******************************************************************************
lypinator 0:bb348c97df44 26 * @attention
lypinator 0:bb348c97df44 27 *
lypinator 0:bb348c97df44 28 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 29 *
lypinator 0:bb348c97df44 30 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 31 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 32 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 33 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 34 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 35 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 36 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 37 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 38 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 39 * without specific prior written permission.
lypinator 0:bb348c97df44 40 *
lypinator 0:bb348c97df44 41 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 42 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 43 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 44 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 45 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 46 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 47 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 48 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 50 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 51 *
lypinator 0:bb348c97df44 52 ******************************************************************************
lypinator 0:bb348c97df44 53 */
lypinator 0:bb348c97df44 54
lypinator 0:bb348c97df44 55 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 56 #include "stm32f4xx_hal.h"
lypinator 0:bb348c97df44 57
lypinator 0:bb348c97df44 58 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 59 * @{
lypinator 0:bb348c97df44 60 */
lypinator 0:bb348c97df44 61
lypinator 0:bb348c97df44 62 /** @defgroup SAIEx SAIEx
lypinator 0:bb348c97df44 63 * @brief SAI Extension HAL module driver
lypinator 0:bb348c97df44 64 * @{
lypinator 0:bb348c97df44 65 */
lypinator 0:bb348c97df44 66
lypinator 0:bb348c97df44 67 #ifdef HAL_SAI_MODULE_ENABLED
lypinator 0:bb348c97df44 68
lypinator 0:bb348c97df44 69 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
lypinator 0:bb348c97df44 70 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || \
lypinator 0:bb348c97df44 71 defined(STM32F423xx)
lypinator 0:bb348c97df44 72
lypinator 0:bb348c97df44 73 /* Private typedef -----------------------------------------------------------*/
lypinator 0:bb348c97df44 74 /* Private define ------------------------------------------------------------*/
lypinator 0:bb348c97df44 75 /* SAI registers Masks */
lypinator 0:bb348c97df44 76 /* Private macro -------------------------------------------------------------*/
lypinator 0:bb348c97df44 77 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 78 /* Private function prototypes -----------------------------------------------*/
lypinator 0:bb348c97df44 79 /* Private functions ---------------------------------------------------------*/
lypinator 0:bb348c97df44 80
lypinator 0:bb348c97df44 81 /** @defgroup SAI_Private_Functions SAI Private Functions
lypinator 0:bb348c97df44 82 * @{
lypinator 0:bb348c97df44 83 */
lypinator 0:bb348c97df44 84 /**
lypinator 0:bb348c97df44 85 * @}
lypinator 0:bb348c97df44 86 */
lypinator 0:bb348c97df44 87
lypinator 0:bb348c97df44 88 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 89 /** @defgroup SAIEx_Exported_Functions SAI Extended Exported Functions
lypinator 0:bb348c97df44 90 * @{
lypinator 0:bb348c97df44 91 */
lypinator 0:bb348c97df44 92
lypinator 0:bb348c97df44 93 /** @defgroup SAIEx_Exported_Functions_Group1 Extension features functions
lypinator 0:bb348c97df44 94 * @brief Extension features functions
lypinator 0:bb348c97df44 95 *
lypinator 0:bb348c97df44 96 @verbatim
lypinator 0:bb348c97df44 97 ===============================================================================
lypinator 0:bb348c97df44 98 ##### Extension features Functions #####
lypinator 0:bb348c97df44 99 ===============================================================================
lypinator 0:bb348c97df44 100 [..]
lypinator 0:bb348c97df44 101 This subsection provides a set of functions allowing to manage the possible
lypinator 0:bb348c97df44 102 SAI clock sources.
lypinator 0:bb348c97df44 103
lypinator 0:bb348c97df44 104 @endverbatim
lypinator 0:bb348c97df44 105 * @{
lypinator 0:bb348c97df44 106 */
lypinator 0:bb348c97df44 107
lypinator 0:bb348c97df44 108 /**
lypinator 0:bb348c97df44 109 * @brief Configure SAI Block synchronization mode
lypinator 0:bb348c97df44 110 * @param hsai pointer to a SAI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 111 * the configuration information for SAI module.
lypinator 0:bb348c97df44 112 * @retval SAI Clock Input
lypinator 0:bb348c97df44 113 */
lypinator 0:bb348c97df44 114 void SAI_BlockSynchroConfig(SAI_HandleTypeDef *hsai)
lypinator 0:bb348c97df44 115 {
lypinator 0:bb348c97df44 116 uint32_t tmpregisterGCR = 0U;
lypinator 0:bb348c97df44 117
lypinator 0:bb348c97df44 118 #if defined(STM32F446xx)
lypinator 0:bb348c97df44 119 /* This setting must be done with both audio block (A & B) disabled */
lypinator 0:bb348c97df44 120 switch(hsai->Init.SynchroExt)
lypinator 0:bb348c97df44 121 {
lypinator 0:bb348c97df44 122 case SAI_SYNCEXT_DISABLE :
lypinator 0:bb348c97df44 123 tmpregisterGCR = 0U;
lypinator 0:bb348c97df44 124 break;
lypinator 0:bb348c97df44 125 case SAI_SYNCEXT_OUTBLOCKA_ENABLE :
lypinator 0:bb348c97df44 126 tmpregisterGCR = SAI_GCR_SYNCOUT_0;
lypinator 0:bb348c97df44 127 break;
lypinator 0:bb348c97df44 128 case SAI_SYNCEXT_OUTBLOCKB_ENABLE :
lypinator 0:bb348c97df44 129 tmpregisterGCR = SAI_GCR_SYNCOUT_1;
lypinator 0:bb348c97df44 130 break;
lypinator 0:bb348c97df44 131 default:
lypinator 0:bb348c97df44 132 break;
lypinator 0:bb348c97df44 133 }
lypinator 0:bb348c97df44 134
lypinator 0:bb348c97df44 135 if((hsai->Init.Synchro) == SAI_SYNCHRONOUS_EXT_SAI2)
lypinator 0:bb348c97df44 136 {
lypinator 0:bb348c97df44 137 tmpregisterGCR |= SAI_GCR_SYNCIN_0;
lypinator 0:bb348c97df44 138 }
lypinator 0:bb348c97df44 139
lypinator 0:bb348c97df44 140 if((hsai->Instance == SAI1_Block_A) || (hsai->Instance == SAI1_Block_B))
lypinator 0:bb348c97df44 141 {
lypinator 0:bb348c97df44 142 SAI1->GCR = tmpregisterGCR;
lypinator 0:bb348c97df44 143 }
lypinator 0:bb348c97df44 144 else
lypinator 0:bb348c97df44 145 {
lypinator 0:bb348c97df44 146 SAI2->GCR = tmpregisterGCR;
lypinator 0:bb348c97df44 147 }
lypinator 0:bb348c97df44 148 #endif /* STM32F446xx */
lypinator 0:bb348c97df44 149 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
lypinator 0:bb348c97df44 150 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx)
lypinator 0:bb348c97df44 151 /* This setting must be done with both audio block (A & B) disabled */
lypinator 0:bb348c97df44 152 switch(hsai->Init.SynchroExt)
lypinator 0:bb348c97df44 153 {
lypinator 0:bb348c97df44 154 case SAI_SYNCEXT_DISABLE :
lypinator 0:bb348c97df44 155 tmpregisterGCR = 0U;
lypinator 0:bb348c97df44 156 break;
lypinator 0:bb348c97df44 157 case SAI_SYNCEXT_OUTBLOCKA_ENABLE :
lypinator 0:bb348c97df44 158 tmpregisterGCR = SAI_GCR_SYNCOUT_0;
lypinator 0:bb348c97df44 159 break;
lypinator 0:bb348c97df44 160 case SAI_SYNCEXT_OUTBLOCKB_ENABLE :
lypinator 0:bb348c97df44 161 tmpregisterGCR = SAI_GCR_SYNCOUT_1;
lypinator 0:bb348c97df44 162 break;
lypinator 0:bb348c97df44 163 default:
lypinator 0:bb348c97df44 164 break;
lypinator 0:bb348c97df44 165 }
lypinator 0:bb348c97df44 166 SAI1->GCR = tmpregisterGCR;
lypinator 0:bb348c97df44 167 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
lypinator 0:bb348c97df44 168 }
lypinator 0:bb348c97df44 169 /**
lypinator 0:bb348c97df44 170 * @brief Get SAI Input Clock based on SAI source clock selection
lypinator 0:bb348c97df44 171 * @param hsai pointer to a SAI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 172 * the configuration information for SAI module.
lypinator 0:bb348c97df44 173 * @retval SAI Clock Input
lypinator 0:bb348c97df44 174 */
lypinator 0:bb348c97df44 175 uint32_t SAI_GetInputClock(SAI_HandleTypeDef *hsai)
lypinator 0:bb348c97df44 176 {
lypinator 0:bb348c97df44 177 /* This variable used to store the SAI_CK_x (value in Hz) */
lypinator 0:bb348c97df44 178 uint32_t saiclocksource = 0U;
lypinator 0:bb348c97df44 179
lypinator 0:bb348c97df44 180 #if defined(STM32F446xx)
lypinator 0:bb348c97df44 181 if ((hsai->Instance == SAI1_Block_A) || (hsai->Instance == SAI1_Block_B))
lypinator 0:bb348c97df44 182 {
lypinator 0:bb348c97df44 183 saiclocksource = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI1);
lypinator 0:bb348c97df44 184 }
lypinator 0:bb348c97df44 185 else /* SAI2_Block_A || SAI2_Block_B*/
lypinator 0:bb348c97df44 186 {
lypinator 0:bb348c97df44 187 saiclocksource = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SAI2);
lypinator 0:bb348c97df44 188 }
lypinator 0:bb348c97df44 189 #endif /* STM32F446xx */
lypinator 0:bb348c97df44 190 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
lypinator 0:bb348c97df44 191 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F413xx) || defined(STM32F423xx)
lypinator 0:bb348c97df44 192 uint32_t vcoinput = 0U, tmpreg = 0U;
lypinator 0:bb348c97df44 193
lypinator 0:bb348c97df44 194 /* Check the SAI Block parameters */
lypinator 0:bb348c97df44 195 assert_param(IS_SAI_CLK_SOURCE(hsai->Init.ClockSource));
lypinator 0:bb348c97df44 196
lypinator 0:bb348c97df44 197 /* SAI Block clock source selection */
lypinator 0:bb348c97df44 198 if(hsai->Instance == SAI1_Block_A)
lypinator 0:bb348c97df44 199 {
lypinator 0:bb348c97df44 200 __HAL_RCC_SAI_BLOCKACLKSOURCE_CONFIG(hsai->Init.ClockSource);
lypinator 0:bb348c97df44 201 }
lypinator 0:bb348c97df44 202 else
lypinator 0:bb348c97df44 203 {
lypinator 0:bb348c97df44 204 __HAL_RCC_SAI_BLOCKBCLKSOURCE_CONFIG((uint32_t)(hsai->Init.ClockSource << 2U));
lypinator 0:bb348c97df44 205 }
lypinator 0:bb348c97df44 206
lypinator 0:bb348c97df44 207 /* VCO Input Clock value calculation */
lypinator 0:bb348c97df44 208 if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
lypinator 0:bb348c97df44 209 {
lypinator 0:bb348c97df44 210 /* In Case the PLL Source is HSI (Internal Clock) */
lypinator 0:bb348c97df44 211 vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
lypinator 0:bb348c97df44 212 }
lypinator 0:bb348c97df44 213 else
lypinator 0:bb348c97df44 214 {
lypinator 0:bb348c97df44 215 /* In Case the PLL Source is HSE (External Clock) */
lypinator 0:bb348c97df44 216 vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM)));
lypinator 0:bb348c97df44 217 }
lypinator 0:bb348c97df44 218 #if defined(STM32F413xx) || defined(STM32F423xx)
lypinator 0:bb348c97df44 219 /* SAI_CLK_x : SAI Block Clock configuration for different clock sources selected */
lypinator 0:bb348c97df44 220 if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLR)
lypinator 0:bb348c97df44 221 {
lypinator 0:bb348c97df44 222 /* Configure the PLLI2S division factor */
lypinator 0:bb348c97df44 223 /* PLL_VCO Input = PLL_SOURCE/PLLM */
lypinator 0:bb348c97df44 224 /* PLL_VCO Output = PLL_VCO Input * PLLN */
lypinator 0:bb348c97df44 225 /* SAI_CLK(first level) = PLL_VCO Output/PLLR */
lypinator 0:bb348c97df44 226 tmpreg = (RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 28U;
lypinator 0:bb348c97df44 227 saiclocksource = (vcoinput * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6U))/(tmpreg);
lypinator 0:bb348c97df44 228
lypinator 0:bb348c97df44 229 /* SAI_CLK_x = SAI_CLK(first level)/PLLDIVR */
lypinator 0:bb348c97df44 230 tmpreg = (((RCC->DCKCFGR & RCC_DCKCFGR_PLLDIVR) >> 8U) + 1U);
lypinator 0:bb348c97df44 231
lypinator 0:bb348c97df44 232 saiclocksource = saiclocksource/(tmpreg);
lypinator 0:bb348c97df44 233
lypinator 0:bb348c97df44 234 }
lypinator 0:bb348c97df44 235 else if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLI2S)
lypinator 0:bb348c97df44 236 {
lypinator 0:bb348c97df44 237 /* Configure the PLLI2S division factor */
lypinator 0:bb348c97df44 238 /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
lypinator 0:bb348c97df44 239 /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
lypinator 0:bb348c97df44 240 /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SR */
lypinator 0:bb348c97df44 241 tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28U;
lypinator 0:bb348c97df44 242 saiclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U))/(tmpreg);
lypinator 0:bb348c97df44 243
lypinator 0:bb348c97df44 244 /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVR */
lypinator 0:bb348c97df44 245 tmpreg = ((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVR) + 1U);
lypinator 0:bb348c97df44 246 saiclocksource = saiclocksource/(tmpreg);
lypinator 0:bb348c97df44 247 }
lypinator 0:bb348c97df44 248 else if(hsai->Init.ClockSource == SAI_CLKSOURCE_HS)
lypinator 0:bb348c97df44 249 {
lypinator 0:bb348c97df44 250 if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
lypinator 0:bb348c97df44 251 {
lypinator 0:bb348c97df44 252 /* Get the I2S source clock value */
lypinator 0:bb348c97df44 253 saiclocksource = (uint32_t)(HSE_VALUE);
lypinator 0:bb348c97df44 254 }
lypinator 0:bb348c97df44 255 else
lypinator 0:bb348c97df44 256 {
lypinator 0:bb348c97df44 257 /* Get the I2S source clock value */
lypinator 0:bb348c97df44 258 saiclocksource = (uint32_t)(HSI_VALUE);
lypinator 0:bb348c97df44 259 }
lypinator 0:bb348c97df44 260 }
lypinator 0:bb348c97df44 261 else /* sConfig->ClockSource == SAI_CLKSource_Ext */
lypinator 0:bb348c97df44 262 {
lypinator 0:bb348c97df44 263 saiclocksource = EXTERNAL_CLOCK_VALUE;
lypinator 0:bb348c97df44 264 }
lypinator 0:bb348c97df44 265 #else
lypinator 0:bb348c97df44 266 /* SAI_CLK_x : SAI Block Clock configuration for different clock sources selected */
lypinator 0:bb348c97df44 267 if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLSAI)
lypinator 0:bb348c97df44 268 {
lypinator 0:bb348c97df44 269 /* Configure the PLLI2S division factor */
lypinator 0:bb348c97df44 270 /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
lypinator 0:bb348c97df44 271 /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
lypinator 0:bb348c97df44 272 /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
lypinator 0:bb348c97df44 273 tmpreg = (RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> 24U;
lypinator 0:bb348c97df44 274 saiclocksource = (vcoinput * ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIN) >> 6U))/(tmpreg);
lypinator 0:bb348c97df44 275
lypinator 0:bb348c97df44 276 /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
lypinator 0:bb348c97df44 277 tmpreg = (((RCC->DCKCFGR & RCC_DCKCFGR_PLLSAIDIVQ) >> 8U) + 1U);
lypinator 0:bb348c97df44 278 saiclocksource = saiclocksource/(tmpreg);
lypinator 0:bb348c97df44 279
lypinator 0:bb348c97df44 280 }
lypinator 0:bb348c97df44 281 else if(hsai->Init.ClockSource == SAI_CLKSOURCE_PLLI2S)
lypinator 0:bb348c97df44 282 {
lypinator 0:bb348c97df44 283 /* Configure the PLLI2S division factor */
lypinator 0:bb348c97df44 284 /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */
lypinator 0:bb348c97df44 285 /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
lypinator 0:bb348c97df44 286 /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
lypinator 0:bb348c97df44 287 tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> 24U;
lypinator 0:bb348c97df44 288 saiclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6U))/(tmpreg);
lypinator 0:bb348c97df44 289
lypinator 0:bb348c97df44 290 /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
lypinator 0:bb348c97df44 291 tmpreg = ((RCC->DCKCFGR & RCC_DCKCFGR_PLLI2SDIVQ) + 1U);
lypinator 0:bb348c97df44 292 saiclocksource = saiclocksource/(tmpreg);
lypinator 0:bb348c97df44 293 }
lypinator 0:bb348c97df44 294 else /* sConfig->ClockSource == SAI_CLKSource_Ext */
lypinator 0:bb348c97df44 295 {
lypinator 0:bb348c97df44 296 /* Enable the External Clock selection */
lypinator 0:bb348c97df44 297 __HAL_RCC_I2S_CONFIG(RCC_I2SCLKSOURCE_EXT);
lypinator 0:bb348c97df44 298
lypinator 0:bb348c97df44 299 saiclocksource = EXTERNAL_CLOCK_VALUE;
lypinator 0:bb348c97df44 300 }
lypinator 0:bb348c97df44 301 #endif /* STM32F413xx || STM32F423xx */
lypinator 0:bb348c97df44 302 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
lypinator 0:bb348c97df44 303 /* the return result is the value of SAI clock */
lypinator 0:bb348c97df44 304 return saiclocksource;
lypinator 0:bb348c97df44 305 }
lypinator 0:bb348c97df44 306
lypinator 0:bb348c97df44 307 /**
lypinator 0:bb348c97df44 308 * @}
lypinator 0:bb348c97df44 309 */
lypinator 0:bb348c97df44 310
lypinator 0:bb348c97df44 311 /**
lypinator 0:bb348c97df44 312 * @}
lypinator 0:bb348c97df44 313 */
lypinator 0:bb348c97df44 314
lypinator 0:bb348c97df44 315 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx || STM32F413xx || STM32F423xx */
lypinator 0:bb348c97df44 316 #endif /* HAL_SAI_MODULE_ENABLED */
lypinator 0:bb348c97df44 317 /**
lypinator 0:bb348c97df44 318 * @}
lypinator 0:bb348c97df44 319 */
lypinator 0:bb348c97df44 320
lypinator 0:bb348c97df44 321 /**
lypinator 0:bb348c97df44 322 * @}
lypinator 0:bb348c97df44 323 */
lypinator 0:bb348c97df44 324
lypinator 0:bb348c97df44 325 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/