Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_pwr.h@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_pwr.h
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief Header file of PWR HAL module.
lypinator 0:bb348c97df44 6 ******************************************************************************
lypinator 0:bb348c97df44 7 * @attention
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 10 *
lypinator 0:bb348c97df44 11 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 12 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 13 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 14 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 16 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 17 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 19 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 20 * without specific prior written permission.
lypinator 0:bb348c97df44 21 *
lypinator 0:bb348c97df44 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 32 *
lypinator 0:bb348c97df44 33 ******************************************************************************
lypinator 0:bb348c97df44 34 */
lypinator 0:bb348c97df44 35
lypinator 0:bb348c97df44 36 /* Define to prevent recursive inclusion -------------------------------------*/
lypinator 0:bb348c97df44 37 #ifndef __STM32F4xx_HAL_PWR_H
lypinator 0:bb348c97df44 38 #define __STM32F4xx_HAL_PWR_H
lypinator 0:bb348c97df44 39
lypinator 0:bb348c97df44 40 #ifdef __cplusplus
lypinator 0:bb348c97df44 41 extern "C" {
lypinator 0:bb348c97df44 42 #endif
lypinator 0:bb348c97df44 43
lypinator 0:bb348c97df44 44 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 45 #include "stm32f4xx_hal_def.h"
lypinator 0:bb348c97df44 46
lypinator 0:bb348c97df44 47 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 48 * @{
lypinator 0:bb348c97df44 49 */
lypinator 0:bb348c97df44 50
lypinator 0:bb348c97df44 51 /** @addtogroup PWR
lypinator 0:bb348c97df44 52 * @{
lypinator 0:bb348c97df44 53 */
lypinator 0:bb348c97df44 54
lypinator 0:bb348c97df44 55 /* Exported types ------------------------------------------------------------*/
lypinator 0:bb348c97df44 56
lypinator 0:bb348c97df44 57 /** @defgroup PWR_Exported_Types PWR Exported Types
lypinator 0:bb348c97df44 58 * @{
lypinator 0:bb348c97df44 59 */
lypinator 0:bb348c97df44 60
lypinator 0:bb348c97df44 61 /**
lypinator 0:bb348c97df44 62 * @brief PWR PVD configuration structure definition
lypinator 0:bb348c97df44 63 */
lypinator 0:bb348c97df44 64 typedef struct
lypinator 0:bb348c97df44 65 {
lypinator 0:bb348c97df44 66 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
lypinator 0:bb348c97df44 67 This parameter can be a value of @ref PWR_PVD_detection_level */
lypinator 0:bb348c97df44 68
lypinator 0:bb348c97df44 69 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
lypinator 0:bb348c97df44 70 This parameter can be a value of @ref PWR_PVD_Mode */
lypinator 0:bb348c97df44 71 }PWR_PVDTypeDef;
lypinator 0:bb348c97df44 72
lypinator 0:bb348c97df44 73 /**
lypinator 0:bb348c97df44 74 * @}
lypinator 0:bb348c97df44 75 */
lypinator 0:bb348c97df44 76
lypinator 0:bb348c97df44 77 /* Exported constants --------------------------------------------------------*/
lypinator 0:bb348c97df44 78 /** @defgroup PWR_Exported_Constants PWR Exported Constants
lypinator 0:bb348c97df44 79 * @{
lypinator 0:bb348c97df44 80 */
lypinator 0:bb348c97df44 81
lypinator 0:bb348c97df44 82 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
lypinator 0:bb348c97df44 83 * @{
lypinator 0:bb348c97df44 84 */
lypinator 0:bb348c97df44 85 #define PWR_WAKEUP_PIN1 0x00000100U
lypinator 0:bb348c97df44 86 /**
lypinator 0:bb348c97df44 87 * @}
lypinator 0:bb348c97df44 88 */
lypinator 0:bb348c97df44 89
lypinator 0:bb348c97df44 90 /** @defgroup PWR_PVD_detection_level PWR PVD detection level
lypinator 0:bb348c97df44 91 * @{
lypinator 0:bb348c97df44 92 */
lypinator 0:bb348c97df44 93 #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
lypinator 0:bb348c97df44 94 #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
lypinator 0:bb348c97df44 95 #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
lypinator 0:bb348c97df44 96 #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
lypinator 0:bb348c97df44 97 #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
lypinator 0:bb348c97df44 98 #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
lypinator 0:bb348c97df44 99 #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
lypinator 0:bb348c97df44 100 #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
lypinator 0:bb348c97df44 101 (Compare internally to VREFINT) */
lypinator 0:bb348c97df44 102 /**
lypinator 0:bb348c97df44 103 * @}
lypinator 0:bb348c97df44 104 */
lypinator 0:bb348c97df44 105
lypinator 0:bb348c97df44 106 /** @defgroup PWR_PVD_Mode PWR PVD Mode
lypinator 0:bb348c97df44 107 * @{
lypinator 0:bb348c97df44 108 */
lypinator 0:bb348c97df44 109 #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */
lypinator 0:bb348c97df44 110 #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */
lypinator 0:bb348c97df44 111 #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */
lypinator 0:bb348c97df44 112 #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
lypinator 0:bb348c97df44 113 #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */
lypinator 0:bb348c97df44 114 #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */
lypinator 0:bb348c97df44 115 #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */
lypinator 0:bb348c97df44 116 /**
lypinator 0:bb348c97df44 117 * @}
lypinator 0:bb348c97df44 118 */
lypinator 0:bb348c97df44 119
lypinator 0:bb348c97df44 120
lypinator 0:bb348c97df44 121 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
lypinator 0:bb348c97df44 122 * @{
lypinator 0:bb348c97df44 123 */
lypinator 0:bb348c97df44 124 #define PWR_MAINREGULATOR_ON 0x00000000U
lypinator 0:bb348c97df44 125 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
lypinator 0:bb348c97df44 126 /**
lypinator 0:bb348c97df44 127 * @}
lypinator 0:bb348c97df44 128 */
lypinator 0:bb348c97df44 129
lypinator 0:bb348c97df44 130 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
lypinator 0:bb348c97df44 131 * @{
lypinator 0:bb348c97df44 132 */
lypinator 0:bb348c97df44 133 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
lypinator 0:bb348c97df44 134 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
lypinator 0:bb348c97df44 135 /**
lypinator 0:bb348c97df44 136 * @}
lypinator 0:bb348c97df44 137 */
lypinator 0:bb348c97df44 138
lypinator 0:bb348c97df44 139 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
lypinator 0:bb348c97df44 140 * @{
lypinator 0:bb348c97df44 141 */
lypinator 0:bb348c97df44 142 #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
lypinator 0:bb348c97df44 143 #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
lypinator 0:bb348c97df44 144 /**
lypinator 0:bb348c97df44 145 * @}
lypinator 0:bb348c97df44 146 */
lypinator 0:bb348c97df44 147
lypinator 0:bb348c97df44 148 /** @defgroup PWR_Flag PWR Flag
lypinator 0:bb348c97df44 149 * @{
lypinator 0:bb348c97df44 150 */
lypinator 0:bb348c97df44 151 #define PWR_FLAG_WU PWR_CSR_WUF
lypinator 0:bb348c97df44 152 #define PWR_FLAG_SB PWR_CSR_SBF
lypinator 0:bb348c97df44 153 #define PWR_FLAG_PVDO PWR_CSR_PVDO
lypinator 0:bb348c97df44 154 #define PWR_FLAG_BRR PWR_CSR_BRR
lypinator 0:bb348c97df44 155 #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
lypinator 0:bb348c97df44 156 /**
lypinator 0:bb348c97df44 157 * @}
lypinator 0:bb348c97df44 158 */
lypinator 0:bb348c97df44 159
lypinator 0:bb348c97df44 160 /**
lypinator 0:bb348c97df44 161 * @}
lypinator 0:bb348c97df44 162 */
lypinator 0:bb348c97df44 163
lypinator 0:bb348c97df44 164 /* Exported macro ------------------------------------------------------------*/
lypinator 0:bb348c97df44 165 /** @defgroup PWR_Exported_Macro PWR Exported Macro
lypinator 0:bb348c97df44 166 * @{
lypinator 0:bb348c97df44 167 */
lypinator 0:bb348c97df44 168
lypinator 0:bb348c97df44 169 /** @brief Check PWR flag is set or not.
lypinator 0:bb348c97df44 170 * @param __FLAG__ specifies the flag to check.
lypinator 0:bb348c97df44 171 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 172 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
lypinator 0:bb348c97df44 173 * was received from the WKUP pin or from the RTC alarm (Alarm A
lypinator 0:bb348c97df44 174 * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
lypinator 0:bb348c97df44 175 * An additional wakeup event is detected if the WKUP pin is enabled
lypinator 0:bb348c97df44 176 * (by setting the EWUP bit) when the WKUP pin level is already high.
lypinator 0:bb348c97df44 177 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
lypinator 0:bb348c97df44 178 * resumed from StandBy mode.
lypinator 0:bb348c97df44 179 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
lypinator 0:bb348c97df44 180 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
lypinator 0:bb348c97df44 181 * For this reason, this bit is equal to 0 after Standby or reset
lypinator 0:bb348c97df44 182 * until the PVDE bit is set.
lypinator 0:bb348c97df44 183 * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
lypinator 0:bb348c97df44 184 * when the device wakes up from Standby mode or by a system reset
lypinator 0:bb348c97df44 185 * or power reset.
lypinator 0:bb348c97df44 186 * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
lypinator 0:bb348c97df44 187 * scaling output selection is ready.
lypinator 0:bb348c97df44 188 * @retval The new state of __FLAG__ (TRUE or FALSE).
lypinator 0:bb348c97df44 189 */
lypinator 0:bb348c97df44 190 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
lypinator 0:bb348c97df44 191
lypinator 0:bb348c97df44 192 /** @brief Clear the PWR's pending flags.
lypinator 0:bb348c97df44 193 * @param __FLAG__ specifies the flag to clear.
lypinator 0:bb348c97df44 194 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 195 * @arg PWR_FLAG_WU: Wake Up flag
lypinator 0:bb348c97df44 196 * @arg PWR_FLAG_SB: StandBy flag
lypinator 0:bb348c97df44 197 */
lypinator 0:bb348c97df44 198 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
lypinator 0:bb348c97df44 199
lypinator 0:bb348c97df44 200 /**
lypinator 0:bb348c97df44 201 * @brief Enable the PVD Exti Line 16.
lypinator 0:bb348c97df44 202 * @retval None.
lypinator 0:bb348c97df44 203 */
lypinator 0:bb348c97df44 204 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
lypinator 0:bb348c97df44 205
lypinator 0:bb348c97df44 206 /**
lypinator 0:bb348c97df44 207 * @brief Disable the PVD EXTI Line 16.
lypinator 0:bb348c97df44 208 * @retval None.
lypinator 0:bb348c97df44 209 */
lypinator 0:bb348c97df44 210 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
lypinator 0:bb348c97df44 211
lypinator 0:bb348c97df44 212 /**
lypinator 0:bb348c97df44 213 * @brief Enable event on PVD Exti Line 16.
lypinator 0:bb348c97df44 214 * @retval None.
lypinator 0:bb348c97df44 215 */
lypinator 0:bb348c97df44 216 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
lypinator 0:bb348c97df44 217
lypinator 0:bb348c97df44 218 /**
lypinator 0:bb348c97df44 219 * @brief Disable event on PVD Exti Line 16.
lypinator 0:bb348c97df44 220 * @retval None.
lypinator 0:bb348c97df44 221 */
lypinator 0:bb348c97df44 222 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
lypinator 0:bb348c97df44 223
lypinator 0:bb348c97df44 224 /**
lypinator 0:bb348c97df44 225 * @brief Enable the PVD Extended Interrupt Rising Trigger.
lypinator 0:bb348c97df44 226 * @retval None.
lypinator 0:bb348c97df44 227 */
lypinator 0:bb348c97df44 228 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
lypinator 0:bb348c97df44 229
lypinator 0:bb348c97df44 230 /**
lypinator 0:bb348c97df44 231 * @brief Disable the PVD Extended Interrupt Rising Trigger.
lypinator 0:bb348c97df44 232 * @retval None.
lypinator 0:bb348c97df44 233 */
lypinator 0:bb348c97df44 234 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
lypinator 0:bb348c97df44 235
lypinator 0:bb348c97df44 236 /**
lypinator 0:bb348c97df44 237 * @brief Enable the PVD Extended Interrupt Falling Trigger.
lypinator 0:bb348c97df44 238 * @retval None.
lypinator 0:bb348c97df44 239 */
lypinator 0:bb348c97df44 240 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
lypinator 0:bb348c97df44 241
lypinator 0:bb348c97df44 242
lypinator 0:bb348c97df44 243 /**
lypinator 0:bb348c97df44 244 * @brief Disable the PVD Extended Interrupt Falling Trigger.
lypinator 0:bb348c97df44 245 * @retval None.
lypinator 0:bb348c97df44 246 */
lypinator 0:bb348c97df44 247 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
lypinator 0:bb348c97df44 248
lypinator 0:bb348c97df44 249
lypinator 0:bb348c97df44 250 /**
lypinator 0:bb348c97df44 251 * @brief PVD EXTI line configuration: set rising & falling edge trigger.
lypinator 0:bb348c97df44 252 * @retval None.
lypinator 0:bb348c97df44 253 */
lypinator 0:bb348c97df44 254 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
lypinator 0:bb348c97df44 255 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
lypinator 0:bb348c97df44 256 }while(0U)
lypinator 0:bb348c97df44 257
lypinator 0:bb348c97df44 258 /**
lypinator 0:bb348c97df44 259 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
lypinator 0:bb348c97df44 260 * This parameter can be:
lypinator 0:bb348c97df44 261 * @retval None.
lypinator 0:bb348c97df44 262 */
lypinator 0:bb348c97df44 263 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
lypinator 0:bb348c97df44 264 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
lypinator 0:bb348c97df44 265 }while(0U)
lypinator 0:bb348c97df44 266
lypinator 0:bb348c97df44 267 /**
lypinator 0:bb348c97df44 268 * @brief checks whether the specified PVD Exti interrupt flag is set or not.
lypinator 0:bb348c97df44 269 * @retval EXTI PVD Line Status.
lypinator 0:bb348c97df44 270 */
lypinator 0:bb348c97df44 271 #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
lypinator 0:bb348c97df44 272
lypinator 0:bb348c97df44 273 /**
lypinator 0:bb348c97df44 274 * @brief Clear the PVD Exti flag.
lypinator 0:bb348c97df44 275 * @retval None.
lypinator 0:bb348c97df44 276 */
lypinator 0:bb348c97df44 277 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
lypinator 0:bb348c97df44 278
lypinator 0:bb348c97df44 279 /**
lypinator 0:bb348c97df44 280 * @brief Generates a Software interrupt on PVD EXTI line.
lypinator 0:bb348c97df44 281 * @retval None
lypinator 0:bb348c97df44 282 */
lypinator 0:bb348c97df44 283 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
lypinator 0:bb348c97df44 284
lypinator 0:bb348c97df44 285 /**
lypinator 0:bb348c97df44 286 * @}
lypinator 0:bb348c97df44 287 */
lypinator 0:bb348c97df44 288
lypinator 0:bb348c97df44 289 /* Include PWR HAL Extension module */
lypinator 0:bb348c97df44 290 #include "stm32f4xx_hal_pwr_ex.h"
lypinator 0:bb348c97df44 291
lypinator 0:bb348c97df44 292 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 293 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
lypinator 0:bb348c97df44 294 * @{
lypinator 0:bb348c97df44 295 */
lypinator 0:bb348c97df44 296
lypinator 0:bb348c97df44 297 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
lypinator 0:bb348c97df44 298 * @{
lypinator 0:bb348c97df44 299 */
lypinator 0:bb348c97df44 300 /* Initialization and de-initialization functions *****************************/
lypinator 0:bb348c97df44 301 void HAL_PWR_DeInit(void);
lypinator 0:bb348c97df44 302 void HAL_PWR_EnableBkUpAccess(void);
lypinator 0:bb348c97df44 303 void HAL_PWR_DisableBkUpAccess(void);
lypinator 0:bb348c97df44 304 /**
lypinator 0:bb348c97df44 305 * @}
lypinator 0:bb348c97df44 306 */
lypinator 0:bb348c97df44 307
lypinator 0:bb348c97df44 308 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
lypinator 0:bb348c97df44 309 * @{
lypinator 0:bb348c97df44 310 */
lypinator 0:bb348c97df44 311 /* Peripheral Control functions **********************************************/
lypinator 0:bb348c97df44 312 /* PVD configuration */
lypinator 0:bb348c97df44 313 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
lypinator 0:bb348c97df44 314 void HAL_PWR_EnablePVD(void);
lypinator 0:bb348c97df44 315 void HAL_PWR_DisablePVD(void);
lypinator 0:bb348c97df44 316
lypinator 0:bb348c97df44 317 /* WakeUp pins configuration */
lypinator 0:bb348c97df44 318 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
lypinator 0:bb348c97df44 319 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
lypinator 0:bb348c97df44 320
lypinator 0:bb348c97df44 321 /* Low Power modes entry */
lypinator 0:bb348c97df44 322 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
lypinator 0:bb348c97df44 323 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
lypinator 0:bb348c97df44 324 void HAL_PWR_EnterSTANDBYMode(void);
lypinator 0:bb348c97df44 325
lypinator 0:bb348c97df44 326 /* Power PVD IRQ Handler */
lypinator 0:bb348c97df44 327 void HAL_PWR_PVD_IRQHandler(void);
lypinator 0:bb348c97df44 328 void HAL_PWR_PVDCallback(void);
lypinator 0:bb348c97df44 329
lypinator 0:bb348c97df44 330 /* Cortex System Control functions *******************************************/
lypinator 0:bb348c97df44 331 void HAL_PWR_EnableSleepOnExit(void);
lypinator 0:bb348c97df44 332 void HAL_PWR_DisableSleepOnExit(void);
lypinator 0:bb348c97df44 333 void HAL_PWR_EnableSEVOnPend(void);
lypinator 0:bb348c97df44 334 void HAL_PWR_DisableSEVOnPend(void);
lypinator 0:bb348c97df44 335 /**
lypinator 0:bb348c97df44 336 * @}
lypinator 0:bb348c97df44 337 */
lypinator 0:bb348c97df44 338
lypinator 0:bb348c97df44 339 /**
lypinator 0:bb348c97df44 340 * @}
lypinator 0:bb348c97df44 341 */
lypinator 0:bb348c97df44 342
lypinator 0:bb348c97df44 343 /* Private types -------------------------------------------------------------*/
lypinator 0:bb348c97df44 344 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 345 /* Private constants ---------------------------------------------------------*/
lypinator 0:bb348c97df44 346 /** @defgroup PWR_Private_Constants PWR Private Constants
lypinator 0:bb348c97df44 347 * @{
lypinator 0:bb348c97df44 348 */
lypinator 0:bb348c97df44 349
lypinator 0:bb348c97df44 350 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
lypinator 0:bb348c97df44 351 * @{
lypinator 0:bb348c97df44 352 */
lypinator 0:bb348c97df44 353 #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
lypinator 0:bb348c97df44 354 /**
lypinator 0:bb348c97df44 355 * @}
lypinator 0:bb348c97df44 356 */
lypinator 0:bb348c97df44 357
lypinator 0:bb348c97df44 358 /** @defgroup PWR_register_alias_address PWR Register alias address
lypinator 0:bb348c97df44 359 * @{
lypinator 0:bb348c97df44 360 */
lypinator 0:bb348c97df44 361 /* ------------- PWR registers bit address in the alias region ---------------*/
lypinator 0:bb348c97df44 362 #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
lypinator 0:bb348c97df44 363 #define PWR_CR_OFFSET 0x00U
lypinator 0:bb348c97df44 364 #define PWR_CSR_OFFSET 0x04U
lypinator 0:bb348c97df44 365 #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
lypinator 0:bb348c97df44 366 #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
lypinator 0:bb348c97df44 367 /**
lypinator 0:bb348c97df44 368 * @}
lypinator 0:bb348c97df44 369 */
lypinator 0:bb348c97df44 370
lypinator 0:bb348c97df44 371 /** @defgroup PWR_CR_register_alias PWR CR Register alias address
lypinator 0:bb348c97df44 372 * @{
lypinator 0:bb348c97df44 373 */
lypinator 0:bb348c97df44 374 /* --- CR Register ---*/
lypinator 0:bb348c97df44 375 /* Alias word address of DBP bit */
lypinator 0:bb348c97df44 376 #define DBP_BIT_NUMBER PWR_CR_DBP_Pos
lypinator 0:bb348c97df44 377 #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
lypinator 0:bb348c97df44 378
lypinator 0:bb348c97df44 379 /* Alias word address of PVDE bit */
lypinator 0:bb348c97df44 380 #define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos
lypinator 0:bb348c97df44 381 #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
lypinator 0:bb348c97df44 382
lypinator 0:bb348c97df44 383 /* Alias word address of VOS bit */
lypinator 0:bb348c97df44 384 #define VOS_BIT_NUMBER PWR_CR_VOS_Pos
lypinator 0:bb348c97df44 385 #define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U))
lypinator 0:bb348c97df44 386 /**
lypinator 0:bb348c97df44 387 * @}
lypinator 0:bb348c97df44 388 */
lypinator 0:bb348c97df44 389
lypinator 0:bb348c97df44 390 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
lypinator 0:bb348c97df44 391 * @{
lypinator 0:bb348c97df44 392 */
lypinator 0:bb348c97df44 393 /* --- CSR Register ---*/
lypinator 0:bb348c97df44 394 /* Alias word address of EWUP bit */
lypinator 0:bb348c97df44 395 #define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos
lypinator 0:bb348c97df44 396 #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
lypinator 0:bb348c97df44 397 /**
lypinator 0:bb348c97df44 398 * @}
lypinator 0:bb348c97df44 399 */
lypinator 0:bb348c97df44 400
lypinator 0:bb348c97df44 401 /**
lypinator 0:bb348c97df44 402 * @}
lypinator 0:bb348c97df44 403 */
lypinator 0:bb348c97df44 404 /* Private macros ------------------------------------------------------------*/
lypinator 0:bb348c97df44 405 /** @defgroup PWR_Private_Macros PWR Private Macros
lypinator 0:bb348c97df44 406 * @{
lypinator 0:bb348c97df44 407 */
lypinator 0:bb348c97df44 408
lypinator 0:bb348c97df44 409 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
lypinator 0:bb348c97df44 410 * @{
lypinator 0:bb348c97df44 411 */
lypinator 0:bb348c97df44 412 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
lypinator 0:bb348c97df44 413 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
lypinator 0:bb348c97df44 414 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
lypinator 0:bb348c97df44 415 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
lypinator 0:bb348c97df44 416 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
lypinator 0:bb348c97df44 417 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
lypinator 0:bb348c97df44 418 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
lypinator 0:bb348c97df44 419 ((MODE) == PWR_PVD_MODE_NORMAL))
lypinator 0:bb348c97df44 420 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
lypinator 0:bb348c97df44 421 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
lypinator 0:bb348c97df44 422 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
lypinator 0:bb348c97df44 423 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
lypinator 0:bb348c97df44 424 /**
lypinator 0:bb348c97df44 425 * @}
lypinator 0:bb348c97df44 426 */
lypinator 0:bb348c97df44 427
lypinator 0:bb348c97df44 428 /**
lypinator 0:bb348c97df44 429 * @}
lypinator 0:bb348c97df44 430 */
lypinator 0:bb348c97df44 431
lypinator 0:bb348c97df44 432 /**
lypinator 0:bb348c97df44 433 * @}
lypinator 0:bb348c97df44 434 */
lypinator 0:bb348c97df44 435
lypinator 0:bb348c97df44 436 /**
lypinator 0:bb348c97df44 437 * @}
lypinator 0:bb348c97df44 438 */
lypinator 0:bb348c97df44 439
lypinator 0:bb348c97df44 440 #ifdef __cplusplus
lypinator 0:bb348c97df44 441 }
lypinator 0:bb348c97df44 442 #endif
lypinator 0:bb348c97df44 443
lypinator 0:bb348c97df44 444
lypinator 0:bb348c97df44 445 #endif /* __STM32F4xx_HAL_PWR_H */
lypinator 0:bb348c97df44 446
lypinator 0:bb348c97df44 447 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/