Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_nor.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_nor.c
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief NOR HAL module driver.
lypinator 0:bb348c97df44 6 * This file provides a generic firmware to drive NOR memories mounted
lypinator 0:bb348c97df44 7 * as external device.
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 @verbatim
lypinator 0:bb348c97df44 10 ==============================================================================
lypinator 0:bb348c97df44 11 ##### How to use this driver #####
lypinator 0:bb348c97df44 12 ==============================================================================
lypinator 0:bb348c97df44 13 [..]
lypinator 0:bb348c97df44 14 This driver is a generic layered driver which contains a set of APIs used to
lypinator 0:bb348c97df44 15 control NOR flash memories. It uses the FMC/FSMC layer functions to interface
lypinator 0:bb348c97df44 16 with NOR devices. This driver is used as follows:
lypinator 0:bb348c97df44 17
lypinator 0:bb348c97df44 18 (+) NOR flash memory configuration sequence using the function HAL_NOR_Init()
lypinator 0:bb348c97df44 19 with control and timing parameters for both normal and extended mode.
lypinator 0:bb348c97df44 20
lypinator 0:bb348c97df44 21 (+) Read NOR flash memory manufacturer code and device IDs using the function
lypinator 0:bb348c97df44 22 HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef
lypinator 0:bb348c97df44 23 structure declared by the function caller.
lypinator 0:bb348c97df44 24
lypinator 0:bb348c97df44 25 (+) Access NOR flash memory by read/write data unit operations using the functions
lypinator 0:bb348c97df44 26 HAL_NOR_Read(), HAL_NOR_Program().
lypinator 0:bb348c97df44 27
lypinator 0:bb348c97df44 28 (+) Perform NOR flash erase block/chip operations using the functions
lypinator 0:bb348c97df44 29 HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip().
lypinator 0:bb348c97df44 30
lypinator 0:bb348c97df44 31 (+) Read the NOR flash CFI (common flash interface) IDs using the function
lypinator 0:bb348c97df44 32 HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef
lypinator 0:bb348c97df44 33 structure declared by the function caller.
lypinator 0:bb348c97df44 34
lypinator 0:bb348c97df44 35 (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/
lypinator 0:bb348c97df44 36 HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation
lypinator 0:bb348c97df44 37
lypinator 0:bb348c97df44 38 (+) You can monitor the NOR device HAL state by calling the function
lypinator 0:bb348c97df44 39 HAL_NOR_GetState()
lypinator 0:bb348c97df44 40 [..]
lypinator 0:bb348c97df44 41 (@) This driver is a set of generic APIs which handle standard NOR flash operations.
lypinator 0:bb348c97df44 42 If a NOR flash device contains different operations and/or implementations,
lypinator 0:bb348c97df44 43 it should be implemented separately.
lypinator 0:bb348c97df44 44
lypinator 0:bb348c97df44 45 *** NOR HAL driver macros list ***
lypinator 0:bb348c97df44 46 =============================================
lypinator 0:bb348c97df44 47 [..]
lypinator 0:bb348c97df44 48 Below the list of most used macros in NOR HAL driver.
lypinator 0:bb348c97df44 49
lypinator 0:bb348c97df44 50 (+) NOR_WRITE : NOR memory write data to specified address
lypinator 0:bb348c97df44 51
lypinator 0:bb348c97df44 52 @endverbatim
lypinator 0:bb348c97df44 53 ******************************************************************************
lypinator 0:bb348c97df44 54 * @attention
lypinator 0:bb348c97df44 55 *
lypinator 0:bb348c97df44 56 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 57 *
lypinator 0:bb348c97df44 58 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 59 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 60 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 61 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 62 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 63 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 64 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 65 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 66 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 67 * without specific prior written permission.
lypinator 0:bb348c97df44 68 *
lypinator 0:bb348c97df44 69 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 70 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 71 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 72 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 73 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 74 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 75 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 76 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 77 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 78 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 79 *
lypinator 0:bb348c97df44 80 ******************************************************************************
lypinator 0:bb348c97df44 81 */
lypinator 0:bb348c97df44 82
lypinator 0:bb348c97df44 83 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 84 #include "stm32f4xx_hal.h"
lypinator 0:bb348c97df44 85
lypinator 0:bb348c97df44 86 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 87 * @{
lypinator 0:bb348c97df44 88 */
lypinator 0:bb348c97df44 89
lypinator 0:bb348c97df44 90 /** @defgroup NOR NOR
lypinator 0:bb348c97df44 91 * @brief NOR driver modules
lypinator 0:bb348c97df44 92 * @{
lypinator 0:bb348c97df44 93 */
lypinator 0:bb348c97df44 94 #ifdef HAL_NOR_MODULE_ENABLED
lypinator 0:bb348c97df44 95 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
lypinator 0:bb348c97df44 96 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
lypinator 0:bb348c97df44 97 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||\
lypinator 0:bb348c97df44 98 defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F413xx) || defined(STM32F423xx)
lypinator 0:bb348c97df44 99 /* Private typedef -----------------------------------------------------------*/
lypinator 0:bb348c97df44 100 /* Private define ------------------------------------------------------------*/
lypinator 0:bb348c97df44 101
lypinator 0:bb348c97df44 102 /** @defgroup NOR_Private_Defines NOR Private Defines
lypinator 0:bb348c97df44 103 * @{
lypinator 0:bb348c97df44 104 */
lypinator 0:bb348c97df44 105
lypinator 0:bb348c97df44 106 /* Constants to define address to set to write a command */
lypinator 0:bb348c97df44 107 #define NOR_CMD_ADDRESS_FIRST (uint16_t)0x0555
lypinator 0:bb348c97df44 108 #define NOR_CMD_ADDRESS_FIRST_CFI (uint16_t)0x0055
lypinator 0:bb348c97df44 109 #define NOR_CMD_ADDRESS_SECOND (uint16_t)0x02AA
lypinator 0:bb348c97df44 110 #define NOR_CMD_ADDRESS_THIRD (uint16_t)0x0555
lypinator 0:bb348c97df44 111 #define NOR_CMD_ADDRESS_FOURTH (uint16_t)0x0555
lypinator 0:bb348c97df44 112 #define NOR_CMD_ADDRESS_FIFTH (uint16_t)0x02AA
lypinator 0:bb348c97df44 113 #define NOR_CMD_ADDRESS_SIXTH (uint16_t)0x0555
lypinator 0:bb348c97df44 114
lypinator 0:bb348c97df44 115 /* Constants to define data to program a command */
lypinator 0:bb348c97df44 116 #define NOR_CMD_DATA_READ_RESET (uint16_t)0x00F0
lypinator 0:bb348c97df44 117 #define NOR_CMD_DATA_FIRST (uint16_t)0x00AA
lypinator 0:bb348c97df44 118 #define NOR_CMD_DATA_SECOND (uint16_t)0x0055
lypinator 0:bb348c97df44 119 #define NOR_CMD_DATA_AUTO_SELECT (uint16_t)0x0090
lypinator 0:bb348c97df44 120 #define NOR_CMD_DATA_PROGRAM (uint16_t)0x00A0
lypinator 0:bb348c97df44 121 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD (uint16_t)0x0080
lypinator 0:bb348c97df44 122 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH (uint16_t)0x00AA
lypinator 0:bb348c97df44 123 #define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH (uint16_t)0x0055
lypinator 0:bb348c97df44 124 #define NOR_CMD_DATA_CHIP_ERASE (uint16_t)0x0010
lypinator 0:bb348c97df44 125 #define NOR_CMD_DATA_CFI (uint16_t)0x0098
lypinator 0:bb348c97df44 126
lypinator 0:bb348c97df44 127 #define NOR_CMD_DATA_BUFFER_AND_PROG (uint8_t)0x25
lypinator 0:bb348c97df44 128 #define NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM (uint8_t)0x29
lypinator 0:bb348c97df44 129 #define NOR_CMD_DATA_BLOCK_ERASE (uint8_t)0x30
lypinator 0:bb348c97df44 130
lypinator 0:bb348c97df44 131 /* Mask on NOR STATUS REGISTER */
lypinator 0:bb348c97df44 132 #define NOR_MASK_STATUS_DQ5 (uint16_t)0x0020
lypinator 0:bb348c97df44 133 #define NOR_MASK_STATUS_DQ6 (uint16_t)0x0040
lypinator 0:bb348c97df44 134
lypinator 0:bb348c97df44 135 /**
lypinator 0:bb348c97df44 136 * @}
lypinator 0:bb348c97df44 137 */
lypinator 0:bb348c97df44 138
lypinator 0:bb348c97df44 139 /* Private macro -------------------------------------------------------------*/
lypinator 0:bb348c97df44 140 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 141 /** @defgroup NOR_Private_Variables NOR Private Variables
lypinator 0:bb348c97df44 142 * @{
lypinator 0:bb348c97df44 143 */
lypinator 0:bb348c97df44 144
lypinator 0:bb348c97df44 145 static uint32_t uwNORMemoryDataWidth = NOR_MEMORY_8B;
lypinator 0:bb348c97df44 146
lypinator 0:bb348c97df44 147 /**
lypinator 0:bb348c97df44 148 * @}
lypinator 0:bb348c97df44 149 */
lypinator 0:bb348c97df44 150
lypinator 0:bb348c97df44 151 /* Private functions ---------------------------------------------------------*/
lypinator 0:bb348c97df44 152 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 153 /** @defgroup NOR_Exported_Functions NOR Exported Functions
lypinator 0:bb348c97df44 154 * @{
lypinator 0:bb348c97df44 155 */
lypinator 0:bb348c97df44 156
lypinator 0:bb348c97df44 157 /** @defgroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
lypinator 0:bb348c97df44 158 * @brief Initialization and Configuration functions
lypinator 0:bb348c97df44 159 *
lypinator 0:bb348c97df44 160 @verbatim
lypinator 0:bb348c97df44 161 ==============================================================================
lypinator 0:bb348c97df44 162 ##### NOR Initialization and de_initialization functions #####
lypinator 0:bb348c97df44 163 ==============================================================================
lypinator 0:bb348c97df44 164 [..]
lypinator 0:bb348c97df44 165 This section provides functions allowing to initialize/de-initialize
lypinator 0:bb348c97df44 166 the NOR memory
lypinator 0:bb348c97df44 167
lypinator 0:bb348c97df44 168 @endverbatim
lypinator 0:bb348c97df44 169 * @{
lypinator 0:bb348c97df44 170 */
lypinator 0:bb348c97df44 171
lypinator 0:bb348c97df44 172 /**
lypinator 0:bb348c97df44 173 * @brief Perform the NOR memory Initialization sequence
lypinator 0:bb348c97df44 174 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 175 * the configuration information for NOR module.
lypinator 0:bb348c97df44 176 * @param Timing pointer to NOR control timing structure
lypinator 0:bb348c97df44 177 * @param ExtTiming pointer to NOR extended mode timing structure
lypinator 0:bb348c97df44 178 * @retval HAL status
lypinator 0:bb348c97df44 179 */
lypinator 0:bb348c97df44 180 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
lypinator 0:bb348c97df44 181 {
lypinator 0:bb348c97df44 182 /* Check the NOR handle parameter */
lypinator 0:bb348c97df44 183 if(hnor == NULL)
lypinator 0:bb348c97df44 184 {
lypinator 0:bb348c97df44 185 return HAL_ERROR;
lypinator 0:bb348c97df44 186 }
lypinator 0:bb348c97df44 187
lypinator 0:bb348c97df44 188 if(hnor->State == HAL_NOR_STATE_RESET)
lypinator 0:bb348c97df44 189 {
lypinator 0:bb348c97df44 190 /* Allocate lock resource and initialize it */
lypinator 0:bb348c97df44 191 hnor->Lock = HAL_UNLOCKED;
lypinator 0:bb348c97df44 192 /* Initialize the low level hardware (MSP) */
lypinator 0:bb348c97df44 193 HAL_NOR_MspInit(hnor);
lypinator 0:bb348c97df44 194 }
lypinator 0:bb348c97df44 195
lypinator 0:bb348c97df44 196 /* Initialize NOR control Interface */
lypinator 0:bb348c97df44 197 FMC_NORSRAM_Init(hnor->Instance, &(hnor->Init));
lypinator 0:bb348c97df44 198
lypinator 0:bb348c97df44 199 /* Initialize NOR timing Interface */
lypinator 0:bb348c97df44 200 FMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank);
lypinator 0:bb348c97df44 201
lypinator 0:bb348c97df44 202 /* Initialize NOR extended mode timing Interface */
lypinator 0:bb348c97df44 203 FMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode);
lypinator 0:bb348c97df44 204
lypinator 0:bb348c97df44 205 /* Enable the NORSRAM device */
lypinator 0:bb348c97df44 206 __FMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank);
lypinator 0:bb348c97df44 207
lypinator 0:bb348c97df44 208 /* Initialize NOR Memory Data Width*/
lypinator 0:bb348c97df44 209 if (hnor->Init.MemoryDataWidth == FMC_NORSRAM_MEM_BUS_WIDTH_8)
lypinator 0:bb348c97df44 210 {
lypinator 0:bb348c97df44 211 uwNORMemoryDataWidth = NOR_MEMORY_8B;
lypinator 0:bb348c97df44 212 }
lypinator 0:bb348c97df44 213 else
lypinator 0:bb348c97df44 214 {
lypinator 0:bb348c97df44 215 uwNORMemoryDataWidth = NOR_MEMORY_16B;
lypinator 0:bb348c97df44 216 }
lypinator 0:bb348c97df44 217
lypinator 0:bb348c97df44 218 /* Check the NOR controller state */
lypinator 0:bb348c97df44 219 hnor->State = HAL_NOR_STATE_READY;
lypinator 0:bb348c97df44 220
lypinator 0:bb348c97df44 221 return HAL_OK;
lypinator 0:bb348c97df44 222 }
lypinator 0:bb348c97df44 223
lypinator 0:bb348c97df44 224 /**
lypinator 0:bb348c97df44 225 * @brief Perform NOR memory De-Initialization sequence
lypinator 0:bb348c97df44 226 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 227 * the configuration information for NOR module.
lypinator 0:bb348c97df44 228 * @retval HAL status
lypinator 0:bb348c97df44 229 */
lypinator 0:bb348c97df44 230 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor)
lypinator 0:bb348c97df44 231 {
lypinator 0:bb348c97df44 232 /* De-Initialize the low level hardware (MSP) */
lypinator 0:bb348c97df44 233 HAL_NOR_MspDeInit(hnor);
lypinator 0:bb348c97df44 234
lypinator 0:bb348c97df44 235 /* Configure the NOR registers with their reset values */
lypinator 0:bb348c97df44 236 FMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank);
lypinator 0:bb348c97df44 237
lypinator 0:bb348c97df44 238 /* Update the NOR controller state */
lypinator 0:bb348c97df44 239 hnor->State = HAL_NOR_STATE_RESET;
lypinator 0:bb348c97df44 240
lypinator 0:bb348c97df44 241 /* Release Lock */
lypinator 0:bb348c97df44 242 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 243
lypinator 0:bb348c97df44 244 return HAL_OK;
lypinator 0:bb348c97df44 245 }
lypinator 0:bb348c97df44 246
lypinator 0:bb348c97df44 247 /**
lypinator 0:bb348c97df44 248 * @brief NOR MSP Init
lypinator 0:bb348c97df44 249 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 250 * the configuration information for NOR module.
lypinator 0:bb348c97df44 251 * @retval None
lypinator 0:bb348c97df44 252 */
lypinator 0:bb348c97df44 253 __weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor)
lypinator 0:bb348c97df44 254 {
lypinator 0:bb348c97df44 255 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 256 UNUSED(hnor);
lypinator 0:bb348c97df44 257 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 258 the HAL_NOR_MspInit could be implemented in the user file
lypinator 0:bb348c97df44 259 */
lypinator 0:bb348c97df44 260 }
lypinator 0:bb348c97df44 261
lypinator 0:bb348c97df44 262 /**
lypinator 0:bb348c97df44 263 * @brief NOR MSP DeInit
lypinator 0:bb348c97df44 264 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 265 * the configuration information for NOR module.
lypinator 0:bb348c97df44 266 * @retval None
lypinator 0:bb348c97df44 267 */
lypinator 0:bb348c97df44 268 __weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor)
lypinator 0:bb348c97df44 269 {
lypinator 0:bb348c97df44 270 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 271 UNUSED(hnor);
lypinator 0:bb348c97df44 272 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 273 the HAL_NOR_MspDeInit could be implemented in the user file
lypinator 0:bb348c97df44 274 */
lypinator 0:bb348c97df44 275 }
lypinator 0:bb348c97df44 276
lypinator 0:bb348c97df44 277 /**
lypinator 0:bb348c97df44 278 * @brief NOR MSP Wait for Ready/Busy signal
lypinator 0:bb348c97df44 279 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 280 * the configuration information for NOR module.
lypinator 0:bb348c97df44 281 * @param Timeout Maximum timeout value
lypinator 0:bb348c97df44 282 * @retval None
lypinator 0:bb348c97df44 283 */
lypinator 0:bb348c97df44 284 __weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout)
lypinator 0:bb348c97df44 285 {
lypinator 0:bb348c97df44 286 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 287 UNUSED(hnor);
lypinator 0:bb348c97df44 288 UNUSED(Timeout);
lypinator 0:bb348c97df44 289
lypinator 0:bb348c97df44 290 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 291 the HAL_NOR_MspWait could be implemented in the user file
lypinator 0:bb348c97df44 292 */
lypinator 0:bb348c97df44 293 }
lypinator 0:bb348c97df44 294
lypinator 0:bb348c97df44 295 /**
lypinator 0:bb348c97df44 296 * @}
lypinator 0:bb348c97df44 297 */
lypinator 0:bb348c97df44 298
lypinator 0:bb348c97df44 299 /** @defgroup NOR_Exported_Functions_Group2 Input and Output functions
lypinator 0:bb348c97df44 300 * @brief Input Output and memory control functions
lypinator 0:bb348c97df44 301 *
lypinator 0:bb348c97df44 302 @verbatim
lypinator 0:bb348c97df44 303 ==============================================================================
lypinator 0:bb348c97df44 304 ##### NOR Input and Output functions #####
lypinator 0:bb348c97df44 305 ==============================================================================
lypinator 0:bb348c97df44 306 [..]
lypinator 0:bb348c97df44 307 This section provides functions allowing to use and control the NOR memory
lypinator 0:bb348c97df44 308
lypinator 0:bb348c97df44 309 @endverbatim
lypinator 0:bb348c97df44 310 * @{
lypinator 0:bb348c97df44 311 */
lypinator 0:bb348c97df44 312
lypinator 0:bb348c97df44 313 /**
lypinator 0:bb348c97df44 314 * @brief Read NOR flash IDs
lypinator 0:bb348c97df44 315 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 316 * the configuration information for NOR module.
lypinator 0:bb348c97df44 317 * @param pNOR_ID pointer to NOR ID structure
lypinator 0:bb348c97df44 318 * @retval HAL status
lypinator 0:bb348c97df44 319 */
lypinator 0:bb348c97df44 320 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID)
lypinator 0:bb348c97df44 321 {
lypinator 0:bb348c97df44 322 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 323
lypinator 0:bb348c97df44 324 /* Process Locked */
lypinator 0:bb348c97df44 325 __HAL_LOCK(hnor);
lypinator 0:bb348c97df44 326
lypinator 0:bb348c97df44 327 /* Check the NOR controller state */
lypinator 0:bb348c97df44 328 if(hnor->State == HAL_NOR_STATE_BUSY)
lypinator 0:bb348c97df44 329 {
lypinator 0:bb348c97df44 330 return HAL_BUSY;
lypinator 0:bb348c97df44 331 }
lypinator 0:bb348c97df44 332
lypinator 0:bb348c97df44 333 /* Select the NOR device address */
lypinator 0:bb348c97df44 334 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
lypinator 0:bb348c97df44 335 {
lypinator 0:bb348c97df44 336 deviceaddress = NOR_MEMORY_ADRESS1;
lypinator 0:bb348c97df44 337 }
lypinator 0:bb348c97df44 338 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
lypinator 0:bb348c97df44 339 {
lypinator 0:bb348c97df44 340 deviceaddress = NOR_MEMORY_ADRESS2;
lypinator 0:bb348c97df44 341 }
lypinator 0:bb348c97df44 342 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
lypinator 0:bb348c97df44 343 {
lypinator 0:bb348c97df44 344 deviceaddress = NOR_MEMORY_ADRESS3;
lypinator 0:bb348c97df44 345 }
lypinator 0:bb348c97df44 346 else /* FMC_NORSRAM_BANK4 */
lypinator 0:bb348c97df44 347 {
lypinator 0:bb348c97df44 348 deviceaddress = NOR_MEMORY_ADRESS4;
lypinator 0:bb348c97df44 349 }
lypinator 0:bb348c97df44 350
lypinator 0:bb348c97df44 351 /* Update the NOR controller state */
lypinator 0:bb348c97df44 352 hnor->State = HAL_NOR_STATE_BUSY;
lypinator 0:bb348c97df44 353
lypinator 0:bb348c97df44 354 /* Send read ID command */
lypinator 0:bb348c97df44 355 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
lypinator 0:bb348c97df44 356 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
lypinator 0:bb348c97df44 357 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_AUTO_SELECT);
lypinator 0:bb348c97df44 358
lypinator 0:bb348c97df44 359 /* Read the NOR IDs */
lypinator 0:bb348c97df44 360 pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, MC_ADDRESS);
lypinator 0:bb348c97df44 361 pNOR_ID->Device_Code1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE1_ADDR);
lypinator 0:bb348c97df44 362 pNOR_ID->Device_Code2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE2_ADDR);
lypinator 0:bb348c97df44 363 pNOR_ID->Device_Code3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE3_ADDR);
lypinator 0:bb348c97df44 364
lypinator 0:bb348c97df44 365 /* Check the NOR controller state */
lypinator 0:bb348c97df44 366 hnor->State = HAL_NOR_STATE_READY;
lypinator 0:bb348c97df44 367
lypinator 0:bb348c97df44 368 /* Process unlocked */
lypinator 0:bb348c97df44 369 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 370
lypinator 0:bb348c97df44 371 return HAL_OK;
lypinator 0:bb348c97df44 372 }
lypinator 0:bb348c97df44 373
lypinator 0:bb348c97df44 374 /**
lypinator 0:bb348c97df44 375 * @brief Returns the NOR memory to Read mode.
lypinator 0:bb348c97df44 376 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 377 * the configuration information for NOR module.
lypinator 0:bb348c97df44 378 * @retval HAL status
lypinator 0:bb348c97df44 379 */
lypinator 0:bb348c97df44 380 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor)
lypinator 0:bb348c97df44 381 {
lypinator 0:bb348c97df44 382 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 383
lypinator 0:bb348c97df44 384 /* Process Locked */
lypinator 0:bb348c97df44 385 __HAL_LOCK(hnor);
lypinator 0:bb348c97df44 386
lypinator 0:bb348c97df44 387 /* Check the NOR controller state */
lypinator 0:bb348c97df44 388 if(hnor->State == HAL_NOR_STATE_BUSY)
lypinator 0:bb348c97df44 389 {
lypinator 0:bb348c97df44 390 return HAL_BUSY;
lypinator 0:bb348c97df44 391 }
lypinator 0:bb348c97df44 392
lypinator 0:bb348c97df44 393 /* Select the NOR device address */
lypinator 0:bb348c97df44 394 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
lypinator 0:bb348c97df44 395 {
lypinator 0:bb348c97df44 396 deviceaddress = NOR_MEMORY_ADRESS1;
lypinator 0:bb348c97df44 397 }
lypinator 0:bb348c97df44 398 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
lypinator 0:bb348c97df44 399 {
lypinator 0:bb348c97df44 400 deviceaddress = NOR_MEMORY_ADRESS2;
lypinator 0:bb348c97df44 401 }
lypinator 0:bb348c97df44 402 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
lypinator 0:bb348c97df44 403 {
lypinator 0:bb348c97df44 404 deviceaddress = NOR_MEMORY_ADRESS3;
lypinator 0:bb348c97df44 405 }
lypinator 0:bb348c97df44 406 else /* FMC_NORSRAM_BANK4 */
lypinator 0:bb348c97df44 407 {
lypinator 0:bb348c97df44 408 deviceaddress = NOR_MEMORY_ADRESS4;
lypinator 0:bb348c97df44 409 }
lypinator 0:bb348c97df44 410
lypinator 0:bb348c97df44 411 NOR_WRITE(deviceaddress, NOR_CMD_DATA_READ_RESET);
lypinator 0:bb348c97df44 412
lypinator 0:bb348c97df44 413 /* Check the NOR controller state */
lypinator 0:bb348c97df44 414 hnor->State = HAL_NOR_STATE_READY;
lypinator 0:bb348c97df44 415
lypinator 0:bb348c97df44 416 /* Process unlocked */
lypinator 0:bb348c97df44 417 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 418
lypinator 0:bb348c97df44 419 return HAL_OK;
lypinator 0:bb348c97df44 420 }
lypinator 0:bb348c97df44 421
lypinator 0:bb348c97df44 422 /**
lypinator 0:bb348c97df44 423 * @brief Read data from NOR memory
lypinator 0:bb348c97df44 424 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 425 * the configuration information for NOR module.
lypinator 0:bb348c97df44 426 * @param pAddress pointer to Device address
lypinator 0:bb348c97df44 427 * @param pData pointer to read data
lypinator 0:bb348c97df44 428 * @retval HAL status
lypinator 0:bb348c97df44 429 */
lypinator 0:bb348c97df44 430 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
lypinator 0:bb348c97df44 431 {
lypinator 0:bb348c97df44 432 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 433
lypinator 0:bb348c97df44 434 /* Process Locked */
lypinator 0:bb348c97df44 435 __HAL_LOCK(hnor);
lypinator 0:bb348c97df44 436
lypinator 0:bb348c97df44 437 /* Check the NOR controller state */
lypinator 0:bb348c97df44 438 if(hnor->State == HAL_NOR_STATE_BUSY)
lypinator 0:bb348c97df44 439 {
lypinator 0:bb348c97df44 440 return HAL_BUSY;
lypinator 0:bb348c97df44 441 }
lypinator 0:bb348c97df44 442
lypinator 0:bb348c97df44 443 /* Select the NOR device address */
lypinator 0:bb348c97df44 444 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
lypinator 0:bb348c97df44 445 {
lypinator 0:bb348c97df44 446 deviceaddress = NOR_MEMORY_ADRESS1;
lypinator 0:bb348c97df44 447 }
lypinator 0:bb348c97df44 448 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
lypinator 0:bb348c97df44 449 {
lypinator 0:bb348c97df44 450 deviceaddress = NOR_MEMORY_ADRESS2;
lypinator 0:bb348c97df44 451 }
lypinator 0:bb348c97df44 452 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
lypinator 0:bb348c97df44 453 {
lypinator 0:bb348c97df44 454 deviceaddress = NOR_MEMORY_ADRESS3;
lypinator 0:bb348c97df44 455 }
lypinator 0:bb348c97df44 456 else /* FMC_NORSRAM_BANK4 */
lypinator 0:bb348c97df44 457 {
lypinator 0:bb348c97df44 458 deviceaddress = NOR_MEMORY_ADRESS4;
lypinator 0:bb348c97df44 459 }
lypinator 0:bb348c97df44 460
lypinator 0:bb348c97df44 461 /* Update the NOR controller state */
lypinator 0:bb348c97df44 462 hnor->State = HAL_NOR_STATE_BUSY;
lypinator 0:bb348c97df44 463
lypinator 0:bb348c97df44 464 /* Send read data command */
lypinator 0:bb348c97df44 465 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
lypinator 0:bb348c97df44 466 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
lypinator 0:bb348c97df44 467 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
lypinator 0:bb348c97df44 468
lypinator 0:bb348c97df44 469 /* Read the data */
lypinator 0:bb348c97df44 470 *pData = *(__IO uint32_t *)(uint32_t)pAddress;
lypinator 0:bb348c97df44 471
lypinator 0:bb348c97df44 472 /* Check the NOR controller state */
lypinator 0:bb348c97df44 473 hnor->State = HAL_NOR_STATE_READY;
lypinator 0:bb348c97df44 474
lypinator 0:bb348c97df44 475 /* Process unlocked */
lypinator 0:bb348c97df44 476 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 477
lypinator 0:bb348c97df44 478 return HAL_OK;
lypinator 0:bb348c97df44 479 }
lypinator 0:bb348c97df44 480
lypinator 0:bb348c97df44 481 /**
lypinator 0:bb348c97df44 482 * @brief Program data to NOR memory
lypinator 0:bb348c97df44 483 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 484 * the configuration information for NOR module.
lypinator 0:bb348c97df44 485 * @param pAddress Device address
lypinator 0:bb348c97df44 486 * @param pData pointer to the data to write
lypinator 0:bb348c97df44 487 * @retval HAL status
lypinator 0:bb348c97df44 488 */
lypinator 0:bb348c97df44 489 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData)
lypinator 0:bb348c97df44 490 {
lypinator 0:bb348c97df44 491 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 492
lypinator 0:bb348c97df44 493 /* Process Locked */
lypinator 0:bb348c97df44 494 __HAL_LOCK(hnor);
lypinator 0:bb348c97df44 495
lypinator 0:bb348c97df44 496 /* Check the NOR controller state */
lypinator 0:bb348c97df44 497 if(hnor->State == HAL_NOR_STATE_BUSY)
lypinator 0:bb348c97df44 498 {
lypinator 0:bb348c97df44 499 return HAL_BUSY;
lypinator 0:bb348c97df44 500 }
lypinator 0:bb348c97df44 501
lypinator 0:bb348c97df44 502 /* Select the NOR device address */
lypinator 0:bb348c97df44 503 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
lypinator 0:bb348c97df44 504 {
lypinator 0:bb348c97df44 505 deviceaddress = NOR_MEMORY_ADRESS1;
lypinator 0:bb348c97df44 506 }
lypinator 0:bb348c97df44 507 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
lypinator 0:bb348c97df44 508 {
lypinator 0:bb348c97df44 509 deviceaddress = NOR_MEMORY_ADRESS2;
lypinator 0:bb348c97df44 510 }
lypinator 0:bb348c97df44 511 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
lypinator 0:bb348c97df44 512 {
lypinator 0:bb348c97df44 513 deviceaddress = NOR_MEMORY_ADRESS3;
lypinator 0:bb348c97df44 514 }
lypinator 0:bb348c97df44 515 else /* FMC_NORSRAM_BANK4 */
lypinator 0:bb348c97df44 516 {
lypinator 0:bb348c97df44 517 deviceaddress = NOR_MEMORY_ADRESS4;
lypinator 0:bb348c97df44 518 }
lypinator 0:bb348c97df44 519
lypinator 0:bb348c97df44 520 /* Update the NOR controller state */
lypinator 0:bb348c97df44 521 hnor->State = HAL_NOR_STATE_BUSY;
lypinator 0:bb348c97df44 522
lypinator 0:bb348c97df44 523 /* Send program data command */
lypinator 0:bb348c97df44 524 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
lypinator 0:bb348c97df44 525 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
lypinator 0:bb348c97df44 526 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM);
lypinator 0:bb348c97df44 527
lypinator 0:bb348c97df44 528 /* Write the data */
lypinator 0:bb348c97df44 529 NOR_WRITE(pAddress, *pData);
lypinator 0:bb348c97df44 530
lypinator 0:bb348c97df44 531 /* Check the NOR controller state */
lypinator 0:bb348c97df44 532 hnor->State = HAL_NOR_STATE_READY;
lypinator 0:bb348c97df44 533
lypinator 0:bb348c97df44 534 /* Process unlocked */
lypinator 0:bb348c97df44 535 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 536
lypinator 0:bb348c97df44 537 return HAL_OK;
lypinator 0:bb348c97df44 538 }
lypinator 0:bb348c97df44 539
lypinator 0:bb348c97df44 540 /**
lypinator 0:bb348c97df44 541 * @brief Reads a half-word buffer from the NOR memory.
lypinator 0:bb348c97df44 542 * @param hnor pointer to the NOR handle
lypinator 0:bb348c97df44 543 * @param uwAddress NOR memory internal address to read from.
lypinator 0:bb348c97df44 544 * @param pData pointer to the buffer that receives the data read from the
lypinator 0:bb348c97df44 545 * NOR memory.
lypinator 0:bb348c97df44 546 * @param uwBufferSize number of Half word to read.
lypinator 0:bb348c97df44 547 * @retval HAL status
lypinator 0:bb348c97df44 548 */
lypinator 0:bb348c97df44 549 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
lypinator 0:bb348c97df44 550 {
lypinator 0:bb348c97df44 551 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 552
lypinator 0:bb348c97df44 553 /* Process Locked */
lypinator 0:bb348c97df44 554 __HAL_LOCK(hnor);
lypinator 0:bb348c97df44 555
lypinator 0:bb348c97df44 556 /* Check the NOR controller state */
lypinator 0:bb348c97df44 557 if(hnor->State == HAL_NOR_STATE_BUSY)
lypinator 0:bb348c97df44 558 {
lypinator 0:bb348c97df44 559 return HAL_BUSY;
lypinator 0:bb348c97df44 560 }
lypinator 0:bb348c97df44 561
lypinator 0:bb348c97df44 562 /* Select the NOR device address */
lypinator 0:bb348c97df44 563 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
lypinator 0:bb348c97df44 564 {
lypinator 0:bb348c97df44 565 deviceaddress = NOR_MEMORY_ADRESS1;
lypinator 0:bb348c97df44 566 }
lypinator 0:bb348c97df44 567 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
lypinator 0:bb348c97df44 568 {
lypinator 0:bb348c97df44 569 deviceaddress = NOR_MEMORY_ADRESS2;
lypinator 0:bb348c97df44 570 }
lypinator 0:bb348c97df44 571 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
lypinator 0:bb348c97df44 572 {
lypinator 0:bb348c97df44 573 deviceaddress = NOR_MEMORY_ADRESS3;
lypinator 0:bb348c97df44 574 }
lypinator 0:bb348c97df44 575 else /* FMC_NORSRAM_BANK4 */
lypinator 0:bb348c97df44 576 {
lypinator 0:bb348c97df44 577 deviceaddress = NOR_MEMORY_ADRESS4;
lypinator 0:bb348c97df44 578 }
lypinator 0:bb348c97df44 579
lypinator 0:bb348c97df44 580 /* Update the NOR controller state */
lypinator 0:bb348c97df44 581 hnor->State = HAL_NOR_STATE_BUSY;
lypinator 0:bb348c97df44 582
lypinator 0:bb348c97df44 583 /* Send read data command */
lypinator 0:bb348c97df44 584 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
lypinator 0:bb348c97df44 585 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
lypinator 0:bb348c97df44 586 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_READ_RESET);
lypinator 0:bb348c97df44 587
lypinator 0:bb348c97df44 588 /* Read buffer */
lypinator 0:bb348c97df44 589 while( uwBufferSize > 0U)
lypinator 0:bb348c97df44 590 {
lypinator 0:bb348c97df44 591 *pData++ = *(__IO uint16_t *)uwAddress;
lypinator 0:bb348c97df44 592 uwAddress += 2U;
lypinator 0:bb348c97df44 593 uwBufferSize--;
lypinator 0:bb348c97df44 594 }
lypinator 0:bb348c97df44 595
lypinator 0:bb348c97df44 596 /* Check the NOR controller state */
lypinator 0:bb348c97df44 597 hnor->State = HAL_NOR_STATE_READY;
lypinator 0:bb348c97df44 598
lypinator 0:bb348c97df44 599 /* Process unlocked */
lypinator 0:bb348c97df44 600 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 601
lypinator 0:bb348c97df44 602 return HAL_OK;
lypinator 0:bb348c97df44 603 }
lypinator 0:bb348c97df44 604
lypinator 0:bb348c97df44 605 /**
lypinator 0:bb348c97df44 606 * @brief Writes a half-word buffer to the NOR memory. This function must be used
lypinator 0:bb348c97df44 607 only with S29GL128P NOR memory.
lypinator 0:bb348c97df44 608 * @param hnor pointer to the NOR handle
lypinator 0:bb348c97df44 609 * @param uwAddress NOR memory internal start write address
lypinator 0:bb348c97df44 610 * @param pData pointer to source data buffer.
lypinator 0:bb348c97df44 611 * @param uwBufferSize Size of the buffer to write
lypinator 0:bb348c97df44 612 * @retval HAL status
lypinator 0:bb348c97df44 613 */
lypinator 0:bb348c97df44 614 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize)
lypinator 0:bb348c97df44 615 {
lypinator 0:bb348c97df44 616 uint16_t * p_currentaddress = (uint16_t *)NULL;
lypinator 0:bb348c97df44 617 uint16_t * p_endaddress = (uint16_t *)NULL;
lypinator 0:bb348c97df44 618 uint32_t lastloadedaddress = 0U, deviceaddress = 0U;
lypinator 0:bb348c97df44 619
lypinator 0:bb348c97df44 620 /* Process Locked */
lypinator 0:bb348c97df44 621 __HAL_LOCK(hnor);
lypinator 0:bb348c97df44 622
lypinator 0:bb348c97df44 623 /* Check the NOR controller state */
lypinator 0:bb348c97df44 624 if(hnor->State == HAL_NOR_STATE_BUSY)
lypinator 0:bb348c97df44 625 {
lypinator 0:bb348c97df44 626 return HAL_BUSY;
lypinator 0:bb348c97df44 627 }
lypinator 0:bb348c97df44 628
lypinator 0:bb348c97df44 629 /* Select the NOR device address */
lypinator 0:bb348c97df44 630 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
lypinator 0:bb348c97df44 631 {
lypinator 0:bb348c97df44 632 deviceaddress = NOR_MEMORY_ADRESS1;
lypinator 0:bb348c97df44 633 }
lypinator 0:bb348c97df44 634 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
lypinator 0:bb348c97df44 635 {
lypinator 0:bb348c97df44 636 deviceaddress = NOR_MEMORY_ADRESS2;
lypinator 0:bb348c97df44 637 }
lypinator 0:bb348c97df44 638 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
lypinator 0:bb348c97df44 639 {
lypinator 0:bb348c97df44 640 deviceaddress = NOR_MEMORY_ADRESS3;
lypinator 0:bb348c97df44 641 }
lypinator 0:bb348c97df44 642 else /* FMC_NORSRAM_BANK4 */
lypinator 0:bb348c97df44 643 {
lypinator 0:bb348c97df44 644 deviceaddress = NOR_MEMORY_ADRESS4;
lypinator 0:bb348c97df44 645 }
lypinator 0:bb348c97df44 646
lypinator 0:bb348c97df44 647 /* Update the NOR controller state */
lypinator 0:bb348c97df44 648 hnor->State = HAL_NOR_STATE_BUSY;
lypinator 0:bb348c97df44 649
lypinator 0:bb348c97df44 650 /* Initialize variables */
lypinator 0:bb348c97df44 651 p_currentaddress = (uint16_t*)((uint32_t)(uwAddress));
lypinator 0:bb348c97df44 652 p_endaddress = p_currentaddress + (uwBufferSize-1U);
lypinator 0:bb348c97df44 653 lastloadedaddress = (uint32_t)(uwAddress);
lypinator 0:bb348c97df44 654
lypinator 0:bb348c97df44 655 /* Issue unlock command sequence */
lypinator 0:bb348c97df44 656 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
lypinator 0:bb348c97df44 657 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
lypinator 0:bb348c97df44 658
lypinator 0:bb348c97df44 659 /* Write Buffer Load Command */
lypinator 0:bb348c97df44 660 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, uwAddress), NOR_CMD_DATA_BUFFER_AND_PROG);
lypinator 0:bb348c97df44 661 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, uwAddress), (uwBufferSize - 1U));
lypinator 0:bb348c97df44 662
lypinator 0:bb348c97df44 663 /* Load Data into NOR Buffer */
lypinator 0:bb348c97df44 664 while(p_currentaddress <= p_endaddress)
lypinator 0:bb348c97df44 665 {
lypinator 0:bb348c97df44 666 /* Store last loaded address & data value (for polling) */
lypinator 0:bb348c97df44 667 lastloadedaddress = (uint32_t)p_currentaddress;
lypinator 0:bb348c97df44 668
lypinator 0:bb348c97df44 669 NOR_WRITE(p_currentaddress, *pData++);
lypinator 0:bb348c97df44 670
lypinator 0:bb348c97df44 671 p_currentaddress ++;
lypinator 0:bb348c97df44 672 }
lypinator 0:bb348c97df44 673
lypinator 0:bb348c97df44 674 NOR_WRITE((uint32_t)(lastloadedaddress), NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM);
lypinator 0:bb348c97df44 675
lypinator 0:bb348c97df44 676 /* Check the NOR controller state */
lypinator 0:bb348c97df44 677 hnor->State = HAL_NOR_STATE_READY;
lypinator 0:bb348c97df44 678
lypinator 0:bb348c97df44 679 /* Process unlocked */
lypinator 0:bb348c97df44 680 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 681
lypinator 0:bb348c97df44 682 return HAL_OK;
lypinator 0:bb348c97df44 683
lypinator 0:bb348c97df44 684 }
lypinator 0:bb348c97df44 685
lypinator 0:bb348c97df44 686 /**
lypinator 0:bb348c97df44 687 * @brief Erase the specified block of the NOR memory
lypinator 0:bb348c97df44 688 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 689 * the configuration information for NOR module.
lypinator 0:bb348c97df44 690 * @param BlockAddress Block to erase address
lypinator 0:bb348c97df44 691 * @param Address Device address
lypinator 0:bb348c97df44 692 * @retval HAL status
lypinator 0:bb348c97df44 693 */
lypinator 0:bb348c97df44 694 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address)
lypinator 0:bb348c97df44 695 {
lypinator 0:bb348c97df44 696 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 697
lypinator 0:bb348c97df44 698 /* Process Locked */
lypinator 0:bb348c97df44 699 __HAL_LOCK(hnor);
lypinator 0:bb348c97df44 700
lypinator 0:bb348c97df44 701 /* Check the NOR controller state */
lypinator 0:bb348c97df44 702 if(hnor->State == HAL_NOR_STATE_BUSY)
lypinator 0:bb348c97df44 703 {
lypinator 0:bb348c97df44 704 return HAL_BUSY;
lypinator 0:bb348c97df44 705 }
lypinator 0:bb348c97df44 706
lypinator 0:bb348c97df44 707 /* Select the NOR device address */
lypinator 0:bb348c97df44 708 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
lypinator 0:bb348c97df44 709 {
lypinator 0:bb348c97df44 710 deviceaddress = NOR_MEMORY_ADRESS1;
lypinator 0:bb348c97df44 711 }
lypinator 0:bb348c97df44 712 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
lypinator 0:bb348c97df44 713 {
lypinator 0:bb348c97df44 714 deviceaddress = NOR_MEMORY_ADRESS2;
lypinator 0:bb348c97df44 715 }
lypinator 0:bb348c97df44 716 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
lypinator 0:bb348c97df44 717 {
lypinator 0:bb348c97df44 718 deviceaddress = NOR_MEMORY_ADRESS3;
lypinator 0:bb348c97df44 719 }
lypinator 0:bb348c97df44 720 else /* FMC_NORSRAM_BANK4 */
lypinator 0:bb348c97df44 721 {
lypinator 0:bb348c97df44 722 deviceaddress = NOR_MEMORY_ADRESS4;
lypinator 0:bb348c97df44 723 }
lypinator 0:bb348c97df44 724
lypinator 0:bb348c97df44 725 /* Update the NOR controller state */
lypinator 0:bb348c97df44 726 hnor->State = HAL_NOR_STATE_BUSY;
lypinator 0:bb348c97df44 727
lypinator 0:bb348c97df44 728 /* Send block erase command sequence */
lypinator 0:bb348c97df44 729 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
lypinator 0:bb348c97df44 730 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
lypinator 0:bb348c97df44 731 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
lypinator 0:bb348c97df44 732 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
lypinator 0:bb348c97df44 733 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
lypinator 0:bb348c97df44 734 NOR_WRITE((uint32_t)(BlockAddress + Address), NOR_CMD_DATA_BLOCK_ERASE);
lypinator 0:bb348c97df44 735
lypinator 0:bb348c97df44 736 /* Check the NOR memory status and update the controller state */
lypinator 0:bb348c97df44 737 hnor->State = HAL_NOR_STATE_READY;
lypinator 0:bb348c97df44 738
lypinator 0:bb348c97df44 739 /* Process unlocked */
lypinator 0:bb348c97df44 740 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 741
lypinator 0:bb348c97df44 742 return HAL_OK;
lypinator 0:bb348c97df44 743
lypinator 0:bb348c97df44 744 }
lypinator 0:bb348c97df44 745
lypinator 0:bb348c97df44 746 /**
lypinator 0:bb348c97df44 747 * @brief Erase the entire NOR chip.
lypinator 0:bb348c97df44 748 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 749 * the configuration information for NOR module.
lypinator 0:bb348c97df44 750 * @param Address Device address
lypinator 0:bb348c97df44 751 * @retval HAL status
lypinator 0:bb348c97df44 752 */
lypinator 0:bb348c97df44 753 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address)
lypinator 0:bb348c97df44 754 {
lypinator 0:bb348c97df44 755 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 756
lypinator 0:bb348c97df44 757 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 758 UNUSED(Address);
lypinator 0:bb348c97df44 759
lypinator 0:bb348c97df44 760 /* Process Locked */
lypinator 0:bb348c97df44 761 __HAL_LOCK(hnor);
lypinator 0:bb348c97df44 762
lypinator 0:bb348c97df44 763 /* Check the NOR controller state */
lypinator 0:bb348c97df44 764 if(hnor->State == HAL_NOR_STATE_BUSY)
lypinator 0:bb348c97df44 765 {
lypinator 0:bb348c97df44 766 return HAL_BUSY;
lypinator 0:bb348c97df44 767 }
lypinator 0:bb348c97df44 768
lypinator 0:bb348c97df44 769 /* Select the NOR device address */
lypinator 0:bb348c97df44 770 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
lypinator 0:bb348c97df44 771 {
lypinator 0:bb348c97df44 772 deviceaddress = NOR_MEMORY_ADRESS1;
lypinator 0:bb348c97df44 773 }
lypinator 0:bb348c97df44 774 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
lypinator 0:bb348c97df44 775 {
lypinator 0:bb348c97df44 776 deviceaddress = NOR_MEMORY_ADRESS2;
lypinator 0:bb348c97df44 777 }
lypinator 0:bb348c97df44 778 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
lypinator 0:bb348c97df44 779 {
lypinator 0:bb348c97df44 780 deviceaddress = NOR_MEMORY_ADRESS3;
lypinator 0:bb348c97df44 781 }
lypinator 0:bb348c97df44 782 else /* FMC_NORSRAM_BANK4 */
lypinator 0:bb348c97df44 783 {
lypinator 0:bb348c97df44 784 deviceaddress = NOR_MEMORY_ADRESS4;
lypinator 0:bb348c97df44 785 }
lypinator 0:bb348c97df44 786
lypinator 0:bb348c97df44 787 /* Update the NOR controller state */
lypinator 0:bb348c97df44 788 hnor->State = HAL_NOR_STATE_BUSY;
lypinator 0:bb348c97df44 789
lypinator 0:bb348c97df44 790 /* Send NOR chip erase command sequence */
lypinator 0:bb348c97df44 791 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST);
lypinator 0:bb348c97df44 792 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND);
lypinator 0:bb348c97df44 793 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD);
lypinator 0:bb348c97df44 794 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH);
lypinator 0:bb348c97df44 795 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH);
lypinator 0:bb348c97df44 796 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SIXTH), NOR_CMD_DATA_CHIP_ERASE);
lypinator 0:bb348c97df44 797
lypinator 0:bb348c97df44 798 /* Check the NOR memory status and update the controller state */
lypinator 0:bb348c97df44 799 hnor->State = HAL_NOR_STATE_READY;
lypinator 0:bb348c97df44 800
lypinator 0:bb348c97df44 801 /* Process unlocked */
lypinator 0:bb348c97df44 802 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 803
lypinator 0:bb348c97df44 804 return HAL_OK;
lypinator 0:bb348c97df44 805 }
lypinator 0:bb348c97df44 806
lypinator 0:bb348c97df44 807 /**
lypinator 0:bb348c97df44 808 * @brief Read NOR flash CFI IDs
lypinator 0:bb348c97df44 809 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 810 * the configuration information for NOR module.
lypinator 0:bb348c97df44 811 * @param pNOR_CFI pointer to NOR CFI IDs structure
lypinator 0:bb348c97df44 812 * @retval HAL status
lypinator 0:bb348c97df44 813 */
lypinator 0:bb348c97df44 814 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI)
lypinator 0:bb348c97df44 815 {
lypinator 0:bb348c97df44 816 uint32_t deviceaddress = 0U;
lypinator 0:bb348c97df44 817
lypinator 0:bb348c97df44 818 /* Process Locked */
lypinator 0:bb348c97df44 819 __HAL_LOCK(hnor);
lypinator 0:bb348c97df44 820
lypinator 0:bb348c97df44 821 /* Check the NOR controller state */
lypinator 0:bb348c97df44 822 if(hnor->State == HAL_NOR_STATE_BUSY)
lypinator 0:bb348c97df44 823 {
lypinator 0:bb348c97df44 824 return HAL_BUSY;
lypinator 0:bb348c97df44 825 }
lypinator 0:bb348c97df44 826
lypinator 0:bb348c97df44 827 /* Select the NOR device address */
lypinator 0:bb348c97df44 828 if (hnor->Init.NSBank == FMC_NORSRAM_BANK1)
lypinator 0:bb348c97df44 829 {
lypinator 0:bb348c97df44 830 deviceaddress = NOR_MEMORY_ADRESS1;
lypinator 0:bb348c97df44 831 }
lypinator 0:bb348c97df44 832 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2)
lypinator 0:bb348c97df44 833 {
lypinator 0:bb348c97df44 834 deviceaddress = NOR_MEMORY_ADRESS2;
lypinator 0:bb348c97df44 835 }
lypinator 0:bb348c97df44 836 else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3)
lypinator 0:bb348c97df44 837 {
lypinator 0:bb348c97df44 838 deviceaddress = NOR_MEMORY_ADRESS3;
lypinator 0:bb348c97df44 839 }
lypinator 0:bb348c97df44 840 else /* FMC_NORSRAM_BANK4 */
lypinator 0:bb348c97df44 841 {
lypinator 0:bb348c97df44 842 deviceaddress = NOR_MEMORY_ADRESS4;
lypinator 0:bb348c97df44 843 }
lypinator 0:bb348c97df44 844
lypinator 0:bb348c97df44 845 /* Update the NOR controller state */
lypinator 0:bb348c97df44 846 hnor->State = HAL_NOR_STATE_BUSY;
lypinator 0:bb348c97df44 847
lypinator 0:bb348c97df44 848 /* Send read CFI query command */
lypinator 0:bb348c97df44 849 NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI);
lypinator 0:bb348c97df44 850
lypinator 0:bb348c97df44 851 /* read the NOR CFI information */
lypinator 0:bb348c97df44 852 pNOR_CFI->CFI_1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI1_ADDRESS);
lypinator 0:bb348c97df44 853 pNOR_CFI->CFI_2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI2_ADDRESS);
lypinator 0:bb348c97df44 854 pNOR_CFI->CFI_3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI3_ADDRESS);
lypinator 0:bb348c97df44 855 pNOR_CFI->CFI_4 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI4_ADDRESS);
lypinator 0:bb348c97df44 856
lypinator 0:bb348c97df44 857 /* Check the NOR controller state */
lypinator 0:bb348c97df44 858 hnor->State = HAL_NOR_STATE_READY;
lypinator 0:bb348c97df44 859
lypinator 0:bb348c97df44 860 /* Process unlocked */
lypinator 0:bb348c97df44 861 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 862
lypinator 0:bb348c97df44 863 return HAL_OK;
lypinator 0:bb348c97df44 864 }
lypinator 0:bb348c97df44 865
lypinator 0:bb348c97df44 866 /**
lypinator 0:bb348c97df44 867 * @}
lypinator 0:bb348c97df44 868 */
lypinator 0:bb348c97df44 869
lypinator 0:bb348c97df44 870 /** @defgroup NOR_Exported_Functions_Group3 NOR Control functions
lypinator 0:bb348c97df44 871 * @brief management functions
lypinator 0:bb348c97df44 872 *
lypinator 0:bb348c97df44 873 @verbatim
lypinator 0:bb348c97df44 874 ==============================================================================
lypinator 0:bb348c97df44 875 ##### NOR Control functions #####
lypinator 0:bb348c97df44 876 ==============================================================================
lypinator 0:bb348c97df44 877 [..]
lypinator 0:bb348c97df44 878 This subsection provides a set of functions allowing to control dynamically
lypinator 0:bb348c97df44 879 the NOR interface.
lypinator 0:bb348c97df44 880
lypinator 0:bb348c97df44 881 @endverbatim
lypinator 0:bb348c97df44 882 * @{
lypinator 0:bb348c97df44 883 */
lypinator 0:bb348c97df44 884
lypinator 0:bb348c97df44 885 /**
lypinator 0:bb348c97df44 886 * @brief Enables dynamically NOR write operation.
lypinator 0:bb348c97df44 887 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 888 * the configuration information for NOR module.
lypinator 0:bb348c97df44 889 * @retval HAL status
lypinator 0:bb348c97df44 890 */
lypinator 0:bb348c97df44 891 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor)
lypinator 0:bb348c97df44 892 {
lypinator 0:bb348c97df44 893 /* Process Locked */
lypinator 0:bb348c97df44 894 __HAL_LOCK(hnor);
lypinator 0:bb348c97df44 895
lypinator 0:bb348c97df44 896 /* Enable write operation */
lypinator 0:bb348c97df44 897 FMC_NORSRAM_WriteOperation_Enable(hnor->Instance, hnor->Init.NSBank);
lypinator 0:bb348c97df44 898
lypinator 0:bb348c97df44 899 /* Update the NOR controller state */
lypinator 0:bb348c97df44 900 hnor->State = HAL_NOR_STATE_READY;
lypinator 0:bb348c97df44 901
lypinator 0:bb348c97df44 902 /* Process unlocked */
lypinator 0:bb348c97df44 903 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 904
lypinator 0:bb348c97df44 905 return HAL_OK;
lypinator 0:bb348c97df44 906 }
lypinator 0:bb348c97df44 907
lypinator 0:bb348c97df44 908 /**
lypinator 0:bb348c97df44 909 * @brief Disables dynamically NOR write operation.
lypinator 0:bb348c97df44 910 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 911 * the configuration information for NOR module.
lypinator 0:bb348c97df44 912 * @retval HAL status
lypinator 0:bb348c97df44 913 */
lypinator 0:bb348c97df44 914 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor)
lypinator 0:bb348c97df44 915 {
lypinator 0:bb348c97df44 916 /* Process Locked */
lypinator 0:bb348c97df44 917 __HAL_LOCK(hnor);
lypinator 0:bb348c97df44 918
lypinator 0:bb348c97df44 919 /* Update the SRAM controller state */
lypinator 0:bb348c97df44 920 hnor->State = HAL_NOR_STATE_BUSY;
lypinator 0:bb348c97df44 921
lypinator 0:bb348c97df44 922 /* Disable write operation */
lypinator 0:bb348c97df44 923 FMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank);
lypinator 0:bb348c97df44 924
lypinator 0:bb348c97df44 925 /* Update the NOR controller state */
lypinator 0:bb348c97df44 926 hnor->State = HAL_NOR_STATE_PROTECTED;
lypinator 0:bb348c97df44 927
lypinator 0:bb348c97df44 928 /* Process unlocked */
lypinator 0:bb348c97df44 929 __HAL_UNLOCK(hnor);
lypinator 0:bb348c97df44 930
lypinator 0:bb348c97df44 931 return HAL_OK;
lypinator 0:bb348c97df44 932 }
lypinator 0:bb348c97df44 933
lypinator 0:bb348c97df44 934 /**
lypinator 0:bb348c97df44 935 * @}
lypinator 0:bb348c97df44 936 */
lypinator 0:bb348c97df44 937
lypinator 0:bb348c97df44 938 /** @defgroup NOR_Exported_Functions_Group4 NOR State functions
lypinator 0:bb348c97df44 939 * @brief Peripheral State functions
lypinator 0:bb348c97df44 940 *
lypinator 0:bb348c97df44 941 @verbatim
lypinator 0:bb348c97df44 942 ==============================================================================
lypinator 0:bb348c97df44 943 ##### NOR State functions #####
lypinator 0:bb348c97df44 944 ==============================================================================
lypinator 0:bb348c97df44 945 [..]
lypinator 0:bb348c97df44 946 This subsection permits to get in run-time the status of the NOR controller
lypinator 0:bb348c97df44 947 and the data flow.
lypinator 0:bb348c97df44 948
lypinator 0:bb348c97df44 949 @endverbatim
lypinator 0:bb348c97df44 950 * @{
lypinator 0:bb348c97df44 951 */
lypinator 0:bb348c97df44 952
lypinator 0:bb348c97df44 953 /**
lypinator 0:bb348c97df44 954 * @brief return the NOR controller state
lypinator 0:bb348c97df44 955 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 956 * the configuration information for NOR module.
lypinator 0:bb348c97df44 957 * @retval NOR controller state
lypinator 0:bb348c97df44 958 */
lypinator 0:bb348c97df44 959 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor)
lypinator 0:bb348c97df44 960 {
lypinator 0:bb348c97df44 961 return hnor->State;
lypinator 0:bb348c97df44 962 }
lypinator 0:bb348c97df44 963
lypinator 0:bb348c97df44 964 /**
lypinator 0:bb348c97df44 965 * @brief Returns the NOR operation status.
lypinator 0:bb348c97df44 966 * @param hnor pointer to a NOR_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 967 * the configuration information for NOR module.
lypinator 0:bb348c97df44 968 * @param Address Device address
lypinator 0:bb348c97df44 969 * @param Timeout NOR programming Timeout
lypinator 0:bb348c97df44 970 * @retval NOR_Status: The returned value can be: HAL_NOR_STATUS_SUCCESS, HAL_NOR_STATUS_ERROR
lypinator 0:bb348c97df44 971 * or HAL_NOR_STATUS_TIMEOUT
lypinator 0:bb348c97df44 972 */
lypinator 0:bb348c97df44 973 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout)
lypinator 0:bb348c97df44 974 {
lypinator 0:bb348c97df44 975 HAL_NOR_StatusTypeDef status = HAL_NOR_STATUS_ONGOING;
lypinator 0:bb348c97df44 976 uint16_t tmpSR1 = 0, tmpSR2 = 0;
lypinator 0:bb348c97df44 977 uint32_t tickstart = 0U;
lypinator 0:bb348c97df44 978
lypinator 0:bb348c97df44 979 /* Poll on NOR memory Ready/Busy signal ------------------------------------*/
lypinator 0:bb348c97df44 980 HAL_NOR_MspWait(hnor, Timeout);
lypinator 0:bb348c97df44 981
lypinator 0:bb348c97df44 982 /* Get the NOR memory operation status -------------------------------------*/
lypinator 0:bb348c97df44 983
lypinator 0:bb348c97df44 984 /* Get tick */
lypinator 0:bb348c97df44 985 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 986 while((status != HAL_NOR_STATUS_SUCCESS ) && (status != HAL_NOR_STATUS_TIMEOUT))
lypinator 0:bb348c97df44 987 {
lypinator 0:bb348c97df44 988 /* Check for the Timeout */
lypinator 0:bb348c97df44 989 if(Timeout != HAL_MAX_DELAY)
lypinator 0:bb348c97df44 990 {
lypinator 0:bb348c97df44 991 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
lypinator 0:bb348c97df44 992 {
lypinator 0:bb348c97df44 993 status = HAL_NOR_STATUS_TIMEOUT;
lypinator 0:bb348c97df44 994 }
lypinator 0:bb348c97df44 995 }
lypinator 0:bb348c97df44 996
lypinator 0:bb348c97df44 997 /* Read NOR status register (DQ6 and DQ5) */
lypinator 0:bb348c97df44 998 tmpSR1 = *(__IO uint16_t *)Address;
lypinator 0:bb348c97df44 999 tmpSR2 = *(__IO uint16_t *)Address;
lypinator 0:bb348c97df44 1000
lypinator 0:bb348c97df44 1001 /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS */
lypinator 0:bb348c97df44 1002 if((tmpSR1 & NOR_MASK_STATUS_DQ6) == (tmpSR2 & NOR_MASK_STATUS_DQ6))
lypinator 0:bb348c97df44 1003 {
lypinator 0:bb348c97df44 1004 return HAL_NOR_STATUS_SUCCESS ;
lypinator 0:bb348c97df44 1005 }
lypinator 0:bb348c97df44 1006
lypinator 0:bb348c97df44 1007 if((tmpSR1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
lypinator 0:bb348c97df44 1008 {
lypinator 0:bb348c97df44 1009 status = HAL_NOR_STATUS_ONGOING;
lypinator 0:bb348c97df44 1010 }
lypinator 0:bb348c97df44 1011
lypinator 0:bb348c97df44 1012 tmpSR1 = *(__IO uint16_t *)Address;
lypinator 0:bb348c97df44 1013 tmpSR2 = *(__IO uint16_t *)Address;
lypinator 0:bb348c97df44 1014
lypinator 0:bb348c97df44 1015 /* If DQ6 did not toggle between the two reads then return HAL_NOR_STATUS_SUCCESS */
lypinator 0:bb348c97df44 1016 if((tmpSR1 & NOR_MASK_STATUS_DQ6) == (tmpSR2 & NOR_MASK_STATUS_DQ6))
lypinator 0:bb348c97df44 1017 {
lypinator 0:bb348c97df44 1018 return HAL_NOR_STATUS_SUCCESS;
lypinator 0:bb348c97df44 1019 }
lypinator 0:bb348c97df44 1020 if((tmpSR1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5)
lypinator 0:bb348c97df44 1021 {
lypinator 0:bb348c97df44 1022 return HAL_NOR_STATUS_ERROR;
lypinator 0:bb348c97df44 1023 }
lypinator 0:bb348c97df44 1024 }
lypinator 0:bb348c97df44 1025
lypinator 0:bb348c97df44 1026 /* Return the operation status */
lypinator 0:bb348c97df44 1027 return status;
lypinator 0:bb348c97df44 1028 }
lypinator 0:bb348c97df44 1029
lypinator 0:bb348c97df44 1030 /**
lypinator 0:bb348c97df44 1031 * @}
lypinator 0:bb348c97df44 1032 */
lypinator 0:bb348c97df44 1033
lypinator 0:bb348c97df44 1034 /**
lypinator 0:bb348c97df44 1035 * @}
lypinator 0:bb348c97df44 1036 */
lypinator 0:bb348c97df44 1037 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx ||\
lypinator 0:bb348c97df44 1038 STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
lypinator 0:bb348c97df44 1039 STM32F479xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F413xx ||\
lypinator 0:bb348c97df44 1040 STM32F423xx */
lypinator 0:bb348c97df44 1041 #endif /* HAL_NOR_MODULE_ENABLED */
lypinator 0:bb348c97df44 1042 /**
lypinator 0:bb348c97df44 1043 * @}
lypinator 0:bb348c97df44 1044 */
lypinator 0:bb348c97df44 1045
lypinator 0:bb348c97df44 1046 /**
lypinator 0:bb348c97df44 1047 * @}
lypinator 0:bb348c97df44 1048 */
lypinator 0:bb348c97df44 1049
lypinator 0:bb348c97df44 1050 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/