Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2s.h@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_i2s.h
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief Header file of I2S HAL module.
lypinator 0:bb348c97df44 6 ******************************************************************************
lypinator 0:bb348c97df44 7 * @attention
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 10 *
lypinator 0:bb348c97df44 11 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 12 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 13 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 14 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 16 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 17 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 19 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 20 * without specific prior written permission.
lypinator 0:bb348c97df44 21 *
lypinator 0:bb348c97df44 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 32 *
lypinator 0:bb348c97df44 33 ******************************************************************************
lypinator 0:bb348c97df44 34 */
lypinator 0:bb348c97df44 35
lypinator 0:bb348c97df44 36 /* Define to prevent recursive inclusion -------------------------------------*/
lypinator 0:bb348c97df44 37 #ifndef __STM32F4xx_HAL_I2S_H
lypinator 0:bb348c97df44 38 #define __STM32F4xx_HAL_I2S_H
lypinator 0:bb348c97df44 39
lypinator 0:bb348c97df44 40 #ifdef __cplusplus
lypinator 0:bb348c97df44 41 extern "C" {
lypinator 0:bb348c97df44 42 #endif
lypinator 0:bb348c97df44 43
lypinator 0:bb348c97df44 44 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 45 #include "stm32f4xx_hal_def.h"
lypinator 0:bb348c97df44 46
lypinator 0:bb348c97df44 47 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 48 * @{
lypinator 0:bb348c97df44 49 */
lypinator 0:bb348c97df44 50
lypinator 0:bb348c97df44 51 /** @addtogroup I2S I2S
lypinator 0:bb348c97df44 52 * @{
lypinator 0:bb348c97df44 53 */
lypinator 0:bb348c97df44 54
lypinator 0:bb348c97df44 55 /* Exported types ------------------------------------------------------------*/
lypinator 0:bb348c97df44 56 /** @defgroup I2S_Exported_Types I2S Exported Types
lypinator 0:bb348c97df44 57 * @{
lypinator 0:bb348c97df44 58 */
lypinator 0:bb348c97df44 59
lypinator 0:bb348c97df44 60 /**
lypinator 0:bb348c97df44 61 * @brief I2S Init structure definition
lypinator 0:bb348c97df44 62 */
lypinator 0:bb348c97df44 63 typedef struct
lypinator 0:bb348c97df44 64 {
lypinator 0:bb348c97df44 65 uint32_t Mode; /*!< Specifies the I2S operating mode.
lypinator 0:bb348c97df44 66 This parameter can be a value of @ref I2S_Mode */
lypinator 0:bb348c97df44 67
lypinator 0:bb348c97df44 68 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
lypinator 0:bb348c97df44 69 This parameter can be a value of @ref I2S_Standard */
lypinator 0:bb348c97df44 70
lypinator 0:bb348c97df44 71 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
lypinator 0:bb348c97df44 72 This parameter can be a value of @ref I2S_Data_Format */
lypinator 0:bb348c97df44 73
lypinator 0:bb348c97df44 74 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
lypinator 0:bb348c97df44 75 This parameter can be a value of @ref I2S_MCLK_Output */
lypinator 0:bb348c97df44 76
lypinator 0:bb348c97df44 77 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
lypinator 0:bb348c97df44 78 This parameter can be a value of @ref I2S_Audio_Frequency */
lypinator 0:bb348c97df44 79
lypinator 0:bb348c97df44 80 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
lypinator 0:bb348c97df44 81 This parameter can be a value of @ref I2S_Clock_Polarity */
lypinator 0:bb348c97df44 82
lypinator 0:bb348c97df44 83 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
lypinator 0:bb348c97df44 84 This parameter can be a value of @ref I2S_Clock_Source */
lypinator 0:bb348c97df44 85
lypinator 0:bb348c97df44 86 uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
lypinator 0:bb348c97df44 87 This parameter can be a value of @ref I2S_FullDuplex_Mode */
lypinator 0:bb348c97df44 88
lypinator 0:bb348c97df44 89 }I2S_InitTypeDef;
lypinator 0:bb348c97df44 90
lypinator 0:bb348c97df44 91 /**
lypinator 0:bb348c97df44 92 * @brief HAL State structures definition
lypinator 0:bb348c97df44 93 */
lypinator 0:bb348c97df44 94 typedef enum
lypinator 0:bb348c97df44 95 {
lypinator 0:bb348c97df44 96 HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */
lypinator 0:bb348c97df44 97 HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */
lypinator 0:bb348c97df44 98 HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
lypinator 0:bb348c97df44 99 HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
lypinator 0:bb348c97df44 100 HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
lypinator 0:bb348c97df44 101 HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */
lypinator 0:bb348c97df44 102 HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */
lypinator 0:bb348c97df44 103 HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */
lypinator 0:bb348c97df44 104
lypinator 0:bb348c97df44 105 }HAL_I2S_StateTypeDef;
lypinator 0:bb348c97df44 106
lypinator 0:bb348c97df44 107 /**
lypinator 0:bb348c97df44 108 * @brief I2S handle Structure definition
lypinator 0:bb348c97df44 109 */
lypinator 0:bb348c97df44 110 typedef struct __I2S_HandleTypeDef
lypinator 0:bb348c97df44 111 {
lypinator 0:bb348c97df44 112 SPI_TypeDef *Instance; /*!< I2S registers base address */
lypinator 0:bb348c97df44 113
lypinator 0:bb348c97df44 114 I2S_InitTypeDef Init; /*!< I2S communication parameters */
lypinator 0:bb348c97df44 115
lypinator 0:bb348c97df44 116 uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */
lypinator 0:bb348c97df44 117
lypinator 0:bb348c97df44 118 __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */
lypinator 0:bb348c97df44 119
lypinator 0:bb348c97df44 120 __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */
lypinator 0:bb348c97df44 121
lypinator 0:bb348c97df44 122 uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */
lypinator 0:bb348c97df44 123
lypinator 0:bb348c97df44 124 __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */
lypinator 0:bb348c97df44 125
lypinator 0:bb348c97df44 126 __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter
lypinator 0:bb348c97df44 127 (This field is initialized at the
lypinator 0:bb348c97df44 128 same value as transfer size at the
lypinator 0:bb348c97df44 129 beginning of the transfer and
lypinator 0:bb348c97df44 130 decremented when a sample is received
lypinator 0:bb348c97df44 131 NbSamplesReceived = RxBufferSize-RxBufferCount) */
lypinator 0:bb348c97df44 132
lypinator 0:bb348c97df44 133 void (*IrqHandlerISR) (struct __I2S_HandleTypeDef *hi2s); /*!< I2S function pointer on IrqHandler */
lypinator 0:bb348c97df44 134
lypinator 0:bb348c97df44 135 DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */
lypinator 0:bb348c97df44 136
lypinator 0:bb348c97df44 137 DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */
lypinator 0:bb348c97df44 138
lypinator 0:bb348c97df44 139 __IO HAL_LockTypeDef Lock; /*!< I2S locking object */
lypinator 0:bb348c97df44 140
lypinator 0:bb348c97df44 141 __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */
lypinator 0:bb348c97df44 142
lypinator 0:bb348c97df44 143 __IO uint32_t ErrorCode; /*!< I2S Error code
lypinator 0:bb348c97df44 144 This parameter can be a value of @ref I2S_ErrorCode */
lypinator 0:bb348c97df44 145
lypinator 0:bb348c97df44 146 }I2S_HandleTypeDef;
lypinator 0:bb348c97df44 147 /**
lypinator 0:bb348c97df44 148 * @}
lypinator 0:bb348c97df44 149 */
lypinator 0:bb348c97df44 150
lypinator 0:bb348c97df44 151 /* Exported constants --------------------------------------------------------*/
lypinator 0:bb348c97df44 152 /** @defgroup I2S_Exported_Constants I2S Exported Constants
lypinator 0:bb348c97df44 153 * @{
lypinator 0:bb348c97df44 154 */
lypinator 0:bb348c97df44 155 /**
lypinator 0:bb348c97df44 156 * @defgroup I2S_ErrorCode I2S Error Code
lypinator 0:bb348c97df44 157 * @{
lypinator 0:bb348c97df44 158 */
lypinator 0:bb348c97df44 159 #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */
lypinator 0:bb348c97df44 160 #define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
lypinator 0:bb348c97df44 161 #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */
lypinator 0:bb348c97df44 162 #define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */
lypinator 0:bb348c97df44 163 #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */
lypinator 0:bb348c97df44 164 #define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */
lypinator 0:bb348c97df44 165 /**
lypinator 0:bb348c97df44 166 * @}
lypinator 0:bb348c97df44 167 */
lypinator 0:bb348c97df44 168
lypinator 0:bb348c97df44 169 /** @defgroup I2S_Mode I2S Mode
lypinator 0:bb348c97df44 170 * @{
lypinator 0:bb348c97df44 171 */
lypinator 0:bb348c97df44 172 #define I2S_MODE_SLAVE_TX (0x00000000U)
lypinator 0:bb348c97df44 173 #define I2S_MODE_SLAVE_RX (0x00000100U)
lypinator 0:bb348c97df44 174 #define I2S_MODE_MASTER_TX (0x00000200U)
lypinator 0:bb348c97df44 175 #define I2S_MODE_MASTER_RX (0x00000300U)
lypinator 0:bb348c97df44 176 /**
lypinator 0:bb348c97df44 177 * @}
lypinator 0:bb348c97df44 178 */
lypinator 0:bb348c97df44 179
lypinator 0:bb348c97df44 180 /** @defgroup I2S_Standard I2S Standard
lypinator 0:bb348c97df44 181 * @{
lypinator 0:bb348c97df44 182 */
lypinator 0:bb348c97df44 183 #define I2S_STANDARD_PHILIPS (0x00000000U)
lypinator 0:bb348c97df44 184 #define I2S_STANDARD_MSB (0x00000010U)
lypinator 0:bb348c97df44 185 #define I2S_STANDARD_LSB (0x00000020U)
lypinator 0:bb348c97df44 186 #define I2S_STANDARD_PCM_SHORT (0x00000030U)
lypinator 0:bb348c97df44 187 #define I2S_STANDARD_PCM_LONG (0x000000B0U)
lypinator 0:bb348c97df44 188 /**
lypinator 0:bb348c97df44 189 * @}
lypinator 0:bb348c97df44 190 */
lypinator 0:bb348c97df44 191
lypinator 0:bb348c97df44 192 /** @defgroup I2S_Data_Format I2S Data Format
lypinator 0:bb348c97df44 193 * @{
lypinator 0:bb348c97df44 194 */
lypinator 0:bb348c97df44 195 #define I2S_DATAFORMAT_16B (0x00000000U)
lypinator 0:bb348c97df44 196 #define I2S_DATAFORMAT_16B_EXTENDED (0x00000001U)
lypinator 0:bb348c97df44 197 #define I2S_DATAFORMAT_24B (0x00000003U)
lypinator 0:bb348c97df44 198 #define I2S_DATAFORMAT_32B (0x00000005U)
lypinator 0:bb348c97df44 199 /**
lypinator 0:bb348c97df44 200 * @}
lypinator 0:bb348c97df44 201 */
lypinator 0:bb348c97df44 202
lypinator 0:bb348c97df44 203 /** @defgroup I2S_MCLK_Output I2S Mclk Output
lypinator 0:bb348c97df44 204 * @{
lypinator 0:bb348c97df44 205 */
lypinator 0:bb348c97df44 206 #define I2S_MCLKOUTPUT_ENABLE SPI_I2SPR_MCKOE
lypinator 0:bb348c97df44 207 #define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
lypinator 0:bb348c97df44 208 /**
lypinator 0:bb348c97df44 209 * @}
lypinator 0:bb348c97df44 210 */
lypinator 0:bb348c97df44 211
lypinator 0:bb348c97df44 212 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
lypinator 0:bb348c97df44 213 * @{
lypinator 0:bb348c97df44 214 */
lypinator 0:bb348c97df44 215 #define I2S_AUDIOFREQ_192K (192000U)
lypinator 0:bb348c97df44 216 #define I2S_AUDIOFREQ_96K (96000U)
lypinator 0:bb348c97df44 217 #define I2S_AUDIOFREQ_48K (48000U)
lypinator 0:bb348c97df44 218 #define I2S_AUDIOFREQ_44K (44100U)
lypinator 0:bb348c97df44 219 #define I2S_AUDIOFREQ_32K (32000U)
lypinator 0:bb348c97df44 220 #define I2S_AUDIOFREQ_22K (22050U)
lypinator 0:bb348c97df44 221 #define I2S_AUDIOFREQ_16K (16000U)
lypinator 0:bb348c97df44 222 #define I2S_AUDIOFREQ_11K (11025U)
lypinator 0:bb348c97df44 223 #define I2S_AUDIOFREQ_8K (8000U)
lypinator 0:bb348c97df44 224 #define I2S_AUDIOFREQ_DEFAULT (2U)
lypinator 0:bb348c97df44 225 /**
lypinator 0:bb348c97df44 226 * @}
lypinator 0:bb348c97df44 227 */
lypinator 0:bb348c97df44 228
lypinator 0:bb348c97df44 229 /** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
lypinator 0:bb348c97df44 230 * @{
lypinator 0:bb348c97df44 231 */
lypinator 0:bb348c97df44 232 #define I2S_FULLDUPLEXMODE_DISABLE (0x00000000U)
lypinator 0:bb348c97df44 233 #define I2S_FULLDUPLEXMODE_ENABLE (0x00000001U)
lypinator 0:bb348c97df44 234 /**
lypinator 0:bb348c97df44 235 * @}
lypinator 0:bb348c97df44 236 */
lypinator 0:bb348c97df44 237
lypinator 0:bb348c97df44 238 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
lypinator 0:bb348c97df44 239 * @{
lypinator 0:bb348c97df44 240 */
lypinator 0:bb348c97df44 241 #define I2S_CPOL_LOW (0x00000000U)
lypinator 0:bb348c97df44 242 #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL)
lypinator 0:bb348c97df44 243 /**
lypinator 0:bb348c97df44 244 * @}
lypinator 0:bb348c97df44 245 */
lypinator 0:bb348c97df44 246
lypinator 0:bb348c97df44 247 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
lypinator 0:bb348c97df44 248 * @{
lypinator 0:bb348c97df44 249 */
lypinator 0:bb348c97df44 250 #define I2S_IT_TXE SPI_CR2_TXEIE
lypinator 0:bb348c97df44 251 #define I2S_IT_RXNE SPI_CR2_RXNEIE
lypinator 0:bb348c97df44 252 #define I2S_IT_ERR SPI_CR2_ERRIE
lypinator 0:bb348c97df44 253 /**
lypinator 0:bb348c97df44 254 * @}
lypinator 0:bb348c97df44 255 */
lypinator 0:bb348c97df44 256
lypinator 0:bb348c97df44 257 /** @defgroup I2S_Flags_Definition I2S Flags Definition
lypinator 0:bb348c97df44 258 * @{
lypinator 0:bb348c97df44 259 */
lypinator 0:bb348c97df44 260 #define I2S_FLAG_TXE SPI_SR_TXE
lypinator 0:bb348c97df44 261 #define I2S_FLAG_RXNE SPI_SR_RXNE
lypinator 0:bb348c97df44 262
lypinator 0:bb348c97df44 263 #define I2S_FLAG_UDR SPI_SR_UDR
lypinator 0:bb348c97df44 264 #define I2S_FLAG_OVR SPI_SR_OVR
lypinator 0:bb348c97df44 265 #define I2S_FLAG_FRE SPI_SR_FRE
lypinator 0:bb348c97df44 266
lypinator 0:bb348c97df44 267 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
lypinator 0:bb348c97df44 268 #define I2S_FLAG_BSY SPI_SR_BSY
lypinator 0:bb348c97df44 269 /**
lypinator 0:bb348c97df44 270 * @}
lypinator 0:bb348c97df44 271 */
lypinator 0:bb348c97df44 272 /** @defgroup I2S_Clock_Source I2S Clock Source Definition
lypinator 0:bb348c97df44 273 * @{
lypinator 0:bb348c97df44 274 */
lypinator 0:bb348c97df44 275 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
lypinator 0:bb348c97df44 276 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
lypinator 0:bb348c97df44 277 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || \
lypinator 0:bb348c97df44 278 defined(STM32F479xx)
lypinator 0:bb348c97df44 279 #define I2S_CLOCK_PLL (0x00000000U)
lypinator 0:bb348c97df44 280 #define I2S_CLOCK_EXTERNAL (0x00000001U)
lypinator 0:bb348c97df44 281 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
lypinator 0:bb348c97df44 282 STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */
lypinator 0:bb348c97df44 283
lypinator 0:bb348c97df44 284 #if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) ||\
lypinator 0:bb348c97df44 285 defined(STM32F413xx) || defined(STM32F423xx)
lypinator 0:bb348c97df44 286 #define I2S_CLOCK_PLL (0x00000000U)
lypinator 0:bb348c97df44 287 #define I2S_CLOCK_EXTERNAL (0x00000001U)
lypinator 0:bb348c97df44 288 #define I2S_CLOCK_PLLR (0x00000002U)
lypinator 0:bb348c97df44 289 #define I2S_CLOCK_PLLSRC (0x00000003U)
lypinator 0:bb348c97df44 290 #endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
lypinator 0:bb348c97df44 291
lypinator 0:bb348c97df44 292 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
lypinator 0:bb348c97df44 293 #define I2S_CLOCK_PLLSRC (0x00000000U)
lypinator 0:bb348c97df44 294 #define I2S_CLOCK_EXTERNAL (0x00000001U)
lypinator 0:bb348c97df44 295 #define I2S_CLOCK_PLLR (0x00000002U)
lypinator 0:bb348c97df44 296 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
lypinator 0:bb348c97df44 297 /**
lypinator 0:bb348c97df44 298 * @}
lypinator 0:bb348c97df44 299 */
lypinator 0:bb348c97df44 300
lypinator 0:bb348c97df44 301 /**
lypinator 0:bb348c97df44 302 * @}
lypinator 0:bb348c97df44 303 */
lypinator 0:bb348c97df44 304
lypinator 0:bb348c97df44 305 /* Exported macro ------------------------------------------------------------*/
lypinator 0:bb348c97df44 306 /** @defgroup I2S_Exported_Macros I2S Exported Macros
lypinator 0:bb348c97df44 307 * @{
lypinator 0:bb348c97df44 308 */
lypinator 0:bb348c97df44 309
lypinator 0:bb348c97df44 310 /** @brief Reset I2S handle state
lypinator 0:bb348c97df44 311 * @param __HANDLE__ specifies the I2S Handle.
lypinator 0:bb348c97df44 312 * @retval None
lypinator 0:bb348c97df44 313 */
lypinator 0:bb348c97df44 314 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
lypinator 0:bb348c97df44 315
lypinator 0:bb348c97df44 316 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
lypinator 0:bb348c97df44 317 * @param __HANDLE__ specifies the I2S Handle.
lypinator 0:bb348c97df44 318 * @retval None
lypinator 0:bb348c97df44 319 */
lypinator 0:bb348c97df44 320 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
lypinator 0:bb348c97df44 321 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &=(uint16_t)(~SPI_I2SCFGR_I2SE))
lypinator 0:bb348c97df44 322
lypinator 0:bb348c97df44 323 /** @brief Enable or disable the specified I2S interrupts.
lypinator 0:bb348c97df44 324 * @param __HANDLE__ specifies the I2S Handle.
lypinator 0:bb348c97df44 325 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
lypinator 0:bb348c97df44 326 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 327 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
lypinator 0:bb348c97df44 328 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
lypinator 0:bb348c97df44 329 * @arg I2S_IT_ERR: Error interrupt enable
lypinator 0:bb348c97df44 330 * @retval None
lypinator 0:bb348c97df44 331 */
lypinator 0:bb348c97df44 332 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
lypinator 0:bb348c97df44 333 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &=(uint16_t)(~(__INTERRUPT__)))
lypinator 0:bb348c97df44 334
lypinator 0:bb348c97df44 335 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
lypinator 0:bb348c97df44 336 * @param __HANDLE__ specifies the I2S Handle.
lypinator 0:bb348c97df44 337 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
lypinator 0:bb348c97df44 338 * @param __INTERRUPT__ specifies the I2S interrupt source to check.
lypinator 0:bb348c97df44 339 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 340 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
lypinator 0:bb348c97df44 341 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
lypinator 0:bb348c97df44 342 * @arg I2S_IT_ERR: Error interrupt enable
lypinator 0:bb348c97df44 343 * @retval The new state of __IT__ (TRUE or FALSE).
lypinator 0:bb348c97df44 344 */
lypinator 0:bb348c97df44 345 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
lypinator 0:bb348c97df44 346
lypinator 0:bb348c97df44 347 /** @brief Checks whether the specified I2S flag is set or not.
lypinator 0:bb348c97df44 348 * @param __HANDLE__ specifies the I2S Handle.
lypinator 0:bb348c97df44 349 * @param __FLAG__ specifies the flag to check.
lypinator 0:bb348c97df44 350 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 351 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
lypinator 0:bb348c97df44 352 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
lypinator 0:bb348c97df44 353 * @arg I2S_FLAG_UDR: Underrun flag
lypinator 0:bb348c97df44 354 * @arg I2S_FLAG_OVR: Overrun flag
lypinator 0:bb348c97df44 355 * @arg I2S_FLAG_FRE: Frame error flag
lypinator 0:bb348c97df44 356 * @arg I2S_FLAG_CHSIDE: Channel Side flag
lypinator 0:bb348c97df44 357 * @arg I2S_FLAG_BSY: Busy flag
lypinator 0:bb348c97df44 358 * @retval The new state of __FLAG__ (TRUE or FALSE).
lypinator 0:bb348c97df44 359 */
lypinator 0:bb348c97df44 360 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
lypinator 0:bb348c97df44 361
lypinator 0:bb348c97df44 362 /** @brief Clears the I2S OVR pending flag.
lypinator 0:bb348c97df44 363 * @param __HANDLE__ specifies the I2S Handle.
lypinator 0:bb348c97df44 364 * @retval None
lypinator 0:bb348c97df44 365 */
lypinator 0:bb348c97df44 366 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
lypinator 0:bb348c97df44 367 do{ \
lypinator 0:bb348c97df44 368 __IO uint32_t tmpreg = 0x00U; \
lypinator 0:bb348c97df44 369 tmpreg = (__HANDLE__)->Instance->DR; \
lypinator 0:bb348c97df44 370 tmpreg = (__HANDLE__)->Instance->SR; \
lypinator 0:bb348c97df44 371 UNUSED(tmpreg); \
lypinator 0:bb348c97df44 372 } while(0)
lypinator 0:bb348c97df44 373
lypinator 0:bb348c97df44 374 /** @brief Clears the I2S UDR pending flag.
lypinator 0:bb348c97df44 375 * @param __HANDLE__ specifies the I2S Handle.
lypinator 0:bb348c97df44 376 * @retval None
lypinator 0:bb348c97df44 377 */
lypinator 0:bb348c97df44 378 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
lypinator 0:bb348c97df44 379 do{ \
lypinator 0:bb348c97df44 380 __IO uint32_t tmpreg = 0x00U; \
lypinator 0:bb348c97df44 381 tmpreg = (__HANDLE__)->Instance->SR; \
lypinator 0:bb348c97df44 382 UNUSED(tmpreg); \
lypinator 0:bb348c97df44 383 } while(0)
lypinator 0:bb348c97df44 384 /**
lypinator 0:bb348c97df44 385 * @}
lypinator 0:bb348c97df44 386 */
lypinator 0:bb348c97df44 387
lypinator 0:bb348c97df44 388 /* Include I2S Extension module */
lypinator 0:bb348c97df44 389 #include "stm32f4xx_hal_i2s_ex.h"
lypinator 0:bb348c97df44 390
lypinator 0:bb348c97df44 391 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 392 /** @defgroup I2S_Exported_Functions I2S Exported Functions
lypinator 0:bb348c97df44 393 * @{
lypinator 0:bb348c97df44 394 */
lypinator 0:bb348c97df44 395
lypinator 0:bb348c97df44 396 /** @defgroup I2S_Exported_Functions_Group1 I2S Initialization and de-initialization functions
lypinator 0:bb348c97df44 397 * @{
lypinator 0:bb348c97df44 398 */
lypinator 0:bb348c97df44 399 /* Initialization/de-initialization functions **********************************/
lypinator 0:bb348c97df44 400 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 401 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 402 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 403 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 404 /**
lypinator 0:bb348c97df44 405 * @}
lypinator 0:bb348c97df44 406 */
lypinator 0:bb348c97df44 407
lypinator 0:bb348c97df44 408 /** @defgroup I2S_Exported_Functions_Group2 I2S IO operation functions
lypinator 0:bb348c97df44 409 * @{
lypinator 0:bb348c97df44 410 */
lypinator 0:bb348c97df44 411 /* I/O operation functions *****************************************************/
lypinator 0:bb348c97df44 412 /* Blocking mode: Polling */
lypinator 0:bb348c97df44 413 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
lypinator 0:bb348c97df44 414 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
lypinator 0:bb348c97df44 415
lypinator 0:bb348c97df44 416 /* Non-Blocking mode: Interrupt */
lypinator 0:bb348c97df44 417 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
lypinator 0:bb348c97df44 418 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
lypinator 0:bb348c97df44 419 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 420
lypinator 0:bb348c97df44 421 /* Non-Blocking mode: DMA */
lypinator 0:bb348c97df44 422 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
lypinator 0:bb348c97df44 423 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
lypinator 0:bb348c97df44 424
lypinator 0:bb348c97df44 425 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 426 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 427 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 428
lypinator 0:bb348c97df44 429 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
lypinator 0:bb348c97df44 430 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 431 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 432 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 433 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 434 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 435 /**
lypinator 0:bb348c97df44 436 * @}
lypinator 0:bb348c97df44 437 */
lypinator 0:bb348c97df44 438
lypinator 0:bb348c97df44 439 /** @defgroup I2S_Exported_Functions_Group3 I2S Peripheral Control and State functions
lypinator 0:bb348c97df44 440 * @{
lypinator 0:bb348c97df44 441 */
lypinator 0:bb348c97df44 442 /* Peripheral Control and State functions ************************************/
lypinator 0:bb348c97df44 443 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 444 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
lypinator 0:bb348c97df44 445 /**
lypinator 0:bb348c97df44 446 * @}
lypinator 0:bb348c97df44 447 */
lypinator 0:bb348c97df44 448
lypinator 0:bb348c97df44 449 /**
lypinator 0:bb348c97df44 450 * @}
lypinator 0:bb348c97df44 451 */
lypinator 0:bb348c97df44 452
lypinator 0:bb348c97df44 453 /* Private types -------------------------------------------------------------*/
lypinator 0:bb348c97df44 454 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 455 /* Private constants ---------------------------------------------------------*/
lypinator 0:bb348c97df44 456 /** @defgroup I2S_Private_Constants I2S Private Constants
lypinator 0:bb348c97df44 457 * @{
lypinator 0:bb348c97df44 458 */
lypinator 0:bb348c97df44 459
lypinator 0:bb348c97df44 460 /**
lypinator 0:bb348c97df44 461 * @}
lypinator 0:bb348c97df44 462 */
lypinator 0:bb348c97df44 463
lypinator 0:bb348c97df44 464 /* Private macros ------------------------------------------------------------*/
lypinator 0:bb348c97df44 465 /** @defgroup I2S_Private_Macros I2S Private Macros
lypinator 0:bb348c97df44 466 * @{
lypinator 0:bb348c97df44 467 */
lypinator 0:bb348c97df44 468 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
lypinator 0:bb348c97df44 469 ((MODE) == I2S_MODE_SLAVE_RX) || \
lypinator 0:bb348c97df44 470 ((MODE) == I2S_MODE_MASTER_TX) || \
lypinator 0:bb348c97df44 471 ((MODE) == I2S_MODE_MASTER_RX))
lypinator 0:bb348c97df44 472
lypinator 0:bb348c97df44 473 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
lypinator 0:bb348c97df44 474 ((STANDARD) == I2S_STANDARD_MSB) || \
lypinator 0:bb348c97df44 475 ((STANDARD) == I2S_STANDARD_LSB) || \
lypinator 0:bb348c97df44 476 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
lypinator 0:bb348c97df44 477 ((STANDARD) == I2S_STANDARD_PCM_LONG))
lypinator 0:bb348c97df44 478
lypinator 0:bb348c97df44 479 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
lypinator 0:bb348c97df44 480 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
lypinator 0:bb348c97df44 481 ((FORMAT) == I2S_DATAFORMAT_24B) || \
lypinator 0:bb348c97df44 482 ((FORMAT) == I2S_DATAFORMAT_32B))
lypinator 0:bb348c97df44 483
lypinator 0:bb348c97df44 484 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
lypinator 0:bb348c97df44 485 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
lypinator 0:bb348c97df44 486
lypinator 0:bb348c97df44 487 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
lypinator 0:bb348c97df44 488 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
lypinator 0:bb348c97df44 489 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
lypinator 0:bb348c97df44 490
lypinator 0:bb348c97df44 491 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
lypinator 0:bb348c97df44 492 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
lypinator 0:bb348c97df44 493
lypinator 0:bb348c97df44 494 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
lypinator 0:bb348c97df44 495 ((CPOL) == I2S_CPOL_HIGH))
lypinator 0:bb348c97df44 496
lypinator 0:bb348c97df44 497 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
lypinator 0:bb348c97df44 498 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
lypinator 0:bb348c97df44 499 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F469xx) || \
lypinator 0:bb348c97df44 500 defined(STM32F479xx)
lypinator 0:bb348c97df44 501 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
lypinator 0:bb348c97df44 502 ((CLOCK) == I2S_CLOCK_PLL))
lypinator 0:bb348c97df44 503 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
lypinator 0:bb348c97df44 504 STM32F401xC || STM32F401xE || STM32F411xE || STM32F469xx || STM32F479xx */
lypinator 0:bb348c97df44 505
lypinator 0:bb348c97df44 506 #if defined(STM32F446xx) || defined(STM32F412Zx) || defined(STM32F412Vx) ||\
lypinator 0:bb348c97df44 507 defined(STM32F412Rx) || defined(STM32F412Cx) || defined (STM32F413xx) ||\
lypinator 0:bb348c97df44 508 defined(STM32F423xx)
lypinator 0:bb348c97df44 509 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
lypinator 0:bb348c97df44 510 ((CLOCK) == I2S_CLOCK_PLL) ||\
lypinator 0:bb348c97df44 511 ((CLOCK) == I2S_CLOCK_PLLSRC) ||\
lypinator 0:bb348c97df44 512 ((CLOCK) == I2S_CLOCK_PLLR))
lypinator 0:bb348c97df44 513 #endif /* STM32F446xx || STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
lypinator 0:bb348c97df44 514
lypinator 0:bb348c97df44 515 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
lypinator 0:bb348c97df44 516 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) ||\
lypinator 0:bb348c97df44 517 ((CLOCK) == I2S_CLOCK_PLLSRC) ||\
lypinator 0:bb348c97df44 518 ((CLOCK) == I2S_CLOCK_PLLR))
lypinator 0:bb348c97df44 519 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
lypinator 0:bb348c97df44 520
lypinator 0:bb348c97df44 521 /**
lypinator 0:bb348c97df44 522 * @}
lypinator 0:bb348c97df44 523 */
lypinator 0:bb348c97df44 524
lypinator 0:bb348c97df44 525 /* Private functions ---------------------------------------------------------*/
lypinator 0:bb348c97df44 526 /**
lypinator 0:bb348c97df44 527 * @}
lypinator 0:bb348c97df44 528 */
lypinator 0:bb348c97df44 529
lypinator 0:bb348c97df44 530 /**
lypinator 0:bb348c97df44 531 * @}
lypinator 0:bb348c97df44 532 */
lypinator 0:bb348c97df44 533
lypinator 0:bb348c97df44 534 #ifdef __cplusplus
lypinator 0:bb348c97df44 535 }
lypinator 0:bb348c97df44 536 #endif
lypinator 0:bb348c97df44 537
lypinator 0:bb348c97df44 538
lypinator 0:bb348c97df44 539 #endif /* __STM32F4xx_HAL_I2S_H */
lypinator 0:bb348c97df44 540
lypinator 0:bb348c97df44 541 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/