DevLibMemoryController - Initial commit

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Initial commit

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2c.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:: lypinator
Date:: Wed Sep 16 01:11:49 2020 +0000
Revision:: 0:bb348c97df44

Added PWM

Who changed what in which revision?

User	Revision	Line number	New contents of line
lypinator	0:bb348c97df44	1	/**
lypinator	0:bb348c97df44	2	******************************************************************************
lypinator	0:bb348c97df44	3	* @file stm32f4xx_hal_i2c.c
lypinator	0:bb348c97df44	4	* @author MCD Application Team
lypinator	0:bb348c97df44	5	* @brief I2C HAL module driver.
lypinator	0:bb348c97df44	6	* This file provides firmware functions to manage the following
lypinator	0:bb348c97df44	7	* functionalities of the Inter Integrated Circuit (I2C) peripheral:
lypinator	0:bb348c97df44	8	* + Initialization and de-initialization functions
lypinator	0:bb348c97df44	9	* + IO operation functions
lypinator	0:bb348c97df44	10	* + Peripheral State, Mode and Error functions
lypinator	0:bb348c97df44	11	*
lypinator	0:bb348c97df44	12	@verbatim
lypinator	0:bb348c97df44	13	==============================================================================
lypinator	0:bb348c97df44	14	##### How to use this driver #####
lypinator	0:bb348c97df44	15	==============================================================================
lypinator	0:bb348c97df44	16	[..]
lypinator	0:bb348c97df44	17	The I2C HAL driver can be used as follows:
lypinator	0:bb348c97df44	18
lypinator	0:bb348c97df44	19	(#) Declare a I2C_HandleTypeDef handle structure, for example:
lypinator	0:bb348c97df44	20	I2C_HandleTypeDef hi2c;
lypinator	0:bb348c97df44	21
lypinator	0:bb348c97df44	22	(#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
lypinator	0:bb348c97df44	23	(##) Enable the I2Cx interface clock
lypinator	0:bb348c97df44	24	(##) I2C pins configuration
lypinator	0:bb348c97df44	25	(+++) Enable the clock for the I2C GPIOs
lypinator	0:bb348c97df44	26	(+++) Configure I2C pins as alternate function open-drain
lypinator	0:bb348c97df44	27	(##) NVIC configuration if you need to use interrupt process
lypinator	0:bb348c97df44	28	(+++) Configure the I2Cx interrupt priority
lypinator	0:bb348c97df44	29	(+++) Enable the NVIC I2C IRQ Channel
lypinator	0:bb348c97df44	30	(##) DMA Configuration if you need to use DMA process
lypinator	0:bb348c97df44	31	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
lypinator	0:bb348c97df44	32	(+++) Enable the DMAx interface clock using
lypinator	0:bb348c97df44	33	(+++) Configure the DMA handle parameters
lypinator	0:bb348c97df44	34	(+++) Configure the DMA Tx or Rx Stream
lypinator	0:bb348c97df44	35	(+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
lypinator	0:bb348c97df44	36	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
lypinator	0:bb348c97df44	37	the DMA Tx or Rx Stream
lypinator	0:bb348c97df44	38
lypinator	0:bb348c97df44	39	(#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
lypinator	0:bb348c97df44	40	Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
lypinator	0:bb348c97df44	41
lypinator	0:bb348c97df44	42	(#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
lypinator	0:bb348c97df44	43	(GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
lypinator	0:bb348c97df44	44
lypinator	0:bb348c97df44	45	(#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
lypinator	0:bb348c97df44	46
lypinator	0:bb348c97df44	47	(#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
lypinator	0:bb348c97df44	48
lypinator	0:bb348c97df44	49	* Polling mode IO operation *
lypinator	0:bb348c97df44	50	=================================
lypinator	0:bb348c97df44	51	[..]
lypinator	0:bb348c97df44	52	(+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
lypinator	0:bb348c97df44	53	(+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
lypinator	0:bb348c97df44	54	(+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
lypinator	0:bb348c97df44	55	(+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
lypinator	0:bb348c97df44	56
lypinator	0:bb348c97df44	57	* Polling mode IO MEM operation *
lypinator	0:bb348c97df44	58	=====================================
lypinator	0:bb348c97df44	59	[..]
lypinator	0:bb348c97df44	60	(+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
lypinator	0:bb348c97df44	61	(+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
lypinator	0:bb348c97df44	62
lypinator	0:bb348c97df44	63
lypinator	0:bb348c97df44	64	* Interrupt mode IO operation *
lypinator	0:bb348c97df44	65	===================================
lypinator	0:bb348c97df44	66	[..]
lypinator	0:bb348c97df44	67	(+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
lypinator	0:bb348c97df44	68	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
lypinator	0:bb348c97df44	69	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
lypinator	0:bb348c97df44	70	(+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
lypinator	0:bb348c97df44	71	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
lypinator	0:bb348c97df44	72	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
lypinator	0:bb348c97df44	73	(+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
lypinator	0:bb348c97df44	74	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
lypinator	0:bb348c97df44	75	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
lypinator	0:bb348c97df44	76	(+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
lypinator	0:bb348c97df44	77	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
lypinator	0:bb348c97df44	78	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
lypinator	0:bb348c97df44	79	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
lypinator	0:bb348c97df44	80	add his own code by customization of function pointer HAL_I2C_ErrorCallback
lypinator	0:bb348c97df44	81	(+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
lypinator	0:bb348c97df44	82	(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
lypinator	0:bb348c97df44	83	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
lypinator	0:bb348c97df44	84
lypinator	0:bb348c97df44	85	* Interrupt mode IO sequential operation *
lypinator	0:bb348c97df44	86	==============================================
lypinator	0:bb348c97df44	87	[..]
lypinator	0:bb348c97df44	88	(@) These interfaces allow to manage a sequential transfer with a repeated start condition
lypinator	0:bb348c97df44	89	when a direction change during transfer
lypinator	0:bb348c97df44	90	[..]
lypinator	0:bb348c97df44	91	(+) A specific option field manage the different steps of a sequential transfer
lypinator	0:bb348c97df44	92	(+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
lypinator	0:bb348c97df44	93	(++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
lypinator	0:bb348c97df44	94	(++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
lypinator	0:bb348c97df44	95	and data to transfer without a final stop condition
lypinator	0:bb348c97df44	96	(++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
lypinator	0:bb348c97df44	97	and with new data to transfer if the direction change or manage only the new data to transfer
lypinator	0:bb348c97df44	98	if no direction change and without a final stop condition in both cases
lypinator	0:bb348c97df44	99	(++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
lypinator	0:bb348c97df44	100	and with new data to transfer if the direction change or manage only the new data to transfer
lypinator	0:bb348c97df44	101	if no direction change and with a final stop condition in both cases
lypinator	0:bb348c97df44	102
lypinator	0:bb348c97df44	103	(+) Differents sequential I2C interfaces are listed below:
lypinator	0:bb348c97df44	104	(++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
lypinator	0:bb348c97df44	105	(+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
lypinator	0:bb348c97df44	106	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
lypinator	0:bb348c97df44	107	(++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
lypinator	0:bb348c97df44	108	(+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
lypinator	0:bb348c97df44	109	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
lypinator	0:bb348c97df44	110	(++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
lypinator	0:bb348c97df44	111	(+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
lypinator	0:bb348c97df44	112	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
lypinator	0:bb348c97df44	113	(++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
lypinator	0:bb348c97df44	114	(+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
lypinator	0:bb348c97df44	115	add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
lypinator	0:bb348c97df44	116	(+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
lypinator	0:bb348c97df44	117	add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
lypinator	0:bb348c97df44	118	(++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
lypinator	0:bb348c97df44	119	(+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
lypinator	0:bb348c97df44	120	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
lypinator	0:bb348c97df44	121	(++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
lypinator	0:bb348c97df44	122	(+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
lypinator	0:bb348c97df44	123	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
lypinator	0:bb348c97df44	124	(++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
lypinator	0:bb348c97df44	125	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
lypinator	0:bb348c97df44	126	(++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
lypinator	0:bb348c97df44	127	(++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
lypinator	0:bb348c97df44	128	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
lypinator	0:bb348c97df44	129
lypinator	0:bb348c97df44	130	* Interrupt mode IO MEM operation *
lypinator	0:bb348c97df44	131	=======================================
lypinator	0:bb348c97df44	132	[..]
lypinator	0:bb348c97df44	133	(+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
lypinator	0:bb348c97df44	134	HAL_I2C_Mem_Write_IT()
lypinator	0:bb348c97df44	135	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
lypinator	0:bb348c97df44	136	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
lypinator	0:bb348c97df44	137	(+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
lypinator	0:bb348c97df44	138	HAL_I2C_Mem_Read_IT()
lypinator	0:bb348c97df44	139	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
lypinator	0:bb348c97df44	140	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
lypinator	0:bb348c97df44	141	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
lypinator	0:bb348c97df44	142	add his own code by customization of function pointer HAL_I2C_ErrorCallback
lypinator	0:bb348c97df44	143
lypinator	0:bb348c97df44	144	* DMA mode IO operation *
lypinator	0:bb348c97df44	145	==============================
lypinator	0:bb348c97df44	146	[..]
lypinator	0:bb348c97df44	147	(+) Transmit in master mode an amount of data in non blocking mode (DMA) using
lypinator	0:bb348c97df44	148	HAL_I2C_Master_Transmit_DMA()
lypinator	0:bb348c97df44	149	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
lypinator	0:bb348c97df44	150	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
lypinator	0:bb348c97df44	151	(+) Receive in master mode an amount of data in non blocking mode (DMA) using
lypinator	0:bb348c97df44	152	HAL_I2C_Master_Receive_DMA()
lypinator	0:bb348c97df44	153	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
lypinator	0:bb348c97df44	154	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
lypinator	0:bb348c97df44	155	(+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
lypinator	0:bb348c97df44	156	HAL_I2C_Slave_Transmit_DMA()
lypinator	0:bb348c97df44	157	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
lypinator	0:bb348c97df44	158	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
lypinator	0:bb348c97df44	159	(+) Receive in slave mode an amount of data in non blocking mode (DMA) using
lypinator	0:bb348c97df44	160	HAL_I2C_Slave_Receive_DMA()
lypinator	0:bb348c97df44	161	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
lypinator	0:bb348c97df44	162	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
lypinator	0:bb348c97df44	163	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
lypinator	0:bb348c97df44	164	add his own code by customization of function pointer HAL_I2C_ErrorCallback
lypinator	0:bb348c97df44	165	(+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
lypinator	0:bb348c97df44	166	(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
lypinator	0:bb348c97df44	167	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
lypinator	0:bb348c97df44	168
lypinator	0:bb348c97df44	169	* DMA mode IO MEM operation *
lypinator	0:bb348c97df44	170	=================================
lypinator	0:bb348c97df44	171	[..]
lypinator	0:bb348c97df44	172	(+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
lypinator	0:bb348c97df44	173	HAL_I2C_Mem_Write_DMA()
lypinator	0:bb348c97df44	174	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
lypinator	0:bb348c97df44	175	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
lypinator	0:bb348c97df44	176	(+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
lypinator	0:bb348c97df44	177	HAL_I2C_Mem_Read_DMA()
lypinator	0:bb348c97df44	178	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
lypinator	0:bb348c97df44	179	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
lypinator	0:bb348c97df44	180	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
lypinator	0:bb348c97df44	181	add his own code by customization of function pointer HAL_I2C_ErrorCallback
lypinator	0:bb348c97df44	182
lypinator	0:bb348c97df44	183
lypinator	0:bb348c97df44	184	* I2C HAL driver macros list *
lypinator	0:bb348c97df44	185	==================================
lypinator	0:bb348c97df44	186	[..]
lypinator	0:bb348c97df44	187	Below the list of most used macros in I2C HAL driver.
lypinator	0:bb348c97df44	188
lypinator	0:bb348c97df44	189	(+) __HAL_I2C_ENABLE: Enable the I2C peripheral
lypinator	0:bb348c97df44	190	(+) __HAL_I2C_DISABLE: Disable the I2C peripheral
lypinator	0:bb348c97df44	191	(+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
lypinator	0:bb348c97df44	192	(+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
lypinator	0:bb348c97df44	193	(+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
lypinator	0:bb348c97df44	194	(+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
lypinator	0:bb348c97df44	195
lypinator	0:bb348c97df44	196	[..]
lypinator	0:bb348c97df44	197	(@) You can refer to the I2C HAL driver header file for more useful macros
lypinator	0:bb348c97df44	198
lypinator	0:bb348c97df44	199
lypinator	0:bb348c97df44	200	@endverbatim
lypinator	0:bb348c97df44	201	******************************************************************************
lypinator	0:bb348c97df44	202	* @attention
lypinator	0:bb348c97df44	203	*
lypinator	0:bb348c97df44	204	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator	0:bb348c97df44	205	*
lypinator	0:bb348c97df44	206	* Redistribution and use in source and binary forms, with or without modification,
lypinator	0:bb348c97df44	207	* are permitted provided that the following conditions are met:
lypinator	0:bb348c97df44	208	* 1. Redistributions of source code must retain the above copyright notice,
lypinator	0:bb348c97df44	209	* this list of conditions and the following disclaimer.
lypinator	0:bb348c97df44	210	* 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator	0:bb348c97df44	211	* this list of conditions and the following disclaimer in the documentation
lypinator	0:bb348c97df44	212	* and/or other materials provided with the distribution.
lypinator	0:bb348c97df44	213	* 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator	0:bb348c97df44	214	* may be used to endorse or promote products derived from this software
lypinator	0:bb348c97df44	215	* without specific prior written permission.
lypinator	0:bb348c97df44	216	*
lypinator	0:bb348c97df44	217	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator	0:bb348c97df44	218	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator	0:bb348c97df44	219	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator	0:bb348c97df44	220	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator	0:bb348c97df44	221	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator	0:bb348c97df44	222	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator	0:bb348c97df44	223	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator	0:bb348c97df44	224	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator	0:bb348c97df44	225	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator	0:bb348c97df44	226	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator	0:bb348c97df44	227	*
lypinator	0:bb348c97df44	228	******************************************************************************
lypinator	0:bb348c97df44	229	*/
lypinator	0:bb348c97df44	230
lypinator	0:bb348c97df44	231	/* Includes ------------------------------------------------------------------*/
lypinator	0:bb348c97df44	232	#include "stm32f4xx_hal.h"
lypinator	0:bb348c97df44	233
lypinator	0:bb348c97df44	234	/** @addtogroup STM32F4xx_HAL_Driver
lypinator	0:bb348c97df44	235	* @{
lypinator	0:bb348c97df44	236	*/
lypinator	0:bb348c97df44	237
lypinator	0:bb348c97df44	238	/** @defgroup I2C I2C
lypinator	0:bb348c97df44	239	* @brief I2C HAL module driver
lypinator	0:bb348c97df44	240	* @{
lypinator	0:bb348c97df44	241	*/
lypinator	0:bb348c97df44	242
lypinator	0:bb348c97df44	243	#ifdef HAL_I2C_MODULE_ENABLED
lypinator	0:bb348c97df44	244
lypinator	0:bb348c97df44	245	/* Private typedef -----------------------------------------------------------*/
lypinator	0:bb348c97df44	246	/* Private define ------------------------------------------------------------*/
lypinator	0:bb348c97df44	247	/** @addtogroup I2C_Private_Define
lypinator	0:bb348c97df44	248	* @{
lypinator	0:bb348c97df44	249	*/
lypinator	0:bb348c97df44	250	#define I2C_TIMEOUT_FLAG 35U /!< Timeout 35 ms /
lypinator	0:bb348c97df44	251	#define I2C_TIMEOUT_BUSY_FLAG 25U /!< Timeout 25 ms /
lypinator	0:bb348c97df44	252	#define I2C_NO_OPTION_FRAME 0xFFFF0000U /!< XferOptions default value /
lypinator	0:bb348c97df44	253
lypinator	0:bb348c97df44	254	/* Private define for @ref PreviousState usage */
lypinator	0:bb348c97df44	255	#define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX \| HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /!< Mask State define, keep only RX and TX bits /
lypinator	0:bb348c97df44	256	#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /!< Default Value /
lypinator	0:bb348c97df44	257	#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) \| HAL_I2C_MODE_MASTER)) /!< Master Busy TX, combinaison of State LSB and Mode enum /
lypinator	0:bb348c97df44	258	#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) \| HAL_I2C_MODE_MASTER)) /!< Master Busy RX, combinaison of State LSB and Mode enum /
lypinator	0:bb348c97df44	259	#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) \| HAL_I2C_MODE_SLAVE)) /!< Slave Busy TX, combinaison of State LSB and Mode enum /
lypinator	0:bb348c97df44	260	#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) \| HAL_I2C_MODE_SLAVE)) /!< Slave Busy RX, combinaison of State LSB and Mode enum /
lypinator	0:bb348c97df44	261
lypinator	0:bb348c97df44	262	/**
lypinator	0:bb348c97df44	263	* @}
lypinator	0:bb348c97df44	264	*/
lypinator	0:bb348c97df44	265
lypinator	0:bb348c97df44	266	/* Private macro -------------------------------------------------------------*/
lypinator	0:bb348c97df44	267	/* Private variables ---------------------------------------------------------*/
lypinator	0:bb348c97df44	268	/* Private function prototypes -----------------------------------------------*/
lypinator	0:bb348c97df44	269	/** @addtogroup I2C_Private_Functions
lypinator	0:bb348c97df44	270	* @{
lypinator	0:bb348c97df44	271	*/
lypinator	0:bb348c97df44	272	/* Private functions to handle DMA transfer */
lypinator	0:bb348c97df44	273	static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
lypinator	0:bb348c97df44	274	static void I2C_DMAError(DMA_HandleTypeDef *hdma);
lypinator	0:bb348c97df44	275	static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
lypinator	0:bb348c97df44	276
lypinator	0:bb348c97df44	277	static void I2C_ITError(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	278
lypinator	0:bb348c97df44	279	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
lypinator	0:bb348c97df44	280	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
lypinator	0:bb348c97df44	281	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
lypinator	0:bb348c97df44	282	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
lypinator	0:bb348c97df44	283	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
lypinator	0:bb348c97df44	284	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
lypinator	0:bb348c97df44	285	static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
lypinator	0:bb348c97df44	286	static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
lypinator	0:bb348c97df44	287	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
lypinator	0:bb348c97df44	288	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
lypinator	0:bb348c97df44	289	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	290
lypinator	0:bb348c97df44	291	/* Private functions for I2C transfer IRQ handler */
lypinator	0:bb348c97df44	292	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	293	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	294	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	295	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	296	static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	297	static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	298	static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	299
lypinator	0:bb348c97df44	300	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	301	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	302	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	303	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	304	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	305	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	306	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
lypinator	0:bb348c97df44	307	/**
lypinator	0:bb348c97df44	308	* @}
lypinator	0:bb348c97df44	309	*/
lypinator	0:bb348c97df44	310
lypinator	0:bb348c97df44	311	/* Exported functions --------------------------------------------------------*/
lypinator	0:bb348c97df44	312	/** @defgroup I2C_Exported_Functions I2C Exported Functions
lypinator	0:bb348c97df44	313	* @{
lypinator	0:bb348c97df44	314	*/
lypinator	0:bb348c97df44	315
lypinator	0:bb348c97df44	316	/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
lypinator	0:bb348c97df44	317	* @brief Initialization and Configuration functions
lypinator	0:bb348c97df44	318	*
lypinator	0:bb348c97df44	319	@verbatim
lypinator	0:bb348c97df44	320	===============================================================================
lypinator	0:bb348c97df44	321	##### Initialization and de-initialization functions #####
lypinator	0:bb348c97df44	322	===============================================================================
lypinator	0:bb348c97df44	323	[..] This subsection provides a set of functions allowing to initialize and
lypinator	0:bb348c97df44	324	de-initialize the I2Cx peripheral:
lypinator	0:bb348c97df44	325
lypinator	0:bb348c97df44	326	(+) User must Implement HAL_I2C_MspInit() function in which he configures
lypinator	0:bb348c97df44	327	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
lypinator	0:bb348c97df44	328
lypinator	0:bb348c97df44	329	(+) Call the function HAL_I2C_Init() to configure the selected device with
lypinator	0:bb348c97df44	330	the selected configuration:
lypinator	0:bb348c97df44	331	(++) Communication Speed
lypinator	0:bb348c97df44	332	(++) Duty cycle
lypinator	0:bb348c97df44	333	(++) Addressing mode
lypinator	0:bb348c97df44	334	(++) Own Address 1
lypinator	0:bb348c97df44	335	(++) Dual Addressing mode
lypinator	0:bb348c97df44	336	(++) Own Address 2
lypinator	0:bb348c97df44	337	(++) General call mode
lypinator	0:bb348c97df44	338	(++) Nostretch mode
lypinator	0:bb348c97df44	339
lypinator	0:bb348c97df44	340	(+) Call the function HAL_I2C_DeInit() to restore the default configuration
lypinator	0:bb348c97df44	341	of the selected I2Cx peripheral.
lypinator	0:bb348c97df44	342
lypinator	0:bb348c97df44	343	@endverbatim
lypinator	0:bb348c97df44	344	* @{
lypinator	0:bb348c97df44	345	*/
lypinator	0:bb348c97df44	346
lypinator	0:bb348c97df44	347	/**
lypinator	0:bb348c97df44	348	* @brief Initializes the I2C according to the specified parameters
lypinator	0:bb348c97df44	349	* in the I2C_InitTypeDef and create the associated handle.
lypinator	0:bb348c97df44	350	* @param hi2c pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	351	* the configuration information for I2C module
lypinator	0:bb348c97df44	352	* @retval HAL status
lypinator	0:bb348c97df44	353	*/
lypinator	0:bb348c97df44	354	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	355	{
lypinator	0:bb348c97df44	356	uint32_t freqrange = 0U;
lypinator	0:bb348c97df44	357	uint32_t pclk1 = 0U;
lypinator	0:bb348c97df44	358
lypinator	0:bb348c97df44	359	/* Check the I2C handle allocation */
lypinator	0:bb348c97df44	360	if(hi2c == NULL)
lypinator	0:bb348c97df44	361	{
lypinator	0:bb348c97df44	362	return HAL_ERROR;
lypinator	0:bb348c97df44	363	}
lypinator	0:bb348c97df44	364
lypinator	0:bb348c97df44	365	/* Check the parameters */
lypinator	0:bb348c97df44	366	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
lypinator	0:bb348c97df44	367	assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
lypinator	0:bb348c97df44	368	assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
lypinator	0:bb348c97df44	369	assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
lypinator	0:bb348c97df44	370	assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
lypinator	0:bb348c97df44	371	assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
lypinator	0:bb348c97df44	372	assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
lypinator	0:bb348c97df44	373	assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
lypinator	0:bb348c97df44	374	assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
lypinator	0:bb348c97df44	375
lypinator	0:bb348c97df44	376	if(hi2c->State == HAL_I2C_STATE_RESET)
lypinator	0:bb348c97df44	377	{
lypinator	0:bb348c97df44	378	/* Allocate lock resource and initialize it */
lypinator	0:bb348c97df44	379	hi2c->Lock = HAL_UNLOCKED;
lypinator	0:bb348c97df44	380	/* Init the low level hardware : GPIO, CLOCK, NVIC */
lypinator	0:bb348c97df44	381	HAL_I2C_MspInit(hi2c);
lypinator	0:bb348c97df44	382	}
lypinator	0:bb348c97df44	383
lypinator	0:bb348c97df44	384	hi2c->State = HAL_I2C_STATE_BUSY;
lypinator	0:bb348c97df44	385
lypinator	0:bb348c97df44	386	/* Disable the selected I2C peripheral */
lypinator	0:bb348c97df44	387	__HAL_I2C_DISABLE(hi2c);
lypinator	0:bb348c97df44	388
lypinator	0:bb348c97df44	389	/* Get PCLK1 frequency */
lypinator	0:bb348c97df44	390	pclk1 = HAL_RCC_GetPCLK1Freq();
lypinator	0:bb348c97df44	391
lypinator	0:bb348c97df44	392	/* Calculate frequency range */
lypinator	0:bb348c97df44	393	freqrange = I2C_FREQRANGE(pclk1);
lypinator	0:bb348c97df44	394
lypinator	0:bb348c97df44	395	/---------------------------- I2Cx CR2 Configuration ----------------------/
lypinator	0:bb348c97df44	396	/* Configure I2Cx: Frequency range */
lypinator	0:bb348c97df44	397	hi2c->Instance->CR2 = freqrange;
lypinator	0:bb348c97df44	398
lypinator	0:bb348c97df44	399	/---------------------------- I2Cx TRISE Configuration --------------------/
lypinator	0:bb348c97df44	400	/* Configure I2Cx: Rise Time */
lypinator	0:bb348c97df44	401	hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
lypinator	0:bb348c97df44	402
lypinator	0:bb348c97df44	403	/---------------------------- I2Cx CCR Configuration ----------------------/
lypinator	0:bb348c97df44	404	/* Configure I2Cx: Speed */
lypinator	0:bb348c97df44	405	hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
lypinator	0:bb348c97df44	406
lypinator	0:bb348c97df44	407	/---------------------------- I2Cx CR1 Configuration ----------------------/
lypinator	0:bb348c97df44	408	/* Configure I2Cx: Generalcall and NoStretch mode */
lypinator	0:bb348c97df44	409	hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode \| hi2c->Init.NoStretchMode);
lypinator	0:bb348c97df44	410
lypinator	0:bb348c97df44	411	/---------------------------- I2Cx OAR1 Configuration ---------------------/
lypinator	0:bb348c97df44	412	/* Configure I2Cx: Own Address1 and addressing mode */
lypinator	0:bb348c97df44	413	hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode \| hi2c->Init.OwnAddress1);
lypinator	0:bb348c97df44	414
lypinator	0:bb348c97df44	415	/---------------------------- I2Cx OAR2 Configuration ---------------------/
lypinator	0:bb348c97df44	416	/* Configure I2Cx: Dual mode and Own Address2 */
lypinator	0:bb348c97df44	417	hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode \| hi2c->Init.OwnAddress2);
lypinator	0:bb348c97df44	418
lypinator	0:bb348c97df44	419	/* Enable the selected I2C peripheral */
lypinator	0:bb348c97df44	420	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	421
lypinator	0:bb348c97df44	422	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	423	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	424	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	425	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	426
lypinator	0:bb348c97df44	427	return HAL_OK;
lypinator	0:bb348c97df44	428	}
lypinator	0:bb348c97df44	429
lypinator	0:bb348c97df44	430	/**
lypinator	0:bb348c97df44	431	* @brief DeInitializes the I2C peripheral.
lypinator	0:bb348c97df44	432	* @param hi2c pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	433	* the configuration information for I2C module
lypinator	0:bb348c97df44	434	* @retval HAL status
lypinator	0:bb348c97df44	435	*/
lypinator	0:bb348c97df44	436	HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	437	{
lypinator	0:bb348c97df44	438	/* Check the I2C handle allocation */
lypinator	0:bb348c97df44	439	if(hi2c == NULL)
lypinator	0:bb348c97df44	440	{
lypinator	0:bb348c97df44	441	return HAL_ERROR;
lypinator	0:bb348c97df44	442	}
lypinator	0:bb348c97df44	443
lypinator	0:bb348c97df44	444	/* Check the parameters */
lypinator	0:bb348c97df44	445	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
lypinator	0:bb348c97df44	446
lypinator	0:bb348c97df44	447	hi2c->State = HAL_I2C_STATE_BUSY;
lypinator	0:bb348c97df44	448
lypinator	0:bb348c97df44	449	/* Disable the I2C Peripheral Clock */
lypinator	0:bb348c97df44	450	__HAL_I2C_DISABLE(hi2c);
lypinator	0:bb348c97df44	451
lypinator	0:bb348c97df44	452	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
lypinator	0:bb348c97df44	453	HAL_I2C_MspDeInit(hi2c);
lypinator	0:bb348c97df44	454
lypinator	0:bb348c97df44	455	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	456	hi2c->State = HAL_I2C_STATE_RESET;
lypinator	0:bb348c97df44	457	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	458	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	459
lypinator	0:bb348c97df44	460	/* Release Lock */
lypinator	0:bb348c97df44	461	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	462
lypinator	0:bb348c97df44	463	return HAL_OK;
lypinator	0:bb348c97df44	464	}
lypinator	0:bb348c97df44	465
lypinator	0:bb348c97df44	466	/**
lypinator	0:bb348c97df44	467	* @brief I2C MSP Init.
lypinator	0:bb348c97df44	468	* @param hi2c pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	469	* the configuration information for I2C module
lypinator	0:bb348c97df44	470	* @retval None
lypinator	0:bb348c97df44	471	*/
lypinator	0:bb348c97df44	472	__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	473	{
lypinator	0:bb348c97df44	474	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	475	UNUSED(hi2c);
lypinator	0:bb348c97df44	476	/* NOTE : This function Should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	477	the HAL_I2C_MspInit could be implemented in the user file
lypinator	0:bb348c97df44	478	*/
lypinator	0:bb348c97df44	479	}
lypinator	0:bb348c97df44	480
lypinator	0:bb348c97df44	481	/**
lypinator	0:bb348c97df44	482	* @brief I2C MSP DeInit
lypinator	0:bb348c97df44	483	* @param hi2c pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	484	* the configuration information for I2C module
lypinator	0:bb348c97df44	485	* @retval None
lypinator	0:bb348c97df44	486	*/
lypinator	0:bb348c97df44	487	__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	488	{
lypinator	0:bb348c97df44	489	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	490	UNUSED(hi2c);
lypinator	0:bb348c97df44	491	/* NOTE : This function Should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	492	the HAL_I2C_MspDeInit could be implemented in the user file
lypinator	0:bb348c97df44	493	*/
lypinator	0:bb348c97df44	494	}
lypinator	0:bb348c97df44	495
lypinator	0:bb348c97df44	496	/**
lypinator	0:bb348c97df44	497	* @}
lypinator	0:bb348c97df44	498	*/
lypinator	0:bb348c97df44	499
lypinator	0:bb348c97df44	500	/** @defgroup I2C_Exported_Functions_Group2 IO operation functions
lypinator	0:bb348c97df44	501	* @brief Data transfers functions
lypinator	0:bb348c97df44	502	*
lypinator	0:bb348c97df44	503	@verbatim
lypinator	0:bb348c97df44	504	===============================================================================
lypinator	0:bb348c97df44	505	##### IO operation functions #####
lypinator	0:bb348c97df44	506	===============================================================================
lypinator	0:bb348c97df44	507	[..]
lypinator	0:bb348c97df44	508	This subsection provides a set of functions allowing to manage the I2C data
lypinator	0:bb348c97df44	509	transfers.
lypinator	0:bb348c97df44	510
lypinator	0:bb348c97df44	511	(#) There are two modes of transfer:
lypinator	0:bb348c97df44	512	(++) Blocking mode : The communication is performed in the polling mode.
lypinator	0:bb348c97df44	513	The status of all data processing is returned by the same function
lypinator	0:bb348c97df44	514	after finishing transfer.
lypinator	0:bb348c97df44	515	(++) No-Blocking mode : The communication is performed using Interrupts
lypinator	0:bb348c97df44	516	or DMA. These functions return the status of the transfer startup.
lypinator	0:bb348c97df44	517	The end of the data processing will be indicated through the
lypinator	0:bb348c97df44	518	dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
lypinator	0:bb348c97df44	519	using DMA mode.
lypinator	0:bb348c97df44	520
lypinator	0:bb348c97df44	521	(#) Blocking mode functions are :
lypinator	0:bb348c97df44	522	(++) HAL_I2C_Master_Transmit()
lypinator	0:bb348c97df44	523	(++) HAL_I2C_Master_Receive()
lypinator	0:bb348c97df44	524	(++) HAL_I2C_Slave_Transmit()
lypinator	0:bb348c97df44	525	(++) HAL_I2C_Slave_Receive()
lypinator	0:bb348c97df44	526	(++) HAL_I2C_Mem_Write()
lypinator	0:bb348c97df44	527	(++) HAL_I2C_Mem_Read()
lypinator	0:bb348c97df44	528	(++) HAL_I2C_IsDeviceReady()
lypinator	0:bb348c97df44	529
lypinator	0:bb348c97df44	530	(#) No-Blocking mode functions with Interrupt are :
lypinator	0:bb348c97df44	531	(++) HAL_I2C_Master_Transmit_IT()
lypinator	0:bb348c97df44	532	(++) HAL_I2C_Master_Receive_IT()
lypinator	0:bb348c97df44	533	(++) HAL_I2C_Slave_Transmit_IT()
lypinator	0:bb348c97df44	534	(++) HAL_I2C_Slave_Receive_IT()
lypinator	0:bb348c97df44	535	(++) HAL_I2C_Master_Sequential_Transmit_IT()
lypinator	0:bb348c97df44	536	(++) HAL_I2C_Master_Sequential_Receive_IT()
lypinator	0:bb348c97df44	537	(++) HAL_I2C_Slave_Sequential_Transmit_IT()
lypinator	0:bb348c97df44	538	(++) HAL_I2C_Slave_Sequential_Receive_IT()
lypinator	0:bb348c97df44	539	(++) HAL_I2C_Mem_Write_IT()
lypinator	0:bb348c97df44	540	(++) HAL_I2C_Mem_Read_IT()
lypinator	0:bb348c97df44	541
lypinator	0:bb348c97df44	542	(#) No-Blocking mode functions with DMA are :
lypinator	0:bb348c97df44	543	(++) HAL_I2C_Master_Transmit_DMA()
lypinator	0:bb348c97df44	544	(++) HAL_I2C_Master_Receive_DMA()
lypinator	0:bb348c97df44	545	(++) HAL_I2C_Slave_Transmit_DMA()
lypinator	0:bb348c97df44	546	(++) HAL_I2C_Slave_Receive_DMA()
lypinator	0:bb348c97df44	547	(++) HAL_I2C_Mem_Write_DMA()
lypinator	0:bb348c97df44	548	(++) HAL_I2C_Mem_Read_DMA()
lypinator	0:bb348c97df44	549
lypinator	0:bb348c97df44	550	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
lypinator	0:bb348c97df44	551	(++) HAL_I2C_MemTxCpltCallback()
lypinator	0:bb348c97df44	552	(++) HAL_I2C_MemRxCpltCallback()
lypinator	0:bb348c97df44	553	(++) HAL_I2C_MasterTxCpltCallback()
lypinator	0:bb348c97df44	554	(++) HAL_I2C_MasterRxCpltCallback()
lypinator	0:bb348c97df44	555	(++) HAL_I2C_SlaveTxCpltCallback()
lypinator	0:bb348c97df44	556	(++) HAL_I2C_SlaveRxCpltCallback()
lypinator	0:bb348c97df44	557	(++) HAL_I2C_ErrorCallback()
lypinator	0:bb348c97df44	558	(++) HAL_I2C_AbortCpltCallback()
lypinator	0:bb348c97df44	559
lypinator	0:bb348c97df44	560	@endverbatim
lypinator	0:bb348c97df44	561	* @{
lypinator	0:bb348c97df44	562	*/
lypinator	0:bb348c97df44	563
lypinator	0:bb348c97df44	564	/**
lypinator	0:bb348c97df44	565	* @brief Transmits in master mode an amount of data in blocking mode.
lypinator	0:bb348c97df44	566	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	567	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	568	* @param DevAddress Target device address The device 7 bits address value
lypinator	0:bb348c97df44	569	* in datasheet must be shifted to the left before calling the interface
lypinator	0:bb348c97df44	570	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	571	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	572	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	573	* @retval HAL status
lypinator	0:bb348c97df44	574	*/
lypinator	0:bb348c97df44	575	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
lypinator	0:bb348c97df44	576	{
lypinator	0:bb348c97df44	577	uint32_t tickstart = 0x00U;
lypinator	0:bb348c97df44	578
lypinator	0:bb348c97df44	579	/* Init tickstart for timeout management*/
lypinator	0:bb348c97df44	580	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	581
lypinator	0:bb348c97df44	582	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	583	{
lypinator	0:bb348c97df44	584	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	585	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	586	{
lypinator	0:bb348c97df44	587	return HAL_BUSY;
lypinator	0:bb348c97df44	588	}
lypinator	0:bb348c97df44	589
lypinator	0:bb348c97df44	590	/* Process Locked */
lypinator	0:bb348c97df44	591	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	592
lypinator	0:bb348c97df44	593	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	594	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	595	{
lypinator	0:bb348c97df44	596	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	597	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	598	}
lypinator	0:bb348c97df44	599
lypinator	0:bb348c97df44	600	/* Disable Pos */
lypinator	0:bb348c97df44	601	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	602
lypinator	0:bb348c97df44	603	hi2c->State = HAL_I2C_STATE_BUSY_TX;
lypinator	0:bb348c97df44	604	hi2c->Mode = HAL_I2C_MODE_MASTER;
lypinator	0:bb348c97df44	605	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	606
lypinator	0:bb348c97df44	607	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	608	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	609	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	610	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	611	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	612
lypinator	0:bb348c97df44	613	/* Send Slave Address */
lypinator	0:bb348c97df44	614	if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	615	{
lypinator	0:bb348c97df44	616	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	617	{
lypinator	0:bb348c97df44	618	/* Process Unlocked */
lypinator	0:bb348c97df44	619	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	620	return HAL_ERROR;
lypinator	0:bb348c97df44	621	}
lypinator	0:bb348c97df44	622	else
lypinator	0:bb348c97df44	623	{
lypinator	0:bb348c97df44	624	/* Process Unlocked */
lypinator	0:bb348c97df44	625	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	626	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	627	}
lypinator	0:bb348c97df44	628	}
lypinator	0:bb348c97df44	629
lypinator	0:bb348c97df44	630	/* Clear ADDR flag */
lypinator	0:bb348c97df44	631	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	632
lypinator	0:bb348c97df44	633	while(hi2c->XferSize > 0U)
lypinator	0:bb348c97df44	634	{
lypinator	0:bb348c97df44	635	/* Wait until TXE flag is set */
lypinator	0:bb348c97df44	636	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	637	{
lypinator	0:bb348c97df44	638	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	639	{
lypinator	0:bb348c97df44	640	/* Generate Stop */
lypinator	0:bb348c97df44	641	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	642	return HAL_ERROR;
lypinator	0:bb348c97df44	643	}
lypinator	0:bb348c97df44	644	else
lypinator	0:bb348c97df44	645	{
lypinator	0:bb348c97df44	646	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	647	}
lypinator	0:bb348c97df44	648	}
lypinator	0:bb348c97df44	649
lypinator	0:bb348c97df44	650	/* Write data to DR */
lypinator	0:bb348c97df44	651	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
lypinator	0:bb348c97df44	652	hi2c->XferCount--;
lypinator	0:bb348c97df44	653	hi2c->XferSize--;
lypinator	0:bb348c97df44	654
lypinator	0:bb348c97df44	655	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
lypinator	0:bb348c97df44	656	{
lypinator	0:bb348c97df44	657	/* Write data to DR */
lypinator	0:bb348c97df44	658	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
lypinator	0:bb348c97df44	659	hi2c->XferCount--;
lypinator	0:bb348c97df44	660	hi2c->XferSize--;
lypinator	0:bb348c97df44	661	}
lypinator	0:bb348c97df44	662
lypinator	0:bb348c97df44	663	/* Wait until BTF flag is set */
lypinator	0:bb348c97df44	664	if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	665	{
lypinator	0:bb348c97df44	666	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	667	{
lypinator	0:bb348c97df44	668	/* Generate Stop */
lypinator	0:bb348c97df44	669	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	670	return HAL_ERROR;
lypinator	0:bb348c97df44	671	}
lypinator	0:bb348c97df44	672	else
lypinator	0:bb348c97df44	673	{
lypinator	0:bb348c97df44	674	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	675	}
lypinator	0:bb348c97df44	676	}
lypinator	0:bb348c97df44	677	}
lypinator	0:bb348c97df44	678
lypinator	0:bb348c97df44	679	/* Generate Stop */
lypinator	0:bb348c97df44	680	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	681
lypinator	0:bb348c97df44	682	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	683	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	684
lypinator	0:bb348c97df44	685	/* Process Unlocked */
lypinator	0:bb348c97df44	686	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	687
lypinator	0:bb348c97df44	688	return HAL_OK;
lypinator	0:bb348c97df44	689	}
lypinator	0:bb348c97df44	690	else
lypinator	0:bb348c97df44	691	{
lypinator	0:bb348c97df44	692	return HAL_BUSY;
lypinator	0:bb348c97df44	693	}
lypinator	0:bb348c97df44	694	}
lypinator	0:bb348c97df44	695
lypinator	0:bb348c97df44	696	/**
lypinator	0:bb348c97df44	697	* @brief Receives in master mode an amount of data in blocking mode.
lypinator	0:bb348c97df44	698	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	699	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	700	* @param DevAddress Target device address The device 7 bits address value
lypinator	0:bb348c97df44	701	* in datasheet must be shifted to the left before calling the interface
lypinator	0:bb348c97df44	702	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	703	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	704	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	705	* @retval HAL status
lypinator	0:bb348c97df44	706	*/
lypinator	0:bb348c97df44	707	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
lypinator	0:bb348c97df44	708	{
lypinator	0:bb348c97df44	709	uint32_t tickstart = 0x00U;
lypinator	0:bb348c97df44	710
lypinator	0:bb348c97df44	711	/* Init tickstart for timeout management*/
lypinator	0:bb348c97df44	712	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	713
lypinator	0:bb348c97df44	714	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	715	{
lypinator	0:bb348c97df44	716	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	717	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	718	{
lypinator	0:bb348c97df44	719	return HAL_BUSY;
lypinator	0:bb348c97df44	720	}
lypinator	0:bb348c97df44	721
lypinator	0:bb348c97df44	722	/* Process Locked */
lypinator	0:bb348c97df44	723	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	724
lypinator	0:bb348c97df44	725	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	726	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	727	{
lypinator	0:bb348c97df44	728	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	729	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	730	}
lypinator	0:bb348c97df44	731
lypinator	0:bb348c97df44	732	/* Disable Pos */
lypinator	0:bb348c97df44	733	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	734
lypinator	0:bb348c97df44	735	hi2c->State = HAL_I2C_STATE_BUSY_RX;
lypinator	0:bb348c97df44	736	hi2c->Mode = HAL_I2C_MODE_MASTER;
lypinator	0:bb348c97df44	737	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	738
lypinator	0:bb348c97df44	739	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	740	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	741	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	742	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	743	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	744
lypinator	0:bb348c97df44	745	/* Send Slave Address */
lypinator	0:bb348c97df44	746	if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	747	{
lypinator	0:bb348c97df44	748	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	749	{
lypinator	0:bb348c97df44	750	/* Process Unlocked */
lypinator	0:bb348c97df44	751	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	752	return HAL_ERROR;
lypinator	0:bb348c97df44	753	}
lypinator	0:bb348c97df44	754	else
lypinator	0:bb348c97df44	755	{
lypinator	0:bb348c97df44	756	/* Process Unlocked */
lypinator	0:bb348c97df44	757	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	758	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	759	}
lypinator	0:bb348c97df44	760	}
lypinator	0:bb348c97df44	761
lypinator	0:bb348c97df44	762	if(hi2c->XferSize == 0U)
lypinator	0:bb348c97df44	763	{
lypinator	0:bb348c97df44	764	/* Clear ADDR flag */
lypinator	0:bb348c97df44	765	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	766
lypinator	0:bb348c97df44	767	/* Generate Stop */
lypinator	0:bb348c97df44	768	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	769	}
lypinator	0:bb348c97df44	770	else if(hi2c->XferSize == 1U)
lypinator	0:bb348c97df44	771	{
lypinator	0:bb348c97df44	772	/* Disable Acknowledge */
lypinator	0:bb348c97df44	773	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	774
lypinator	0:bb348c97df44	775	/* Clear ADDR flag */
lypinator	0:bb348c97df44	776	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	777
lypinator	0:bb348c97df44	778	/* Generate Stop */
lypinator	0:bb348c97df44	779	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	780	}
lypinator	0:bb348c97df44	781	else if(hi2c->XferSize == 2U)
lypinator	0:bb348c97df44	782	{
lypinator	0:bb348c97df44	783	/* Disable Acknowledge */
lypinator	0:bb348c97df44	784	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	785
lypinator	0:bb348c97df44	786	/* Enable Pos */
lypinator	0:bb348c97df44	787	hi2c->Instance->CR1 \|= I2C_CR1_POS;
lypinator	0:bb348c97df44	788
lypinator	0:bb348c97df44	789	/* Clear ADDR flag */
lypinator	0:bb348c97df44	790	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	791	}
lypinator	0:bb348c97df44	792	else
lypinator	0:bb348c97df44	793	{
lypinator	0:bb348c97df44	794	/* Enable Acknowledge */
lypinator	0:bb348c97df44	795	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	796
lypinator	0:bb348c97df44	797	/* Clear ADDR flag */
lypinator	0:bb348c97df44	798	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	799	}
lypinator	0:bb348c97df44	800
lypinator	0:bb348c97df44	801	while(hi2c->XferSize > 0U)
lypinator	0:bb348c97df44	802	{
lypinator	0:bb348c97df44	803	if(hi2c->XferSize <= 3U)
lypinator	0:bb348c97df44	804	{
lypinator	0:bb348c97df44	805	/* One byte */
lypinator	0:bb348c97df44	806	if(hi2c->XferSize == 1U)
lypinator	0:bb348c97df44	807	{
lypinator	0:bb348c97df44	808	/* Wait until RXNE flag is set */
lypinator	0:bb348c97df44	809	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	810	{
lypinator	0:bb348c97df44	811	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
lypinator	0:bb348c97df44	812	{
lypinator	0:bb348c97df44	813	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	814	}
lypinator	0:bb348c97df44	815	else
lypinator	0:bb348c97df44	816	{
lypinator	0:bb348c97df44	817	return HAL_ERROR;
lypinator	0:bb348c97df44	818	}
lypinator	0:bb348c97df44	819	}
lypinator	0:bb348c97df44	820
lypinator	0:bb348c97df44	821	/* Read data from DR */
lypinator	0:bb348c97df44	822	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	823	hi2c->XferSize--;
lypinator	0:bb348c97df44	824	hi2c->XferCount--;
lypinator	0:bb348c97df44	825	}
lypinator	0:bb348c97df44	826	/* Two bytes */
lypinator	0:bb348c97df44	827	else if(hi2c->XferSize == 2U)
lypinator	0:bb348c97df44	828	{
lypinator	0:bb348c97df44	829	/* Wait until BTF flag is set */
lypinator	0:bb348c97df44	830	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	831	{
lypinator	0:bb348c97df44	832	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	833	}
lypinator	0:bb348c97df44	834
lypinator	0:bb348c97df44	835	/* Generate Stop */
lypinator	0:bb348c97df44	836	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	837
lypinator	0:bb348c97df44	838	/* Read data from DR */
lypinator	0:bb348c97df44	839	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	840	hi2c->XferSize--;
lypinator	0:bb348c97df44	841	hi2c->XferCount--;
lypinator	0:bb348c97df44	842
lypinator	0:bb348c97df44	843	/* Read data from DR */
lypinator	0:bb348c97df44	844	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	845	hi2c->XferSize--;
lypinator	0:bb348c97df44	846	hi2c->XferCount--;
lypinator	0:bb348c97df44	847	}
lypinator	0:bb348c97df44	848	/* 3 Last bytes */
lypinator	0:bb348c97df44	849	else
lypinator	0:bb348c97df44	850	{
lypinator	0:bb348c97df44	851	/* Wait until BTF flag is set */
lypinator	0:bb348c97df44	852	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	853	{
lypinator	0:bb348c97df44	854	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	855	}
lypinator	0:bb348c97df44	856
lypinator	0:bb348c97df44	857	/* Disable Acknowledge */
lypinator	0:bb348c97df44	858	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	859
lypinator	0:bb348c97df44	860	/* Read data from DR */
lypinator	0:bb348c97df44	861	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	862	hi2c->XferSize--;
lypinator	0:bb348c97df44	863	hi2c->XferCount--;
lypinator	0:bb348c97df44	864
lypinator	0:bb348c97df44	865	/* Wait until BTF flag is set */
lypinator	0:bb348c97df44	866	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	867	{
lypinator	0:bb348c97df44	868	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	869	}
lypinator	0:bb348c97df44	870
lypinator	0:bb348c97df44	871	/* Generate Stop */
lypinator	0:bb348c97df44	872	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	873
lypinator	0:bb348c97df44	874	/* Read data from DR */
lypinator	0:bb348c97df44	875	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	876	hi2c->XferSize--;
lypinator	0:bb348c97df44	877	hi2c->XferCount--;
lypinator	0:bb348c97df44	878
lypinator	0:bb348c97df44	879	/* Read data from DR */
lypinator	0:bb348c97df44	880	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	881	hi2c->XferSize--;
lypinator	0:bb348c97df44	882	hi2c->XferCount--;
lypinator	0:bb348c97df44	883	}
lypinator	0:bb348c97df44	884	}
lypinator	0:bb348c97df44	885	else
lypinator	0:bb348c97df44	886	{
lypinator	0:bb348c97df44	887	/* Wait until RXNE flag is set */
lypinator	0:bb348c97df44	888	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	889	{
lypinator	0:bb348c97df44	890	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
lypinator	0:bb348c97df44	891	{
lypinator	0:bb348c97df44	892	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	893	}
lypinator	0:bb348c97df44	894	else
lypinator	0:bb348c97df44	895	{
lypinator	0:bb348c97df44	896	return HAL_ERROR;
lypinator	0:bb348c97df44	897	}
lypinator	0:bb348c97df44	898	}
lypinator	0:bb348c97df44	899
lypinator	0:bb348c97df44	900	/* Read data from DR */
lypinator	0:bb348c97df44	901	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	902	hi2c->XferSize--;
lypinator	0:bb348c97df44	903	hi2c->XferCount--;
lypinator	0:bb348c97df44	904
lypinator	0:bb348c97df44	905	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
lypinator	0:bb348c97df44	906	{
lypinator	0:bb348c97df44	907	/* Read data from DR */
lypinator	0:bb348c97df44	908	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	909	hi2c->XferSize--;
lypinator	0:bb348c97df44	910	hi2c->XferCount--;
lypinator	0:bb348c97df44	911	}
lypinator	0:bb348c97df44	912	}
lypinator	0:bb348c97df44	913	}
lypinator	0:bb348c97df44	914
lypinator	0:bb348c97df44	915	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	916	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	917
lypinator	0:bb348c97df44	918	/* Process Unlocked */
lypinator	0:bb348c97df44	919	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	920
lypinator	0:bb348c97df44	921	return HAL_OK;
lypinator	0:bb348c97df44	922	}
lypinator	0:bb348c97df44	923	else
lypinator	0:bb348c97df44	924	{
lypinator	0:bb348c97df44	925	return HAL_BUSY;
lypinator	0:bb348c97df44	926	}
lypinator	0:bb348c97df44	927	}
lypinator	0:bb348c97df44	928
lypinator	0:bb348c97df44	929	/**
lypinator	0:bb348c97df44	930	* @brief Transmits in slave mode an amount of data in blocking mode.
lypinator	0:bb348c97df44	931	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	932	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	933	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	934	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	935	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	936	* @retval HAL status
lypinator	0:bb348c97df44	937	*/
lypinator	0:bb348c97df44	938	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
lypinator	0:bb348c97df44	939	{
lypinator	0:bb348c97df44	940	uint32_t tickstart = 0x00U;
lypinator	0:bb348c97df44	941
lypinator	0:bb348c97df44	942	/* Init tickstart for timeout management*/
lypinator	0:bb348c97df44	943	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	944
lypinator	0:bb348c97df44	945	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	946	{
lypinator	0:bb348c97df44	947	if((pData == NULL) \|\| (Size == 0U))
lypinator	0:bb348c97df44	948	{
lypinator	0:bb348c97df44	949	return HAL_ERROR;
lypinator	0:bb348c97df44	950	}
lypinator	0:bb348c97df44	951
lypinator	0:bb348c97df44	952	/* Process Locked */
lypinator	0:bb348c97df44	953	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	954
lypinator	0:bb348c97df44	955	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	956	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	957	{
lypinator	0:bb348c97df44	958	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	959	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	960	}
lypinator	0:bb348c97df44	961
lypinator	0:bb348c97df44	962	/* Disable Pos */
lypinator	0:bb348c97df44	963	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	964
lypinator	0:bb348c97df44	965	hi2c->State = HAL_I2C_STATE_BUSY_TX;
lypinator	0:bb348c97df44	966	hi2c->Mode = HAL_I2C_MODE_SLAVE;
lypinator	0:bb348c97df44	967	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	968
lypinator	0:bb348c97df44	969	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	970	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	971	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	972	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	973	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	974
lypinator	0:bb348c97df44	975	/* Enable Address Acknowledge */
lypinator	0:bb348c97df44	976	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	977
lypinator	0:bb348c97df44	978	/* Wait until ADDR flag is set */
lypinator	0:bb348c97df44	979	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	980	{
lypinator	0:bb348c97df44	981	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	982	}
lypinator	0:bb348c97df44	983
lypinator	0:bb348c97df44	984	/* Clear ADDR flag */
lypinator	0:bb348c97df44	985	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	986
lypinator	0:bb348c97df44	987	/* If 10bit addressing mode is selected */
lypinator	0:bb348c97df44	988	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
lypinator	0:bb348c97df44	989	{
lypinator	0:bb348c97df44	990	/* Wait until ADDR flag is set */
lypinator	0:bb348c97df44	991	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	992	{
lypinator	0:bb348c97df44	993	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	994	}
lypinator	0:bb348c97df44	995
lypinator	0:bb348c97df44	996	/* Clear ADDR flag */
lypinator	0:bb348c97df44	997	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	998	}
lypinator	0:bb348c97df44	999
lypinator	0:bb348c97df44	1000	while(hi2c->XferSize > 0U)
lypinator	0:bb348c97df44	1001	{
lypinator	0:bb348c97df44	1002	/* Wait until TXE flag is set */
lypinator	0:bb348c97df44	1003	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	1004	{
lypinator	0:bb348c97df44	1005	/* Disable Address Acknowledge */
lypinator	0:bb348c97df44	1006	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	1007
lypinator	0:bb348c97df44	1008	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	1009	{
lypinator	0:bb348c97df44	1010	return HAL_ERROR;
lypinator	0:bb348c97df44	1011	}
lypinator	0:bb348c97df44	1012	else
lypinator	0:bb348c97df44	1013	{
lypinator	0:bb348c97df44	1014	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1015	}
lypinator	0:bb348c97df44	1016	}
lypinator	0:bb348c97df44	1017
lypinator	0:bb348c97df44	1018	/* Write data to DR */
lypinator	0:bb348c97df44	1019	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
lypinator	0:bb348c97df44	1020	hi2c->XferCount--;
lypinator	0:bb348c97df44	1021	hi2c->XferSize--;
lypinator	0:bb348c97df44	1022
lypinator	0:bb348c97df44	1023	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
lypinator	0:bb348c97df44	1024	{
lypinator	0:bb348c97df44	1025	/* Write data to DR */
lypinator	0:bb348c97df44	1026	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
lypinator	0:bb348c97df44	1027	hi2c->XferCount--;
lypinator	0:bb348c97df44	1028	hi2c->XferSize--;
lypinator	0:bb348c97df44	1029	}
lypinator	0:bb348c97df44	1030	}
lypinator	0:bb348c97df44	1031
lypinator	0:bb348c97df44	1032	/* Wait until AF flag is set */
lypinator	0:bb348c97df44	1033	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	1034	{
lypinator	0:bb348c97df44	1035	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1036	}
lypinator	0:bb348c97df44	1037
lypinator	0:bb348c97df44	1038	/* Clear AF flag */
lypinator	0:bb348c97df44	1039	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
lypinator	0:bb348c97df44	1040
lypinator	0:bb348c97df44	1041	/* Disable Address Acknowledge */
lypinator	0:bb348c97df44	1042	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	1043
lypinator	0:bb348c97df44	1044	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	1045	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	1046
lypinator	0:bb348c97df44	1047	/* Process Unlocked */
lypinator	0:bb348c97df44	1048	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1049
lypinator	0:bb348c97df44	1050	return HAL_OK;
lypinator	0:bb348c97df44	1051	}
lypinator	0:bb348c97df44	1052	else
lypinator	0:bb348c97df44	1053	{
lypinator	0:bb348c97df44	1054	return HAL_BUSY;
lypinator	0:bb348c97df44	1055	}
lypinator	0:bb348c97df44	1056	}
lypinator	0:bb348c97df44	1057
lypinator	0:bb348c97df44	1058	/**
lypinator	0:bb348c97df44	1059	* @brief Receive in slave mode an amount of data in blocking mode
lypinator	0:bb348c97df44	1060	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1061	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	1062	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	1063	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	1064	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	1065	* @retval HAL status
lypinator	0:bb348c97df44	1066	*/
lypinator	0:bb348c97df44	1067	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
lypinator	0:bb348c97df44	1068	{
lypinator	0:bb348c97df44	1069	uint32_t tickstart = 0x00U;
lypinator	0:bb348c97df44	1070
lypinator	0:bb348c97df44	1071	/* Init tickstart for timeout management*/
lypinator	0:bb348c97df44	1072	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	1073
lypinator	0:bb348c97df44	1074	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	1075	{
lypinator	0:bb348c97df44	1076	if((pData == NULL) \|\| (Size == 0))
lypinator	0:bb348c97df44	1077	{
lypinator	0:bb348c97df44	1078	return HAL_ERROR;
lypinator	0:bb348c97df44	1079	}
lypinator	0:bb348c97df44	1080
lypinator	0:bb348c97df44	1081	/* Process Locked */
lypinator	0:bb348c97df44	1082	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	1083
lypinator	0:bb348c97df44	1084	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	1085	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	1086	{
lypinator	0:bb348c97df44	1087	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	1088	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	1089	}
lypinator	0:bb348c97df44	1090
lypinator	0:bb348c97df44	1091	/* Disable Pos */
lypinator	0:bb348c97df44	1092	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	1093
lypinator	0:bb348c97df44	1094	hi2c->State = HAL_I2C_STATE_BUSY_RX;
lypinator	0:bb348c97df44	1095	hi2c->Mode = HAL_I2C_MODE_SLAVE;
lypinator	0:bb348c97df44	1096	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	1097
lypinator	0:bb348c97df44	1098	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	1099	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	1100	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	1101	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	1102	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	1103
lypinator	0:bb348c97df44	1104	/* Enable Address Acknowledge */
lypinator	0:bb348c97df44	1105	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	1106
lypinator	0:bb348c97df44	1107	/* Wait until ADDR flag is set */
lypinator	0:bb348c97df44	1108	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	1109	{
lypinator	0:bb348c97df44	1110	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1111	}
lypinator	0:bb348c97df44	1112
lypinator	0:bb348c97df44	1113	/* Clear ADDR flag */
lypinator	0:bb348c97df44	1114	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	1115
lypinator	0:bb348c97df44	1116	while(hi2c->XferSize > 0U)
lypinator	0:bb348c97df44	1117	{
lypinator	0:bb348c97df44	1118	/* Wait until RXNE flag is set */
lypinator	0:bb348c97df44	1119	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	1120	{
lypinator	0:bb348c97df44	1121	/* Disable Address Acknowledge */
lypinator	0:bb348c97df44	1122	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	1123
lypinator	0:bb348c97df44	1124	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
lypinator	0:bb348c97df44	1125	{
lypinator	0:bb348c97df44	1126	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1127	}
lypinator	0:bb348c97df44	1128	else
lypinator	0:bb348c97df44	1129	{
lypinator	0:bb348c97df44	1130	return HAL_ERROR;
lypinator	0:bb348c97df44	1131	}
lypinator	0:bb348c97df44	1132	}
lypinator	0:bb348c97df44	1133
lypinator	0:bb348c97df44	1134	/* Read data from DR */
lypinator	0:bb348c97df44	1135	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	1136	hi2c->XferSize--;
lypinator	0:bb348c97df44	1137	hi2c->XferCount--;
lypinator	0:bb348c97df44	1138
lypinator	0:bb348c97df44	1139	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
lypinator	0:bb348c97df44	1140	{
lypinator	0:bb348c97df44	1141	/* Read data from DR */
lypinator	0:bb348c97df44	1142	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	1143	hi2c->XferSize--;
lypinator	0:bb348c97df44	1144	hi2c->XferCount--;
lypinator	0:bb348c97df44	1145	}
lypinator	0:bb348c97df44	1146	}
lypinator	0:bb348c97df44	1147
lypinator	0:bb348c97df44	1148	/* Wait until STOP flag is set */
lypinator	0:bb348c97df44	1149	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	1150	{
lypinator	0:bb348c97df44	1151	/* Disable Address Acknowledge */
lypinator	0:bb348c97df44	1152	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	1153
lypinator	0:bb348c97df44	1154	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	1155	{
lypinator	0:bb348c97df44	1156	return HAL_ERROR;
lypinator	0:bb348c97df44	1157	}
lypinator	0:bb348c97df44	1158	else
lypinator	0:bb348c97df44	1159	{
lypinator	0:bb348c97df44	1160	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1161	}
lypinator	0:bb348c97df44	1162	}
lypinator	0:bb348c97df44	1163
lypinator	0:bb348c97df44	1164	/* Clear STOP flag */
lypinator	0:bb348c97df44	1165	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
lypinator	0:bb348c97df44	1166
lypinator	0:bb348c97df44	1167	/* Disable Address Acknowledge */
lypinator	0:bb348c97df44	1168	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	1169
lypinator	0:bb348c97df44	1170	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	1171	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	1172
lypinator	0:bb348c97df44	1173	/* Process Unlocked */
lypinator	0:bb348c97df44	1174	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1175
lypinator	0:bb348c97df44	1176	return HAL_OK;
lypinator	0:bb348c97df44	1177	}
lypinator	0:bb348c97df44	1178	else
lypinator	0:bb348c97df44	1179	{
lypinator	0:bb348c97df44	1180	return HAL_BUSY;
lypinator	0:bb348c97df44	1181	}
lypinator	0:bb348c97df44	1182	}
lypinator	0:bb348c97df44	1183
lypinator	0:bb348c97df44	1184	/**
lypinator	0:bb348c97df44	1185	* @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
lypinator	0:bb348c97df44	1186	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1187	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	1188	* @param DevAddress Target device address The device 7 bits address value
lypinator	0:bb348c97df44	1189	* in datasheet must be shifted to the left before calling the interface
lypinator	0:bb348c97df44	1190	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	1191	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	1192	* @retval HAL status
lypinator	0:bb348c97df44	1193	*/
lypinator	0:bb348c97df44	1194	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	1195	{
lypinator	0:bb348c97df44	1196	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	1197
lypinator	0:bb348c97df44	1198	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	1199	{
lypinator	0:bb348c97df44	1200	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	1201	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	1202	do
lypinator	0:bb348c97df44	1203	{
lypinator	0:bb348c97df44	1204	if(count-- == 0U)
lypinator	0:bb348c97df44	1205	{
lypinator	0:bb348c97df44	1206	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	1207	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	1208
lypinator	0:bb348c97df44	1209	/* Process Unlocked */
lypinator	0:bb348c97df44	1210	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1211
lypinator	0:bb348c97df44	1212	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1213	}
lypinator	0:bb348c97df44	1214	}
lypinator	0:bb348c97df44	1215	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	1216
lypinator	0:bb348c97df44	1217	/* Process Locked */
lypinator	0:bb348c97df44	1218	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	1219
lypinator	0:bb348c97df44	1220	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	1221	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	1222	{
lypinator	0:bb348c97df44	1223	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	1224	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	1225	}
lypinator	0:bb348c97df44	1226
lypinator	0:bb348c97df44	1227	/* Disable Pos */
lypinator	0:bb348c97df44	1228	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	1229
lypinator	0:bb348c97df44	1230	hi2c->State = HAL_I2C_STATE_BUSY_TX;
lypinator	0:bb348c97df44	1231	hi2c->Mode = HAL_I2C_MODE_MASTER;
lypinator	0:bb348c97df44	1232	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	1233
lypinator	0:bb348c97df44	1234	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	1235	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	1236	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	1237	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	1238	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	1239	hi2c->Devaddress = DevAddress;
lypinator	0:bb348c97df44	1240
lypinator	0:bb348c97df44	1241	/* Generate Start */
lypinator	0:bb348c97df44	1242	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	1243
lypinator	0:bb348c97df44	1244	/* Process Unlocked */
lypinator	0:bb348c97df44	1245	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1246
lypinator	0:bb348c97df44	1247	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	1248	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	1249	process unlock */
lypinator	0:bb348c97df44	1250	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	1251	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	1252
lypinator	0:bb348c97df44	1253	return HAL_OK;
lypinator	0:bb348c97df44	1254	}
lypinator	0:bb348c97df44	1255	else
lypinator	0:bb348c97df44	1256	{
lypinator	0:bb348c97df44	1257	return HAL_BUSY;
lypinator	0:bb348c97df44	1258	}
lypinator	0:bb348c97df44	1259	}
lypinator	0:bb348c97df44	1260
lypinator	0:bb348c97df44	1261	/**
lypinator	0:bb348c97df44	1262	* @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
lypinator	0:bb348c97df44	1263	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1264	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	1265	* @param DevAddress Target device address The device 7 bits address value
lypinator	0:bb348c97df44	1266	* in datasheet must be shifted to the left before calling the interface
lypinator	0:bb348c97df44	1267	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	1268	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	1269	* @retval HAL status
lypinator	0:bb348c97df44	1270	*/
lypinator	0:bb348c97df44	1271	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	1272	{
lypinator	0:bb348c97df44	1273	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	1274
lypinator	0:bb348c97df44	1275	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	1276	{
lypinator	0:bb348c97df44	1277	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	1278	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	1279	do
lypinator	0:bb348c97df44	1280	{
lypinator	0:bb348c97df44	1281	if(count-- == 0U)
lypinator	0:bb348c97df44	1282	{
lypinator	0:bb348c97df44	1283	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	1284	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	1285
lypinator	0:bb348c97df44	1286	/* Process Unlocked */
lypinator	0:bb348c97df44	1287	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1288
lypinator	0:bb348c97df44	1289	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1290	}
lypinator	0:bb348c97df44	1291	}
lypinator	0:bb348c97df44	1292	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	1293
lypinator	0:bb348c97df44	1294	/* Process Locked */
lypinator	0:bb348c97df44	1295	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	1296
lypinator	0:bb348c97df44	1297	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	1298	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	1299	{
lypinator	0:bb348c97df44	1300	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	1301	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	1302	}
lypinator	0:bb348c97df44	1303
lypinator	0:bb348c97df44	1304	/* Disable Pos */
lypinator	0:bb348c97df44	1305	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	1306
lypinator	0:bb348c97df44	1307	hi2c->State = HAL_I2C_STATE_BUSY_RX;
lypinator	0:bb348c97df44	1308	hi2c->Mode = HAL_I2C_MODE_MASTER;
lypinator	0:bb348c97df44	1309	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	1310
lypinator	0:bb348c97df44	1311	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	1312	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	1313	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	1314	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	1315	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	1316	hi2c->Devaddress = DevAddress;
lypinator	0:bb348c97df44	1317
lypinator	0:bb348c97df44	1318	/* Enable Acknowledge */
lypinator	0:bb348c97df44	1319	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	1320
lypinator	0:bb348c97df44	1321	/* Generate Start */
lypinator	0:bb348c97df44	1322	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	1323
lypinator	0:bb348c97df44	1324	/* Process Unlocked */
lypinator	0:bb348c97df44	1325	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1326
lypinator	0:bb348c97df44	1327	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	1328	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	1329	process unlock */
lypinator	0:bb348c97df44	1330
lypinator	0:bb348c97df44	1331	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	1332	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	1333
lypinator	0:bb348c97df44	1334	return HAL_OK;
lypinator	0:bb348c97df44	1335	}
lypinator	0:bb348c97df44	1336	else
lypinator	0:bb348c97df44	1337	{
lypinator	0:bb348c97df44	1338	return HAL_BUSY;
lypinator	0:bb348c97df44	1339	}
lypinator	0:bb348c97df44	1340	}
lypinator	0:bb348c97df44	1341
lypinator	0:bb348c97df44	1342	/**
lypinator	0:bb348c97df44	1343	* @brief Sequential transmit in master mode an amount of data in non-blocking mode with Interrupt
lypinator	0:bb348c97df44	1344	* @note This interface allow to manage repeated start condition when a direction change during transfer
lypinator	0:bb348c97df44	1345	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1346	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	1347	* @param DevAddress Target device address The device 7 bits address value
lypinator	0:bb348c97df44	1348	* in datasheet must be shifted to the left before calling the interface
lypinator	0:bb348c97df44	1349	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	1350	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	1351	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
lypinator	0:bb348c97df44	1352	* @retval HAL status
lypinator	0:bb348c97df44	1353	*/
lypinator	0:bb348c97df44	1354	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
lypinator	0:bb348c97df44	1355	{
lypinator	0:bb348c97df44	1356	__IO uint32_t Prev_State = 0x00U;
lypinator	0:bb348c97df44	1357	__IO uint32_t count = 0x00U;
lypinator	0:bb348c97df44	1358
lypinator	0:bb348c97df44	1359	/* Check the parameters */
lypinator	0:bb348c97df44	1360	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
lypinator	0:bb348c97df44	1361
lypinator	0:bb348c97df44	1362	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	1363	{
lypinator	0:bb348c97df44	1364	/* Check Busy Flag only if FIRST call of Master interface */
lypinator	0:bb348c97df44	1365	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
lypinator	0:bb348c97df44	1366	{
lypinator	0:bb348c97df44	1367	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	1368	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	1369	do
lypinator	0:bb348c97df44	1370	{
lypinator	0:bb348c97df44	1371	if(count-- == 0U)
lypinator	0:bb348c97df44	1372	{
lypinator	0:bb348c97df44	1373	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	1374	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	1375
lypinator	0:bb348c97df44	1376	/* Process Unlocked */
lypinator	0:bb348c97df44	1377	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1378
lypinator	0:bb348c97df44	1379	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1380	}
lypinator	0:bb348c97df44	1381	}
lypinator	0:bb348c97df44	1382	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	1383	}
lypinator	0:bb348c97df44	1384
lypinator	0:bb348c97df44	1385	/* Process Locked */
lypinator	0:bb348c97df44	1386	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	1387
lypinator	0:bb348c97df44	1388	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	1389	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	1390	{
lypinator	0:bb348c97df44	1391	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	1392	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	1393	}
lypinator	0:bb348c97df44	1394
lypinator	0:bb348c97df44	1395	/* Disable Pos */
lypinator	0:bb348c97df44	1396	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	1397
lypinator	0:bb348c97df44	1398	hi2c->State = HAL_I2C_STATE_BUSY_TX;
lypinator	0:bb348c97df44	1399	hi2c->Mode = HAL_I2C_MODE_MASTER;
lypinator	0:bb348c97df44	1400	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	1401
lypinator	0:bb348c97df44	1402	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	1403	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	1404	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	1405	hi2c->XferOptions = XferOptions;
lypinator	0:bb348c97df44	1406	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	1407	hi2c->Devaddress = DevAddress;
lypinator	0:bb348c97df44	1408
lypinator	0:bb348c97df44	1409	Prev_State = hi2c->PreviousState;
lypinator	0:bb348c97df44	1410
lypinator	0:bb348c97df44	1411	/* Generate Start */
lypinator	0:bb348c97df44	1412	if((Prev_State == I2C_STATE_MASTER_BUSY_RX) \|\| (Prev_State == I2C_STATE_NONE))
lypinator	0:bb348c97df44	1413	{
lypinator	0:bb348c97df44	1414	/* Generate Start condition if first transfer */
lypinator	0:bb348c97df44	1415	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
lypinator	0:bb348c97df44	1416	{
lypinator	0:bb348c97df44	1417	/* Generate Start */
lypinator	0:bb348c97df44	1418	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	1419	}
lypinator	0:bb348c97df44	1420	else if(Prev_State == I2C_STATE_MASTER_BUSY_RX) // MBED
lypinator	0:bb348c97df44	1421	{
lypinator	0:bb348c97df44	1422	/* Generate ReStart */
lypinator	0:bb348c97df44	1423	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	1424	}
lypinator	0:bb348c97df44	1425	}
lypinator	0:bb348c97df44	1426
lypinator	0:bb348c97df44	1427	/* Process Unlocked */
lypinator	0:bb348c97df44	1428	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1429
lypinator	0:bb348c97df44	1430	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	1431	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	1432	process unlock */
lypinator	0:bb348c97df44	1433
lypinator	0:bb348c97df44	1434	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	1435	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	1436
lypinator	0:bb348c97df44	1437	return HAL_OK;
lypinator	0:bb348c97df44	1438	}
lypinator	0:bb348c97df44	1439	else
lypinator	0:bb348c97df44	1440	{
lypinator	0:bb348c97df44	1441	return HAL_BUSY;
lypinator	0:bb348c97df44	1442	}
lypinator	0:bb348c97df44	1443	}
lypinator	0:bb348c97df44	1444
lypinator	0:bb348c97df44	1445	/**
lypinator	0:bb348c97df44	1446	* @brief Sequential receive in master mode an amount of data in non-blocking mode with Interrupt
lypinator	0:bb348c97df44	1447	* @note This interface allow to manage repeated start condition when a direction change during transfer
lypinator	0:bb348c97df44	1448	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1449	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	1450	* @param DevAddress Target device address The device 7 bits address value
lypinator	0:bb348c97df44	1451	* in datasheet must be shifted to the left before calling the interface
lypinator	0:bb348c97df44	1452	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	1453	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	1454	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
lypinator	0:bb348c97df44	1455	* @retval HAL status
lypinator	0:bb348c97df44	1456	*/
lypinator	0:bb348c97df44	1457	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
lypinator	0:bb348c97df44	1458	{
lypinator	0:bb348c97df44	1459	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	1460
lypinator	0:bb348c97df44	1461	/* Check the parameters */
lypinator	0:bb348c97df44	1462	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
lypinator	0:bb348c97df44	1463
lypinator	0:bb348c97df44	1464	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	1465	{
lypinator	0:bb348c97df44	1466	/* Check Busy Flag only if FIRST call of Master interface */
lypinator	0:bb348c97df44	1467	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
lypinator	0:bb348c97df44	1468	{
lypinator	0:bb348c97df44	1469	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	1470	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	1471	do
lypinator	0:bb348c97df44	1472	{
lypinator	0:bb348c97df44	1473	if(count-- == 0U)
lypinator	0:bb348c97df44	1474	{
lypinator	0:bb348c97df44	1475	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	1476	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	1477
lypinator	0:bb348c97df44	1478	/* Process Unlocked */
lypinator	0:bb348c97df44	1479	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1480
lypinator	0:bb348c97df44	1481	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1482	}
lypinator	0:bb348c97df44	1483	}
lypinator	0:bb348c97df44	1484	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	1485	}
lypinator	0:bb348c97df44	1486
lypinator	0:bb348c97df44	1487	/* Process Locked */
lypinator	0:bb348c97df44	1488	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	1489
lypinator	0:bb348c97df44	1490	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	1491	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	1492	{
lypinator	0:bb348c97df44	1493	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	1494	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	1495	}
lypinator	0:bb348c97df44	1496
lypinator	0:bb348c97df44	1497	/* Disable Pos */
lypinator	0:bb348c97df44	1498	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	1499
lypinator	0:bb348c97df44	1500	hi2c->State = HAL_I2C_STATE_BUSY_RX;
lypinator	0:bb348c97df44	1501	hi2c->Mode = HAL_I2C_MODE_MASTER;
lypinator	0:bb348c97df44	1502	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	1503
lypinator	0:bb348c97df44	1504	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	1505	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	1506	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	1507	hi2c->XferOptions = XferOptions;
lypinator	0:bb348c97df44	1508	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	1509	hi2c->Devaddress = DevAddress;
lypinator	0:bb348c97df44	1510
lypinator	0:bb348c97df44	1511	if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) \|\| (hi2c->PreviousState == I2C_STATE_NONE))
lypinator	0:bb348c97df44	1512	{
lypinator	0:bb348c97df44	1513	/* Generate Start condition if first transfer */
lypinator	0:bb348c97df44	1514	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME) \|\| (XferOptions == I2C_NO_OPTION_FRAME))
lypinator	0:bb348c97df44	1515	{
lypinator	0:bb348c97df44	1516	/* Enable Acknowledge */
lypinator	0:bb348c97df44	1517	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	1518
lypinator	0:bb348c97df44	1519	/* Generate Start */
lypinator	0:bb348c97df44	1520	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	1521	}
lypinator	0:bb348c97df44	1522	else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
lypinator	0:bb348c97df44	1523	{
lypinator	0:bb348c97df44	1524	/* Enable Acknowledge */
lypinator	0:bb348c97df44	1525	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	1526
lypinator	0:bb348c97df44	1527	/* Generate ReStart */
lypinator	0:bb348c97df44	1528	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	1529	}
lypinator	0:bb348c97df44	1530	}
lypinator	0:bb348c97df44	1531
lypinator	0:bb348c97df44	1532	/* Process Unlocked */
lypinator	0:bb348c97df44	1533	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1534
lypinator	0:bb348c97df44	1535	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	1536	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	1537	process unlock */
lypinator	0:bb348c97df44	1538
lypinator	0:bb348c97df44	1539	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	1540	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	1541
lypinator	0:bb348c97df44	1542	return HAL_OK;
lypinator	0:bb348c97df44	1543	}
lypinator	0:bb348c97df44	1544	else
lypinator	0:bb348c97df44	1545	{
lypinator	0:bb348c97df44	1546	return HAL_BUSY;
lypinator	0:bb348c97df44	1547	}
lypinator	0:bb348c97df44	1548	}
lypinator	0:bb348c97df44	1549
lypinator	0:bb348c97df44	1550	/**
lypinator	0:bb348c97df44	1551	* @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
lypinator	0:bb348c97df44	1552	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1553	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	1554	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	1555	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	1556	* @retval HAL status
lypinator	0:bb348c97df44	1557	*/
lypinator	0:bb348c97df44	1558	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	1559	{
lypinator	0:bb348c97df44	1560	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	1561
lypinator	0:bb348c97df44	1562	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	1563	{
lypinator	0:bb348c97df44	1564	if((pData == NULL) \|\| (Size == 0U))
lypinator	0:bb348c97df44	1565	{
lypinator	0:bb348c97df44	1566	return HAL_ERROR;
lypinator	0:bb348c97df44	1567	}
lypinator	0:bb348c97df44	1568
lypinator	0:bb348c97df44	1569	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	1570	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	1571	do
lypinator	0:bb348c97df44	1572	{
lypinator	0:bb348c97df44	1573	if(count-- == 0U)
lypinator	0:bb348c97df44	1574	{
lypinator	0:bb348c97df44	1575	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	1576	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	1577
lypinator	0:bb348c97df44	1578	/* Process Unlocked */
lypinator	0:bb348c97df44	1579	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1580
lypinator	0:bb348c97df44	1581	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1582	}
lypinator	0:bb348c97df44	1583	}
lypinator	0:bb348c97df44	1584	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	1585
lypinator	0:bb348c97df44	1586	/* Process Locked */
lypinator	0:bb348c97df44	1587	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	1588
lypinator	0:bb348c97df44	1589	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	1590	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	1591	{
lypinator	0:bb348c97df44	1592	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	1593	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	1594	}
lypinator	0:bb348c97df44	1595
lypinator	0:bb348c97df44	1596	/* Disable Pos */
lypinator	0:bb348c97df44	1597	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	1598
lypinator	0:bb348c97df44	1599	hi2c->State = HAL_I2C_STATE_BUSY_TX;
lypinator	0:bb348c97df44	1600	hi2c->Mode = HAL_I2C_MODE_SLAVE;
lypinator	0:bb348c97df44	1601	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	1602
lypinator	0:bb348c97df44	1603	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	1604	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	1605	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	1606	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	1607	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	1608
lypinator	0:bb348c97df44	1609	/* Enable Address Acknowledge */
lypinator	0:bb348c97df44	1610	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	1611
lypinator	0:bb348c97df44	1612	/* Process Unlocked */
lypinator	0:bb348c97df44	1613	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1614
lypinator	0:bb348c97df44	1615	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	1616	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	1617	process unlock */
lypinator	0:bb348c97df44	1618
lypinator	0:bb348c97df44	1619	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	1620	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	1621
lypinator	0:bb348c97df44	1622	return HAL_OK;
lypinator	0:bb348c97df44	1623	}
lypinator	0:bb348c97df44	1624	else
lypinator	0:bb348c97df44	1625	{
lypinator	0:bb348c97df44	1626	return HAL_BUSY;
lypinator	0:bb348c97df44	1627	}
lypinator	0:bb348c97df44	1628	}
lypinator	0:bb348c97df44	1629
lypinator	0:bb348c97df44	1630	/**
lypinator	0:bb348c97df44	1631	* @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
lypinator	0:bb348c97df44	1632	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1633	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	1634	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	1635	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	1636	* @retval HAL status
lypinator	0:bb348c97df44	1637	*/
lypinator	0:bb348c97df44	1638	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	1639	{
lypinator	0:bb348c97df44	1640	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	1641
lypinator	0:bb348c97df44	1642	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	1643	{
lypinator	0:bb348c97df44	1644	if((pData == NULL) \|\| (Size == 0U))
lypinator	0:bb348c97df44	1645	{
lypinator	0:bb348c97df44	1646	return HAL_ERROR;
lypinator	0:bb348c97df44	1647	}
lypinator	0:bb348c97df44	1648
lypinator	0:bb348c97df44	1649	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	1650	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	1651	do
lypinator	0:bb348c97df44	1652	{
lypinator	0:bb348c97df44	1653	if(count-- == 0U)
lypinator	0:bb348c97df44	1654	{
lypinator	0:bb348c97df44	1655	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	1656	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	1657
lypinator	0:bb348c97df44	1658	/* Process Unlocked */
lypinator	0:bb348c97df44	1659	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1660
lypinator	0:bb348c97df44	1661	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1662	}
lypinator	0:bb348c97df44	1663	}
lypinator	0:bb348c97df44	1664	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	1665
lypinator	0:bb348c97df44	1666	/* Process Locked */
lypinator	0:bb348c97df44	1667	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	1668
lypinator	0:bb348c97df44	1669	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	1670	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	1671	{
lypinator	0:bb348c97df44	1672	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	1673	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	1674	}
lypinator	0:bb348c97df44	1675
lypinator	0:bb348c97df44	1676	/* Disable Pos */
lypinator	0:bb348c97df44	1677	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	1678
lypinator	0:bb348c97df44	1679	hi2c->State = HAL_I2C_STATE_BUSY_RX;
lypinator	0:bb348c97df44	1680	hi2c->Mode = HAL_I2C_MODE_SLAVE;
lypinator	0:bb348c97df44	1681	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	1682
lypinator	0:bb348c97df44	1683	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	1684	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	1685	hi2c->XferSize = Size;
lypinator	0:bb348c97df44	1686	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	1687	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	1688
lypinator	0:bb348c97df44	1689	/* Enable Address Acknowledge */
lypinator	0:bb348c97df44	1690	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	1691
lypinator	0:bb348c97df44	1692	/* Process Unlocked */
lypinator	0:bb348c97df44	1693	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1694
lypinator	0:bb348c97df44	1695	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	1696	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	1697	process unlock */
lypinator	0:bb348c97df44	1698
lypinator	0:bb348c97df44	1699	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	1700	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	1701
lypinator	0:bb348c97df44	1702	return HAL_OK;
lypinator	0:bb348c97df44	1703	}
lypinator	0:bb348c97df44	1704	else
lypinator	0:bb348c97df44	1705	{
lypinator	0:bb348c97df44	1706	return HAL_BUSY;
lypinator	0:bb348c97df44	1707	}
lypinator	0:bb348c97df44	1708	}
lypinator	0:bb348c97df44	1709
lypinator	0:bb348c97df44	1710	/**
lypinator	0:bb348c97df44	1711	* @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt
lypinator	0:bb348c97df44	1712	* @note This interface allow to manage repeated start condition when a direction change during transfer
lypinator	0:bb348c97df44	1713	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1714	* the configuration information for I2C module
lypinator	0:bb348c97df44	1715	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	1716	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	1717	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
lypinator	0:bb348c97df44	1718	* @retval HAL status
lypinator	0:bb348c97df44	1719	*/
lypinator	0:bb348c97df44	1720	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
lypinator	0:bb348c97df44	1721	{
lypinator	0:bb348c97df44	1722	/* Check the parameters */
lypinator	0:bb348c97df44	1723	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
lypinator	0:bb348c97df44	1724
lypinator	0:bb348c97df44	1725	if(hi2c->State == HAL_I2C_STATE_LISTEN)
lypinator	0:bb348c97df44	1726	{
lypinator	0:bb348c97df44	1727	if((pData == NULL) \|\| (Size == 0U))
lypinator	0:bb348c97df44	1728	{
lypinator	0:bb348c97df44	1729	return HAL_ERROR;
lypinator	0:bb348c97df44	1730	}
lypinator	0:bb348c97df44	1731
lypinator	0:bb348c97df44	1732	/* Process Locked */
lypinator	0:bb348c97df44	1733	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	1734
lypinator	0:bb348c97df44	1735	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	1736	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	1737	{
lypinator	0:bb348c97df44	1738	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	1739	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	1740	}
lypinator	0:bb348c97df44	1741
lypinator	0:bb348c97df44	1742	/* Disable Pos */
lypinator	0:bb348c97df44	1743	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	1744
lypinator	0:bb348c97df44	1745	hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
lypinator	0:bb348c97df44	1746	hi2c->Mode = HAL_I2C_MODE_SLAVE;
lypinator	0:bb348c97df44	1747	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	1748
lypinator	0:bb348c97df44	1749	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	1750	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	1751	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	1752	hi2c->XferOptions = XferOptions;
lypinator	0:bb348c97df44	1753	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	1754
lypinator	0:bb348c97df44	1755	/* Clear ADDR flag */
lypinator	0:bb348c97df44	1756	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	1757
lypinator	0:bb348c97df44	1758	/* Process Unlocked */
lypinator	0:bb348c97df44	1759	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1760
lypinator	0:bb348c97df44	1761	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	1762	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	1763	process unlock */
lypinator	0:bb348c97df44	1764
lypinator	0:bb348c97df44	1765	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	1766	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	1767
lypinator	0:bb348c97df44	1768	return HAL_OK;
lypinator	0:bb348c97df44	1769	}
lypinator	0:bb348c97df44	1770	else
lypinator	0:bb348c97df44	1771	{
lypinator	0:bb348c97df44	1772	return HAL_BUSY;
lypinator	0:bb348c97df44	1773	}
lypinator	0:bb348c97df44	1774	}
lypinator	0:bb348c97df44	1775
lypinator	0:bb348c97df44	1776	/**
lypinator	0:bb348c97df44	1777	* @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
lypinator	0:bb348c97df44	1778	* @note This interface allow to manage repeated start condition when a direction change during transfer
lypinator	0:bb348c97df44	1779	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1780	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	1781	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	1782	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	1783	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
lypinator	0:bb348c97df44	1784	* @retval HAL status
lypinator	0:bb348c97df44	1785	*/
lypinator	0:bb348c97df44	1786	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
lypinator	0:bb348c97df44	1787	{
lypinator	0:bb348c97df44	1788	/* Check the parameters */
lypinator	0:bb348c97df44	1789	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
lypinator	0:bb348c97df44	1790
lypinator	0:bb348c97df44	1791	if(hi2c->State == HAL_I2C_STATE_LISTEN)
lypinator	0:bb348c97df44	1792	{
lypinator	0:bb348c97df44	1793	if((pData == NULL) \|\| (Size == 0U))
lypinator	0:bb348c97df44	1794	{
lypinator	0:bb348c97df44	1795	return HAL_ERROR;
lypinator	0:bb348c97df44	1796	}
lypinator	0:bb348c97df44	1797
lypinator	0:bb348c97df44	1798	/* Process Locked */
lypinator	0:bb348c97df44	1799	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	1800
lypinator	0:bb348c97df44	1801	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	1802	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	1803	{
lypinator	0:bb348c97df44	1804	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	1805	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	1806	}
lypinator	0:bb348c97df44	1807
lypinator	0:bb348c97df44	1808	/* Disable Pos */
lypinator	0:bb348c97df44	1809	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	1810
lypinator	0:bb348c97df44	1811	hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
lypinator	0:bb348c97df44	1812	hi2c->Mode = HAL_I2C_MODE_SLAVE;
lypinator	0:bb348c97df44	1813	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	1814
lypinator	0:bb348c97df44	1815	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	1816	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	1817	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	1818	hi2c->XferOptions = XferOptions;
lypinator	0:bb348c97df44	1819	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	1820
lypinator	0:bb348c97df44	1821	/* Clear ADDR flag */
lypinator	0:bb348c97df44	1822	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	1823
lypinator	0:bb348c97df44	1824	/* Process Unlocked */
lypinator	0:bb348c97df44	1825	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1826
lypinator	0:bb348c97df44	1827	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	1828	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	1829	process unlock */
lypinator	0:bb348c97df44	1830
lypinator	0:bb348c97df44	1831	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	1832	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	1833
lypinator	0:bb348c97df44	1834	return HAL_OK;
lypinator	0:bb348c97df44	1835	}
lypinator	0:bb348c97df44	1836	else
lypinator	0:bb348c97df44	1837	{
lypinator	0:bb348c97df44	1838	return HAL_BUSY;
lypinator	0:bb348c97df44	1839	}
lypinator	0:bb348c97df44	1840	}
lypinator	0:bb348c97df44	1841
lypinator	0:bb348c97df44	1842	/**
lypinator	0:bb348c97df44	1843	* @brief Enable the Address listen mode with Interrupt.
lypinator	0:bb348c97df44	1844	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1845	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	1846	* @retval HAL status
lypinator	0:bb348c97df44	1847	*/
lypinator	0:bb348c97df44	1848	HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	1849	{
lypinator	0:bb348c97df44	1850	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	1851	{
lypinator	0:bb348c97df44	1852	hi2c->State = HAL_I2C_STATE_LISTEN;
lypinator	0:bb348c97df44	1853
lypinator	0:bb348c97df44	1854	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	1855	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	1856	{
lypinator	0:bb348c97df44	1857	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	1858	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	1859	}
lypinator	0:bb348c97df44	1860
lypinator	0:bb348c97df44	1861	/* Enable Address Acknowledge */
lypinator	0:bb348c97df44	1862	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	1863
lypinator	0:bb348c97df44	1864	/* Enable EVT and ERR interrupt */
lypinator	0:bb348c97df44	1865	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
lypinator	0:bb348c97df44	1866
lypinator	0:bb348c97df44	1867	return HAL_OK;
lypinator	0:bb348c97df44	1868	}
lypinator	0:bb348c97df44	1869	else
lypinator	0:bb348c97df44	1870	{
lypinator	0:bb348c97df44	1871	return HAL_BUSY;
lypinator	0:bb348c97df44	1872	}
lypinator	0:bb348c97df44	1873	}
lypinator	0:bb348c97df44	1874
lypinator	0:bb348c97df44	1875	/**
lypinator	0:bb348c97df44	1876	* @brief Disable the Address listen mode with Interrupt.
lypinator	0:bb348c97df44	1877	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1878	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	1879	* @retval HAL status
lypinator	0:bb348c97df44	1880	*/
lypinator	0:bb348c97df44	1881	HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	1882	{
lypinator	0:bb348c97df44	1883	/* Declaration of tmp to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	1884	uint32_t tmp;
lypinator	0:bb348c97df44	1885
lypinator	0:bb348c97df44	1886	/* Disable Address listen mode only if a transfer is not ongoing */
lypinator	0:bb348c97df44	1887	if(hi2c->State == HAL_I2C_STATE_LISTEN)
lypinator	0:bb348c97df44	1888	{
lypinator	0:bb348c97df44	1889	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
lypinator	0:bb348c97df44	1890	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
lypinator	0:bb348c97df44	1891	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	1892	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	1893
lypinator	0:bb348c97df44	1894	/* Disable Address Acknowledge */
lypinator	0:bb348c97df44	1895	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	1896
lypinator	0:bb348c97df44	1897	/* Disable EVT and ERR interrupt */
lypinator	0:bb348c97df44	1898	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
lypinator	0:bb348c97df44	1899
lypinator	0:bb348c97df44	1900	return HAL_OK;
lypinator	0:bb348c97df44	1901	}
lypinator	0:bb348c97df44	1902	else
lypinator	0:bb348c97df44	1903	{
lypinator	0:bb348c97df44	1904	return HAL_BUSY;
lypinator	0:bb348c97df44	1905	}
lypinator	0:bb348c97df44	1906	}
lypinator	0:bb348c97df44	1907
lypinator	0:bb348c97df44	1908	/**
lypinator	0:bb348c97df44	1909	* @brief Transmit in master mode an amount of data in non-blocking mode with DMA
lypinator	0:bb348c97df44	1910	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1911	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	1912	* @param DevAddress Target device address The device 7 bits address value
lypinator	0:bb348c97df44	1913	* in datasheet must be shifted to the left before calling the interface
lypinator	0:bb348c97df44	1914	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	1915	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	1916	* @retval HAL status
lypinator	0:bb348c97df44	1917	*/
lypinator	0:bb348c97df44	1918	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	1919	{
lypinator	0:bb348c97df44	1920	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	1921
lypinator	0:bb348c97df44	1922	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	1923	{
lypinator	0:bb348c97df44	1924	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	1925	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	1926	do
lypinator	0:bb348c97df44	1927	{
lypinator	0:bb348c97df44	1928	if(count-- == 0U)
lypinator	0:bb348c97df44	1929	{
lypinator	0:bb348c97df44	1930	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	1931	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	1932
lypinator	0:bb348c97df44	1933	/* Process Unlocked */
lypinator	0:bb348c97df44	1934	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1935
lypinator	0:bb348c97df44	1936	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1937	}
lypinator	0:bb348c97df44	1938	}
lypinator	0:bb348c97df44	1939	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	1940
lypinator	0:bb348c97df44	1941	/* Process Locked */
lypinator	0:bb348c97df44	1942	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	1943
lypinator	0:bb348c97df44	1944	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	1945	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	1946	{
lypinator	0:bb348c97df44	1947	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	1948	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	1949	}
lypinator	0:bb348c97df44	1950
lypinator	0:bb348c97df44	1951	/* Disable Pos */
lypinator	0:bb348c97df44	1952	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	1953
lypinator	0:bb348c97df44	1954	hi2c->State = HAL_I2C_STATE_BUSY_TX;
lypinator	0:bb348c97df44	1955	hi2c->Mode = HAL_I2C_MODE_MASTER;
lypinator	0:bb348c97df44	1956	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	1957
lypinator	0:bb348c97df44	1958	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	1959	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	1960	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	1961	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	1962	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	1963	hi2c->Devaddress = DevAddress;
lypinator	0:bb348c97df44	1964
lypinator	0:bb348c97df44	1965	if(hi2c->XferSize > 0U)
lypinator	0:bb348c97df44	1966	{
lypinator	0:bb348c97df44	1967	/* Set the I2C DMA transfer complete callback */
lypinator	0:bb348c97df44	1968	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
lypinator	0:bb348c97df44	1969
lypinator	0:bb348c97df44	1970	/* Set the DMA error callback */
lypinator	0:bb348c97df44	1971	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
lypinator	0:bb348c97df44	1972
lypinator	0:bb348c97df44	1973	/* Set the unused DMA callbacks to NULL */
lypinator	0:bb348c97df44	1974	hi2c->hdmatx->XferHalfCpltCallback = NULL;
lypinator	0:bb348c97df44	1975	hi2c->hdmatx->XferM1CpltCallback = NULL;
lypinator	0:bb348c97df44	1976	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
lypinator	0:bb348c97df44	1977	hi2c->hdmatx->XferAbortCallback = NULL;
lypinator	0:bb348c97df44	1978
lypinator	0:bb348c97df44	1979	/* Enable the DMA Stream */
lypinator	0:bb348c97df44	1980	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
lypinator	0:bb348c97df44	1981
lypinator	0:bb348c97df44	1982	/* Enable Acknowledge */
lypinator	0:bb348c97df44	1983	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	1984
lypinator	0:bb348c97df44	1985	/* Generate Start */
lypinator	0:bb348c97df44	1986	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	1987
lypinator	0:bb348c97df44	1988	/* Process Unlocked */
lypinator	0:bb348c97df44	1989	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	1990
lypinator	0:bb348c97df44	1991	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	1992	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	1993	process unlock */
lypinator	0:bb348c97df44	1994
lypinator	0:bb348c97df44	1995	/* Enable EVT and ERR interrupt */
lypinator	0:bb348c97df44	1996	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
lypinator	0:bb348c97df44	1997
lypinator	0:bb348c97df44	1998	/* Enable DMA Request */
lypinator	0:bb348c97df44	1999	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
lypinator	0:bb348c97df44	2000	}
lypinator	0:bb348c97df44	2001	else
lypinator	0:bb348c97df44	2002	{
lypinator	0:bb348c97df44	2003	/* Enable Acknowledge */
lypinator	0:bb348c97df44	2004	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	2005
lypinator	0:bb348c97df44	2006	/* Generate Start */
lypinator	0:bb348c97df44	2007	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	2008
lypinator	0:bb348c97df44	2009	/* Process Unlocked */
lypinator	0:bb348c97df44	2010	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2011
lypinator	0:bb348c97df44	2012	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	2013	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	2014	process unlock */
lypinator	0:bb348c97df44	2015
lypinator	0:bb348c97df44	2016	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	2017	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	2018	}
lypinator	0:bb348c97df44	2019
lypinator	0:bb348c97df44	2020	return HAL_OK;
lypinator	0:bb348c97df44	2021	}
lypinator	0:bb348c97df44	2022	else
lypinator	0:bb348c97df44	2023	{
lypinator	0:bb348c97df44	2024	return HAL_BUSY;
lypinator	0:bb348c97df44	2025	}
lypinator	0:bb348c97df44	2026	}
lypinator	0:bb348c97df44	2027
lypinator	0:bb348c97df44	2028	/**
lypinator	0:bb348c97df44	2029	* @brief Receive in master mode an amount of data in non-blocking mode with DMA
lypinator	0:bb348c97df44	2030	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	2031	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	2032	* @param DevAddress Target device address The device 7 bits address value
lypinator	0:bb348c97df44	2033	* in datasheet must be shifted to the left before calling the interface
lypinator	0:bb348c97df44	2034	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	2035	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	2036	* @retval HAL status
lypinator	0:bb348c97df44	2037	*/
lypinator	0:bb348c97df44	2038	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	2039	{
lypinator	0:bb348c97df44	2040	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	2041
lypinator	0:bb348c97df44	2042	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	2043	{
lypinator	0:bb348c97df44	2044	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	2045	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	2046	do
lypinator	0:bb348c97df44	2047	{
lypinator	0:bb348c97df44	2048	if(count-- == 0U)
lypinator	0:bb348c97df44	2049	{
lypinator	0:bb348c97df44	2050	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	2051	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	2052
lypinator	0:bb348c97df44	2053	/* Process Unlocked */
lypinator	0:bb348c97df44	2054	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2055
lypinator	0:bb348c97df44	2056	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2057	}
lypinator	0:bb348c97df44	2058	}
lypinator	0:bb348c97df44	2059	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	2060
lypinator	0:bb348c97df44	2061	/* Process Locked */
lypinator	0:bb348c97df44	2062	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	2063
lypinator	0:bb348c97df44	2064	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	2065	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	2066	{
lypinator	0:bb348c97df44	2067	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	2068	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	2069	}
lypinator	0:bb348c97df44	2070
lypinator	0:bb348c97df44	2071	/* Disable Pos */
lypinator	0:bb348c97df44	2072	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	2073
lypinator	0:bb348c97df44	2074	hi2c->State = HAL_I2C_STATE_BUSY_RX;
lypinator	0:bb348c97df44	2075	hi2c->Mode = HAL_I2C_MODE_MASTER;
lypinator	0:bb348c97df44	2076	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	2077
lypinator	0:bb348c97df44	2078	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	2079	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	2080	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	2081	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	2082	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	2083	hi2c->Devaddress = DevAddress;
lypinator	0:bb348c97df44	2084
lypinator	0:bb348c97df44	2085	if(hi2c->XferSize > 0U)
lypinator	0:bb348c97df44	2086	{
lypinator	0:bb348c97df44	2087	/* Set the I2C DMA transfer complete callback */
lypinator	0:bb348c97df44	2088	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
lypinator	0:bb348c97df44	2089
lypinator	0:bb348c97df44	2090	/* Set the DMA error callback */
lypinator	0:bb348c97df44	2091	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
lypinator	0:bb348c97df44	2092
lypinator	0:bb348c97df44	2093	/* Set the unused DMA callbacks to NULL */
lypinator	0:bb348c97df44	2094	hi2c->hdmarx->XferHalfCpltCallback = NULL;
lypinator	0:bb348c97df44	2095	hi2c->hdmarx->XferM1CpltCallback = NULL;
lypinator	0:bb348c97df44	2096	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
lypinator	0:bb348c97df44	2097	hi2c->hdmarx->XferAbortCallback = NULL;
lypinator	0:bb348c97df44	2098
lypinator	0:bb348c97df44	2099	/* Enable the DMA Stream */
lypinator	0:bb348c97df44	2100	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
lypinator	0:bb348c97df44	2101
lypinator	0:bb348c97df44	2102	/* Enable Acknowledge */
lypinator	0:bb348c97df44	2103	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	2104
lypinator	0:bb348c97df44	2105	/* Generate Start */
lypinator	0:bb348c97df44	2106	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	2107
lypinator	0:bb348c97df44	2108	/* Process Unlocked */
lypinator	0:bb348c97df44	2109	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2110
lypinator	0:bb348c97df44	2111	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	2112	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	2113	process unlock */
lypinator	0:bb348c97df44	2114
lypinator	0:bb348c97df44	2115	/* Enable EVT and ERR interrupt */
lypinator	0:bb348c97df44	2116	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
lypinator	0:bb348c97df44	2117
lypinator	0:bb348c97df44	2118	/* Enable DMA Request */
lypinator	0:bb348c97df44	2119	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
lypinator	0:bb348c97df44	2120	}
lypinator	0:bb348c97df44	2121	else
lypinator	0:bb348c97df44	2122	{
lypinator	0:bb348c97df44	2123	/* Enable Acknowledge */
lypinator	0:bb348c97df44	2124	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	2125
lypinator	0:bb348c97df44	2126	/* Generate Start */
lypinator	0:bb348c97df44	2127	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	2128
lypinator	0:bb348c97df44	2129	/* Process Unlocked */
lypinator	0:bb348c97df44	2130	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2131
lypinator	0:bb348c97df44	2132	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	2133	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	2134	process unlock */
lypinator	0:bb348c97df44	2135
lypinator	0:bb348c97df44	2136	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	2137	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	2138	}
lypinator	0:bb348c97df44	2139
lypinator	0:bb348c97df44	2140	return HAL_OK;
lypinator	0:bb348c97df44	2141	}
lypinator	0:bb348c97df44	2142	else
lypinator	0:bb348c97df44	2143	{
lypinator	0:bb348c97df44	2144	return HAL_BUSY;
lypinator	0:bb348c97df44	2145	}
lypinator	0:bb348c97df44	2146	}
lypinator	0:bb348c97df44	2147
lypinator	0:bb348c97df44	2148	/**
lypinator	0:bb348c97df44	2149	* @brief Abort a master I2C process communication with Interrupt.
lypinator	0:bb348c97df44	2150	* @note This abort can be called only if state is ready
lypinator	0:bb348c97df44	2151	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	2152	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	2153	* @param DevAddress Target device address The device 7 bits address value
lypinator	0:bb348c97df44	2154	* in datasheet must be shifted to the left before calling the interface
lypinator	0:bb348c97df44	2155	* @retval HAL status
lypinator	0:bb348c97df44	2156	*/
lypinator	0:bb348c97df44	2157	HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
lypinator	0:bb348c97df44	2158	{
lypinator	0:bb348c97df44	2159	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	2160	UNUSED(DevAddress);
lypinator	0:bb348c97df44	2161
lypinator	0:bb348c97df44	2162	/* Abort Master transfer during Receive or Transmit process */
lypinator	0:bb348c97df44	2163	if(hi2c->Mode == HAL_I2C_MODE_MASTER)
lypinator	0:bb348c97df44	2164	{
lypinator	0:bb348c97df44	2165	/* Process Locked */
lypinator	0:bb348c97df44	2166	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	2167
lypinator	0:bb348c97df44	2168	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	2169	hi2c->State = HAL_I2C_STATE_ABORT;
lypinator	0:bb348c97df44	2170
lypinator	0:bb348c97df44	2171	/* Disable Acknowledge */
lypinator	0:bb348c97df44	2172	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	2173
lypinator	0:bb348c97df44	2174	/* Generate Stop */
lypinator	0:bb348c97df44	2175	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	2176
lypinator	0:bb348c97df44	2177	hi2c->XferCount = 0U;
lypinator	0:bb348c97df44	2178
lypinator	0:bb348c97df44	2179	/* Disable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	2180	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	2181
lypinator	0:bb348c97df44	2182	/* Process Unlocked */
lypinator	0:bb348c97df44	2183	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2184
lypinator	0:bb348c97df44	2185	/* Call the corresponding callback to inform upper layer of End of Transfer */
lypinator	0:bb348c97df44	2186	I2C_ITError(hi2c);
lypinator	0:bb348c97df44	2187
lypinator	0:bb348c97df44	2188	return HAL_OK;
lypinator	0:bb348c97df44	2189	}
lypinator	0:bb348c97df44	2190	else
lypinator	0:bb348c97df44	2191	{
lypinator	0:bb348c97df44	2192	/* Wrong usage of abort function */
lypinator	0:bb348c97df44	2193	/* This function should be used only in case of abort monitored by master device */
lypinator	0:bb348c97df44	2194	return HAL_ERROR;
lypinator	0:bb348c97df44	2195	}
lypinator	0:bb348c97df44	2196	}
lypinator	0:bb348c97df44	2197
lypinator	0:bb348c97df44	2198	/**
lypinator	0:bb348c97df44	2199	* @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
lypinator	0:bb348c97df44	2200	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	2201	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	2202	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	2203	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	2204	* @retval HAL status
lypinator	0:bb348c97df44	2205	*/
lypinator	0:bb348c97df44	2206	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	2207	{
lypinator	0:bb348c97df44	2208	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	2209
lypinator	0:bb348c97df44	2210	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	2211	{
lypinator	0:bb348c97df44	2212	if((pData == NULL) \|\| (Size == 0U))
lypinator	0:bb348c97df44	2213	{
lypinator	0:bb348c97df44	2214	return HAL_ERROR;
lypinator	0:bb348c97df44	2215	}
lypinator	0:bb348c97df44	2216
lypinator	0:bb348c97df44	2217	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	2218	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	2219	do
lypinator	0:bb348c97df44	2220	{
lypinator	0:bb348c97df44	2221	if(count-- == 0U)
lypinator	0:bb348c97df44	2222	{
lypinator	0:bb348c97df44	2223	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	2224	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	2225
lypinator	0:bb348c97df44	2226	/* Process Unlocked */
lypinator	0:bb348c97df44	2227	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2228
lypinator	0:bb348c97df44	2229	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2230	}
lypinator	0:bb348c97df44	2231	}
lypinator	0:bb348c97df44	2232	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	2233
lypinator	0:bb348c97df44	2234	/* Process Locked */
lypinator	0:bb348c97df44	2235	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	2236
lypinator	0:bb348c97df44	2237	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	2238	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	2239	{
lypinator	0:bb348c97df44	2240	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	2241	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	2242	}
lypinator	0:bb348c97df44	2243
lypinator	0:bb348c97df44	2244	/* Disable Pos */
lypinator	0:bb348c97df44	2245	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	2246
lypinator	0:bb348c97df44	2247	hi2c->State = HAL_I2C_STATE_BUSY_TX;
lypinator	0:bb348c97df44	2248	hi2c->Mode = HAL_I2C_MODE_SLAVE;
lypinator	0:bb348c97df44	2249	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	2250
lypinator	0:bb348c97df44	2251	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	2252	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	2253	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	2254	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	2255	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	2256
lypinator	0:bb348c97df44	2257	/* Set the I2C DMA transfer complete callback */
lypinator	0:bb348c97df44	2258	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
lypinator	0:bb348c97df44	2259
lypinator	0:bb348c97df44	2260	/* Set the DMA error callback */
lypinator	0:bb348c97df44	2261	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
lypinator	0:bb348c97df44	2262
lypinator	0:bb348c97df44	2263	/* Set the unused DMA callbacks to NULL */
lypinator	0:bb348c97df44	2264	hi2c->hdmatx->XferHalfCpltCallback = NULL;
lypinator	0:bb348c97df44	2265	hi2c->hdmatx->XferM1CpltCallback = NULL;
lypinator	0:bb348c97df44	2266	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
lypinator	0:bb348c97df44	2267	hi2c->hdmatx->XferAbortCallback = NULL;
lypinator	0:bb348c97df44	2268
lypinator	0:bb348c97df44	2269	/* Enable the DMA Stream */
lypinator	0:bb348c97df44	2270	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
lypinator	0:bb348c97df44	2271
lypinator	0:bb348c97df44	2272	/* Enable Address Acknowledge */
lypinator	0:bb348c97df44	2273	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	2274
lypinator	0:bb348c97df44	2275	/* Process Unlocked */
lypinator	0:bb348c97df44	2276	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2277
lypinator	0:bb348c97df44	2278	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	2279	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	2280	process unlock */
lypinator	0:bb348c97df44	2281	/* Enable EVT and ERR interrupt */
lypinator	0:bb348c97df44	2282	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
lypinator	0:bb348c97df44	2283
lypinator	0:bb348c97df44	2284	/* Enable DMA Request */
lypinator	0:bb348c97df44	2285	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
lypinator	0:bb348c97df44	2286
lypinator	0:bb348c97df44	2287	return HAL_OK;
lypinator	0:bb348c97df44	2288	}
lypinator	0:bb348c97df44	2289	else
lypinator	0:bb348c97df44	2290	{
lypinator	0:bb348c97df44	2291	return HAL_BUSY;
lypinator	0:bb348c97df44	2292	}
lypinator	0:bb348c97df44	2293	}
lypinator	0:bb348c97df44	2294
lypinator	0:bb348c97df44	2295	/**
lypinator	0:bb348c97df44	2296	* @brief Receive in slave mode an amount of data in non-blocking mode with DMA
lypinator	0:bb348c97df44	2297	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	2298	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	2299	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	2300	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	2301	* @retval HAL status
lypinator	0:bb348c97df44	2302	*/
lypinator	0:bb348c97df44	2303	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	2304	{
lypinator	0:bb348c97df44	2305	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	2306
lypinator	0:bb348c97df44	2307	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	2308	{
lypinator	0:bb348c97df44	2309	if((pData == NULL) \|\| (Size == 0U))
lypinator	0:bb348c97df44	2310	{
lypinator	0:bb348c97df44	2311	return HAL_ERROR;
lypinator	0:bb348c97df44	2312	}
lypinator	0:bb348c97df44	2313
lypinator	0:bb348c97df44	2314	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	2315	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	2316	do
lypinator	0:bb348c97df44	2317	{
lypinator	0:bb348c97df44	2318	if(count-- == 0U)
lypinator	0:bb348c97df44	2319	{
lypinator	0:bb348c97df44	2320	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	2321	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	2322
lypinator	0:bb348c97df44	2323	/* Process Unlocked */
lypinator	0:bb348c97df44	2324	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2325
lypinator	0:bb348c97df44	2326	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2327	}
lypinator	0:bb348c97df44	2328	}
lypinator	0:bb348c97df44	2329	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	2330
lypinator	0:bb348c97df44	2331	/* Process Locked */
lypinator	0:bb348c97df44	2332	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	2333
lypinator	0:bb348c97df44	2334	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	2335	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	2336	{
lypinator	0:bb348c97df44	2337	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	2338	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	2339	}
lypinator	0:bb348c97df44	2340
lypinator	0:bb348c97df44	2341	/* Disable Pos */
lypinator	0:bb348c97df44	2342	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	2343
lypinator	0:bb348c97df44	2344	hi2c->State = HAL_I2C_STATE_BUSY_RX;
lypinator	0:bb348c97df44	2345	hi2c->Mode = HAL_I2C_MODE_SLAVE;
lypinator	0:bb348c97df44	2346	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	2347
lypinator	0:bb348c97df44	2348	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	2349	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	2350	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	2351	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	2352	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	2353
lypinator	0:bb348c97df44	2354	/* Set the I2C DMA transfer complete callback */
lypinator	0:bb348c97df44	2355	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
lypinator	0:bb348c97df44	2356
lypinator	0:bb348c97df44	2357	/* Set the DMA error callback */
lypinator	0:bb348c97df44	2358	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
lypinator	0:bb348c97df44	2359
lypinator	0:bb348c97df44	2360	/* Set the unused DMA callbacks to NULL */
lypinator	0:bb348c97df44	2361	hi2c->hdmarx->XferHalfCpltCallback = NULL;
lypinator	0:bb348c97df44	2362	hi2c->hdmarx->XferM1CpltCallback = NULL;
lypinator	0:bb348c97df44	2363	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
lypinator	0:bb348c97df44	2364	hi2c->hdmarx->XferAbortCallback = NULL;
lypinator	0:bb348c97df44	2365
lypinator	0:bb348c97df44	2366	/* Enable the DMA Stream */
lypinator	0:bb348c97df44	2367	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
lypinator	0:bb348c97df44	2368
lypinator	0:bb348c97df44	2369	/* Enable Address Acknowledge */
lypinator	0:bb348c97df44	2370	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	2371
lypinator	0:bb348c97df44	2372	/* Process Unlocked */
lypinator	0:bb348c97df44	2373	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2374
lypinator	0:bb348c97df44	2375	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	2376	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	2377	process unlock */
lypinator	0:bb348c97df44	2378	/* Enable EVT and ERR interrupt */
lypinator	0:bb348c97df44	2379	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
lypinator	0:bb348c97df44	2380
lypinator	0:bb348c97df44	2381	/* Enable DMA Request */
lypinator	0:bb348c97df44	2382	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
lypinator	0:bb348c97df44	2383
lypinator	0:bb348c97df44	2384	return HAL_OK;
lypinator	0:bb348c97df44	2385	}
lypinator	0:bb348c97df44	2386	else
lypinator	0:bb348c97df44	2387	{
lypinator	0:bb348c97df44	2388	return HAL_BUSY;
lypinator	0:bb348c97df44	2389	}
lypinator	0:bb348c97df44	2390	}
lypinator	0:bb348c97df44	2391	/**
lypinator	0:bb348c97df44	2392	* @brief Write an amount of data in blocking mode to a specific memory address
lypinator	0:bb348c97df44	2393	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	2394	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	2395	* @param DevAddress Target device address
lypinator	0:bb348c97df44	2396	* @param MemAddress Internal memory address
lypinator	0:bb348c97df44	2397	* @param MemAddSize Size of internal memory address
lypinator	0:bb348c97df44	2398	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	2399	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	2400	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	2401	* @retval HAL status
lypinator	0:bb348c97df44	2402	*/
lypinator	0:bb348c97df44	2403	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
lypinator	0:bb348c97df44	2404	{
lypinator	0:bb348c97df44	2405	uint32_t tickstart = 0x00U;
lypinator	0:bb348c97df44	2406
lypinator	0:bb348c97df44	2407	/* Init tickstart for timeout management*/
lypinator	0:bb348c97df44	2408	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	2409
lypinator	0:bb348c97df44	2410	/* Check the parameters */
lypinator	0:bb348c97df44	2411	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
lypinator	0:bb348c97df44	2412
lypinator	0:bb348c97df44	2413	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	2414	{
lypinator	0:bb348c97df44	2415	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	2416	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	2417	{
lypinator	0:bb348c97df44	2418	return HAL_BUSY;
lypinator	0:bb348c97df44	2419	}
lypinator	0:bb348c97df44	2420
lypinator	0:bb348c97df44	2421	/* Process Locked */
lypinator	0:bb348c97df44	2422	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	2423
lypinator	0:bb348c97df44	2424	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	2425	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	2426	{
lypinator	0:bb348c97df44	2427	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	2428	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	2429	}
lypinator	0:bb348c97df44	2430
lypinator	0:bb348c97df44	2431	/* Disable Pos */
lypinator	0:bb348c97df44	2432	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	2433
lypinator	0:bb348c97df44	2434	hi2c->State = HAL_I2C_STATE_BUSY_TX;
lypinator	0:bb348c97df44	2435	hi2c->Mode = HAL_I2C_MODE_MEM;
lypinator	0:bb348c97df44	2436	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	2437
lypinator	0:bb348c97df44	2438	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	2439	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	2440	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	2441	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	2442	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	2443
lypinator	0:bb348c97df44	2444	/* Send Slave Address and Memory Address */
lypinator	0:bb348c97df44	2445	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	2446	{
lypinator	0:bb348c97df44	2447	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	2448	{
lypinator	0:bb348c97df44	2449	/* Process Unlocked */
lypinator	0:bb348c97df44	2450	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2451	return HAL_ERROR;
lypinator	0:bb348c97df44	2452	}
lypinator	0:bb348c97df44	2453	else
lypinator	0:bb348c97df44	2454	{
lypinator	0:bb348c97df44	2455	/* Process Unlocked */
lypinator	0:bb348c97df44	2456	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2457	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2458	}
lypinator	0:bb348c97df44	2459	}
lypinator	0:bb348c97df44	2460
lypinator	0:bb348c97df44	2461	while(hi2c->XferSize > 0U)
lypinator	0:bb348c97df44	2462	{
lypinator	0:bb348c97df44	2463	/* Wait until TXE flag is set */
lypinator	0:bb348c97df44	2464	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	2465	{
lypinator	0:bb348c97df44	2466	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	2467	{
lypinator	0:bb348c97df44	2468	/* Generate Stop */
lypinator	0:bb348c97df44	2469	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	2470	return HAL_ERROR;
lypinator	0:bb348c97df44	2471	}
lypinator	0:bb348c97df44	2472	else
lypinator	0:bb348c97df44	2473	{
lypinator	0:bb348c97df44	2474	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2475	}
lypinator	0:bb348c97df44	2476	}
lypinator	0:bb348c97df44	2477
lypinator	0:bb348c97df44	2478	/* Write data to DR */
lypinator	0:bb348c97df44	2479	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
lypinator	0:bb348c97df44	2480	hi2c->XferSize--;
lypinator	0:bb348c97df44	2481	hi2c->XferCount--;
lypinator	0:bb348c97df44	2482
lypinator	0:bb348c97df44	2483	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
lypinator	0:bb348c97df44	2484	{
lypinator	0:bb348c97df44	2485	/* Write data to DR */
lypinator	0:bb348c97df44	2486	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
lypinator	0:bb348c97df44	2487	hi2c->XferSize--;
lypinator	0:bb348c97df44	2488	hi2c->XferCount--;
lypinator	0:bb348c97df44	2489	}
lypinator	0:bb348c97df44	2490	}
lypinator	0:bb348c97df44	2491
lypinator	0:bb348c97df44	2492	/* Wait until BTF flag is set */
lypinator	0:bb348c97df44	2493	if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	2494	{
lypinator	0:bb348c97df44	2495	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	2496	{
lypinator	0:bb348c97df44	2497	/* Generate Stop */
lypinator	0:bb348c97df44	2498	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	2499	return HAL_ERROR;
lypinator	0:bb348c97df44	2500	}
lypinator	0:bb348c97df44	2501	else
lypinator	0:bb348c97df44	2502	{
lypinator	0:bb348c97df44	2503	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2504	}
lypinator	0:bb348c97df44	2505	}
lypinator	0:bb348c97df44	2506
lypinator	0:bb348c97df44	2507	/* Generate Stop */
lypinator	0:bb348c97df44	2508	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	2509
lypinator	0:bb348c97df44	2510	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	2511	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	2512
lypinator	0:bb348c97df44	2513	/* Process Unlocked */
lypinator	0:bb348c97df44	2514	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2515
lypinator	0:bb348c97df44	2516	return HAL_OK;
lypinator	0:bb348c97df44	2517	}
lypinator	0:bb348c97df44	2518	else
lypinator	0:bb348c97df44	2519	{
lypinator	0:bb348c97df44	2520	return HAL_BUSY;
lypinator	0:bb348c97df44	2521	}
lypinator	0:bb348c97df44	2522	}
lypinator	0:bb348c97df44	2523
lypinator	0:bb348c97df44	2524	/**
lypinator	0:bb348c97df44	2525	* @brief Read an amount of data in blocking mode from a specific memory address
lypinator	0:bb348c97df44	2526	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	2527	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	2528	* @param DevAddress Target device address
lypinator	0:bb348c97df44	2529	* @param MemAddress Internal memory address
lypinator	0:bb348c97df44	2530	* @param MemAddSize Size of internal memory address
lypinator	0:bb348c97df44	2531	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	2532	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	2533	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	2534	* @retval HAL status
lypinator	0:bb348c97df44	2535	*/
lypinator	0:bb348c97df44	2536	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
lypinator	0:bb348c97df44	2537	{
lypinator	0:bb348c97df44	2538	uint32_t tickstart = 0x00U;
lypinator	0:bb348c97df44	2539
lypinator	0:bb348c97df44	2540	/* Init tickstart for timeout management*/
lypinator	0:bb348c97df44	2541	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	2542
lypinator	0:bb348c97df44	2543	/* Check the parameters */
lypinator	0:bb348c97df44	2544	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
lypinator	0:bb348c97df44	2545
lypinator	0:bb348c97df44	2546	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	2547	{
lypinator	0:bb348c97df44	2548	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	2549	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	2550	{
lypinator	0:bb348c97df44	2551	return HAL_BUSY;
lypinator	0:bb348c97df44	2552	}
lypinator	0:bb348c97df44	2553
lypinator	0:bb348c97df44	2554	/* Process Locked */
lypinator	0:bb348c97df44	2555	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	2556
lypinator	0:bb348c97df44	2557	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	2558	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	2559	{
lypinator	0:bb348c97df44	2560	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	2561	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	2562	}
lypinator	0:bb348c97df44	2563
lypinator	0:bb348c97df44	2564	/* Disable Pos */
lypinator	0:bb348c97df44	2565	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	2566
lypinator	0:bb348c97df44	2567	hi2c->State = HAL_I2C_STATE_BUSY_RX;
lypinator	0:bb348c97df44	2568	hi2c->Mode = HAL_I2C_MODE_MEM;
lypinator	0:bb348c97df44	2569	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	2570
lypinator	0:bb348c97df44	2571	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	2572	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	2573	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	2574	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	2575	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	2576
lypinator	0:bb348c97df44	2577	/* Send Slave Address and Memory Address */
lypinator	0:bb348c97df44	2578	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	2579	{
lypinator	0:bb348c97df44	2580	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	2581	{
lypinator	0:bb348c97df44	2582	/* Process Unlocked */
lypinator	0:bb348c97df44	2583	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2584	return HAL_ERROR;
lypinator	0:bb348c97df44	2585	}
lypinator	0:bb348c97df44	2586	else
lypinator	0:bb348c97df44	2587	{
lypinator	0:bb348c97df44	2588	/* Process Unlocked */
lypinator	0:bb348c97df44	2589	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2590	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2591	}
lypinator	0:bb348c97df44	2592	}
lypinator	0:bb348c97df44	2593
lypinator	0:bb348c97df44	2594	if(hi2c->XferSize == 0U)
lypinator	0:bb348c97df44	2595	{
lypinator	0:bb348c97df44	2596	/* Clear ADDR flag */
lypinator	0:bb348c97df44	2597	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	2598
lypinator	0:bb348c97df44	2599	/* Generate Stop */
lypinator	0:bb348c97df44	2600	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	2601	}
lypinator	0:bb348c97df44	2602	else if(hi2c->XferSize == 1U)
lypinator	0:bb348c97df44	2603	{
lypinator	0:bb348c97df44	2604	/* Disable Acknowledge */
lypinator	0:bb348c97df44	2605	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	2606
lypinator	0:bb348c97df44	2607	/* Clear ADDR flag */
lypinator	0:bb348c97df44	2608	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	2609
lypinator	0:bb348c97df44	2610	/* Generate Stop */
lypinator	0:bb348c97df44	2611	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	2612	}
lypinator	0:bb348c97df44	2613	else if(hi2c->XferSize == 2U)
lypinator	0:bb348c97df44	2614	{
lypinator	0:bb348c97df44	2615	/* Disable Acknowledge */
lypinator	0:bb348c97df44	2616	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	2617
lypinator	0:bb348c97df44	2618	/* Enable Pos */
lypinator	0:bb348c97df44	2619	hi2c->Instance->CR1 \|= I2C_CR1_POS;
lypinator	0:bb348c97df44	2620
lypinator	0:bb348c97df44	2621	/* Clear ADDR flag */
lypinator	0:bb348c97df44	2622	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	2623	}
lypinator	0:bb348c97df44	2624	else
lypinator	0:bb348c97df44	2625	{
lypinator	0:bb348c97df44	2626	/* Clear ADDR flag */
lypinator	0:bb348c97df44	2627	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	2628	}
lypinator	0:bb348c97df44	2629
lypinator	0:bb348c97df44	2630	while(hi2c->XferSize > 0U)
lypinator	0:bb348c97df44	2631	{
lypinator	0:bb348c97df44	2632	if(hi2c->XferSize <= 3U)
lypinator	0:bb348c97df44	2633	{
lypinator	0:bb348c97df44	2634	/* One byte */
lypinator	0:bb348c97df44	2635	if(hi2c->XferSize== 1U)
lypinator	0:bb348c97df44	2636	{
lypinator	0:bb348c97df44	2637	/* Wait until RXNE flag is set */
lypinator	0:bb348c97df44	2638	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	2639	{
lypinator	0:bb348c97df44	2640	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
lypinator	0:bb348c97df44	2641	{
lypinator	0:bb348c97df44	2642	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2643	}
lypinator	0:bb348c97df44	2644	else
lypinator	0:bb348c97df44	2645	{
lypinator	0:bb348c97df44	2646	return HAL_ERROR;
lypinator	0:bb348c97df44	2647	}
lypinator	0:bb348c97df44	2648	}
lypinator	0:bb348c97df44	2649
lypinator	0:bb348c97df44	2650	/* Read data from DR */
lypinator	0:bb348c97df44	2651	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	2652	hi2c->XferSize--;
lypinator	0:bb348c97df44	2653	hi2c->XferCount--;
lypinator	0:bb348c97df44	2654	}
lypinator	0:bb348c97df44	2655	/* Two bytes */
lypinator	0:bb348c97df44	2656	else if(hi2c->XferSize == 2U)
lypinator	0:bb348c97df44	2657	{
lypinator	0:bb348c97df44	2658	/* Wait until BTF flag is set */
lypinator	0:bb348c97df44	2659	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	2660	{
lypinator	0:bb348c97df44	2661	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2662	}
lypinator	0:bb348c97df44	2663
lypinator	0:bb348c97df44	2664	/* Generate Stop */
lypinator	0:bb348c97df44	2665	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	2666
lypinator	0:bb348c97df44	2667	/* Read data from DR */
lypinator	0:bb348c97df44	2668	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	2669	hi2c->XferSize--;
lypinator	0:bb348c97df44	2670	hi2c->XferCount--;
lypinator	0:bb348c97df44	2671
lypinator	0:bb348c97df44	2672	/* Read data from DR */
lypinator	0:bb348c97df44	2673	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	2674	hi2c->XferSize--;
lypinator	0:bb348c97df44	2675	hi2c->XferCount--;
lypinator	0:bb348c97df44	2676	}
lypinator	0:bb348c97df44	2677	/* 3 Last bytes */
lypinator	0:bb348c97df44	2678	else
lypinator	0:bb348c97df44	2679	{
lypinator	0:bb348c97df44	2680	/* Wait until BTF flag is set */
lypinator	0:bb348c97df44	2681	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	2682	{
lypinator	0:bb348c97df44	2683	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2684	}
lypinator	0:bb348c97df44	2685
lypinator	0:bb348c97df44	2686	/* Disable Acknowledge */
lypinator	0:bb348c97df44	2687	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	2688
lypinator	0:bb348c97df44	2689	/* Read data from DR */
lypinator	0:bb348c97df44	2690	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	2691	hi2c->XferSize--;
lypinator	0:bb348c97df44	2692	hi2c->XferCount--;
lypinator	0:bb348c97df44	2693
lypinator	0:bb348c97df44	2694	/* Wait until BTF flag is set */
lypinator	0:bb348c97df44	2695	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	2696	{
lypinator	0:bb348c97df44	2697	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2698	}
lypinator	0:bb348c97df44	2699
lypinator	0:bb348c97df44	2700	/* Generate Stop */
lypinator	0:bb348c97df44	2701	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	2702
lypinator	0:bb348c97df44	2703	/* Read data from DR */
lypinator	0:bb348c97df44	2704	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	2705	hi2c->XferSize--;
lypinator	0:bb348c97df44	2706	hi2c->XferCount--;
lypinator	0:bb348c97df44	2707
lypinator	0:bb348c97df44	2708	/* Read data from DR */
lypinator	0:bb348c97df44	2709	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	2710	hi2c->XferSize--;
lypinator	0:bb348c97df44	2711	hi2c->XferCount--;
lypinator	0:bb348c97df44	2712	}
lypinator	0:bb348c97df44	2713	}
lypinator	0:bb348c97df44	2714	else
lypinator	0:bb348c97df44	2715	{
lypinator	0:bb348c97df44	2716	/* Wait until RXNE flag is set */
lypinator	0:bb348c97df44	2717	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	2718	{
lypinator	0:bb348c97df44	2719	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
lypinator	0:bb348c97df44	2720	{
lypinator	0:bb348c97df44	2721	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2722	}
lypinator	0:bb348c97df44	2723	else
lypinator	0:bb348c97df44	2724	{
lypinator	0:bb348c97df44	2725	return HAL_ERROR;
lypinator	0:bb348c97df44	2726	}
lypinator	0:bb348c97df44	2727	}
lypinator	0:bb348c97df44	2728
lypinator	0:bb348c97df44	2729	/* Read data from DR */
lypinator	0:bb348c97df44	2730	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	2731	hi2c->XferSize--;
lypinator	0:bb348c97df44	2732	hi2c->XferCount--;
lypinator	0:bb348c97df44	2733
lypinator	0:bb348c97df44	2734	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
lypinator	0:bb348c97df44	2735	{
lypinator	0:bb348c97df44	2736	/* Read data from DR */
lypinator	0:bb348c97df44	2737	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	2738	hi2c->XferSize--;
lypinator	0:bb348c97df44	2739	hi2c->XferCount--;
lypinator	0:bb348c97df44	2740	}
lypinator	0:bb348c97df44	2741	}
lypinator	0:bb348c97df44	2742	}
lypinator	0:bb348c97df44	2743
lypinator	0:bb348c97df44	2744	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	2745	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	2746
lypinator	0:bb348c97df44	2747	/* Process Unlocked */
lypinator	0:bb348c97df44	2748	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2749
lypinator	0:bb348c97df44	2750	return HAL_OK;
lypinator	0:bb348c97df44	2751	}
lypinator	0:bb348c97df44	2752	else
lypinator	0:bb348c97df44	2753	{
lypinator	0:bb348c97df44	2754	return HAL_BUSY;
lypinator	0:bb348c97df44	2755	}
lypinator	0:bb348c97df44	2756	}
lypinator	0:bb348c97df44	2757
lypinator	0:bb348c97df44	2758	/**
lypinator	0:bb348c97df44	2759	* @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
lypinator	0:bb348c97df44	2760	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	2761	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	2762	* @param DevAddress Target device address
lypinator	0:bb348c97df44	2763	* @param MemAddress Internal memory address
lypinator	0:bb348c97df44	2764	* @param MemAddSize Size of internal memory address
lypinator	0:bb348c97df44	2765	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	2766	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	2767	* @retval HAL status
lypinator	0:bb348c97df44	2768	*/
lypinator	0:bb348c97df44	2769	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	2770	{
lypinator	0:bb348c97df44	2771	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	2772
lypinator	0:bb348c97df44	2773	/* Check the parameters */
lypinator	0:bb348c97df44	2774	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
lypinator	0:bb348c97df44	2775
lypinator	0:bb348c97df44	2776	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	2777	{
lypinator	0:bb348c97df44	2778	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	2779	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	2780	do
lypinator	0:bb348c97df44	2781	{
lypinator	0:bb348c97df44	2782	if(count-- == 0U)
lypinator	0:bb348c97df44	2783	{
lypinator	0:bb348c97df44	2784	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	2785	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	2786
lypinator	0:bb348c97df44	2787	/* Process Unlocked */
lypinator	0:bb348c97df44	2788	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2789
lypinator	0:bb348c97df44	2790	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2791	}
lypinator	0:bb348c97df44	2792	}
lypinator	0:bb348c97df44	2793	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	2794
lypinator	0:bb348c97df44	2795	/* Process Locked */
lypinator	0:bb348c97df44	2796	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	2797
lypinator	0:bb348c97df44	2798	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	2799	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	2800	{
lypinator	0:bb348c97df44	2801	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	2802	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	2803	}
lypinator	0:bb348c97df44	2804
lypinator	0:bb348c97df44	2805	/* Disable Pos */
lypinator	0:bb348c97df44	2806	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	2807
lypinator	0:bb348c97df44	2808	hi2c->State = HAL_I2C_STATE_BUSY_TX;
lypinator	0:bb348c97df44	2809	hi2c->Mode = HAL_I2C_MODE_MEM;
lypinator	0:bb348c97df44	2810	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	2811
lypinator	0:bb348c97df44	2812	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	2813	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	2814	hi2c->XferSize = Size;
lypinator	0:bb348c97df44	2815	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	2816	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	2817	hi2c->Devaddress = DevAddress;
lypinator	0:bb348c97df44	2818	hi2c->Memaddress = MemAddress;
lypinator	0:bb348c97df44	2819	hi2c->MemaddSize = MemAddSize;
lypinator	0:bb348c97df44	2820	hi2c->EventCount = 0U;
lypinator	0:bb348c97df44	2821
lypinator	0:bb348c97df44	2822	/* Generate Start */
lypinator	0:bb348c97df44	2823	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	2824
lypinator	0:bb348c97df44	2825	/* Process Unlocked */
lypinator	0:bb348c97df44	2826	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2827
lypinator	0:bb348c97df44	2828	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	2829	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	2830	process unlock */
lypinator	0:bb348c97df44	2831
lypinator	0:bb348c97df44	2832	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	2833	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	2834
lypinator	0:bb348c97df44	2835	return HAL_OK;
lypinator	0:bb348c97df44	2836	}
lypinator	0:bb348c97df44	2837	else
lypinator	0:bb348c97df44	2838	{
lypinator	0:bb348c97df44	2839	return HAL_BUSY;
lypinator	0:bb348c97df44	2840	}
lypinator	0:bb348c97df44	2841	}
lypinator	0:bb348c97df44	2842
lypinator	0:bb348c97df44	2843	/**
lypinator	0:bb348c97df44	2844	* @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
lypinator	0:bb348c97df44	2845	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	2846	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	2847	* @param DevAddress Target device address
lypinator	0:bb348c97df44	2848	* @param MemAddress Internal memory address
lypinator	0:bb348c97df44	2849	* @param MemAddSize Size of internal memory address
lypinator	0:bb348c97df44	2850	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	2851	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	2852	* @retval HAL status
lypinator	0:bb348c97df44	2853	*/
lypinator	0:bb348c97df44	2854	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	2855	{
lypinator	0:bb348c97df44	2856	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	2857
lypinator	0:bb348c97df44	2858	/* Check the parameters */
lypinator	0:bb348c97df44	2859	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
lypinator	0:bb348c97df44	2860
lypinator	0:bb348c97df44	2861	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	2862	{
lypinator	0:bb348c97df44	2863	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	2864	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	2865	do
lypinator	0:bb348c97df44	2866	{
lypinator	0:bb348c97df44	2867	if(count-- == 0U)
lypinator	0:bb348c97df44	2868	{
lypinator	0:bb348c97df44	2869	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	2870	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	2871
lypinator	0:bb348c97df44	2872	/* Process Unlocked */
lypinator	0:bb348c97df44	2873	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2874
lypinator	0:bb348c97df44	2875	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2876	}
lypinator	0:bb348c97df44	2877	}
lypinator	0:bb348c97df44	2878	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	2879
lypinator	0:bb348c97df44	2880	/* Process Locked */
lypinator	0:bb348c97df44	2881	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	2882
lypinator	0:bb348c97df44	2883	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	2884	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	2885	{
lypinator	0:bb348c97df44	2886	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	2887	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	2888	}
lypinator	0:bb348c97df44	2889
lypinator	0:bb348c97df44	2890	/* Disable Pos */
lypinator	0:bb348c97df44	2891	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	2892
lypinator	0:bb348c97df44	2893	hi2c->State = HAL_I2C_STATE_BUSY_RX;
lypinator	0:bb348c97df44	2894	hi2c->Mode = HAL_I2C_MODE_MEM;
lypinator	0:bb348c97df44	2895	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	2896
lypinator	0:bb348c97df44	2897	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	2898	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	2899	hi2c->XferSize = Size;
lypinator	0:bb348c97df44	2900	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	2901	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	2902	hi2c->Devaddress = DevAddress;
lypinator	0:bb348c97df44	2903	hi2c->Memaddress = MemAddress;
lypinator	0:bb348c97df44	2904	hi2c->MemaddSize = MemAddSize;
lypinator	0:bb348c97df44	2905	hi2c->EventCount = 0U;
lypinator	0:bb348c97df44	2906
lypinator	0:bb348c97df44	2907	/* Enable Acknowledge */
lypinator	0:bb348c97df44	2908	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	2909
lypinator	0:bb348c97df44	2910	/* Generate Start */
lypinator	0:bb348c97df44	2911	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	2912
lypinator	0:bb348c97df44	2913	/* Process Unlocked */
lypinator	0:bb348c97df44	2914	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2915
lypinator	0:bb348c97df44	2916	if(hi2c->XferSize > 0U)
lypinator	0:bb348c97df44	2917	{
lypinator	0:bb348c97df44	2918	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	2919	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	2920	process unlock */
lypinator	0:bb348c97df44	2921
lypinator	0:bb348c97df44	2922	/* Enable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	2923	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	2924	}
lypinator	0:bb348c97df44	2925	return HAL_OK;
lypinator	0:bb348c97df44	2926	}
lypinator	0:bb348c97df44	2927	else
lypinator	0:bb348c97df44	2928	{
lypinator	0:bb348c97df44	2929	return HAL_BUSY;
lypinator	0:bb348c97df44	2930	}
lypinator	0:bb348c97df44	2931	}
lypinator	0:bb348c97df44	2932
lypinator	0:bb348c97df44	2933	/**
lypinator	0:bb348c97df44	2934	* @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
lypinator	0:bb348c97df44	2935	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	2936	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	2937	* @param DevAddress Target device address
lypinator	0:bb348c97df44	2938	* @param MemAddress Internal memory address
lypinator	0:bb348c97df44	2939	* @param MemAddSize Size of internal memory address
lypinator	0:bb348c97df44	2940	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	2941	* @param Size Amount of data to be sent
lypinator	0:bb348c97df44	2942	* @retval HAL status
lypinator	0:bb348c97df44	2943	*/
lypinator	0:bb348c97df44	2944	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	2945	{
lypinator	0:bb348c97df44	2946	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	2947
lypinator	0:bb348c97df44	2948	uint32_t tickstart = 0x00U;
lypinator	0:bb348c97df44	2949
lypinator	0:bb348c97df44	2950	/* Init tickstart for timeout management*/
lypinator	0:bb348c97df44	2951	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	2952
lypinator	0:bb348c97df44	2953	/* Check the parameters */
lypinator	0:bb348c97df44	2954	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
lypinator	0:bb348c97df44	2955
lypinator	0:bb348c97df44	2956	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	2957	{
lypinator	0:bb348c97df44	2958	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	2959	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	2960	do
lypinator	0:bb348c97df44	2961	{
lypinator	0:bb348c97df44	2962	if(count-- == 0U)
lypinator	0:bb348c97df44	2963	{
lypinator	0:bb348c97df44	2964	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	2965	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	2966
lypinator	0:bb348c97df44	2967	/* Process Unlocked */
lypinator	0:bb348c97df44	2968	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	2969
lypinator	0:bb348c97df44	2970	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2971	}
lypinator	0:bb348c97df44	2972	}
lypinator	0:bb348c97df44	2973	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	2974
lypinator	0:bb348c97df44	2975	/* Process Locked */
lypinator	0:bb348c97df44	2976	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	2977
lypinator	0:bb348c97df44	2978	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	2979	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	2980	{
lypinator	0:bb348c97df44	2981	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	2982	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	2983	}
lypinator	0:bb348c97df44	2984
lypinator	0:bb348c97df44	2985	/* Disable Pos */
lypinator	0:bb348c97df44	2986	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	2987
lypinator	0:bb348c97df44	2988	hi2c->State = HAL_I2C_STATE_BUSY_TX;
lypinator	0:bb348c97df44	2989	hi2c->Mode = HAL_I2C_MODE_MEM;
lypinator	0:bb348c97df44	2990	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	2991
lypinator	0:bb348c97df44	2992	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	2993	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	2994	hi2c->XferSize = Size;
lypinator	0:bb348c97df44	2995	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	2996	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	2997
lypinator	0:bb348c97df44	2998	if(hi2c->XferSize > 0U)
lypinator	0:bb348c97df44	2999	{
lypinator	0:bb348c97df44	3000	/* Set the I2C DMA transfer complete callback */
lypinator	0:bb348c97df44	3001	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
lypinator	0:bb348c97df44	3002
lypinator	0:bb348c97df44	3003	/* Set the DMA error callback */
lypinator	0:bb348c97df44	3004	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
lypinator	0:bb348c97df44	3005
lypinator	0:bb348c97df44	3006	/* Set the unused DMA callbacks to NULL */
lypinator	0:bb348c97df44	3007	hi2c->hdmatx->XferHalfCpltCallback = NULL;
lypinator	0:bb348c97df44	3008	hi2c->hdmatx->XferM1CpltCallback = NULL;
lypinator	0:bb348c97df44	3009	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
lypinator	0:bb348c97df44	3010	hi2c->hdmatx->XferAbortCallback = NULL;
lypinator	0:bb348c97df44	3011
lypinator	0:bb348c97df44	3012	/* Enable the DMA Stream */
lypinator	0:bb348c97df44	3013	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
lypinator	0:bb348c97df44	3014
lypinator	0:bb348c97df44	3015	/* Send Slave Address and Memory Address */
lypinator	0:bb348c97df44	3016	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	3017	{
lypinator	0:bb348c97df44	3018	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	3019	{
lypinator	0:bb348c97df44	3020	/* Process Unlocked */
lypinator	0:bb348c97df44	3021	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3022	return HAL_ERROR;
lypinator	0:bb348c97df44	3023	}
lypinator	0:bb348c97df44	3024	else
lypinator	0:bb348c97df44	3025	{
lypinator	0:bb348c97df44	3026	/* Process Unlocked */
lypinator	0:bb348c97df44	3027	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3028	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	3029	}
lypinator	0:bb348c97df44	3030	}
lypinator	0:bb348c97df44	3031
lypinator	0:bb348c97df44	3032	/* Clear ADDR flag */
lypinator	0:bb348c97df44	3033	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	3034
lypinator	0:bb348c97df44	3035	/* Process Unlocked */
lypinator	0:bb348c97df44	3036	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3037
lypinator	0:bb348c97df44	3038	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	3039	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	3040	process unlock */
lypinator	0:bb348c97df44	3041	/* Enable ERR interrupt */
lypinator	0:bb348c97df44	3042	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
lypinator	0:bb348c97df44	3043
lypinator	0:bb348c97df44	3044	/* Enable DMA Request */
lypinator	0:bb348c97df44	3045	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
lypinator	0:bb348c97df44	3046	}
lypinator	0:bb348c97df44	3047	return HAL_OK;
lypinator	0:bb348c97df44	3048	}
lypinator	0:bb348c97df44	3049	else
lypinator	0:bb348c97df44	3050	{
lypinator	0:bb348c97df44	3051	return HAL_BUSY;
lypinator	0:bb348c97df44	3052	}
lypinator	0:bb348c97df44	3053	}
lypinator	0:bb348c97df44	3054
lypinator	0:bb348c97df44	3055	/**
lypinator	0:bb348c97df44	3056	* @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
lypinator	0:bb348c97df44	3057	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3058	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3059	* @param DevAddress Target device address
lypinator	0:bb348c97df44	3060	* @param MemAddress Internal memory address
lypinator	0:bb348c97df44	3061	* @param MemAddSize Size of internal memory address
lypinator	0:bb348c97df44	3062	* @param pData Pointer to data buffer
lypinator	0:bb348c97df44	3063	* @param Size Amount of data to be read
lypinator	0:bb348c97df44	3064	* @retval HAL status
lypinator	0:bb348c97df44	3065	*/
lypinator	0:bb348c97df44	3066	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
lypinator	0:bb348c97df44	3067	{
lypinator	0:bb348c97df44	3068	uint32_t tickstart = 0x00U;
lypinator	0:bb348c97df44	3069	__IO uint32_t count = 0U;
lypinator	0:bb348c97df44	3070
lypinator	0:bb348c97df44	3071	/* Init tickstart for timeout management*/
lypinator	0:bb348c97df44	3072	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	3073
lypinator	0:bb348c97df44	3074	/* Check the parameters */
lypinator	0:bb348c97df44	3075	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
lypinator	0:bb348c97df44	3076
lypinator	0:bb348c97df44	3077	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	3078	{
lypinator	0:bb348c97df44	3079	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	3080	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
lypinator	0:bb348c97df44	3081	do
lypinator	0:bb348c97df44	3082	{
lypinator	0:bb348c97df44	3083	if(count-- == 0U)
lypinator	0:bb348c97df44	3084	{
lypinator	0:bb348c97df44	3085	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	3086	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	3087
lypinator	0:bb348c97df44	3088	/* Process Unlocked */
lypinator	0:bb348c97df44	3089	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3090
lypinator	0:bb348c97df44	3091	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	3092	}
lypinator	0:bb348c97df44	3093	}
lypinator	0:bb348c97df44	3094	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
lypinator	0:bb348c97df44	3095
lypinator	0:bb348c97df44	3096	/* Process Locked */
lypinator	0:bb348c97df44	3097	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	3098
lypinator	0:bb348c97df44	3099	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	3100	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	3101	{
lypinator	0:bb348c97df44	3102	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	3103	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	3104	}
lypinator	0:bb348c97df44	3105
lypinator	0:bb348c97df44	3106	/* Disable Pos */
lypinator	0:bb348c97df44	3107	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	3108
lypinator	0:bb348c97df44	3109	hi2c->State = HAL_I2C_STATE_BUSY_RX;
lypinator	0:bb348c97df44	3110	hi2c->Mode = HAL_I2C_MODE_MEM;
lypinator	0:bb348c97df44	3111	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	3112
lypinator	0:bb348c97df44	3113	/* Prepare transfer parameters */
lypinator	0:bb348c97df44	3114	hi2c->pBuffPtr = pData;
lypinator	0:bb348c97df44	3115	hi2c->XferCount = Size;
lypinator	0:bb348c97df44	3116	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	3117	hi2c->XferSize = hi2c->XferCount;
lypinator	0:bb348c97df44	3118
lypinator	0:bb348c97df44	3119	if(hi2c->XferSize > 0U)
lypinator	0:bb348c97df44	3120	{
lypinator	0:bb348c97df44	3121	/* Set the I2C DMA transfer complete callback */
lypinator	0:bb348c97df44	3122	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
lypinator	0:bb348c97df44	3123
lypinator	0:bb348c97df44	3124	/* Set the DMA error callback */
lypinator	0:bb348c97df44	3125	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
lypinator	0:bb348c97df44	3126
lypinator	0:bb348c97df44	3127	/* Set the unused DMA callbacks to NULL */
lypinator	0:bb348c97df44	3128	hi2c->hdmarx->XferHalfCpltCallback = NULL;
lypinator	0:bb348c97df44	3129	hi2c->hdmarx->XferM1CpltCallback = NULL;
lypinator	0:bb348c97df44	3130	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
lypinator	0:bb348c97df44	3131	hi2c->hdmarx->XferAbortCallback = NULL;
lypinator	0:bb348c97df44	3132
lypinator	0:bb348c97df44	3133	/* Enable the DMA Stream */
lypinator	0:bb348c97df44	3134	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
lypinator	0:bb348c97df44	3135
lypinator	0:bb348c97df44	3136	/* Send Slave Address and Memory Address */
lypinator	0:bb348c97df44	3137	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	3138	{
lypinator	0:bb348c97df44	3139	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	3140	{
lypinator	0:bb348c97df44	3141	/* Process Unlocked */
lypinator	0:bb348c97df44	3142	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3143	return HAL_ERROR;
lypinator	0:bb348c97df44	3144	}
lypinator	0:bb348c97df44	3145	else
lypinator	0:bb348c97df44	3146	{
lypinator	0:bb348c97df44	3147	/* Process Unlocked */
lypinator	0:bb348c97df44	3148	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3149	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	3150	}
lypinator	0:bb348c97df44	3151	}
lypinator	0:bb348c97df44	3152
lypinator	0:bb348c97df44	3153	if(Size == 1U)
lypinator	0:bb348c97df44	3154	{
lypinator	0:bb348c97df44	3155	/* Disable Acknowledge */
lypinator	0:bb348c97df44	3156	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	3157	}
lypinator	0:bb348c97df44	3158	else
lypinator	0:bb348c97df44	3159	{
lypinator	0:bb348c97df44	3160	/* Enable Last DMA bit */
lypinator	0:bb348c97df44	3161	hi2c->Instance->CR2 \|= I2C_CR2_LAST;
lypinator	0:bb348c97df44	3162	}
lypinator	0:bb348c97df44	3163
lypinator	0:bb348c97df44	3164	/* Clear ADDR flag */
lypinator	0:bb348c97df44	3165	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	3166
lypinator	0:bb348c97df44	3167	/* Process Unlocked */
lypinator	0:bb348c97df44	3168	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3169
lypinator	0:bb348c97df44	3170	/* Note : The I2C interrupts must be enabled after unlocking current process
lypinator	0:bb348c97df44	3171	to avoid the risk of I2C interrupt handle execution before current
lypinator	0:bb348c97df44	3172	process unlock */
lypinator	0:bb348c97df44	3173	/* Enable ERR interrupt */
lypinator	0:bb348c97df44	3174	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
lypinator	0:bb348c97df44	3175
lypinator	0:bb348c97df44	3176	/* Enable DMA Request */
lypinator	0:bb348c97df44	3177	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
lypinator	0:bb348c97df44	3178	}
lypinator	0:bb348c97df44	3179	else
lypinator	0:bb348c97df44	3180	{
lypinator	0:bb348c97df44	3181	/* Send Slave Address and Memory Address */
lypinator	0:bb348c97df44	3182	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	3183	{
lypinator	0:bb348c97df44	3184	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	3185	{
lypinator	0:bb348c97df44	3186	/* Process Unlocked */
lypinator	0:bb348c97df44	3187	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3188	return HAL_ERROR;
lypinator	0:bb348c97df44	3189	}
lypinator	0:bb348c97df44	3190	else
lypinator	0:bb348c97df44	3191	{
lypinator	0:bb348c97df44	3192	/* Process Unlocked */
lypinator	0:bb348c97df44	3193	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3194	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	3195	}
lypinator	0:bb348c97df44	3196	}
lypinator	0:bb348c97df44	3197
lypinator	0:bb348c97df44	3198	/* Clear ADDR flag */
lypinator	0:bb348c97df44	3199	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	3200
lypinator	0:bb348c97df44	3201	/* Generate Stop */
lypinator	0:bb348c97df44	3202	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	3203
lypinator	0:bb348c97df44	3204	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	3205
lypinator	0:bb348c97df44	3206	/* Process Unlocked */
lypinator	0:bb348c97df44	3207	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3208	}
lypinator	0:bb348c97df44	3209
lypinator	0:bb348c97df44	3210	return HAL_OK;
lypinator	0:bb348c97df44	3211	}
lypinator	0:bb348c97df44	3212	else
lypinator	0:bb348c97df44	3213	{
lypinator	0:bb348c97df44	3214	return HAL_BUSY;
lypinator	0:bb348c97df44	3215	}
lypinator	0:bb348c97df44	3216	}
lypinator	0:bb348c97df44	3217
lypinator	0:bb348c97df44	3218	/**
lypinator	0:bb348c97df44	3219	* @brief Checks if target device is ready for communication.
lypinator	0:bb348c97df44	3220	* @note This function is used with Memory devices
lypinator	0:bb348c97df44	3221	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3222	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3223	* @param DevAddress Target device address
lypinator	0:bb348c97df44	3224	* @param Trials Number of trials
lypinator	0:bb348c97df44	3225	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	3226	* @retval HAL status
lypinator	0:bb348c97df44	3227	*/
lypinator	0:bb348c97df44	3228	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
lypinator	0:bb348c97df44	3229	{
lypinator	0:bb348c97df44	3230	uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U;
lypinator	0:bb348c97df44	3231
lypinator	0:bb348c97df44	3232	/* Get tick */
lypinator	0:bb348c97df44	3233	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	3234
lypinator	0:bb348c97df44	3235	if(hi2c->State == HAL_I2C_STATE_READY)
lypinator	0:bb348c97df44	3236	{
lypinator	0:bb348c97df44	3237	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	3238	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	3239	{
lypinator	0:bb348c97df44	3240	return HAL_BUSY;
lypinator	0:bb348c97df44	3241	}
lypinator	0:bb348c97df44	3242
lypinator	0:bb348c97df44	3243	/* Process Locked */
lypinator	0:bb348c97df44	3244	__HAL_LOCK(hi2c);
lypinator	0:bb348c97df44	3245
lypinator	0:bb348c97df44	3246	/* Check if the I2C is already enabled */
lypinator	0:bb348c97df44	3247	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
lypinator	0:bb348c97df44	3248	{
lypinator	0:bb348c97df44	3249	/* Enable I2C peripheral */
lypinator	0:bb348c97df44	3250	__HAL_I2C_ENABLE(hi2c);
lypinator	0:bb348c97df44	3251	}
lypinator	0:bb348c97df44	3252
lypinator	0:bb348c97df44	3253	/* Disable Pos */
lypinator	0:bb348c97df44	3254	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	3255
lypinator	0:bb348c97df44	3256	hi2c->State = HAL_I2C_STATE_BUSY;
lypinator	0:bb348c97df44	3257	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	3258	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	3259
lypinator	0:bb348c97df44	3260	do
lypinator	0:bb348c97df44	3261	{
lypinator	0:bb348c97df44	3262	/* Generate Start */
lypinator	0:bb348c97df44	3263	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	3264
lypinator	0:bb348c97df44	3265	/* Wait until SB flag is set */
lypinator	0:bb348c97df44	3266	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	3267	{
lypinator	0:bb348c97df44	3268	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	3269	}
lypinator	0:bb348c97df44	3270
lypinator	0:bb348c97df44	3271	/* Send slave address */
lypinator	0:bb348c97df44	3272	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
lypinator	0:bb348c97df44	3273
lypinator	0:bb348c97df44	3274	/* Wait until ADDR or AF flag are set */
lypinator	0:bb348c97df44	3275	/* Get tick */
lypinator	0:bb348c97df44	3276	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	3277
lypinator	0:bb348c97df44	3278	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
lypinator	0:bb348c97df44	3279	tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
lypinator	0:bb348c97df44	3280	tmp3 = hi2c->State;
lypinator	0:bb348c97df44	3281	while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
lypinator	0:bb348c97df44	3282	{
lypinator	0:bb348c97df44	3283	if((Timeout == 0U)\|\|((HAL_GetTick() - tickstart ) > Timeout))
lypinator	0:bb348c97df44	3284	{
lypinator	0:bb348c97df44	3285	hi2c->State = HAL_I2C_STATE_TIMEOUT;
lypinator	0:bb348c97df44	3286	}
lypinator	0:bb348c97df44	3287	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
lypinator	0:bb348c97df44	3288	tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
lypinator	0:bb348c97df44	3289	tmp3 = hi2c->State;
lypinator	0:bb348c97df44	3290	}
lypinator	0:bb348c97df44	3291
lypinator	0:bb348c97df44	3292	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	3293
lypinator	0:bb348c97df44	3294	/* Check if the ADDR flag has been set */
lypinator	0:bb348c97df44	3295	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
lypinator	0:bb348c97df44	3296	{
lypinator	0:bb348c97df44	3297	/* Generate Stop */
lypinator	0:bb348c97df44	3298	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	3299
lypinator	0:bb348c97df44	3300	/* Clear ADDR Flag */
lypinator	0:bb348c97df44	3301	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	3302
lypinator	0:bb348c97df44	3303	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	3304	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	3305	{
lypinator	0:bb348c97df44	3306	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	3307	}
lypinator	0:bb348c97df44	3308
lypinator	0:bb348c97df44	3309	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	3310
lypinator	0:bb348c97df44	3311	/* Process Unlocked */
lypinator	0:bb348c97df44	3312	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3313
lypinator	0:bb348c97df44	3314	return HAL_OK;
lypinator	0:bb348c97df44	3315	}
lypinator	0:bb348c97df44	3316	else
lypinator	0:bb348c97df44	3317	{
lypinator	0:bb348c97df44	3318	/* Generate Stop */
lypinator	0:bb348c97df44	3319	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	3320
lypinator	0:bb348c97df44	3321	/* Clear AF Flag */
lypinator	0:bb348c97df44	3322	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
lypinator	0:bb348c97df44	3323
lypinator	0:bb348c97df44	3324	/* Wait until BUSY flag is reset */
lypinator	0:bb348c97df44	3325	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
lypinator	0:bb348c97df44	3326	{
lypinator	0:bb348c97df44	3327	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	3328	}
lypinator	0:bb348c97df44	3329	}
lypinator	0:bb348c97df44	3330	}while(I2C_Trials++ < Trials);
lypinator	0:bb348c97df44	3331
lypinator	0:bb348c97df44	3332	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	3333
lypinator	0:bb348c97df44	3334	/* Process Unlocked */
lypinator	0:bb348c97df44	3335	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	3336
lypinator	0:bb348c97df44	3337	return HAL_ERROR;
lypinator	0:bb348c97df44	3338	}
lypinator	0:bb348c97df44	3339	else
lypinator	0:bb348c97df44	3340	{
lypinator	0:bb348c97df44	3341	return HAL_BUSY;
lypinator	0:bb348c97df44	3342	}
lypinator	0:bb348c97df44	3343	}
lypinator	0:bb348c97df44	3344
lypinator	0:bb348c97df44	3345	/**
lypinator	0:bb348c97df44	3346	* @brief This function handles I2C event interrupt request.
lypinator	0:bb348c97df44	3347	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3348	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3349	* @retval None
lypinator	0:bb348c97df44	3350	*/
lypinator	0:bb348c97df44	3351	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3352	{
lypinator	0:bb348c97df44	3353	uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
lypinator	0:bb348c97df44	3354	uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
lypinator	0:bb348c97df44	3355	uint32_t itsources = READ_REG(hi2c->Instance->CR2);
lypinator	0:bb348c97df44	3356
lypinator	0:bb348c97df44	3357	uint32_t CurrentMode = hi2c->Mode;
lypinator	0:bb348c97df44	3358
lypinator	0:bb348c97df44	3359	/* Master or Memory mode selected */
lypinator	0:bb348c97df44	3360	if((CurrentMode == HAL_I2C_MODE_MASTER) \|\| (CurrentMode == HAL_I2C_MODE_MEM))
lypinator	0:bb348c97df44	3361	{
lypinator	0:bb348c97df44	3362	/* SB Set ----------------------------------------------------------------*/
lypinator	0:bb348c97df44	3363	if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
lypinator	0:bb348c97df44	3364	{
lypinator	0:bb348c97df44	3365	I2C_Master_SB(hi2c);
lypinator	0:bb348c97df44	3366	}
lypinator	0:bb348c97df44	3367	/* ADD10 Set -------------------------------------------------------------*/
lypinator	0:bb348c97df44	3368	else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
lypinator	0:bb348c97df44	3369	{
lypinator	0:bb348c97df44	3370	I2C_Master_ADD10(hi2c);
lypinator	0:bb348c97df44	3371	}
lypinator	0:bb348c97df44	3372	/* ADDR Set --------------------------------------------------------------*/
lypinator	0:bb348c97df44	3373	else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
lypinator	0:bb348c97df44	3374	{
lypinator	0:bb348c97df44	3375	I2C_Master_ADDR(hi2c);
lypinator	0:bb348c97df44	3376	}
lypinator	0:bb348c97df44	3377
lypinator	0:bb348c97df44	3378	/* I2C in mode Transmitter -----------------------------------------------*/
lypinator	0:bb348c97df44	3379	if((sr2itflags & I2C_FLAG_TRA) != RESET)
lypinator	0:bb348c97df44	3380	{
lypinator	0:bb348c97df44	3381	/* TXE set and BTF reset -----------------------------------------------*/
lypinator	0:bb348c97df44	3382	if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
lypinator	0:bb348c97df44	3383	{
lypinator	0:bb348c97df44	3384	I2C_MasterTransmit_TXE(hi2c);
lypinator	0:bb348c97df44	3385	}
lypinator	0:bb348c97df44	3386	/* BTF set -------------------------------------------------------------*/
lypinator	0:bb348c97df44	3387	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
lypinator	0:bb348c97df44	3388	{
lypinator	0:bb348c97df44	3389	I2C_MasterTransmit_BTF(hi2c);
lypinator	0:bb348c97df44	3390	}
lypinator	0:bb348c97df44	3391	}
lypinator	0:bb348c97df44	3392	/* I2C in mode Receiver --------------------------------------------------*/
lypinator	0:bb348c97df44	3393	else
lypinator	0:bb348c97df44	3394	{
lypinator	0:bb348c97df44	3395	/* RXNE set and BTF reset -----------------------------------------------*/
lypinator	0:bb348c97df44	3396	if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
lypinator	0:bb348c97df44	3397	{
lypinator	0:bb348c97df44	3398	I2C_MasterReceive_RXNE(hi2c);
lypinator	0:bb348c97df44	3399	}
lypinator	0:bb348c97df44	3400	/* BTF set -------------------------------------------------------------*/
lypinator	0:bb348c97df44	3401	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
lypinator	0:bb348c97df44	3402	{
lypinator	0:bb348c97df44	3403	I2C_MasterReceive_BTF(hi2c);
lypinator	0:bb348c97df44	3404	}
lypinator	0:bb348c97df44	3405	}
lypinator	0:bb348c97df44	3406	}
lypinator	0:bb348c97df44	3407	/* Slave mode selected */
lypinator	0:bb348c97df44	3408	else
lypinator	0:bb348c97df44	3409	{
lypinator	0:bb348c97df44	3410	/* ADDR set --------------------------------------------------------------*/
lypinator	0:bb348c97df44	3411	if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
lypinator	0:bb348c97df44	3412	{
lypinator	0:bb348c97df44	3413	I2C_Slave_ADDR(hi2c);
lypinator	0:bb348c97df44	3414	}
lypinator	0:bb348c97df44	3415	/* STOPF set --------------------------------------------------------------*/
lypinator	0:bb348c97df44	3416	else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
lypinator	0:bb348c97df44	3417	{
lypinator	0:bb348c97df44	3418	I2C_Slave_STOPF(hi2c);
lypinator	0:bb348c97df44	3419	}
lypinator	0:bb348c97df44	3420	/* I2C in mode Transmitter -----------------------------------------------*/
lypinator	0:bb348c97df44	3421	else if((sr2itflags & I2C_FLAG_TRA) != RESET)
lypinator	0:bb348c97df44	3422	{
lypinator	0:bb348c97df44	3423	/* TXE set and BTF reset -----------------------------------------------*/
lypinator	0:bb348c97df44	3424	if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
lypinator	0:bb348c97df44	3425	{
lypinator	0:bb348c97df44	3426	I2C_SlaveTransmit_TXE(hi2c);
lypinator	0:bb348c97df44	3427	}
lypinator	0:bb348c97df44	3428	/* BTF set -------------------------------------------------------------*/
lypinator	0:bb348c97df44	3429	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
lypinator	0:bb348c97df44	3430	{
lypinator	0:bb348c97df44	3431	I2C_SlaveTransmit_BTF(hi2c);
lypinator	0:bb348c97df44	3432	}
lypinator	0:bb348c97df44	3433	}
lypinator	0:bb348c97df44	3434	/* I2C in mode Receiver --------------------------------------------------*/
lypinator	0:bb348c97df44	3435	else
lypinator	0:bb348c97df44	3436	{
lypinator	0:bb348c97df44	3437	/* RXNE set and BTF reset ----------------------------------------------*/
lypinator	0:bb348c97df44	3438	if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
lypinator	0:bb348c97df44	3439	{
lypinator	0:bb348c97df44	3440	I2C_SlaveReceive_RXNE(hi2c);
lypinator	0:bb348c97df44	3441	}
lypinator	0:bb348c97df44	3442	/* BTF set -------------------------------------------------------------*/
lypinator	0:bb348c97df44	3443	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
lypinator	0:bb348c97df44	3444	{
lypinator	0:bb348c97df44	3445	I2C_SlaveReceive_BTF(hi2c);
lypinator	0:bb348c97df44	3446	}
lypinator	0:bb348c97df44	3447	}
lypinator	0:bb348c97df44	3448	}
lypinator	0:bb348c97df44	3449	}
lypinator	0:bb348c97df44	3450
lypinator	0:bb348c97df44	3451	/**
lypinator	0:bb348c97df44	3452	* @brief This function handles I2C error interrupt request.
lypinator	0:bb348c97df44	3453	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3454	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3455	* @retval None
lypinator	0:bb348c97df44	3456	*/
lypinator	0:bb348c97df44	3457	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3458	{
lypinator	0:bb348c97df44	3459	uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U;
lypinator	0:bb348c97df44	3460	uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
lypinator	0:bb348c97df44	3461	uint32_t itsources = READ_REG(hi2c->Instance->CR2);
lypinator	0:bb348c97df44	3462
lypinator	0:bb348c97df44	3463	/* I2C Bus error interrupt occurred ----------------------------------------*/
lypinator	0:bb348c97df44	3464	if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
lypinator	0:bb348c97df44	3465	{
lypinator	0:bb348c97df44	3466	hi2c->ErrorCode \|= HAL_I2C_ERROR_BERR;
lypinator	0:bb348c97df44	3467
lypinator	0:bb348c97df44	3468	/* Clear BERR flag */
lypinator	0:bb348c97df44	3469	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
lypinator	0:bb348c97df44	3470	}
lypinator	0:bb348c97df44	3471
lypinator	0:bb348c97df44	3472	/* I2C Arbitration Loss error interrupt occurred ---------------------------*/
lypinator	0:bb348c97df44	3473	if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
lypinator	0:bb348c97df44	3474	{
lypinator	0:bb348c97df44	3475	hi2c->ErrorCode \|= HAL_I2C_ERROR_ARLO;
lypinator	0:bb348c97df44	3476
lypinator	0:bb348c97df44	3477	/* Clear ARLO flag */
lypinator	0:bb348c97df44	3478	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
lypinator	0:bb348c97df44	3479	}
lypinator	0:bb348c97df44	3480
lypinator	0:bb348c97df44	3481	/* I2C Acknowledge failure error interrupt occurred ------------------------*/
lypinator	0:bb348c97df44	3482	if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
lypinator	0:bb348c97df44	3483	{
lypinator	0:bb348c97df44	3484	tmp1 = hi2c->Mode;
lypinator	0:bb348c97df44	3485	tmp2 = hi2c->XferCount;
lypinator	0:bb348c97df44	3486	tmp3 = hi2c->State;
lypinator	0:bb348c97df44	3487	tmp4 = hi2c->PreviousState;
lypinator	0:bb348c97df44	3488	if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
lypinator	0:bb348c97df44	3489	((tmp3 == HAL_I2C_STATE_BUSY_TX) \|\| (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) \|\| \
lypinator	0:bb348c97df44	3490	((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
lypinator	0:bb348c97df44	3491	{
lypinator	0:bb348c97df44	3492	I2C_Slave_AF(hi2c);
lypinator	0:bb348c97df44	3493	}
lypinator	0:bb348c97df44	3494	else
lypinator	0:bb348c97df44	3495	{
lypinator	0:bb348c97df44	3496	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
lypinator	0:bb348c97df44	3497
lypinator	0:bb348c97df44	3498	/* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
lypinator	0:bb348c97df44	3499	if(hi2c->Mode == HAL_I2C_MODE_MASTER)
lypinator	0:bb348c97df44	3500	{
lypinator	0:bb348c97df44	3501	/* Generate Stop */
lypinator	0:bb348c97df44	3502	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
lypinator	0:bb348c97df44	3503	}
lypinator	0:bb348c97df44	3504
lypinator	0:bb348c97df44	3505	/* Clear AF flag */
lypinator	0:bb348c97df44	3506	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
lypinator	0:bb348c97df44	3507	}
lypinator	0:bb348c97df44	3508	}
lypinator	0:bb348c97df44	3509
lypinator	0:bb348c97df44	3510	/* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
lypinator	0:bb348c97df44	3511	if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
lypinator	0:bb348c97df44	3512	{
lypinator	0:bb348c97df44	3513	hi2c->ErrorCode \|= HAL_I2C_ERROR_OVR;
lypinator	0:bb348c97df44	3514	/* Clear OVR flag */
lypinator	0:bb348c97df44	3515	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
lypinator	0:bb348c97df44	3516	}
lypinator	0:bb348c97df44	3517
lypinator	0:bb348c97df44	3518	/* Call the Error Callback in case of Error detected -----------------------*/
lypinator	0:bb348c97df44	3519	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
lypinator	0:bb348c97df44	3520	{
lypinator	0:bb348c97df44	3521	I2C_ITError(hi2c);
lypinator	0:bb348c97df44	3522	}
lypinator	0:bb348c97df44	3523	}
lypinator	0:bb348c97df44	3524
lypinator	0:bb348c97df44	3525	/**
lypinator	0:bb348c97df44	3526	* @brief Master Tx Transfer completed callback.
lypinator	0:bb348c97df44	3527	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3528	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3529	* @retval None
lypinator	0:bb348c97df44	3530	*/
lypinator	0:bb348c97df44	3531	__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3532	{
lypinator	0:bb348c97df44	3533	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3534	UNUSED(hi2c);
lypinator	0:bb348c97df44	3535
lypinator	0:bb348c97df44	3536	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3537	the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
lypinator	0:bb348c97df44	3538	*/
lypinator	0:bb348c97df44	3539	}
lypinator	0:bb348c97df44	3540
lypinator	0:bb348c97df44	3541	/**
lypinator	0:bb348c97df44	3542	* @brief Master Rx Transfer completed callback.
lypinator	0:bb348c97df44	3543	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3544	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3545	* @retval None
lypinator	0:bb348c97df44	3546	*/
lypinator	0:bb348c97df44	3547	__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3548	{
lypinator	0:bb348c97df44	3549	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3550	UNUSED(hi2c);
lypinator	0:bb348c97df44	3551
lypinator	0:bb348c97df44	3552	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3553	the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
lypinator	0:bb348c97df44	3554	*/
lypinator	0:bb348c97df44	3555	}
lypinator	0:bb348c97df44	3556
lypinator	0:bb348c97df44	3557	/** @brief Slave Tx Transfer completed callback.
lypinator	0:bb348c97df44	3558	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3559	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3560	* @retval None
lypinator	0:bb348c97df44	3561	*/
lypinator	0:bb348c97df44	3562	__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3563	{
lypinator	0:bb348c97df44	3564	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3565	UNUSED(hi2c);
lypinator	0:bb348c97df44	3566
lypinator	0:bb348c97df44	3567	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3568	the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
lypinator	0:bb348c97df44	3569	*/
lypinator	0:bb348c97df44	3570	}
lypinator	0:bb348c97df44	3571
lypinator	0:bb348c97df44	3572	/**
lypinator	0:bb348c97df44	3573	* @brief Slave Rx Transfer completed callback.
lypinator	0:bb348c97df44	3574	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3575	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3576	* @retval None
lypinator	0:bb348c97df44	3577	*/
lypinator	0:bb348c97df44	3578	__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3579	{
lypinator	0:bb348c97df44	3580	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3581	UNUSED(hi2c);
lypinator	0:bb348c97df44	3582
lypinator	0:bb348c97df44	3583	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3584	the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
lypinator	0:bb348c97df44	3585	*/
lypinator	0:bb348c97df44	3586	}
lypinator	0:bb348c97df44	3587
lypinator	0:bb348c97df44	3588	/**
lypinator	0:bb348c97df44	3589	* @brief Slave Address Match callback.
lypinator	0:bb348c97df44	3590	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3591	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3592	* @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition
lypinator	0:bb348c97df44	3593	* @param AddrMatchCode Address Match Code
lypinator	0:bb348c97df44	3594	* @retval None
lypinator	0:bb348c97df44	3595	*/
lypinator	0:bb348c97df44	3596	__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
lypinator	0:bb348c97df44	3597	{
lypinator	0:bb348c97df44	3598	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3599	UNUSED(hi2c);
lypinator	0:bb348c97df44	3600	UNUSED(TransferDirection);
lypinator	0:bb348c97df44	3601	UNUSED(AddrMatchCode);
lypinator	0:bb348c97df44	3602
lypinator	0:bb348c97df44	3603	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3604	the HAL_I2C_AddrCallback can be implemented in the user file
lypinator	0:bb348c97df44	3605	*/
lypinator	0:bb348c97df44	3606	}
lypinator	0:bb348c97df44	3607
lypinator	0:bb348c97df44	3608	/**
lypinator	0:bb348c97df44	3609	* @brief Listen Complete callback.
lypinator	0:bb348c97df44	3610	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3611	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3612	* @retval None
lypinator	0:bb348c97df44	3613	*/
lypinator	0:bb348c97df44	3614	__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3615	{
lypinator	0:bb348c97df44	3616	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3617	UNUSED(hi2c);
lypinator	0:bb348c97df44	3618
lypinator	0:bb348c97df44	3619	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3620	the HAL_I2C_ListenCpltCallback can be implemented in the user file
lypinator	0:bb348c97df44	3621	*/
lypinator	0:bb348c97df44	3622	}
lypinator	0:bb348c97df44	3623
lypinator	0:bb348c97df44	3624	/**
lypinator	0:bb348c97df44	3625	* @brief Memory Tx Transfer completed callback.
lypinator	0:bb348c97df44	3626	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3627	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3628	* @retval None
lypinator	0:bb348c97df44	3629	*/
lypinator	0:bb348c97df44	3630	__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3631	{
lypinator	0:bb348c97df44	3632	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3633	UNUSED(hi2c);
lypinator	0:bb348c97df44	3634
lypinator	0:bb348c97df44	3635	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3636	the HAL_I2C_MemTxCpltCallback can be implemented in the user file
lypinator	0:bb348c97df44	3637	*/
lypinator	0:bb348c97df44	3638	}
lypinator	0:bb348c97df44	3639
lypinator	0:bb348c97df44	3640	/**
lypinator	0:bb348c97df44	3641	* @brief Memory Rx Transfer completed callback.
lypinator	0:bb348c97df44	3642	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3643	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3644	* @retval None
lypinator	0:bb348c97df44	3645	*/
lypinator	0:bb348c97df44	3646	__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3647	{
lypinator	0:bb348c97df44	3648	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3649	UNUSED(hi2c);
lypinator	0:bb348c97df44	3650
lypinator	0:bb348c97df44	3651	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3652	the HAL_I2C_MemRxCpltCallback can be implemented in the user file
lypinator	0:bb348c97df44	3653	*/
lypinator	0:bb348c97df44	3654	}
lypinator	0:bb348c97df44	3655
lypinator	0:bb348c97df44	3656	/**
lypinator	0:bb348c97df44	3657	* @brief I2C error callback.
lypinator	0:bb348c97df44	3658	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3659	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3660	* @retval None
lypinator	0:bb348c97df44	3661	*/
lypinator	0:bb348c97df44	3662	__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3663	{
lypinator	0:bb348c97df44	3664	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3665	UNUSED(hi2c);
lypinator	0:bb348c97df44	3666
lypinator	0:bb348c97df44	3667	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3668	the HAL_I2C_ErrorCallback can be implemented in the user file
lypinator	0:bb348c97df44	3669	*/
lypinator	0:bb348c97df44	3670	}
lypinator	0:bb348c97df44	3671
lypinator	0:bb348c97df44	3672	/**
lypinator	0:bb348c97df44	3673	* @brief I2C abort callback.
lypinator	0:bb348c97df44	3674	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3675	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3676	* @retval None
lypinator	0:bb348c97df44	3677	*/
lypinator	0:bb348c97df44	3678	__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3679	{
lypinator	0:bb348c97df44	3680	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3681	UNUSED(hi2c);
lypinator	0:bb348c97df44	3682
lypinator	0:bb348c97df44	3683	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3684	the HAL_I2C_AbortCpltCallback could be implemented in the user file
lypinator	0:bb348c97df44	3685	*/
lypinator	0:bb348c97df44	3686	}
lypinator	0:bb348c97df44	3687
lypinator	0:bb348c97df44	3688	/**
lypinator	0:bb348c97df44	3689	* @}
lypinator	0:bb348c97df44	3690	*/
lypinator	0:bb348c97df44	3691
lypinator	0:bb348c97df44	3692	/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
lypinator	0:bb348c97df44	3693	* @brief Peripheral State and Errors functions
lypinator	0:bb348c97df44	3694	*
lypinator	0:bb348c97df44	3695	@verbatim
lypinator	0:bb348c97df44	3696	===============================================================================
lypinator	0:bb348c97df44	3697	##### Peripheral State, Mode and Error functions #####
lypinator	0:bb348c97df44	3698	===============================================================================
lypinator	0:bb348c97df44	3699	[..]
lypinator	0:bb348c97df44	3700	This subsection permits to get in run-time the status of the peripheral
lypinator	0:bb348c97df44	3701	and the data flow.
lypinator	0:bb348c97df44	3702
lypinator	0:bb348c97df44	3703	@endverbatim
lypinator	0:bb348c97df44	3704	* @{
lypinator	0:bb348c97df44	3705	*/
lypinator	0:bb348c97df44	3706
lypinator	0:bb348c97df44	3707	/**
lypinator	0:bb348c97df44	3708	* @brief Return the I2C handle state.
lypinator	0:bb348c97df44	3709	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3710	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3711	* @retval HAL state
lypinator	0:bb348c97df44	3712	*/
lypinator	0:bb348c97df44	3713	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3714	{
lypinator	0:bb348c97df44	3715	/* Return I2C handle state */
lypinator	0:bb348c97df44	3716	return hi2c->State;
lypinator	0:bb348c97df44	3717	}
lypinator	0:bb348c97df44	3718
lypinator	0:bb348c97df44	3719	/**
lypinator	0:bb348c97df44	3720	* @brief Return the I2C Master, Slave, Memory or no mode.
lypinator	0:bb348c97df44	3721	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3722	* the configuration information for I2C module
lypinator	0:bb348c97df44	3723	* @retval HAL mode
lypinator	0:bb348c97df44	3724	*/
lypinator	0:bb348c97df44	3725	HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3726	{
lypinator	0:bb348c97df44	3727	return hi2c->Mode;
lypinator	0:bb348c97df44	3728	}
lypinator	0:bb348c97df44	3729
lypinator	0:bb348c97df44	3730	/**
lypinator	0:bb348c97df44	3731	* @brief Return the I2C error code
lypinator	0:bb348c97df44	3732	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3733	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	3734	* @retval I2C Error Code
lypinator	0:bb348c97df44	3735	*/
lypinator	0:bb348c97df44	3736	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3737	{
lypinator	0:bb348c97df44	3738	return hi2c->ErrorCode;
lypinator	0:bb348c97df44	3739	}
lypinator	0:bb348c97df44	3740
lypinator	0:bb348c97df44	3741	/**
lypinator	0:bb348c97df44	3742	* @}
lypinator	0:bb348c97df44	3743	*/
lypinator	0:bb348c97df44	3744
lypinator	0:bb348c97df44	3745	/**
lypinator	0:bb348c97df44	3746	* @brief Handle TXE flag for Master
lypinator	0:bb348c97df44	3747	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3748	* the configuration information for I2C module
lypinator	0:bb348c97df44	3749	* @retval HAL status
lypinator	0:bb348c97df44	3750	*/
lypinator	0:bb348c97df44	3751	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3752	{
lypinator	0:bb348c97df44	3753	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	3754	uint32_t CurrentState = hi2c->State;
lypinator	0:bb348c97df44	3755	uint32_t CurrentMode = hi2c->Mode;
lypinator	0:bb348c97df44	3756	uint32_t CurrentXferOptions = hi2c->XferOptions;
lypinator	0:bb348c97df44	3757
lypinator	0:bb348c97df44	3758	if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
lypinator	0:bb348c97df44	3759	{
lypinator	0:bb348c97df44	3760	/* Call TxCpltCallback() directly if no stop mode is set */
lypinator	0:bb348c97df44	3761	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
lypinator	0:bb348c97df44	3762	{
lypinator	0:bb348c97df44	3763	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	3764
lypinator	0:bb348c97df44	3765	hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
lypinator	0:bb348c97df44	3766	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	3767	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	3768
lypinator	0:bb348c97df44	3769	HAL_I2C_MasterTxCpltCallback(hi2c);
lypinator	0:bb348c97df44	3770	}
lypinator	0:bb348c97df44	3771	else /* Generate Stop condition then Call TxCpltCallback() */
lypinator	0:bb348c97df44	3772	{
lypinator	0:bb348c97df44	3773	/* Disable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	3774	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	3775
lypinator	0:bb348c97df44	3776	/* Generate Stop */
lypinator	0:bb348c97df44	3777	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	3778
lypinator	0:bb348c97df44	3779	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	3780	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	3781
lypinator	0:bb348c97df44	3782	if(hi2c->Mode == HAL_I2C_MODE_MEM)
lypinator	0:bb348c97df44	3783	{
lypinator	0:bb348c97df44	3784	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	3785	HAL_I2C_MemTxCpltCallback(hi2c);
lypinator	0:bb348c97df44	3786	}
lypinator	0:bb348c97df44	3787	else
lypinator	0:bb348c97df44	3788	{
lypinator	0:bb348c97df44	3789	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	3790	HAL_I2C_MasterTxCpltCallback(hi2c);
lypinator	0:bb348c97df44	3791	}
lypinator	0:bb348c97df44	3792	}
lypinator	0:bb348c97df44	3793	}
lypinator	0:bb348c97df44	3794	else if((CurrentState == HAL_I2C_STATE_BUSY_TX) \|\| \
lypinator	0:bb348c97df44	3795	((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
lypinator	0:bb348c97df44	3796	{
lypinator	0:bb348c97df44	3797	if(hi2c->XferCount == 0U)
lypinator	0:bb348c97df44	3798	{
lypinator	0:bb348c97df44	3799	/* Disable BUF interrupt */
lypinator	0:bb348c97df44	3800	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
lypinator	0:bb348c97df44	3801	}
lypinator	0:bb348c97df44	3802	else
lypinator	0:bb348c97df44	3803	{
lypinator	0:bb348c97df44	3804	if(hi2c->Mode == HAL_I2C_MODE_MEM)
lypinator	0:bb348c97df44	3805	{
lypinator	0:bb348c97df44	3806	if(hi2c->EventCount == 0)
lypinator	0:bb348c97df44	3807	{
lypinator	0:bb348c97df44	3808	/* If Memory address size is 8Bit */
lypinator	0:bb348c97df44	3809	if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
lypinator	0:bb348c97df44	3810	{
lypinator	0:bb348c97df44	3811	/* Send Memory Address */
lypinator	0:bb348c97df44	3812	hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
lypinator	0:bb348c97df44	3813
lypinator	0:bb348c97df44	3814	hi2c->EventCount += 2;
lypinator	0:bb348c97df44	3815	}
lypinator	0:bb348c97df44	3816	/* If Memory address size is 16Bit */
lypinator	0:bb348c97df44	3817	else
lypinator	0:bb348c97df44	3818	{
lypinator	0:bb348c97df44	3819	/* Send MSB of Memory Address */
lypinator	0:bb348c97df44	3820	hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
lypinator	0:bb348c97df44	3821
lypinator	0:bb348c97df44	3822	hi2c->EventCount++;
lypinator	0:bb348c97df44	3823	}
lypinator	0:bb348c97df44	3824	}
lypinator	0:bb348c97df44	3825	else if(hi2c->EventCount == 1)
lypinator	0:bb348c97df44	3826	{
lypinator	0:bb348c97df44	3827	/* Send LSB of Memory Address */
lypinator	0:bb348c97df44	3828	hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
lypinator	0:bb348c97df44	3829
lypinator	0:bb348c97df44	3830	hi2c->EventCount++;
lypinator	0:bb348c97df44	3831	}
lypinator	0:bb348c97df44	3832	else if(hi2c->EventCount == 2)
lypinator	0:bb348c97df44	3833	{
lypinator	0:bb348c97df44	3834	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
lypinator	0:bb348c97df44	3835	{
lypinator	0:bb348c97df44	3836	/* Generate Restart */
lypinator	0:bb348c97df44	3837	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	3838	}
lypinator	0:bb348c97df44	3839	else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
lypinator	0:bb348c97df44	3840	{
lypinator	0:bb348c97df44	3841	/* Write data to DR */
lypinator	0:bb348c97df44	3842	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
lypinator	0:bb348c97df44	3843	hi2c->XferCount--;
lypinator	0:bb348c97df44	3844	}
lypinator	0:bb348c97df44	3845	}
lypinator	0:bb348c97df44	3846	}
lypinator	0:bb348c97df44	3847	else
lypinator	0:bb348c97df44	3848	{
lypinator	0:bb348c97df44	3849	/* Write data to DR */
lypinator	0:bb348c97df44	3850	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
lypinator	0:bb348c97df44	3851	hi2c->XferCount--;
lypinator	0:bb348c97df44	3852	}
lypinator	0:bb348c97df44	3853	}
lypinator	0:bb348c97df44	3854	}
lypinator	0:bb348c97df44	3855	return HAL_OK;
lypinator	0:bb348c97df44	3856	}
lypinator	0:bb348c97df44	3857
lypinator	0:bb348c97df44	3858	/**
lypinator	0:bb348c97df44	3859	* @brief Handle BTF flag for Master transmitter
lypinator	0:bb348c97df44	3860	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3861	* the configuration information for I2C module
lypinator	0:bb348c97df44	3862	* @retval HAL status
lypinator	0:bb348c97df44	3863	*/
lypinator	0:bb348c97df44	3864	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3865	{
lypinator	0:bb348c97df44	3866	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	3867	uint32_t CurrentXferOptions = hi2c->XferOptions;
lypinator	0:bb348c97df44	3868
lypinator	0:bb348c97df44	3869	if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
lypinator	0:bb348c97df44	3870	{
lypinator	0:bb348c97df44	3871	if(hi2c->XferCount != 0U)
lypinator	0:bb348c97df44	3872	{
lypinator	0:bb348c97df44	3873	/* Write data to DR */
lypinator	0:bb348c97df44	3874	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
lypinator	0:bb348c97df44	3875	hi2c->XferCount--;
lypinator	0:bb348c97df44	3876	}
lypinator	0:bb348c97df44	3877	else
lypinator	0:bb348c97df44	3878	{
lypinator	0:bb348c97df44	3879	/* Call TxCpltCallback() directly if no stop mode is set */
lypinator	0:bb348c97df44	3880	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
lypinator	0:bb348c97df44	3881	{
lypinator	0:bb348c97df44	3882	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	3883
lypinator	0:bb348c97df44	3884	hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
lypinator	0:bb348c97df44	3885	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	3886	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	3887
lypinator	0:bb348c97df44	3888	HAL_I2C_MasterTxCpltCallback(hi2c);
lypinator	0:bb348c97df44	3889	}
lypinator	0:bb348c97df44	3890	else /* Generate Stop condition then Call TxCpltCallback() */
lypinator	0:bb348c97df44	3891	{
lypinator	0:bb348c97df44	3892	/* Disable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	3893	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	3894
lypinator	0:bb348c97df44	3895	/* Generate Stop */
lypinator	0:bb348c97df44	3896	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	3897
lypinator	0:bb348c97df44	3898	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	3899	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	3900
lypinator	0:bb348c97df44	3901	if(hi2c->Mode == HAL_I2C_MODE_MEM)
lypinator	0:bb348c97df44	3902	{
lypinator	0:bb348c97df44	3903	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	3904
lypinator	0:bb348c97df44	3905	HAL_I2C_MemTxCpltCallback(hi2c);
lypinator	0:bb348c97df44	3906	}
lypinator	0:bb348c97df44	3907	else
lypinator	0:bb348c97df44	3908	{
lypinator	0:bb348c97df44	3909	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	3910
lypinator	0:bb348c97df44	3911	HAL_I2C_MasterTxCpltCallback(hi2c);
lypinator	0:bb348c97df44	3912	}
lypinator	0:bb348c97df44	3913	}
lypinator	0:bb348c97df44	3914	}
lypinator	0:bb348c97df44	3915	}
lypinator	0:bb348c97df44	3916	return HAL_OK;
lypinator	0:bb348c97df44	3917	}
lypinator	0:bb348c97df44	3918
lypinator	0:bb348c97df44	3919	/**
lypinator	0:bb348c97df44	3920	* @brief Handle RXNE flag for Master
lypinator	0:bb348c97df44	3921	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3922	* the configuration information for I2C module
lypinator	0:bb348c97df44	3923	* @retval HAL status
lypinator	0:bb348c97df44	3924	*/
lypinator	0:bb348c97df44	3925	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3926	{
lypinator	0:bb348c97df44	3927
lypinator	0:bb348c97df44	3928	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
lypinator	0:bb348c97df44	3929	{
lypinator	0:bb348c97df44	3930	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	3931
lypinator	0:bb348c97df44	3932	tmp = hi2c->XferCount;
lypinator	0:bb348c97df44	3933	if(tmp > 3U)
lypinator	0:bb348c97df44	3934	{
lypinator	0:bb348c97df44	3935	/* Read data from DR */
lypinator	0:bb348c97df44	3936	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	3937	hi2c->XferCount--;
lypinator	0:bb348c97df44	3938	/* MBED */
lypinator	0:bb348c97df44	3939	}
lypinator	0:bb348c97df44	3940	else if((tmp == 2U) \|\| (tmp == 3U))
lypinator	0:bb348c97df44	3941	{
lypinator	0:bb348c97df44	3942	/* Disable Acknowledge */
lypinator	0:bb348c97df44	3943	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	3944
lypinator	0:bb348c97df44	3945	/* Enable Pos */
lypinator	0:bb348c97df44	3946	hi2c->Instance->CR1 \|= I2C_CR1_POS;
lypinator	0:bb348c97df44	3947
lypinator	0:bb348c97df44	3948	/* Disable BUF interrupt */
lypinator	0:bb348c97df44	3949	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
lypinator	0:bb348c97df44	3950	}
lypinator	0:bb348c97df44	3951	else
lypinator	0:bb348c97df44	3952	{
lypinator	0:bb348c97df44	3953	/* Disable Acknowledge */
lypinator	0:bb348c97df44	3954	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	3955
lypinator	0:bb348c97df44	3956	if(hi2c->XferOptions == I2C_NEXT_FRAME)
lypinator	0:bb348c97df44	3957	{
lypinator	0:bb348c97df44	3958	/* Enable Pos */
lypinator	0:bb348c97df44	3959	hi2c->Instance->CR1 \|= I2C_CR1_POS;
lypinator	0:bb348c97df44	3960	}
lypinator	0:bb348c97df44	3961	/* MBED */
lypinator	0:bb348c97df44	3962
lypinator	0:bb348c97df44	3963	/* Disable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	3964	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	3965
lypinator	0:bb348c97df44	3966	/* Read data from DR */
lypinator	0:bb348c97df44	3967	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	3968	hi2c->XferCount--;
lypinator	0:bb348c97df44	3969
lypinator	0:bb348c97df44	3970	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	3971	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	3972
lypinator	0:bb348c97df44	3973	if(hi2c->Mode == HAL_I2C_MODE_MEM)
lypinator	0:bb348c97df44	3974	{
lypinator	0:bb348c97df44	3975	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	3976	HAL_I2C_MemRxCpltCallback(hi2c);
lypinator	0:bb348c97df44	3977	}
lypinator	0:bb348c97df44	3978	else
lypinator	0:bb348c97df44	3979	{
lypinator	0:bb348c97df44	3980	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	3981	HAL_I2C_MasterRxCpltCallback(hi2c);
lypinator	0:bb348c97df44	3982	}
lypinator	0:bb348c97df44	3983	}
lypinator	0:bb348c97df44	3984	}
lypinator	0:bb348c97df44	3985	return HAL_OK;
lypinator	0:bb348c97df44	3986	}
lypinator	0:bb348c97df44	3987
lypinator	0:bb348c97df44	3988	/**
lypinator	0:bb348c97df44	3989	* @brief Handle BTF flag for Master receiver
lypinator	0:bb348c97df44	3990	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	3991	* the configuration information for I2C module
lypinator	0:bb348c97df44	3992	* @retval HAL status
lypinator	0:bb348c97df44	3993	*/
lypinator	0:bb348c97df44	3994	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	3995	{
lypinator	0:bb348c97df44	3996	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	3997	uint32_t CurrentXferOptions = hi2c->XferOptions;
lypinator	0:bb348c97df44	3998
lypinator	0:bb348c97df44	3999	/* MBED */
lypinator	0:bb348c97df44	4000	if(hi2c->XferCount == 3U)
lypinator	0:bb348c97df44	4001	{
lypinator	0:bb348c97df44	4002	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_LAST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
lypinator	0:bb348c97df44	4003	{
lypinator	0:bb348c97df44	4004	/* Disable Acknowledge */
lypinator	0:bb348c97df44	4005	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	4006	}
lypinator	0:bb348c97df44	4007	/* MBED */
lypinator	0:bb348c97df44	4008
lypinator	0:bb348c97df44	4009	/* Read data from DR */
lypinator	0:bb348c97df44	4010	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	4011	hi2c->XferCount--;
lypinator	0:bb348c97df44	4012	}
lypinator	0:bb348c97df44	4013	else if(hi2c->XferCount == 2U)
lypinator	0:bb348c97df44	4014	{
lypinator	0:bb348c97df44	4015	/* Prepare next transfer or stop current transfer */
lypinator	0:bb348c97df44	4016	/* MBED */
lypinator	0:bb348c97df44	4017	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
lypinator	0:bb348c97df44	4018	{
lypinator	0:bb348c97df44	4019	/* Disable Acknowledge */
lypinator	0:bb348c97df44	4020	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	4021
lypinator	0:bb348c97df44	4022	if((CurrentXferOptions == I2C_NEXT_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME))
lypinator	0:bb348c97df44	4023	{
lypinator	0:bb348c97df44	4024	/* Generate ReStart */
lypinator	0:bb348c97df44	4025	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	4026	}
lypinator	0:bb348c97df44	4027	/* MBED */
lypinator	0:bb348c97df44	4028	}
lypinator	0:bb348c97df44	4029	else
lypinator	0:bb348c97df44	4030	{
lypinator	0:bb348c97df44	4031	/* Generate Stop */
lypinator	0:bb348c97df44	4032	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	4033	}
lypinator	0:bb348c97df44	4034
lypinator	0:bb348c97df44	4035	/* Read data from DR */
lypinator	0:bb348c97df44	4036	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	4037	hi2c->XferCount--;
lypinator	0:bb348c97df44	4038
lypinator	0:bb348c97df44	4039	/* Read data from DR */
lypinator	0:bb348c97df44	4040	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	4041	hi2c->XferCount--;
lypinator	0:bb348c97df44	4042
lypinator	0:bb348c97df44	4043	/* Disable EVT and ERR interrupt */
lypinator	0:bb348c97df44	4044	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
lypinator	0:bb348c97df44	4045
lypinator	0:bb348c97df44	4046	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	4047	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	4048
lypinator	0:bb348c97df44	4049	if(hi2c->Mode == HAL_I2C_MODE_MEM)
lypinator	0:bb348c97df44	4050	{
lypinator	0:bb348c97df44	4051	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	4052
lypinator	0:bb348c97df44	4053	HAL_I2C_MemRxCpltCallback(hi2c);
lypinator	0:bb348c97df44	4054	}
lypinator	0:bb348c97df44	4055	else
lypinator	0:bb348c97df44	4056	{
lypinator	0:bb348c97df44	4057	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	4058
lypinator	0:bb348c97df44	4059	HAL_I2C_MasterRxCpltCallback(hi2c);
lypinator	0:bb348c97df44	4060	}
lypinator	0:bb348c97df44	4061	}
lypinator	0:bb348c97df44	4062	else
lypinator	0:bb348c97df44	4063	{
lypinator	0:bb348c97df44	4064	/* Read data from DR */
lypinator	0:bb348c97df44	4065	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	4066	hi2c->XferCount--;
lypinator	0:bb348c97df44	4067	}
lypinator	0:bb348c97df44	4068	return HAL_OK;
lypinator	0:bb348c97df44	4069	}
lypinator	0:bb348c97df44	4070
lypinator	0:bb348c97df44	4071	/**
lypinator	0:bb348c97df44	4072	* @brief Handle SB flag for Master
lypinator	0:bb348c97df44	4073	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4074	* the configuration information for I2C module
lypinator	0:bb348c97df44	4075	* @retval HAL status
lypinator	0:bb348c97df44	4076	*/
lypinator	0:bb348c97df44	4077	static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	4078	{
lypinator	0:bb348c97df44	4079	if(hi2c->Mode == HAL_I2C_MODE_MEM)
lypinator	0:bb348c97df44	4080	{
lypinator	0:bb348c97df44	4081	if(hi2c->EventCount == 0U)
lypinator	0:bb348c97df44	4082	{
lypinator	0:bb348c97df44	4083	/* Send slave address */
lypinator	0:bb348c97df44	4084	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
lypinator	0:bb348c97df44	4085	}
lypinator	0:bb348c97df44	4086	else
lypinator	0:bb348c97df44	4087	{
lypinator	0:bb348c97df44	4088	hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
lypinator	0:bb348c97df44	4089	}
lypinator	0:bb348c97df44	4090	}
lypinator	0:bb348c97df44	4091	else
lypinator	0:bb348c97df44	4092	{
lypinator	0:bb348c97df44	4093	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
lypinator	0:bb348c97df44	4094	{
lypinator	0:bb348c97df44	4095	/* Send slave 7 Bits address */
lypinator	0:bb348c97df44	4096	if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
lypinator	0:bb348c97df44	4097	{
lypinator	0:bb348c97df44	4098	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
lypinator	0:bb348c97df44	4099	}
lypinator	0:bb348c97df44	4100	else
lypinator	0:bb348c97df44	4101	{
lypinator	0:bb348c97df44	4102	hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
lypinator	0:bb348c97df44	4103	}
lypinator	0:bb348c97df44	4104	}
lypinator	0:bb348c97df44	4105	else
lypinator	0:bb348c97df44	4106	{
lypinator	0:bb348c97df44	4107	if(hi2c->EventCount == 0U)
lypinator	0:bb348c97df44	4108	{
lypinator	0:bb348c97df44	4109	/* Send header of slave address */
lypinator	0:bb348c97df44	4110	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
lypinator	0:bb348c97df44	4111	}
lypinator	0:bb348c97df44	4112	else if(hi2c->EventCount == 1U)
lypinator	0:bb348c97df44	4113	{
lypinator	0:bb348c97df44	4114	/* Send header of slave address */
lypinator	0:bb348c97df44	4115	hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
lypinator	0:bb348c97df44	4116	}
lypinator	0:bb348c97df44	4117	}
lypinator	0:bb348c97df44	4118	}
lypinator	0:bb348c97df44	4119
lypinator	0:bb348c97df44	4120	return HAL_OK;
lypinator	0:bb348c97df44	4121	}
lypinator	0:bb348c97df44	4122
lypinator	0:bb348c97df44	4123	/**
lypinator	0:bb348c97df44	4124	* @brief Handle ADD10 flag for Master
lypinator	0:bb348c97df44	4125	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4126	* the configuration information for I2C module
lypinator	0:bb348c97df44	4127	* @retval HAL status
lypinator	0:bb348c97df44	4128	*/
lypinator	0:bb348c97df44	4129	static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	4130	{
lypinator	0:bb348c97df44	4131	/* Send slave address */
lypinator	0:bb348c97df44	4132	hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
lypinator	0:bb348c97df44	4133
lypinator	0:bb348c97df44	4134	return HAL_OK;
lypinator	0:bb348c97df44	4135	}
lypinator	0:bb348c97df44	4136
lypinator	0:bb348c97df44	4137	/**
lypinator	0:bb348c97df44	4138	* @brief Handle ADDR flag for Master
lypinator	0:bb348c97df44	4139	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4140	* the configuration information for I2C module
lypinator	0:bb348c97df44	4141	* @retval HAL status
lypinator	0:bb348c97df44	4142	*/
lypinator	0:bb348c97df44	4143	static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	4144	{
lypinator	0:bb348c97df44	4145	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	4146	uint32_t CurrentMode = hi2c->Mode;
lypinator	0:bb348c97df44	4147	uint32_t CurrentXferOptions = hi2c->XferOptions;
lypinator	0:bb348c97df44	4148	uint32_t Prev_State = hi2c->PreviousState;
lypinator	0:bb348c97df44	4149
lypinator	0:bb348c97df44	4150	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
lypinator	0:bb348c97df44	4151	{
lypinator	0:bb348c97df44	4152	if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
lypinator	0:bb348c97df44	4153	{
lypinator	0:bb348c97df44	4154	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4155	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4156	}
lypinator	0:bb348c97df44	4157	else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
lypinator	0:bb348c97df44	4158	{
lypinator	0:bb348c97df44	4159	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4160	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4161
lypinator	0:bb348c97df44	4162	/* Generate Restart */
lypinator	0:bb348c97df44	4163	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	4164
lypinator	0:bb348c97df44	4165	hi2c->EventCount++;
lypinator	0:bb348c97df44	4166	}
lypinator	0:bb348c97df44	4167	else
lypinator	0:bb348c97df44	4168	{
lypinator	0:bb348c97df44	4169	if(hi2c->XferCount == 0U)
lypinator	0:bb348c97df44	4170	{
lypinator	0:bb348c97df44	4171	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4172	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4173
lypinator	0:bb348c97df44	4174	/* Generate Stop */
lypinator	0:bb348c97df44	4175	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	4176	}
lypinator	0:bb348c97df44	4177	else if(hi2c->XferCount == 1U)
lypinator	0:bb348c97df44	4178	{
lypinator	0:bb348c97df44	4179	if(CurrentXferOptions == I2C_NO_OPTION_FRAME)
lypinator	0:bb348c97df44	4180	{
lypinator	0:bb348c97df44	4181	/* Disable Acknowledge */
lypinator	0:bb348c97df44	4182	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	4183
lypinator	0:bb348c97df44	4184	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
lypinator	0:bb348c97df44	4185	{
lypinator	0:bb348c97df44	4186	/* Disable Acknowledge */
lypinator	0:bb348c97df44	4187	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	4188
lypinator	0:bb348c97df44	4189	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4190	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4191	}
lypinator	0:bb348c97df44	4192	else
lypinator	0:bb348c97df44	4193	{
lypinator	0:bb348c97df44	4194	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4195	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4196
lypinator	0:bb348c97df44	4197	/* Generate Stop */
lypinator	0:bb348c97df44	4198	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	4199	}
lypinator	0:bb348c97df44	4200	}
lypinator	0:bb348c97df44	4201	/* Prepare next transfer or stop current transfer */
lypinator	0:bb348c97df44	4202	else if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
lypinator	0:bb348c97df44	4203	&& (Prev_State != I2C_STATE_MASTER_BUSY_RX))
lypinator	0:bb348c97df44	4204	{
lypinator	0:bb348c97df44	4205	if(hi2c->XferOptions != I2C_NEXT_FRAME)
lypinator	0:bb348c97df44	4206	{
lypinator	0:bb348c97df44	4207	/* Disable Acknowledge */
lypinator	0:bb348c97df44	4208	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	4209	}
lypinator	0:bb348c97df44	4210	else
lypinator	0:bb348c97df44	4211	{
lypinator	0:bb348c97df44	4212	/* Enable Acknowledge */
lypinator	0:bb348c97df44	4213	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	4214	}
lypinator	0:bb348c97df44	4215
lypinator	0:bb348c97df44	4216	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4217	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4218	}
lypinator	0:bb348c97df44	4219	else
lypinator	0:bb348c97df44	4220	{
lypinator	0:bb348c97df44	4221	/* Disable Acknowledge */
lypinator	0:bb348c97df44	4222	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	4223
lypinator	0:bb348c97df44	4224	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4225	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4226
lypinator	0:bb348c97df44	4227	/* Generate Stop */
lypinator	0:bb348c97df44	4228	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	4229	}
lypinator	0:bb348c97df44	4230	}
lypinator	0:bb348c97df44	4231	else if(hi2c->XferCount == 2U)
lypinator	0:bb348c97df44	4232	{
lypinator	0:bb348c97df44	4233	if(hi2c->XferOptions != I2C_NEXT_FRAME)
lypinator	0:bb348c97df44	4234	{
lypinator	0:bb348c97df44	4235	/* Disable Acknowledge */
lypinator	0:bb348c97df44	4236	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	4237
lypinator	0:bb348c97df44	4238	/* Enable Pos */
lypinator	0:bb348c97df44	4239	hi2c->Instance->CR1 \|= I2C_CR1_POS;
lypinator	0:bb348c97df44	4240	}
lypinator	0:bb348c97df44	4241	else
lypinator	0:bb348c97df44	4242	{
lypinator	0:bb348c97df44	4243	/* Enable Acknowledge */
lypinator	0:bb348c97df44	4244	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	4245	}
lypinator	0:bb348c97df44	4246
lypinator	0:bb348c97df44	4247	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
lypinator	0:bb348c97df44	4248	{
lypinator	0:bb348c97df44	4249	/* Enable Last DMA bit */
lypinator	0:bb348c97df44	4250	hi2c->Instance->CR2 \|= I2C_CR2_LAST;
lypinator	0:bb348c97df44	4251	}
lypinator	0:bb348c97df44	4252
lypinator	0:bb348c97df44	4253	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4254	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4255	}
lypinator	0:bb348c97df44	4256	else
lypinator	0:bb348c97df44	4257	{
lypinator	0:bb348c97df44	4258	/* Enable Acknowledge */
lypinator	0:bb348c97df44	4259	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	4260
lypinator	0:bb348c97df44	4261	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
lypinator	0:bb348c97df44	4262	{
lypinator	0:bb348c97df44	4263	/* Enable Last DMA bit */
lypinator	0:bb348c97df44	4264	hi2c->Instance->CR2 \|= I2C_CR2_LAST;
lypinator	0:bb348c97df44	4265	}
lypinator	0:bb348c97df44	4266
lypinator	0:bb348c97df44	4267	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4268	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4269	}
lypinator	0:bb348c97df44	4270
lypinator	0:bb348c97df44	4271	/* Reset Event counter */
lypinator	0:bb348c97df44	4272	hi2c->EventCount = 0U;
lypinator	0:bb348c97df44	4273	}
lypinator	0:bb348c97df44	4274	}
lypinator	0:bb348c97df44	4275	else
lypinator	0:bb348c97df44	4276	{
lypinator	0:bb348c97df44	4277	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4278	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4279	}
lypinator	0:bb348c97df44	4280
lypinator	0:bb348c97df44	4281	return HAL_OK;
lypinator	0:bb348c97df44	4282	}
lypinator	0:bb348c97df44	4283
lypinator	0:bb348c97df44	4284	/**
lypinator	0:bb348c97df44	4285	* @brief Handle TXE flag for Slave
lypinator	0:bb348c97df44	4286	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4287	* the configuration information for I2C module
lypinator	0:bb348c97df44	4288	* @retval HAL status
lypinator	0:bb348c97df44	4289	*/
lypinator	0:bb348c97df44	4290	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	4291	{
lypinator	0:bb348c97df44	4292	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	4293	uint32_t CurrentState = hi2c->State;
lypinator	0:bb348c97df44	4294
lypinator	0:bb348c97df44	4295	if(hi2c->XferCount != 0U)
lypinator	0:bb348c97df44	4296	{
lypinator	0:bb348c97df44	4297	/* Write data to DR */
lypinator	0:bb348c97df44	4298	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
lypinator	0:bb348c97df44	4299	hi2c->XferCount--;
lypinator	0:bb348c97df44	4300
lypinator	0:bb348c97df44	4301	if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
lypinator	0:bb348c97df44	4302	{
lypinator	0:bb348c97df44	4303	/* Last Byte is received, disable Interrupt */
lypinator	0:bb348c97df44	4304	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
lypinator	0:bb348c97df44	4305
lypinator	0:bb348c97df44	4306	/* Set state at HAL_I2C_STATE_LISTEN */
lypinator	0:bb348c97df44	4307	hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
lypinator	0:bb348c97df44	4308	hi2c->State = HAL_I2C_STATE_LISTEN;
lypinator	0:bb348c97df44	4309
lypinator	0:bb348c97df44	4310	/* Call the Tx complete callback to inform upper layer of the end of receive process */
lypinator	0:bb348c97df44	4311	HAL_I2C_SlaveTxCpltCallback(hi2c);
lypinator	0:bb348c97df44	4312	}
lypinator	0:bb348c97df44	4313	}
lypinator	0:bb348c97df44	4314	return HAL_OK;
lypinator	0:bb348c97df44	4315	}
lypinator	0:bb348c97df44	4316
lypinator	0:bb348c97df44	4317	/**
lypinator	0:bb348c97df44	4318	* @brief Handle BTF flag for Slave transmitter
lypinator	0:bb348c97df44	4319	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4320	* the configuration information for I2C module
lypinator	0:bb348c97df44	4321	* @retval HAL status
lypinator	0:bb348c97df44	4322	*/
lypinator	0:bb348c97df44	4323	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	4324	{
lypinator	0:bb348c97df44	4325	if(hi2c->XferCount != 0U)
lypinator	0:bb348c97df44	4326	{
lypinator	0:bb348c97df44	4327	/* Write data to DR */
lypinator	0:bb348c97df44	4328	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
lypinator	0:bb348c97df44	4329	hi2c->XferCount--;
lypinator	0:bb348c97df44	4330	}
lypinator	0:bb348c97df44	4331	return HAL_OK;
lypinator	0:bb348c97df44	4332	}
lypinator	0:bb348c97df44	4333
lypinator	0:bb348c97df44	4334	/**
lypinator	0:bb348c97df44	4335	* @brief Handle RXNE flag for Slave
lypinator	0:bb348c97df44	4336	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4337	* the configuration information for I2C module
lypinator	0:bb348c97df44	4338	* @retval HAL status
lypinator	0:bb348c97df44	4339	*/
lypinator	0:bb348c97df44	4340	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	4341	{
lypinator	0:bb348c97df44	4342	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	4343	uint32_t CurrentState = hi2c->State;
lypinator	0:bb348c97df44	4344
lypinator	0:bb348c97df44	4345	if(hi2c->XferCount != 0U)
lypinator	0:bb348c97df44	4346	{
lypinator	0:bb348c97df44	4347	/* Read data from DR */
lypinator	0:bb348c97df44	4348	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	4349	hi2c->XferCount--;
lypinator	0:bb348c97df44	4350
lypinator	0:bb348c97df44	4351	if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
lypinator	0:bb348c97df44	4352	{
lypinator	0:bb348c97df44	4353	/* Last Byte is received, disable Interrupt */
lypinator	0:bb348c97df44	4354	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
lypinator	0:bb348c97df44	4355
lypinator	0:bb348c97df44	4356	/* Set state at HAL_I2C_STATE_LISTEN */
lypinator	0:bb348c97df44	4357	hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
lypinator	0:bb348c97df44	4358	hi2c->State = HAL_I2C_STATE_LISTEN;
lypinator	0:bb348c97df44	4359
lypinator	0:bb348c97df44	4360	/* Call the Rx complete callback to inform upper layer of the end of receive process */
lypinator	0:bb348c97df44	4361	HAL_I2C_SlaveRxCpltCallback(hi2c);
lypinator	0:bb348c97df44	4362	}
lypinator	0:bb348c97df44	4363	}
lypinator	0:bb348c97df44	4364	return HAL_OK;
lypinator	0:bb348c97df44	4365	}
lypinator	0:bb348c97df44	4366
lypinator	0:bb348c97df44	4367	/**
lypinator	0:bb348c97df44	4368	* @brief Handle BTF flag for Slave receiver
lypinator	0:bb348c97df44	4369	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4370	* the configuration information for I2C module
lypinator	0:bb348c97df44	4371	* @retval HAL status
lypinator	0:bb348c97df44	4372	*/
lypinator	0:bb348c97df44	4373	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	4374	{
lypinator	0:bb348c97df44	4375	if(hi2c->XferCount != 0U)
lypinator	0:bb348c97df44	4376	{
lypinator	0:bb348c97df44	4377	/* Read data from DR */
lypinator	0:bb348c97df44	4378	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	4379	hi2c->XferCount--;
lypinator	0:bb348c97df44	4380	}
lypinator	0:bb348c97df44	4381	return HAL_OK;
lypinator	0:bb348c97df44	4382	}
lypinator	0:bb348c97df44	4383
lypinator	0:bb348c97df44	4384	/**
lypinator	0:bb348c97df44	4385	* @brief Handle ADD flag for Slave
lypinator	0:bb348c97df44	4386	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4387	* the configuration information for I2C module
lypinator	0:bb348c97df44	4388	* @retval HAL status
lypinator	0:bb348c97df44	4389	*/
lypinator	0:bb348c97df44	4390	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	4391	{
lypinator	0:bb348c97df44	4392	uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
lypinator	0:bb348c97df44	4393	uint16_t SlaveAddrCode = 0U;
lypinator	0:bb348c97df44	4394
lypinator	0:bb348c97df44	4395	/* Transfer Direction requested by Master */
lypinator	0:bb348c97df44	4396	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
lypinator	0:bb348c97df44	4397	{
lypinator	0:bb348c97df44	4398	TransferDirection = I2C_DIRECTION_TRANSMIT;
lypinator	0:bb348c97df44	4399	}
lypinator	0:bb348c97df44	4400
lypinator	0:bb348c97df44	4401	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
lypinator	0:bb348c97df44	4402	{
lypinator	0:bb348c97df44	4403	SlaveAddrCode = hi2c->Init.OwnAddress1;
lypinator	0:bb348c97df44	4404	}
lypinator	0:bb348c97df44	4405	else
lypinator	0:bb348c97df44	4406	{
lypinator	0:bb348c97df44	4407	SlaveAddrCode = hi2c->Init.OwnAddress2;
lypinator	0:bb348c97df44	4408	}
lypinator	0:bb348c97df44	4409
lypinator	0:bb348c97df44	4410	/* Call Slave Addr callback */
lypinator	0:bb348c97df44	4411	HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
lypinator	0:bb348c97df44	4412
lypinator	0:bb348c97df44	4413	return HAL_OK;
lypinator	0:bb348c97df44	4414	}
lypinator	0:bb348c97df44	4415
lypinator	0:bb348c97df44	4416	/**
lypinator	0:bb348c97df44	4417	* @brief Handle STOPF flag for Slave
lypinator	0:bb348c97df44	4418	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4419	* the configuration information for I2C module
lypinator	0:bb348c97df44	4420	* @retval HAL status
lypinator	0:bb348c97df44	4421	*/
lypinator	0:bb348c97df44	4422	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	4423	{
lypinator	0:bb348c97df44	4424	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	4425	uint32_t CurrentState = hi2c->State;
lypinator	0:bb348c97df44	4426
lypinator	0:bb348c97df44	4427	/* Disable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	4428	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	4429
lypinator	0:bb348c97df44	4430	/* Clear STOPF flag */
lypinator	0:bb348c97df44	4431	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
lypinator	0:bb348c97df44	4432
lypinator	0:bb348c97df44	4433	/* Disable Acknowledge */
lypinator	0:bb348c97df44	4434	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	4435
lypinator	0:bb348c97df44	4436	/* If a DMA is ongoing, Update handle size context */
lypinator	0:bb348c97df44	4437	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
lypinator	0:bb348c97df44	4438	{
lypinator	0:bb348c97df44	4439	if((hi2c->State == HAL_I2C_STATE_BUSY_RX) \|\| (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
lypinator	0:bb348c97df44	4440	{
lypinator	0:bb348c97df44	4441	hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx);
lypinator	0:bb348c97df44	4442	}
lypinator	0:bb348c97df44	4443	else
lypinator	0:bb348c97df44	4444	{
lypinator	0:bb348c97df44	4445	hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
lypinator	0:bb348c97df44	4446	}
lypinator	0:bb348c97df44	4447	}
lypinator	0:bb348c97df44	4448
lypinator	0:bb348c97df44	4449	/* All data are not transferred, so set error code accordingly */
lypinator	0:bb348c97df44	4450	if(hi2c->XferCount != 0U)
lypinator	0:bb348c97df44	4451	{
lypinator	0:bb348c97df44	4452	/* Store Last receive data if any */
lypinator	0:bb348c97df44	4453	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
lypinator	0:bb348c97df44	4454	{
lypinator	0:bb348c97df44	4455	/* Read data from DR */
lypinator	0:bb348c97df44	4456	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	4457	hi2c->XferCount--;
lypinator	0:bb348c97df44	4458	}
lypinator	0:bb348c97df44	4459
lypinator	0:bb348c97df44	4460	/* Store Last receive data if any */
lypinator	0:bb348c97df44	4461	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
lypinator	0:bb348c97df44	4462	{
lypinator	0:bb348c97df44	4463	/* Read data from DR */
lypinator	0:bb348c97df44	4464	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	4465	hi2c->XferCount--;
lypinator	0:bb348c97df44	4466	}
lypinator	0:bb348c97df44	4467
lypinator	0:bb348c97df44	4468	/* Set ErrorCode corresponding to a Non-Acknowledge */
lypinator	0:bb348c97df44	4469	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
lypinator	0:bb348c97df44	4470	}
lypinator	0:bb348c97df44	4471
lypinator	0:bb348c97df44	4472	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
lypinator	0:bb348c97df44	4473	{
lypinator	0:bb348c97df44	4474	/* Call the corresponding callback to inform upper layer of End of Transfer */
lypinator	0:bb348c97df44	4475	I2C_ITError(hi2c);
lypinator	0:bb348c97df44	4476	}
lypinator	0:bb348c97df44	4477	else
lypinator	0:bb348c97df44	4478	{
lypinator	0:bb348c97df44	4479	if((CurrentState == HAL_I2C_STATE_LISTEN ) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) \|\| \
lypinator	0:bb348c97df44	4480	(CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
lypinator	0:bb348c97df44	4481	{
lypinator	0:bb348c97df44	4482	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	4483	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	4484	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	4485	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	4486
lypinator	0:bb348c97df44	4487	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
lypinator	0:bb348c97df44	4488	HAL_I2C_ListenCpltCallback(hi2c);
lypinator	0:bb348c97df44	4489	}
lypinator	0:bb348c97df44	4490	else
lypinator	0:bb348c97df44	4491	{
lypinator	0:bb348c97df44	4492	if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX))
lypinator	0:bb348c97df44	4493	{
lypinator	0:bb348c97df44	4494	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	4495	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	4496	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	4497
lypinator	0:bb348c97df44	4498	HAL_I2C_SlaveRxCpltCallback(hi2c);
lypinator	0:bb348c97df44	4499	}
lypinator	0:bb348c97df44	4500	}
lypinator	0:bb348c97df44	4501	}
lypinator	0:bb348c97df44	4502	return HAL_OK;
lypinator	0:bb348c97df44	4503	}
lypinator	0:bb348c97df44	4504
lypinator	0:bb348c97df44	4505	/**
lypinator	0:bb348c97df44	4506	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4507	* the configuration information for I2C module
lypinator	0:bb348c97df44	4508	* @retval HAL status
lypinator	0:bb348c97df44	4509	*/
lypinator	0:bb348c97df44	4510	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	4511	{
lypinator	0:bb348c97df44	4512	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	4513	uint32_t CurrentState = hi2c->State;
lypinator	0:bb348c97df44	4514	uint32_t CurrentXferOptions = hi2c->XferOptions;
lypinator	0:bb348c97df44	4515
lypinator	0:bb348c97df44	4516	if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_LAST_FRAME)) && \
lypinator	0:bb348c97df44	4517	(CurrentState == HAL_I2C_STATE_LISTEN))
lypinator	0:bb348c97df44	4518	{
lypinator	0:bb348c97df44	4519	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	4520
lypinator	0:bb348c97df44	4521	/* Disable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	4522	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	4523
lypinator	0:bb348c97df44	4524	/* Clear AF flag */
lypinator	0:bb348c97df44	4525	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
lypinator	0:bb348c97df44	4526
lypinator	0:bb348c97df44	4527	/* Disable Acknowledge */
lypinator	0:bb348c97df44	4528	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	4529
lypinator	0:bb348c97df44	4530	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	4531	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	4532	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	4533
lypinator	0:bb348c97df44	4534	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
lypinator	0:bb348c97df44	4535	HAL_I2C_ListenCpltCallback(hi2c);
lypinator	0:bb348c97df44	4536	}
lypinator	0:bb348c97df44	4537	else if(CurrentState == HAL_I2C_STATE_BUSY_TX)
lypinator	0:bb348c97df44	4538	{
lypinator	0:bb348c97df44	4539	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	4540	hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
lypinator	0:bb348c97df44	4541	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	4542	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	4543
lypinator	0:bb348c97df44	4544	/* Disable EVT, BUF and ERR interrupt */
lypinator	0:bb348c97df44	4545	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
lypinator	0:bb348c97df44	4546
lypinator	0:bb348c97df44	4547	/* Clear AF flag */
lypinator	0:bb348c97df44	4548	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
lypinator	0:bb348c97df44	4549
lypinator	0:bb348c97df44	4550	/* Disable Acknowledge */
lypinator	0:bb348c97df44	4551	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	4552
lypinator	0:bb348c97df44	4553	HAL_I2C_SlaveTxCpltCallback(hi2c);
lypinator	0:bb348c97df44	4554	}
lypinator	0:bb348c97df44	4555	else
lypinator	0:bb348c97df44	4556	{
lypinator	0:bb348c97df44	4557	/* Clear AF flag only */
lypinator	0:bb348c97df44	4558	/* State Listen, but XferOptions == FIRST or NEXT */
lypinator	0:bb348c97df44	4559	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
lypinator	0:bb348c97df44	4560	}
lypinator	0:bb348c97df44	4561
lypinator	0:bb348c97df44	4562	return HAL_OK;
lypinator	0:bb348c97df44	4563	}
lypinator	0:bb348c97df44	4564
lypinator	0:bb348c97df44	4565	/**
lypinator	0:bb348c97df44	4566	* @brief I2C interrupts error process
lypinator	0:bb348c97df44	4567	* @param hi2c I2C handle.
lypinator	0:bb348c97df44	4568	* @retval None
lypinator	0:bb348c97df44	4569	*/
lypinator	0:bb348c97df44	4570	static void I2C_ITError(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	4571	{
lypinator	0:bb348c97df44	4572	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	4573	uint32_t CurrentState = hi2c->State;
lypinator	0:bb348c97df44	4574
lypinator	0:bb348c97df44	4575	if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
lypinator	0:bb348c97df44	4576	{
lypinator	0:bb348c97df44	4577	/* keep HAL_I2C_STATE_LISTEN */
lypinator	0:bb348c97df44	4578	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	4579	hi2c->State = HAL_I2C_STATE_LISTEN;
lypinator	0:bb348c97df44	4580	}
lypinator	0:bb348c97df44	4581	else
lypinator	0:bb348c97df44	4582	{
lypinator	0:bb348c97df44	4583	/* If state is an abort treatment on going, don't change state */
lypinator	0:bb348c97df44	4584	/* This change will be do later */
lypinator	0:bb348c97df44	4585	if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN))
lypinator	0:bb348c97df44	4586	{
lypinator	0:bb348c97df44	4587	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	4588	}
lypinator	0:bb348c97df44	4589	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	4590	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	4591	}
lypinator	0:bb348c97df44	4592
lypinator	0:bb348c97df44	4593	/* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
lypinator	0:bb348c97df44	4594	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
lypinator	0:bb348c97df44	4595
lypinator	0:bb348c97df44	4596	/* Abort DMA transfer */
lypinator	0:bb348c97df44	4597	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
lypinator	0:bb348c97df44	4598	{
lypinator	0:bb348c97df44	4599	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
lypinator	0:bb348c97df44	4600
lypinator	0:bb348c97df44	4601	if(hi2c->hdmatx->State != HAL_DMA_STATE_READY)
lypinator	0:bb348c97df44	4602	{
lypinator	0:bb348c97df44	4603	/* Set the DMA Abort callback :
lypinator	0:bb348c97df44	4604	will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
lypinator	0:bb348c97df44	4605	hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
lypinator	0:bb348c97df44	4606
lypinator	0:bb348c97df44	4607	if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
lypinator	0:bb348c97df44	4608	{
lypinator	0:bb348c97df44	4609	/* Disable I2C peripheral to prevent dummy data in buffer */
lypinator	0:bb348c97df44	4610	__HAL_I2C_DISABLE(hi2c);
lypinator	0:bb348c97df44	4611
lypinator	0:bb348c97df44	4612	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	4613
lypinator	0:bb348c97df44	4614	/* Call Directly XferAbortCallback function in case of error */
lypinator	0:bb348c97df44	4615	hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
lypinator	0:bb348c97df44	4616	}
lypinator	0:bb348c97df44	4617	}
lypinator	0:bb348c97df44	4618	else
lypinator	0:bb348c97df44	4619	{
lypinator	0:bb348c97df44	4620	/* Set the DMA Abort callback :
lypinator	0:bb348c97df44	4621	will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
lypinator	0:bb348c97df44	4622	hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
lypinator	0:bb348c97df44	4623
lypinator	0:bb348c97df44	4624	if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
lypinator	0:bb348c97df44	4625	{
lypinator	0:bb348c97df44	4626	/* Store Last receive data if any */
lypinator	0:bb348c97df44	4627	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
lypinator	0:bb348c97df44	4628	{
lypinator	0:bb348c97df44	4629	/* Read data from DR */
lypinator	0:bb348c97df44	4630	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	4631	}
lypinator	0:bb348c97df44	4632
lypinator	0:bb348c97df44	4633	/* Disable I2C peripheral to prevent dummy data in buffer */
lypinator	0:bb348c97df44	4634	__HAL_I2C_DISABLE(hi2c);
lypinator	0:bb348c97df44	4635
lypinator	0:bb348c97df44	4636	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	4637
lypinator	0:bb348c97df44	4638	/* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
lypinator	0:bb348c97df44	4639	hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
lypinator	0:bb348c97df44	4640	}
lypinator	0:bb348c97df44	4641	}
lypinator	0:bb348c97df44	4642	}
lypinator	0:bb348c97df44	4643	else if(hi2c->State == HAL_I2C_STATE_ABORT)
lypinator	0:bb348c97df44	4644	{
lypinator	0:bb348c97df44	4645	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	4646	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	4647
lypinator	0:bb348c97df44	4648	/* Store Last receive data if any */
lypinator	0:bb348c97df44	4649	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
lypinator	0:bb348c97df44	4650	{
lypinator	0:bb348c97df44	4651	/* Read data from DR */
lypinator	0:bb348c97df44	4652	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	4653	}
lypinator	0:bb348c97df44	4654
lypinator	0:bb348c97df44	4655	/* Disable I2C peripheral to prevent dummy data in buffer */
lypinator	0:bb348c97df44	4656	__HAL_I2C_DISABLE(hi2c);
lypinator	0:bb348c97df44	4657
lypinator	0:bb348c97df44	4658	/* Call the corresponding callback to inform upper layer of End of Transfer */
lypinator	0:bb348c97df44	4659	HAL_I2C_AbortCpltCallback(hi2c);
lypinator	0:bb348c97df44	4660	}
lypinator	0:bb348c97df44	4661	else
lypinator	0:bb348c97df44	4662	{
lypinator	0:bb348c97df44	4663	/* Store Last receive data if any */
lypinator	0:bb348c97df44	4664	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
lypinator	0:bb348c97df44	4665	{
lypinator	0:bb348c97df44	4666	/* Read data from DR */
lypinator	0:bb348c97df44	4667	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
lypinator	0:bb348c97df44	4668	}
lypinator	0:bb348c97df44	4669
lypinator	0:bb348c97df44	4670	/* Call user error callback */
lypinator	0:bb348c97df44	4671	HAL_I2C_ErrorCallback(hi2c);
lypinator	0:bb348c97df44	4672	}
lypinator	0:bb348c97df44	4673	/* STOP Flag is not set after a NACK reception */
lypinator	0:bb348c97df44	4674	/* So may inform upper layer that listen phase is stopped */
lypinator	0:bb348c97df44	4675	/* during NACK error treatment */
lypinator	0:bb348c97df44	4676	if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
lypinator	0:bb348c97df44	4677	{
lypinator	0:bb348c97df44	4678	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
lypinator	0:bb348c97df44	4679	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	4680	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	4681	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	4682
lypinator	0:bb348c97df44	4683	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
lypinator	0:bb348c97df44	4684	HAL_I2C_ListenCpltCallback(hi2c);
lypinator	0:bb348c97df44	4685	}
lypinator	0:bb348c97df44	4686	}
lypinator	0:bb348c97df44	4687
lypinator	0:bb348c97df44	4688	/**
lypinator	0:bb348c97df44	4689	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4690	* the configuration information for I2C module
lypinator	0:bb348c97df44	4691	* @param DevAddress Target device address The device 7 bits address value
lypinator	0:bb348c97df44	4692	* in datasheet must be shifted to the left before calling the interface
lypinator	0:bb348c97df44	4693	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	4694	* @param Tickstart Tick start value
lypinator	0:bb348c97df44	4695	* @retval HAL status
lypinator	0:bb348c97df44	4696	*/
lypinator	0:bb348c97df44	4697	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
lypinator	0:bb348c97df44	4698	{
lypinator	0:bb348c97df44	4699	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	4700	uint32_t CurrentXferOptions = hi2c->XferOptions;
lypinator	0:bb348c97df44	4701
lypinator	0:bb348c97df44	4702	/* Generate Start condition if first transfer */
lypinator	0:bb348c97df44	4703	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
lypinator	0:bb348c97df44	4704	{
lypinator	0:bb348c97df44	4705	/* Generate Start */
lypinator	0:bb348c97df44	4706	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	4707	}
lypinator	0:bb348c97df44	4708	else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
lypinator	0:bb348c97df44	4709	{
lypinator	0:bb348c97df44	4710	/* Generate ReStart */
lypinator	0:bb348c97df44	4711	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	4712	}
lypinator	0:bb348c97df44	4713
lypinator	0:bb348c97df44	4714	/* Wait until SB flag is set */
lypinator	0:bb348c97df44	4715	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4716	{
lypinator	0:bb348c97df44	4717	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4718	}
lypinator	0:bb348c97df44	4719
lypinator	0:bb348c97df44	4720	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
lypinator	0:bb348c97df44	4721	{
lypinator	0:bb348c97df44	4722	/* Send slave address */
lypinator	0:bb348c97df44	4723	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
lypinator	0:bb348c97df44	4724	}
lypinator	0:bb348c97df44	4725	else
lypinator	0:bb348c97df44	4726	{
lypinator	0:bb348c97df44	4727	/* Send header of slave address */
lypinator	0:bb348c97df44	4728	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
lypinator	0:bb348c97df44	4729
lypinator	0:bb348c97df44	4730	/* Wait until ADD10 flag is set */
lypinator	0:bb348c97df44	4731	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4732	{
lypinator	0:bb348c97df44	4733	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	4734	{
lypinator	0:bb348c97df44	4735	return HAL_ERROR;
lypinator	0:bb348c97df44	4736	}
lypinator	0:bb348c97df44	4737	else
lypinator	0:bb348c97df44	4738	{
lypinator	0:bb348c97df44	4739	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4740	}
lypinator	0:bb348c97df44	4741	}
lypinator	0:bb348c97df44	4742
lypinator	0:bb348c97df44	4743	/* Send slave address */
lypinator	0:bb348c97df44	4744	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
lypinator	0:bb348c97df44	4745	}
lypinator	0:bb348c97df44	4746
lypinator	0:bb348c97df44	4747	/* Wait until ADDR flag is set */
lypinator	0:bb348c97df44	4748	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4749	{
lypinator	0:bb348c97df44	4750	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	4751	{
lypinator	0:bb348c97df44	4752	return HAL_ERROR;
lypinator	0:bb348c97df44	4753	}
lypinator	0:bb348c97df44	4754	else
lypinator	0:bb348c97df44	4755	{
lypinator	0:bb348c97df44	4756	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4757	}
lypinator	0:bb348c97df44	4758	}
lypinator	0:bb348c97df44	4759
lypinator	0:bb348c97df44	4760	return HAL_OK;
lypinator	0:bb348c97df44	4761	}
lypinator	0:bb348c97df44	4762
lypinator	0:bb348c97df44	4763	/**
lypinator	0:bb348c97df44	4764	* @brief Master sends target device address for read request.
lypinator	0:bb348c97df44	4765	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4766	* the configuration information for I2C module
lypinator	0:bb348c97df44	4767	* @param DevAddress Target device address The device 7 bits address value
lypinator	0:bb348c97df44	4768	* in datasheet must be shifted to the left before calling the interface
lypinator	0:bb348c97df44	4769	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	4770	* @param Tickstart Tick start value
lypinator	0:bb348c97df44	4771	* @retval HAL status
lypinator	0:bb348c97df44	4772	*/
lypinator	0:bb348c97df44	4773	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
lypinator	0:bb348c97df44	4774	{
lypinator	0:bb348c97df44	4775	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	4776	uint32_t CurrentXferOptions = hi2c->XferOptions;
lypinator	0:bb348c97df44	4777
lypinator	0:bb348c97df44	4778	/* Enable Acknowledge */
lypinator	0:bb348c97df44	4779	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	4780
lypinator	0:bb348c97df44	4781	/* Generate Start condition if first transfer */
lypinator	0:bb348c97df44	4782	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
lypinator	0:bb348c97df44	4783	{
lypinator	0:bb348c97df44	4784	/* Generate Start */
lypinator	0:bb348c97df44	4785	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	4786	}
lypinator	0:bb348c97df44	4787	else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
lypinator	0:bb348c97df44	4788	{
lypinator	0:bb348c97df44	4789	/* Generate ReStart */
lypinator	0:bb348c97df44	4790	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	4791	}
lypinator	0:bb348c97df44	4792
lypinator	0:bb348c97df44	4793	/* Wait until SB flag is set */
lypinator	0:bb348c97df44	4794	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4795	{
lypinator	0:bb348c97df44	4796	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4797	}
lypinator	0:bb348c97df44	4798
lypinator	0:bb348c97df44	4799	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
lypinator	0:bb348c97df44	4800	{
lypinator	0:bb348c97df44	4801	/* Send slave address */
lypinator	0:bb348c97df44	4802	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
lypinator	0:bb348c97df44	4803	}
lypinator	0:bb348c97df44	4804	else
lypinator	0:bb348c97df44	4805	{
lypinator	0:bb348c97df44	4806	/* Send header of slave address */
lypinator	0:bb348c97df44	4807	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
lypinator	0:bb348c97df44	4808
lypinator	0:bb348c97df44	4809	/* Wait until ADD10 flag is set */
lypinator	0:bb348c97df44	4810	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4811	{
lypinator	0:bb348c97df44	4812	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	4813	{
lypinator	0:bb348c97df44	4814	return HAL_ERROR;
lypinator	0:bb348c97df44	4815	}
lypinator	0:bb348c97df44	4816	else
lypinator	0:bb348c97df44	4817	{
lypinator	0:bb348c97df44	4818	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4819	}
lypinator	0:bb348c97df44	4820	}
lypinator	0:bb348c97df44	4821
lypinator	0:bb348c97df44	4822	/* Send slave address */
lypinator	0:bb348c97df44	4823	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
lypinator	0:bb348c97df44	4824
lypinator	0:bb348c97df44	4825	/* Wait until ADDR flag is set */
lypinator	0:bb348c97df44	4826	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4827	{
lypinator	0:bb348c97df44	4828	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	4829	{
lypinator	0:bb348c97df44	4830	return HAL_ERROR;
lypinator	0:bb348c97df44	4831	}
lypinator	0:bb348c97df44	4832	else
lypinator	0:bb348c97df44	4833	{
lypinator	0:bb348c97df44	4834	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4835	}
lypinator	0:bb348c97df44	4836	}
lypinator	0:bb348c97df44	4837
lypinator	0:bb348c97df44	4838	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4839	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4840
lypinator	0:bb348c97df44	4841	/* Generate Restart */
lypinator	0:bb348c97df44	4842	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	4843
lypinator	0:bb348c97df44	4844	/* Wait until SB flag is set */
lypinator	0:bb348c97df44	4845	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4846	{
lypinator	0:bb348c97df44	4847	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4848	}
lypinator	0:bb348c97df44	4849
lypinator	0:bb348c97df44	4850	/* Send header of slave address */
lypinator	0:bb348c97df44	4851	hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
lypinator	0:bb348c97df44	4852	}
lypinator	0:bb348c97df44	4853
lypinator	0:bb348c97df44	4854	/* Wait until ADDR flag is set */
lypinator	0:bb348c97df44	4855	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4856	{
lypinator	0:bb348c97df44	4857	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	4858	{
lypinator	0:bb348c97df44	4859	return HAL_ERROR;
lypinator	0:bb348c97df44	4860	}
lypinator	0:bb348c97df44	4861	else
lypinator	0:bb348c97df44	4862	{
lypinator	0:bb348c97df44	4863	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4864	}
lypinator	0:bb348c97df44	4865	}
lypinator	0:bb348c97df44	4866
lypinator	0:bb348c97df44	4867	return HAL_OK;
lypinator	0:bb348c97df44	4868	}
lypinator	0:bb348c97df44	4869
lypinator	0:bb348c97df44	4870	/**
lypinator	0:bb348c97df44	4871	* @brief Master sends target device address followed by internal memory address for write request.
lypinator	0:bb348c97df44	4872	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4873	* the configuration information for I2C module
lypinator	0:bb348c97df44	4874	* @param DevAddress Target device address
lypinator	0:bb348c97df44	4875	* @param MemAddress Internal memory address
lypinator	0:bb348c97df44	4876	* @param MemAddSize Size of internal memory address
lypinator	0:bb348c97df44	4877	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	4878	* @param Tickstart Tick start value
lypinator	0:bb348c97df44	4879	* @retval HAL status
lypinator	0:bb348c97df44	4880	*/
lypinator	0:bb348c97df44	4881	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
lypinator	0:bb348c97df44	4882	{
lypinator	0:bb348c97df44	4883	/* Generate Start */
lypinator	0:bb348c97df44	4884	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	4885
lypinator	0:bb348c97df44	4886	/* Wait until SB flag is set */
lypinator	0:bb348c97df44	4887	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4888	{
lypinator	0:bb348c97df44	4889	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4890	}
lypinator	0:bb348c97df44	4891
lypinator	0:bb348c97df44	4892	/* Send slave address */
lypinator	0:bb348c97df44	4893	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
lypinator	0:bb348c97df44	4894
lypinator	0:bb348c97df44	4895	/* Wait until ADDR flag is set */
lypinator	0:bb348c97df44	4896	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4897	{
lypinator	0:bb348c97df44	4898	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	4899	{
lypinator	0:bb348c97df44	4900	return HAL_ERROR;
lypinator	0:bb348c97df44	4901	}
lypinator	0:bb348c97df44	4902	else
lypinator	0:bb348c97df44	4903	{
lypinator	0:bb348c97df44	4904	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4905	}
lypinator	0:bb348c97df44	4906	}
lypinator	0:bb348c97df44	4907
lypinator	0:bb348c97df44	4908	/* Clear ADDR flag */
lypinator	0:bb348c97df44	4909	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	4910
lypinator	0:bb348c97df44	4911	/* Wait until TXE flag is set */
lypinator	0:bb348c97df44	4912	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4913	{
lypinator	0:bb348c97df44	4914	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	4915	{
lypinator	0:bb348c97df44	4916	/* Generate Stop */
lypinator	0:bb348c97df44	4917	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	4918	return HAL_ERROR;
lypinator	0:bb348c97df44	4919	}
lypinator	0:bb348c97df44	4920	else
lypinator	0:bb348c97df44	4921	{
lypinator	0:bb348c97df44	4922	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4923	}
lypinator	0:bb348c97df44	4924	}
lypinator	0:bb348c97df44	4925
lypinator	0:bb348c97df44	4926	/* If Memory address size is 8Bit */
lypinator	0:bb348c97df44	4927	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
lypinator	0:bb348c97df44	4928	{
lypinator	0:bb348c97df44	4929	/* Send Memory Address */
lypinator	0:bb348c97df44	4930	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
lypinator	0:bb348c97df44	4931	}
lypinator	0:bb348c97df44	4932	/* If Memory address size is 16Bit */
lypinator	0:bb348c97df44	4933	else
lypinator	0:bb348c97df44	4934	{
lypinator	0:bb348c97df44	4935	/* Send MSB of Memory Address */
lypinator	0:bb348c97df44	4936	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
lypinator	0:bb348c97df44	4937
lypinator	0:bb348c97df44	4938	/* Wait until TXE flag is set */
lypinator	0:bb348c97df44	4939	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4940	{
lypinator	0:bb348c97df44	4941	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	4942	{
lypinator	0:bb348c97df44	4943	/* Generate Stop */
lypinator	0:bb348c97df44	4944	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	4945	return HAL_ERROR;
lypinator	0:bb348c97df44	4946	}
lypinator	0:bb348c97df44	4947	else
lypinator	0:bb348c97df44	4948	{
lypinator	0:bb348c97df44	4949	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4950	}
lypinator	0:bb348c97df44	4951	}
lypinator	0:bb348c97df44	4952
lypinator	0:bb348c97df44	4953	/* Send LSB of Memory Address */
lypinator	0:bb348c97df44	4954	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
lypinator	0:bb348c97df44	4955	}
lypinator	0:bb348c97df44	4956
lypinator	0:bb348c97df44	4957	return HAL_OK;
lypinator	0:bb348c97df44	4958	}
lypinator	0:bb348c97df44	4959
lypinator	0:bb348c97df44	4960	/**
lypinator	0:bb348c97df44	4961	* @brief Master sends target device address followed by internal memory address for read request.
lypinator	0:bb348c97df44	4962	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	4963	* the configuration information for I2C module
lypinator	0:bb348c97df44	4964	* @param DevAddress Target device address
lypinator	0:bb348c97df44	4965	* @param MemAddress Internal memory address
lypinator	0:bb348c97df44	4966	* @param MemAddSize Size of internal memory address
lypinator	0:bb348c97df44	4967	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	4968	* @param Tickstart Tick start value
lypinator	0:bb348c97df44	4969	* @retval HAL status
lypinator	0:bb348c97df44	4970	*/
lypinator	0:bb348c97df44	4971	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
lypinator	0:bb348c97df44	4972	{
lypinator	0:bb348c97df44	4973	/* Enable Acknowledge */
lypinator	0:bb348c97df44	4974	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
lypinator	0:bb348c97df44	4975
lypinator	0:bb348c97df44	4976	/* Generate Start */
lypinator	0:bb348c97df44	4977	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	4978
lypinator	0:bb348c97df44	4979	/* Wait until SB flag is set */
lypinator	0:bb348c97df44	4980	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4981	{
lypinator	0:bb348c97df44	4982	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4983	}
lypinator	0:bb348c97df44	4984
lypinator	0:bb348c97df44	4985	/* Send slave address */
lypinator	0:bb348c97df44	4986	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
lypinator	0:bb348c97df44	4987
lypinator	0:bb348c97df44	4988	/* Wait until ADDR flag is set */
lypinator	0:bb348c97df44	4989	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	4990	{
lypinator	0:bb348c97df44	4991	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	4992	{
lypinator	0:bb348c97df44	4993	return HAL_ERROR;
lypinator	0:bb348c97df44	4994	}
lypinator	0:bb348c97df44	4995	else
lypinator	0:bb348c97df44	4996	{
lypinator	0:bb348c97df44	4997	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	4998	}
lypinator	0:bb348c97df44	4999	}
lypinator	0:bb348c97df44	5000
lypinator	0:bb348c97df44	5001	/* Clear ADDR flag */
lypinator	0:bb348c97df44	5002	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
lypinator	0:bb348c97df44	5003
lypinator	0:bb348c97df44	5004	/* Wait until TXE flag is set */
lypinator	0:bb348c97df44	5005	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	5006	{
lypinator	0:bb348c97df44	5007	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	5008	{
lypinator	0:bb348c97df44	5009	/* Generate Stop */
lypinator	0:bb348c97df44	5010	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	5011	return HAL_ERROR;
lypinator	0:bb348c97df44	5012	}
lypinator	0:bb348c97df44	5013	else
lypinator	0:bb348c97df44	5014	{
lypinator	0:bb348c97df44	5015	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	5016	}
lypinator	0:bb348c97df44	5017	}
lypinator	0:bb348c97df44	5018
lypinator	0:bb348c97df44	5019	/* If Memory address size is 8Bit */
lypinator	0:bb348c97df44	5020	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
lypinator	0:bb348c97df44	5021	{
lypinator	0:bb348c97df44	5022	/* Send Memory Address */
lypinator	0:bb348c97df44	5023	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
lypinator	0:bb348c97df44	5024	}
lypinator	0:bb348c97df44	5025	/* If Memory address size is 16Bit */
lypinator	0:bb348c97df44	5026	else
lypinator	0:bb348c97df44	5027	{
lypinator	0:bb348c97df44	5028	/* Send MSB of Memory Address */
lypinator	0:bb348c97df44	5029	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
lypinator	0:bb348c97df44	5030
lypinator	0:bb348c97df44	5031	/* Wait until TXE flag is set */
lypinator	0:bb348c97df44	5032	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	5033	{
lypinator	0:bb348c97df44	5034	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	5035	{
lypinator	0:bb348c97df44	5036	/* Generate Stop */
lypinator	0:bb348c97df44	5037	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	5038	return HAL_ERROR;
lypinator	0:bb348c97df44	5039	}
lypinator	0:bb348c97df44	5040	else
lypinator	0:bb348c97df44	5041	{
lypinator	0:bb348c97df44	5042	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	5043	}
lypinator	0:bb348c97df44	5044	}
lypinator	0:bb348c97df44	5045
lypinator	0:bb348c97df44	5046	/* Send LSB of Memory Address */
lypinator	0:bb348c97df44	5047	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
lypinator	0:bb348c97df44	5048	}
lypinator	0:bb348c97df44	5049
lypinator	0:bb348c97df44	5050	/* Wait until TXE flag is set */
lypinator	0:bb348c97df44	5051	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	5052	{
lypinator	0:bb348c97df44	5053	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	5054	{
lypinator	0:bb348c97df44	5055	/* Generate Stop */
lypinator	0:bb348c97df44	5056	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	5057	return HAL_ERROR;
lypinator	0:bb348c97df44	5058	}
lypinator	0:bb348c97df44	5059	else
lypinator	0:bb348c97df44	5060	{
lypinator	0:bb348c97df44	5061	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	5062	}
lypinator	0:bb348c97df44	5063	}
lypinator	0:bb348c97df44	5064
lypinator	0:bb348c97df44	5065	/* Generate Restart */
lypinator	0:bb348c97df44	5066	hi2c->Instance->CR1 \|= I2C_CR1_START;
lypinator	0:bb348c97df44	5067
lypinator	0:bb348c97df44	5068	/* Wait until SB flag is set */
lypinator	0:bb348c97df44	5069	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	5070	{
lypinator	0:bb348c97df44	5071	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	5072	}
lypinator	0:bb348c97df44	5073
lypinator	0:bb348c97df44	5074	/* Send slave address */
lypinator	0:bb348c97df44	5075	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
lypinator	0:bb348c97df44	5076
lypinator	0:bb348c97df44	5077	/* Wait until ADDR flag is set */
lypinator	0:bb348c97df44	5078	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
lypinator	0:bb348c97df44	5079	{
lypinator	0:bb348c97df44	5080	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
lypinator	0:bb348c97df44	5081	{
lypinator	0:bb348c97df44	5082	return HAL_ERROR;
lypinator	0:bb348c97df44	5083	}
lypinator	0:bb348c97df44	5084	else
lypinator	0:bb348c97df44	5085	{
lypinator	0:bb348c97df44	5086	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	5087	}
lypinator	0:bb348c97df44	5088	}
lypinator	0:bb348c97df44	5089
lypinator	0:bb348c97df44	5090	return HAL_OK;
lypinator	0:bb348c97df44	5091	}
lypinator	0:bb348c97df44	5092
lypinator	0:bb348c97df44	5093	/**
lypinator	0:bb348c97df44	5094	* @brief DMA I2C process complete callback.
lypinator	0:bb348c97df44	5095	* @param hdma DMA handle
lypinator	0:bb348c97df44	5096	* @retval None
lypinator	0:bb348c97df44	5097	*/
lypinator	0:bb348c97df44	5098	static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
lypinator	0:bb348c97df44	5099	{
lypinator	0:bb348c97df44	5100	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
lypinator	0:bb348c97df44	5101
lypinator	0:bb348c97df44	5102	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
lypinator	0:bb348c97df44	5103	uint32_t CurrentState = hi2c->State;
lypinator	0:bb348c97df44	5104	uint32_t CurrentMode = hi2c->Mode;
lypinator	0:bb348c97df44	5105
lypinator	0:bb348c97df44	5106	if((CurrentState == HAL_I2C_STATE_BUSY_TX) \|\| ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
lypinator	0:bb348c97df44	5107	{
lypinator	0:bb348c97df44	5108	/* Disable DMA Request */
lypinator	0:bb348c97df44	5109	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
lypinator	0:bb348c97df44	5110
lypinator	0:bb348c97df44	5111	hi2c->XferCount = 0U;
lypinator	0:bb348c97df44	5112
lypinator	0:bb348c97df44	5113	/* Enable EVT and ERR interrupt */
lypinator	0:bb348c97df44	5114	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
lypinator	0:bb348c97df44	5115	}
lypinator	0:bb348c97df44	5116	else
lypinator	0:bb348c97df44	5117	{
lypinator	0:bb348c97df44	5118	/* Disable Acknowledge */
lypinator	0:bb348c97df44	5119	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	5120
lypinator	0:bb348c97df44	5121	/* Generate Stop */
lypinator	0:bb348c97df44	5122	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	5123
lypinator	0:bb348c97df44	5124	/* Disable Last DMA */
lypinator	0:bb348c97df44	5125	hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
lypinator	0:bb348c97df44	5126
lypinator	0:bb348c97df44	5127	/* Disable DMA Request */
lypinator	0:bb348c97df44	5128	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
lypinator	0:bb348c97df44	5129
lypinator	0:bb348c97df44	5130	hi2c->XferCount = 0U;
lypinator	0:bb348c97df44	5131
lypinator	0:bb348c97df44	5132	/* Check if Errors has been detected during transfer */
lypinator	0:bb348c97df44	5133	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
lypinator	0:bb348c97df44	5134	{
lypinator	0:bb348c97df44	5135	HAL_I2C_ErrorCallback(hi2c);
lypinator	0:bb348c97df44	5136	}
lypinator	0:bb348c97df44	5137	else
lypinator	0:bb348c97df44	5138	{
lypinator	0:bb348c97df44	5139	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5140
lypinator	0:bb348c97df44	5141	if(hi2c->Mode == HAL_I2C_MODE_MEM)
lypinator	0:bb348c97df44	5142	{
lypinator	0:bb348c97df44	5143	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	5144
lypinator	0:bb348c97df44	5145	HAL_I2C_MemRxCpltCallback(hi2c);
lypinator	0:bb348c97df44	5146	}
lypinator	0:bb348c97df44	5147	else
lypinator	0:bb348c97df44	5148	{
lypinator	0:bb348c97df44	5149	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	5150
lypinator	0:bb348c97df44	5151	HAL_I2C_MasterRxCpltCallback(hi2c);
lypinator	0:bb348c97df44	5152	}
lypinator	0:bb348c97df44	5153	}
lypinator	0:bb348c97df44	5154	}
lypinator	0:bb348c97df44	5155	}
lypinator	0:bb348c97df44	5156
lypinator	0:bb348c97df44	5157	/**
lypinator	0:bb348c97df44	5158	* @brief DMA I2C communication error callback.
lypinator	0:bb348c97df44	5159	* @param hdma DMA handle
lypinator	0:bb348c97df44	5160	* @retval None
lypinator	0:bb348c97df44	5161	*/
lypinator	0:bb348c97df44	5162	static void I2C_DMAError(DMA_HandleTypeDef *hdma)
lypinator	0:bb348c97df44	5163	{
lypinator	0:bb348c97df44	5164	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
lypinator	0:bb348c97df44	5165
lypinator	0:bb348c97df44	5166	/* Ignore DMA FIFO error */
lypinator	0:bb348c97df44	5167	if(HAL_DMA_GetError(hdma) != HAL_DMA_ERROR_FE)
lypinator	0:bb348c97df44	5168	{
lypinator	0:bb348c97df44	5169	/* Disable Acknowledge */
lypinator	0:bb348c97df44	5170	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	5171
lypinator	0:bb348c97df44	5172	hi2c->XferCount = 0U;
lypinator	0:bb348c97df44	5173
lypinator	0:bb348c97df44	5174	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5175	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	5176
lypinator	0:bb348c97df44	5177	hi2c->ErrorCode \|= HAL_I2C_ERROR_DMA;
lypinator	0:bb348c97df44	5178
lypinator	0:bb348c97df44	5179	HAL_I2C_ErrorCallback(hi2c);
lypinator	0:bb348c97df44	5180	}
lypinator	0:bb348c97df44	5181	}
lypinator	0:bb348c97df44	5182
lypinator	0:bb348c97df44	5183	/**
lypinator	0:bb348c97df44	5184	* @brief DMA I2C communication abort callback
lypinator	0:bb348c97df44	5185	* (To be called at end of DMA Abort procedure).
lypinator	0:bb348c97df44	5186	* @param hdma DMA handle.
lypinator	0:bb348c97df44	5187	* @retval None
lypinator	0:bb348c97df44	5188	*/
lypinator	0:bb348c97df44	5189	static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
lypinator	0:bb348c97df44	5190	{
lypinator	0:bb348c97df44	5191	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator	0:bb348c97df44	5192
lypinator	0:bb348c97df44	5193	/* Disable Acknowledge */
lypinator	0:bb348c97df44	5194	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
lypinator	0:bb348c97df44	5195
lypinator	0:bb348c97df44	5196	hi2c->XferCount = 0U;
lypinator	0:bb348c97df44	5197
lypinator	0:bb348c97df44	5198	/* Reset XferAbortCallback */
lypinator	0:bb348c97df44	5199	hi2c->hdmatx->XferAbortCallback = NULL;
lypinator	0:bb348c97df44	5200	hi2c->hdmarx->XferAbortCallback = NULL;
lypinator	0:bb348c97df44	5201
lypinator	0:bb348c97df44	5202	/* Check if come from abort from user */
lypinator	0:bb348c97df44	5203	if(hi2c->State == HAL_I2C_STATE_ABORT)
lypinator	0:bb348c97df44	5204	{
lypinator	0:bb348c97df44	5205	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5206	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	5207	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	5208
lypinator	0:bb348c97df44	5209	/* Disable I2C peripheral to prevent dummy data in buffer */
lypinator	0:bb348c97df44	5210	__HAL_I2C_DISABLE(hi2c);
lypinator	0:bb348c97df44	5211
lypinator	0:bb348c97df44	5212	/* Call the corresponding callback to inform upper layer of End of Transfer */
lypinator	0:bb348c97df44	5213	HAL_I2C_AbortCpltCallback(hi2c);
lypinator	0:bb348c97df44	5214	}
lypinator	0:bb348c97df44	5215	else
lypinator	0:bb348c97df44	5216	{
lypinator	0:bb348c97df44	5217	hi2c->State = HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5218	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	5219
lypinator	0:bb348c97df44	5220	/* Disable I2C peripheral to prevent dummy data in buffer */
lypinator	0:bb348c97df44	5221	__HAL_I2C_DISABLE(hi2c);
lypinator	0:bb348c97df44	5222
lypinator	0:bb348c97df44	5223	/* Call the corresponding callback to inform upper layer of End of Transfer */
lypinator	0:bb348c97df44	5224	HAL_I2C_ErrorCallback(hi2c);
lypinator	0:bb348c97df44	5225	}
lypinator	0:bb348c97df44	5226	}
lypinator	0:bb348c97df44	5227
lypinator	0:bb348c97df44	5228	/**
lypinator	0:bb348c97df44	5229	* @brief This function handles I2C Communication Timeout.
lypinator	0:bb348c97df44	5230	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	5231	* the configuration information for I2C module
lypinator	0:bb348c97df44	5232	* @param Flag specifies the I2C flag to check.
lypinator	0:bb348c97df44	5233	* @param Status The new Flag status (SET or RESET).
lypinator	0:bb348c97df44	5234	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	5235	* @param Tickstart Tick start value
lypinator	0:bb348c97df44	5236	* @retval HAL status
lypinator	0:bb348c97df44	5237	*/
lypinator	0:bb348c97df44	5238	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
lypinator	0:bb348c97df44	5239	{
lypinator	0:bb348c97df44	5240	/* Wait until flag is set */
lypinator	0:bb348c97df44	5241	while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
lypinator	0:bb348c97df44	5242	{
lypinator	0:bb348c97df44	5243	/* Check for the Timeout */
lypinator	0:bb348c97df44	5244	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	5245	{
lypinator	0:bb348c97df44	5246	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
lypinator	0:bb348c97df44	5247	{
lypinator	0:bb348c97df44	5248	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	5249	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5250	hi2c->Mode = HAL_I2C_MODE_NONE;
lypinator	0:bb348c97df44	5251
lypinator	0:bb348c97df44	5252	/* Process Unlocked */
lypinator	0:bb348c97df44	5253	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	5254
lypinator	0:bb348c97df44	5255	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	5256	}
lypinator	0:bb348c97df44	5257	}
lypinator	0:bb348c97df44	5258	}
lypinator	0:bb348c97df44	5259
lypinator	0:bb348c97df44	5260	return HAL_OK;
lypinator	0:bb348c97df44	5261	}
lypinator	0:bb348c97df44	5262
lypinator	0:bb348c97df44	5263	/**
lypinator	0:bb348c97df44	5264	* @brief This function handles I2C Communication Timeout for Master addressing phase.
lypinator	0:bb348c97df44	5265	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	5266	* the configuration information for I2C module
lypinator	0:bb348c97df44	5267	* @param Flag specifies the I2C flag to check.
lypinator	0:bb348c97df44	5268	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	5269	* @param Tickstart Tick start value
lypinator	0:bb348c97df44	5270	* @retval HAL status
lypinator	0:bb348c97df44	5271	*/
lypinator	0:bb348c97df44	5272	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
lypinator	0:bb348c97df44	5273	{
lypinator	0:bb348c97df44	5274	while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
lypinator	0:bb348c97df44	5275	{
lypinator	0:bb348c97df44	5276	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
lypinator	0:bb348c97df44	5277	{
lypinator	0:bb348c97df44	5278	/* Generate Stop */
lypinator	0:bb348c97df44	5279	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
lypinator	0:bb348c97df44	5280
lypinator	0:bb348c97df44	5281	/* Clear AF Flag */
lypinator	0:bb348c97df44	5282	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
lypinator	0:bb348c97df44	5283
lypinator	0:bb348c97df44	5284	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
lypinator	0:bb348c97df44	5285	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	5286	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5287
lypinator	0:bb348c97df44	5288	/* Process Unlocked */
lypinator	0:bb348c97df44	5289	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	5290
lypinator	0:bb348c97df44	5291	return HAL_ERROR;
lypinator	0:bb348c97df44	5292	}
lypinator	0:bb348c97df44	5293
lypinator	0:bb348c97df44	5294	/* Check for the Timeout */
lypinator	0:bb348c97df44	5295	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	5296	{
lypinator	0:bb348c97df44	5297	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
lypinator	0:bb348c97df44	5298	{
lypinator	0:bb348c97df44	5299	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	5300	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5301
lypinator	0:bb348c97df44	5302	/* Process Unlocked */
lypinator	0:bb348c97df44	5303	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	5304
lypinator	0:bb348c97df44	5305	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	5306	}
lypinator	0:bb348c97df44	5307	}
lypinator	0:bb348c97df44	5308	}
lypinator	0:bb348c97df44	5309	return HAL_OK;
lypinator	0:bb348c97df44	5310	}
lypinator	0:bb348c97df44	5311
lypinator	0:bb348c97df44	5312	/**
lypinator	0:bb348c97df44	5313	* @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
lypinator	0:bb348c97df44	5314	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	5315	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	5316	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	5317	* @param Tickstart Tick start value
lypinator	0:bb348c97df44	5318	* @retval HAL status
lypinator	0:bb348c97df44	5319	*/
lypinator	0:bb348c97df44	5320	static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
lypinator	0:bb348c97df44	5321	{
lypinator	0:bb348c97df44	5322	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
lypinator	0:bb348c97df44	5323	{
lypinator	0:bb348c97df44	5324	/* Check if a NACK is detected */
lypinator	0:bb348c97df44	5325	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
lypinator	0:bb348c97df44	5326	{
lypinator	0:bb348c97df44	5327	return HAL_ERROR;
lypinator	0:bb348c97df44	5328	}
lypinator	0:bb348c97df44	5329
lypinator	0:bb348c97df44	5330	/* Check for the Timeout */
lypinator	0:bb348c97df44	5331	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	5332	{
lypinator	0:bb348c97df44	5333	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
lypinator	0:bb348c97df44	5334	{
lypinator	0:bb348c97df44	5335	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
lypinator	0:bb348c97df44	5336	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	5337	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5338
lypinator	0:bb348c97df44	5339	/* Process Unlocked */
lypinator	0:bb348c97df44	5340	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	5341
lypinator	0:bb348c97df44	5342	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	5343	}
lypinator	0:bb348c97df44	5344	}
lypinator	0:bb348c97df44	5345	}
lypinator	0:bb348c97df44	5346	return HAL_OK;
lypinator	0:bb348c97df44	5347	}
lypinator	0:bb348c97df44	5348
lypinator	0:bb348c97df44	5349	/**
lypinator	0:bb348c97df44	5350	* @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
lypinator	0:bb348c97df44	5351	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	5352	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	5353	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	5354	* @param Tickstart Tick start value
lypinator	0:bb348c97df44	5355	* @retval HAL status
lypinator	0:bb348c97df44	5356	*/
lypinator	0:bb348c97df44	5357	static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
lypinator	0:bb348c97df44	5358	{
lypinator	0:bb348c97df44	5359	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
lypinator	0:bb348c97df44	5360	{
lypinator	0:bb348c97df44	5361	/* Check if a NACK is detected */
lypinator	0:bb348c97df44	5362	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
lypinator	0:bb348c97df44	5363	{
lypinator	0:bb348c97df44	5364	return HAL_ERROR;
lypinator	0:bb348c97df44	5365	}
lypinator	0:bb348c97df44	5366
lypinator	0:bb348c97df44	5367	/* Check for the Timeout */
lypinator	0:bb348c97df44	5368	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	5369	{
lypinator	0:bb348c97df44	5370	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
lypinator	0:bb348c97df44	5371	{
lypinator	0:bb348c97df44	5372	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
lypinator	0:bb348c97df44	5373	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	5374	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5375
lypinator	0:bb348c97df44	5376	/* Process Unlocked */
lypinator	0:bb348c97df44	5377	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	5378
lypinator	0:bb348c97df44	5379	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	5380	}
lypinator	0:bb348c97df44	5381	}
lypinator	0:bb348c97df44	5382	}
lypinator	0:bb348c97df44	5383	return HAL_OK;
lypinator	0:bb348c97df44	5384	}
lypinator	0:bb348c97df44	5385
lypinator	0:bb348c97df44	5386	/**
lypinator	0:bb348c97df44	5387	* @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
lypinator	0:bb348c97df44	5388	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	5389	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	5390	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	5391	* @param Tickstart Tick start value
lypinator	0:bb348c97df44	5392	* @retval HAL status
lypinator	0:bb348c97df44	5393	*/
lypinator	0:bb348c97df44	5394	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
lypinator	0:bb348c97df44	5395	{
lypinator	0:bb348c97df44	5396	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
lypinator	0:bb348c97df44	5397	{
lypinator	0:bb348c97df44	5398	/* Check if a NACK is detected */
lypinator	0:bb348c97df44	5399	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
lypinator	0:bb348c97df44	5400	{
lypinator	0:bb348c97df44	5401	return HAL_ERROR;
lypinator	0:bb348c97df44	5402	}
lypinator	0:bb348c97df44	5403
lypinator	0:bb348c97df44	5404	/* Check for the Timeout */
lypinator	0:bb348c97df44	5405	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
lypinator	0:bb348c97df44	5406	{
lypinator	0:bb348c97df44	5407	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
lypinator	0:bb348c97df44	5408	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	5409	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5410
lypinator	0:bb348c97df44	5411	/* Process Unlocked */
lypinator	0:bb348c97df44	5412	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	5413
lypinator	0:bb348c97df44	5414	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	5415	}
lypinator	0:bb348c97df44	5416	}
lypinator	0:bb348c97df44	5417	return HAL_OK;
lypinator	0:bb348c97df44	5418	}
lypinator	0:bb348c97df44	5419
lypinator	0:bb348c97df44	5420	/**
lypinator	0:bb348c97df44	5421	* @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
lypinator	0:bb348c97df44	5422	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	5423	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	5424	* @param Timeout Timeout duration
lypinator	0:bb348c97df44	5425	* @param Tickstart Tick start value
lypinator	0:bb348c97df44	5426	* @retval HAL status
lypinator	0:bb348c97df44	5427	*/
lypinator	0:bb348c97df44	5428	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
lypinator	0:bb348c97df44	5429	{
lypinator	0:bb348c97df44	5430
lypinator	0:bb348c97df44	5431	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
lypinator	0:bb348c97df44	5432	{
lypinator	0:bb348c97df44	5433	/* Check if a STOPF is detected */
lypinator	0:bb348c97df44	5434	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
lypinator	0:bb348c97df44	5435	{
lypinator	0:bb348c97df44	5436	/* Clear STOP Flag */
lypinator	0:bb348c97df44	5437	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
lypinator	0:bb348c97df44	5438
lypinator	0:bb348c97df44	5439	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
lypinator	0:bb348c97df44	5440	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	5441	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5442
lypinator	0:bb348c97df44	5443	/* Process Unlocked */
lypinator	0:bb348c97df44	5444	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	5445
lypinator	0:bb348c97df44	5446	return HAL_ERROR;
lypinator	0:bb348c97df44	5447	}
lypinator	0:bb348c97df44	5448
lypinator	0:bb348c97df44	5449	/* Check for the Timeout */
lypinator	0:bb348c97df44	5450	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
lypinator	0:bb348c97df44	5451	{
lypinator	0:bb348c97df44	5452	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
lypinator	0:bb348c97df44	5453	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5454
lypinator	0:bb348c97df44	5455	/* Process Unlocked */
lypinator	0:bb348c97df44	5456	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	5457
lypinator	0:bb348c97df44	5458	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	5459	}
lypinator	0:bb348c97df44	5460	}
lypinator	0:bb348c97df44	5461	return HAL_OK;
lypinator	0:bb348c97df44	5462	}
lypinator	0:bb348c97df44	5463
lypinator	0:bb348c97df44	5464	/**
lypinator	0:bb348c97df44	5465	* @brief This function handles Acknowledge failed detection during an I2C Communication.
lypinator	0:bb348c97df44	5466	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	5467	* the configuration information for the specified I2C.
lypinator	0:bb348c97df44	5468	* @retval HAL status
lypinator	0:bb348c97df44	5469	*/
lypinator	0:bb348c97df44	5470	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
lypinator	0:bb348c97df44	5471	{
lypinator	0:bb348c97df44	5472	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
lypinator	0:bb348c97df44	5473	{
lypinator	0:bb348c97df44	5474	/* Clear NACKF Flag */
lypinator	0:bb348c97df44	5475	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
lypinator	0:bb348c97df44	5476
lypinator	0:bb348c97df44	5477	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
lypinator	0:bb348c97df44	5478	hi2c->PreviousState = I2C_STATE_NONE;
lypinator	0:bb348c97df44	5479	hi2c->State= HAL_I2C_STATE_READY;
lypinator	0:bb348c97df44	5480
lypinator	0:bb348c97df44	5481	/* Process Unlocked */
lypinator	0:bb348c97df44	5482	__HAL_UNLOCK(hi2c);
lypinator	0:bb348c97df44	5483
lypinator	0:bb348c97df44	5484	return HAL_ERROR;
lypinator	0:bb348c97df44	5485	}
lypinator	0:bb348c97df44	5486	return HAL_OK;
lypinator	0:bb348c97df44	5487	}
lypinator	0:bb348c97df44	5488	/**
lypinator	0:bb348c97df44	5489	* @}
lypinator	0:bb348c97df44	5490	*/
lypinator	0:bb348c97df44	5491
lypinator	0:bb348c97df44	5492	#endif /* HAL_I2C_MODULE_ENABLED */
lypinator	0:bb348c97df44	5493
lypinator	0:bb348c97df44	5494	/**
lypinator	0:bb348c97df44	5495	* @}
lypinator	0:bb348c97df44	5496	*/
lypinator	0:bb348c97df44	5497
lypinator	0:bb348c97df44	5498	/**
lypinator	0:bb348c97df44	5499	* @}
lypinator	0:bb348c97df44	5500	*/
lypinator	0:bb348c97df44	5501
lypinator	0:bb348c97df44	5502	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	16 Sep 2020
Imports:	1
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	1
Followers:	1

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2c.c@0:bb348c97df44, 2020-09-16 (annotated)

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