DevLibMemoryController - Initial commit

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Initial commit

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dsi.h@0:bb348c97df44, 2020-09-16 (annotated)

Committer:: lypinator
Date:: Wed Sep 16 01:11:49 2020 +0000
Revision:: 0:bb348c97df44

Added PWM

Who changed what in which revision?

User	Revision	Line number	New contents of line
lypinator	0:bb348c97df44	1	/**
lypinator	0:bb348c97df44	2	******************************************************************************
lypinator	0:bb348c97df44	3	* @file stm32f4xx_hal_dsi.h
lypinator	0:bb348c97df44	4	* @author MCD Application Team
lypinator	0:bb348c97df44	5	* @brief Header file of DSI HAL module.
lypinator	0:bb348c97df44	6	******************************************************************************
lypinator	0:bb348c97df44	7	* @attention
lypinator	0:bb348c97df44	8	*
lypinator	0:bb348c97df44	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator	0:bb348c97df44	10	*
lypinator	0:bb348c97df44	11	* Redistribution and use in source and binary forms, with or without modification,
lypinator	0:bb348c97df44	12	* are permitted provided that the following conditions are met:
lypinator	0:bb348c97df44	13	* 1. Redistributions of source code must retain the above copyright notice,
lypinator	0:bb348c97df44	14	* this list of conditions and the following disclaimer.
lypinator	0:bb348c97df44	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator	0:bb348c97df44	16	* this list of conditions and the following disclaimer in the documentation
lypinator	0:bb348c97df44	17	* and/or other materials provided with the distribution.
lypinator	0:bb348c97df44	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator	0:bb348c97df44	19	* may be used to endorse or promote products derived from this software
lypinator	0:bb348c97df44	20	* without specific prior written permission.
lypinator	0:bb348c97df44	21	*
lypinator	0:bb348c97df44	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator	0:bb348c97df44	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator	0:bb348c97df44	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator	0:bb348c97df44	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator	0:bb348c97df44	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator	0:bb348c97df44	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator	0:bb348c97df44	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator	0:bb348c97df44	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator	0:bb348c97df44	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator	0:bb348c97df44	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator	0:bb348c97df44	32	*
lypinator	0:bb348c97df44	33	******************************************************************************
lypinator	0:bb348c97df44	34	*/
lypinator	0:bb348c97df44	35
lypinator	0:bb348c97df44	36	/* Define to prevent recursive inclusion -------------------------------------*/
lypinator	0:bb348c97df44	37	#ifndef __STM32F4xx_HAL_DSI_H
lypinator	0:bb348c97df44	38	#define __STM32F4xx_HAL_DSI_H
lypinator	0:bb348c97df44	39
lypinator	0:bb348c97df44	40	#ifdef __cplusplus
lypinator	0:bb348c97df44	41	extern "C" {
lypinator	0:bb348c97df44	42	#endif
lypinator	0:bb348c97df44	43
lypinator	0:bb348c97df44	44	#if defined(DSI)
lypinator	0:bb348c97df44	45	/* Includes ------------------------------------------------------------------*/
lypinator	0:bb348c97df44	46	#include "stm32f4xx_hal_def.h"
lypinator	0:bb348c97df44	47
lypinator	0:bb348c97df44	48	/** @addtogroup STM32F4xx_HAL_Driver
lypinator	0:bb348c97df44	49	* @{
lypinator	0:bb348c97df44	50	*/
lypinator	0:bb348c97df44	51
lypinator	0:bb348c97df44	52	/** @defgroup DSI DSI
lypinator	0:bb348c97df44	53	* @brief DSI HAL module driver
lypinator	0:bb348c97df44	54	* @{
lypinator	0:bb348c97df44	55	*/
lypinator	0:bb348c97df44	56
lypinator	0:bb348c97df44	57	/* Exported types ------------------------------------------------------------*/
lypinator	0:bb348c97df44	58	/**
lypinator	0:bb348c97df44	59	* @brief DSI Init Structure definition
lypinator	0:bb348c97df44	60	*/
lypinator	0:bb348c97df44	61	typedef struct
lypinator	0:bb348c97df44	62	{
lypinator	0:bb348c97df44	63	uint32_t AutomaticClockLaneControl; /*!< Automatic clock lane control
lypinator	0:bb348c97df44	64	This parameter can be any value of @ref DSI_Automatic_Clk_Lane_Control */
lypinator	0:bb348c97df44	65
lypinator	0:bb348c97df44	66	uint32_t TXEscapeCkdiv; /*!< TX Escape clock division
lypinator	0:bb348c97df44	67	The values 0 and 1 stop the TX_ESC clock generation */
lypinator	0:bb348c97df44	68
lypinator	0:bb348c97df44	69	uint32_t NumberOfLanes; /*!< Number of lanes
lypinator	0:bb348c97df44	70	This parameter can be any value of @ref DSI_Number_Of_Lanes */
lypinator	0:bb348c97df44	71
lypinator	0:bb348c97df44	72	}DSI_InitTypeDef;
lypinator	0:bb348c97df44	73
lypinator	0:bb348c97df44	74	/**
lypinator	0:bb348c97df44	75	* @brief DSI PLL Clock structure definition
lypinator	0:bb348c97df44	76	*/
lypinator	0:bb348c97df44	77	typedef struct
lypinator	0:bb348c97df44	78	{
lypinator	0:bb348c97df44	79	uint32_t PLLNDIV; /*!< PLL Loop Division Factor
lypinator	0:bb348c97df44	80	This parameter must be a value between 10 and 125 */
lypinator	0:bb348c97df44	81
lypinator	0:bb348c97df44	82	uint32_t PLLIDF; /*!< PLL Input Division Factor
lypinator	0:bb348c97df44	83	This parameter can be any value of @ref DSI_PLL_IDF */
lypinator	0:bb348c97df44	84
lypinator	0:bb348c97df44	85	uint32_t PLLODF; /*!< PLL Output Division Factor
lypinator	0:bb348c97df44	86	This parameter can be any value of @ref DSI_PLL_ODF */
lypinator	0:bb348c97df44	87
lypinator	0:bb348c97df44	88	}DSI_PLLInitTypeDef;
lypinator	0:bb348c97df44	89
lypinator	0:bb348c97df44	90	/**
lypinator	0:bb348c97df44	91	* @brief DSI Video mode configuration
lypinator	0:bb348c97df44	92	*/
lypinator	0:bb348c97df44	93	typedef struct
lypinator	0:bb348c97df44	94	{
lypinator	0:bb348c97df44	95	uint32_t VirtualChannelID; /!< Virtual channel ID /
lypinator	0:bb348c97df44	96
lypinator	0:bb348c97df44	97	uint32_t ColorCoding; /*!< Color coding for LTDC interface
lypinator	0:bb348c97df44	98	This parameter can be any value of @ref DSI_Color_Coding */
lypinator	0:bb348c97df44	99
lypinator	0:bb348c97df44	100	uint32_t LooselyPacked; /*!< Enable or disable loosely packed stream (needed only when using
lypinator	0:bb348c97df44	101	18-bit configuration).
lypinator	0:bb348c97df44	102	This parameter can be any value of @ref DSI_LooselyPacked */
lypinator	0:bb348c97df44	103
lypinator	0:bb348c97df44	104	uint32_t Mode; /*!< Video mode type
lypinator	0:bb348c97df44	105	This parameter can be any value of @ref DSI_Video_Mode_Type */
lypinator	0:bb348c97df44	106
lypinator	0:bb348c97df44	107	uint32_t PacketSize; /!< Video packet size /
lypinator	0:bb348c97df44	108
lypinator	0:bb348c97df44	109	uint32_t NumberOfChunks; /!< Number of chunks /
lypinator	0:bb348c97df44	110
lypinator	0:bb348c97df44	111	uint32_t NullPacketSize; /!< Null packet size /
lypinator	0:bb348c97df44	112
lypinator	0:bb348c97df44	113	uint32_t HSPolarity; /*!< HSYNC pin polarity
lypinator	0:bb348c97df44	114	This parameter can be any value of @ref DSI_HSYNC_Polarity */
lypinator	0:bb348c97df44	115
lypinator	0:bb348c97df44	116	uint32_t VSPolarity; /*!< VSYNC pin polarity
lypinator	0:bb348c97df44	117	This parameter can be any value of @ref DSI_VSYNC_Active_Polarity */
lypinator	0:bb348c97df44	118
lypinator	0:bb348c97df44	119	uint32_t DEPolarity; /*!< Data Enable pin polarity
lypinator	0:bb348c97df44	120	This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */
lypinator	0:bb348c97df44	121
lypinator	0:bb348c97df44	122	uint32_t HorizontalSyncActive; /!< Horizontal synchronism active duration (in lane byte clock cycles) /
lypinator	0:bb348c97df44	123
lypinator	0:bb348c97df44	124	uint32_t HorizontalBackPorch; /!< Horizontal back-porch duration (in lane byte clock cycles) /
lypinator	0:bb348c97df44	125
lypinator	0:bb348c97df44	126	uint32_t HorizontalLine; /!< Horizontal line duration (in lane byte clock cycles) /
lypinator	0:bb348c97df44	127
lypinator	0:bb348c97df44	128	uint32_t VerticalSyncActive; /!< Vertical synchronism active duration /
lypinator	0:bb348c97df44	129
lypinator	0:bb348c97df44	130	uint32_t VerticalBackPorch; /!< Vertical back-porch duration /
lypinator	0:bb348c97df44	131
lypinator	0:bb348c97df44	132	uint32_t VerticalFrontPorch; /!< Vertical front-porch duration /
lypinator	0:bb348c97df44	133
lypinator	0:bb348c97df44	134	uint32_t VerticalActive; /!< Vertical active duration /
lypinator	0:bb348c97df44	135
lypinator	0:bb348c97df44	136	uint32_t LPCommandEnable; /*!< Low-power command enable
lypinator	0:bb348c97df44	137	This parameter can be any value of @ref DSI_LP_Command */
lypinator	0:bb348c97df44	138
lypinator	0:bb348c97df44	139	uint32_t LPLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that
lypinator	0:bb348c97df44	140	can fit in a line during VSA, VBP and VFP regions */
lypinator	0:bb348c97df44	141
lypinator	0:bb348c97df44	142	uint32_t LPVACTLargestPacketSize; /*!< The size, in bytes, of the low power largest packet that
lypinator	0:bb348c97df44	143	can fit in a line during VACT region */
lypinator	0:bb348c97df44	144
lypinator	0:bb348c97df44	145	uint32_t LPHorizontalFrontPorchEnable; /*!< Low-power horizontal front-porch enable
lypinator	0:bb348c97df44	146	This parameter can be any value of @ref DSI_LP_HFP */
lypinator	0:bb348c97df44	147
lypinator	0:bb348c97df44	148	uint32_t LPHorizontalBackPorchEnable; /*!< Low-power horizontal back-porch enable
lypinator	0:bb348c97df44	149	This parameter can be any value of @ref DSI_LP_HBP */
lypinator	0:bb348c97df44	150
lypinator	0:bb348c97df44	151	uint32_t LPVerticalActiveEnable; /*!< Low-power vertical active enable
lypinator	0:bb348c97df44	152	This parameter can be any value of @ref DSI_LP_VACT */
lypinator	0:bb348c97df44	153
lypinator	0:bb348c97df44	154	uint32_t LPVerticalFrontPorchEnable; /*!< Low-power vertical front-porch enable
lypinator	0:bb348c97df44	155	This parameter can be any value of @ref DSI_LP_VFP */
lypinator	0:bb348c97df44	156
lypinator	0:bb348c97df44	157	uint32_t LPVerticalBackPorchEnable; /*!< Low-power vertical back-porch enable
lypinator	0:bb348c97df44	158	This parameter can be any value of @ref DSI_LP_VBP */
lypinator	0:bb348c97df44	159
lypinator	0:bb348c97df44	160	uint32_t LPVerticalSyncActiveEnable; /*!< Low-power vertical sync active enable
lypinator	0:bb348c97df44	161	This parameter can be any value of @ref DSI_LP_VSYNC */
lypinator	0:bb348c97df44	162
lypinator	0:bb348c97df44	163	uint32_t FrameBTAAcknowledgeEnable; /*!< Frame bus-turn-around acknowledge enable
lypinator	0:bb348c97df44	164	This parameter can be any value of @ref DSI_FBTA_acknowledge */
lypinator	0:bb348c97df44	165
lypinator	0:bb348c97df44	166	}DSI_VidCfgTypeDef;
lypinator	0:bb348c97df44	167
lypinator	0:bb348c97df44	168	/**
lypinator	0:bb348c97df44	169	* @brief DSI Adapted command mode configuration
lypinator	0:bb348c97df44	170	*/
lypinator	0:bb348c97df44	171	typedef struct
lypinator	0:bb348c97df44	172	{
lypinator	0:bb348c97df44	173	uint32_t VirtualChannelID; /!< Virtual channel ID /
lypinator	0:bb348c97df44	174
lypinator	0:bb348c97df44	175	uint32_t ColorCoding; /*!< Color coding for LTDC interface
lypinator	0:bb348c97df44	176	This parameter can be any value of @ref DSI_Color_Coding */
lypinator	0:bb348c97df44	177
lypinator	0:bb348c97df44	178	uint32_t CommandSize; /*!< Maximum allowed size for an LTDC write memory command, measured in
lypinator	0:bb348c97df44	179	pixels. This parameter can be any value between 0x00 and 0xFFFFU */
lypinator	0:bb348c97df44	180
lypinator	0:bb348c97df44	181	uint32_t TearingEffectSource; /*!< Tearing effect source
lypinator	0:bb348c97df44	182	This parameter can be any value of @ref DSI_TearingEffectSource */
lypinator	0:bb348c97df44	183
lypinator	0:bb348c97df44	184	uint32_t TearingEffectPolarity; /*!< Tearing effect pin polarity
lypinator	0:bb348c97df44	185	This parameter can be any value of @ref DSI_TearingEffectPolarity */
lypinator	0:bb348c97df44	186
lypinator	0:bb348c97df44	187	uint32_t HSPolarity; /*!< HSYNC pin polarity
lypinator	0:bb348c97df44	188	This parameter can be any value of @ref DSI_HSYNC_Polarity */
lypinator	0:bb348c97df44	189
lypinator	0:bb348c97df44	190	uint32_t VSPolarity; /*!< VSYNC pin polarity
lypinator	0:bb348c97df44	191	This parameter can be any value of @ref DSI_VSYNC_Active_Polarity */
lypinator	0:bb348c97df44	192
lypinator	0:bb348c97df44	193	uint32_t DEPolarity; /*!< Data Enable pin polarity
lypinator	0:bb348c97df44	194	This parameter can be any value of @ref DSI_DATA_ENABLE_Polarity */
lypinator	0:bb348c97df44	195
lypinator	0:bb348c97df44	196	uint32_t VSyncPol; /*!< VSync edge on which the LTDC is halted
lypinator	0:bb348c97df44	197	This parameter can be any value of @ref DSI_Vsync_Polarity */
lypinator	0:bb348c97df44	198
lypinator	0:bb348c97df44	199	uint32_t AutomaticRefresh; /*!< Automatic refresh mode
lypinator	0:bb348c97df44	200	This parameter can be any value of @ref DSI_AutomaticRefresh */
lypinator	0:bb348c97df44	201
lypinator	0:bb348c97df44	202	uint32_t TEAcknowledgeRequest; /*!< Tearing Effect Acknowledge Request Enable
lypinator	0:bb348c97df44	203	This parameter can be any value of @ref DSI_TE_AcknowledgeRequest */
lypinator	0:bb348c97df44	204
lypinator	0:bb348c97df44	205	}DSI_CmdCfgTypeDef;
lypinator	0:bb348c97df44	206
lypinator	0:bb348c97df44	207	/**
lypinator	0:bb348c97df44	208	* @brief DSI command transmission mode configuration
lypinator	0:bb348c97df44	209	*/
lypinator	0:bb348c97df44	210	typedef struct
lypinator	0:bb348c97df44	211	{
lypinator	0:bb348c97df44	212	uint32_t LPGenShortWriteNoP; /*!< Generic Short Write Zero parameters Transmission
lypinator	0:bb348c97df44	213	This parameter can be any value of @ref DSI_LP_LPGenShortWriteNoP */
lypinator	0:bb348c97df44	214
lypinator	0:bb348c97df44	215	uint32_t LPGenShortWriteOneP; /*!< Generic Short Write One parameter Transmission
lypinator	0:bb348c97df44	216	This parameter can be any value of @ref DSI_LP_LPGenShortWriteOneP */
lypinator	0:bb348c97df44	217
lypinator	0:bb348c97df44	218	uint32_t LPGenShortWriteTwoP; /*!< Generic Short Write Two parameters Transmission
lypinator	0:bb348c97df44	219	This parameter can be any value of @ref DSI_LP_LPGenShortWriteTwoP */
lypinator	0:bb348c97df44	220
lypinator	0:bb348c97df44	221	uint32_t LPGenShortReadNoP; /*!< Generic Short Read Zero parameters Transmission
lypinator	0:bb348c97df44	222	This parameter can be any value of @ref DSI_LP_LPGenShortReadNoP */
lypinator	0:bb348c97df44	223
lypinator	0:bb348c97df44	224	uint32_t LPGenShortReadOneP; /*!< Generic Short Read One parameter Transmission
lypinator	0:bb348c97df44	225	This parameter can be any value of @ref DSI_LP_LPGenShortReadOneP */
lypinator	0:bb348c97df44	226
lypinator	0:bb348c97df44	227	uint32_t LPGenShortReadTwoP; /*!< Generic Short Read Two parameters Transmission
lypinator	0:bb348c97df44	228	This parameter can be any value of @ref DSI_LP_LPGenShortReadTwoP */
lypinator	0:bb348c97df44	229
lypinator	0:bb348c97df44	230	uint32_t LPGenLongWrite; /*!< Generic Long Write Transmission
lypinator	0:bb348c97df44	231	This parameter can be any value of @ref DSI_LP_LPGenLongWrite */
lypinator	0:bb348c97df44	232
lypinator	0:bb348c97df44	233	uint32_t LPDcsShortWriteNoP; /*!< DCS Short Write Zero parameters Transmission
lypinator	0:bb348c97df44	234	This parameter can be any value of @ref DSI_LP_LPDcsShortWriteNoP */
lypinator	0:bb348c97df44	235
lypinator	0:bb348c97df44	236	uint32_t LPDcsShortWriteOneP; /*!< DCS Short Write One parameter Transmission
lypinator	0:bb348c97df44	237	This parameter can be any value of @ref DSI_LP_LPDcsShortWriteOneP */
lypinator	0:bb348c97df44	238
lypinator	0:bb348c97df44	239	uint32_t LPDcsShortReadNoP; /*!< DCS Short Read Zero parameters Transmission
lypinator	0:bb348c97df44	240	This parameter can be any value of @ref DSI_LP_LPDcsShortReadNoP */
lypinator	0:bb348c97df44	241
lypinator	0:bb348c97df44	242	uint32_t LPDcsLongWrite; /*!< DCS Long Write Transmission
lypinator	0:bb348c97df44	243	This parameter can be any value of @ref DSI_LP_LPDcsLongWrite */
lypinator	0:bb348c97df44	244
lypinator	0:bb348c97df44	245	uint32_t LPMaxReadPacket; /*!< Maximum Read Packet Size Transmission
lypinator	0:bb348c97df44	246	This parameter can be any value of @ref DSI_LP_LPMaxReadPacket */
lypinator	0:bb348c97df44	247
lypinator	0:bb348c97df44	248	uint32_t AcknowledgeRequest; /*!< Acknowledge Request Enable
lypinator	0:bb348c97df44	249	This parameter can be any value of @ref DSI_AcknowledgeRequest */
lypinator	0:bb348c97df44	250
lypinator	0:bb348c97df44	251	}DSI_LPCmdTypeDef;
lypinator	0:bb348c97df44	252
lypinator	0:bb348c97df44	253	/**
lypinator	0:bb348c97df44	254	* @brief DSI PHY Timings definition
lypinator	0:bb348c97df44	255	*/
lypinator	0:bb348c97df44	256	typedef struct
lypinator	0:bb348c97df44	257	{
lypinator	0:bb348c97df44	258	uint32_t ClockLaneHS2LPTime; /*!< The maximum time that the D-PHY clock lane takes to go from high-speed
lypinator	0:bb348c97df44	259	to low-power transmission */
lypinator	0:bb348c97df44	260
lypinator	0:bb348c97df44	261	uint32_t ClockLaneLP2HSTime; /*!< The maximum time that the D-PHY clock lane takes to go from low-power
lypinator	0:bb348c97df44	262	to high-speed transmission */
lypinator	0:bb348c97df44	263
lypinator	0:bb348c97df44	264	uint32_t DataLaneHS2LPTime; /*!< The maximum time that the D-PHY data lanes takes to go from high-speed
lypinator	0:bb348c97df44	265	to low-power transmission */
lypinator	0:bb348c97df44	266
lypinator	0:bb348c97df44	267	uint32_t DataLaneLP2HSTime; /*!< The maximum time that the D-PHY data lanes takes to go from low-power
lypinator	0:bb348c97df44	268	to high-speed transmission */
lypinator	0:bb348c97df44	269
lypinator	0:bb348c97df44	270	uint32_t DataLaneMaxReadTime; /!< The maximum time required to perform a read command /
lypinator	0:bb348c97df44	271
lypinator	0:bb348c97df44	272	uint32_t StopWaitTime; /*!< The minimum wait period to request a High-Speed transmission after the
lypinator	0:bb348c97df44	273	Stop state */
lypinator	0:bb348c97df44	274
lypinator	0:bb348c97df44	275	}DSI_PHY_TimerTypeDef;
lypinator	0:bb348c97df44	276
lypinator	0:bb348c97df44	277	/**
lypinator	0:bb348c97df44	278	* @brief DSI HOST Timeouts definition
lypinator	0:bb348c97df44	279	*/
lypinator	0:bb348c97df44	280	typedef struct
lypinator	0:bb348c97df44	281	{
lypinator	0:bb348c97df44	282	uint32_t TimeoutCkdiv; /!< Time-out clock division /
lypinator	0:bb348c97df44	283
lypinator	0:bb348c97df44	284	uint32_t HighSpeedTransmissionTimeout; /!< High-speed transmission time-out /
lypinator	0:bb348c97df44	285
lypinator	0:bb348c97df44	286	uint32_t LowPowerReceptionTimeout; /!< Low-power reception time-out /
lypinator	0:bb348c97df44	287
lypinator	0:bb348c97df44	288	uint32_t HighSpeedReadTimeout; /!< High-speed read time-out /
lypinator	0:bb348c97df44	289
lypinator	0:bb348c97df44	290	uint32_t LowPowerReadTimeout; /!< Low-power read time-out /
lypinator	0:bb348c97df44	291
lypinator	0:bb348c97df44	292	uint32_t HighSpeedWriteTimeout; /!< High-speed write time-out /
lypinator	0:bb348c97df44	293
lypinator	0:bb348c97df44	294	uint32_t HighSpeedWritePrespMode; /*!< High-speed write presp mode
lypinator	0:bb348c97df44	295	This parameter can be any value of @ref DSI_HS_PrespMode */
lypinator	0:bb348c97df44	296
lypinator	0:bb348c97df44	297	uint32_t LowPowerWriteTimeout; /!< Low-speed write time-out /
lypinator	0:bb348c97df44	298
lypinator	0:bb348c97df44	299	uint32_t BTATimeout; /!< BTA time-out /
lypinator	0:bb348c97df44	300
lypinator	0:bb348c97df44	301	}DSI_HOST_TimeoutTypeDef;
lypinator	0:bb348c97df44	302
lypinator	0:bb348c97df44	303	/**
lypinator	0:bb348c97df44	304	* @brief DSI States Structure definition
lypinator	0:bb348c97df44	305	*/
lypinator	0:bb348c97df44	306	typedef enum
lypinator	0:bb348c97df44	307	{
lypinator	0:bb348c97df44	308	HAL_DSI_STATE_RESET = 0x00U,
lypinator	0:bb348c97df44	309	HAL_DSI_STATE_READY = 0x01U,
lypinator	0:bb348c97df44	310	HAL_DSI_STATE_ERROR = 0x02U,
lypinator	0:bb348c97df44	311	HAL_DSI_STATE_BUSY = 0x03U,
lypinator	0:bb348c97df44	312	HAL_DSI_STATE_TIMEOUT = 0x04U
lypinator	0:bb348c97df44	313	}HAL_DSI_StateTypeDef;
lypinator	0:bb348c97df44	314
lypinator	0:bb348c97df44	315	/**
lypinator	0:bb348c97df44	316	* @brief DSI Handle Structure definition
lypinator	0:bb348c97df44	317	*/
lypinator	0:bb348c97df44	318	typedef struct
lypinator	0:bb348c97df44	319	{
lypinator	0:bb348c97df44	320	DSI_TypeDef Instance; /!< Register base address */
lypinator	0:bb348c97df44	321	DSI_InitTypeDef Init; /!< DSI required parameters /
lypinator	0:bb348c97df44	322	HAL_LockTypeDef Lock; /!< DSI peripheral status /
lypinator	0:bb348c97df44	323	__IO HAL_DSI_StateTypeDef State; /!< DSI communication state /
lypinator	0:bb348c97df44	324	__IO uint32_t ErrorCode; /!< DSI Error code /
lypinator	0:bb348c97df44	325	uint32_t ErrorMsk; /!< DSI Error monitoring mask /
lypinator	0:bb348c97df44	326	}DSI_HandleTypeDef;
lypinator	0:bb348c97df44	327
lypinator	0:bb348c97df44	328	/* Exported constants --------------------------------------------------------*/
lypinator	0:bb348c97df44	329	/** @defgroup DSI_DCS_Command DSI DCS Command
lypinator	0:bb348c97df44	330	* @{
lypinator	0:bb348c97df44	331	*/
lypinator	0:bb348c97df44	332	#define DSI_ENTER_IDLE_MODE 0x39U
lypinator	0:bb348c97df44	333	#define DSI_ENTER_INVERT_MODE 0x21U
lypinator	0:bb348c97df44	334	#define DSI_ENTER_NORMAL_MODE 0x13U
lypinator	0:bb348c97df44	335	#define DSI_ENTER_PARTIAL_MODE 0x12U
lypinator	0:bb348c97df44	336	#define DSI_ENTER_SLEEP_MODE 0x10U
lypinator	0:bb348c97df44	337	#define DSI_EXIT_IDLE_MODE 0x38U
lypinator	0:bb348c97df44	338	#define DSI_EXIT_INVERT_MODE 0x20U
lypinator	0:bb348c97df44	339	#define DSI_EXIT_SLEEP_MODE 0x11U
lypinator	0:bb348c97df44	340	#define DSI_GET_3D_CONTROL 0x3FU
lypinator	0:bb348c97df44	341	#define DSI_GET_ADDRESS_MODE 0x0BU
lypinator	0:bb348c97df44	342	#define DSI_GET_BLUE_CHANNEL 0x08U
lypinator	0:bb348c97df44	343	#define DSI_GET_DIAGNOSTIC_RESULT 0x0FU
lypinator	0:bb348c97df44	344	#define DSI_GET_DISPLAY_MODE 0x0DU
lypinator	0:bb348c97df44	345	#define DSI_GET_GREEN_CHANNEL 0x07U
lypinator	0:bb348c97df44	346	#define DSI_GET_PIXEL_FORMAT 0x0CU
lypinator	0:bb348c97df44	347	#define DSI_GET_POWER_MODE 0x0AU
lypinator	0:bb348c97df44	348	#define DSI_GET_RED_CHANNEL 0x06U
lypinator	0:bb348c97df44	349	#define DSI_GET_SCANLINE 0x45U
lypinator	0:bb348c97df44	350	#define DSI_GET_SIGNAL_MODE 0x0EU
lypinator	0:bb348c97df44	351	#define DSI_NOP 0x00U
lypinator	0:bb348c97df44	352	#define DSI_READ_DDB_CONTINUE 0xA8U
lypinator	0:bb348c97df44	353	#define DSI_READ_DDB_START 0xA1U
lypinator	0:bb348c97df44	354	#define DSI_READ_MEMORY_CONTINUE 0x3EU
lypinator	0:bb348c97df44	355	#define DSI_READ_MEMORY_START 0x2EU
lypinator	0:bb348c97df44	356	#define DSI_SET_3D_CONTROL 0x3DU
lypinator	0:bb348c97df44	357	#define DSI_SET_ADDRESS_MODE 0x36U
lypinator	0:bb348c97df44	358	#define DSI_SET_COLUMN_ADDRESS 0x2AU
lypinator	0:bb348c97df44	359	#define DSI_SET_DISPLAY_OFF 0x28U
lypinator	0:bb348c97df44	360	#define DSI_SET_DISPLAY_ON 0x29U
lypinator	0:bb348c97df44	361	#define DSI_SET_GAMMA_CURVE 0x26U
lypinator	0:bb348c97df44	362	#define DSI_SET_PAGE_ADDRESS 0x2BU
lypinator	0:bb348c97df44	363	#define DSI_SET_PARTIAL_COLUMNS 0x31U
lypinator	0:bb348c97df44	364	#define DSI_SET_PARTIAL_ROWS 0x30U
lypinator	0:bb348c97df44	365	#define DSI_SET_PIXEL_FORMAT 0x3AU
lypinator	0:bb348c97df44	366	#define DSI_SET_SCROLL_AREA 0x33U
lypinator	0:bb348c97df44	367	#define DSI_SET_SCROLL_START 0x37U
lypinator	0:bb348c97df44	368	#define DSI_SET_TEAR_OFF 0x34U
lypinator	0:bb348c97df44	369	#define DSI_SET_TEAR_ON 0x35U
lypinator	0:bb348c97df44	370	#define DSI_SET_TEAR_SCANLINE 0x44U
lypinator	0:bb348c97df44	371	#define DSI_SET_VSYNC_TIMING 0x40U
lypinator	0:bb348c97df44	372	#define DSI_SOFT_RESET 0x01U
lypinator	0:bb348c97df44	373	#define DSI_WRITE_LUT 0x2DU
lypinator	0:bb348c97df44	374	#define DSI_WRITE_MEMORY_CONTINUE 0x3CU
lypinator	0:bb348c97df44	375	#define DSI_WRITE_MEMORY_START 0x2CU
lypinator	0:bb348c97df44	376	/**
lypinator	0:bb348c97df44	377	* @}
lypinator	0:bb348c97df44	378	*/
lypinator	0:bb348c97df44	379
lypinator	0:bb348c97df44	380	/** @defgroup DSI_Video_Mode_Type DSI Video Mode Type
lypinator	0:bb348c97df44	381	* @{
lypinator	0:bb348c97df44	382	*/
lypinator	0:bb348c97df44	383	#define DSI_VID_MODE_NB_PULSES 0U
lypinator	0:bb348c97df44	384	#define DSI_VID_MODE_NB_EVENTS 1U
lypinator	0:bb348c97df44	385	#define DSI_VID_MODE_BURST 2U
lypinator	0:bb348c97df44	386	/**
lypinator	0:bb348c97df44	387	* @}
lypinator	0:bb348c97df44	388	*/
lypinator	0:bb348c97df44	389
lypinator	0:bb348c97df44	390	/** @defgroup DSI_Color_Mode DSI Color Mode
lypinator	0:bb348c97df44	391	* @{
lypinator	0:bb348c97df44	392	*/
lypinator	0:bb348c97df44	393	#define DSI_COLOR_MODE_FULL 0x00000000U
lypinator	0:bb348c97df44	394	#define DSI_COLOR_MODE_EIGHT DSI_WCR_COLM
lypinator	0:bb348c97df44	395	/**
lypinator	0:bb348c97df44	396	* @}
lypinator	0:bb348c97df44	397	*/
lypinator	0:bb348c97df44	398
lypinator	0:bb348c97df44	399	/** @defgroup DSI_ShutDown DSI ShutDown
lypinator	0:bb348c97df44	400	* @{
lypinator	0:bb348c97df44	401	*/
lypinator	0:bb348c97df44	402	#define DSI_DISPLAY_ON 0x00000000U
lypinator	0:bb348c97df44	403	#define DSI_DISPLAY_OFF DSI_WCR_SHTDN
lypinator	0:bb348c97df44	404	/**
lypinator	0:bb348c97df44	405	* @}
lypinator	0:bb348c97df44	406	*/
lypinator	0:bb348c97df44	407
lypinator	0:bb348c97df44	408	/** @defgroup DSI_LP_Command DSI LP Command
lypinator	0:bb348c97df44	409	* @{
lypinator	0:bb348c97df44	410	*/
lypinator	0:bb348c97df44	411	#define DSI_LP_COMMAND_DISABLE 0x00000000U
lypinator	0:bb348c97df44	412	#define DSI_LP_COMMAND_ENABLE DSI_VMCR_LPCE
lypinator	0:bb348c97df44	413	/**
lypinator	0:bb348c97df44	414	* @}
lypinator	0:bb348c97df44	415	*/
lypinator	0:bb348c97df44	416
lypinator	0:bb348c97df44	417	/** @defgroup DSI_LP_HFP DSI LP HFP
lypinator	0:bb348c97df44	418	* @{
lypinator	0:bb348c97df44	419	*/
lypinator	0:bb348c97df44	420	#define DSI_LP_HFP_DISABLE 0x00000000U
lypinator	0:bb348c97df44	421	#define DSI_LP_HFP_ENABLE DSI_VMCR_LPHFPE
lypinator	0:bb348c97df44	422	/**
lypinator	0:bb348c97df44	423	* @}
lypinator	0:bb348c97df44	424	*/
lypinator	0:bb348c97df44	425
lypinator	0:bb348c97df44	426	/** @defgroup DSI_LP_HBP DSI LP HBP
lypinator	0:bb348c97df44	427	* @{
lypinator	0:bb348c97df44	428	*/
lypinator	0:bb348c97df44	429	#define DSI_LP_HBP_DISABLE 0x00000000U
lypinator	0:bb348c97df44	430	#define DSI_LP_HBP_ENABLE DSI_VMCR_LPHBPE
lypinator	0:bb348c97df44	431	/**
lypinator	0:bb348c97df44	432	* @}
lypinator	0:bb348c97df44	433	*/
lypinator	0:bb348c97df44	434
lypinator	0:bb348c97df44	435	/** @defgroup DSI_LP_VACT DSI LP VACT
lypinator	0:bb348c97df44	436	* @{
lypinator	0:bb348c97df44	437	*/
lypinator	0:bb348c97df44	438	#define DSI_LP_VACT_DISABLE 0x00000000U
lypinator	0:bb348c97df44	439	#define DSI_LP_VACT_ENABLE DSI_VMCR_LPVAE
lypinator	0:bb348c97df44	440	/**
lypinator	0:bb348c97df44	441	* @}
lypinator	0:bb348c97df44	442	*/
lypinator	0:bb348c97df44	443
lypinator	0:bb348c97df44	444	/** @defgroup DSI_LP_VFP DSI LP VFP
lypinator	0:bb348c97df44	445	* @{
lypinator	0:bb348c97df44	446	*/
lypinator	0:bb348c97df44	447	#define DSI_LP_VFP_DISABLE 0x00000000U
lypinator	0:bb348c97df44	448	#define DSI_LP_VFP_ENABLE DSI_VMCR_LPVFPE
lypinator	0:bb348c97df44	449	/**
lypinator	0:bb348c97df44	450	* @}
lypinator	0:bb348c97df44	451	*/
lypinator	0:bb348c97df44	452
lypinator	0:bb348c97df44	453	/** @defgroup DSI_LP_VBP DSI LP VBP
lypinator	0:bb348c97df44	454	* @{
lypinator	0:bb348c97df44	455	*/
lypinator	0:bb348c97df44	456	#define DSI_LP_VBP_DISABLE 0x00000000U
lypinator	0:bb348c97df44	457	#define DSI_LP_VBP_ENABLE DSI_VMCR_LPVBPE
lypinator	0:bb348c97df44	458	/**
lypinator	0:bb348c97df44	459	* @}
lypinator	0:bb348c97df44	460	*/
lypinator	0:bb348c97df44	461
lypinator	0:bb348c97df44	462	/** @defgroup DSI_LP_VSYNC DSI LP VSYNC
lypinator	0:bb348c97df44	463	* @{
lypinator	0:bb348c97df44	464	*/
lypinator	0:bb348c97df44	465	#define DSI_LP_VSYNC_DISABLE 0x00000000U
lypinator	0:bb348c97df44	466	#define DSI_LP_VSYNC_ENABLE DSI_VMCR_LPVSAE
lypinator	0:bb348c97df44	467	/**
lypinator	0:bb348c97df44	468	* @}
lypinator	0:bb348c97df44	469	*/
lypinator	0:bb348c97df44	470
lypinator	0:bb348c97df44	471	/** @defgroup DSI_FBTA_acknowledge DSI FBTA Acknowledge
lypinator	0:bb348c97df44	472	* @{
lypinator	0:bb348c97df44	473	*/
lypinator	0:bb348c97df44	474	#define DSI_FBTAA_DISABLE 0x00000000U
lypinator	0:bb348c97df44	475	#define DSI_FBTAA_ENABLE DSI_VMCR_FBTAAE
lypinator	0:bb348c97df44	476	/**
lypinator	0:bb348c97df44	477	* @}
lypinator	0:bb348c97df44	478	*/
lypinator	0:bb348c97df44	479
lypinator	0:bb348c97df44	480	/** @defgroup DSI_TearingEffectSource DSI Tearing Effect Source
lypinator	0:bb348c97df44	481	* @{
lypinator	0:bb348c97df44	482	*/
lypinator	0:bb348c97df44	483	#define DSI_TE_DSILINK 0x00000000U
lypinator	0:bb348c97df44	484	#define DSI_TE_EXTERNAL DSI_WCFGR_TESRC
lypinator	0:bb348c97df44	485	/**
lypinator	0:bb348c97df44	486	* @}
lypinator	0:bb348c97df44	487	*/
lypinator	0:bb348c97df44	488
lypinator	0:bb348c97df44	489	/** @defgroup DSI_TearingEffectPolarity DSI Tearing Effect Polarity
lypinator	0:bb348c97df44	490	* @{
lypinator	0:bb348c97df44	491	*/
lypinator	0:bb348c97df44	492	#define DSI_TE_RISING_EDGE 0x00000000U
lypinator	0:bb348c97df44	493	#define DSI_TE_FALLING_EDGE DSI_WCFGR_TEPOL
lypinator	0:bb348c97df44	494	/**
lypinator	0:bb348c97df44	495	* @}
lypinator	0:bb348c97df44	496	*/
lypinator	0:bb348c97df44	497
lypinator	0:bb348c97df44	498	/** @defgroup DSI_Vsync_Polarity DSI Vsync Polarity
lypinator	0:bb348c97df44	499	* @{
lypinator	0:bb348c97df44	500	*/
lypinator	0:bb348c97df44	501	#define DSI_VSYNC_FALLING 0x00000000U
lypinator	0:bb348c97df44	502	#define DSI_VSYNC_RISING DSI_WCFGR_VSPOL
lypinator	0:bb348c97df44	503	/**
lypinator	0:bb348c97df44	504	* @}
lypinator	0:bb348c97df44	505	*/
lypinator	0:bb348c97df44	506
lypinator	0:bb348c97df44	507	/** @defgroup DSI_AutomaticRefresh DSI Automatic Refresh
lypinator	0:bb348c97df44	508	* @{
lypinator	0:bb348c97df44	509	*/
lypinator	0:bb348c97df44	510	#define DSI_AR_DISABLE 0x00000000U
lypinator	0:bb348c97df44	511	#define DSI_AR_ENABLE DSI_WCFGR_AR
lypinator	0:bb348c97df44	512	/**
lypinator	0:bb348c97df44	513	* @}
lypinator	0:bb348c97df44	514	*/
lypinator	0:bb348c97df44	515
lypinator	0:bb348c97df44	516	/** @defgroup DSI_TE_AcknowledgeRequest DSI TE Acknowledge Request
lypinator	0:bb348c97df44	517	* @{
lypinator	0:bb348c97df44	518	*/
lypinator	0:bb348c97df44	519	#define DSI_TE_ACKNOWLEDGE_DISABLE 0x00000000U
lypinator	0:bb348c97df44	520	#define DSI_TE_ACKNOWLEDGE_ENABLE DSI_CMCR_TEARE
lypinator	0:bb348c97df44	521	/**
lypinator	0:bb348c97df44	522	* @}
lypinator	0:bb348c97df44	523	*/
lypinator	0:bb348c97df44	524
lypinator	0:bb348c97df44	525	/** @defgroup DSI_AcknowledgeRequest DSI Acknowledge Request
lypinator	0:bb348c97df44	526	* @{
lypinator	0:bb348c97df44	527	*/
lypinator	0:bb348c97df44	528	#define DSI_ACKNOWLEDGE_DISABLE 0x00000000U
lypinator	0:bb348c97df44	529	#define DSI_ACKNOWLEDGE_ENABLE DSI_CMCR_ARE
lypinator	0:bb348c97df44	530	/**
lypinator	0:bb348c97df44	531	* @}
lypinator	0:bb348c97df44	532	*/
lypinator	0:bb348c97df44	533
lypinator	0:bb348c97df44	534	/** @defgroup DSI_LP_LPGenShortWriteNoP DSI LP LPGen Short Write NoP
lypinator	0:bb348c97df44	535	* @{
lypinator	0:bb348c97df44	536	*/
lypinator	0:bb348c97df44	537	#define DSI_LP_GSW0P_DISABLE 0x00000000U
lypinator	0:bb348c97df44	538	#define DSI_LP_GSW0P_ENABLE DSI_CMCR_GSW0TX
lypinator	0:bb348c97df44	539	/**
lypinator	0:bb348c97df44	540	* @}
lypinator	0:bb348c97df44	541	*/
lypinator	0:bb348c97df44	542
lypinator	0:bb348c97df44	543	/** @defgroup DSI_LP_LPGenShortWriteOneP DSI LP LPGen Short Write OneP
lypinator	0:bb348c97df44	544	* @{
lypinator	0:bb348c97df44	545	*/
lypinator	0:bb348c97df44	546	#define DSI_LP_GSW1P_DISABLE 0x00000000U
lypinator	0:bb348c97df44	547	#define DSI_LP_GSW1P_ENABLE DSI_CMCR_GSW1TX
lypinator	0:bb348c97df44	548	/**
lypinator	0:bb348c97df44	549	* @}
lypinator	0:bb348c97df44	550	*/
lypinator	0:bb348c97df44	551
lypinator	0:bb348c97df44	552	/** @defgroup DSI_LP_LPGenShortWriteTwoP DSI LP LPGen Short Write TwoP
lypinator	0:bb348c97df44	553	* @{
lypinator	0:bb348c97df44	554	*/
lypinator	0:bb348c97df44	555	#define DSI_LP_GSW2P_DISABLE 0x00000000U
lypinator	0:bb348c97df44	556	#define DSI_LP_GSW2P_ENABLE DSI_CMCR_GSW2TX
lypinator	0:bb348c97df44	557	/**
lypinator	0:bb348c97df44	558	* @}
lypinator	0:bb348c97df44	559	*/
lypinator	0:bb348c97df44	560
lypinator	0:bb348c97df44	561	/** @defgroup DSI_LP_LPGenShortReadNoP DSI LP LPGen Short Read NoP
lypinator	0:bb348c97df44	562	* @{
lypinator	0:bb348c97df44	563	*/
lypinator	0:bb348c97df44	564	#define DSI_LP_GSR0P_DISABLE 0x00000000U
lypinator	0:bb348c97df44	565	#define DSI_LP_GSR0P_ENABLE DSI_CMCR_GSR0TX
lypinator	0:bb348c97df44	566	/**
lypinator	0:bb348c97df44	567	* @}
lypinator	0:bb348c97df44	568	*/
lypinator	0:bb348c97df44	569
lypinator	0:bb348c97df44	570	/** @defgroup DSI_LP_LPGenShortReadOneP DSI LP LPGen Short Read OneP
lypinator	0:bb348c97df44	571	* @{
lypinator	0:bb348c97df44	572	*/
lypinator	0:bb348c97df44	573	#define DSI_LP_GSR1P_DISABLE 0x00000000U
lypinator	0:bb348c97df44	574	#define DSI_LP_GSR1P_ENABLE DSI_CMCR_GSR1TX
lypinator	0:bb348c97df44	575	/**
lypinator	0:bb348c97df44	576	* @}
lypinator	0:bb348c97df44	577	*/
lypinator	0:bb348c97df44	578
lypinator	0:bb348c97df44	579	/** @defgroup DSI_LP_LPGenShortReadTwoP DSI LP LPGen Short Read TwoP
lypinator	0:bb348c97df44	580	* @{
lypinator	0:bb348c97df44	581	*/
lypinator	0:bb348c97df44	582	#define DSI_LP_GSR2P_DISABLE 0x00000000U
lypinator	0:bb348c97df44	583	#define DSI_LP_GSR2P_ENABLE DSI_CMCR_GSR2TX
lypinator	0:bb348c97df44	584	/**
lypinator	0:bb348c97df44	585	* @}
lypinator	0:bb348c97df44	586	*/
lypinator	0:bb348c97df44	587
lypinator	0:bb348c97df44	588	/** @defgroup DSI_LP_LPGenLongWrite DSI LP LPGen LongWrite
lypinator	0:bb348c97df44	589	* @{
lypinator	0:bb348c97df44	590	*/
lypinator	0:bb348c97df44	591	#define DSI_LP_GLW_DISABLE 0x00000000U
lypinator	0:bb348c97df44	592	#define DSI_LP_GLW_ENABLE DSI_CMCR_GLWTX
lypinator	0:bb348c97df44	593	/**
lypinator	0:bb348c97df44	594	* @}
lypinator	0:bb348c97df44	595	*/
lypinator	0:bb348c97df44	596
lypinator	0:bb348c97df44	597	/** @defgroup DSI_LP_LPDcsShortWriteNoP DSI LP LPDcs Short Write NoP
lypinator	0:bb348c97df44	598	* @{
lypinator	0:bb348c97df44	599	*/
lypinator	0:bb348c97df44	600	#define DSI_LP_DSW0P_DISABLE 0x00000000U
lypinator	0:bb348c97df44	601	#define DSI_LP_DSW0P_ENABLE DSI_CMCR_DSW0TX
lypinator	0:bb348c97df44	602	/**
lypinator	0:bb348c97df44	603	* @}
lypinator	0:bb348c97df44	604	*/
lypinator	0:bb348c97df44	605
lypinator	0:bb348c97df44	606	/** @defgroup DSI_LP_LPDcsShortWriteOneP DSI LP LPDcs Short Write OneP
lypinator	0:bb348c97df44	607	* @{
lypinator	0:bb348c97df44	608	*/
lypinator	0:bb348c97df44	609	#define DSI_LP_DSW1P_DISABLE 0x00000000U
lypinator	0:bb348c97df44	610	#define DSI_LP_DSW1P_ENABLE DSI_CMCR_DSW1TX
lypinator	0:bb348c97df44	611	/**
lypinator	0:bb348c97df44	612	* @}
lypinator	0:bb348c97df44	613	*/
lypinator	0:bb348c97df44	614
lypinator	0:bb348c97df44	615	/** @defgroup DSI_LP_LPDcsShortReadNoP DSI LP LPDcs Short Read NoP
lypinator	0:bb348c97df44	616	* @{
lypinator	0:bb348c97df44	617	*/
lypinator	0:bb348c97df44	618	#define DSI_LP_DSR0P_DISABLE 0x00000000U
lypinator	0:bb348c97df44	619	#define DSI_LP_DSR0P_ENABLE DSI_CMCR_DSR0TX
lypinator	0:bb348c97df44	620	/**
lypinator	0:bb348c97df44	621	* @}
lypinator	0:bb348c97df44	622	*/
lypinator	0:bb348c97df44	623
lypinator	0:bb348c97df44	624	/** @defgroup DSI_LP_LPDcsLongWrite DSI LP LPDcs Long Write
lypinator	0:bb348c97df44	625	* @{
lypinator	0:bb348c97df44	626	*/
lypinator	0:bb348c97df44	627	#define DSI_LP_DLW_DISABLE 0x00000000U
lypinator	0:bb348c97df44	628	#define DSI_LP_DLW_ENABLE DSI_CMCR_DLWTX
lypinator	0:bb348c97df44	629	/**
lypinator	0:bb348c97df44	630	* @}
lypinator	0:bb348c97df44	631	*/
lypinator	0:bb348c97df44	632
lypinator	0:bb348c97df44	633	/** @defgroup DSI_LP_LPMaxReadPacket DSI LP LPMax Read Packet
lypinator	0:bb348c97df44	634	* @{
lypinator	0:bb348c97df44	635	*/
lypinator	0:bb348c97df44	636	#define DSI_LP_MRDP_DISABLE 0x00000000U
lypinator	0:bb348c97df44	637	#define DSI_LP_MRDP_ENABLE DSI_CMCR_MRDPS
lypinator	0:bb348c97df44	638	/**
lypinator	0:bb348c97df44	639	* @}
lypinator	0:bb348c97df44	640	*/
lypinator	0:bb348c97df44	641
lypinator	0:bb348c97df44	642	/** @defgroup DSI_HS_PrespMode DSI HS Presp Mode
lypinator	0:bb348c97df44	643	* @{
lypinator	0:bb348c97df44	644	*/
lypinator	0:bb348c97df44	645	#define DSI_HS_PM_DISABLE 0x00000000U
lypinator	0:bb348c97df44	646	#define DSI_HS_PM_ENABLE DSI_TCCR3_PM
lypinator	0:bb348c97df44	647	/**
lypinator	0:bb348c97df44	648	* @}
lypinator	0:bb348c97df44	649	*/
lypinator	0:bb348c97df44	650
lypinator	0:bb348c97df44	651
lypinator	0:bb348c97df44	652	/** @defgroup DSI_Automatic_Clk_Lane_Control DSI Automatic Clk Lane Control
lypinator	0:bb348c97df44	653	* @{
lypinator	0:bb348c97df44	654	*/
lypinator	0:bb348c97df44	655	#define DSI_AUTO_CLK_LANE_CTRL_DISABLE 0x00000000U
lypinator	0:bb348c97df44	656	#define DSI_AUTO_CLK_LANE_CTRL_ENABLE DSI_CLCR_ACR
lypinator	0:bb348c97df44	657	/**
lypinator	0:bb348c97df44	658	* @}
lypinator	0:bb348c97df44	659	*/
lypinator	0:bb348c97df44	660
lypinator	0:bb348c97df44	661	/** @defgroup DSI_Number_Of_Lanes DSI Number Of Lanes
lypinator	0:bb348c97df44	662	* @{
lypinator	0:bb348c97df44	663	*/
lypinator	0:bb348c97df44	664	#define DSI_ONE_DATA_LANE 0U
lypinator	0:bb348c97df44	665	#define DSI_TWO_DATA_LANES 1U
lypinator	0:bb348c97df44	666	/**
lypinator	0:bb348c97df44	667	* @}
lypinator	0:bb348c97df44	668	*/
lypinator	0:bb348c97df44	669
lypinator	0:bb348c97df44	670	/** @defgroup DSI_FlowControl DSI Flow Control
lypinator	0:bb348c97df44	671	* @{
lypinator	0:bb348c97df44	672	*/
lypinator	0:bb348c97df44	673	#define DSI_FLOW_CONTROL_CRC_RX DSI_PCR_CRCRXE
lypinator	0:bb348c97df44	674	#define DSI_FLOW_CONTROL_ECC_RX DSI_PCR_ECCRXE
lypinator	0:bb348c97df44	675	#define DSI_FLOW_CONTROL_BTA DSI_PCR_BTAE
lypinator	0:bb348c97df44	676	#define DSI_FLOW_CONTROL_EOTP_RX DSI_PCR_ETRXE
lypinator	0:bb348c97df44	677	#define DSI_FLOW_CONTROL_EOTP_TX DSI_PCR_ETTXE
lypinator	0:bb348c97df44	678	#define DSI_FLOW_CONTROL_ALL (DSI_FLOW_CONTROL_CRC_RX \| DSI_FLOW_CONTROL_ECC_RX \| \
lypinator	0:bb348c97df44	679	DSI_FLOW_CONTROL_BTA \| DSI_FLOW_CONTROL_EOTP_RX \| \
lypinator	0:bb348c97df44	680	DSI_FLOW_CONTROL_EOTP_TX)
lypinator	0:bb348c97df44	681	/**
lypinator	0:bb348c97df44	682	* @}
lypinator	0:bb348c97df44	683	*/
lypinator	0:bb348c97df44	684
lypinator	0:bb348c97df44	685	/** @defgroup DSI_Color_Coding DSI Color Coding
lypinator	0:bb348c97df44	686	* @{
lypinator	0:bb348c97df44	687	*/
lypinator	0:bb348c97df44	688	#define DSI_RGB565 0x00000000U /!< The values 0x00000001 and 0x00000002 can also be used for the RGB565 color mode configuration /
lypinator	0:bb348c97df44	689	#define DSI_RGB666 0x00000003U /!< The value 0x00000004 can also be used for the RGB666 color mode configuration /
lypinator	0:bb348c97df44	690	#define DSI_RGB888 0x00000005U
lypinator	0:bb348c97df44	691	/**
lypinator	0:bb348c97df44	692	* @}
lypinator	0:bb348c97df44	693	*/
lypinator	0:bb348c97df44	694
lypinator	0:bb348c97df44	695	/** @defgroup DSI_LooselyPacked DSI Loosely Packed
lypinator	0:bb348c97df44	696	* @{
lypinator	0:bb348c97df44	697	*/
lypinator	0:bb348c97df44	698	#define DSI_LOOSELY_PACKED_ENABLE DSI_LCOLCR_LPE
lypinator	0:bb348c97df44	699	#define DSI_LOOSELY_PACKED_DISABLE 0x00000000U
lypinator	0:bb348c97df44	700	/**
lypinator	0:bb348c97df44	701	* @}
lypinator	0:bb348c97df44	702	*/
lypinator	0:bb348c97df44	703
lypinator	0:bb348c97df44	704	/** @defgroup DSI_HSYNC_Polarity DSI HSYNC Polarity
lypinator	0:bb348c97df44	705	* @{
lypinator	0:bb348c97df44	706	*/
lypinator	0:bb348c97df44	707	#define DSI_HSYNC_ACTIVE_HIGH 0x00000000U
lypinator	0:bb348c97df44	708	#define DSI_HSYNC_ACTIVE_LOW DSI_LPCR_HSP
lypinator	0:bb348c97df44	709	/**
lypinator	0:bb348c97df44	710	* @}
lypinator	0:bb348c97df44	711	*/
lypinator	0:bb348c97df44	712
lypinator	0:bb348c97df44	713	/** @defgroup DSI_VSYNC_Active_Polarity DSI VSYNC Active Polarity
lypinator	0:bb348c97df44	714	* @{
lypinator	0:bb348c97df44	715	*/
lypinator	0:bb348c97df44	716	#define DSI_VSYNC_ACTIVE_HIGH 0x00000000U
lypinator	0:bb348c97df44	717	#define DSI_VSYNC_ACTIVE_LOW DSI_LPCR_VSP
lypinator	0:bb348c97df44	718	/**
lypinator	0:bb348c97df44	719	* @}
lypinator	0:bb348c97df44	720	*/
lypinator	0:bb348c97df44	721
lypinator	0:bb348c97df44	722	/** @defgroup DSI_DATA_ENABLE_Polarity DSI DATA ENABLE Polarity
lypinator	0:bb348c97df44	723	* @{
lypinator	0:bb348c97df44	724	*/
lypinator	0:bb348c97df44	725	#define DSI_DATA_ENABLE_ACTIVE_HIGH 0x00000000U
lypinator	0:bb348c97df44	726	#define DSI_DATA_ENABLE_ACTIVE_LOW DSI_LPCR_DEP
lypinator	0:bb348c97df44	727	/**
lypinator	0:bb348c97df44	728	* @}
lypinator	0:bb348c97df44	729	*/
lypinator	0:bb348c97df44	730
lypinator	0:bb348c97df44	731	/** @defgroup DSI_PLL_IDF DSI PLL IDF
lypinator	0:bb348c97df44	732	* @{
lypinator	0:bb348c97df44	733	*/
lypinator	0:bb348c97df44	734	#define DSI_PLL_IN_DIV1 0x00000001U
lypinator	0:bb348c97df44	735	#define DSI_PLL_IN_DIV2 0x00000002U
lypinator	0:bb348c97df44	736	#define DSI_PLL_IN_DIV3 0x00000003U
lypinator	0:bb348c97df44	737	#define DSI_PLL_IN_DIV4 0x00000004U
lypinator	0:bb348c97df44	738	#define DSI_PLL_IN_DIV5 0x00000005U
lypinator	0:bb348c97df44	739	#define DSI_PLL_IN_DIV6 0x00000006U
lypinator	0:bb348c97df44	740	#define DSI_PLL_IN_DIV7 0x00000007U
lypinator	0:bb348c97df44	741	/**
lypinator	0:bb348c97df44	742	* @}
lypinator	0:bb348c97df44	743	*/
lypinator	0:bb348c97df44	744
lypinator	0:bb348c97df44	745	/** @defgroup DSI_PLL_ODF DSI PLL ODF
lypinator	0:bb348c97df44	746	* @{
lypinator	0:bb348c97df44	747	*/
lypinator	0:bb348c97df44	748	#define DSI_PLL_OUT_DIV1 0x00000000U
lypinator	0:bb348c97df44	749	#define DSI_PLL_OUT_DIV2 0x00000001U
lypinator	0:bb348c97df44	750	#define DSI_PLL_OUT_DIV4 0x00000002U
lypinator	0:bb348c97df44	751	#define DSI_PLL_OUT_DIV8 0x00000003U
lypinator	0:bb348c97df44	752	/**
lypinator	0:bb348c97df44	753	* @}
lypinator	0:bb348c97df44	754	*/
lypinator	0:bb348c97df44	755
lypinator	0:bb348c97df44	756	/** @defgroup DSI_Flags DSI Flags
lypinator	0:bb348c97df44	757	* @{
lypinator	0:bb348c97df44	758	*/
lypinator	0:bb348c97df44	759	#define DSI_FLAG_TE DSI_WISR_TEIF
lypinator	0:bb348c97df44	760	#define DSI_FLAG_ER DSI_WISR_ERIF
lypinator	0:bb348c97df44	761	#define DSI_FLAG_BUSY DSI_WISR_BUSY
lypinator	0:bb348c97df44	762	#define DSI_FLAG_PLLLS DSI_WISR_PLLLS
lypinator	0:bb348c97df44	763	#define DSI_FLAG_PLLL DSI_WISR_PLLLIF
lypinator	0:bb348c97df44	764	#define DSI_FLAG_PLLU DSI_WISR_PLLUIF
lypinator	0:bb348c97df44	765	#define DSI_FLAG_RRS DSI_WISR_RRS
lypinator	0:bb348c97df44	766	#define DSI_FLAG_RR DSI_WISR_RRIF
lypinator	0:bb348c97df44	767	/**
lypinator	0:bb348c97df44	768	* @}
lypinator	0:bb348c97df44	769	*/
lypinator	0:bb348c97df44	770
lypinator	0:bb348c97df44	771	/** @defgroup DSI_Interrupts DSI Interrupts
lypinator	0:bb348c97df44	772	* @{
lypinator	0:bb348c97df44	773	*/
lypinator	0:bb348c97df44	774	#define DSI_IT_TE DSI_WIER_TEIE
lypinator	0:bb348c97df44	775	#define DSI_IT_ER DSI_WIER_ERIE
lypinator	0:bb348c97df44	776	#define DSI_IT_PLLL DSI_WIER_PLLLIE
lypinator	0:bb348c97df44	777	#define DSI_IT_PLLU DSI_WIER_PLLUIE
lypinator	0:bb348c97df44	778	#define DSI_IT_RR DSI_WIER_RRIE
lypinator	0:bb348c97df44	779	/**
lypinator	0:bb348c97df44	780	* @}
lypinator	0:bb348c97df44	781	*/
lypinator	0:bb348c97df44	782
lypinator	0:bb348c97df44	783	/** @defgroup DSI_SHORT_WRITE_PKT_Data_Type DSI SHORT WRITE PKT Data Type
lypinator	0:bb348c97df44	784	* @{
lypinator	0:bb348c97df44	785	*/
lypinator	0:bb348c97df44	786	#define DSI_DCS_SHORT_PKT_WRITE_P0 0x00000005U /!< DCS short write, no parameters /
lypinator	0:bb348c97df44	787	#define DSI_DCS_SHORT_PKT_WRITE_P1 0x00000015U /!< DCS short write, one parameter /
lypinator	0:bb348c97df44	788	#define DSI_GEN_SHORT_PKT_WRITE_P0 0x00000003U /!< Generic short write, no parameters /
lypinator	0:bb348c97df44	789	#define DSI_GEN_SHORT_PKT_WRITE_P1 0x00000013U /!< Generic short write, one parameter /
lypinator	0:bb348c97df44	790	#define DSI_GEN_SHORT_PKT_WRITE_P2 0x00000023U /!< Generic short write, two parameters /
lypinator	0:bb348c97df44	791	/**
lypinator	0:bb348c97df44	792	* @}
lypinator	0:bb348c97df44	793	*/
lypinator	0:bb348c97df44	794
lypinator	0:bb348c97df44	795	/** @defgroup DSI_LONG_WRITE_PKT_Data_Type DSI LONG WRITE PKT Data Type
lypinator	0:bb348c97df44	796	* @{
lypinator	0:bb348c97df44	797	*/
lypinator	0:bb348c97df44	798	#define DSI_DCS_LONG_PKT_WRITE 0x00000039U /!< DCS long write /
lypinator	0:bb348c97df44	799	#define DSI_GEN_LONG_PKT_WRITE 0x00000029U /!< Generic long write /
lypinator	0:bb348c97df44	800	/**
lypinator	0:bb348c97df44	801	* @}
lypinator	0:bb348c97df44	802	*/
lypinator	0:bb348c97df44	803
lypinator	0:bb348c97df44	804	/** @defgroup DSI_SHORT_READ_PKT_Data_Type DSI SHORT READ PKT Data Type
lypinator	0:bb348c97df44	805	* @{
lypinator	0:bb348c97df44	806	*/
lypinator	0:bb348c97df44	807	#define DSI_DCS_SHORT_PKT_READ 0x00000006U /!< DCS short read /
lypinator	0:bb348c97df44	808	#define DSI_GEN_SHORT_PKT_READ_P0 0x00000004U /!< Generic short read, no parameters /
lypinator	0:bb348c97df44	809	#define DSI_GEN_SHORT_PKT_READ_P1 0x00000014U /!< Generic short read, one parameter /
lypinator	0:bb348c97df44	810	#define DSI_GEN_SHORT_PKT_READ_P2 0x00000024U /!< Generic short read, two parameters /
lypinator	0:bb348c97df44	811	/**
lypinator	0:bb348c97df44	812	* @}
lypinator	0:bb348c97df44	813	*/
lypinator	0:bb348c97df44	814
lypinator	0:bb348c97df44	815	/** @defgroup DSI_Error_Data_Type DSI Error Data Type
lypinator	0:bb348c97df44	816	* @{
lypinator	0:bb348c97df44	817	*/
lypinator	0:bb348c97df44	818	#define HAL_DSI_ERROR_NONE 0U
lypinator	0:bb348c97df44	819	#define HAL_DSI_ERROR_ACK 0x00000001U /!< acknowledge errors /
lypinator	0:bb348c97df44	820	#define HAL_DSI_ERROR_PHY 0x00000002U /!< PHY related errors /
lypinator	0:bb348c97df44	821	#define HAL_DSI_ERROR_TX 0x00000004U /!< transmission error /
lypinator	0:bb348c97df44	822	#define HAL_DSI_ERROR_RX 0x00000008U /!< reception error /
lypinator	0:bb348c97df44	823	#define HAL_DSI_ERROR_ECC 0x00000010U /!< ECC errors /
lypinator	0:bb348c97df44	824	#define HAL_DSI_ERROR_CRC 0x00000020U /!< CRC error /
lypinator	0:bb348c97df44	825	#define HAL_DSI_ERROR_PSE 0x00000040U /!< Packet Size error /
lypinator	0:bb348c97df44	826	#define HAL_DSI_ERROR_EOT 0x00000080U /!< End Of Transmission error /
lypinator	0:bb348c97df44	827	#define HAL_DSI_ERROR_OVF 0x00000100U /!< FIFO overflow error /
lypinator	0:bb348c97df44	828	#define HAL_DSI_ERROR_GEN 0x00000200U /!< Generic FIFO related errors /
lypinator	0:bb348c97df44	829	/**
lypinator	0:bb348c97df44	830	* @}
lypinator	0:bb348c97df44	831	*/
lypinator	0:bb348c97df44	832
lypinator	0:bb348c97df44	833	/** @defgroup DSI_Lane_Group DSI Lane Group
lypinator	0:bb348c97df44	834	* @{
lypinator	0:bb348c97df44	835	*/
lypinator	0:bb348c97df44	836	#define DSI_CLOCK_LANE 0x00000000U
lypinator	0:bb348c97df44	837	#define DSI_DATA_LANES 0x00000001U
lypinator	0:bb348c97df44	838	/**
lypinator	0:bb348c97df44	839	* @}
lypinator	0:bb348c97df44	840	*/
lypinator	0:bb348c97df44	841
lypinator	0:bb348c97df44	842	/** @defgroup DSI_Communication_Delay DSI Communication Delay
lypinator	0:bb348c97df44	843	* @{
lypinator	0:bb348c97df44	844	*/
lypinator	0:bb348c97df44	845	#define DSI_SLEW_RATE_HSTX 0x00000000U
lypinator	0:bb348c97df44	846	#define DSI_SLEW_RATE_LPTX 0x00000001U
lypinator	0:bb348c97df44	847	#define DSI_HS_DELAY 0x00000002U
lypinator	0:bb348c97df44	848	/**
lypinator	0:bb348c97df44	849	* @}
lypinator	0:bb348c97df44	850	*/
lypinator	0:bb348c97df44	851
lypinator	0:bb348c97df44	852	/** @defgroup DSI_CustomLane DSI CustomLane
lypinator	0:bb348c97df44	853	* @{
lypinator	0:bb348c97df44	854	*/
lypinator	0:bb348c97df44	855	#define DSI_SWAP_LANE_PINS 0x00000000U
lypinator	0:bb348c97df44	856	#define DSI_INVERT_HS_SIGNAL 0x00000001U
lypinator	0:bb348c97df44	857	/**
lypinator	0:bb348c97df44	858	* @}
lypinator	0:bb348c97df44	859	*/
lypinator	0:bb348c97df44	860
lypinator	0:bb348c97df44	861	/** @defgroup DSI_Lane_Select DSI Lane Select
lypinator	0:bb348c97df44	862	* @{
lypinator	0:bb348c97df44	863	*/
lypinator	0:bb348c97df44	864	#define DSI_CLK_LANE 0x00000000U
lypinator	0:bb348c97df44	865	#define DSI_DATA_LANE0 0x00000001U
lypinator	0:bb348c97df44	866	#define DSI_DATA_LANE1 0x00000002U
lypinator	0:bb348c97df44	867	/**
lypinator	0:bb348c97df44	868	* @}
lypinator	0:bb348c97df44	869	*/
lypinator	0:bb348c97df44	870
lypinator	0:bb348c97df44	871	/** @defgroup DSI_PHY_Timing DSI PHY Timing
lypinator	0:bb348c97df44	872	* @{
lypinator	0:bb348c97df44	873	*/
lypinator	0:bb348c97df44	874	#define DSI_TCLK_POST 0x00000000U
lypinator	0:bb348c97df44	875	#define DSI_TLPX_CLK 0x00000001U
lypinator	0:bb348c97df44	876	#define DSI_THS_EXIT 0x00000002U
lypinator	0:bb348c97df44	877	#define DSI_TLPX_DATA 0x00000003U
lypinator	0:bb348c97df44	878	#define DSI_THS_ZERO 0x00000004U
lypinator	0:bb348c97df44	879	#define DSI_THS_TRAIL 0x00000005U
lypinator	0:bb348c97df44	880	#define DSI_THS_PREPARE 0x00000006U
lypinator	0:bb348c97df44	881	#define DSI_TCLK_ZERO 0x00000007U
lypinator	0:bb348c97df44	882	#define DSI_TCLK_PREPARE 0x00000008U
lypinator	0:bb348c97df44	883	/**
lypinator	0:bb348c97df44	884	* @}
lypinator	0:bb348c97df44	885	*/
lypinator	0:bb348c97df44	886
lypinator	0:bb348c97df44	887	/* Exported macros -----------------------------------------------------------*/
lypinator	0:bb348c97df44	888	/**
lypinator	0:bb348c97df44	889	* @brief Enables the DSI host.
lypinator	0:bb348c97df44	890	* @param __HANDLE__ DSI handle
lypinator	0:bb348c97df44	891	* @retval None.
lypinator	0:bb348c97df44	892	*/
lypinator	0:bb348c97df44	893	#define __HAL_DSI_ENABLE(__HANDLE__) do { \
lypinator	0:bb348c97df44	894	__IO uint32_t tmpreg = 0x00U; \
lypinator	0:bb348c97df44	895	SET_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\
lypinator	0:bb348c97df44	896	/* Delay after an DSI Host enabling */ \
lypinator	0:bb348c97df44	897	tmpreg = READ_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\
lypinator	0:bb348c97df44	898	UNUSED(tmpreg); \
lypinator	0:bb348c97df44	899	}while(0U)
lypinator	0:bb348c97df44	900
lypinator	0:bb348c97df44	901	/**
lypinator	0:bb348c97df44	902	* @brief Disables the DSI host.
lypinator	0:bb348c97df44	903	* @param __HANDLE__ DSI handle
lypinator	0:bb348c97df44	904	* @retval None.
lypinator	0:bb348c97df44	905	*/
lypinator	0:bb348c97df44	906	#define __HAL_DSI_DISABLE(__HANDLE__) do { \
lypinator	0:bb348c97df44	907	__IO uint32_t tmpreg = 0x00U; \
lypinator	0:bb348c97df44	908	CLEAR_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\
lypinator	0:bb348c97df44	909	/* Delay after an DSI Host disabling */ \
lypinator	0:bb348c97df44	910	tmpreg = READ_BIT((__HANDLE__)->Instance->CR, DSI_CR_EN);\
lypinator	0:bb348c97df44	911	UNUSED(tmpreg); \
lypinator	0:bb348c97df44	912	}while(0U)
lypinator	0:bb348c97df44	913
lypinator	0:bb348c97df44	914	/**
lypinator	0:bb348c97df44	915	* @brief Enables the DSI wrapper.
lypinator	0:bb348c97df44	916	* @param __HANDLE__ DSI handle
lypinator	0:bb348c97df44	917	* @retval None.
lypinator	0:bb348c97df44	918	*/
lypinator	0:bb348c97df44	919	#define __HAL_DSI_WRAPPER_ENABLE(__HANDLE__) do { \
lypinator	0:bb348c97df44	920	__IO uint32_t tmpreg = 0x00U; \
lypinator	0:bb348c97df44	921	SET_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\
lypinator	0:bb348c97df44	922	/* Delay after an DSI warpper enabling */ \
lypinator	0:bb348c97df44	923	tmpreg = READ_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\
lypinator	0:bb348c97df44	924	UNUSED(tmpreg); \
lypinator	0:bb348c97df44	925	}while(0U)
lypinator	0:bb348c97df44	926
lypinator	0:bb348c97df44	927	/**
lypinator	0:bb348c97df44	928	* @brief Disable the DSI wrapper.
lypinator	0:bb348c97df44	929	* @param __HANDLE__ DSI handle
lypinator	0:bb348c97df44	930	* @retval None.
lypinator	0:bb348c97df44	931	*/
lypinator	0:bb348c97df44	932	#define __HAL_DSI_WRAPPER_DISABLE(__HANDLE__) do { \
lypinator	0:bb348c97df44	933	__IO uint32_t tmpreg = 0x00U; \
lypinator	0:bb348c97df44	934	CLEAR_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\
lypinator	0:bb348c97df44	935	/* Delay after an DSI warpper disabling*/ \
lypinator	0:bb348c97df44	936	tmpreg = READ_BIT((__HANDLE__)->Instance->WCR, DSI_WCR_DSIEN);\
lypinator	0:bb348c97df44	937	UNUSED(tmpreg); \
lypinator	0:bb348c97df44	938	}while(0U)
lypinator	0:bb348c97df44	939
lypinator	0:bb348c97df44	940	/**
lypinator	0:bb348c97df44	941	* @brief Enables the DSI PLL.
lypinator	0:bb348c97df44	942	* @param __HANDLE__ DSI handle
lypinator	0:bb348c97df44	943	* @retval None.
lypinator	0:bb348c97df44	944	*/
lypinator	0:bb348c97df44	945	#define __HAL_DSI_PLL_ENABLE(__HANDLE__) do { \
lypinator	0:bb348c97df44	946	__IO uint32_t tmpreg = 0x00U; \
lypinator	0:bb348c97df44	947	SET_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\
lypinator	0:bb348c97df44	948	/* Delay after an DSI PLL enabling */ \
lypinator	0:bb348c97df44	949	tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\
lypinator	0:bb348c97df44	950	UNUSED(tmpreg); \
lypinator	0:bb348c97df44	951	}while(0U)
lypinator	0:bb348c97df44	952
lypinator	0:bb348c97df44	953	/**
lypinator	0:bb348c97df44	954	* @brief Disables the DSI PLL.
lypinator	0:bb348c97df44	955	* @param __HANDLE__ DSI handle
lypinator	0:bb348c97df44	956	* @retval None.
lypinator	0:bb348c97df44	957	*/
lypinator	0:bb348c97df44	958	#define __HAL_DSI_PLL_DISABLE(__HANDLE__) do { \
lypinator	0:bb348c97df44	959	__IO uint32_t tmpreg = 0x00U; \
lypinator	0:bb348c97df44	960	CLEAR_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\
lypinator	0:bb348c97df44	961	/* Delay after an DSI PLL disabling */ \
lypinator	0:bb348c97df44	962	tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_PLLEN);\
lypinator	0:bb348c97df44	963	UNUSED(tmpreg); \
lypinator	0:bb348c97df44	964	}while(0U)
lypinator	0:bb348c97df44	965
lypinator	0:bb348c97df44	966	/**
lypinator	0:bb348c97df44	967	* @brief Enables the DSI regulator.
lypinator	0:bb348c97df44	968	* @param __HANDLE__ DSI handle
lypinator	0:bb348c97df44	969	* @retval None.
lypinator	0:bb348c97df44	970	*/
lypinator	0:bb348c97df44	971	#define __HAL_DSI_REG_ENABLE(__HANDLE__) do { \
lypinator	0:bb348c97df44	972	__IO uint32_t tmpreg = 0x00U; \
lypinator	0:bb348c97df44	973	SET_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\
lypinator	0:bb348c97df44	974	/* Delay after an DSI regulator enabling */ \
lypinator	0:bb348c97df44	975	tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\
lypinator	0:bb348c97df44	976	UNUSED(tmpreg); \
lypinator	0:bb348c97df44	977	}while(0U)
lypinator	0:bb348c97df44	978
lypinator	0:bb348c97df44	979	/**
lypinator	0:bb348c97df44	980	* @brief Disables the DSI regulator.
lypinator	0:bb348c97df44	981	* @param __HANDLE__ DSI handle
lypinator	0:bb348c97df44	982	* @retval None.
lypinator	0:bb348c97df44	983	*/
lypinator	0:bb348c97df44	984	#define __HAL_DSI_REG_DISABLE(__HANDLE__) do { \
lypinator	0:bb348c97df44	985	__IO uint32_t tmpreg = 0x00U; \
lypinator	0:bb348c97df44	986	CLEAR_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\
lypinator	0:bb348c97df44	987	/* Delay after an DSI regulator disabling */ \
lypinator	0:bb348c97df44	988	tmpreg = READ_BIT((__HANDLE__)->Instance->WRPCR, DSI_WRPCR_REGEN);\
lypinator	0:bb348c97df44	989	UNUSED(tmpreg); \
lypinator	0:bb348c97df44	990	}while(0U)
lypinator	0:bb348c97df44	991
lypinator	0:bb348c97df44	992	/**
lypinator	0:bb348c97df44	993	* @brief Get the DSI pending flags.
lypinator	0:bb348c97df44	994	* @param __HANDLE__ DSI handle.
lypinator	0:bb348c97df44	995	* @param __FLAG__ Get the specified flag.
lypinator	0:bb348c97df44	996	* This parameter can be any combination of the following values:
lypinator	0:bb348c97df44	997	* @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag
lypinator	0:bb348c97df44	998	* @arg DSI_FLAG_ER : End of Refresh Interrupt Flag
lypinator	0:bb348c97df44	999	* @arg DSI_FLAG_BUSY : Busy Flag
lypinator	0:bb348c97df44	1000	* @arg DSI_FLAG_PLLLS: PLL Lock Status
lypinator	0:bb348c97df44	1001	* @arg DSI_FLAG_PLLL : PLL Lock Interrupt Flag
lypinator	0:bb348c97df44	1002	* @arg DSI_FLAG_PLLU : PLL Unlock Interrupt Flag
lypinator	0:bb348c97df44	1003	* @arg DSI_FLAG_RRS : Regulator Ready Flag
lypinator	0:bb348c97df44	1004	* @arg DSI_FLAG_RR : Regulator Ready Interrupt Flag
lypinator	0:bb348c97df44	1005	* @retval The state of FLAG (SET or RESET).
lypinator	0:bb348c97df44	1006	*/
lypinator	0:bb348c97df44	1007	#define __HAL_DSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->WISR & (__FLAG__))
lypinator	0:bb348c97df44	1008
lypinator	0:bb348c97df44	1009	/**
lypinator	0:bb348c97df44	1010	* @brief Clears the DSI pending flags.
lypinator	0:bb348c97df44	1011	* @param __HANDLE__ DSI handle.
lypinator	0:bb348c97df44	1012	* @param __FLAG__ specifies the flag to clear.
lypinator	0:bb348c97df44	1013	* This parameter can be any combination of the following values:
lypinator	0:bb348c97df44	1014	* @arg DSI_FLAG_TE : Tearing Effect Interrupt Flag
lypinator	0:bb348c97df44	1015	* @arg DSI_FLAG_ER : End of Refresh Interrupt Flag
lypinator	0:bb348c97df44	1016	* @arg DSI_FLAG_PLLL : PLL Lock Interrupt Flag
lypinator	0:bb348c97df44	1017	* @arg DSI_FLAG_PLLU : PLL Unlock Interrupt Flag
lypinator	0:bb348c97df44	1018	* @arg DSI_FLAG_RR : Regulator Ready Interrupt Flag
lypinator	0:bb348c97df44	1019	* @retval None
lypinator	0:bb348c97df44	1020	*/
lypinator	0:bb348c97df44	1021	#define __HAL_DSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->WIFCR = (__FLAG__))
lypinator	0:bb348c97df44	1022
lypinator	0:bb348c97df44	1023	/**
lypinator	0:bb348c97df44	1024	* @brief Enables the specified DSI interrupts.
lypinator	0:bb348c97df44	1025	* @param __HANDLE__ DSI handle.
lypinator	0:bb348c97df44	1026	* @param __INTERRUPT__ specifies the DSI interrupt sources to be enabled.
lypinator	0:bb348c97df44	1027	* This parameter can be any combination of the following values:
lypinator	0:bb348c97df44	1028	* @arg DSI_IT_TE : Tearing Effect Interrupt
lypinator	0:bb348c97df44	1029	* @arg DSI_IT_ER : End of Refresh Interrupt
lypinator	0:bb348c97df44	1030	* @arg DSI_IT_PLLL: PLL Lock Interrupt
lypinator	0:bb348c97df44	1031	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
lypinator	0:bb348c97df44	1032	* @arg DSI_IT_RR : Regulator Ready Interrupt
lypinator	0:bb348c97df44	1033	* @retval None
lypinator	0:bb348c97df44	1034	*/
lypinator	0:bb348c97df44	1035	#define __HAL_DSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER \|= (__INTERRUPT__))
lypinator	0:bb348c97df44	1036
lypinator	0:bb348c97df44	1037	/**
lypinator	0:bb348c97df44	1038	* @brief Disables the specified DSI interrupts.
lypinator	0:bb348c97df44	1039	* @param __HANDLE__ DSI handle
lypinator	0:bb348c97df44	1040	* @param __INTERRUPT__ specifies the DSI interrupt sources to be disabled.
lypinator	0:bb348c97df44	1041	* This parameter can be any combination of the following values:
lypinator	0:bb348c97df44	1042	* @arg DSI_IT_TE : Tearing Effect Interrupt
lypinator	0:bb348c97df44	1043	* @arg DSI_IT_ER : End of Refresh Interrupt
lypinator	0:bb348c97df44	1044	* @arg DSI_IT_PLLL: PLL Lock Interrupt
lypinator	0:bb348c97df44	1045	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
lypinator	0:bb348c97df44	1046	* @arg DSI_IT_RR : Regulator Ready Interrupt
lypinator	0:bb348c97df44	1047	* @retval None
lypinator	0:bb348c97df44	1048	*/
lypinator	0:bb348c97df44	1049	#define __HAL_DSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER &= ~(__INTERRUPT__))
lypinator	0:bb348c97df44	1050
lypinator	0:bb348c97df44	1051	/**
lypinator	0:bb348c97df44	1052	* @brief Checks whether the specified DSI interrupt source is enabled or not.
lypinator	0:bb348c97df44	1053	* @param __HANDLE__ DSI handle
lypinator	0:bb348c97df44	1054	* @param __INTERRUPT__ specifies the DSI interrupt source to check.
lypinator	0:bb348c97df44	1055	* This parameter can be one of the following values:
lypinator	0:bb348c97df44	1056	* @arg DSI_IT_TE : Tearing Effect Interrupt
lypinator	0:bb348c97df44	1057	* @arg DSI_IT_ER : End of Refresh Interrupt
lypinator	0:bb348c97df44	1058	* @arg DSI_IT_PLLL: PLL Lock Interrupt
lypinator	0:bb348c97df44	1059	* @arg DSI_IT_PLLU: PLL Unlock Interrupt
lypinator	0:bb348c97df44	1060	* @arg DSI_IT_RR : Regulator Ready Interrupt
lypinator	0:bb348c97df44	1061	* @retval The state of INTERRUPT (SET or RESET).
lypinator	0:bb348c97df44	1062	*/
lypinator	0:bb348c97df44	1063	#define __HAL_DSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->WIER & (__INTERRUPT__))
lypinator	0:bb348c97df44	1064
lypinator	0:bb348c97df44	1065	/* Exported functions --------------------------------------------------------*/
lypinator	0:bb348c97df44	1066	/** @defgroup DSI_Exported_Functions DSI Exported Functions
lypinator	0:bb348c97df44	1067	* @{
lypinator	0:bb348c97df44	1068	*/
lypinator	0:bb348c97df44	1069	HAL_StatusTypeDef HAL_DSI_Init(DSI_HandleTypeDef hdsi, DSI_PLLInitTypeDef PLLInit);
lypinator	0:bb348c97df44	1070	HAL_StatusTypeDef HAL_DSI_DeInit(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1071	void HAL_DSI_MspInit(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1072	void HAL_DSI_MspDeInit(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1073
lypinator	0:bb348c97df44	1074	void HAL_DSI_IRQHandler(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1075	void HAL_DSI_TearingEffectCallback(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1076	void HAL_DSI_EndOfRefreshCallback(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1077	void HAL_DSI_ErrorCallback(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1078
lypinator	0:bb348c97df44	1079	HAL_StatusTypeDef HAL_DSI_SetGenericVCID(DSI_HandleTypeDef *hdsi, uint32_t VirtualChannelID);
lypinator	0:bb348c97df44	1080	HAL_StatusTypeDef HAL_DSI_ConfigVideoMode(DSI_HandleTypeDef hdsi, DSI_VidCfgTypeDef VidCfg);
lypinator	0:bb348c97df44	1081	HAL_StatusTypeDef HAL_DSI_ConfigAdaptedCommandMode(DSI_HandleTypeDef hdsi, DSI_CmdCfgTypeDef CmdCfg);
lypinator	0:bb348c97df44	1082	HAL_StatusTypeDef HAL_DSI_ConfigCommand(DSI_HandleTypeDef hdsi, DSI_LPCmdTypeDef LPCmd);
lypinator	0:bb348c97df44	1083	HAL_StatusTypeDef HAL_DSI_ConfigFlowControl(DSI_HandleTypeDef *hdsi, uint32_t FlowControl);
lypinator	0:bb348c97df44	1084	HAL_StatusTypeDef HAL_DSI_ConfigPhyTimer(DSI_HandleTypeDef hdsi, DSI_PHY_TimerTypeDef PhyTimers);
lypinator	0:bb348c97df44	1085	HAL_StatusTypeDef HAL_DSI_ConfigHostTimeouts(DSI_HandleTypeDef hdsi, DSI_HOST_TimeoutTypeDef HostTimeouts);
lypinator	0:bb348c97df44	1086	HAL_StatusTypeDef HAL_DSI_Start(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1087	HAL_StatusTypeDef HAL_DSI_Stop(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1088	HAL_StatusTypeDef HAL_DSI_Refresh(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1089	HAL_StatusTypeDef HAL_DSI_ColorMode(DSI_HandleTypeDef *hdsi, uint32_t ColorMode);
lypinator	0:bb348c97df44	1090	HAL_StatusTypeDef HAL_DSI_Shutdown(DSI_HandleTypeDef *hdsi, uint32_t Shutdown);
lypinator	0:bb348c97df44	1091	HAL_StatusTypeDef HAL_DSI_ShortWrite(DSI_HandleTypeDef *hdsi,
lypinator	0:bb348c97df44	1092	uint32_t ChannelID,
lypinator	0:bb348c97df44	1093	uint32_t Mode,
lypinator	0:bb348c97df44	1094	uint32_t Param1,
lypinator	0:bb348c97df44	1095	uint32_t Param2);
lypinator	0:bb348c97df44	1096	HAL_StatusTypeDef HAL_DSI_LongWrite(DSI_HandleTypeDef *hdsi,
lypinator	0:bb348c97df44	1097	uint32_t ChannelID,
lypinator	0:bb348c97df44	1098	uint32_t Mode,
lypinator	0:bb348c97df44	1099	uint32_t NbParams,
lypinator	0:bb348c97df44	1100	uint32_t Param1,
lypinator	0:bb348c97df44	1101	uint8_t* ParametersTable);
lypinator	0:bb348c97df44	1102	HAL_StatusTypeDef HAL_DSI_Read(DSI_HandleTypeDef *hdsi,
lypinator	0:bb348c97df44	1103	uint32_t ChannelNbr,
lypinator	0:bb348c97df44	1104	uint8_t* Array,
lypinator	0:bb348c97df44	1105	uint32_t Size,
lypinator	0:bb348c97df44	1106	uint32_t Mode,
lypinator	0:bb348c97df44	1107	uint32_t DCSCmd,
lypinator	0:bb348c97df44	1108	uint8_t* ParametersTable);
lypinator	0:bb348c97df44	1109	HAL_StatusTypeDef HAL_DSI_EnterULPMData(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1110	HAL_StatusTypeDef HAL_DSI_ExitULPMData(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1111	HAL_StatusTypeDef HAL_DSI_EnterULPM(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1112	HAL_StatusTypeDef HAL_DSI_ExitULPM(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1113
lypinator	0:bb348c97df44	1114	HAL_StatusTypeDef HAL_DSI_PatternGeneratorStart(DSI_HandleTypeDef *hdsi, uint32_t Mode, uint32_t Orientation);
lypinator	0:bb348c97df44	1115	HAL_StatusTypeDef HAL_DSI_PatternGeneratorStop(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1116
lypinator	0:bb348c97df44	1117	HAL_StatusTypeDef HAL_DSI_SetSlewRateAndDelayTuning(DSI_HandleTypeDef *hdsi, uint32_t CommDelay, uint32_t Lane, uint32_t Value);
lypinator	0:bb348c97df44	1118	HAL_StatusTypeDef HAL_DSI_SetLowPowerRXFilter(DSI_HandleTypeDef *hdsi, uint32_t Frequency);
lypinator	0:bb348c97df44	1119	HAL_StatusTypeDef HAL_DSI_SetSDD(DSI_HandleTypeDef *hdsi, FunctionalState State);
lypinator	0:bb348c97df44	1120	HAL_StatusTypeDef HAL_DSI_SetLanePinsConfiguration(DSI_HandleTypeDef *hdsi, uint32_t CustomLane, uint32_t Lane, FunctionalState State);
lypinator	0:bb348c97df44	1121	HAL_StatusTypeDef HAL_DSI_SetPHYTimings(DSI_HandleTypeDef *hdsi, uint32_t Timing, FunctionalState State, uint32_t Value);
lypinator	0:bb348c97df44	1122	HAL_StatusTypeDef HAL_DSI_ForceTXStopMode(DSI_HandleTypeDef *hdsi, uint32_t Lane, FunctionalState State);
lypinator	0:bb348c97df44	1123	HAL_StatusTypeDef HAL_DSI_ForceRXLowPower(DSI_HandleTypeDef *hdsi, FunctionalState State);
lypinator	0:bb348c97df44	1124	HAL_StatusTypeDef HAL_DSI_ForceDataLanesInRX(DSI_HandleTypeDef *hdsi, FunctionalState State);
lypinator	0:bb348c97df44	1125	HAL_StatusTypeDef HAL_DSI_SetPullDown(DSI_HandleTypeDef *hdsi, FunctionalState State);
lypinator	0:bb348c97df44	1126	HAL_StatusTypeDef HAL_DSI_SetContentionDetectionOff(DSI_HandleTypeDef *hdsi, FunctionalState State);
lypinator	0:bb348c97df44	1127
lypinator	0:bb348c97df44	1128	uint32_t HAL_DSI_GetError(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1129	HAL_StatusTypeDef HAL_DSI_ConfigErrorMonitor(DSI_HandleTypeDef *hdsi, uint32_t ActiveErrors);
lypinator	0:bb348c97df44	1130	HAL_DSI_StateTypeDef HAL_DSI_GetState(DSI_HandleTypeDef *hdsi);
lypinator	0:bb348c97df44	1131	/**
lypinator	0:bb348c97df44	1132	* @}
lypinator	0:bb348c97df44	1133	*/
lypinator	0:bb348c97df44	1134
lypinator	0:bb348c97df44	1135	/* Private types -------------------------------------------------------------*/
lypinator	0:bb348c97df44	1136	/** @defgroup DSI_Private_Types DSI Private Types
lypinator	0:bb348c97df44	1137	* @{
lypinator	0:bb348c97df44	1138	*/
lypinator	0:bb348c97df44	1139
lypinator	0:bb348c97df44	1140	/**
lypinator	0:bb348c97df44	1141	* @}
lypinator	0:bb348c97df44	1142	*/
lypinator	0:bb348c97df44	1143
lypinator	0:bb348c97df44	1144	/* Private defines -----------------------------------------------------------*/
lypinator	0:bb348c97df44	1145	/** @defgroup DSI_Private_Defines DSI Private Defines
lypinator	0:bb348c97df44	1146	* @{
lypinator	0:bb348c97df44	1147	*/
lypinator	0:bb348c97df44	1148
lypinator	0:bb348c97df44	1149	/**
lypinator	0:bb348c97df44	1150	* @}
lypinator	0:bb348c97df44	1151	*/
lypinator	0:bb348c97df44	1152
lypinator	0:bb348c97df44	1153	/* Private variables ---------------------------------------------------------*/
lypinator	0:bb348c97df44	1154	/** @defgroup DSI_Private_Variables DSI Private Variables
lypinator	0:bb348c97df44	1155	* @{
lypinator	0:bb348c97df44	1156	*/
lypinator	0:bb348c97df44	1157
lypinator	0:bb348c97df44	1158	/**
lypinator	0:bb348c97df44	1159	* @}
lypinator	0:bb348c97df44	1160	*/
lypinator	0:bb348c97df44	1161
lypinator	0:bb348c97df44	1162	/* Private constants ---------------------------------------------------------*/
lypinator	0:bb348c97df44	1163	/** @defgroup DSI_Private_Constants DSI Private Constants
lypinator	0:bb348c97df44	1164	* @{
lypinator	0:bb348c97df44	1165	*/
lypinator	0:bb348c97df44	1166	#define DSI_MAX_RETURN_PKT_SIZE (0x00000037U) /!< Maximum return packet configuration /
lypinator	0:bb348c97df44	1167	/**
lypinator	0:bb348c97df44	1168	* @}
lypinator	0:bb348c97df44	1169	*/
lypinator	0:bb348c97df44	1170
lypinator	0:bb348c97df44	1171	/* Private macros ------------------------------------------------------------*/
lypinator	0:bb348c97df44	1172	/** @defgroup DSI_Private_Macros DSI Private Macros
lypinator	0:bb348c97df44	1173	* @{
lypinator	0:bb348c97df44	1174	*/
lypinator	0:bb348c97df44	1175	#define IS_DSI_PLL_NDIV(NDIV) ((10U <= (NDIV)) && ((NDIV) <= 125U))
lypinator	0:bb348c97df44	1176	#define IS_DSI_PLL_IDF(IDF) (((IDF) == DSI_PLL_IN_DIV1) \|\| \
lypinator	0:bb348c97df44	1177	((IDF) == DSI_PLL_IN_DIV2) \|\| \
lypinator	0:bb348c97df44	1178	((IDF) == DSI_PLL_IN_DIV3) \|\| \
lypinator	0:bb348c97df44	1179	((IDF) == DSI_PLL_IN_DIV4) \|\| \
lypinator	0:bb348c97df44	1180	((IDF) == DSI_PLL_IN_DIV5) \|\| \
lypinator	0:bb348c97df44	1181	((IDF) == DSI_PLL_IN_DIV6) \|\| \
lypinator	0:bb348c97df44	1182	((IDF) == DSI_PLL_IN_DIV7))
lypinator	0:bb348c97df44	1183	#define IS_DSI_PLL_ODF(ODF) (((ODF) == DSI_PLL_OUT_DIV1) \|\| \
lypinator	0:bb348c97df44	1184	((ODF) == DSI_PLL_OUT_DIV2) \|\| \
lypinator	0:bb348c97df44	1185	((ODF) == DSI_PLL_OUT_DIV4) \|\| \
lypinator	0:bb348c97df44	1186	((ODF) == DSI_PLL_OUT_DIV8))
lypinator	0:bb348c97df44	1187	#define IS_DSI_AUTO_CLKLANE_CONTROL(AutoClkLane) (((AutoClkLane) == DSI_AUTO_CLK_LANE_CTRL_DISABLE) \|\| ((AutoClkLane) == DSI_AUTO_CLK_LANE_CTRL_ENABLE))
lypinator	0:bb348c97df44	1188	#define IS_DSI_NUMBER_OF_LANES(NumberOfLanes) (((NumberOfLanes) == DSI_ONE_DATA_LANE) \|\| ((NumberOfLanes) == DSI_TWO_DATA_LANES))
lypinator	0:bb348c97df44	1189	#define IS_DSI_FLOW_CONTROL(FlowControl) (((FlowControl) \| DSI_FLOW_CONTROL_ALL) == DSI_FLOW_CONTROL_ALL)
lypinator	0:bb348c97df44	1190	#define IS_DSI_COLOR_CODING(ColorCoding) ((ColorCoding) <= 5U)
lypinator	0:bb348c97df44	1191	#define IS_DSI_LOOSELY_PACKED(LooselyPacked) (((LooselyPacked) == DSI_LOOSELY_PACKED_ENABLE) \|\| ((LooselyPacked) == DSI_LOOSELY_PACKED_DISABLE))
lypinator	0:bb348c97df44	1192	#define IS_DSI_DE_POLARITY(DataEnable) (((DataEnable) == DSI_DATA_ENABLE_ACTIVE_HIGH) \|\| ((DataEnable) == DSI_DATA_ENABLE_ACTIVE_LOW))
lypinator	0:bb348c97df44	1193	#define IS_DSI_VSYNC_POLARITY(VSYNC) (((VSYNC) == DSI_VSYNC_ACTIVE_HIGH) \|\| ((VSYNC) == DSI_VSYNC_ACTIVE_LOW))
lypinator	0:bb348c97df44	1194	#define IS_DSI_HSYNC_POLARITY(HSYNC) (((HSYNC) == DSI_HSYNC_ACTIVE_HIGH) \|\| ((HSYNC) == DSI_HSYNC_ACTIVE_LOW))
lypinator	0:bb348c97df44	1195	#define IS_DSI_VIDEO_MODE_TYPE(VideoModeType) (((VideoModeType) == DSI_VID_MODE_NB_PULSES) \|\| \
lypinator	0:bb348c97df44	1196	((VideoModeType) == DSI_VID_MODE_NB_EVENTS) \|\| \
lypinator	0:bb348c97df44	1197	((VideoModeType) == DSI_VID_MODE_BURST))
lypinator	0:bb348c97df44	1198	#define IS_DSI_COLOR_MODE(ColorMode) (((ColorMode) == DSI_COLOR_MODE_FULL) \|\| ((ColorMode) == DSI_COLOR_MODE_EIGHT))
lypinator	0:bb348c97df44	1199	#define IS_DSI_SHUT_DOWN(ShutDown) (((ShutDown) == DSI_DISPLAY_ON) \|\| ((ShutDown) == DSI_DISPLAY_OFF))
lypinator	0:bb348c97df44	1200	#define IS_DSI_LP_COMMAND(LPCommand) (((LPCommand) == DSI_LP_COMMAND_DISABLE) \|\| ((LPCommand) == DSI_LP_COMMAND_ENABLE))
lypinator	0:bb348c97df44	1201	#define IS_DSI_LP_HFP(LPHFP) (((LPHFP) == DSI_LP_HFP_DISABLE) \|\| ((LPHFP) == DSI_LP_HFP_ENABLE))
lypinator	0:bb348c97df44	1202	#define IS_DSI_LP_HBP(LPHBP) (((LPHBP) == DSI_LP_HBP_DISABLE) \|\| ((LPHBP) == DSI_LP_HBP_ENABLE))
lypinator	0:bb348c97df44	1203	#define IS_DSI_LP_VACTIVE(LPVActive) (((LPVActive) == DSI_LP_VACT_DISABLE) \|\| ((LPVActive) == DSI_LP_VACT_ENABLE))
lypinator	0:bb348c97df44	1204	#define IS_DSI_LP_VFP(LPVFP) (((LPVFP) == DSI_LP_VFP_DISABLE) \|\| ((LPVFP) == DSI_LP_VFP_ENABLE))
lypinator	0:bb348c97df44	1205	#define IS_DSI_LP_VBP(LPVBP) (((LPVBP) == DSI_LP_VBP_DISABLE) \|\| ((LPVBP) == DSI_LP_VBP_ENABLE))
lypinator	0:bb348c97df44	1206	#define IS_DSI_LP_VSYNC(LPVSYNC) (((LPVSYNC) == DSI_LP_VSYNC_DISABLE) \|\| ((LPVSYNC) == DSI_LP_VSYNC_ENABLE))
lypinator	0:bb348c97df44	1207	#define IS_DSI_FBTAA(FrameBTAAcknowledge) (((FrameBTAAcknowledge) == DSI_FBTAA_DISABLE) \|\| ((FrameBTAAcknowledge) == DSI_FBTAA_ENABLE))
lypinator	0:bb348c97df44	1208	#define IS_DSI_TE_SOURCE(TESource) (((TESource) == DSI_TE_DSILINK) \|\| ((TESource) == DSI_TE_EXTERNAL))
lypinator	0:bb348c97df44	1209	#define IS_DSI_TE_POLARITY(TEPolarity) (((TEPolarity) == DSI_TE_RISING_EDGE) \|\| ((TEPolarity) == DSI_TE_FALLING_EDGE))
lypinator	0:bb348c97df44	1210	#define IS_DSI_AUTOMATIC_REFRESH(AutomaticRefresh) (((AutomaticRefresh) == DSI_AR_DISABLE) \|\| ((AutomaticRefresh) == DSI_AR_ENABLE))
lypinator	0:bb348c97df44	1211	#define IS_DSI_VS_POLARITY(VSPolarity) (((VSPolarity) == DSI_VSYNC_FALLING) \|\| ((VSPolarity) == DSI_VSYNC_RISING))
lypinator	0:bb348c97df44	1212	#define IS_DSI_TE_ACK_REQUEST(TEAcknowledgeRequest) (((TEAcknowledgeRequest) == DSI_TE_ACKNOWLEDGE_DISABLE) \|\| ((TEAcknowledgeRequest) == DSI_TE_ACKNOWLEDGE_ENABLE))
lypinator	0:bb348c97df44	1213	#define IS_DSI_ACK_REQUEST(AcknowledgeRequest) (((AcknowledgeRequest) == DSI_ACKNOWLEDGE_DISABLE) \|\| ((AcknowledgeRequest) == DSI_ACKNOWLEDGE_ENABLE))
lypinator	0:bb348c97df44	1214	#define IS_DSI_LP_GSW0P(LP_GSW0P) (((LP_GSW0P) == DSI_LP_GSW0P_DISABLE) \|\| ((LP_GSW0P) == DSI_LP_GSW0P_ENABLE))
lypinator	0:bb348c97df44	1215	#define IS_DSI_LP_GSW1P(LP_GSW1P) (((LP_GSW1P) == DSI_LP_GSW1P_DISABLE) \|\| ((LP_GSW1P) == DSI_LP_GSW1P_ENABLE))
lypinator	0:bb348c97df44	1216	#define IS_DSI_LP_GSW2P(LP_GSW2P) (((LP_GSW2P) == DSI_LP_GSW2P_DISABLE) \|\| ((LP_GSW2P) == DSI_LP_GSW2P_ENABLE))
lypinator	0:bb348c97df44	1217	#define IS_DSI_LP_GSR0P(LP_GSR0P) (((LP_GSR0P) == DSI_LP_GSR0P_DISABLE) \|\| ((LP_GSR0P) == DSI_LP_GSR0P_ENABLE))
lypinator	0:bb348c97df44	1218	#define IS_DSI_LP_GSR1P(LP_GSR1P) (((LP_GSR1P) == DSI_LP_GSR1P_DISABLE) \|\| ((LP_GSR1P) == DSI_LP_GSR1P_ENABLE))
lypinator	0:bb348c97df44	1219	#define IS_DSI_LP_GSR2P(LP_GSR2P) (((LP_GSR2P) == DSI_LP_GSR2P_DISABLE) \|\| ((LP_GSR2P) == DSI_LP_GSR2P_ENABLE))
lypinator	0:bb348c97df44	1220	#define IS_DSI_LP_GLW(LP_GLW) (((LP_GLW) == DSI_LP_GLW_DISABLE) \|\| ((LP_GLW) == DSI_LP_GLW_ENABLE))
lypinator	0:bb348c97df44	1221	#define IS_DSI_LP_DSW0P(LP_DSW0P) (((LP_DSW0P) == DSI_LP_DSW0P_DISABLE) \|\| ((LP_DSW0P) == DSI_LP_DSW0P_ENABLE))
lypinator	0:bb348c97df44	1222	#define IS_DSI_LP_DSW1P(LP_DSW1P) (((LP_DSW1P) == DSI_LP_DSW1P_DISABLE) \|\| ((LP_DSW1P) == DSI_LP_DSW1P_ENABLE))
lypinator	0:bb348c97df44	1223	#define IS_DSI_LP_DSR0P(LP_DSR0P) (((LP_DSR0P) == DSI_LP_DSR0P_DISABLE) \|\| ((LP_DSR0P) == DSI_LP_DSR0P_ENABLE))
lypinator	0:bb348c97df44	1224	#define IS_DSI_LP_DLW(LP_DLW) (((LP_DLW) == DSI_LP_DLW_DISABLE) \|\| ((LP_DLW) == DSI_LP_DLW_ENABLE))
lypinator	0:bb348c97df44	1225	#define IS_DSI_LP_MRDP(LP_MRDP) (((LP_MRDP) == DSI_LP_MRDP_DISABLE) \|\| ((LP_MRDP) == DSI_LP_MRDP_ENABLE))
lypinator	0:bb348c97df44	1226	#define IS_DSI_SHORT_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_WRITE_P0) \|\| \
lypinator	0:bb348c97df44	1227	((MODE) == DSI_DCS_SHORT_PKT_WRITE_P1) \|\| \
lypinator	0:bb348c97df44	1228	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P0) \|\| \
lypinator	0:bb348c97df44	1229	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P1) \|\| \
lypinator	0:bb348c97df44	1230	((MODE) == DSI_GEN_SHORT_PKT_WRITE_P2))
lypinator	0:bb348c97df44	1231	#define IS_DSI_LONG_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_LONG_PKT_WRITE) \|\| \
lypinator	0:bb348c97df44	1232	((MODE) == DSI_GEN_LONG_PKT_WRITE))
lypinator	0:bb348c97df44	1233	#define IS_DSI_READ_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_READ) \|\| \
lypinator	0:bb348c97df44	1234	((MODE) == DSI_GEN_SHORT_PKT_READ_P0) \|\| \
lypinator	0:bb348c97df44	1235	((MODE) == DSI_GEN_SHORT_PKT_READ_P1) \|\| \
lypinator	0:bb348c97df44	1236	((MODE) == DSI_GEN_SHORT_PKT_READ_P2))
lypinator	0:bb348c97df44	1237	#define IS_DSI_COMMUNICATION_DELAY(CommDelay) (((CommDelay) == DSI_SLEW_RATE_HSTX) \|\| ((CommDelay) == DSI_SLEW_RATE_LPTX) \|\| ((CommDelay) == DSI_HS_DELAY))
lypinator	0:bb348c97df44	1238	#define IS_DSI_LANE_GROUP(Lane) (((Lane) == DSI_CLOCK_LANE) \|\| ((Lane) == DSI_DATA_LANES))
lypinator	0:bb348c97df44	1239	#define IS_DSI_CUSTOM_LANE(CustomLane) (((CustomLane) == DSI_SWAP_LANE_PINS) \|\| ((CustomLane) == DSI_INVERT_HS_SIGNAL))
lypinator	0:bb348c97df44	1240	#define IS_DSI_LANE(Lane) (((Lane) == DSI_CLOCK_LANE) \|\| ((Lane) == DSI_DATA_LANE0) \|\| ((Lane) == DSI_DATA_LANE1))
lypinator	0:bb348c97df44	1241	#define IS_DSI_PHY_TIMING(Timing) (((Timing) == DSI_TCLK_POST ) \|\| \
lypinator	0:bb348c97df44	1242	((Timing) == DSI_TLPX_CLK ) \|\| \
lypinator	0:bb348c97df44	1243	((Timing) == DSI_THS_EXIT ) \|\| \
lypinator	0:bb348c97df44	1244	((Timing) == DSI_TLPX_DATA ) \|\| \
lypinator	0:bb348c97df44	1245	((Timing) == DSI_THS_ZERO ) \|\| \
lypinator	0:bb348c97df44	1246	((Timing) == DSI_THS_TRAIL ) \|\| \
lypinator	0:bb348c97df44	1247	((Timing) == DSI_THS_PREPARE ) \|\| \
lypinator	0:bb348c97df44	1248	((Timing) == DSI_TCLK_ZERO ) \|\| \
lypinator	0:bb348c97df44	1249	((Timing) == DSI_TCLK_PREPARE))
lypinator	0:bb348c97df44	1250
lypinator	0:bb348c97df44	1251	/**
lypinator	0:bb348c97df44	1252	* @}
lypinator	0:bb348c97df44	1253	*/
lypinator	0:bb348c97df44	1254
lypinator	0:bb348c97df44	1255	/* Private functions prototypes ----------------------------------------------*/
lypinator	0:bb348c97df44	1256	/** @defgroup DSI_Private_Functions_Prototypes DSI Private Functions Prototypes
lypinator	0:bb348c97df44	1257	* @{
lypinator	0:bb348c97df44	1258	*/
lypinator	0:bb348c97df44	1259
lypinator	0:bb348c97df44	1260	/**
lypinator	0:bb348c97df44	1261	* @}
lypinator	0:bb348c97df44	1262	*/
lypinator	0:bb348c97df44	1263
lypinator	0:bb348c97df44	1264	/* Private functions ---------------------------------------------------------*/
lypinator	0:bb348c97df44	1265	/** @defgroup DSI_Private_Functions DSI Private Functions
lypinator	0:bb348c97df44	1266	* @{
lypinator	0:bb348c97df44	1267	*/
lypinator	0:bb348c97df44	1268
lypinator	0:bb348c97df44	1269	/**
lypinator	0:bb348c97df44	1270	* @}
lypinator	0:bb348c97df44	1271	*/
lypinator	0:bb348c97df44	1272
lypinator	0:bb348c97df44	1273	/**
lypinator	0:bb348c97df44	1274	* @}
lypinator	0:bb348c97df44	1275	*/
lypinator	0:bb348c97df44	1276
lypinator	0:bb348c97df44	1277	/**
lypinator	0:bb348c97df44	1278	* @}
lypinator	0:bb348c97df44	1279	*/
lypinator	0:bb348c97df44	1280	#endif /* DSI */
lypinator	0:bb348c97df44	1281
lypinator	0:bb348c97df44	1282	#ifdef __cplusplus
lypinator	0:bb348c97df44	1283	}
lypinator	0:bb348c97df44	1284	#endif
lypinator	0:bb348c97df44	1285
lypinator	0:bb348c97df44	1286	#endif /* __STM32F4xx_HAL_DSI_H */
lypinator	0:bb348c97df44	1287
lypinator	0:bb348c97df44	1288	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	16 Sep 2020
Imports:	1
Forks:	0
Commits:	1
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Dependencies:	1
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mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dsi.h@0:bb348c97df44, 2020-09-16 (annotated)

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