Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dsi.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_dsi.c
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief DSI HAL module driver.
lypinator 0:bb348c97df44 6 * This file provides firmware functions to manage the following
lypinator 0:bb348c97df44 7 * functionalities of the DSI peripheral:
lypinator 0:bb348c97df44 8 * + Initialization and de-initialization functions
lypinator 0:bb348c97df44 9 * + IO operation functions
lypinator 0:bb348c97df44 10 * + Peripheral Control functions
lypinator 0:bb348c97df44 11 * + Peripheral State and Errors functions
lypinator 0:bb348c97df44 12 ******************************************************************************
lypinator 0:bb348c97df44 13 * @attention
lypinator 0:bb348c97df44 14 *
lypinator 0:bb348c97df44 15 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 16 *
lypinator 0:bb348c97df44 17 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 18 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 19 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 20 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 21 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 22 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 23 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 24 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 25 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 26 * without specific prior written permission.
lypinator 0:bb348c97df44 27 *
lypinator 0:bb348c97df44 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 31 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 38 *
lypinator 0:bb348c97df44 39 ******************************************************************************
lypinator 0:bb348c97df44 40 */
lypinator 0:bb348c97df44 41
lypinator 0:bb348c97df44 42 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 43 #include "stm32f4xx_hal.h"
lypinator 0:bb348c97df44 44
lypinator 0:bb348c97df44 45 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 46 * @{
lypinator 0:bb348c97df44 47 */
lypinator 0:bb348c97df44 48
lypinator 0:bb348c97df44 49 #ifdef HAL_DSI_MODULE_ENABLED
lypinator 0:bb348c97df44 50
lypinator 0:bb348c97df44 51 #if defined(DSI)
lypinator 0:bb348c97df44 52
lypinator 0:bb348c97df44 53 /** @addtogroup DSI
lypinator 0:bb348c97df44 54 * @{
lypinator 0:bb348c97df44 55 */
lypinator 0:bb348c97df44 56
lypinator 0:bb348c97df44 57 /* Private types -------------------------------------------------------------*/
lypinator 0:bb348c97df44 58 /* Private defines -----------------------------------------------------------*/
lypinator 0:bb348c97df44 59 /** @addtogroup DSI_Private_Constants
lypinator 0:bb348c97df44 60 * @{
lypinator 0:bb348c97df44 61 */
lypinator 0:bb348c97df44 62 #define DSI_TIMEOUT_VALUE ((uint32_t)1000U) /* 1s */
lypinator 0:bb348c97df44 63
lypinator 0:bb348c97df44 64 #define DSI_ERROR_ACK_MASK (DSI_ISR0_AE0 | DSI_ISR0_AE1 | DSI_ISR0_AE2 | DSI_ISR0_AE3 | \
lypinator 0:bb348c97df44 65 DSI_ISR0_AE4 | DSI_ISR0_AE5 | DSI_ISR0_AE6 | DSI_ISR0_AE7 | \
lypinator 0:bb348c97df44 66 DSI_ISR0_AE8 | DSI_ISR0_AE9 | DSI_ISR0_AE10 | DSI_ISR0_AE11 | \
lypinator 0:bb348c97df44 67 DSI_ISR0_AE12 | DSI_ISR0_AE13 | DSI_ISR0_AE14 | DSI_ISR0_AE15)
lypinator 0:bb348c97df44 68 #define DSI_ERROR_PHY_MASK (DSI_ISR0_PE0 | DSI_ISR0_PE1 | DSI_ISR0_PE2 | DSI_ISR0_PE3 | DSI_ISR0_PE4)
lypinator 0:bb348c97df44 69 #define DSI_ERROR_TX_MASK DSI_ISR1_TOHSTX
lypinator 0:bb348c97df44 70 #define DSI_ERROR_RX_MASK DSI_ISR1_TOLPRX
lypinator 0:bb348c97df44 71 #define DSI_ERROR_ECC_MASK (DSI_ISR1_ECCSE | DSI_ISR1_ECCME)
lypinator 0:bb348c97df44 72 #define DSI_ERROR_CRC_MASK DSI_ISR1_CRCE
lypinator 0:bb348c97df44 73 #define DSI_ERROR_PSE_MASK DSI_ISR1_PSE
lypinator 0:bb348c97df44 74 #define DSI_ERROR_EOT_MASK DSI_ISR1_EOTPE
lypinator 0:bb348c97df44 75 #define DSI_ERROR_OVF_MASK DSI_ISR1_LPWRE
lypinator 0:bb348c97df44 76 #define DSI_ERROR_GEN_MASK (DSI_ISR1_GCWRE | DSI_ISR1_GPWRE | DSI_ISR1_GPTXE | DSI_ISR1_GPRDE | DSI_ISR1_GPRXE)
lypinator 0:bb348c97df44 77 /**
lypinator 0:bb348c97df44 78 * @}
lypinator 0:bb348c97df44 79 */
lypinator 0:bb348c97df44 80
lypinator 0:bb348c97df44 81 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 82 /* Private constants ---------------------------------------------------------*/
lypinator 0:bb348c97df44 83 /* Private macros ------------------------------------------------------------*/
lypinator 0:bb348c97df44 84 /* Private function prototypes -----------------------------------------------*/
lypinator 0:bb348c97df44 85 static void DSI_ConfigPacketHeader(DSI_TypeDef *DSIx, uint32_t ChannelID, uint32_t DataType, uint32_t Data0, uint32_t Data1);
lypinator 0:bb348c97df44 86
lypinator 0:bb348c97df44 87 /* Private functions ---------------------------------------------------------*/
lypinator 0:bb348c97df44 88 /**
lypinator 0:bb348c97df44 89 * @brief Generic DSI packet header configuration
lypinator 0:bb348c97df44 90 * @param DSIx Pointer to DSI register base
lypinator 0:bb348c97df44 91 * @param ChannelID Virtual channel ID of the header packet
lypinator 0:bb348c97df44 92 * @param DataType Packet data type of the header packet
lypinator 0:bb348c97df44 93 * This parameter can be any value of :
lypinator 0:bb348c97df44 94 * @ref DSI_SHORT_WRITE_PKT_Data_Type
lypinator 0:bb348c97df44 95 * or @ref DSI_LONG_WRITE_PKT_Data_Type
lypinator 0:bb348c97df44 96 * or @ref DSI_SHORT_READ_PKT_Data_Type
lypinator 0:bb348c97df44 97 * or DSI_MAX_RETURN_PKT_SIZE
lypinator 0:bb348c97df44 98 * @param Data0 Word count LSB
lypinator 0:bb348c97df44 99 * @param Data1 Word count MSB
lypinator 0:bb348c97df44 100 * @retval None
lypinator 0:bb348c97df44 101 */
lypinator 0:bb348c97df44 102 static void DSI_ConfigPacketHeader(DSI_TypeDef *DSIx,
lypinator 0:bb348c97df44 103 uint32_t ChannelID,
lypinator 0:bb348c97df44 104 uint32_t DataType,
lypinator 0:bb348c97df44 105 uint32_t Data0,
lypinator 0:bb348c97df44 106 uint32_t Data1)
lypinator 0:bb348c97df44 107 {
lypinator 0:bb348c97df44 108 /* Update the DSI packet header with new information */
lypinator 0:bb348c97df44 109 DSIx->GHCR = (DataType | (ChannelID<<6U) | (Data0<<8U) | (Data1<<16U));
lypinator 0:bb348c97df44 110 }
lypinator 0:bb348c97df44 111
lypinator 0:bb348c97df44 112 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 113 /** @addtogroup DSI_Exported_Functions
lypinator 0:bb348c97df44 114 * @{
lypinator 0:bb348c97df44 115 */
lypinator 0:bb348c97df44 116
lypinator 0:bb348c97df44 117 /** @defgroup DSI_Group1 Initialization and Configuration functions
lypinator 0:bb348c97df44 118 * @brief Initialization and Configuration functions
lypinator 0:bb348c97df44 119 *
lypinator 0:bb348c97df44 120 @verbatim
lypinator 0:bb348c97df44 121 ===============================================================================
lypinator 0:bb348c97df44 122 ##### Initialization and Configuration functions #####
lypinator 0:bb348c97df44 123 ===============================================================================
lypinator 0:bb348c97df44 124 [..] This section provides functions allowing to:
lypinator 0:bb348c97df44 125 (+) Initialize and configure the DSI
lypinator 0:bb348c97df44 126 (+) De-initialize the DSI
lypinator 0:bb348c97df44 127
lypinator 0:bb348c97df44 128 @endverbatim
lypinator 0:bb348c97df44 129 * @{
lypinator 0:bb348c97df44 130 */
lypinator 0:bb348c97df44 131
lypinator 0:bb348c97df44 132 /**
lypinator 0:bb348c97df44 133 * @brief Initializes the DSI according to the specified
lypinator 0:bb348c97df44 134 * parameters in the DSI_InitTypeDef and create the associated handle.
lypinator 0:bb348c97df44 135 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 136 * the configuration information for the DSI.
lypinator 0:bb348c97df44 137 * @param PLLInit pointer to a DSI_PLLInitTypeDef structure that contains
lypinator 0:bb348c97df44 138 * the PLL Clock structure definition for the DSI.
lypinator 0:bb348c97df44 139 * @retval HAL status
lypinator 0:bb348c97df44 140 */
lypinator 0:bb348c97df44 141 HAL_StatusTypeDef HAL_DSI_Init(DSI_HandleTypeDef *hdsi, DSI_PLLInitTypeDef *PLLInit)
lypinator 0:bb348c97df44 142 {
lypinator 0:bb348c97df44 143 uint32_t tickstart;
lypinator 0:bb348c97df44 144 uint32_t unitIntervalx4;
lypinator 0:bb348c97df44 145 uint32_t tempIDF;
lypinator 0:bb348c97df44 146
lypinator 0:bb348c97df44 147 /* Check the DSI handle allocation */
lypinator 0:bb348c97df44 148 if(hdsi == NULL)
lypinator 0:bb348c97df44 149 {
lypinator 0:bb348c97df44 150 return HAL_ERROR;
lypinator 0:bb348c97df44 151 }
lypinator 0:bb348c97df44 152
lypinator 0:bb348c97df44 153 /* Check function parameters */
lypinator 0:bb348c97df44 154 assert_param(IS_DSI_PLL_NDIV(PLLInit->PLLNDIV));
lypinator 0:bb348c97df44 155 assert_param(IS_DSI_PLL_IDF(PLLInit->PLLIDF));
lypinator 0:bb348c97df44 156 assert_param(IS_DSI_PLL_ODF(PLLInit->PLLODF));
lypinator 0:bb348c97df44 157 assert_param(IS_DSI_AUTO_CLKLANE_CONTROL(hdsi->Init.AutomaticClockLaneControl));
lypinator 0:bb348c97df44 158 assert_param(IS_DSI_NUMBER_OF_LANES(hdsi->Init.NumberOfLanes));
lypinator 0:bb348c97df44 159
lypinator 0:bb348c97df44 160 if(hdsi->State == HAL_DSI_STATE_RESET)
lypinator 0:bb348c97df44 161 {
lypinator 0:bb348c97df44 162 /* Initialize the low level hardware */
lypinator 0:bb348c97df44 163 HAL_DSI_MspInit(hdsi);
lypinator 0:bb348c97df44 164 }
lypinator 0:bb348c97df44 165
lypinator 0:bb348c97df44 166 /* Change DSI peripheral state */
lypinator 0:bb348c97df44 167 hdsi->State = HAL_DSI_STATE_BUSY;
lypinator 0:bb348c97df44 168
lypinator 0:bb348c97df44 169 /**************** Turn on the regulator and enable the DSI PLL ****************/
lypinator 0:bb348c97df44 170
lypinator 0:bb348c97df44 171 /* Enable the regulator */
lypinator 0:bb348c97df44 172 __HAL_DSI_REG_ENABLE(hdsi);
lypinator 0:bb348c97df44 173
lypinator 0:bb348c97df44 174 /* Get tick */
lypinator 0:bb348c97df44 175 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 176
lypinator 0:bb348c97df44 177 /* Wait until the regulator is ready */
lypinator 0:bb348c97df44 178 while(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_RRS) == RESET)
lypinator 0:bb348c97df44 179 {
lypinator 0:bb348c97df44 180 /* Check for the Timeout */
lypinator 0:bb348c97df44 181 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 182 {
lypinator 0:bb348c97df44 183 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 184 }
lypinator 0:bb348c97df44 185 }
lypinator 0:bb348c97df44 186
lypinator 0:bb348c97df44 187 /* Set the PLL division factors */
lypinator 0:bb348c97df44 188 hdsi->Instance->WRPCR &= ~(DSI_WRPCR_PLL_NDIV | DSI_WRPCR_PLL_IDF | DSI_WRPCR_PLL_ODF);
lypinator 0:bb348c97df44 189 hdsi->Instance->WRPCR |= (((PLLInit->PLLNDIV)<<2U) | ((PLLInit->PLLIDF)<<11U) | ((PLLInit->PLLODF)<<16U));
lypinator 0:bb348c97df44 190
lypinator 0:bb348c97df44 191 /* Enable the DSI PLL */
lypinator 0:bb348c97df44 192 __HAL_DSI_PLL_ENABLE(hdsi);
lypinator 0:bb348c97df44 193
lypinator 0:bb348c97df44 194 /* Get tick */
lypinator 0:bb348c97df44 195 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 196
lypinator 0:bb348c97df44 197 /* Wait for the lock of the PLL */
lypinator 0:bb348c97df44 198 while(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == RESET)
lypinator 0:bb348c97df44 199 {
lypinator 0:bb348c97df44 200 /* Check for the Timeout */
lypinator 0:bb348c97df44 201 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 202 {
lypinator 0:bb348c97df44 203 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 204 }
lypinator 0:bb348c97df44 205 }
lypinator 0:bb348c97df44 206
lypinator 0:bb348c97df44 207 /*************************** Set the PHY parameters ***************************/
lypinator 0:bb348c97df44 208
lypinator 0:bb348c97df44 209 /* D-PHY clock and digital enable*/
lypinator 0:bb348c97df44 210 hdsi->Instance->PCTLR |= (DSI_PCTLR_CKE | DSI_PCTLR_DEN);
lypinator 0:bb348c97df44 211
lypinator 0:bb348c97df44 212 /* Clock lane configuration */
lypinator 0:bb348c97df44 213 hdsi->Instance->CLCR &= ~(DSI_CLCR_DPCC | DSI_CLCR_ACR);
lypinator 0:bb348c97df44 214 hdsi->Instance->CLCR |= (DSI_CLCR_DPCC | hdsi->Init.AutomaticClockLaneControl);
lypinator 0:bb348c97df44 215
lypinator 0:bb348c97df44 216 /* Configure the number of active data lanes */
lypinator 0:bb348c97df44 217 hdsi->Instance->PCONFR &= ~DSI_PCONFR_NL;
lypinator 0:bb348c97df44 218 hdsi->Instance->PCONFR |= hdsi->Init.NumberOfLanes;
lypinator 0:bb348c97df44 219
lypinator 0:bb348c97df44 220 /************************ Set the DSI clock parameters ************************/
lypinator 0:bb348c97df44 221
lypinator 0:bb348c97df44 222 /* Set the TX escape clock division factor */
lypinator 0:bb348c97df44 223 hdsi->Instance->CCR &= ~DSI_CCR_TXECKDIV;
lypinator 0:bb348c97df44 224 hdsi->Instance->CCR |= hdsi->Init.TXEscapeCkdiv;
lypinator 0:bb348c97df44 225
lypinator 0:bb348c97df44 226 /* Calculate the bit period in high-speed mode in unit of 0.25 ns (UIX4) */
lypinator 0:bb348c97df44 227 /* The equation is : UIX4 = IntegerPart( (1000/F_PHY_Mhz) * 4 ) */
lypinator 0:bb348c97df44 228 /* Where : F_PHY_Mhz = (NDIV * HSE_Mhz) / (IDF * ODF) */
lypinator 0:bb348c97df44 229 tempIDF = (PLLInit->PLLIDF > 0U) ? PLLInit->PLLIDF : 1U;
lypinator 0:bb348c97df44 230 unitIntervalx4 = (4000000U * tempIDF * (1U << PLLInit->PLLODF)) / ((HSE_VALUE/1000U) * PLLInit->PLLNDIV);
lypinator 0:bb348c97df44 231
lypinator 0:bb348c97df44 232 /* Set the bit period in high-speed mode */
lypinator 0:bb348c97df44 233 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_UIX4;
lypinator 0:bb348c97df44 234 hdsi->Instance->WPCR[0U] |= unitIntervalx4;
lypinator 0:bb348c97df44 235
lypinator 0:bb348c97df44 236 /****************************** Error management *****************************/
lypinator 0:bb348c97df44 237
lypinator 0:bb348c97df44 238 /* Disable all error interrupts and reset the Error Mask */
lypinator 0:bb348c97df44 239 hdsi->Instance->IER[0U] = 0U;
lypinator 0:bb348c97df44 240 hdsi->Instance->IER[1U] = 0U;
lypinator 0:bb348c97df44 241 hdsi->ErrorMsk = 0U;
lypinator 0:bb348c97df44 242
lypinator 0:bb348c97df44 243 /* Initialise the error code */
lypinator 0:bb348c97df44 244 hdsi->ErrorCode = HAL_DSI_ERROR_NONE;
lypinator 0:bb348c97df44 245
lypinator 0:bb348c97df44 246 /* Initialize the DSI state*/
lypinator 0:bb348c97df44 247 hdsi->State = HAL_DSI_STATE_READY;
lypinator 0:bb348c97df44 248
lypinator 0:bb348c97df44 249 return HAL_OK;
lypinator 0:bb348c97df44 250 }
lypinator 0:bb348c97df44 251
lypinator 0:bb348c97df44 252 /**
lypinator 0:bb348c97df44 253 * @brief De-initializes the DSI peripheral registers to their default reset
lypinator 0:bb348c97df44 254 * values.
lypinator 0:bb348c97df44 255 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 256 * the configuration information for the DSI.
lypinator 0:bb348c97df44 257 * @retval HAL status
lypinator 0:bb348c97df44 258 */
lypinator 0:bb348c97df44 259 HAL_StatusTypeDef HAL_DSI_DeInit(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 260 {
lypinator 0:bb348c97df44 261 /* Check the DSI handle allocation */
lypinator 0:bb348c97df44 262 if(hdsi == NULL)
lypinator 0:bb348c97df44 263 {
lypinator 0:bb348c97df44 264 return HAL_ERROR;
lypinator 0:bb348c97df44 265 }
lypinator 0:bb348c97df44 266
lypinator 0:bb348c97df44 267 /* Change DSI peripheral state */
lypinator 0:bb348c97df44 268 hdsi->State = HAL_DSI_STATE_BUSY;
lypinator 0:bb348c97df44 269
lypinator 0:bb348c97df44 270 /* Disable the DSI wrapper */
lypinator 0:bb348c97df44 271 __HAL_DSI_WRAPPER_DISABLE(hdsi);
lypinator 0:bb348c97df44 272
lypinator 0:bb348c97df44 273 /* Disable the DSI host */
lypinator 0:bb348c97df44 274 __HAL_DSI_DISABLE(hdsi);
lypinator 0:bb348c97df44 275
lypinator 0:bb348c97df44 276 /* D-PHY clock and digital disable */
lypinator 0:bb348c97df44 277 hdsi->Instance->PCTLR &= ~(DSI_PCTLR_CKE | DSI_PCTLR_DEN);
lypinator 0:bb348c97df44 278
lypinator 0:bb348c97df44 279 /* Turn off the DSI PLL */
lypinator 0:bb348c97df44 280 __HAL_DSI_PLL_DISABLE(hdsi);
lypinator 0:bb348c97df44 281
lypinator 0:bb348c97df44 282 /* Disable the regulator */
lypinator 0:bb348c97df44 283 __HAL_DSI_REG_DISABLE(hdsi);
lypinator 0:bb348c97df44 284
lypinator 0:bb348c97df44 285 /* DeInit the low level hardware */
lypinator 0:bb348c97df44 286 HAL_DSI_MspDeInit(hdsi);
lypinator 0:bb348c97df44 287
lypinator 0:bb348c97df44 288 /* Initialise the error code */
lypinator 0:bb348c97df44 289 hdsi->ErrorCode = HAL_DSI_ERROR_NONE;
lypinator 0:bb348c97df44 290
lypinator 0:bb348c97df44 291 /* Initialize the DSI state*/
lypinator 0:bb348c97df44 292 hdsi->State = HAL_DSI_STATE_RESET;
lypinator 0:bb348c97df44 293
lypinator 0:bb348c97df44 294 /* Release Lock */
lypinator 0:bb348c97df44 295 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 296
lypinator 0:bb348c97df44 297 return HAL_OK;
lypinator 0:bb348c97df44 298 }
lypinator 0:bb348c97df44 299
lypinator 0:bb348c97df44 300 /**
lypinator 0:bb348c97df44 301 * @brief Enable the error monitor flags
lypinator 0:bb348c97df44 302 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 303 * the configuration information for the DSI.
lypinator 0:bb348c97df44 304 * @param ActiveErrors indicates which error interrupts will be enabled.
lypinator 0:bb348c97df44 305 * This parameter can be any combination of @ref DSI_Error_Data_Type.
lypinator 0:bb348c97df44 306 * @retval HAL status
lypinator 0:bb348c97df44 307 */
lypinator 0:bb348c97df44 308 HAL_StatusTypeDef HAL_DSI_ConfigErrorMonitor(DSI_HandleTypeDef *hdsi, uint32_t ActiveErrors)
lypinator 0:bb348c97df44 309 {
lypinator 0:bb348c97df44 310 /* Process locked */
lypinator 0:bb348c97df44 311 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 312
lypinator 0:bb348c97df44 313 hdsi->Instance->IER[0U] = 0U;
lypinator 0:bb348c97df44 314 hdsi->Instance->IER[1U] = 0U;
lypinator 0:bb348c97df44 315
lypinator 0:bb348c97df44 316 /* Store active errors to the handle */
lypinator 0:bb348c97df44 317 hdsi->ErrorMsk = ActiveErrors;
lypinator 0:bb348c97df44 318
lypinator 0:bb348c97df44 319 if((ActiveErrors & HAL_DSI_ERROR_ACK) != RESET)
lypinator 0:bb348c97df44 320 {
lypinator 0:bb348c97df44 321 /* Enable the interrupt generation on selected errors */
lypinator 0:bb348c97df44 322 hdsi->Instance->IER[0U] |= DSI_ERROR_ACK_MASK;
lypinator 0:bb348c97df44 323 }
lypinator 0:bb348c97df44 324
lypinator 0:bb348c97df44 325 if((ActiveErrors & HAL_DSI_ERROR_PHY) != RESET)
lypinator 0:bb348c97df44 326 {
lypinator 0:bb348c97df44 327 /* Enable the interrupt generation on selected errors */
lypinator 0:bb348c97df44 328 hdsi->Instance->IER[0U] |= DSI_ERROR_PHY_MASK;
lypinator 0:bb348c97df44 329 }
lypinator 0:bb348c97df44 330
lypinator 0:bb348c97df44 331 if((ActiveErrors & HAL_DSI_ERROR_TX) != RESET)
lypinator 0:bb348c97df44 332 {
lypinator 0:bb348c97df44 333 /* Enable the interrupt generation on selected errors */
lypinator 0:bb348c97df44 334 hdsi->Instance->IER[1U] |= DSI_ERROR_TX_MASK;
lypinator 0:bb348c97df44 335 }
lypinator 0:bb348c97df44 336
lypinator 0:bb348c97df44 337 if((ActiveErrors & HAL_DSI_ERROR_RX) != RESET)
lypinator 0:bb348c97df44 338 {
lypinator 0:bb348c97df44 339 /* Enable the interrupt generation on selected errors */
lypinator 0:bb348c97df44 340 hdsi->Instance->IER[1U] |= DSI_ERROR_RX_MASK;
lypinator 0:bb348c97df44 341 }
lypinator 0:bb348c97df44 342
lypinator 0:bb348c97df44 343 if((ActiveErrors & HAL_DSI_ERROR_ECC) != RESET)
lypinator 0:bb348c97df44 344 {
lypinator 0:bb348c97df44 345 /* Enable the interrupt generation on selected errors */
lypinator 0:bb348c97df44 346 hdsi->Instance->IER[1U] |= DSI_ERROR_ECC_MASK;
lypinator 0:bb348c97df44 347 }
lypinator 0:bb348c97df44 348
lypinator 0:bb348c97df44 349 if((ActiveErrors & HAL_DSI_ERROR_CRC) != RESET)
lypinator 0:bb348c97df44 350 {
lypinator 0:bb348c97df44 351 /* Enable the interrupt generation on selected errors */
lypinator 0:bb348c97df44 352 hdsi->Instance->IER[1U] |= DSI_ERROR_CRC_MASK;
lypinator 0:bb348c97df44 353 }
lypinator 0:bb348c97df44 354
lypinator 0:bb348c97df44 355 if((ActiveErrors & HAL_DSI_ERROR_PSE) != RESET)
lypinator 0:bb348c97df44 356 {
lypinator 0:bb348c97df44 357 /* Enable the interrupt generation on selected errors */
lypinator 0:bb348c97df44 358 hdsi->Instance->IER[1U] |= DSI_ERROR_PSE_MASK;
lypinator 0:bb348c97df44 359 }
lypinator 0:bb348c97df44 360
lypinator 0:bb348c97df44 361 if((ActiveErrors & HAL_DSI_ERROR_EOT) != RESET)
lypinator 0:bb348c97df44 362 {
lypinator 0:bb348c97df44 363 /* Enable the interrupt generation on selected errors */
lypinator 0:bb348c97df44 364 hdsi->Instance->IER[1U] |= DSI_ERROR_EOT_MASK;
lypinator 0:bb348c97df44 365 }
lypinator 0:bb348c97df44 366
lypinator 0:bb348c97df44 367 if((ActiveErrors & HAL_DSI_ERROR_OVF) != RESET)
lypinator 0:bb348c97df44 368 {
lypinator 0:bb348c97df44 369 /* Enable the interrupt generation on selected errors */
lypinator 0:bb348c97df44 370 hdsi->Instance->IER[1U] |= DSI_ERROR_OVF_MASK;
lypinator 0:bb348c97df44 371 }
lypinator 0:bb348c97df44 372
lypinator 0:bb348c97df44 373 if((ActiveErrors & HAL_DSI_ERROR_GEN) != RESET)
lypinator 0:bb348c97df44 374 {
lypinator 0:bb348c97df44 375 /* Enable the interrupt generation on selected errors */
lypinator 0:bb348c97df44 376 hdsi->Instance->IER[1U] |= DSI_ERROR_GEN_MASK;
lypinator 0:bb348c97df44 377 }
lypinator 0:bb348c97df44 378
lypinator 0:bb348c97df44 379 /* Process Unlocked */
lypinator 0:bb348c97df44 380 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 381
lypinator 0:bb348c97df44 382 return HAL_OK;
lypinator 0:bb348c97df44 383 }
lypinator 0:bb348c97df44 384
lypinator 0:bb348c97df44 385 /**
lypinator 0:bb348c97df44 386 * @brief Initializes the DSI MSP.
lypinator 0:bb348c97df44 387 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 388 * the configuration information for the DSI.
lypinator 0:bb348c97df44 389 * @retval None
lypinator 0:bb348c97df44 390 */
lypinator 0:bb348c97df44 391 __weak void HAL_DSI_MspInit(DSI_HandleTypeDef* hdsi)
lypinator 0:bb348c97df44 392 {
lypinator 0:bb348c97df44 393 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 394 UNUSED(hdsi);
lypinator 0:bb348c97df44 395 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 396 the HAL_DSI_MspInit could be implemented in the user file
lypinator 0:bb348c97df44 397 */
lypinator 0:bb348c97df44 398 }
lypinator 0:bb348c97df44 399
lypinator 0:bb348c97df44 400 /**
lypinator 0:bb348c97df44 401 * @brief De-initializes the DSI MSP.
lypinator 0:bb348c97df44 402 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 403 * the configuration information for the DSI.
lypinator 0:bb348c97df44 404 * @retval None
lypinator 0:bb348c97df44 405 */
lypinator 0:bb348c97df44 406 __weak void HAL_DSI_MspDeInit(DSI_HandleTypeDef* hdsi)
lypinator 0:bb348c97df44 407 {
lypinator 0:bb348c97df44 408 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 409 UNUSED(hdsi);
lypinator 0:bb348c97df44 410 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 411 the HAL_DSI_MspDeInit could be implemented in the user file
lypinator 0:bb348c97df44 412 */
lypinator 0:bb348c97df44 413 }
lypinator 0:bb348c97df44 414
lypinator 0:bb348c97df44 415 /**
lypinator 0:bb348c97df44 416 * @}
lypinator 0:bb348c97df44 417 */
lypinator 0:bb348c97df44 418
lypinator 0:bb348c97df44 419 /** @defgroup DSI_Group2 IO operation functions
lypinator 0:bb348c97df44 420 * @brief IO operation functions
lypinator 0:bb348c97df44 421 *
lypinator 0:bb348c97df44 422 @verbatim
lypinator 0:bb348c97df44 423 ===============================================================================
lypinator 0:bb348c97df44 424 ##### IO operation functions #####
lypinator 0:bb348c97df44 425 ===============================================================================
lypinator 0:bb348c97df44 426 [..] This section provides function allowing to:
lypinator 0:bb348c97df44 427 (+) Handle DSI interrupt request
lypinator 0:bb348c97df44 428
lypinator 0:bb348c97df44 429 @endverbatim
lypinator 0:bb348c97df44 430 * @{
lypinator 0:bb348c97df44 431 */
lypinator 0:bb348c97df44 432 /**
lypinator 0:bb348c97df44 433 * @brief Handles DSI interrupt request.
lypinator 0:bb348c97df44 434 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 435 * the configuration information for the DSI.
lypinator 0:bb348c97df44 436 * @retval HAL status
lypinator 0:bb348c97df44 437 */
lypinator 0:bb348c97df44 438 void HAL_DSI_IRQHandler(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 439 {
lypinator 0:bb348c97df44 440 uint32_t ErrorStatus0, ErrorStatus1;
lypinator 0:bb348c97df44 441
lypinator 0:bb348c97df44 442 /* Tearing Effect Interrupt management ***************************************/
lypinator 0:bb348c97df44 443 if(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_TE) != RESET)
lypinator 0:bb348c97df44 444 {
lypinator 0:bb348c97df44 445 if(__HAL_DSI_GET_IT_SOURCE(hdsi, DSI_IT_TE) != RESET)
lypinator 0:bb348c97df44 446 {
lypinator 0:bb348c97df44 447 /* Clear the Tearing Effect Interrupt Flag */
lypinator 0:bb348c97df44 448 __HAL_DSI_CLEAR_FLAG(hdsi, DSI_FLAG_TE);
lypinator 0:bb348c97df44 449
lypinator 0:bb348c97df44 450 /* Tearing Effect Callback */
lypinator 0:bb348c97df44 451 HAL_DSI_TearingEffectCallback(hdsi);
lypinator 0:bb348c97df44 452 }
lypinator 0:bb348c97df44 453 }
lypinator 0:bb348c97df44 454
lypinator 0:bb348c97df44 455 /* End of Refresh Interrupt management ***************************************/
lypinator 0:bb348c97df44 456 if(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_ER) != RESET)
lypinator 0:bb348c97df44 457 {
lypinator 0:bb348c97df44 458 if(__HAL_DSI_GET_IT_SOURCE(hdsi, DSI_IT_ER) != RESET)
lypinator 0:bb348c97df44 459 {
lypinator 0:bb348c97df44 460 /* Clear the End of Refresh Interrupt Flag */
lypinator 0:bb348c97df44 461 __HAL_DSI_CLEAR_FLAG(hdsi, DSI_FLAG_ER);
lypinator 0:bb348c97df44 462
lypinator 0:bb348c97df44 463 /* End of Refresh Callback */
lypinator 0:bb348c97df44 464 HAL_DSI_EndOfRefreshCallback(hdsi);
lypinator 0:bb348c97df44 465 }
lypinator 0:bb348c97df44 466 }
lypinator 0:bb348c97df44 467
lypinator 0:bb348c97df44 468 /* Error Interrupts management ***********************************************/
lypinator 0:bb348c97df44 469 if(hdsi->ErrorMsk != 0U)
lypinator 0:bb348c97df44 470 {
lypinator 0:bb348c97df44 471 ErrorStatus0 = hdsi->Instance->ISR[0U];
lypinator 0:bb348c97df44 472 ErrorStatus0 &= hdsi->Instance->IER[0U];
lypinator 0:bb348c97df44 473 ErrorStatus1 = hdsi->Instance->ISR[1U];
lypinator 0:bb348c97df44 474 ErrorStatus1 &= hdsi->Instance->IER[1U];
lypinator 0:bb348c97df44 475
lypinator 0:bb348c97df44 476 if((ErrorStatus0 & DSI_ERROR_ACK_MASK) != RESET)
lypinator 0:bb348c97df44 477 {
lypinator 0:bb348c97df44 478 hdsi->ErrorCode |= HAL_DSI_ERROR_ACK;
lypinator 0:bb348c97df44 479 }
lypinator 0:bb348c97df44 480
lypinator 0:bb348c97df44 481 if((ErrorStatus0 & DSI_ERROR_PHY_MASK) != RESET)
lypinator 0:bb348c97df44 482 {
lypinator 0:bb348c97df44 483 hdsi->ErrorCode |= HAL_DSI_ERROR_PHY;
lypinator 0:bb348c97df44 484 }
lypinator 0:bb348c97df44 485
lypinator 0:bb348c97df44 486 if((ErrorStatus1 & DSI_ERROR_TX_MASK) != RESET)
lypinator 0:bb348c97df44 487 {
lypinator 0:bb348c97df44 488 hdsi->ErrorCode |= HAL_DSI_ERROR_TX;
lypinator 0:bb348c97df44 489 }
lypinator 0:bb348c97df44 490
lypinator 0:bb348c97df44 491 if((ErrorStatus1 & DSI_ERROR_RX_MASK) != RESET)
lypinator 0:bb348c97df44 492 {
lypinator 0:bb348c97df44 493 hdsi->ErrorCode |= HAL_DSI_ERROR_RX;
lypinator 0:bb348c97df44 494 }
lypinator 0:bb348c97df44 495
lypinator 0:bb348c97df44 496 if((ErrorStatus1 & DSI_ERROR_ECC_MASK) != RESET)
lypinator 0:bb348c97df44 497 {
lypinator 0:bb348c97df44 498 hdsi->ErrorCode |= HAL_DSI_ERROR_ECC;
lypinator 0:bb348c97df44 499 }
lypinator 0:bb348c97df44 500
lypinator 0:bb348c97df44 501 if((ErrorStatus1 & DSI_ERROR_CRC_MASK) != RESET)
lypinator 0:bb348c97df44 502 {
lypinator 0:bb348c97df44 503 hdsi->ErrorCode |= HAL_DSI_ERROR_CRC;
lypinator 0:bb348c97df44 504 }
lypinator 0:bb348c97df44 505
lypinator 0:bb348c97df44 506 if((ErrorStatus1 & DSI_ERROR_PSE_MASK) != RESET)
lypinator 0:bb348c97df44 507 {
lypinator 0:bb348c97df44 508 hdsi->ErrorCode |= HAL_DSI_ERROR_PSE;
lypinator 0:bb348c97df44 509 }
lypinator 0:bb348c97df44 510
lypinator 0:bb348c97df44 511 if((ErrorStatus1 & DSI_ERROR_EOT_MASK) != RESET)
lypinator 0:bb348c97df44 512 {
lypinator 0:bb348c97df44 513 hdsi->ErrorCode |= HAL_DSI_ERROR_EOT;
lypinator 0:bb348c97df44 514 }
lypinator 0:bb348c97df44 515
lypinator 0:bb348c97df44 516 if((ErrorStatus1 & DSI_ERROR_OVF_MASK) != RESET)
lypinator 0:bb348c97df44 517 {
lypinator 0:bb348c97df44 518 hdsi->ErrorCode |= HAL_DSI_ERROR_OVF;
lypinator 0:bb348c97df44 519 }
lypinator 0:bb348c97df44 520
lypinator 0:bb348c97df44 521 if((ErrorStatus1 & DSI_ERROR_GEN_MASK) != RESET)
lypinator 0:bb348c97df44 522 {
lypinator 0:bb348c97df44 523 hdsi->ErrorCode |= HAL_DSI_ERROR_GEN;
lypinator 0:bb348c97df44 524 }
lypinator 0:bb348c97df44 525
lypinator 0:bb348c97df44 526 /* Check only selected errors */
lypinator 0:bb348c97df44 527 if(hdsi->ErrorCode != HAL_DSI_ERROR_NONE)
lypinator 0:bb348c97df44 528 {
lypinator 0:bb348c97df44 529 /* DSI error interrupt user callback */
lypinator 0:bb348c97df44 530 HAL_DSI_ErrorCallback(hdsi);
lypinator 0:bb348c97df44 531 }
lypinator 0:bb348c97df44 532 }
lypinator 0:bb348c97df44 533 }
lypinator 0:bb348c97df44 534
lypinator 0:bb348c97df44 535 /**
lypinator 0:bb348c97df44 536 * @brief Tearing Effect DSI callback.
lypinator 0:bb348c97df44 537 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 538 * the configuration information for the DSI.
lypinator 0:bb348c97df44 539 * @retval None
lypinator 0:bb348c97df44 540 */
lypinator 0:bb348c97df44 541 __weak void HAL_DSI_TearingEffectCallback(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 542 {
lypinator 0:bb348c97df44 543 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 544 UNUSED(hdsi);
lypinator 0:bb348c97df44 545 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 546 the HAL_DSI_TearingEffectCallback could be implemented in the user file
lypinator 0:bb348c97df44 547 */
lypinator 0:bb348c97df44 548 }
lypinator 0:bb348c97df44 549
lypinator 0:bb348c97df44 550 /**
lypinator 0:bb348c97df44 551 * @brief End of Refresh DSI callback.
lypinator 0:bb348c97df44 552 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 553 * the configuration information for the DSI.
lypinator 0:bb348c97df44 554 * @retval None
lypinator 0:bb348c97df44 555 */
lypinator 0:bb348c97df44 556 __weak void HAL_DSI_EndOfRefreshCallback(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 557 {
lypinator 0:bb348c97df44 558 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 559 UNUSED(hdsi);
lypinator 0:bb348c97df44 560 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 561 the HAL_DSI_EndOfRefreshCallback could be implemented in the user file
lypinator 0:bb348c97df44 562 */
lypinator 0:bb348c97df44 563 }
lypinator 0:bb348c97df44 564
lypinator 0:bb348c97df44 565 /**
lypinator 0:bb348c97df44 566 * @brief Operation Error DSI callback.
lypinator 0:bb348c97df44 567 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 568 * the configuration information for the DSI.
lypinator 0:bb348c97df44 569 * @retval None
lypinator 0:bb348c97df44 570 */
lypinator 0:bb348c97df44 571 __weak void HAL_DSI_ErrorCallback(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 572 {
lypinator 0:bb348c97df44 573 /* Prevent unused argument(s) compilation warning */
lypinator 0:bb348c97df44 574 UNUSED(hdsi);
lypinator 0:bb348c97df44 575 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 576 the HAL_DSI_ErrorCallback could be implemented in the user file
lypinator 0:bb348c97df44 577 */
lypinator 0:bb348c97df44 578 }
lypinator 0:bb348c97df44 579
lypinator 0:bb348c97df44 580 /**
lypinator 0:bb348c97df44 581 * @}
lypinator 0:bb348c97df44 582 */
lypinator 0:bb348c97df44 583
lypinator 0:bb348c97df44 584 /** @defgroup DSI_Group3 Peripheral Control functions
lypinator 0:bb348c97df44 585 * @brief Peripheral Control functions
lypinator 0:bb348c97df44 586 *
lypinator 0:bb348c97df44 587 @verbatim
lypinator 0:bb348c97df44 588 ===============================================================================
lypinator 0:bb348c97df44 589 ##### Peripheral Control functions #####
lypinator 0:bb348c97df44 590 ===============================================================================
lypinator 0:bb348c97df44 591 [..] This section provides functions allowing to:
lypinator 0:bb348c97df44 592 (+) Configure the Generic interface read-back Virtual Channel ID
lypinator 0:bb348c97df44 593 (+) Select video mode and configure the corresponding parameters
lypinator 0:bb348c97df44 594 (+) Configure command transmission mode: High-speed or Low-power
lypinator 0:bb348c97df44 595 (+) Configure the flow control
lypinator 0:bb348c97df44 596 (+) Configure the DSI PHY timer
lypinator 0:bb348c97df44 597 (+) Configure the DSI HOST timeout
lypinator 0:bb348c97df44 598 (+) Configure the DSI HOST timeout
lypinator 0:bb348c97df44 599 (+) Start/Stop the DSI module
lypinator 0:bb348c97df44 600 (+) Refresh the display in command mode
lypinator 0:bb348c97df44 601 (+) Controls the display color mode in Video mode
lypinator 0:bb348c97df44 602 (+) Control the display shutdown in Video mode
lypinator 0:bb348c97df44 603 (+) write short DCS or short Generic command
lypinator 0:bb348c97df44 604 (+) write long DCS or long Generic command
lypinator 0:bb348c97df44 605 (+) Read command (DCS or generic)
lypinator 0:bb348c97df44 606 (+) Enter/Exit the Ultra Low Power Mode on data only (D-PHY PLL running)
lypinator 0:bb348c97df44 607 (+) Enter/Exit the Ultra Low Power Mode on data only and clock (D-PHY PLL turned off)
lypinator 0:bb348c97df44 608 (+) Start/Stop test pattern generation
lypinator 0:bb348c97df44 609 (+) Slew-Rate And Delay Tuning
lypinator 0:bb348c97df44 610 (+) Low-Power Reception Filter Tuning
lypinator 0:bb348c97df44 611 (+) Activate an additional current path on all lanes to meet the SDDTx parameter
lypinator 0:bb348c97df44 612 (+) Custom lane pins configuration
lypinator 0:bb348c97df44 613 (+) Set custom timing for the PHY
lypinator 0:bb348c97df44 614 (+) Force the Clock/Data Lane in TX Stop Mode
lypinator 0:bb348c97df44 615 (+) Force LP Receiver in Low-Power Mode
lypinator 0:bb348c97df44 616 (+) Force Data Lanes in RX Mode after a BTA
lypinator 0:bb348c97df44 617 (+) Enable a pull-down on the lanes to prevent from floating states when unused
lypinator 0:bb348c97df44 618 (+) Switch off the contention detection on data lanes
lypinator 0:bb348c97df44 619
lypinator 0:bb348c97df44 620 @endverbatim
lypinator 0:bb348c97df44 621 * @{
lypinator 0:bb348c97df44 622 */
lypinator 0:bb348c97df44 623
lypinator 0:bb348c97df44 624 /**
lypinator 0:bb348c97df44 625 * @brief Configure the Generic interface read-back Virtual Channel ID.
lypinator 0:bb348c97df44 626 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 627 * the configuration information for the DSI.
lypinator 0:bb348c97df44 628 * @param VirtualChannelID Virtual channel ID
lypinator 0:bb348c97df44 629 * @retval HAL status
lypinator 0:bb348c97df44 630 */
lypinator 0:bb348c97df44 631 HAL_StatusTypeDef HAL_DSI_SetGenericVCID(DSI_HandleTypeDef *hdsi, uint32_t VirtualChannelID)
lypinator 0:bb348c97df44 632 {
lypinator 0:bb348c97df44 633 /* Process locked */
lypinator 0:bb348c97df44 634 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 635
lypinator 0:bb348c97df44 636 /* Update the GVCID register */
lypinator 0:bb348c97df44 637 hdsi->Instance->GVCIDR &= ~DSI_GVCIDR_VCID;
lypinator 0:bb348c97df44 638 hdsi->Instance->GVCIDR |= VirtualChannelID;
lypinator 0:bb348c97df44 639
lypinator 0:bb348c97df44 640 /* Process unlocked */
lypinator 0:bb348c97df44 641 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 642
lypinator 0:bb348c97df44 643 return HAL_OK;
lypinator 0:bb348c97df44 644 }
lypinator 0:bb348c97df44 645
lypinator 0:bb348c97df44 646 /**
lypinator 0:bb348c97df44 647 * @brief Select video mode and configure the corresponding parameters
lypinator 0:bb348c97df44 648 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 649 * the configuration information for the DSI.
lypinator 0:bb348c97df44 650 * @param VidCfg pointer to a DSI_VidCfgTypeDef structure that contains
lypinator 0:bb348c97df44 651 * the DSI video mode configuration parameters
lypinator 0:bb348c97df44 652 * @retval HAL status
lypinator 0:bb348c97df44 653 */
lypinator 0:bb348c97df44 654 HAL_StatusTypeDef HAL_DSI_ConfigVideoMode(DSI_HandleTypeDef *hdsi, DSI_VidCfgTypeDef *VidCfg)
lypinator 0:bb348c97df44 655 {
lypinator 0:bb348c97df44 656 /* Process locked */
lypinator 0:bb348c97df44 657 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 658
lypinator 0:bb348c97df44 659 /* Check the parameters */
lypinator 0:bb348c97df44 660 assert_param(IS_DSI_COLOR_CODING(VidCfg->ColorCoding));
lypinator 0:bb348c97df44 661 assert_param(IS_DSI_VIDEO_MODE_TYPE(VidCfg->Mode));
lypinator 0:bb348c97df44 662 assert_param(IS_DSI_LP_COMMAND(VidCfg->LPCommandEnable));
lypinator 0:bb348c97df44 663 assert_param(IS_DSI_LP_HFP(VidCfg->LPHorizontalFrontPorchEnable));
lypinator 0:bb348c97df44 664 assert_param(IS_DSI_LP_HBP(VidCfg->LPHorizontalBackPorchEnable));
lypinator 0:bb348c97df44 665 assert_param(IS_DSI_LP_VACTIVE(VidCfg->LPVerticalActiveEnable));
lypinator 0:bb348c97df44 666 assert_param(IS_DSI_LP_VFP(VidCfg->LPVerticalFrontPorchEnable));
lypinator 0:bb348c97df44 667 assert_param(IS_DSI_LP_VBP(VidCfg->LPVerticalBackPorchEnable));
lypinator 0:bb348c97df44 668 assert_param(IS_DSI_LP_VSYNC(VidCfg->LPVerticalSyncActiveEnable));
lypinator 0:bb348c97df44 669 assert_param(IS_DSI_FBTAA(VidCfg->FrameBTAAcknowledgeEnable));
lypinator 0:bb348c97df44 670 assert_param(IS_DSI_DE_POLARITY(VidCfg->DEPolarity));
lypinator 0:bb348c97df44 671 assert_param(IS_DSI_VSYNC_POLARITY(VidCfg->VSPolarity));
lypinator 0:bb348c97df44 672 assert_param(IS_DSI_HSYNC_POLARITY(VidCfg->HSPolarity));
lypinator 0:bb348c97df44 673 /* Check the LooselyPacked variant only in 18-bit mode */
lypinator 0:bb348c97df44 674 if(VidCfg->ColorCoding == DSI_RGB666)
lypinator 0:bb348c97df44 675 {
lypinator 0:bb348c97df44 676 assert_param(IS_DSI_LOOSELY_PACKED(VidCfg->LooselyPacked));
lypinator 0:bb348c97df44 677 }
lypinator 0:bb348c97df44 678
lypinator 0:bb348c97df44 679 /* Select video mode by resetting CMDM and DSIM bits */
lypinator 0:bb348c97df44 680 hdsi->Instance->MCR &= ~DSI_MCR_CMDM;
lypinator 0:bb348c97df44 681 hdsi->Instance->WCFGR &= ~DSI_WCFGR_DSIM;
lypinator 0:bb348c97df44 682
lypinator 0:bb348c97df44 683 /* Configure the video mode transmission type */
lypinator 0:bb348c97df44 684 hdsi->Instance->VMCR &= ~DSI_VMCR_VMT;
lypinator 0:bb348c97df44 685 hdsi->Instance->VMCR |= VidCfg->Mode;
lypinator 0:bb348c97df44 686
lypinator 0:bb348c97df44 687 /* Configure the video packet size */
lypinator 0:bb348c97df44 688 hdsi->Instance->VPCR &= ~DSI_VPCR_VPSIZE;
lypinator 0:bb348c97df44 689 hdsi->Instance->VPCR |= VidCfg->PacketSize;
lypinator 0:bb348c97df44 690
lypinator 0:bb348c97df44 691 /* Set the chunks number to be transmitted through the DSI link */
lypinator 0:bb348c97df44 692 hdsi->Instance->VCCR &= ~DSI_VCCR_NUMC;
lypinator 0:bb348c97df44 693 hdsi->Instance->VCCR |= VidCfg->NumberOfChunks;
lypinator 0:bb348c97df44 694
lypinator 0:bb348c97df44 695 /* Set the size of the null packet */
lypinator 0:bb348c97df44 696 hdsi->Instance->VNPCR &= ~DSI_VNPCR_NPSIZE;
lypinator 0:bb348c97df44 697 hdsi->Instance->VNPCR |= VidCfg->NullPacketSize;
lypinator 0:bb348c97df44 698
lypinator 0:bb348c97df44 699 /* Select the virtual channel for the LTDC interface traffic */
lypinator 0:bb348c97df44 700 hdsi->Instance->LVCIDR &= ~DSI_LVCIDR_VCID;
lypinator 0:bb348c97df44 701 hdsi->Instance->LVCIDR |= VidCfg->VirtualChannelID;
lypinator 0:bb348c97df44 702
lypinator 0:bb348c97df44 703 /* Configure the polarity of control signals */
lypinator 0:bb348c97df44 704 hdsi->Instance->LPCR &= ~(DSI_LPCR_DEP | DSI_LPCR_VSP | DSI_LPCR_HSP);
lypinator 0:bb348c97df44 705 hdsi->Instance->LPCR |= (VidCfg->DEPolarity | VidCfg->VSPolarity | VidCfg->HSPolarity);
lypinator 0:bb348c97df44 706
lypinator 0:bb348c97df44 707 /* Select the color coding for the host */
lypinator 0:bb348c97df44 708 hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_COLC;
lypinator 0:bb348c97df44 709 hdsi->Instance->LCOLCR |= VidCfg->ColorCoding;
lypinator 0:bb348c97df44 710
lypinator 0:bb348c97df44 711 /* Select the color coding for the wrapper */
lypinator 0:bb348c97df44 712 hdsi->Instance->WCFGR &= ~DSI_WCFGR_COLMUX;
lypinator 0:bb348c97df44 713 hdsi->Instance->WCFGR |= ((VidCfg->ColorCoding)<<1U);
lypinator 0:bb348c97df44 714
lypinator 0:bb348c97df44 715 /* Enable/disable the loosely packed variant to 18-bit configuration */
lypinator 0:bb348c97df44 716 if(VidCfg->ColorCoding == DSI_RGB666)
lypinator 0:bb348c97df44 717 {
lypinator 0:bb348c97df44 718 hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_LPE;
lypinator 0:bb348c97df44 719 hdsi->Instance->LCOLCR |= VidCfg->LooselyPacked;
lypinator 0:bb348c97df44 720 }
lypinator 0:bb348c97df44 721
lypinator 0:bb348c97df44 722 /* Set the Horizontal Synchronization Active (HSA) in lane byte clock cycles */
lypinator 0:bb348c97df44 723 hdsi->Instance->VHSACR &= ~DSI_VHSACR_HSA;
lypinator 0:bb348c97df44 724 hdsi->Instance->VHSACR |= VidCfg->HorizontalSyncActive;
lypinator 0:bb348c97df44 725
lypinator 0:bb348c97df44 726 /* Set the Horizontal Back Porch (HBP) in lane byte clock cycles */
lypinator 0:bb348c97df44 727 hdsi->Instance->VHBPCR &= ~DSI_VHBPCR_HBP;
lypinator 0:bb348c97df44 728 hdsi->Instance->VHBPCR |= VidCfg->HorizontalBackPorch;
lypinator 0:bb348c97df44 729
lypinator 0:bb348c97df44 730 /* Set the total line time (HLINE=HSA+HBP+HACT+HFP) in lane byte clock cycles */
lypinator 0:bb348c97df44 731 hdsi->Instance->VLCR &= ~DSI_VLCR_HLINE;
lypinator 0:bb348c97df44 732 hdsi->Instance->VLCR |= VidCfg->HorizontalLine;
lypinator 0:bb348c97df44 733
lypinator 0:bb348c97df44 734 /* Set the Vertical Synchronization Active (VSA) */
lypinator 0:bb348c97df44 735 hdsi->Instance->VVSACR &= ~DSI_VVSACR_VSA;
lypinator 0:bb348c97df44 736 hdsi->Instance->VVSACR |= VidCfg->VerticalSyncActive;
lypinator 0:bb348c97df44 737
lypinator 0:bb348c97df44 738 /* Set the Vertical Back Porch (VBP)*/
lypinator 0:bb348c97df44 739 hdsi->Instance->VVBPCR &= ~DSI_VVBPCR_VBP;
lypinator 0:bb348c97df44 740 hdsi->Instance->VVBPCR |= VidCfg->VerticalBackPorch;
lypinator 0:bb348c97df44 741
lypinator 0:bb348c97df44 742 /* Set the Vertical Front Porch (VFP)*/
lypinator 0:bb348c97df44 743 hdsi->Instance->VVFPCR &= ~DSI_VVFPCR_VFP;
lypinator 0:bb348c97df44 744 hdsi->Instance->VVFPCR |= VidCfg->VerticalFrontPorch;
lypinator 0:bb348c97df44 745
lypinator 0:bb348c97df44 746 /* Set the Vertical Active period*/
lypinator 0:bb348c97df44 747 hdsi->Instance->VVACR &= ~DSI_VVACR_VA;
lypinator 0:bb348c97df44 748 hdsi->Instance->VVACR |= VidCfg->VerticalActive;
lypinator 0:bb348c97df44 749
lypinator 0:bb348c97df44 750 /* Configure the command transmission mode */
lypinator 0:bb348c97df44 751 hdsi->Instance->VMCR &= ~DSI_VMCR_LPCE;
lypinator 0:bb348c97df44 752 hdsi->Instance->VMCR |= VidCfg->LPCommandEnable;
lypinator 0:bb348c97df44 753
lypinator 0:bb348c97df44 754 /* Low power largest packet size */
lypinator 0:bb348c97df44 755 hdsi->Instance->LPMCR &= ~DSI_LPMCR_LPSIZE;
lypinator 0:bb348c97df44 756 hdsi->Instance->LPMCR |= ((VidCfg->LPLargestPacketSize)<<16U);
lypinator 0:bb348c97df44 757
lypinator 0:bb348c97df44 758 /* Low power VACT largest packet size */
lypinator 0:bb348c97df44 759 hdsi->Instance->LPMCR &= ~DSI_LPMCR_VLPSIZE;
lypinator 0:bb348c97df44 760 hdsi->Instance->LPMCR |= VidCfg->LPVACTLargestPacketSize;
lypinator 0:bb348c97df44 761
lypinator 0:bb348c97df44 762 /* Enable LP transition in HFP period */
lypinator 0:bb348c97df44 763 hdsi->Instance->VMCR &= ~DSI_VMCR_LPHFPE;
lypinator 0:bb348c97df44 764 hdsi->Instance->VMCR |= VidCfg->LPHorizontalFrontPorchEnable;
lypinator 0:bb348c97df44 765
lypinator 0:bb348c97df44 766 /* Enable LP transition in HBP period */
lypinator 0:bb348c97df44 767 hdsi->Instance->VMCR &= ~DSI_VMCR_LPHBPE;
lypinator 0:bb348c97df44 768 hdsi->Instance->VMCR |= VidCfg->LPHorizontalBackPorchEnable;
lypinator 0:bb348c97df44 769
lypinator 0:bb348c97df44 770 /* Enable LP transition in VACT period */
lypinator 0:bb348c97df44 771 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVAE;
lypinator 0:bb348c97df44 772 hdsi->Instance->VMCR |= VidCfg->LPVerticalActiveEnable;
lypinator 0:bb348c97df44 773
lypinator 0:bb348c97df44 774 /* Enable LP transition in VFP period */
lypinator 0:bb348c97df44 775 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVFPE;
lypinator 0:bb348c97df44 776 hdsi->Instance->VMCR |= VidCfg->LPVerticalFrontPorchEnable;
lypinator 0:bb348c97df44 777
lypinator 0:bb348c97df44 778 /* Enable LP transition in VBP period */
lypinator 0:bb348c97df44 779 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVBPE;
lypinator 0:bb348c97df44 780 hdsi->Instance->VMCR |= VidCfg->LPVerticalBackPorchEnable;
lypinator 0:bb348c97df44 781
lypinator 0:bb348c97df44 782 /* Enable LP transition in vertical sync period */
lypinator 0:bb348c97df44 783 hdsi->Instance->VMCR &= ~DSI_VMCR_LPVSAE;
lypinator 0:bb348c97df44 784 hdsi->Instance->VMCR |= VidCfg->LPVerticalSyncActiveEnable;
lypinator 0:bb348c97df44 785
lypinator 0:bb348c97df44 786 /* Enable the request for an acknowledge response at the end of a frame */
lypinator 0:bb348c97df44 787 hdsi->Instance->VMCR &= ~DSI_VMCR_FBTAAE;
lypinator 0:bb348c97df44 788 hdsi->Instance->VMCR |= VidCfg->FrameBTAAcknowledgeEnable;
lypinator 0:bb348c97df44 789
lypinator 0:bb348c97df44 790 /* Process unlocked */
lypinator 0:bb348c97df44 791 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 792
lypinator 0:bb348c97df44 793 return HAL_OK;
lypinator 0:bb348c97df44 794 }
lypinator 0:bb348c97df44 795
lypinator 0:bb348c97df44 796 /**
lypinator 0:bb348c97df44 797 * @brief Select adapted command mode and configure the corresponding parameters
lypinator 0:bb348c97df44 798 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 799 * the configuration information for the DSI.
lypinator 0:bb348c97df44 800 * @param CmdCfg pointer to a DSI_CmdCfgTypeDef structure that contains
lypinator 0:bb348c97df44 801 * the DSI command mode configuration parameters
lypinator 0:bb348c97df44 802 * @retval HAL status
lypinator 0:bb348c97df44 803 */
lypinator 0:bb348c97df44 804 HAL_StatusTypeDef HAL_DSI_ConfigAdaptedCommandMode(DSI_HandleTypeDef *hdsi, DSI_CmdCfgTypeDef *CmdCfg)
lypinator 0:bb348c97df44 805 {
lypinator 0:bb348c97df44 806 /* Process locked */
lypinator 0:bb348c97df44 807 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 808
lypinator 0:bb348c97df44 809 /* Check the parameters */
lypinator 0:bb348c97df44 810 assert_param(IS_DSI_COLOR_CODING(CmdCfg->ColorCoding));
lypinator 0:bb348c97df44 811 assert_param(IS_DSI_TE_SOURCE(CmdCfg->TearingEffectSource));
lypinator 0:bb348c97df44 812 assert_param(IS_DSI_TE_POLARITY(CmdCfg->TearingEffectPolarity));
lypinator 0:bb348c97df44 813 assert_param(IS_DSI_AUTOMATIC_REFRESH(CmdCfg->AutomaticRefresh));
lypinator 0:bb348c97df44 814 assert_param(IS_DSI_VS_POLARITY(CmdCfg->VSyncPol));
lypinator 0:bb348c97df44 815 assert_param(IS_DSI_TE_ACK_REQUEST(CmdCfg->TEAcknowledgeRequest));
lypinator 0:bb348c97df44 816 assert_param(IS_DSI_DE_POLARITY(CmdCfg->DEPolarity));
lypinator 0:bb348c97df44 817 assert_param(IS_DSI_VSYNC_POLARITY(CmdCfg->VSPolarity));
lypinator 0:bb348c97df44 818 assert_param(IS_DSI_HSYNC_POLARITY(CmdCfg->HSPolarity));
lypinator 0:bb348c97df44 819
lypinator 0:bb348c97df44 820 /* Select command mode by setting CMDM and DSIM bits */
lypinator 0:bb348c97df44 821 hdsi->Instance->MCR |= DSI_MCR_CMDM;
lypinator 0:bb348c97df44 822 hdsi->Instance->WCFGR &= ~DSI_WCFGR_DSIM;
lypinator 0:bb348c97df44 823 hdsi->Instance->WCFGR |= DSI_WCFGR_DSIM;
lypinator 0:bb348c97df44 824
lypinator 0:bb348c97df44 825 /* Select the virtual channel for the LTDC interface traffic */
lypinator 0:bb348c97df44 826 hdsi->Instance->LVCIDR &= ~DSI_LVCIDR_VCID;
lypinator 0:bb348c97df44 827 hdsi->Instance->LVCIDR |= CmdCfg->VirtualChannelID;
lypinator 0:bb348c97df44 828
lypinator 0:bb348c97df44 829 /* Configure the polarity of control signals */
lypinator 0:bb348c97df44 830 hdsi->Instance->LPCR &= ~(DSI_LPCR_DEP | DSI_LPCR_VSP | DSI_LPCR_HSP);
lypinator 0:bb348c97df44 831 hdsi->Instance->LPCR |= (CmdCfg->DEPolarity | CmdCfg->VSPolarity | CmdCfg->HSPolarity);
lypinator 0:bb348c97df44 832
lypinator 0:bb348c97df44 833 /* Select the color coding for the host */
lypinator 0:bb348c97df44 834 hdsi->Instance->LCOLCR &= ~DSI_LCOLCR_COLC;
lypinator 0:bb348c97df44 835 hdsi->Instance->LCOLCR |= CmdCfg->ColorCoding;
lypinator 0:bb348c97df44 836
lypinator 0:bb348c97df44 837 /* Select the color coding for the wrapper */
lypinator 0:bb348c97df44 838 hdsi->Instance->WCFGR &= ~DSI_WCFGR_COLMUX;
lypinator 0:bb348c97df44 839 hdsi->Instance->WCFGR |= ((CmdCfg->ColorCoding)<<1U);
lypinator 0:bb348c97df44 840
lypinator 0:bb348c97df44 841 /* Configure the maximum allowed size for write memory command */
lypinator 0:bb348c97df44 842 hdsi->Instance->LCCR &= ~DSI_LCCR_CMDSIZE;
lypinator 0:bb348c97df44 843 hdsi->Instance->LCCR |= CmdCfg->CommandSize;
lypinator 0:bb348c97df44 844
lypinator 0:bb348c97df44 845 /* Configure the tearing effect source and polarity and select the refresh mode */
lypinator 0:bb348c97df44 846 hdsi->Instance->WCFGR &= ~(DSI_WCFGR_TESRC | DSI_WCFGR_TEPOL | DSI_WCFGR_AR | DSI_WCFGR_VSPOL);
lypinator 0:bb348c97df44 847 hdsi->Instance->WCFGR |= (CmdCfg->TearingEffectSource | CmdCfg->TearingEffectPolarity | CmdCfg->AutomaticRefresh | CmdCfg->VSyncPol);
lypinator 0:bb348c97df44 848
lypinator 0:bb348c97df44 849 /* Configure the tearing effect acknowledge request */
lypinator 0:bb348c97df44 850 hdsi->Instance->CMCR &= ~DSI_CMCR_TEARE;
lypinator 0:bb348c97df44 851 hdsi->Instance->CMCR |= CmdCfg->TEAcknowledgeRequest;
lypinator 0:bb348c97df44 852
lypinator 0:bb348c97df44 853 /* Enable the Tearing Effect interrupt */
lypinator 0:bb348c97df44 854 __HAL_DSI_ENABLE_IT(hdsi, DSI_IT_TE);
lypinator 0:bb348c97df44 855
lypinator 0:bb348c97df44 856 /* Enable the End of Refresh interrupt */
lypinator 0:bb348c97df44 857 __HAL_DSI_ENABLE_IT(hdsi, DSI_IT_ER);
lypinator 0:bb348c97df44 858
lypinator 0:bb348c97df44 859 /* Process unlocked */
lypinator 0:bb348c97df44 860 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 861
lypinator 0:bb348c97df44 862 return HAL_OK;
lypinator 0:bb348c97df44 863 }
lypinator 0:bb348c97df44 864
lypinator 0:bb348c97df44 865 /**
lypinator 0:bb348c97df44 866 * @brief Configure command transmission mode: High-speed or Low-power
lypinator 0:bb348c97df44 867 * and enable/disable acknowledge request after packet transmission
lypinator 0:bb348c97df44 868 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 869 * the configuration information for the DSI.
lypinator 0:bb348c97df44 870 * @param LPCmd pointer to a DSI_LPCmdTypeDef structure that contains
lypinator 0:bb348c97df44 871 * the DSI command transmission mode configuration parameters
lypinator 0:bb348c97df44 872 * @retval HAL status
lypinator 0:bb348c97df44 873 */
lypinator 0:bb348c97df44 874 HAL_StatusTypeDef HAL_DSI_ConfigCommand(DSI_HandleTypeDef *hdsi, DSI_LPCmdTypeDef *LPCmd)
lypinator 0:bb348c97df44 875 {
lypinator 0:bb348c97df44 876 /* Process locked */
lypinator 0:bb348c97df44 877 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 878
lypinator 0:bb348c97df44 879 assert_param(IS_DSI_LP_GSW0P(LPCmd->LPGenShortWriteNoP));
lypinator 0:bb348c97df44 880 assert_param(IS_DSI_LP_GSW1P(LPCmd->LPGenShortWriteOneP));
lypinator 0:bb348c97df44 881 assert_param(IS_DSI_LP_GSW2P(LPCmd->LPGenShortWriteTwoP));
lypinator 0:bb348c97df44 882 assert_param(IS_DSI_LP_GSR0P(LPCmd->LPGenShortReadNoP));
lypinator 0:bb348c97df44 883 assert_param(IS_DSI_LP_GSR1P(LPCmd->LPGenShortReadOneP));
lypinator 0:bb348c97df44 884 assert_param(IS_DSI_LP_GSR2P(LPCmd->LPGenShortReadTwoP));
lypinator 0:bb348c97df44 885 assert_param(IS_DSI_LP_GLW(LPCmd->LPGenLongWrite));
lypinator 0:bb348c97df44 886 assert_param(IS_DSI_LP_DSW0P(LPCmd->LPDcsShortWriteNoP));
lypinator 0:bb348c97df44 887 assert_param(IS_DSI_LP_DSW1P(LPCmd->LPDcsShortWriteOneP));
lypinator 0:bb348c97df44 888 assert_param(IS_DSI_LP_DSR0P(LPCmd->LPDcsShortReadNoP));
lypinator 0:bb348c97df44 889 assert_param(IS_DSI_LP_DLW(LPCmd->LPDcsLongWrite));
lypinator 0:bb348c97df44 890 assert_param(IS_DSI_LP_MRDP(LPCmd->LPMaxReadPacket));
lypinator 0:bb348c97df44 891 assert_param(IS_DSI_ACK_REQUEST(LPCmd->AcknowledgeRequest));
lypinator 0:bb348c97df44 892
lypinator 0:bb348c97df44 893 /* Select High-speed or Low-power for command transmission */
lypinator 0:bb348c97df44 894 hdsi->Instance->CMCR &= ~(DSI_CMCR_GSW0TX |\
lypinator 0:bb348c97df44 895 DSI_CMCR_GSW1TX |\
lypinator 0:bb348c97df44 896 DSI_CMCR_GSW2TX |\
lypinator 0:bb348c97df44 897 DSI_CMCR_GSR0TX |\
lypinator 0:bb348c97df44 898 DSI_CMCR_GSR1TX |\
lypinator 0:bb348c97df44 899 DSI_CMCR_GSR2TX |\
lypinator 0:bb348c97df44 900 DSI_CMCR_GLWTX |\
lypinator 0:bb348c97df44 901 DSI_CMCR_DSW0TX |\
lypinator 0:bb348c97df44 902 DSI_CMCR_DSW1TX |\
lypinator 0:bb348c97df44 903 DSI_CMCR_DSR0TX |\
lypinator 0:bb348c97df44 904 DSI_CMCR_DLWTX |\
lypinator 0:bb348c97df44 905 DSI_CMCR_MRDPS);
lypinator 0:bb348c97df44 906 hdsi->Instance->CMCR |= (LPCmd->LPGenShortWriteNoP |\
lypinator 0:bb348c97df44 907 LPCmd->LPGenShortWriteOneP |\
lypinator 0:bb348c97df44 908 LPCmd->LPGenShortWriteTwoP |\
lypinator 0:bb348c97df44 909 LPCmd->LPGenShortReadNoP |\
lypinator 0:bb348c97df44 910 LPCmd->LPGenShortReadOneP |\
lypinator 0:bb348c97df44 911 LPCmd->LPGenShortReadTwoP |\
lypinator 0:bb348c97df44 912 LPCmd->LPGenLongWrite |\
lypinator 0:bb348c97df44 913 LPCmd->LPDcsShortWriteNoP |\
lypinator 0:bb348c97df44 914 LPCmd->LPDcsShortWriteOneP |\
lypinator 0:bb348c97df44 915 LPCmd->LPDcsShortReadNoP |\
lypinator 0:bb348c97df44 916 LPCmd->LPDcsLongWrite |\
lypinator 0:bb348c97df44 917 LPCmd->LPMaxReadPacket);
lypinator 0:bb348c97df44 918
lypinator 0:bb348c97df44 919 /* Configure the acknowledge request after each packet transmission */
lypinator 0:bb348c97df44 920 hdsi->Instance->CMCR &= ~DSI_CMCR_ARE;
lypinator 0:bb348c97df44 921 hdsi->Instance->CMCR |= LPCmd->AcknowledgeRequest;
lypinator 0:bb348c97df44 922
lypinator 0:bb348c97df44 923 /* Process unlocked */
lypinator 0:bb348c97df44 924 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 925
lypinator 0:bb348c97df44 926 return HAL_OK;
lypinator 0:bb348c97df44 927 }
lypinator 0:bb348c97df44 928
lypinator 0:bb348c97df44 929 /**
lypinator 0:bb348c97df44 930 * @brief Configure the flow control parameters
lypinator 0:bb348c97df44 931 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 932 * the configuration information for the DSI.
lypinator 0:bb348c97df44 933 * @param FlowControl flow control feature(s) to be enabled.
lypinator 0:bb348c97df44 934 * This parameter can be any combination of @ref DSI_FlowControl.
lypinator 0:bb348c97df44 935 * @retval HAL status
lypinator 0:bb348c97df44 936 */
lypinator 0:bb348c97df44 937 HAL_StatusTypeDef HAL_DSI_ConfigFlowControl(DSI_HandleTypeDef *hdsi, uint32_t FlowControl)
lypinator 0:bb348c97df44 938 {
lypinator 0:bb348c97df44 939 /* Process locked */
lypinator 0:bb348c97df44 940 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 941
lypinator 0:bb348c97df44 942 /* Check the parameters */
lypinator 0:bb348c97df44 943 assert_param(IS_DSI_FLOW_CONTROL(FlowControl));
lypinator 0:bb348c97df44 944
lypinator 0:bb348c97df44 945 /* Set the DSI Host Protocol Configuration Register */
lypinator 0:bb348c97df44 946 hdsi->Instance->PCR &= ~DSI_FLOW_CONTROL_ALL;
lypinator 0:bb348c97df44 947 hdsi->Instance->PCR |= FlowControl;
lypinator 0:bb348c97df44 948
lypinator 0:bb348c97df44 949 /* Process unlocked */
lypinator 0:bb348c97df44 950 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 951
lypinator 0:bb348c97df44 952 return HAL_OK;
lypinator 0:bb348c97df44 953 }
lypinator 0:bb348c97df44 954
lypinator 0:bb348c97df44 955 /**
lypinator 0:bb348c97df44 956 * @brief Configure the DSI PHY timer parameters
lypinator 0:bb348c97df44 957 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 958 * the configuration information for the DSI.
lypinator 0:bb348c97df44 959 * @param PhyTimers DSI_PHY_TimerTypeDef structure that contains
lypinator 0:bb348c97df44 960 * the DSI PHY timing parameters
lypinator 0:bb348c97df44 961 * @retval HAL status
lypinator 0:bb348c97df44 962 */
lypinator 0:bb348c97df44 963 HAL_StatusTypeDef HAL_DSI_ConfigPhyTimer(DSI_HandleTypeDef *hdsi, DSI_PHY_TimerTypeDef *PhyTimers)
lypinator 0:bb348c97df44 964 {
lypinator 0:bb348c97df44 965 uint32_t maxTime;
lypinator 0:bb348c97df44 966 /* Process locked */
lypinator 0:bb348c97df44 967 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 968
lypinator 0:bb348c97df44 969 maxTime = (PhyTimers->ClockLaneLP2HSTime > PhyTimers->ClockLaneHS2LPTime)? PhyTimers->ClockLaneLP2HSTime: PhyTimers->ClockLaneHS2LPTime;
lypinator 0:bb348c97df44 970
lypinator 0:bb348c97df44 971 /* Clock lane timer configuration */
lypinator 0:bb348c97df44 972
lypinator 0:bb348c97df44 973 /* In Automatic Clock Lane control mode, the DSI Host can turn off the clock lane between two
lypinator 0:bb348c97df44 974 High-Speed transmission.
lypinator 0:bb348c97df44 975 To do so, the DSI Host calculates the time required for the clock lane to change from HighSpeed
lypinator 0:bb348c97df44 976 to Low-Power and from Low-Power to High-Speed.
lypinator 0:bb348c97df44 977 This timings are configured by the HS2LP_TIME and LP2HS_TIME in the DSI Host Clock Lane Timer Configuration Register (DSI_CLTCR).
lypinator 0:bb348c97df44 978 But the DSI Host is not calculating LP2HS_TIME + HS2LP_TIME but 2 x HS2LP_TIME.
lypinator 0:bb348c97df44 979
lypinator 0:bb348c97df44 980 Workaround : Configure HS2LP_TIME and LP2HS_TIME with the same value being the max of HS2LP_TIME or LP2HS_TIME.
lypinator 0:bb348c97df44 981 */
lypinator 0:bb348c97df44 982 hdsi->Instance->CLTCR &= ~(DSI_CLTCR_LP2HS_TIME | DSI_CLTCR_HS2LP_TIME);
lypinator 0:bb348c97df44 983 hdsi->Instance->CLTCR |= (maxTime | ((maxTime)<<16U));
lypinator 0:bb348c97df44 984
lypinator 0:bb348c97df44 985 /* Data lane timer configuration */
lypinator 0:bb348c97df44 986 hdsi->Instance->DLTCR &= ~(DSI_DLTCR_MRD_TIME | DSI_DLTCR_LP2HS_TIME | DSI_DLTCR_HS2LP_TIME);
lypinator 0:bb348c97df44 987 hdsi->Instance->DLTCR |= (PhyTimers->DataLaneMaxReadTime | ((PhyTimers->DataLaneLP2HSTime)<<16U) | ((PhyTimers->DataLaneHS2LPTime)<<24U));
lypinator 0:bb348c97df44 988
lypinator 0:bb348c97df44 989 /* Configure the wait period to request HS transmission after a stop state */
lypinator 0:bb348c97df44 990 hdsi->Instance->PCONFR &= ~DSI_PCONFR_SW_TIME;
lypinator 0:bb348c97df44 991 hdsi->Instance->PCONFR |= ((PhyTimers->StopWaitTime)<<8U);
lypinator 0:bb348c97df44 992
lypinator 0:bb348c97df44 993 /* Process unlocked */
lypinator 0:bb348c97df44 994 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 995
lypinator 0:bb348c97df44 996 return HAL_OK;
lypinator 0:bb348c97df44 997 }
lypinator 0:bb348c97df44 998
lypinator 0:bb348c97df44 999 /**
lypinator 0:bb348c97df44 1000 * @brief Configure the DSI HOST timeout parameters
lypinator 0:bb348c97df44 1001 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1002 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1003 * @param HostTimeouts DSI_HOST_TimeoutTypeDef structure that contains
lypinator 0:bb348c97df44 1004 * the DSI host timeout parameters
lypinator 0:bb348c97df44 1005 * @retval HAL status
lypinator 0:bb348c97df44 1006 */
lypinator 0:bb348c97df44 1007 HAL_StatusTypeDef HAL_DSI_ConfigHostTimeouts(DSI_HandleTypeDef *hdsi, DSI_HOST_TimeoutTypeDef *HostTimeouts)
lypinator 0:bb348c97df44 1008 {
lypinator 0:bb348c97df44 1009 /* Process locked */
lypinator 0:bb348c97df44 1010 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1011
lypinator 0:bb348c97df44 1012 /* Set the timeout clock division factor */
lypinator 0:bb348c97df44 1013 hdsi->Instance->CCR &= ~DSI_CCR_TOCKDIV;
lypinator 0:bb348c97df44 1014 hdsi->Instance->CCR |= ((HostTimeouts->TimeoutCkdiv)<<8U);
lypinator 0:bb348c97df44 1015
lypinator 0:bb348c97df44 1016 /* High-speed transmission timeout */
lypinator 0:bb348c97df44 1017 hdsi->Instance->TCCR[0U] &= ~DSI_TCCR0_HSTX_TOCNT;
lypinator 0:bb348c97df44 1018 hdsi->Instance->TCCR[0U] |= ((HostTimeouts->HighSpeedTransmissionTimeout)<<16U);
lypinator 0:bb348c97df44 1019
lypinator 0:bb348c97df44 1020 /* Low-power reception timeout */
lypinator 0:bb348c97df44 1021 hdsi->Instance->TCCR[0U] &= ~DSI_TCCR0_LPRX_TOCNT;
lypinator 0:bb348c97df44 1022 hdsi->Instance->TCCR[0U] |= HostTimeouts->LowPowerReceptionTimeout;
lypinator 0:bb348c97df44 1023
lypinator 0:bb348c97df44 1024 /* High-speed read timeout */
lypinator 0:bb348c97df44 1025 hdsi->Instance->TCCR[1U] &= ~DSI_TCCR1_HSRD_TOCNT;
lypinator 0:bb348c97df44 1026 hdsi->Instance->TCCR[1U] |= HostTimeouts->HighSpeedReadTimeout;
lypinator 0:bb348c97df44 1027
lypinator 0:bb348c97df44 1028 /* Low-power read timeout */
lypinator 0:bb348c97df44 1029 hdsi->Instance->TCCR[2U] &= ~DSI_TCCR2_LPRD_TOCNT;
lypinator 0:bb348c97df44 1030 hdsi->Instance->TCCR[2U] |= HostTimeouts->LowPowerReadTimeout;
lypinator 0:bb348c97df44 1031
lypinator 0:bb348c97df44 1032 /* High-speed write timeout */
lypinator 0:bb348c97df44 1033 hdsi->Instance->TCCR[3U] &= ~DSI_TCCR3_HSWR_TOCNT;
lypinator 0:bb348c97df44 1034 hdsi->Instance->TCCR[3U] |= HostTimeouts->HighSpeedWriteTimeout;
lypinator 0:bb348c97df44 1035
lypinator 0:bb348c97df44 1036 /* High-speed write presp mode */
lypinator 0:bb348c97df44 1037 hdsi->Instance->TCCR[3U] &= ~DSI_TCCR3_PM;
lypinator 0:bb348c97df44 1038 hdsi->Instance->TCCR[3U] |= HostTimeouts->HighSpeedWritePrespMode;
lypinator 0:bb348c97df44 1039
lypinator 0:bb348c97df44 1040 /* Low-speed write timeout */
lypinator 0:bb348c97df44 1041 hdsi->Instance->TCCR[4U] &= ~DSI_TCCR4_LPWR_TOCNT;
lypinator 0:bb348c97df44 1042 hdsi->Instance->TCCR[4U] |= HostTimeouts->LowPowerWriteTimeout;
lypinator 0:bb348c97df44 1043
lypinator 0:bb348c97df44 1044 /* BTA timeout */
lypinator 0:bb348c97df44 1045 hdsi->Instance->TCCR[5U] &= ~DSI_TCCR5_BTA_TOCNT;
lypinator 0:bb348c97df44 1046 hdsi->Instance->TCCR[5U] |= HostTimeouts->BTATimeout;
lypinator 0:bb348c97df44 1047
lypinator 0:bb348c97df44 1048 /* Process unlocked */
lypinator 0:bb348c97df44 1049 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1050
lypinator 0:bb348c97df44 1051 return HAL_OK;
lypinator 0:bb348c97df44 1052 }
lypinator 0:bb348c97df44 1053
lypinator 0:bb348c97df44 1054 /**
lypinator 0:bb348c97df44 1055 * @brief Start the DSI module
lypinator 0:bb348c97df44 1056 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1057 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1058 * @retval HAL status
lypinator 0:bb348c97df44 1059 */
lypinator 0:bb348c97df44 1060 HAL_StatusTypeDef HAL_DSI_Start(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 1061 {
lypinator 0:bb348c97df44 1062 /* Process locked */
lypinator 0:bb348c97df44 1063 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1064
lypinator 0:bb348c97df44 1065 /* Enable the DSI host */
lypinator 0:bb348c97df44 1066 __HAL_DSI_ENABLE(hdsi);
lypinator 0:bb348c97df44 1067
lypinator 0:bb348c97df44 1068 /* Enable the DSI wrapper */
lypinator 0:bb348c97df44 1069 __HAL_DSI_WRAPPER_ENABLE(hdsi);
lypinator 0:bb348c97df44 1070
lypinator 0:bb348c97df44 1071 /* Process unlocked */
lypinator 0:bb348c97df44 1072 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1073
lypinator 0:bb348c97df44 1074 return HAL_OK;
lypinator 0:bb348c97df44 1075 }
lypinator 0:bb348c97df44 1076
lypinator 0:bb348c97df44 1077 /**
lypinator 0:bb348c97df44 1078 * @brief Stop the DSI module
lypinator 0:bb348c97df44 1079 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1080 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1081 * @retval HAL status
lypinator 0:bb348c97df44 1082 */
lypinator 0:bb348c97df44 1083 HAL_StatusTypeDef HAL_DSI_Stop(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 1084 {
lypinator 0:bb348c97df44 1085 /* Process locked */
lypinator 0:bb348c97df44 1086 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1087
lypinator 0:bb348c97df44 1088 /* Disable the DSI host */
lypinator 0:bb348c97df44 1089 __HAL_DSI_DISABLE(hdsi);
lypinator 0:bb348c97df44 1090
lypinator 0:bb348c97df44 1091 /* Disable the DSI wrapper */
lypinator 0:bb348c97df44 1092 __HAL_DSI_WRAPPER_DISABLE(hdsi);
lypinator 0:bb348c97df44 1093
lypinator 0:bb348c97df44 1094 /* Process unlocked */
lypinator 0:bb348c97df44 1095 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1096
lypinator 0:bb348c97df44 1097 return HAL_OK;
lypinator 0:bb348c97df44 1098 }
lypinator 0:bb348c97df44 1099
lypinator 0:bb348c97df44 1100 /**
lypinator 0:bb348c97df44 1101 * @brief Refresh the display in command mode
lypinator 0:bb348c97df44 1102 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1103 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1104 * @retval HAL status
lypinator 0:bb348c97df44 1105 */
lypinator 0:bb348c97df44 1106 HAL_StatusTypeDef HAL_DSI_Refresh(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 1107 {
lypinator 0:bb348c97df44 1108 /* Process locked */
lypinator 0:bb348c97df44 1109 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1110
lypinator 0:bb348c97df44 1111 /* Update the display */
lypinator 0:bb348c97df44 1112 hdsi->Instance->WCR |= DSI_WCR_LTDCEN;
lypinator 0:bb348c97df44 1113
lypinator 0:bb348c97df44 1114 /* Process unlocked */
lypinator 0:bb348c97df44 1115 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1116
lypinator 0:bb348c97df44 1117 return HAL_OK;
lypinator 0:bb348c97df44 1118 }
lypinator 0:bb348c97df44 1119
lypinator 0:bb348c97df44 1120 /**
lypinator 0:bb348c97df44 1121 * @brief Controls the display color mode in Video mode
lypinator 0:bb348c97df44 1122 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1123 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1124 * @param ColorMode Color mode (full or 8-colors).
lypinator 0:bb348c97df44 1125 * This parameter can be any value of @ref DSI_Color_Mode
lypinator 0:bb348c97df44 1126 * @retval HAL status
lypinator 0:bb348c97df44 1127 */
lypinator 0:bb348c97df44 1128 HAL_StatusTypeDef HAL_DSI_ColorMode(DSI_HandleTypeDef *hdsi, uint32_t ColorMode)
lypinator 0:bb348c97df44 1129 {
lypinator 0:bb348c97df44 1130 /* Process locked */
lypinator 0:bb348c97df44 1131 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1132
lypinator 0:bb348c97df44 1133 /* Check the parameters */
lypinator 0:bb348c97df44 1134 assert_param(IS_DSI_COLOR_MODE(ColorMode));
lypinator 0:bb348c97df44 1135
lypinator 0:bb348c97df44 1136 /* Update the display color mode */
lypinator 0:bb348c97df44 1137 hdsi->Instance->WCR &= ~DSI_WCR_COLM;
lypinator 0:bb348c97df44 1138 hdsi->Instance->WCR |= ColorMode;
lypinator 0:bb348c97df44 1139
lypinator 0:bb348c97df44 1140 /* Process unlocked */
lypinator 0:bb348c97df44 1141 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1142
lypinator 0:bb348c97df44 1143 return HAL_OK;
lypinator 0:bb348c97df44 1144 }
lypinator 0:bb348c97df44 1145
lypinator 0:bb348c97df44 1146 /**
lypinator 0:bb348c97df44 1147 * @brief Control the display shutdown in Video mode
lypinator 0:bb348c97df44 1148 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1149 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1150 * @param Shutdown Shut-down (Display-ON or Display-OFF).
lypinator 0:bb348c97df44 1151 * This parameter can be any value of @ref DSI_ShutDown
lypinator 0:bb348c97df44 1152 * @retval HAL status
lypinator 0:bb348c97df44 1153 */
lypinator 0:bb348c97df44 1154 HAL_StatusTypeDef HAL_DSI_Shutdown(DSI_HandleTypeDef *hdsi, uint32_t Shutdown)
lypinator 0:bb348c97df44 1155 {
lypinator 0:bb348c97df44 1156 /* Process locked */
lypinator 0:bb348c97df44 1157 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1158
lypinator 0:bb348c97df44 1159 /* Check the parameters */
lypinator 0:bb348c97df44 1160 assert_param(IS_DSI_SHUT_DOWN(Shutdown));
lypinator 0:bb348c97df44 1161
lypinator 0:bb348c97df44 1162 /* Update the display Shutdown */
lypinator 0:bb348c97df44 1163 hdsi->Instance->WCR &= ~DSI_WCR_SHTDN;
lypinator 0:bb348c97df44 1164 hdsi->Instance->WCR |= Shutdown;
lypinator 0:bb348c97df44 1165
lypinator 0:bb348c97df44 1166 /* Process unlocked */
lypinator 0:bb348c97df44 1167 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1168
lypinator 0:bb348c97df44 1169 return HAL_OK;
lypinator 0:bb348c97df44 1170 }
lypinator 0:bb348c97df44 1171
lypinator 0:bb348c97df44 1172 /**
lypinator 0:bb348c97df44 1173 * @brief write short DCS or short Generic command
lypinator 0:bb348c97df44 1174 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1175 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1176 * @param ChannelID Virtual channel ID.
lypinator 0:bb348c97df44 1177 * @param Mode DSI short packet data type.
lypinator 0:bb348c97df44 1178 * This parameter can be any value of @ref DSI_SHORT_WRITE_PKT_Data_Type.
lypinator 0:bb348c97df44 1179 * @param Param1 DSC command or first generic parameter.
lypinator 0:bb348c97df44 1180 * This parameter can be any value of @ref DSI_DCS_Command or a
lypinator 0:bb348c97df44 1181 * generic command code.
lypinator 0:bb348c97df44 1182 * @param Param2 DSC parameter or second generic parameter.
lypinator 0:bb348c97df44 1183 * @retval HAL status
lypinator 0:bb348c97df44 1184 */
lypinator 0:bb348c97df44 1185 HAL_StatusTypeDef HAL_DSI_ShortWrite(DSI_HandleTypeDef *hdsi,
lypinator 0:bb348c97df44 1186 uint32_t ChannelID,
lypinator 0:bb348c97df44 1187 uint32_t Mode,
lypinator 0:bb348c97df44 1188 uint32_t Param1,
lypinator 0:bb348c97df44 1189 uint32_t Param2)
lypinator 0:bb348c97df44 1190 {
lypinator 0:bb348c97df44 1191 uint32_t tickstart;
lypinator 0:bb348c97df44 1192
lypinator 0:bb348c97df44 1193 /* Process locked */
lypinator 0:bb348c97df44 1194 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1195
lypinator 0:bb348c97df44 1196 /* Check the parameters */
lypinator 0:bb348c97df44 1197 assert_param(IS_DSI_SHORT_WRITE_PACKET_TYPE(Mode));
lypinator 0:bb348c97df44 1198
lypinator 0:bb348c97df44 1199 /* Get tick */
lypinator 0:bb348c97df44 1200 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1201
lypinator 0:bb348c97df44 1202 /* Wait for Command FIFO Empty */
lypinator 0:bb348c97df44 1203 while((hdsi->Instance->GPSR & DSI_GPSR_CMDFE) == 0U)
lypinator 0:bb348c97df44 1204 {
lypinator 0:bb348c97df44 1205 /* Check for the Timeout */
lypinator 0:bb348c97df44 1206 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1207 {
lypinator 0:bb348c97df44 1208 /* Process Unlocked */
lypinator 0:bb348c97df44 1209 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1210
lypinator 0:bb348c97df44 1211 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1212 }
lypinator 0:bb348c97df44 1213 }
lypinator 0:bb348c97df44 1214
lypinator 0:bb348c97df44 1215 /* Configure the packet to send a short DCS command with 0 or 1 parameter */
lypinator 0:bb348c97df44 1216 DSI_ConfigPacketHeader(hdsi->Instance,
lypinator 0:bb348c97df44 1217 ChannelID,
lypinator 0:bb348c97df44 1218 Mode,
lypinator 0:bb348c97df44 1219 Param1,
lypinator 0:bb348c97df44 1220 Param2);
lypinator 0:bb348c97df44 1221
lypinator 0:bb348c97df44 1222 /* Process unlocked */
lypinator 0:bb348c97df44 1223 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1224
lypinator 0:bb348c97df44 1225 return HAL_OK;
lypinator 0:bb348c97df44 1226 }
lypinator 0:bb348c97df44 1227
lypinator 0:bb348c97df44 1228 /**
lypinator 0:bb348c97df44 1229 * @brief write long DCS or long Generic command
lypinator 0:bb348c97df44 1230 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1231 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1232 * @param ChannelID Virtual channel ID.
lypinator 0:bb348c97df44 1233 * @param Mode DSI long packet data type.
lypinator 0:bb348c97df44 1234 * This parameter can be any value of @ref DSI_LONG_WRITE_PKT_Data_Type.
lypinator 0:bb348c97df44 1235 * @param NbParams Number of parameters.
lypinator 0:bb348c97df44 1236 * @param Param1 DSC command or first generic parameter.
lypinator 0:bb348c97df44 1237 * This parameter can be any value of @ref DSI_DCS_Command or a
lypinator 0:bb348c97df44 1238 * generic command code
lypinator 0:bb348c97df44 1239 * @param ParametersTable Pointer to parameter values table.
lypinator 0:bb348c97df44 1240 * @retval HAL status
lypinator 0:bb348c97df44 1241 */
lypinator 0:bb348c97df44 1242 HAL_StatusTypeDef HAL_DSI_LongWrite(DSI_HandleTypeDef *hdsi,
lypinator 0:bb348c97df44 1243 uint32_t ChannelID,
lypinator 0:bb348c97df44 1244 uint32_t Mode,
lypinator 0:bb348c97df44 1245 uint32_t NbParams,
lypinator 0:bb348c97df44 1246 uint32_t Param1,
lypinator 0:bb348c97df44 1247 uint8_t* ParametersTable)
lypinator 0:bb348c97df44 1248 {
lypinator 0:bb348c97df44 1249 uint32_t uicounter, nbBytes, count;
lypinator 0:bb348c97df44 1250 uint32_t tickstart;
lypinator 0:bb348c97df44 1251 uint32_t fifoword;
lypinator 0:bb348c97df44 1252 uint8_t* pparams = ParametersTable;
lypinator 0:bb348c97df44 1253
lypinator 0:bb348c97df44 1254 /* Process locked */
lypinator 0:bb348c97df44 1255 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1256
lypinator 0:bb348c97df44 1257 /* Check the parameters */
lypinator 0:bb348c97df44 1258 assert_param(IS_DSI_LONG_WRITE_PACKET_TYPE(Mode));
lypinator 0:bb348c97df44 1259
lypinator 0:bb348c97df44 1260 /* Get tick */
lypinator 0:bb348c97df44 1261 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1262
lypinator 0:bb348c97df44 1263 /* Wait for Command FIFO Empty */
lypinator 0:bb348c97df44 1264 while((hdsi->Instance->GPSR & DSI_GPSR_CMDFE) == RESET)
lypinator 0:bb348c97df44 1265 {
lypinator 0:bb348c97df44 1266 /* Check for the Timeout */
lypinator 0:bb348c97df44 1267 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1268 {
lypinator 0:bb348c97df44 1269 /* Process Unlocked */
lypinator 0:bb348c97df44 1270 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1271
lypinator 0:bb348c97df44 1272 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1273 }
lypinator 0:bb348c97df44 1274 }
lypinator 0:bb348c97df44 1275
lypinator 0:bb348c97df44 1276 /* Set the DCS code on payload byte 1, and the other parameters on the write FIFO command*/
lypinator 0:bb348c97df44 1277 fifoword = Param1;
lypinator 0:bb348c97df44 1278 nbBytes = (NbParams < 3U) ? NbParams : 3U;
lypinator 0:bb348c97df44 1279
lypinator 0:bb348c97df44 1280 for(count = 0U; count < nbBytes; count++)
lypinator 0:bb348c97df44 1281 {
lypinator 0:bb348c97df44 1282 fifoword |= (((uint32_t)(*(pparams + count))) << (8U + (8U*count)));
lypinator 0:bb348c97df44 1283 }
lypinator 0:bb348c97df44 1284 hdsi->Instance->GPDR = fifoword;
lypinator 0:bb348c97df44 1285
lypinator 0:bb348c97df44 1286 uicounter = NbParams - nbBytes;
lypinator 0:bb348c97df44 1287 pparams += nbBytes;
lypinator 0:bb348c97df44 1288 /* Set the Next parameters on the write FIFO command*/
lypinator 0:bb348c97df44 1289 while(uicounter != 0U)
lypinator 0:bb348c97df44 1290 {
lypinator 0:bb348c97df44 1291 nbBytes = (uicounter < 4U) ? uicounter : 4U;
lypinator 0:bb348c97df44 1292 fifoword = 0U;
lypinator 0:bb348c97df44 1293 for(count = 0U; count < nbBytes; count++)
lypinator 0:bb348c97df44 1294 {
lypinator 0:bb348c97df44 1295 fifoword |= (((uint32_t)(*(pparams + count))) << (8U*count));
lypinator 0:bb348c97df44 1296 }
lypinator 0:bb348c97df44 1297 hdsi->Instance->GPDR = fifoword;
lypinator 0:bb348c97df44 1298
lypinator 0:bb348c97df44 1299 uicounter -= nbBytes;
lypinator 0:bb348c97df44 1300 pparams += nbBytes;
lypinator 0:bb348c97df44 1301 }
lypinator 0:bb348c97df44 1302
lypinator 0:bb348c97df44 1303 /* Configure the packet to send a long DCS command */
lypinator 0:bb348c97df44 1304 DSI_ConfigPacketHeader(hdsi->Instance,
lypinator 0:bb348c97df44 1305 ChannelID,
lypinator 0:bb348c97df44 1306 Mode,
lypinator 0:bb348c97df44 1307 ((NbParams+1U)&0x00FFU),
lypinator 0:bb348c97df44 1308 (((NbParams+1U)&0xFF00U)>>8U));
lypinator 0:bb348c97df44 1309
lypinator 0:bb348c97df44 1310 /* Process unlocked */
lypinator 0:bb348c97df44 1311 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1312
lypinator 0:bb348c97df44 1313 return HAL_OK;
lypinator 0:bb348c97df44 1314 }
lypinator 0:bb348c97df44 1315
lypinator 0:bb348c97df44 1316 /**
lypinator 0:bb348c97df44 1317 * @brief Read command (DCS or generic)
lypinator 0:bb348c97df44 1318 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1319 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1320 * @param ChannelNbr Virtual channel ID
lypinator 0:bb348c97df44 1321 * @param Array pointer to a buffer to store the payload of a read back operation.
lypinator 0:bb348c97df44 1322 * @param Size Data size to be read (in byte).
lypinator 0:bb348c97df44 1323 * @param Mode DSI read packet data type.
lypinator 0:bb348c97df44 1324 * This parameter can be any value of @ref DSI_SHORT_READ_PKT_Data_Type.
lypinator 0:bb348c97df44 1325 * @param DCSCmd DCS get/read command.
lypinator 0:bb348c97df44 1326 * @param ParametersTable Pointer to parameter values table.
lypinator 0:bb348c97df44 1327 * @retval HAL status
lypinator 0:bb348c97df44 1328 */
lypinator 0:bb348c97df44 1329 HAL_StatusTypeDef HAL_DSI_Read(DSI_HandleTypeDef *hdsi,
lypinator 0:bb348c97df44 1330 uint32_t ChannelNbr,
lypinator 0:bb348c97df44 1331 uint8_t* Array,
lypinator 0:bb348c97df44 1332 uint32_t Size,
lypinator 0:bb348c97df44 1333 uint32_t Mode,
lypinator 0:bb348c97df44 1334 uint32_t DCSCmd,
lypinator 0:bb348c97df44 1335 uint8_t* ParametersTable)
lypinator 0:bb348c97df44 1336 {
lypinator 0:bb348c97df44 1337 uint32_t tickstart;
lypinator 0:bb348c97df44 1338 uint8_t* pdata = Array;
lypinator 0:bb348c97df44 1339 uint32_t datasize = Size;
lypinator 0:bb348c97df44 1340
lypinator 0:bb348c97df44 1341 /* Process locked */
lypinator 0:bb348c97df44 1342 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1343
lypinator 0:bb348c97df44 1344 /* Check the parameters */
lypinator 0:bb348c97df44 1345 assert_param(IS_DSI_READ_PACKET_TYPE(Mode));
lypinator 0:bb348c97df44 1346
lypinator 0:bb348c97df44 1347 if(datasize > 2U)
lypinator 0:bb348c97df44 1348 {
lypinator 0:bb348c97df44 1349 /* set max return packet size */
lypinator 0:bb348c97df44 1350 if (HAL_DSI_ShortWrite(hdsi, ChannelNbr, DSI_MAX_RETURN_PKT_SIZE, ((datasize)&0xFFU), (((datasize)>>8U)&0xFFU)) != HAL_OK)
lypinator 0:bb348c97df44 1351 {
lypinator 0:bb348c97df44 1352 /* Process Unlocked */
lypinator 0:bb348c97df44 1353 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1354
lypinator 0:bb348c97df44 1355 return HAL_ERROR;
lypinator 0:bb348c97df44 1356 }
lypinator 0:bb348c97df44 1357 }
lypinator 0:bb348c97df44 1358
lypinator 0:bb348c97df44 1359 /* Configure the packet to read command */
lypinator 0:bb348c97df44 1360 if (Mode == DSI_DCS_SHORT_PKT_READ)
lypinator 0:bb348c97df44 1361 {
lypinator 0:bb348c97df44 1362 DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, DCSCmd, 0U);
lypinator 0:bb348c97df44 1363 }
lypinator 0:bb348c97df44 1364 else if (Mode == DSI_GEN_SHORT_PKT_READ_P0)
lypinator 0:bb348c97df44 1365 {
lypinator 0:bb348c97df44 1366 DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, 0U, 0U);
lypinator 0:bb348c97df44 1367 }
lypinator 0:bb348c97df44 1368 else if (Mode == DSI_GEN_SHORT_PKT_READ_P1)
lypinator 0:bb348c97df44 1369 {
lypinator 0:bb348c97df44 1370 DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, ParametersTable[0U], 0U);
lypinator 0:bb348c97df44 1371 }
lypinator 0:bb348c97df44 1372 else if (Mode == DSI_GEN_SHORT_PKT_READ_P2)
lypinator 0:bb348c97df44 1373 {
lypinator 0:bb348c97df44 1374 DSI_ConfigPacketHeader(hdsi->Instance, ChannelNbr, Mode, ParametersTable[0U], ParametersTable[1U]);
lypinator 0:bb348c97df44 1375 }
lypinator 0:bb348c97df44 1376 else
lypinator 0:bb348c97df44 1377 {
lypinator 0:bb348c97df44 1378 /* Process Unlocked */
lypinator 0:bb348c97df44 1379 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1380
lypinator 0:bb348c97df44 1381 return HAL_ERROR;
lypinator 0:bb348c97df44 1382 }
lypinator 0:bb348c97df44 1383
lypinator 0:bb348c97df44 1384 /* Get tick */
lypinator 0:bb348c97df44 1385 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1386
lypinator 0:bb348c97df44 1387 /* Check that the payload read FIFO is not empty */
lypinator 0:bb348c97df44 1388 while((hdsi->Instance->GPSR & DSI_GPSR_PRDFE) == DSI_GPSR_PRDFE)
lypinator 0:bb348c97df44 1389 {
lypinator 0:bb348c97df44 1390 /* Check for the Timeout */
lypinator 0:bb348c97df44 1391 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1392 {
lypinator 0:bb348c97df44 1393 /* Process Unlocked */
lypinator 0:bb348c97df44 1394 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1395
lypinator 0:bb348c97df44 1396 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1397 }
lypinator 0:bb348c97df44 1398 }
lypinator 0:bb348c97df44 1399
lypinator 0:bb348c97df44 1400 /* Get the first byte */
lypinator 0:bb348c97df44 1401 *((uint32_t *)pdata) = (hdsi->Instance->GPDR);
lypinator 0:bb348c97df44 1402 if (datasize > 4U)
lypinator 0:bb348c97df44 1403 {
lypinator 0:bb348c97df44 1404 datasize -= 4U;
lypinator 0:bb348c97df44 1405 pdata += 4U;
lypinator 0:bb348c97df44 1406 }
lypinator 0:bb348c97df44 1407 else
lypinator 0:bb348c97df44 1408 {
lypinator 0:bb348c97df44 1409 /* Process unlocked */
lypinator 0:bb348c97df44 1410 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1411
lypinator 0:bb348c97df44 1412 return HAL_OK;
lypinator 0:bb348c97df44 1413 }
lypinator 0:bb348c97df44 1414
lypinator 0:bb348c97df44 1415 /* Get tick */
lypinator 0:bb348c97df44 1416 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1417
lypinator 0:bb348c97df44 1418 /* Get the remaining bytes if any */
lypinator 0:bb348c97df44 1419 while(((int)(datasize)) > 0)
lypinator 0:bb348c97df44 1420 {
lypinator 0:bb348c97df44 1421 if((hdsi->Instance->GPSR & DSI_GPSR_PRDFE) == 0U)
lypinator 0:bb348c97df44 1422 {
lypinator 0:bb348c97df44 1423 *((uint32_t *)pdata) = (hdsi->Instance->GPDR);
lypinator 0:bb348c97df44 1424 datasize -= 4U;
lypinator 0:bb348c97df44 1425 pdata += 4U;
lypinator 0:bb348c97df44 1426 }
lypinator 0:bb348c97df44 1427
lypinator 0:bb348c97df44 1428 /* Check for the Timeout */
lypinator 0:bb348c97df44 1429 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1430 {
lypinator 0:bb348c97df44 1431 /* Process Unlocked */
lypinator 0:bb348c97df44 1432 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1433
lypinator 0:bb348c97df44 1434 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1435 }
lypinator 0:bb348c97df44 1436 }
lypinator 0:bb348c97df44 1437
lypinator 0:bb348c97df44 1438 /* Process unlocked */
lypinator 0:bb348c97df44 1439 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1440
lypinator 0:bb348c97df44 1441 return HAL_OK;
lypinator 0:bb348c97df44 1442 }
lypinator 0:bb348c97df44 1443
lypinator 0:bb348c97df44 1444 /**
lypinator 0:bb348c97df44 1445 * @brief Enter the ULPM (Ultra Low Power Mode) with the D-PHY PLL running
lypinator 0:bb348c97df44 1446 * (only data lanes are in ULPM)
lypinator 0:bb348c97df44 1447 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1448 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1449 * @retval HAL status
lypinator 0:bb348c97df44 1450 */
lypinator 0:bb348c97df44 1451 HAL_StatusTypeDef HAL_DSI_EnterULPMData(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 1452 {
lypinator 0:bb348c97df44 1453 uint32_t tickstart;
lypinator 0:bb348c97df44 1454
lypinator 0:bb348c97df44 1455 /* Process locked */
lypinator 0:bb348c97df44 1456 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1457
lypinator 0:bb348c97df44 1458 /* ULPS Request on Data Lanes */
lypinator 0:bb348c97df44 1459 hdsi->Instance->PUCR |= DSI_PUCR_URDL;
lypinator 0:bb348c97df44 1460
lypinator 0:bb348c97df44 1461 /* Get tick */
lypinator 0:bb348c97df44 1462 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1463
lypinator 0:bb348c97df44 1464 /* Wait until the D-PHY active lanes enter into ULPM */
lypinator 0:bb348c97df44 1465 if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
lypinator 0:bb348c97df44 1466 {
lypinator 0:bb348c97df44 1467 while((hdsi->Instance->PSR & DSI_PSR_UAN0) != RESET)
lypinator 0:bb348c97df44 1468 {
lypinator 0:bb348c97df44 1469 /* Check for the Timeout */
lypinator 0:bb348c97df44 1470 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1471 {
lypinator 0:bb348c97df44 1472 /* Process Unlocked */
lypinator 0:bb348c97df44 1473 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1474
lypinator 0:bb348c97df44 1475 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1476 }
lypinator 0:bb348c97df44 1477 }
lypinator 0:bb348c97df44 1478 }
lypinator 0:bb348c97df44 1479 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
lypinator 0:bb348c97df44 1480 {
lypinator 0:bb348c97df44 1481 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != RESET)
lypinator 0:bb348c97df44 1482 {
lypinator 0:bb348c97df44 1483 /* Check for the Timeout */
lypinator 0:bb348c97df44 1484 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1485 {
lypinator 0:bb348c97df44 1486 /* Process Unlocked */
lypinator 0:bb348c97df44 1487 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1488
lypinator 0:bb348c97df44 1489 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1490 }
lypinator 0:bb348c97df44 1491 }
lypinator 0:bb348c97df44 1492 }
lypinator 0:bb348c97df44 1493 else
lypinator 0:bb348c97df44 1494 {
lypinator 0:bb348c97df44 1495 /* Process unlocked */
lypinator 0:bb348c97df44 1496 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1497
lypinator 0:bb348c97df44 1498 return HAL_ERROR;
lypinator 0:bb348c97df44 1499 }
lypinator 0:bb348c97df44 1500
lypinator 0:bb348c97df44 1501 /* Process unlocked */
lypinator 0:bb348c97df44 1502 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1503
lypinator 0:bb348c97df44 1504 return HAL_OK;
lypinator 0:bb348c97df44 1505 }
lypinator 0:bb348c97df44 1506
lypinator 0:bb348c97df44 1507 /**
lypinator 0:bb348c97df44 1508 * @brief Exit the ULPM (Ultra Low Power Mode) with the D-PHY PLL running
lypinator 0:bb348c97df44 1509 * (only data lanes are in ULPM)
lypinator 0:bb348c97df44 1510 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1511 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1512 * @retval HAL status
lypinator 0:bb348c97df44 1513 */
lypinator 0:bb348c97df44 1514 HAL_StatusTypeDef HAL_DSI_ExitULPMData(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 1515 {
lypinator 0:bb348c97df44 1516 uint32_t tickstart;
lypinator 0:bb348c97df44 1517
lypinator 0:bb348c97df44 1518 /* Process locked */
lypinator 0:bb348c97df44 1519 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1520
lypinator 0:bb348c97df44 1521 /* Exit ULPS on Data Lanes */
lypinator 0:bb348c97df44 1522 hdsi->Instance->PUCR |= DSI_PUCR_UEDL;
lypinator 0:bb348c97df44 1523
lypinator 0:bb348c97df44 1524 /* Get tick */
lypinator 0:bb348c97df44 1525 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1526
lypinator 0:bb348c97df44 1527 /* Wait until all active lanes exit ULPM */
lypinator 0:bb348c97df44 1528 if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
lypinator 0:bb348c97df44 1529 {
lypinator 0:bb348c97df44 1530 while((hdsi->Instance->PSR & DSI_PSR_UAN0) != DSI_PSR_UAN0)
lypinator 0:bb348c97df44 1531 {
lypinator 0:bb348c97df44 1532 /* Check for the Timeout */
lypinator 0:bb348c97df44 1533 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1534 {
lypinator 0:bb348c97df44 1535 /* Process Unlocked */
lypinator 0:bb348c97df44 1536 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1537
lypinator 0:bb348c97df44 1538 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1539 }
lypinator 0:bb348c97df44 1540 }
lypinator 0:bb348c97df44 1541 }
lypinator 0:bb348c97df44 1542 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
lypinator 0:bb348c97df44 1543 {
lypinator 0:bb348c97df44 1544 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1)) != (DSI_PSR_UAN0 | DSI_PSR_UAN1))
lypinator 0:bb348c97df44 1545 {
lypinator 0:bb348c97df44 1546 /* Check for the Timeout */
lypinator 0:bb348c97df44 1547 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1548 {
lypinator 0:bb348c97df44 1549 /* Process Unlocked */
lypinator 0:bb348c97df44 1550 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1551
lypinator 0:bb348c97df44 1552 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1553 }
lypinator 0:bb348c97df44 1554 }
lypinator 0:bb348c97df44 1555 }
lypinator 0:bb348c97df44 1556 else
lypinator 0:bb348c97df44 1557 {
lypinator 0:bb348c97df44 1558 /* Process unlocked */
lypinator 0:bb348c97df44 1559 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1560
lypinator 0:bb348c97df44 1561 return HAL_ERROR;
lypinator 0:bb348c97df44 1562 }
lypinator 0:bb348c97df44 1563
lypinator 0:bb348c97df44 1564 /* wait for 1 ms*/
lypinator 0:bb348c97df44 1565 HAL_Delay(1U);
lypinator 0:bb348c97df44 1566
lypinator 0:bb348c97df44 1567 /* De-assert the ULPM requests and the ULPM exit bits */
lypinator 0:bb348c97df44 1568 hdsi->Instance->PUCR = 0U;
lypinator 0:bb348c97df44 1569
lypinator 0:bb348c97df44 1570 /* Process unlocked */
lypinator 0:bb348c97df44 1571 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1572
lypinator 0:bb348c97df44 1573 return HAL_OK;
lypinator 0:bb348c97df44 1574 }
lypinator 0:bb348c97df44 1575
lypinator 0:bb348c97df44 1576 /**
lypinator 0:bb348c97df44 1577 * @brief Enter the ULPM (Ultra Low Power Mode) with the D-PHY PLL turned off
lypinator 0:bb348c97df44 1578 * (both data and clock lanes are in ULPM)
lypinator 0:bb348c97df44 1579 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1580 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1581 * @retval HAL status
lypinator 0:bb348c97df44 1582 */
lypinator 0:bb348c97df44 1583 HAL_StatusTypeDef HAL_DSI_EnterULPM(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 1584 {
lypinator 0:bb348c97df44 1585 uint32_t tickstart;
lypinator 0:bb348c97df44 1586
lypinator 0:bb348c97df44 1587 /* Process locked */
lypinator 0:bb348c97df44 1588 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1589
lypinator 0:bb348c97df44 1590 /* Clock lane configuration: no more HS request */
lypinator 0:bb348c97df44 1591 hdsi->Instance->CLCR &= ~DSI_CLCR_DPCC;
lypinator 0:bb348c97df44 1592
lypinator 0:bb348c97df44 1593 /* Use system PLL as byte lane clock source before stopping DSIPHY clock source */
lypinator 0:bb348c97df44 1594 __HAL_RCC_DSI_CONFIG(RCC_DSICLKSOURCE_PLLR);
lypinator 0:bb348c97df44 1595
lypinator 0:bb348c97df44 1596 /* ULPS Request on Clock and Data Lanes */
lypinator 0:bb348c97df44 1597 hdsi->Instance->PUCR |= (DSI_PUCR_URCL | DSI_PUCR_URDL);
lypinator 0:bb348c97df44 1598
lypinator 0:bb348c97df44 1599 /* Get tick */
lypinator 0:bb348c97df44 1600 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1601
lypinator 0:bb348c97df44 1602 /* Wait until all active lanes exit ULPM */
lypinator 0:bb348c97df44 1603 if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
lypinator 0:bb348c97df44 1604 {
lypinator 0:bb348c97df44 1605 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UANC)) != RESET)
lypinator 0:bb348c97df44 1606 {
lypinator 0:bb348c97df44 1607 /* Check for the Timeout */
lypinator 0:bb348c97df44 1608 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1609 {
lypinator 0:bb348c97df44 1610 /* Process Unlocked */
lypinator 0:bb348c97df44 1611 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1612
lypinator 0:bb348c97df44 1613 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1614 }
lypinator 0:bb348c97df44 1615 }
lypinator 0:bb348c97df44 1616 }
lypinator 0:bb348c97df44 1617 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
lypinator 0:bb348c97df44 1618 {
lypinator 0:bb348c97df44 1619 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1 | DSI_PSR_UANC)) != RESET)
lypinator 0:bb348c97df44 1620 {
lypinator 0:bb348c97df44 1621 /* Check for the Timeout */
lypinator 0:bb348c97df44 1622 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1623 {
lypinator 0:bb348c97df44 1624 /* Process Unlocked */
lypinator 0:bb348c97df44 1625 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1626
lypinator 0:bb348c97df44 1627 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1628 }
lypinator 0:bb348c97df44 1629 }
lypinator 0:bb348c97df44 1630 }
lypinator 0:bb348c97df44 1631 else
lypinator 0:bb348c97df44 1632 {
lypinator 0:bb348c97df44 1633 /* Process unlocked */
lypinator 0:bb348c97df44 1634 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1635
lypinator 0:bb348c97df44 1636 return HAL_ERROR;
lypinator 0:bb348c97df44 1637 }
lypinator 0:bb348c97df44 1638
lypinator 0:bb348c97df44 1639 /* Turn off the DSI PLL */
lypinator 0:bb348c97df44 1640 __HAL_DSI_PLL_DISABLE(hdsi);
lypinator 0:bb348c97df44 1641
lypinator 0:bb348c97df44 1642 /* Process unlocked */
lypinator 0:bb348c97df44 1643 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1644
lypinator 0:bb348c97df44 1645 return HAL_OK;
lypinator 0:bb348c97df44 1646 }
lypinator 0:bb348c97df44 1647
lypinator 0:bb348c97df44 1648 /**
lypinator 0:bb348c97df44 1649 * @brief Exit the ULPM (Ultra Low Power Mode) with the D-PHY PLL turned off
lypinator 0:bb348c97df44 1650 * (both data and clock lanes are in ULPM)
lypinator 0:bb348c97df44 1651 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1652 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1653 * @retval HAL status
lypinator 0:bb348c97df44 1654 */
lypinator 0:bb348c97df44 1655 HAL_StatusTypeDef HAL_DSI_ExitULPM(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 1656 {
lypinator 0:bb348c97df44 1657 uint32_t tickstart;
lypinator 0:bb348c97df44 1658
lypinator 0:bb348c97df44 1659 /* Process locked */
lypinator 0:bb348c97df44 1660 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1661
lypinator 0:bb348c97df44 1662 /* Turn on the DSI PLL */
lypinator 0:bb348c97df44 1663 __HAL_DSI_PLL_ENABLE(hdsi);
lypinator 0:bb348c97df44 1664
lypinator 0:bb348c97df44 1665 /* Get tick */
lypinator 0:bb348c97df44 1666 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1667
lypinator 0:bb348c97df44 1668 /* Wait for the lock of the PLL */
lypinator 0:bb348c97df44 1669 while(__HAL_DSI_GET_FLAG(hdsi, DSI_FLAG_PLLLS) == RESET)
lypinator 0:bb348c97df44 1670 {
lypinator 0:bb348c97df44 1671 /* Check for the Timeout */
lypinator 0:bb348c97df44 1672 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1673 {
lypinator 0:bb348c97df44 1674 /* Process Unlocked */
lypinator 0:bb348c97df44 1675 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1676
lypinator 0:bb348c97df44 1677 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1678 }
lypinator 0:bb348c97df44 1679 }
lypinator 0:bb348c97df44 1680
lypinator 0:bb348c97df44 1681 /* Exit ULPS on Clock and Data Lanes */
lypinator 0:bb348c97df44 1682 hdsi->Instance->PUCR |= (DSI_PUCR_UECL | DSI_PUCR_UEDL);
lypinator 0:bb348c97df44 1683
lypinator 0:bb348c97df44 1684 /* Get tick */
lypinator 0:bb348c97df44 1685 tickstart = HAL_GetTick();
lypinator 0:bb348c97df44 1686
lypinator 0:bb348c97df44 1687 /* Wait until all active lanes exit ULPM */
lypinator 0:bb348c97df44 1688 if((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_ONE_DATA_LANE)
lypinator 0:bb348c97df44 1689 {
lypinator 0:bb348c97df44 1690 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UANC)) != (DSI_PSR_UAN0 | DSI_PSR_UANC))
lypinator 0:bb348c97df44 1691 {
lypinator 0:bb348c97df44 1692 /* Check for the Timeout */
lypinator 0:bb348c97df44 1693 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1694 {
lypinator 0:bb348c97df44 1695 /* Process Unlocked */
lypinator 0:bb348c97df44 1696 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1697
lypinator 0:bb348c97df44 1698 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1699 }
lypinator 0:bb348c97df44 1700 }
lypinator 0:bb348c97df44 1701 }
lypinator 0:bb348c97df44 1702 else if ((hdsi->Instance->PCONFR & DSI_PCONFR_NL) == DSI_TWO_DATA_LANES)
lypinator 0:bb348c97df44 1703 {
lypinator 0:bb348c97df44 1704 while((hdsi->Instance->PSR & (DSI_PSR_UAN0 | DSI_PSR_UAN1 | DSI_PSR_UANC)) != (DSI_PSR_UAN0 | DSI_PSR_UAN1 | DSI_PSR_UANC))
lypinator 0:bb348c97df44 1705 {
lypinator 0:bb348c97df44 1706 /* Check for the Timeout */
lypinator 0:bb348c97df44 1707 if((HAL_GetTick() - tickstart ) > DSI_TIMEOUT_VALUE)
lypinator 0:bb348c97df44 1708 {
lypinator 0:bb348c97df44 1709 /* Process Unlocked */
lypinator 0:bb348c97df44 1710 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1711
lypinator 0:bb348c97df44 1712 return HAL_TIMEOUT;
lypinator 0:bb348c97df44 1713 }
lypinator 0:bb348c97df44 1714 }
lypinator 0:bb348c97df44 1715 }
lypinator 0:bb348c97df44 1716 else
lypinator 0:bb348c97df44 1717 {
lypinator 0:bb348c97df44 1718 /* Process unlocked */
lypinator 0:bb348c97df44 1719 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1720
lypinator 0:bb348c97df44 1721 return HAL_ERROR;
lypinator 0:bb348c97df44 1722 }
lypinator 0:bb348c97df44 1723
lypinator 0:bb348c97df44 1724 /* wait for 1 ms */
lypinator 0:bb348c97df44 1725 HAL_Delay(1U);
lypinator 0:bb348c97df44 1726
lypinator 0:bb348c97df44 1727 /* De-assert the ULPM requests and the ULPM exit bits */
lypinator 0:bb348c97df44 1728 hdsi->Instance->PUCR = 0U;
lypinator 0:bb348c97df44 1729
lypinator 0:bb348c97df44 1730 /* Switch the lanbyteclock source in the RCC from system PLL to D-PHY */
lypinator 0:bb348c97df44 1731 __HAL_RCC_DSI_CONFIG(RCC_DSICLKSOURCE_DSIPHY);
lypinator 0:bb348c97df44 1732
lypinator 0:bb348c97df44 1733 /* Restore clock lane configuration to HS */
lypinator 0:bb348c97df44 1734 hdsi->Instance->CLCR |= DSI_CLCR_DPCC;
lypinator 0:bb348c97df44 1735
lypinator 0:bb348c97df44 1736 /* Process unlocked */
lypinator 0:bb348c97df44 1737 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1738
lypinator 0:bb348c97df44 1739 return HAL_OK;
lypinator 0:bb348c97df44 1740 }
lypinator 0:bb348c97df44 1741
lypinator 0:bb348c97df44 1742 /**
lypinator 0:bb348c97df44 1743 * @brief Start test pattern generation
lypinator 0:bb348c97df44 1744 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1745 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1746 * @param Mode Pattern generator mode
lypinator 0:bb348c97df44 1747 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 1748 * 0 : Color bars (horizontal or vertical)
lypinator 0:bb348c97df44 1749 * 1 : BER pattern (vertical only)
lypinator 0:bb348c97df44 1750 * @param Orientation Pattern generator orientation
lypinator 0:bb348c97df44 1751 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 1752 * 0 : Vertical color bars
lypinator 0:bb348c97df44 1753 * 1 : Horizontal color bars
lypinator 0:bb348c97df44 1754 * @retval HAL status
lypinator 0:bb348c97df44 1755 */
lypinator 0:bb348c97df44 1756 HAL_StatusTypeDef HAL_DSI_PatternGeneratorStart(DSI_HandleTypeDef *hdsi, uint32_t Mode, uint32_t Orientation)
lypinator 0:bb348c97df44 1757 {
lypinator 0:bb348c97df44 1758 /* Process locked */
lypinator 0:bb348c97df44 1759 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1760
lypinator 0:bb348c97df44 1761 /* Configure pattern generator mode and orientation */
lypinator 0:bb348c97df44 1762 hdsi->Instance->VMCR &= ~(DSI_VMCR_PGM | DSI_VMCR_PGO);
lypinator 0:bb348c97df44 1763 hdsi->Instance->VMCR |= ((Mode<<20U) | (Orientation<<24U));
lypinator 0:bb348c97df44 1764
lypinator 0:bb348c97df44 1765 /* Enable pattern generator by setting PGE bit */
lypinator 0:bb348c97df44 1766 hdsi->Instance->VMCR |= DSI_VMCR_PGE;
lypinator 0:bb348c97df44 1767
lypinator 0:bb348c97df44 1768 /* Process unlocked */
lypinator 0:bb348c97df44 1769 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1770
lypinator 0:bb348c97df44 1771 return HAL_OK;
lypinator 0:bb348c97df44 1772 }
lypinator 0:bb348c97df44 1773
lypinator 0:bb348c97df44 1774 /**
lypinator 0:bb348c97df44 1775 * @brief Stop test pattern generation
lypinator 0:bb348c97df44 1776 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1777 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1778 * @retval HAL status
lypinator 0:bb348c97df44 1779 */
lypinator 0:bb348c97df44 1780 HAL_StatusTypeDef HAL_DSI_PatternGeneratorStop(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 1781 {
lypinator 0:bb348c97df44 1782 /* Process locked */
lypinator 0:bb348c97df44 1783 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1784
lypinator 0:bb348c97df44 1785 /* Disable pattern generator by clearing PGE bit */
lypinator 0:bb348c97df44 1786 hdsi->Instance->VMCR &= ~DSI_VMCR_PGE;
lypinator 0:bb348c97df44 1787
lypinator 0:bb348c97df44 1788 /* Process unlocked */
lypinator 0:bb348c97df44 1789 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1790
lypinator 0:bb348c97df44 1791 return HAL_OK;
lypinator 0:bb348c97df44 1792 }
lypinator 0:bb348c97df44 1793
lypinator 0:bb348c97df44 1794 /**
lypinator 0:bb348c97df44 1795 * @brief Set Slew-Rate And Delay Tuning
lypinator 0:bb348c97df44 1796 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1797 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1798 * @param CommDelay Communication delay to be adjusted.
lypinator 0:bb348c97df44 1799 * This parameter can be any value of @ref DSI_Communication_Delay
lypinator 0:bb348c97df44 1800 * @param Lane select between clock or data lanes.
lypinator 0:bb348c97df44 1801 * This parameter can be any value of @ref DSI_Lane_Group
lypinator 0:bb348c97df44 1802 * @param Value Custom value of the slew-rate or delay
lypinator 0:bb348c97df44 1803 * @retval HAL status
lypinator 0:bb348c97df44 1804 */
lypinator 0:bb348c97df44 1805 HAL_StatusTypeDef HAL_DSI_SetSlewRateAndDelayTuning(DSI_HandleTypeDef *hdsi, uint32_t CommDelay, uint32_t Lane, uint32_t Value)
lypinator 0:bb348c97df44 1806 {
lypinator 0:bb348c97df44 1807 /* Process locked */
lypinator 0:bb348c97df44 1808 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1809
lypinator 0:bb348c97df44 1810 /* Check function parameters */
lypinator 0:bb348c97df44 1811 assert_param(IS_DSI_COMMUNICATION_DELAY(CommDelay));
lypinator 0:bb348c97df44 1812 assert_param(IS_DSI_LANE_GROUP(Lane));
lypinator 0:bb348c97df44 1813
lypinator 0:bb348c97df44 1814 switch(CommDelay)
lypinator 0:bb348c97df44 1815 {
lypinator 0:bb348c97df44 1816 case DSI_SLEW_RATE_HSTX:
lypinator 0:bb348c97df44 1817 if(Lane == DSI_CLOCK_LANE)
lypinator 0:bb348c97df44 1818 {
lypinator 0:bb348c97df44 1819 /* High-Speed Transmission Slew Rate Control on Clock Lane */
lypinator 0:bb348c97df44 1820 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXSRCCL;
lypinator 0:bb348c97df44 1821 hdsi->Instance->WPCR[1U] |= Value<<16U;
lypinator 0:bb348c97df44 1822 }
lypinator 0:bb348c97df44 1823 else if(Lane == DSI_DATA_LANES)
lypinator 0:bb348c97df44 1824 {
lypinator 0:bb348c97df44 1825 /* High-Speed Transmission Slew Rate Control on Data Lanes */
lypinator 0:bb348c97df44 1826 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXSRCDL;
lypinator 0:bb348c97df44 1827 hdsi->Instance->WPCR[1U] |= Value<<18U;
lypinator 0:bb348c97df44 1828 }
lypinator 0:bb348c97df44 1829 else
lypinator 0:bb348c97df44 1830 {
lypinator 0:bb348c97df44 1831 /* Process unlocked */
lypinator 0:bb348c97df44 1832 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1833
lypinator 0:bb348c97df44 1834 return HAL_ERROR;
lypinator 0:bb348c97df44 1835 }
lypinator 0:bb348c97df44 1836 break;
lypinator 0:bb348c97df44 1837 case DSI_SLEW_RATE_LPTX:
lypinator 0:bb348c97df44 1838 if(Lane == DSI_CLOCK_LANE)
lypinator 0:bb348c97df44 1839 {
lypinator 0:bb348c97df44 1840 /* Low-Power transmission Slew Rate Compensation on Clock Lane */
lypinator 0:bb348c97df44 1841 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPSRCCL;
lypinator 0:bb348c97df44 1842 hdsi->Instance->WPCR[1U] |= Value<<6U;
lypinator 0:bb348c97df44 1843 }
lypinator 0:bb348c97df44 1844 else if(Lane == DSI_DATA_LANES)
lypinator 0:bb348c97df44 1845 {
lypinator 0:bb348c97df44 1846 /* Low-Power transmission Slew Rate Compensation on Data Lanes */
lypinator 0:bb348c97df44 1847 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPSRCDL;
lypinator 0:bb348c97df44 1848 hdsi->Instance->WPCR[1U] |= Value<<8U;
lypinator 0:bb348c97df44 1849 }
lypinator 0:bb348c97df44 1850 else
lypinator 0:bb348c97df44 1851 {
lypinator 0:bb348c97df44 1852 /* Process unlocked */
lypinator 0:bb348c97df44 1853 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1854
lypinator 0:bb348c97df44 1855 return HAL_ERROR;
lypinator 0:bb348c97df44 1856 }
lypinator 0:bb348c97df44 1857 break;
lypinator 0:bb348c97df44 1858 case DSI_HS_DELAY:
lypinator 0:bb348c97df44 1859 if(Lane == DSI_CLOCK_LANE)
lypinator 0:bb348c97df44 1860 {
lypinator 0:bb348c97df44 1861 /* High-Speed Transmission Delay on Clock Lane */
lypinator 0:bb348c97df44 1862 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXDCL;
lypinator 0:bb348c97df44 1863 hdsi->Instance->WPCR[1U] |= Value;
lypinator 0:bb348c97df44 1864 }
lypinator 0:bb348c97df44 1865 else if(Lane == DSI_DATA_LANES)
lypinator 0:bb348c97df44 1866 {
lypinator 0:bb348c97df44 1867 /* High-Speed Transmission Delay on Data Lanes */
lypinator 0:bb348c97df44 1868 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_HSTXDDL;
lypinator 0:bb348c97df44 1869 hdsi->Instance->WPCR[1U] |= Value<<2U;
lypinator 0:bb348c97df44 1870 }
lypinator 0:bb348c97df44 1871 else
lypinator 0:bb348c97df44 1872 {
lypinator 0:bb348c97df44 1873 /* Process unlocked */
lypinator 0:bb348c97df44 1874 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1875
lypinator 0:bb348c97df44 1876 return HAL_ERROR;
lypinator 0:bb348c97df44 1877 }
lypinator 0:bb348c97df44 1878 break;
lypinator 0:bb348c97df44 1879 default:
lypinator 0:bb348c97df44 1880 break;
lypinator 0:bb348c97df44 1881 }
lypinator 0:bb348c97df44 1882
lypinator 0:bb348c97df44 1883 /* Process unlocked */
lypinator 0:bb348c97df44 1884 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1885
lypinator 0:bb348c97df44 1886 return HAL_OK;
lypinator 0:bb348c97df44 1887 }
lypinator 0:bb348c97df44 1888
lypinator 0:bb348c97df44 1889 /**
lypinator 0:bb348c97df44 1890 * @brief Low-Power Reception Filter Tuning
lypinator 0:bb348c97df44 1891 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1892 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1893 * @param Frequency cutoff frequency of low-pass filter at the input of LPRX
lypinator 0:bb348c97df44 1894 * @retval HAL status
lypinator 0:bb348c97df44 1895 */
lypinator 0:bb348c97df44 1896 HAL_StatusTypeDef HAL_DSI_SetLowPowerRXFilter(DSI_HandleTypeDef *hdsi, uint32_t Frequency)
lypinator 0:bb348c97df44 1897 {
lypinator 0:bb348c97df44 1898 /* Process locked */
lypinator 0:bb348c97df44 1899 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1900
lypinator 0:bb348c97df44 1901 /* Low-Power RX low-pass Filtering Tuning */
lypinator 0:bb348c97df44 1902 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_LPRXFT;
lypinator 0:bb348c97df44 1903 hdsi->Instance->WPCR[1U] |= Frequency<<25U;
lypinator 0:bb348c97df44 1904
lypinator 0:bb348c97df44 1905 /* Process unlocked */
lypinator 0:bb348c97df44 1906 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1907
lypinator 0:bb348c97df44 1908 return HAL_OK;
lypinator 0:bb348c97df44 1909 }
lypinator 0:bb348c97df44 1910
lypinator 0:bb348c97df44 1911 /**
lypinator 0:bb348c97df44 1912 * @brief Activate an additional current path on all lanes to meet the SDDTx parameter
lypinator 0:bb348c97df44 1913 * defined in the MIPI D-PHY specification
lypinator 0:bb348c97df44 1914 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1915 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1916 * @param State ENABLE or DISABLE
lypinator 0:bb348c97df44 1917 * @retval HAL status
lypinator 0:bb348c97df44 1918 */
lypinator 0:bb348c97df44 1919 HAL_StatusTypeDef HAL_DSI_SetSDD(DSI_HandleTypeDef *hdsi, FunctionalState State)
lypinator 0:bb348c97df44 1920 {
lypinator 0:bb348c97df44 1921 /* Process locked */
lypinator 0:bb348c97df44 1922 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1923
lypinator 0:bb348c97df44 1924 /* Check function parameters */
lypinator 0:bb348c97df44 1925 assert_param(IS_FUNCTIONAL_STATE(State));
lypinator 0:bb348c97df44 1926
lypinator 0:bb348c97df44 1927 /* Activate/Disactivate additional current path on all lanes */
lypinator 0:bb348c97df44 1928 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_SDDC;
lypinator 0:bb348c97df44 1929 hdsi->Instance->WPCR[1U] |= ((uint32_t)State << 12U);
lypinator 0:bb348c97df44 1930
lypinator 0:bb348c97df44 1931 /* Process unlocked */
lypinator 0:bb348c97df44 1932 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1933
lypinator 0:bb348c97df44 1934 return HAL_OK;
lypinator 0:bb348c97df44 1935 }
lypinator 0:bb348c97df44 1936
lypinator 0:bb348c97df44 1937 /**
lypinator 0:bb348c97df44 1938 * @brief Custom lane pins configuration
lypinator 0:bb348c97df44 1939 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 1940 * the configuration information for the DSI.
lypinator 0:bb348c97df44 1941 * @param CustomLane Function to be applyed on selected lane.
lypinator 0:bb348c97df44 1942 * This parameter can be any value of @ref DSI_CustomLane
lypinator 0:bb348c97df44 1943 * @param Lane select between clock or data lane 0 or data lane 1.
lypinator 0:bb348c97df44 1944 * This parameter can be any value of @ref DSI_Lane_Select
lypinator 0:bb348c97df44 1945 * @param State ENABLE or DISABLE
lypinator 0:bb348c97df44 1946 * @retval HAL status
lypinator 0:bb348c97df44 1947 */
lypinator 0:bb348c97df44 1948 HAL_StatusTypeDef HAL_DSI_SetLanePinsConfiguration(DSI_HandleTypeDef *hdsi, uint32_t CustomLane, uint32_t Lane, FunctionalState State)
lypinator 0:bb348c97df44 1949 {
lypinator 0:bb348c97df44 1950 /* Process locked */
lypinator 0:bb348c97df44 1951 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 1952
lypinator 0:bb348c97df44 1953 /* Check function parameters */
lypinator 0:bb348c97df44 1954 assert_param(IS_DSI_CUSTOM_LANE(CustomLane));
lypinator 0:bb348c97df44 1955 assert_param(IS_DSI_LANE(Lane));
lypinator 0:bb348c97df44 1956 assert_param(IS_FUNCTIONAL_STATE(State));
lypinator 0:bb348c97df44 1957
lypinator 0:bb348c97df44 1958 switch(CustomLane)
lypinator 0:bb348c97df44 1959 {
lypinator 0:bb348c97df44 1960 case DSI_SWAP_LANE_PINS:
lypinator 0:bb348c97df44 1961 if(Lane == DSI_CLK_LANE)
lypinator 0:bb348c97df44 1962 {
lypinator 0:bb348c97df44 1963 /* Swap pins on clock lane */
lypinator 0:bb348c97df44 1964 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWCL;
lypinator 0:bb348c97df44 1965 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 6U);
lypinator 0:bb348c97df44 1966 }
lypinator 0:bb348c97df44 1967 else if(Lane == DSI_DATA_LANE0)
lypinator 0:bb348c97df44 1968 {
lypinator 0:bb348c97df44 1969 /* Swap pins on data lane 0 */
lypinator 0:bb348c97df44 1970 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWDL0;
lypinator 0:bb348c97df44 1971 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 7U);
lypinator 0:bb348c97df44 1972 }
lypinator 0:bb348c97df44 1973 else if(Lane == DSI_DATA_LANE1)
lypinator 0:bb348c97df44 1974 {
lypinator 0:bb348c97df44 1975 /* Swap pins on data lane 1 */
lypinator 0:bb348c97df44 1976 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_SWDL1;
lypinator 0:bb348c97df44 1977 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 8U);
lypinator 0:bb348c97df44 1978 }
lypinator 0:bb348c97df44 1979 else
lypinator 0:bb348c97df44 1980 {
lypinator 0:bb348c97df44 1981 /* Process unlocked */
lypinator 0:bb348c97df44 1982 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 1983
lypinator 0:bb348c97df44 1984 return HAL_ERROR;
lypinator 0:bb348c97df44 1985 }
lypinator 0:bb348c97df44 1986 break;
lypinator 0:bb348c97df44 1987 case DSI_INVERT_HS_SIGNAL:
lypinator 0:bb348c97df44 1988 if(Lane == DSI_CLK_LANE)
lypinator 0:bb348c97df44 1989 {
lypinator 0:bb348c97df44 1990 /* Invert HS signal on clock lane */
lypinator 0:bb348c97df44 1991 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSICL;
lypinator 0:bb348c97df44 1992 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 9U);
lypinator 0:bb348c97df44 1993 }
lypinator 0:bb348c97df44 1994 else if(Lane == DSI_DATA_LANE0)
lypinator 0:bb348c97df44 1995 {
lypinator 0:bb348c97df44 1996 /* Invert HS signal on data lane 0 */
lypinator 0:bb348c97df44 1997 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSIDL0;
lypinator 0:bb348c97df44 1998 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 10U);
lypinator 0:bb348c97df44 1999 }
lypinator 0:bb348c97df44 2000 else if(Lane == DSI_DATA_LANE1)
lypinator 0:bb348c97df44 2001 {
lypinator 0:bb348c97df44 2002 /* Invert HS signal on data lane 1 */
lypinator 0:bb348c97df44 2003 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_HSIDL1;
lypinator 0:bb348c97df44 2004 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 11U);
lypinator 0:bb348c97df44 2005 }
lypinator 0:bb348c97df44 2006 else
lypinator 0:bb348c97df44 2007 {
lypinator 0:bb348c97df44 2008 /* Process unlocked */
lypinator 0:bb348c97df44 2009 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 2010
lypinator 0:bb348c97df44 2011 return HAL_ERROR;
lypinator 0:bb348c97df44 2012 }
lypinator 0:bb348c97df44 2013 break;
lypinator 0:bb348c97df44 2014 default:
lypinator 0:bb348c97df44 2015 break;
lypinator 0:bb348c97df44 2016 }
lypinator 0:bb348c97df44 2017
lypinator 0:bb348c97df44 2018 /* Process unlocked */
lypinator 0:bb348c97df44 2019 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 2020
lypinator 0:bb348c97df44 2021 return HAL_OK;
lypinator 0:bb348c97df44 2022 }
lypinator 0:bb348c97df44 2023
lypinator 0:bb348c97df44 2024 /**
lypinator 0:bb348c97df44 2025 * @brief Set custom timing for the PHY
lypinator 0:bb348c97df44 2026 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2027 * the configuration information for the DSI.
lypinator 0:bb348c97df44 2028 * @param Timing PHY timing to be adjusted.
lypinator 0:bb348c97df44 2029 * This parameter can be any value of @ref DSI_PHY_Timing
lypinator 0:bb348c97df44 2030 * @param State ENABLE or DISABLE
lypinator 0:bb348c97df44 2031 * @param Value Custom value of the timing
lypinator 0:bb348c97df44 2032 * @retval HAL status
lypinator 0:bb348c97df44 2033 */
lypinator 0:bb348c97df44 2034 HAL_StatusTypeDef HAL_DSI_SetPHYTimings(DSI_HandleTypeDef *hdsi, uint32_t Timing, FunctionalState State, uint32_t Value)
lypinator 0:bb348c97df44 2035 {
lypinator 0:bb348c97df44 2036 /* Process locked */
lypinator 0:bb348c97df44 2037 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 2038
lypinator 0:bb348c97df44 2039 /* Check function parameters */
lypinator 0:bb348c97df44 2040 assert_param(IS_DSI_PHY_TIMING(Timing));
lypinator 0:bb348c97df44 2041 assert_param(IS_FUNCTIONAL_STATE(State));
lypinator 0:bb348c97df44 2042
lypinator 0:bb348c97df44 2043 switch(Timing)
lypinator 0:bb348c97df44 2044 {
lypinator 0:bb348c97df44 2045 case DSI_TCLK_POST:
lypinator 0:bb348c97df44 2046 /* Enable/Disable custom timing setting */
lypinator 0:bb348c97df44 2047 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKPOSTEN;
lypinator 0:bb348c97df44 2048 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 27U);
lypinator 0:bb348c97df44 2049
lypinator 0:bb348c97df44 2050 if(State != DISABLE)
lypinator 0:bb348c97df44 2051 {
lypinator 0:bb348c97df44 2052 /* Set custom value */
lypinator 0:bb348c97df44 2053 hdsi->Instance->WPCR[4U] &= ~DSI_WPCR4_TCLKPOST;
lypinator 0:bb348c97df44 2054 hdsi->Instance->WPCR[4U] |= Value & DSI_WPCR4_TCLKPOST;
lypinator 0:bb348c97df44 2055 }
lypinator 0:bb348c97df44 2056
lypinator 0:bb348c97df44 2057 break;
lypinator 0:bb348c97df44 2058 case DSI_TLPX_CLK:
lypinator 0:bb348c97df44 2059 /* Enable/Disable custom timing setting */
lypinator 0:bb348c97df44 2060 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TLPXCEN;
lypinator 0:bb348c97df44 2061 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 26U);
lypinator 0:bb348c97df44 2062
lypinator 0:bb348c97df44 2063 if(State != DISABLE)
lypinator 0:bb348c97df44 2064 {
lypinator 0:bb348c97df44 2065 /* Set custom value */
lypinator 0:bb348c97df44 2066 hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_TLPXC;
lypinator 0:bb348c97df44 2067 hdsi->Instance->WPCR[3U] |= (Value << 24U) & DSI_WPCR3_TLPXC;
lypinator 0:bb348c97df44 2068 }
lypinator 0:bb348c97df44 2069
lypinator 0:bb348c97df44 2070 break;
lypinator 0:bb348c97df44 2071 case DSI_THS_EXIT:
lypinator 0:bb348c97df44 2072 /* Enable/Disable custom timing setting */
lypinator 0:bb348c97df44 2073 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSEXITEN;
lypinator 0:bb348c97df44 2074 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 25U);
lypinator 0:bb348c97df44 2075
lypinator 0:bb348c97df44 2076 if(State != DISABLE)
lypinator 0:bb348c97df44 2077 {
lypinator 0:bb348c97df44 2078 /* Set custom value */
lypinator 0:bb348c97df44 2079 hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_THSEXIT;
lypinator 0:bb348c97df44 2080 hdsi->Instance->WPCR[3U] |= (Value << 16U) & DSI_WPCR3_THSEXIT;
lypinator 0:bb348c97df44 2081 }
lypinator 0:bb348c97df44 2082
lypinator 0:bb348c97df44 2083 break;
lypinator 0:bb348c97df44 2084 case DSI_TLPX_DATA:
lypinator 0:bb348c97df44 2085 /* Enable/Disable custom timing setting */
lypinator 0:bb348c97df44 2086 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TLPXDEN;
lypinator 0:bb348c97df44 2087 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 24U);
lypinator 0:bb348c97df44 2088
lypinator 0:bb348c97df44 2089 if(State != DISABLE)
lypinator 0:bb348c97df44 2090 {
lypinator 0:bb348c97df44 2091 /* Set custom value */
lypinator 0:bb348c97df44 2092 hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_TLPXD;
lypinator 0:bb348c97df44 2093 hdsi->Instance->WPCR[3U] |= (Value << 8U) & DSI_WPCR3_TLPXD;
lypinator 0:bb348c97df44 2094 }
lypinator 0:bb348c97df44 2095
lypinator 0:bb348c97df44 2096 break;
lypinator 0:bb348c97df44 2097 case DSI_THS_ZERO:
lypinator 0:bb348c97df44 2098 /* Enable/Disable custom timing setting */
lypinator 0:bb348c97df44 2099 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSZEROEN;
lypinator 0:bb348c97df44 2100 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 23U);
lypinator 0:bb348c97df44 2101
lypinator 0:bb348c97df44 2102 if(State != DISABLE)
lypinator 0:bb348c97df44 2103 {
lypinator 0:bb348c97df44 2104 /* Set custom value */
lypinator 0:bb348c97df44 2105 hdsi->Instance->WPCR[3U] &= ~DSI_WPCR3_THSZERO;
lypinator 0:bb348c97df44 2106 hdsi->Instance->WPCR[3U] |= Value & DSI_WPCR3_THSZERO;
lypinator 0:bb348c97df44 2107 }
lypinator 0:bb348c97df44 2108
lypinator 0:bb348c97df44 2109 break;
lypinator 0:bb348c97df44 2110 case DSI_THS_TRAIL:
lypinator 0:bb348c97df44 2111 /* Enable/Disable custom timing setting */
lypinator 0:bb348c97df44 2112 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSTRAILEN;
lypinator 0:bb348c97df44 2113 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 22U);
lypinator 0:bb348c97df44 2114
lypinator 0:bb348c97df44 2115 if(State != DISABLE)
lypinator 0:bb348c97df44 2116 {
lypinator 0:bb348c97df44 2117 /* Set custom value */
lypinator 0:bb348c97df44 2118 hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_THSTRAIL;
lypinator 0:bb348c97df44 2119 hdsi->Instance->WPCR[2U] |= (Value << 24U) & DSI_WPCR2_THSTRAIL;
lypinator 0:bb348c97df44 2120 }
lypinator 0:bb348c97df44 2121
lypinator 0:bb348c97df44 2122 break;
lypinator 0:bb348c97df44 2123 case DSI_THS_PREPARE:
lypinator 0:bb348c97df44 2124 /* Enable/Disable custom timing setting */
lypinator 0:bb348c97df44 2125 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_THSPREPEN;
lypinator 0:bb348c97df44 2126 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 21U);
lypinator 0:bb348c97df44 2127
lypinator 0:bb348c97df44 2128 if(State != DISABLE)
lypinator 0:bb348c97df44 2129 {
lypinator 0:bb348c97df44 2130 /* Set custom value */
lypinator 0:bb348c97df44 2131 hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_THSPREP;
lypinator 0:bb348c97df44 2132 hdsi->Instance->WPCR[2U] |= (Value << 16U) & DSI_WPCR2_THSPREP;
lypinator 0:bb348c97df44 2133 }
lypinator 0:bb348c97df44 2134
lypinator 0:bb348c97df44 2135 break;
lypinator 0:bb348c97df44 2136 case DSI_TCLK_ZERO:
lypinator 0:bb348c97df44 2137 /* Enable/Disable custom timing setting */
lypinator 0:bb348c97df44 2138 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKZEROEN;
lypinator 0:bb348c97df44 2139 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 20U);
lypinator 0:bb348c97df44 2140
lypinator 0:bb348c97df44 2141 if(State != DISABLE)
lypinator 0:bb348c97df44 2142 {
lypinator 0:bb348c97df44 2143 /* Set custom value */
lypinator 0:bb348c97df44 2144 hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_TCLKZERO;
lypinator 0:bb348c97df44 2145 hdsi->Instance->WPCR[2U] |= (Value << 8U) & DSI_WPCR2_TCLKZERO;
lypinator 0:bb348c97df44 2146 }
lypinator 0:bb348c97df44 2147
lypinator 0:bb348c97df44 2148 break;
lypinator 0:bb348c97df44 2149 case DSI_TCLK_PREPARE:
lypinator 0:bb348c97df44 2150 /* Enable/Disable custom timing setting */
lypinator 0:bb348c97df44 2151 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TCLKPREPEN;
lypinator 0:bb348c97df44 2152 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 19U);
lypinator 0:bb348c97df44 2153
lypinator 0:bb348c97df44 2154 if(State != DISABLE)
lypinator 0:bb348c97df44 2155 {
lypinator 0:bb348c97df44 2156 /* Set custom value */
lypinator 0:bb348c97df44 2157 hdsi->Instance->WPCR[2U] &= ~DSI_WPCR2_TCLKPREP;
lypinator 0:bb348c97df44 2158 hdsi->Instance->WPCR[2U] |= Value & DSI_WPCR2_TCLKPREP;
lypinator 0:bb348c97df44 2159 }
lypinator 0:bb348c97df44 2160
lypinator 0:bb348c97df44 2161 break;
lypinator 0:bb348c97df44 2162 default:
lypinator 0:bb348c97df44 2163 break;
lypinator 0:bb348c97df44 2164 }
lypinator 0:bb348c97df44 2165
lypinator 0:bb348c97df44 2166 /* Process unlocked */
lypinator 0:bb348c97df44 2167 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 2168
lypinator 0:bb348c97df44 2169 return HAL_OK;
lypinator 0:bb348c97df44 2170 }
lypinator 0:bb348c97df44 2171
lypinator 0:bb348c97df44 2172 /**
lypinator 0:bb348c97df44 2173 * @brief Force the Clock/Data Lane in TX Stop Mode
lypinator 0:bb348c97df44 2174 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2175 * the configuration information for the DSI.
lypinator 0:bb348c97df44 2176 * @param Lane select between clock or data lanes.
lypinator 0:bb348c97df44 2177 * This parameter can be any value of @ref DSI_Lane_Group
lypinator 0:bb348c97df44 2178 * @param State ENABLE or DISABLE
lypinator 0:bb348c97df44 2179 * @retval HAL status
lypinator 0:bb348c97df44 2180 */
lypinator 0:bb348c97df44 2181 HAL_StatusTypeDef HAL_DSI_ForceTXStopMode(DSI_HandleTypeDef *hdsi, uint32_t Lane, FunctionalState State)
lypinator 0:bb348c97df44 2182 {
lypinator 0:bb348c97df44 2183 /* Process locked */
lypinator 0:bb348c97df44 2184 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 2185
lypinator 0:bb348c97df44 2186 /* Check function parameters */
lypinator 0:bb348c97df44 2187 assert_param(IS_DSI_LANE_GROUP(Lane));
lypinator 0:bb348c97df44 2188 assert_param(IS_FUNCTIONAL_STATE(State));
lypinator 0:bb348c97df44 2189
lypinator 0:bb348c97df44 2190 if(Lane == DSI_CLOCK_LANE)
lypinator 0:bb348c97df44 2191 {
lypinator 0:bb348c97df44 2192 /* Force/Unforce the Clock Lane in TX Stop Mode */
lypinator 0:bb348c97df44 2193 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_FTXSMCL;
lypinator 0:bb348c97df44 2194 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 12U);
lypinator 0:bb348c97df44 2195 }
lypinator 0:bb348c97df44 2196 else if(Lane == DSI_DATA_LANES)
lypinator 0:bb348c97df44 2197 {
lypinator 0:bb348c97df44 2198 /* Force/Unforce the Data Lanes in TX Stop Mode */
lypinator 0:bb348c97df44 2199 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_FTXSMDL;
lypinator 0:bb348c97df44 2200 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 13U);
lypinator 0:bb348c97df44 2201 }
lypinator 0:bb348c97df44 2202 else
lypinator 0:bb348c97df44 2203 {
lypinator 0:bb348c97df44 2204 /* Process unlocked */
lypinator 0:bb348c97df44 2205 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 2206
lypinator 0:bb348c97df44 2207 return HAL_ERROR;
lypinator 0:bb348c97df44 2208 }
lypinator 0:bb348c97df44 2209
lypinator 0:bb348c97df44 2210 /* Process unlocked */
lypinator 0:bb348c97df44 2211 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 2212
lypinator 0:bb348c97df44 2213 return HAL_OK;
lypinator 0:bb348c97df44 2214 }
lypinator 0:bb348c97df44 2215
lypinator 0:bb348c97df44 2216 /**
lypinator 0:bb348c97df44 2217 * @brief Force LP Receiver in Low-Power Mode
lypinator 0:bb348c97df44 2218 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2219 * the configuration information for the DSI.
lypinator 0:bb348c97df44 2220 * @param State ENABLE or DISABLE
lypinator 0:bb348c97df44 2221 * @retval HAL status
lypinator 0:bb348c97df44 2222 */
lypinator 0:bb348c97df44 2223 HAL_StatusTypeDef HAL_DSI_ForceRXLowPower(DSI_HandleTypeDef *hdsi, FunctionalState State)
lypinator 0:bb348c97df44 2224 {
lypinator 0:bb348c97df44 2225 /* Process locked */
lypinator 0:bb348c97df44 2226 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 2227
lypinator 0:bb348c97df44 2228 /* Check function parameters */
lypinator 0:bb348c97df44 2229 assert_param(IS_FUNCTIONAL_STATE(State));
lypinator 0:bb348c97df44 2230
lypinator 0:bb348c97df44 2231 /* Force/Unforce LP Receiver in Low-Power Mode */
lypinator 0:bb348c97df44 2232 hdsi->Instance->WPCR[1U] &= ~DSI_WPCR1_FLPRXLPM;
lypinator 0:bb348c97df44 2233 hdsi->Instance->WPCR[1U] |= ((uint32_t)State << 22U);
lypinator 0:bb348c97df44 2234
lypinator 0:bb348c97df44 2235 /* Process unlocked */
lypinator 0:bb348c97df44 2236 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 2237
lypinator 0:bb348c97df44 2238 return HAL_OK;
lypinator 0:bb348c97df44 2239 }
lypinator 0:bb348c97df44 2240
lypinator 0:bb348c97df44 2241 /**
lypinator 0:bb348c97df44 2242 * @brief Force Data Lanes in RX Mode after a BTA
lypinator 0:bb348c97df44 2243 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2244 * the configuration information for the DSI.
lypinator 0:bb348c97df44 2245 * @param State ENABLE or DISABLE
lypinator 0:bb348c97df44 2246 * @retval HAL status
lypinator 0:bb348c97df44 2247 */
lypinator 0:bb348c97df44 2248 HAL_StatusTypeDef HAL_DSI_ForceDataLanesInRX(DSI_HandleTypeDef *hdsi, FunctionalState State)
lypinator 0:bb348c97df44 2249 {
lypinator 0:bb348c97df44 2250 /* Process locked */
lypinator 0:bb348c97df44 2251 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 2252
lypinator 0:bb348c97df44 2253 /* Check function parameters */
lypinator 0:bb348c97df44 2254 assert_param(IS_FUNCTIONAL_STATE(State));
lypinator 0:bb348c97df44 2255
lypinator 0:bb348c97df44 2256 /* Force Data Lanes in RX Mode */
lypinator 0:bb348c97df44 2257 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_TDDL;
lypinator 0:bb348c97df44 2258 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 16U);
lypinator 0:bb348c97df44 2259
lypinator 0:bb348c97df44 2260 /* Process unlocked */
lypinator 0:bb348c97df44 2261 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 2262
lypinator 0:bb348c97df44 2263 return HAL_OK;
lypinator 0:bb348c97df44 2264 }
lypinator 0:bb348c97df44 2265
lypinator 0:bb348c97df44 2266 /**
lypinator 0:bb348c97df44 2267 * @brief Enable a pull-down on the lanes to prevent from floating states when unused
lypinator 0:bb348c97df44 2268 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2269 * the configuration information for the DSI.
lypinator 0:bb348c97df44 2270 * @param State ENABLE or DISABLE
lypinator 0:bb348c97df44 2271 * @retval HAL status
lypinator 0:bb348c97df44 2272 */
lypinator 0:bb348c97df44 2273 HAL_StatusTypeDef HAL_DSI_SetPullDown(DSI_HandleTypeDef *hdsi, FunctionalState State)
lypinator 0:bb348c97df44 2274 {
lypinator 0:bb348c97df44 2275 /* Process locked */
lypinator 0:bb348c97df44 2276 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 2277
lypinator 0:bb348c97df44 2278 /* Check function parameters */
lypinator 0:bb348c97df44 2279 assert_param(IS_FUNCTIONAL_STATE(State));
lypinator 0:bb348c97df44 2280
lypinator 0:bb348c97df44 2281 /* Enable/Disable pull-down on lanes */
lypinator 0:bb348c97df44 2282 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_PDEN;
lypinator 0:bb348c97df44 2283 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 18U);
lypinator 0:bb348c97df44 2284
lypinator 0:bb348c97df44 2285 /* Process unlocked */
lypinator 0:bb348c97df44 2286 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 2287
lypinator 0:bb348c97df44 2288 return HAL_OK;
lypinator 0:bb348c97df44 2289 }
lypinator 0:bb348c97df44 2290
lypinator 0:bb348c97df44 2291 /**
lypinator 0:bb348c97df44 2292 * @brief Switch off the contention detection on data lanes
lypinator 0:bb348c97df44 2293 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2294 * the configuration information for the DSI.
lypinator 0:bb348c97df44 2295 * @param State ENABLE or DISABLE
lypinator 0:bb348c97df44 2296 * @retval HAL status
lypinator 0:bb348c97df44 2297 */
lypinator 0:bb348c97df44 2298 HAL_StatusTypeDef HAL_DSI_SetContentionDetectionOff(DSI_HandleTypeDef *hdsi, FunctionalState State)
lypinator 0:bb348c97df44 2299 {
lypinator 0:bb348c97df44 2300 /* Process locked */
lypinator 0:bb348c97df44 2301 __HAL_LOCK(hdsi);
lypinator 0:bb348c97df44 2302
lypinator 0:bb348c97df44 2303 /* Check function parameters */
lypinator 0:bb348c97df44 2304 assert_param(IS_FUNCTIONAL_STATE(State));
lypinator 0:bb348c97df44 2305
lypinator 0:bb348c97df44 2306 /* Contention Detection on Data Lanes OFF */
lypinator 0:bb348c97df44 2307 hdsi->Instance->WPCR[0U] &= ~DSI_WPCR0_CDOFFDL;
lypinator 0:bb348c97df44 2308 hdsi->Instance->WPCR[0U] |= ((uint32_t)State << 14U);
lypinator 0:bb348c97df44 2309
lypinator 0:bb348c97df44 2310 /* Process unlocked */
lypinator 0:bb348c97df44 2311 __HAL_UNLOCK(hdsi);
lypinator 0:bb348c97df44 2312
lypinator 0:bb348c97df44 2313 return HAL_OK;
lypinator 0:bb348c97df44 2314 }
lypinator 0:bb348c97df44 2315
lypinator 0:bb348c97df44 2316 /**
lypinator 0:bb348c97df44 2317 * @}
lypinator 0:bb348c97df44 2318 */
lypinator 0:bb348c97df44 2319
lypinator 0:bb348c97df44 2320 /** @defgroup DSI_Group4 Peripheral State and Errors functions
lypinator 0:bb348c97df44 2321 * @brief Peripheral State and Errors functions
lypinator 0:bb348c97df44 2322 *
lypinator 0:bb348c97df44 2323 @verbatim
lypinator 0:bb348c97df44 2324 ===============================================================================
lypinator 0:bb348c97df44 2325 ##### Peripheral State and Errors functions #####
lypinator 0:bb348c97df44 2326 ===============================================================================
lypinator 0:bb348c97df44 2327 [..]
lypinator 0:bb348c97df44 2328 This subsection provides functions allowing to
lypinator 0:bb348c97df44 2329 (+) Check the DSI state.
lypinator 0:bb348c97df44 2330 (+) Get error code.
lypinator 0:bb348c97df44 2331
lypinator 0:bb348c97df44 2332 @endverbatim
lypinator 0:bb348c97df44 2333 * @{
lypinator 0:bb348c97df44 2334 */
lypinator 0:bb348c97df44 2335
lypinator 0:bb348c97df44 2336 /**
lypinator 0:bb348c97df44 2337 * @brief Return the DSI state
lypinator 0:bb348c97df44 2338 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2339 * the configuration information for the DSI.
lypinator 0:bb348c97df44 2340 * @retval HAL state
lypinator 0:bb348c97df44 2341 */
lypinator 0:bb348c97df44 2342 HAL_DSI_StateTypeDef HAL_DSI_GetState(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 2343 {
lypinator 0:bb348c97df44 2344 return hdsi->State;
lypinator 0:bb348c97df44 2345 }
lypinator 0:bb348c97df44 2346
lypinator 0:bb348c97df44 2347 /**
lypinator 0:bb348c97df44 2348 * @brief Return the DSI error code
lypinator 0:bb348c97df44 2349 * @param hdsi pointer to a DSI_HandleTypeDef structure that contains
lypinator 0:bb348c97df44 2350 * the configuration information for the DSI.
lypinator 0:bb348c97df44 2351 * @retval DSI Error Code
lypinator 0:bb348c97df44 2352 */
lypinator 0:bb348c97df44 2353 uint32_t HAL_DSI_GetError(DSI_HandleTypeDef *hdsi)
lypinator 0:bb348c97df44 2354 {
lypinator 0:bb348c97df44 2355 /* Get the error code */
lypinator 0:bb348c97df44 2356 return hdsi->ErrorCode;
lypinator 0:bb348c97df44 2357 }
lypinator 0:bb348c97df44 2358
lypinator 0:bb348c97df44 2359 /**
lypinator 0:bb348c97df44 2360 * @}
lypinator 0:bb348c97df44 2361 */
lypinator 0:bb348c97df44 2362
lypinator 0:bb348c97df44 2363 /**
lypinator 0:bb348c97df44 2364 * @}
lypinator 0:bb348c97df44 2365 */
lypinator 0:bb348c97df44 2366
lypinator 0:bb348c97df44 2367 /**
lypinator 0:bb348c97df44 2368 * @}
lypinator 0:bb348c97df44 2369 */
lypinator 0:bb348c97df44 2370
lypinator 0:bb348c97df44 2371 #endif /* DSI */
lypinator 0:bb348c97df44 2372
lypinator 0:bb348c97df44 2373 #endif /* HAL_DSI_MODULE_ENABLED */
lypinator 0:bb348c97df44 2374
lypinator 0:bb348c97df44 2375 /**
lypinator 0:bb348c97df44 2376 * @}
lypinator 0:bb348c97df44 2377 */
lypinator 0:bb348c97df44 2378
lypinator 0:bb348c97df44 2379 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/