Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dma2d.h@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

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lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_dma2d.h
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief Header file of DMA2D HAL module.
lypinator 0:bb348c97df44 6 ******************************************************************************
lypinator 0:bb348c97df44 7 * @attention
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 10 *
lypinator 0:bb348c97df44 11 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 12 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 13 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 14 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 16 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 17 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 19 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 20 * without specific prior written permission.
lypinator 0:bb348c97df44 21 *
lypinator 0:bb348c97df44 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 32 *
lypinator 0:bb348c97df44 33 ******************************************************************************
lypinator 0:bb348c97df44 34 */
lypinator 0:bb348c97df44 35
lypinator 0:bb348c97df44 36 /* Define to prevent recursive inclusion -------------------------------------*/
lypinator 0:bb348c97df44 37 #ifndef __STM32F4xx_HAL_DMA2D_H
lypinator 0:bb348c97df44 38 #define __STM32F4xx_HAL_DMA2D_H
lypinator 0:bb348c97df44 39
lypinator 0:bb348c97df44 40 #ifdef __cplusplus
lypinator 0:bb348c97df44 41 extern "C" {
lypinator 0:bb348c97df44 42 #endif
lypinator 0:bb348c97df44 43
lypinator 0:bb348c97df44 44 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
lypinator 0:bb348c97df44 45 defined(STM32F469xx) || defined(STM32F479xx)
lypinator 0:bb348c97df44 46 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 47 #include "stm32f4xx_hal_def.h"
lypinator 0:bb348c97df44 48
lypinator 0:bb348c97df44 49 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 50 * @{
lypinator 0:bb348c97df44 51 */
lypinator 0:bb348c97df44 52
lypinator 0:bb348c97df44 53 /** @addtogroup DMA2D DMA2D
lypinator 0:bb348c97df44 54 * @brief DMA2D HAL module driver
lypinator 0:bb348c97df44 55 * @{
lypinator 0:bb348c97df44 56 */
lypinator 0:bb348c97df44 57
lypinator 0:bb348c97df44 58 /* Exported types ------------------------------------------------------------*/
lypinator 0:bb348c97df44 59 /** @defgroup DMA2D_Exported_Types DMA2D Exported Types
lypinator 0:bb348c97df44 60 * @{
lypinator 0:bb348c97df44 61 */
lypinator 0:bb348c97df44 62 #define MAX_DMA2D_LAYER 2U
lypinator 0:bb348c97df44 63
lypinator 0:bb348c97df44 64 /**
lypinator 0:bb348c97df44 65 * @brief DMA2D color Structure definition
lypinator 0:bb348c97df44 66 */
lypinator 0:bb348c97df44 67 typedef struct
lypinator 0:bb348c97df44 68 {
lypinator 0:bb348c97df44 69 uint32_t Blue; /*!< Configures the blue value.
lypinator 0:bb348c97df44 70 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
lypinator 0:bb348c97df44 71
lypinator 0:bb348c97df44 72 uint32_t Green; /*!< Configures the green value.
lypinator 0:bb348c97df44 73 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
lypinator 0:bb348c97df44 74
lypinator 0:bb348c97df44 75 uint32_t Red; /*!< Configures the red value.
lypinator 0:bb348c97df44 76 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. */
lypinator 0:bb348c97df44 77 } DMA2D_ColorTypeDef;
lypinator 0:bb348c97df44 78
lypinator 0:bb348c97df44 79 /**
lypinator 0:bb348c97df44 80 * @brief DMA2D CLUT Structure definition
lypinator 0:bb348c97df44 81 */
lypinator 0:bb348c97df44 82 typedef struct
lypinator 0:bb348c97df44 83 {
lypinator 0:bb348c97df44 84 uint32_t *pCLUT; /*!< Configures the DMA2D CLUT memory address.*/
lypinator 0:bb348c97df44 85
lypinator 0:bb348c97df44 86 uint32_t CLUTColorMode; /*!< Configures the DMA2D CLUT color mode.
lypinator 0:bb348c97df44 87 This parameter can be one value of @ref DMA2D_CLUT_CM. */
lypinator 0:bb348c97df44 88
lypinator 0:bb348c97df44 89 uint32_t Size; /*!< Configures the DMA2D CLUT size.
lypinator 0:bb348c97df44 90 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.*/
lypinator 0:bb348c97df44 91 } DMA2D_CLUTCfgTypeDef;
lypinator 0:bb348c97df44 92
lypinator 0:bb348c97df44 93 /**
lypinator 0:bb348c97df44 94 * @brief DMA2D Init structure definition
lypinator 0:bb348c97df44 95 */
lypinator 0:bb348c97df44 96 typedef struct
lypinator 0:bb348c97df44 97 {
lypinator 0:bb348c97df44 98 uint32_t Mode; /*!< Configures the DMA2D transfer mode.
lypinator 0:bb348c97df44 99 This parameter can be one value of @ref DMA2D_Mode. */
lypinator 0:bb348c97df44 100
lypinator 0:bb348c97df44 101 uint32_t ColorMode; /*!< Configures the color format of the output image.
lypinator 0:bb348c97df44 102 This parameter can be one value of @ref DMA2D_Output_Color_Mode. */
lypinator 0:bb348c97df44 103
lypinator 0:bb348c97df44 104 uint32_t OutputOffset; /*!< Specifies the Offset value.
lypinator 0:bb348c97df44 105 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
lypinator 0:bb348c97df44 106
lypinator 0:bb348c97df44 107 } DMA2D_InitTypeDef;
lypinator 0:bb348c97df44 108
lypinator 0:bb348c97df44 109 /**
lypinator 0:bb348c97df44 110 * @brief DMA2D Layer structure definition
lypinator 0:bb348c97df44 111 */
lypinator 0:bb348c97df44 112 typedef struct
lypinator 0:bb348c97df44 113 {
lypinator 0:bb348c97df44 114 uint32_t InputOffset; /*!< Configures the DMA2D foreground or background offset.
lypinator 0:bb348c97df44 115 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. */
lypinator 0:bb348c97df44 116
lypinator 0:bb348c97df44 117 uint32_t InputColorMode; /*!< Configures the DMA2D foreground or background color mode.
lypinator 0:bb348c97df44 118 This parameter can be one value of @ref DMA2D_Input_Color_Mode. */
lypinator 0:bb348c97df44 119
lypinator 0:bb348c97df44 120 uint32_t AlphaMode; /*!< Configures the DMA2D foreground or background alpha mode.
lypinator 0:bb348c97df44 121 This parameter can be one value of @ref DMA2D_Alpha_Mode. */
lypinator 0:bb348c97df44 122
lypinator 0:bb348c97df44 123 uint32_t InputAlpha; /*!< Specifies the DMA2D foreground or background alpha value and color value in case of A8 or A4 color mode.
lypinator 0:bb348c97df44 124 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF except for the color modes detailed below.
lypinator 0:bb348c97df44 125 @note In case of A8 or A4 color mode (ARGB), this parameter must be a number between
lypinator 0:bb348c97df44 126 Min_Data = 0x00000000 and Max_Data = 0xFFFFFFFF where
lypinator 0:bb348c97df44 127 - InputAlpha[24:31] is the alpha value ALPHA[0:7]
lypinator 0:bb348c97df44 128 - InputAlpha[16:23] is the red value RED[0:7]
lypinator 0:bb348c97df44 129 - InputAlpha[8:15] is the green value GREEN[0:7]
lypinator 0:bb348c97df44 130 - InputAlpha[0:7] is the blue value BLUE[0:7]. */
lypinator 0:bb348c97df44 131
lypinator 0:bb348c97df44 132 } DMA2D_LayerCfgTypeDef;
lypinator 0:bb348c97df44 133
lypinator 0:bb348c97df44 134 /**
lypinator 0:bb348c97df44 135 * @brief HAL DMA2D State structures definition
lypinator 0:bb348c97df44 136 */
lypinator 0:bb348c97df44 137 typedef enum
lypinator 0:bb348c97df44 138 {
lypinator 0:bb348c97df44 139 HAL_DMA2D_STATE_RESET = 0x00U, /*!< DMA2D not yet initialized or disabled */
lypinator 0:bb348c97df44 140 HAL_DMA2D_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
lypinator 0:bb348c97df44 141 HAL_DMA2D_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
lypinator 0:bb348c97df44 142 HAL_DMA2D_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
lypinator 0:bb348c97df44 143 HAL_DMA2D_STATE_ERROR = 0x04U, /*!< DMA2D state error */
lypinator 0:bb348c97df44 144 HAL_DMA2D_STATE_SUSPEND = 0x05U /*!< DMA2D process is suspended */
lypinator 0:bb348c97df44 145 }HAL_DMA2D_StateTypeDef;
lypinator 0:bb348c97df44 146
lypinator 0:bb348c97df44 147 /**
lypinator 0:bb348c97df44 148 * @brief DMA2D handle Structure definition
lypinator 0:bb348c97df44 149 */
lypinator 0:bb348c97df44 150 typedef struct __DMA2D_HandleTypeDef
lypinator 0:bb348c97df44 151 {
lypinator 0:bb348c97df44 152 DMA2D_TypeDef *Instance; /*!< DMA2D register base address. */
lypinator 0:bb348c97df44 153
lypinator 0:bb348c97df44 154 DMA2D_InitTypeDef Init; /*!< DMA2D communication parameters. */
lypinator 0:bb348c97df44 155
lypinator 0:bb348c97df44 156 void (* XferCpltCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer complete callback. */
lypinator 0:bb348c97df44 157
lypinator 0:bb348c97df44 158 void (* XferErrorCallback)(struct __DMA2D_HandleTypeDef * hdma2d); /*!< DMA2D transfer error callback. */
lypinator 0:bb348c97df44 159
lypinator 0:bb348c97df44 160 DMA2D_LayerCfgTypeDef LayerCfg[MAX_DMA2D_LAYER]; /*!< DMA2D Layers parameters */
lypinator 0:bb348c97df44 161
lypinator 0:bb348c97df44 162 HAL_LockTypeDef Lock; /*!< DMA2D lock. */
lypinator 0:bb348c97df44 163
lypinator 0:bb348c97df44 164 __IO HAL_DMA2D_StateTypeDef State; /*!< DMA2D transfer state. */
lypinator 0:bb348c97df44 165
lypinator 0:bb348c97df44 166 __IO uint32_t ErrorCode; /*!< DMA2D error code. */
lypinator 0:bb348c97df44 167 } DMA2D_HandleTypeDef;
lypinator 0:bb348c97df44 168 /**
lypinator 0:bb348c97df44 169 * @}
lypinator 0:bb348c97df44 170 */
lypinator 0:bb348c97df44 171
lypinator 0:bb348c97df44 172 /* Exported constants --------------------------------------------------------*/
lypinator 0:bb348c97df44 173 /** @defgroup DMA2D_Exported_Constants DMA2D Exported Constants
lypinator 0:bb348c97df44 174 * @{
lypinator 0:bb348c97df44 175 */
lypinator 0:bb348c97df44 176
lypinator 0:bb348c97df44 177 /** @defgroup DMA2D_Error_Code DMA2D Error Code
lypinator 0:bb348c97df44 178 * @{
lypinator 0:bb348c97df44 179 */
lypinator 0:bb348c97df44 180 #define HAL_DMA2D_ERROR_NONE 0x00000000U /*!< No error */
lypinator 0:bb348c97df44 181 #define HAL_DMA2D_ERROR_TE 0x00000001U /*!< Transfer error */
lypinator 0:bb348c97df44 182 #define HAL_DMA2D_ERROR_CE 0x00000002U /*!< Configuration error */
lypinator 0:bb348c97df44 183 #define HAL_DMA2D_ERROR_CAE 0x00000004U /*!< CLUT access error */
lypinator 0:bb348c97df44 184 #define HAL_DMA2D_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */
lypinator 0:bb348c97df44 185 /**
lypinator 0:bb348c97df44 186 * @}
lypinator 0:bb348c97df44 187 */
lypinator 0:bb348c97df44 188
lypinator 0:bb348c97df44 189 /** @defgroup DMA2D_Mode DMA2D Mode
lypinator 0:bb348c97df44 190 * @{
lypinator 0:bb348c97df44 191 */
lypinator 0:bb348c97df44 192 #define DMA2D_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
lypinator 0:bb348c97df44 193 #define DMA2D_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
lypinator 0:bb348c97df44 194 #define DMA2D_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
lypinator 0:bb348c97df44 195 #define DMA2D_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
lypinator 0:bb348c97df44 196 /**
lypinator 0:bb348c97df44 197 * @}
lypinator 0:bb348c97df44 198 */
lypinator 0:bb348c97df44 199
lypinator 0:bb348c97df44 200 /** @defgroup DMA2D_Output_Color_Mode DMA2D Output Color Mode
lypinator 0:bb348c97df44 201 * @{
lypinator 0:bb348c97df44 202 */
lypinator 0:bb348c97df44 203 #define DMA2D_OUTPUT_ARGB8888 0x00000000U /*!< ARGB8888 DMA2D color mode */
lypinator 0:bb348c97df44 204 #define DMA2D_OUTPUT_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 DMA2D color mode */
lypinator 0:bb348c97df44 205 #define DMA2D_OUTPUT_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 DMA2D color mode */
lypinator 0:bb348c97df44 206 #define DMA2D_OUTPUT_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 DMA2D color mode */
lypinator 0:bb348c97df44 207 #define DMA2D_OUTPUT_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 DMA2D color mode */
lypinator 0:bb348c97df44 208 /**
lypinator 0:bb348c97df44 209 * @}
lypinator 0:bb348c97df44 210 */
lypinator 0:bb348c97df44 211
lypinator 0:bb348c97df44 212 /** @defgroup DMA2D_Input_Color_Mode DMA2D Input Color Mode
lypinator 0:bb348c97df44 213 * @{
lypinator 0:bb348c97df44 214 */
lypinator 0:bb348c97df44 215 #define DMA2D_INPUT_ARGB8888 0x00000000U /*!< ARGB8888 color mode */
lypinator 0:bb348c97df44 216 #define DMA2D_INPUT_RGB888 0x00000001U /*!< RGB888 color mode */
lypinator 0:bb348c97df44 217 #define DMA2D_INPUT_RGB565 0x00000002U /*!< RGB565 color mode */
lypinator 0:bb348c97df44 218 #define DMA2D_INPUT_ARGB1555 0x00000003U /*!< ARGB1555 color mode */
lypinator 0:bb348c97df44 219 #define DMA2D_INPUT_ARGB4444 0x00000004U /*!< ARGB4444 color mode */
lypinator 0:bb348c97df44 220 #define DMA2D_INPUT_L8 0x00000005U /*!< L8 color mode */
lypinator 0:bb348c97df44 221 #define DMA2D_INPUT_AL44 0x00000006U /*!< AL44 color mode */
lypinator 0:bb348c97df44 222 #define DMA2D_INPUT_AL88 0x00000007U /*!< AL88 color mode */
lypinator 0:bb348c97df44 223 #define DMA2D_INPUT_L4 0x00000008U /*!< L4 color mode */
lypinator 0:bb348c97df44 224 #define DMA2D_INPUT_A8 0x00000009U /*!< A8 color mode */
lypinator 0:bb348c97df44 225 #define DMA2D_INPUT_A4 0x0000000AU /*!< A4 color mode */
lypinator 0:bb348c97df44 226 /**
lypinator 0:bb348c97df44 227 * @}
lypinator 0:bb348c97df44 228 */
lypinator 0:bb348c97df44 229
lypinator 0:bb348c97df44 230 /** @defgroup DMA2D_Alpha_Mode DMA2D Alpha Mode
lypinator 0:bb348c97df44 231 * @{
lypinator 0:bb348c97df44 232 */
lypinator 0:bb348c97df44 233 #define DMA2D_NO_MODIF_ALPHA 0x00000000U /*!< No modification of the alpha channel value */
lypinator 0:bb348c97df44 234 #define DMA2D_REPLACE_ALPHA 0x00000001U /*!< Replace original alpha channel value by programmed alpha value */
lypinator 0:bb348c97df44 235 #define DMA2D_COMBINE_ALPHA 0x00000002U /*!< Replace original alpha channel value by programmed alpha value
lypinator 0:bb348c97df44 236 with original alpha channel value */
lypinator 0:bb348c97df44 237 /**
lypinator 0:bb348c97df44 238 * @}
lypinator 0:bb348c97df44 239 */
lypinator 0:bb348c97df44 240
lypinator 0:bb348c97df44 241 /** @defgroup DMA2D_CLUT_CM DMA2D CLUT Color Mode
lypinator 0:bb348c97df44 242 * @{
lypinator 0:bb348c97df44 243 */
lypinator 0:bb348c97df44 244 #define DMA2D_CCM_ARGB8888 0x00000000U /*!< ARGB8888 DMA2D CLUT color mode */
lypinator 0:bb348c97df44 245 #define DMA2D_CCM_RGB888 0x00000001U /*!< RGB888 DMA2D CLUT color mode */
lypinator 0:bb348c97df44 246 /**
lypinator 0:bb348c97df44 247 * @}
lypinator 0:bb348c97df44 248 */
lypinator 0:bb348c97df44 249
lypinator 0:bb348c97df44 250 /** @defgroup DMA2D_Interrupts DMA2D Interrupts
lypinator 0:bb348c97df44 251 * @{
lypinator 0:bb348c97df44 252 */
lypinator 0:bb348c97df44 253 #define DMA2D_IT_CE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
lypinator 0:bb348c97df44 254 #define DMA2D_IT_CTC DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
lypinator 0:bb348c97df44 255 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
lypinator 0:bb348c97df44 256 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
lypinator 0:bb348c97df44 257 #define DMA2D_IT_TC DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
lypinator 0:bb348c97df44 258 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
lypinator 0:bb348c97df44 259 /**
lypinator 0:bb348c97df44 260 * @}
lypinator 0:bb348c97df44 261 */
lypinator 0:bb348c97df44 262
lypinator 0:bb348c97df44 263 /** @defgroup DMA2D_Flags DMA2D Flags
lypinator 0:bb348c97df44 264 * @{
lypinator 0:bb348c97df44 265 */
lypinator 0:bb348c97df44 266 #define DMA2D_FLAG_CE DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
lypinator 0:bb348c97df44 267 #define DMA2D_FLAG_CTC DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
lypinator 0:bb348c97df44 268 #define DMA2D_FLAG_CAE DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
lypinator 0:bb348c97df44 269 #define DMA2D_FLAG_TW DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
lypinator 0:bb348c97df44 270 #define DMA2D_FLAG_TC DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
lypinator 0:bb348c97df44 271 #define DMA2D_FLAG_TE DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
lypinator 0:bb348c97df44 272 /**
lypinator 0:bb348c97df44 273 * @}
lypinator 0:bb348c97df44 274 */
lypinator 0:bb348c97df44 275
lypinator 0:bb348c97df44 276 /** @defgroup DMA2D_Aliases DMA2D API Aliases
lypinator 0:bb348c97df44 277 * @{
lypinator 0:bb348c97df44 278 */
lypinator 0:bb348c97df44 279 #define HAL_DMA2D_DisableCLUT HAL_DMA2D_CLUTLoading_Abort /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort for compatibility with legacy code */
lypinator 0:bb348c97df44 280 /**
lypinator 0:bb348c97df44 281 * @}
lypinator 0:bb348c97df44 282 */
lypinator 0:bb348c97df44 283
lypinator 0:bb348c97df44 284 /**
lypinator 0:bb348c97df44 285 * @}
lypinator 0:bb348c97df44 286 */
lypinator 0:bb348c97df44 287 /* Exported macros ------------------------------------------------------------*/
lypinator 0:bb348c97df44 288 /** @defgroup DMA2D_Exported_Macros DMA2D Exported Macros
lypinator 0:bb348c97df44 289 * @{
lypinator 0:bb348c97df44 290 */
lypinator 0:bb348c97df44 291
lypinator 0:bb348c97df44 292 /** @brief Reset DMA2D handle state
lypinator 0:bb348c97df44 293 * @param __HANDLE__ specifies the DMA2D handle.
lypinator 0:bb348c97df44 294 * @retval None
lypinator 0:bb348c97df44 295 */
lypinator 0:bb348c97df44 296 #define __HAL_DMA2D_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA2D_STATE_RESET)
lypinator 0:bb348c97df44 297
lypinator 0:bb348c97df44 298 /**
lypinator 0:bb348c97df44 299 * @brief Enable the DMA2D.
lypinator 0:bb348c97df44 300 * @param __HANDLE__ DMA2D handle
lypinator 0:bb348c97df44 301 * @retval None.
lypinator 0:bb348c97df44 302 */
lypinator 0:bb348c97df44 303 #define __HAL_DMA2D_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DMA2D_CR_START)
lypinator 0:bb348c97df44 304
lypinator 0:bb348c97df44 305 /* Interrupt & Flag management */
lypinator 0:bb348c97df44 306 /**
lypinator 0:bb348c97df44 307 * @brief Get the DMA2D pending flags.
lypinator 0:bb348c97df44 308 * @param __HANDLE__ DMA2D handle
lypinator 0:bb348c97df44 309 * @param __FLAG__ flag to check.
lypinator 0:bb348c97df44 310 * This parameter can be any combination of the following values:
lypinator 0:bb348c97df44 311 * @arg DMA2D_FLAG_CE: Configuration error flag
lypinator 0:bb348c97df44 312 * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
lypinator 0:bb348c97df44 313 * @arg DMA2D_FLAG_CAE: CLUT access error flag
lypinator 0:bb348c97df44 314 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
lypinator 0:bb348c97df44 315 * @arg DMA2D_FLAG_TC: Transfer complete flag
lypinator 0:bb348c97df44 316 * @arg DMA2D_FLAG_TE: Transfer error flag
lypinator 0:bb348c97df44 317 * @retval The state of FLAG.
lypinator 0:bb348c97df44 318 */
lypinator 0:bb348c97df44 319 #define __HAL_DMA2D_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__))
lypinator 0:bb348c97df44 320
lypinator 0:bb348c97df44 321 /**
lypinator 0:bb348c97df44 322 * @brief Clear the DMA2D pending flags.
lypinator 0:bb348c97df44 323 * @param __HANDLE__ DMA2D handle
lypinator 0:bb348c97df44 324 * @param __FLAG__ specifies the flag to clear.
lypinator 0:bb348c97df44 325 * This parameter can be any combination of the following values:
lypinator 0:bb348c97df44 326 * @arg DMA2D_FLAG_CE: Configuration error flag
lypinator 0:bb348c97df44 327 * @arg DMA2D_FLAG_CTC: CLUT transfer complete flag
lypinator 0:bb348c97df44 328 * @arg DMA2D_FLAG_CAE: CLUT access error flag
lypinator 0:bb348c97df44 329 * @arg DMA2D_FLAG_TW: Transfer Watermark flag
lypinator 0:bb348c97df44 330 * @arg DMA2D_FLAG_TC: Transfer complete flag
lypinator 0:bb348c97df44 331 * @arg DMA2D_FLAG_TE: Transfer error flag
lypinator 0:bb348c97df44 332 * @retval None
lypinator 0:bb348c97df44 333 */
lypinator 0:bb348c97df44 334 #define __HAL_DMA2D_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->IFCR = (__FLAG__))
lypinator 0:bb348c97df44 335
lypinator 0:bb348c97df44 336 /**
lypinator 0:bb348c97df44 337 * @brief Enable the specified DMA2D interrupts.
lypinator 0:bb348c97df44 338 * @param __HANDLE__ DMA2D handle
lypinator 0:bb348c97df44 339 * @param __INTERRUPT__ specifies the DMA2D interrupt sources to be enabled.
lypinator 0:bb348c97df44 340 * This parameter can be any combination of the following values:
lypinator 0:bb348c97df44 341 * @arg DMA2D_IT_CE: Configuration error interrupt mask
lypinator 0:bb348c97df44 342 * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
lypinator 0:bb348c97df44 343 * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
lypinator 0:bb348c97df44 344 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
lypinator 0:bb348c97df44 345 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
lypinator 0:bb348c97df44 346 * @arg DMA2D_IT_TE: Transfer error interrupt mask
lypinator 0:bb348c97df44 347 * @retval None
lypinator 0:bb348c97df44 348 */
lypinator 0:bb348c97df44 349 #define __HAL_DMA2D_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__))
lypinator 0:bb348c97df44 350
lypinator 0:bb348c97df44 351 /**
lypinator 0:bb348c97df44 352 * @brief Disable the specified DMA2D interrupts.
lypinator 0:bb348c97df44 353 * @param __HANDLE__ DMA2D handle
lypinator 0:bb348c97df44 354 * @param __INTERRUPT__ specifies the DMA2D interrupt sources to be disabled.
lypinator 0:bb348c97df44 355 * This parameter can be any combination of the following values:
lypinator 0:bb348c97df44 356 * @arg DMA2D_IT_CE: Configuration error interrupt mask
lypinator 0:bb348c97df44 357 * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
lypinator 0:bb348c97df44 358 * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
lypinator 0:bb348c97df44 359 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
lypinator 0:bb348c97df44 360 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
lypinator 0:bb348c97df44 361 * @arg DMA2D_IT_TE: Transfer error interrupt mask
lypinator 0:bb348c97df44 362 * @retval None
lypinator 0:bb348c97df44 363 */
lypinator 0:bb348c97df44 364 #define __HAL_DMA2D_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__))
lypinator 0:bb348c97df44 365
lypinator 0:bb348c97df44 366 /**
lypinator 0:bb348c97df44 367 * @brief Check whether the specified DMA2D interrupt source is enabled or not.
lypinator 0:bb348c97df44 368 * @param __HANDLE__ DMA2D handle
lypinator 0:bb348c97df44 369 * @param __INTERRUPT__ specifies the DMA2D interrupt source to check.
lypinator 0:bb348c97df44 370 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 371 * @arg DMA2D_IT_CE: Configuration error interrupt mask
lypinator 0:bb348c97df44 372 * @arg DMA2D_IT_CTC: CLUT transfer complete interrupt mask
lypinator 0:bb348c97df44 373 * @arg DMA2D_IT_CAE: CLUT access error interrupt mask
lypinator 0:bb348c97df44 374 * @arg DMA2D_IT_TW: Transfer Watermark interrupt mask
lypinator 0:bb348c97df44 375 * @arg DMA2D_IT_TC: Transfer complete interrupt mask
lypinator 0:bb348c97df44 376 * @arg DMA2D_IT_TE: Transfer error interrupt mask
lypinator 0:bb348c97df44 377 * @retval The state of INTERRUPT source.
lypinator 0:bb348c97df44 378 */
lypinator 0:bb348c97df44 379 #define __HAL_DMA2D_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR & (__INTERRUPT__))
lypinator 0:bb348c97df44 380
lypinator 0:bb348c97df44 381 /**
lypinator 0:bb348c97df44 382 * @}
lypinator 0:bb348c97df44 383 */
lypinator 0:bb348c97df44 384
lypinator 0:bb348c97df44 385 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 386 /** @addtogroup DMA2D_Exported_Functions DMA2D Exported Functions
lypinator 0:bb348c97df44 387 * @{
lypinator 0:bb348c97df44 388 */
lypinator 0:bb348c97df44 389
lypinator 0:bb348c97df44 390 /** @addtogroup DMA2D_Exported_Functions_Group1 Initialization and de-initialization functions
lypinator 0:bb348c97df44 391 * @{
lypinator 0:bb348c97df44 392 */
lypinator 0:bb348c97df44 393
lypinator 0:bb348c97df44 394 /* Initialization and de-initialization functions *******************************/
lypinator 0:bb348c97df44 395 HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 396 HAL_StatusTypeDef HAL_DMA2D_DeInit (DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 397 void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d);
lypinator 0:bb348c97df44 398 void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d);
lypinator 0:bb348c97df44 399
lypinator 0:bb348c97df44 400 /**
lypinator 0:bb348c97df44 401 * @}
lypinator 0:bb348c97df44 402 */
lypinator 0:bb348c97df44 403
lypinator 0:bb348c97df44 404 /** @addtogroup DMA2D_Exported_Functions_Group2 IO operation functions
lypinator 0:bb348c97df44 405 * @{
lypinator 0:bb348c97df44 406 */
lypinator 0:bb348c97df44 407
lypinator 0:bb348c97df44 408 /* IO operation functions *******************************************************/
lypinator 0:bb348c97df44 409 HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
lypinator 0:bb348c97df44 410 HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
lypinator 0:bb348c97df44 411 HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
lypinator 0:bb348c97df44 412 HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height);
lypinator 0:bb348c97df44 413 HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 414 HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 415 HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 416 HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
lypinator 0:bb348c97df44 417 HAL_StatusTypeDef HAL_DMA2D_CLUTLoad(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
lypinator 0:bb348c97df44 418 HAL_StatusTypeDef HAL_DMA2D_CLUTLoad_IT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
lypinator 0:bb348c97df44 419 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Abort(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
lypinator 0:bb348c97df44 420 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Suspend(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
lypinator 0:bb348c97df44 421 HAL_StatusTypeDef HAL_DMA2D_CLUTLoading_Resume(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
lypinator 0:bb348c97df44 422 HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout);
lypinator 0:bb348c97df44 423 void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 424 void HAL_DMA2D_LineEventCallback(DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 425 void HAL_DMA2D_CLUTLoadingCpltCallback(DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 426
lypinator 0:bb348c97df44 427 /**
lypinator 0:bb348c97df44 428 * @}
lypinator 0:bb348c97df44 429 */
lypinator 0:bb348c97df44 430
lypinator 0:bb348c97df44 431 /** @addtogroup DMA2D_Exported_Functions_Group3 Peripheral Control functions
lypinator 0:bb348c97df44 432 * @{
lypinator 0:bb348c97df44 433 */
lypinator 0:bb348c97df44 434
lypinator 0:bb348c97df44 435 /* Peripheral Control functions *************************************************/
lypinator 0:bb348c97df44 436 HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx);
lypinator 0:bb348c97df44 437 HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx);
lypinator 0:bb348c97df44 438 HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line);
lypinator 0:bb348c97df44 439 HAL_StatusTypeDef HAL_DMA2D_EnableDeadTime(DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 440 HAL_StatusTypeDef HAL_DMA2D_DisableDeadTime(DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 441 HAL_StatusTypeDef HAL_DMA2D_ConfigDeadTime(DMA2D_HandleTypeDef *hdma2d, uint8_t DeadTime);
lypinator 0:bb348c97df44 442
lypinator 0:bb348c97df44 443 /**
lypinator 0:bb348c97df44 444 * @}
lypinator 0:bb348c97df44 445 */
lypinator 0:bb348c97df44 446
lypinator 0:bb348c97df44 447 /** @addtogroup DMA2D_Exported_Functions_Group4 Peripheral State and Error functions
lypinator 0:bb348c97df44 448 * @{
lypinator 0:bb348c97df44 449 */
lypinator 0:bb348c97df44 450
lypinator 0:bb348c97df44 451 /* Peripheral State functions ***************************************************/
lypinator 0:bb348c97df44 452 HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 453 uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d);
lypinator 0:bb348c97df44 454
lypinator 0:bb348c97df44 455 /**
lypinator 0:bb348c97df44 456 * @}
lypinator 0:bb348c97df44 457 */
lypinator 0:bb348c97df44 458
lypinator 0:bb348c97df44 459 /**
lypinator 0:bb348c97df44 460 * @}
lypinator 0:bb348c97df44 461 */
lypinator 0:bb348c97df44 462
lypinator 0:bb348c97df44 463 /* Private constants ---------------------------------------------------------*/
lypinator 0:bb348c97df44 464
lypinator 0:bb348c97df44 465 /** @addtogroup DMA2D_Private_Constants DMA2D Private Constants
lypinator 0:bb348c97df44 466 * @{
lypinator 0:bb348c97df44 467 */
lypinator 0:bb348c97df44 468
lypinator 0:bb348c97df44 469 /** @defgroup DMA2D_Maximum_Line_WaterMark DMA2D Maximum Line Watermark
lypinator 0:bb348c97df44 470 * @{
lypinator 0:bb348c97df44 471 */
lypinator 0:bb348c97df44 472 #define DMA2D_LINE_WATERMARK_MAX DMA2D_LWR_LW /*!< DMA2D maximum line watermark */
lypinator 0:bb348c97df44 473 /**
lypinator 0:bb348c97df44 474 * @}
lypinator 0:bb348c97df44 475 */
lypinator 0:bb348c97df44 476
lypinator 0:bb348c97df44 477 /** @defgroup DMA2D_Color_Value DMA2D Color Value
lypinator 0:bb348c97df44 478 * @{
lypinator 0:bb348c97df44 479 */
lypinator 0:bb348c97df44 480 #define DMA2D_COLOR_VALUE 0x000000FFU /*!< Color value mask */
lypinator 0:bb348c97df44 481 /**
lypinator 0:bb348c97df44 482 * @}
lypinator 0:bb348c97df44 483 */
lypinator 0:bb348c97df44 484
lypinator 0:bb348c97df44 485 /** @defgroup DMA2D_Max_Layer DMA2D Maximum Number of Layers
lypinator 0:bb348c97df44 486 * @{
lypinator 0:bb348c97df44 487 */
lypinator 0:bb348c97df44 488 #define DMA2D_MAX_LAYER 2U /*!< DMA2D maximum number of layers */
lypinator 0:bb348c97df44 489 /**
lypinator 0:bb348c97df44 490 * @}
lypinator 0:bb348c97df44 491 */
lypinator 0:bb348c97df44 492
lypinator 0:bb348c97df44 493 /** @defgroup DMA2D_Offset DMA2D Offset
lypinator 0:bb348c97df44 494 * @{
lypinator 0:bb348c97df44 495 */
lypinator 0:bb348c97df44 496 #define DMA2D_OFFSET DMA2D_FGOR_LO /*!< Line Offset */
lypinator 0:bb348c97df44 497 /**
lypinator 0:bb348c97df44 498 * @}
lypinator 0:bb348c97df44 499 */
lypinator 0:bb348c97df44 500
lypinator 0:bb348c97df44 501 /** @defgroup DMA2D_Size DMA2D Size
lypinator 0:bb348c97df44 502 * @{
lypinator 0:bb348c97df44 503 */
lypinator 0:bb348c97df44 504 #define DMA2D_PIXEL (DMA2D_NLR_PL >> 16U) /*!< DMA2D number of pixels per line */
lypinator 0:bb348c97df44 505 #define DMA2D_LINE DMA2D_NLR_NL /*!< DMA2D number of lines */
lypinator 0:bb348c97df44 506 /**
lypinator 0:bb348c97df44 507 * @}
lypinator 0:bb348c97df44 508 */
lypinator 0:bb348c97df44 509
lypinator 0:bb348c97df44 510 /** @defgroup DMA2D_CLUT_Size DMA2D CLUT Size
lypinator 0:bb348c97df44 511 * @{
lypinator 0:bb348c97df44 512 */
lypinator 0:bb348c97df44 513 #define DMA2D_CLUT_SIZE (DMA2D_FGPFCCR_CS >> 8U) /*!< DMA2D CLUT size */
lypinator 0:bb348c97df44 514 /**
lypinator 0:bb348c97df44 515 * @}
lypinator 0:bb348c97df44 516 */
lypinator 0:bb348c97df44 517
lypinator 0:bb348c97df44 518 /**
lypinator 0:bb348c97df44 519 * @}
lypinator 0:bb348c97df44 520 */
lypinator 0:bb348c97df44 521
lypinator 0:bb348c97df44 522 /* Private macros ------------------------------------------------------------*/
lypinator 0:bb348c97df44 523 /** @defgroup DMA2D_Private_Macros DMA2D Private Macros
lypinator 0:bb348c97df44 524 * @{
lypinator 0:bb348c97df44 525 */
lypinator 0:bb348c97df44 526 #define IS_DMA2D_LAYER(LAYER) ((LAYER) <= DMA2D_MAX_LAYER)
lypinator 0:bb348c97df44 527 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
lypinator 0:bb348c97df44 528 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
lypinator 0:bb348c97df44 529 #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_OUTPUT_ARGB8888) || ((MODE_ARGB) == DMA2D_OUTPUT_RGB888) || \
lypinator 0:bb348c97df44 530 ((MODE_ARGB) == DMA2D_OUTPUT_RGB565) || ((MODE_ARGB) == DMA2D_OUTPUT_ARGB1555) || \
lypinator 0:bb348c97df44 531 ((MODE_ARGB) == DMA2D_OUTPUT_ARGB4444))
lypinator 0:bb348c97df44 532 #define IS_DMA2D_COLOR(COLOR) ((COLOR) <= DMA2D_COLOR_VALUE)
lypinator 0:bb348c97df44 533 #define IS_DMA2D_LINE(LINE) ((LINE) <= DMA2D_LINE)
lypinator 0:bb348c97df44 534 #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_PIXEL)
lypinator 0:bb348c97df44 535 #define IS_DMA2D_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OFFSET)
lypinator 0:bb348c97df44 536 #define IS_DMA2D_INPUT_COLOR_MODE(INPUT_CM) (((INPUT_CM) == DMA2D_INPUT_ARGB8888) || ((INPUT_CM) == DMA2D_INPUT_RGB888) || \
lypinator 0:bb348c97df44 537 ((INPUT_CM) == DMA2D_INPUT_RGB565) || ((INPUT_CM) == DMA2D_INPUT_ARGB1555) || \
lypinator 0:bb348c97df44 538 ((INPUT_CM) == DMA2D_INPUT_ARGB4444) || ((INPUT_CM) == DMA2D_INPUT_L8) || \
lypinator 0:bb348c97df44 539 ((INPUT_CM) == DMA2D_INPUT_AL44) || ((INPUT_CM) == DMA2D_INPUT_AL88) || \
lypinator 0:bb348c97df44 540 ((INPUT_CM) == DMA2D_INPUT_L4) || ((INPUT_CM) == DMA2D_INPUT_A8) || \
lypinator 0:bb348c97df44 541 ((INPUT_CM) == DMA2D_INPUT_A4))
lypinator 0:bb348c97df44 542 #define IS_DMA2D_ALPHA_MODE(AlphaMode) (((AlphaMode) == DMA2D_NO_MODIF_ALPHA) || \
lypinator 0:bb348c97df44 543 ((AlphaMode) == DMA2D_REPLACE_ALPHA) || \
lypinator 0:bb348c97df44 544 ((AlphaMode) == DMA2D_COMBINE_ALPHA))
lypinator 0:bb348c97df44 545
lypinator 0:bb348c97df44 546 #define IS_DMA2D_CLUT_CM(CLUT_CM) (((CLUT_CM) == DMA2D_CCM_ARGB8888) || ((CLUT_CM) == DMA2D_CCM_RGB888))
lypinator 0:bb348c97df44 547 #define IS_DMA2D_CLUT_SIZE(CLUT_SIZE) ((CLUT_SIZE) <= DMA2D_CLUT_SIZE)
lypinator 0:bb348c97df44 548 #define IS_DMA2D_LINEWATERMARK(LineWatermark) ((LineWatermark) <= DMA2D_LINE_WATERMARK_MAX)
lypinator 0:bb348c97df44 549 #define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
lypinator 0:bb348c97df44 550 ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
lypinator 0:bb348c97df44 551 ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
lypinator 0:bb348c97df44 552 #define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
lypinator 0:bb348c97df44 553 ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \
lypinator 0:bb348c97df44 554 ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE))
lypinator 0:bb348c97df44 555 /**
lypinator 0:bb348c97df44 556 * @}
lypinator 0:bb348c97df44 557 */
lypinator 0:bb348c97df44 558
lypinator 0:bb348c97df44 559 /**
lypinator 0:bb348c97df44 560 * @}
lypinator 0:bb348c97df44 561 */
lypinator 0:bb348c97df44 562
lypinator 0:bb348c97df44 563 /**
lypinator 0:bb348c97df44 564 * @}
lypinator 0:bb348c97df44 565 */
lypinator 0:bb348c97df44 566
lypinator 0:bb348c97df44 567 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
lypinator 0:bb348c97df44 568
lypinator 0:bb348c97df44 569 #ifdef __cplusplus
lypinator 0:bb348c97df44 570 }
lypinator 0:bb348c97df44 571 #endif
lypinator 0:bb348c97df44 572
lypinator 0:bb348c97df44 573 #endif /* __STM32F4xx_HAL_DMA2D_H */
lypinator 0:bb348c97df44 574
lypinator 0:bb348c97df44 575 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/