Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dfsdm.h@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

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lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_dfsdm.h
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief Header file of DFSDM HAL module.
lypinator 0:bb348c97df44 6 ******************************************************************************
lypinator 0:bb348c97df44 7 * @attention
lypinator 0:bb348c97df44 8 *
lypinator 0:bb348c97df44 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 10 *
lypinator 0:bb348c97df44 11 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 12 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 13 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 14 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 16 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 17 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 19 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 20 * without specific prior written permission.
lypinator 0:bb348c97df44 21 *
lypinator 0:bb348c97df44 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 32 *
lypinator 0:bb348c97df44 33 ******************************************************************************
lypinator 0:bb348c97df44 34 */
lypinator 0:bb348c97df44 35
lypinator 0:bb348c97df44 36 /* Define to prevent recursive inclusion -------------------------------------*/
lypinator 0:bb348c97df44 37 #ifndef __STM32F4xx_HAL_DFSDM_H
lypinator 0:bb348c97df44 38 #define __STM32F4xx_HAL_DFSDM_H
lypinator 0:bb348c97df44 39
lypinator 0:bb348c97df44 40 #ifdef __cplusplus
lypinator 0:bb348c97df44 41 extern "C" {
lypinator 0:bb348c97df44 42 #endif
lypinator 0:bb348c97df44 43
lypinator 0:bb348c97df44 44 #if defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
lypinator 0:bb348c97df44 45 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 46 #include "stm32f4xx_hal_def.h"
lypinator 0:bb348c97df44 47
lypinator 0:bb348c97df44 48 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 49 * @{
lypinator 0:bb348c97df44 50 */
lypinator 0:bb348c97df44 51
lypinator 0:bb348c97df44 52 /** @addtogroup DFSDM
lypinator 0:bb348c97df44 53 * @{
lypinator 0:bb348c97df44 54 */
lypinator 0:bb348c97df44 55
lypinator 0:bb348c97df44 56 /* Exported types ------------------------------------------------------------*/
lypinator 0:bb348c97df44 57 /** @defgroup DFSDM_Exported_Types DFSDM Exported Types
lypinator 0:bb348c97df44 58 * @{
lypinator 0:bb348c97df44 59 */
lypinator 0:bb348c97df44 60
lypinator 0:bb348c97df44 61 /**
lypinator 0:bb348c97df44 62 * @brief HAL DFSDM Channel states definition
lypinator 0:bb348c97df44 63 */
lypinator 0:bb348c97df44 64 typedef enum
lypinator 0:bb348c97df44 65 {
lypinator 0:bb348c97df44 66 HAL_DFSDM_CHANNEL_STATE_RESET = 0x00U, /*!< DFSDM channel not initialized */
lypinator 0:bb348c97df44 67 HAL_DFSDM_CHANNEL_STATE_READY = 0x01U, /*!< DFSDM channel initialized and ready for use */
lypinator 0:bb348c97df44 68 HAL_DFSDM_CHANNEL_STATE_ERROR = 0xFFU /*!< DFSDM channel state error */
lypinator 0:bb348c97df44 69 }HAL_DFSDM_Channel_StateTypeDef;
lypinator 0:bb348c97df44 70
lypinator 0:bb348c97df44 71 /**
lypinator 0:bb348c97df44 72 * @brief DFSDM channel output clock structure definition
lypinator 0:bb348c97df44 73 */
lypinator 0:bb348c97df44 74 typedef struct
lypinator 0:bb348c97df44 75 {
lypinator 0:bb348c97df44 76 FunctionalState Activation; /*!< Output clock enable/disable */
lypinator 0:bb348c97df44 77 uint32_t Selection; /*!< Output clock is system clock or audio clock.
lypinator 0:bb348c97df44 78 This parameter can be a value of @ref DFSDM_Channel_OuputClock */
lypinator 0:bb348c97df44 79 uint32_t Divider; /*!< Output clock divider.
lypinator 0:bb348c97df44 80 This parameter must be a number between Min_Data = 2 and Max_Data = 256 */
lypinator 0:bb348c97df44 81 }DFSDM_Channel_OutputClockTypeDef;
lypinator 0:bb348c97df44 82
lypinator 0:bb348c97df44 83 /**
lypinator 0:bb348c97df44 84 * @brief DFSDM channel input structure definition
lypinator 0:bb348c97df44 85 */
lypinator 0:bb348c97df44 86 typedef struct
lypinator 0:bb348c97df44 87 {
lypinator 0:bb348c97df44 88 uint32_t Multiplexer; /*!< Input is external serial inputs or internal register.
lypinator 0:bb348c97df44 89 This parameter can be a value of @ref DFSDM_Channel_InputMultiplexer */
lypinator 0:bb348c97df44 90 uint32_t DataPacking; /*!< Standard, interleaved or dual mode for internal register.
lypinator 0:bb348c97df44 91 This parameter can be a value of @ref DFSDM_Channel_DataPacking */
lypinator 0:bb348c97df44 92 uint32_t Pins; /*!< Input pins are taken from same or following channel.
lypinator 0:bb348c97df44 93 This parameter can be a value of @ref DFSDM_Channel_InputPins */
lypinator 0:bb348c97df44 94 }DFSDM_Channel_InputTypeDef;
lypinator 0:bb348c97df44 95
lypinator 0:bb348c97df44 96 /**
lypinator 0:bb348c97df44 97 * @brief DFSDM channel serial interface structure definition
lypinator 0:bb348c97df44 98 */
lypinator 0:bb348c97df44 99 typedef struct
lypinator 0:bb348c97df44 100 {
lypinator 0:bb348c97df44 101 uint32_t Type; /*!< SPI or Manchester modes.
lypinator 0:bb348c97df44 102 This parameter can be a value of @ref DFSDM_Channel_SerialInterfaceType */
lypinator 0:bb348c97df44 103 uint32_t SpiClock; /*!< SPI clock select (external or internal with different sampling point).
lypinator 0:bb348c97df44 104 This parameter can be a value of @ref DFSDM_Channel_SpiClock */
lypinator 0:bb348c97df44 105 }DFSDM_Channel_SerialInterfaceTypeDef;
lypinator 0:bb348c97df44 106
lypinator 0:bb348c97df44 107 /**
lypinator 0:bb348c97df44 108 * @brief DFSDM channel analog watchdog structure definition
lypinator 0:bb348c97df44 109 */
lypinator 0:bb348c97df44 110 typedef struct
lypinator 0:bb348c97df44 111 {
lypinator 0:bb348c97df44 112 uint32_t FilterOrder; /*!< Analog watchdog Sinc filter order.
lypinator 0:bb348c97df44 113 This parameter can be a value of @ref DFSDM_Channel_AwdFilterOrder */
lypinator 0:bb348c97df44 114 uint32_t Oversampling; /*!< Analog watchdog filter oversampling ratio.
lypinator 0:bb348c97df44 115 This parameter must be a number between Min_Data = 1 and Max_Data = 32 */
lypinator 0:bb348c97df44 116 }DFSDM_Channel_AwdTypeDef;
lypinator 0:bb348c97df44 117
lypinator 0:bb348c97df44 118 /**
lypinator 0:bb348c97df44 119 * @brief DFSDM channel init structure definition
lypinator 0:bb348c97df44 120 */
lypinator 0:bb348c97df44 121 typedef struct
lypinator 0:bb348c97df44 122 {
lypinator 0:bb348c97df44 123 DFSDM_Channel_OutputClockTypeDef OutputClock; /*!< DFSDM channel output clock parameters */
lypinator 0:bb348c97df44 124 DFSDM_Channel_InputTypeDef Input; /*!< DFSDM channel input parameters */
lypinator 0:bb348c97df44 125 DFSDM_Channel_SerialInterfaceTypeDef SerialInterface; /*!< DFSDM channel serial interface parameters */
lypinator 0:bb348c97df44 126 DFSDM_Channel_AwdTypeDef Awd; /*!< DFSDM channel analog watchdog parameters */
lypinator 0:bb348c97df44 127 int32_t Offset; /*!< DFSDM channel offset.
lypinator 0:bb348c97df44 128 This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */
lypinator 0:bb348c97df44 129 uint32_t RightBitShift; /*!< DFSDM channel right bit shift.
lypinator 0:bb348c97df44 130 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F */
lypinator 0:bb348c97df44 131 }DFSDM_Channel_InitTypeDef;
lypinator 0:bb348c97df44 132
lypinator 0:bb348c97df44 133 /**
lypinator 0:bb348c97df44 134 * @brief DFSDM channel handle structure definition
lypinator 0:bb348c97df44 135 */
lypinator 0:bb348c97df44 136 typedef struct
lypinator 0:bb348c97df44 137 {
lypinator 0:bb348c97df44 138 DFSDM_Channel_TypeDef *Instance; /*!< DFSDM channel instance */
lypinator 0:bb348c97df44 139 DFSDM_Channel_InitTypeDef Init; /*!< DFSDM channel init parameters */
lypinator 0:bb348c97df44 140 HAL_DFSDM_Channel_StateTypeDef State; /*!< DFSDM channel state */
lypinator 0:bb348c97df44 141 }DFSDM_Channel_HandleTypeDef;
lypinator 0:bb348c97df44 142
lypinator 0:bb348c97df44 143 /**
lypinator 0:bb348c97df44 144 * @brief HAL DFSDM Filter states definition
lypinator 0:bb348c97df44 145 */
lypinator 0:bb348c97df44 146 typedef enum
lypinator 0:bb348c97df44 147 {
lypinator 0:bb348c97df44 148 HAL_DFSDM_FILTER_STATE_RESET = 0x00U, /*!< DFSDM filter not initialized */
lypinator 0:bb348c97df44 149 HAL_DFSDM_FILTER_STATE_READY = 0x01U, /*!< DFSDM filter initialized and ready for use */
lypinator 0:bb348c97df44 150 HAL_DFSDM_FILTER_STATE_REG = 0x02U, /*!< DFSDM filter regular conversion in progress */
lypinator 0:bb348c97df44 151 HAL_DFSDM_FILTER_STATE_INJ = 0x03U, /*!< DFSDM filter injected conversion in progress */
lypinator 0:bb348c97df44 152 HAL_DFSDM_FILTER_STATE_REG_INJ = 0x04U, /*!< DFSDM filter regular and injected conversions in progress */
lypinator 0:bb348c97df44 153 HAL_DFSDM_FILTER_STATE_ERROR = 0xFFU /*!< DFSDM filter state error */
lypinator 0:bb348c97df44 154 }HAL_DFSDM_Filter_StateTypeDef;
lypinator 0:bb348c97df44 155
lypinator 0:bb348c97df44 156 /**
lypinator 0:bb348c97df44 157 * @brief DFSDM filter regular conversion parameters structure definition
lypinator 0:bb348c97df44 158 */
lypinator 0:bb348c97df44 159 typedef struct
lypinator 0:bb348c97df44 160 {
lypinator 0:bb348c97df44 161 uint32_t Trigger; /*!< Trigger used to start regular conversion: software or synchronous.
lypinator 0:bb348c97df44 162 This parameter can be a value of @ref DFSDM_Filter_Trigger */
lypinator 0:bb348c97df44 163 FunctionalState FastMode; /*!< Enable/disable fast mode for regular conversion */
lypinator 0:bb348c97df44 164 FunctionalState DmaMode; /*!< Enable/disable DMA for regular conversion */
lypinator 0:bb348c97df44 165 }DFSDM_Filter_RegularParamTypeDef;
lypinator 0:bb348c97df44 166
lypinator 0:bb348c97df44 167 /**
lypinator 0:bb348c97df44 168 * @brief DFSDM filter injected conversion parameters structure definition
lypinator 0:bb348c97df44 169 */
lypinator 0:bb348c97df44 170 typedef struct
lypinator 0:bb348c97df44 171 {
lypinator 0:bb348c97df44 172 uint32_t Trigger; /*!< Trigger used to start injected conversion: software, external or synchronous.
lypinator 0:bb348c97df44 173 This parameter can be a value of @ref DFSDM_Filter_Trigger */
lypinator 0:bb348c97df44 174 FunctionalState ScanMode; /*!< Enable/disable scanning mode for injected conversion */
lypinator 0:bb348c97df44 175 FunctionalState DmaMode; /*!< Enable/disable DMA for injected conversion */
lypinator 0:bb348c97df44 176 uint32_t ExtTrigger; /*!< External trigger.
lypinator 0:bb348c97df44 177 This parameter can be a value of @ref DFSDM_Filter_ExtTrigger */
lypinator 0:bb348c97df44 178 uint32_t ExtTriggerEdge; /*!< External trigger edge: rising, falling or both.
lypinator 0:bb348c97df44 179 This parameter can be a value of @ref DFSDM_Filter_ExtTriggerEdge */
lypinator 0:bb348c97df44 180 }DFSDM_Filter_InjectedParamTypeDef;
lypinator 0:bb348c97df44 181
lypinator 0:bb348c97df44 182 /**
lypinator 0:bb348c97df44 183 * @brief DFSDM filter parameters structure definition
lypinator 0:bb348c97df44 184 */
lypinator 0:bb348c97df44 185 typedef struct
lypinator 0:bb348c97df44 186 {
lypinator 0:bb348c97df44 187 uint32_t SincOrder; /*!< Sinc filter order.
lypinator 0:bb348c97df44 188 This parameter can be a value of @ref DFSDM_Filter_SincOrder */
lypinator 0:bb348c97df44 189 uint32_t Oversampling; /*!< Filter oversampling ratio.
lypinator 0:bb348c97df44 190 This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
lypinator 0:bb348c97df44 191 uint32_t IntOversampling; /*!< Integrator oversampling ratio.
lypinator 0:bb348c97df44 192 This parameter must be a number between Min_Data = 1 and Max_Data = 256 */
lypinator 0:bb348c97df44 193 }DFSDM_Filter_FilterParamTypeDef;
lypinator 0:bb348c97df44 194
lypinator 0:bb348c97df44 195 /**
lypinator 0:bb348c97df44 196 * @brief DFSDM filter init structure definition
lypinator 0:bb348c97df44 197 */
lypinator 0:bb348c97df44 198 typedef struct
lypinator 0:bb348c97df44 199 {
lypinator 0:bb348c97df44 200 DFSDM_Filter_RegularParamTypeDef RegularParam; /*!< DFSDM regular conversion parameters */
lypinator 0:bb348c97df44 201 DFSDM_Filter_InjectedParamTypeDef InjectedParam; /*!< DFSDM injected conversion parameters */
lypinator 0:bb348c97df44 202 DFSDM_Filter_FilterParamTypeDef FilterParam; /*!< DFSDM filter parameters */
lypinator 0:bb348c97df44 203 }DFSDM_Filter_InitTypeDef;
lypinator 0:bb348c97df44 204
lypinator 0:bb348c97df44 205 /**
lypinator 0:bb348c97df44 206 * @brief DFSDM filter handle structure definition
lypinator 0:bb348c97df44 207 */
lypinator 0:bb348c97df44 208 typedef struct
lypinator 0:bb348c97df44 209 {
lypinator 0:bb348c97df44 210 DFSDM_Filter_TypeDef *Instance; /*!< DFSDM filter instance */
lypinator 0:bb348c97df44 211 DFSDM_Filter_InitTypeDef Init; /*!< DFSDM filter init parameters */
lypinator 0:bb348c97df44 212 DMA_HandleTypeDef *hdmaReg; /*!< Pointer on DMA handler for regular conversions */
lypinator 0:bb348c97df44 213 DMA_HandleTypeDef *hdmaInj; /*!< Pointer on DMA handler for injected conversions */
lypinator 0:bb348c97df44 214 uint32_t RegularContMode; /*!< Regular conversion continuous mode */
lypinator 0:bb348c97df44 215 uint32_t RegularTrigger; /*!< Trigger used for regular conversion */
lypinator 0:bb348c97df44 216 uint32_t InjectedTrigger; /*!< Trigger used for injected conversion */
lypinator 0:bb348c97df44 217 uint32_t ExtTriggerEdge; /*!< Rising, falling or both edges selected */
lypinator 0:bb348c97df44 218 FunctionalState InjectedScanMode; /*!< Injected scanning mode */
lypinator 0:bb348c97df44 219 uint32_t InjectedChannelsNbr; /*!< Number of channels in injected sequence */
lypinator 0:bb348c97df44 220 uint32_t InjConvRemaining; /*!< Injected conversions remaining */
lypinator 0:bb348c97df44 221 HAL_DFSDM_Filter_StateTypeDef State; /*!< DFSDM filter state */
lypinator 0:bb348c97df44 222 uint32_t ErrorCode; /*!< DFSDM filter error code */
lypinator 0:bb348c97df44 223 }DFSDM_Filter_HandleTypeDef;
lypinator 0:bb348c97df44 224
lypinator 0:bb348c97df44 225 /**
lypinator 0:bb348c97df44 226 * @brief DFSDM filter analog watchdog parameters structure definition
lypinator 0:bb348c97df44 227 */
lypinator 0:bb348c97df44 228 typedef struct
lypinator 0:bb348c97df44 229 {
lypinator 0:bb348c97df44 230 uint32_t DataSource; /*!< Values from digital filter or from channel watchdog filter.
lypinator 0:bb348c97df44 231 This parameter can be a value of @ref DFSDM_Filter_AwdDataSource */
lypinator 0:bb348c97df44 232 uint32_t Channel; /*!< Analog watchdog channel selection.
lypinator 0:bb348c97df44 233 This parameter can be a values combination of @ref DFSDM_Channel_Selection */
lypinator 0:bb348c97df44 234 int32_t HighThreshold; /*!< High threshold for the analog watchdog.
lypinator 0:bb348c97df44 235 This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */
lypinator 0:bb348c97df44 236 int32_t LowThreshold; /*!< Low threshold for the analog watchdog.
lypinator 0:bb348c97df44 237 This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */
lypinator 0:bb348c97df44 238 uint32_t HighBreakSignal; /*!< Break signal assigned to analog watchdog high threshold event.
lypinator 0:bb348c97df44 239 This parameter can be a values combination of @ref DFSDM_BreakSignals */
lypinator 0:bb348c97df44 240 uint32_t LowBreakSignal; /*!< Break signal assigned to analog watchdog low threshold event.
lypinator 0:bb348c97df44 241 This parameter can be a values combination of @ref DFSDM_BreakSignals */
lypinator 0:bb348c97df44 242 }DFSDM_Filter_AwdParamTypeDef;
lypinator 0:bb348c97df44 243
lypinator 0:bb348c97df44 244 /**
lypinator 0:bb348c97df44 245 * @}
lypinator 0:bb348c97df44 246 */
lypinator 0:bb348c97df44 247 #if defined(SYSCFG_MCHDLYCR_BSCKSEL)
lypinator 0:bb348c97df44 248 /**
lypinator 0:bb348c97df44 249 * @brief Synchronization parameters structure definition for STM32F413xx/STM32F423xx devices
lypinator 0:bb348c97df44 250 */
lypinator 0:bb348c97df44 251 typedef struct
lypinator 0:bb348c97df44 252 {
lypinator 0:bb348c97df44 253 uint32_t DFSDM1ClockIn; /*!< Source selection for DFSDM1_Ckin.
lypinator 0:bb348c97df44 254 This parameter can be a value of @ref DFSDM_1_CLOCKIN_SELECTION*/
lypinator 0:bb348c97df44 255 uint32_t DFSDM2ClockIn; /*!< Source selection for DFSDM2_Ckin.
lypinator 0:bb348c97df44 256 This parameter can be a value of @ref DFSDM_2_CLOCKIN_SELECTION*/
lypinator 0:bb348c97df44 257 uint32_t DFSDM1ClockOut; /*!< Source selection for DFSDM1_Ckout.
lypinator 0:bb348c97df44 258 This parameter can be a value of @ref DFSDM_1_CLOCKOUT_SELECTION*/
lypinator 0:bb348c97df44 259 uint32_t DFSDM2ClockOut; /*!< Source selection for DFSDM2_Ckout.
lypinator 0:bb348c97df44 260 This parameter can be a value of @ref DFSDM_2_CLOCKOUT_SELECTION*/
lypinator 0:bb348c97df44 261 uint32_t DFSDM1BitClkDistribution; /*!< Distribution of the DFSDM1 bitstream clock gated by TIM4 OC1 or TIM4 OC2.
lypinator 0:bb348c97df44 262 This parameter can be a value of @ref DFSDM_1_BIT_STREAM_DISTRIBUTION
lypinator 0:bb348c97df44 263 @note The DFSDM2 audio gated by TIM4 OC2 can be injected on CKIN0 or CKIN2
lypinator 0:bb348c97df44 264 @note The DFSDM2 audio gated by TIM4 OC1 can be injected on CKIN1 or CKIN3 */
lypinator 0:bb348c97df44 265 uint32_t DFSDM2BitClkDistribution; /*!< Distribution of the DFSDM2 bitstream clock gated by TIM3 OC1 or TIM3 OC2 or TIM3 OC3 or TIM3 OC4.
lypinator 0:bb348c97df44 266 This parameter can be a value of @ref DFSDM_2_BIT_STREAM_DISTRIBUTION
lypinator 0:bb348c97df44 267 @note The DFSDM2 audio gated by TIM3 OC4 can be injected on CKIN0 or CKIN4
lypinator 0:bb348c97df44 268 @note The DFSDM2 audio gated by TIM3 OC3 can be injected on CKIN1 or CKIN5
lypinator 0:bb348c97df44 269 @note The DFSDM2 audio gated by TIM3 OC2 can be injected on CKIN2 or CKIN6
lypinator 0:bb348c97df44 270 @note The DFSDM2 audio gated by TIM3 OC1 can be injected on CKIN3 or CKIN7 */
lypinator 0:bb348c97df44 271 uint32_t DFSDM1DataDistribution; /*!< Source selection for DatIn0 and DatIn2 of DFSDM1.
lypinator 0:bb348c97df44 272 This parameter can be a value of @ref DFSDM_1_DATA_DISTRIBUTION */
lypinator 0:bb348c97df44 273 uint32_t DFSDM2DataDistribution; /*!< Source selection for DatIn0, DatIn2, DatIn4 and DatIn6 of DFSDM2.
lypinator 0:bb348c97df44 274 This parameter can be a value of @ref DFSDM_2_DATA_DISTRIBUTION */
lypinator 0:bb348c97df44 275 }DFSDM_MultiChannelConfigTypeDef;
lypinator 0:bb348c97df44 276 #endif /* SYSCFG_MCHDLYCR_BSCKSEL */
lypinator 0:bb348c97df44 277 /**
lypinator 0:bb348c97df44 278 * @}
lypinator 0:bb348c97df44 279 */
lypinator 0:bb348c97df44 280
lypinator 0:bb348c97df44 281 /* End of exported types -----------------------------------------------------*/
lypinator 0:bb348c97df44 282
lypinator 0:bb348c97df44 283 /* Exported constants --------------------------------------------------------*/
lypinator 0:bb348c97df44 284 /** @defgroup DFSDM_Exported_Constants DFSDM Exported Constants
lypinator 0:bb348c97df44 285 * @{
lypinator 0:bb348c97df44 286 */
lypinator 0:bb348c97df44 287
lypinator 0:bb348c97df44 288 /** @defgroup DFSDM_Channel_OuputClock DFSDM channel output clock selection
lypinator 0:bb348c97df44 289 * @{
lypinator 0:bb348c97df44 290 */
lypinator 0:bb348c97df44 291 #define DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM 0x00000000U /*!< Source for ouput clock is system clock */
lypinator 0:bb348c97df44 292 #define DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO DFSDM_CHCFGR1_CKOUTSRC /*!< Source for ouput clock is audio clock */
lypinator 0:bb348c97df44 293 /**
lypinator 0:bb348c97df44 294 * @}
lypinator 0:bb348c97df44 295 */
lypinator 0:bb348c97df44 296
lypinator 0:bb348c97df44 297 /** @defgroup DFSDM_Channel_InputMultiplexer DFSDM channel input multiplexer
lypinator 0:bb348c97df44 298 * @{
lypinator 0:bb348c97df44 299 */
lypinator 0:bb348c97df44 300 #define DFSDM_CHANNEL_EXTERNAL_INPUTS 0x00000000U /*!< Data are taken from external inputs */
lypinator 0:bb348c97df44 301 #define DFSDM_CHANNEL_INTERNAL_REGISTER DFSDM_CHCFGR1_DATMPX_1 /*!< Data are taken from internal register */
lypinator 0:bb348c97df44 302 /**
lypinator 0:bb348c97df44 303 * @}
lypinator 0:bb348c97df44 304 */
lypinator 0:bb348c97df44 305
lypinator 0:bb348c97df44 306 /** @defgroup DFSDM_Channel_DataPacking DFSDM channel input data packing
lypinator 0:bb348c97df44 307 * @{
lypinator 0:bb348c97df44 308 */
lypinator 0:bb348c97df44 309 #define DFSDM_CHANNEL_STANDARD_MODE 0x00000000U /*!< Standard data packing mode */
lypinator 0:bb348c97df44 310 #define DFSDM_CHANNEL_INTERLEAVED_MODE DFSDM_CHCFGR1_DATPACK_0 /*!< Interleaved data packing mode */
lypinator 0:bb348c97df44 311 #define DFSDM_CHANNEL_DUAL_MODE DFSDM_CHCFGR1_DATPACK_1 /*!< Dual data packing mode */
lypinator 0:bb348c97df44 312 /**
lypinator 0:bb348c97df44 313 * @}
lypinator 0:bb348c97df44 314 */
lypinator 0:bb348c97df44 315
lypinator 0:bb348c97df44 316 /** @defgroup DFSDM_Channel_InputPins DFSDM channel input pins
lypinator 0:bb348c97df44 317 * @{
lypinator 0:bb348c97df44 318 */
lypinator 0:bb348c97df44 319 #define DFSDM_CHANNEL_SAME_CHANNEL_PINS 0x00000000U /*!< Input from pins on same channel */
lypinator 0:bb348c97df44 320 #define DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS DFSDM_CHCFGR1_CHINSEL /*!< Input from pins on following channel */
lypinator 0:bb348c97df44 321 /**
lypinator 0:bb348c97df44 322 * @}
lypinator 0:bb348c97df44 323 */
lypinator 0:bb348c97df44 324
lypinator 0:bb348c97df44 325 /** @defgroup DFSDM_Channel_SerialInterfaceType DFSDM channel serial interface type
lypinator 0:bb348c97df44 326 * @{
lypinator 0:bb348c97df44 327 */
lypinator 0:bb348c97df44 328 #define DFSDM_CHANNEL_SPI_RISING 0x00000000U /*!< SPI with rising edge */
lypinator 0:bb348c97df44 329 #define DFSDM_CHANNEL_SPI_FALLING DFSDM_CHCFGR1_SITP_0 /*!< SPI with falling edge */
lypinator 0:bb348c97df44 330 #define DFSDM_CHANNEL_MANCHESTER_RISING DFSDM_CHCFGR1_SITP_1 /*!< Manchester with rising edge */
lypinator 0:bb348c97df44 331 #define DFSDM_CHANNEL_MANCHESTER_FALLING DFSDM_CHCFGR1_SITP /*!< Manchester with falling edge */
lypinator 0:bb348c97df44 332 /**
lypinator 0:bb348c97df44 333 * @}
lypinator 0:bb348c97df44 334 */
lypinator 0:bb348c97df44 335
lypinator 0:bb348c97df44 336 /** @defgroup DFSDM_Channel_SpiClock DFSDM channel SPI clock selection
lypinator 0:bb348c97df44 337 * @{
lypinator 0:bb348c97df44 338 */
lypinator 0:bb348c97df44 339 #define DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL 0x00000000U /*!< External SPI clock */
lypinator 0:bb348c97df44 340 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL DFSDM_CHCFGR1_SPICKSEL_0 /*!< Internal SPI clock */
lypinator 0:bb348c97df44 341 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING DFSDM_CHCFGR1_SPICKSEL_1 /*!< Internal SPI clock divided by 2, falling edge */
lypinator 0:bb348c97df44 342 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING DFSDM_CHCFGR1_SPICKSEL /*!< Internal SPI clock divided by 2, rising edge */
lypinator 0:bb348c97df44 343 /**
lypinator 0:bb348c97df44 344 * @}
lypinator 0:bb348c97df44 345 */
lypinator 0:bb348c97df44 346
lypinator 0:bb348c97df44 347 /** @defgroup DFSDM_Channel_AwdFilterOrder DFSDM channel analog watchdog filter order
lypinator 0:bb348c97df44 348 * @{
lypinator 0:bb348c97df44 349 */
lypinator 0:bb348c97df44 350 #define DFSDM_CHANNEL_FASTSINC_ORDER 0x00000000U /*!< FastSinc filter type */
lypinator 0:bb348c97df44 351 #define DFSDM_CHANNEL_SINC1_ORDER DFSDM_CHAWSCDR_AWFORD_0 /*!< Sinc 1 filter type */
lypinator 0:bb348c97df44 352 #define DFSDM_CHANNEL_SINC2_ORDER DFSDM_CHAWSCDR_AWFORD_1 /*!< Sinc 2 filter type */
lypinator 0:bb348c97df44 353 #define DFSDM_CHANNEL_SINC3_ORDER DFSDM_CHAWSCDR_AWFORD /*!< Sinc 3 filter type */
lypinator 0:bb348c97df44 354 /**
lypinator 0:bb348c97df44 355 * @}
lypinator 0:bb348c97df44 356 */
lypinator 0:bb348c97df44 357
lypinator 0:bb348c97df44 358 /** @defgroup DFSDM_Filter_Trigger DFSDM filter conversion trigger
lypinator 0:bb348c97df44 359 * @{
lypinator 0:bb348c97df44 360 */
lypinator 0:bb348c97df44 361 #define DFSDM_FILTER_SW_TRIGGER 0x00000000U /*!< Software trigger */
lypinator 0:bb348c97df44 362 #define DFSDM_FILTER_SYNC_TRIGGER 0x00000001U /*!< Synchronous with DFSDM_FLT0 */
lypinator 0:bb348c97df44 363 #define DFSDM_FILTER_EXT_TRIGGER 0x00000002U /*!< External trigger (only for injected conversion) */
lypinator 0:bb348c97df44 364 /**
lypinator 0:bb348c97df44 365 * @}
lypinator 0:bb348c97df44 366 */
lypinator 0:bb348c97df44 367
lypinator 0:bb348c97df44 368 /** @defgroup DFSDM_Filter_ExtTrigger DFSDM filter external trigger
lypinator 0:bb348c97df44 369 * @{
lypinator 0:bb348c97df44 370 */
lypinator 0:bb348c97df44 371 #if defined(STM32F413xx) || defined(STM32F423xx)
lypinator 0:bb348c97df44 372 /* Trigger for stm32f413xx and STM32f423xx devices */
lypinator 0:bb348c97df44 373 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO 0x00000000U /*!< For All DFSDM1/2 filters */
lypinator 0:bb348c97df44 374 #define DFSDM_FILTER_EXT_TRIG_TIM3_TRGO DFSDM_FLTCR1_JEXTSEL_0 /*!< For All DFSDM1/2 filters */
lypinator 0:bb348c97df44 375 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO DFSDM_FLTCR1_JEXTSEL_1 /*!< For All DFSDM1/2 filters */
lypinator 0:bb348c97df44 376 #define DFSDM_FILTER_EXT_TRIG_TIM10_OC1 (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1) /*!< For DFSDM1 filter 0 and 1 and DFSDM2 filter 0, 1 and 2 */
lypinator 0:bb348c97df44 377 #define DFSDM_FILTER_EXT_TRIG_TIM2_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1) /*!< For DFSDM2 filter 3 */
lypinator 0:bb348c97df44 378 #define DFSDM_FILTER_EXT_TRIG_TIM4_TRGO DFSDM_FLTCR1_JEXTSEL_2 /*!< For DFSDM1 filter 0 and 1 and DFSDM2 filter 0, 1 and 2 */
lypinator 0:bb348c97df44 379 #define DFSDM_FILTER_EXT_TRIG_TIM11_OC1 DFSDM_FLTCR1_JEXTSEL_2 /*!< For DFSDM2 filter 3 */
lypinator 0:bb348c97df44 380 #define DFSDM_FILTER_EXT_TRIG_TIM6_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2) /*!< For DFSDM1 filter 0 and 1 and DFSDM2 filter 0 and 1 */
lypinator 0:bb348c97df44 381 #define DFSDM_FILTER_EXT_TRIG_TIM7_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2) /*!< For DFSDM2 filter 2 and 3*/
lypinator 0:bb348c97df44 382 #define DFSDM_FILTER_EXT_TRIG_EXTI11 (DFSDM_FLTCR1_JEXTSEL_1 | DFSDM_FLTCR1_JEXTSEL_2) /*!< For All DFSDM1/2 filters */
lypinator 0:bb348c97df44 383 #define DFSDM_FILTER_EXT_TRIG_EXTI15 DFSDM_FLTCR1_JEXTSEL /*!< For All DFSDM1/2 filters */
lypinator 0:bb348c97df44 384 #else
lypinator 0:bb348c97df44 385 /* Trigger for stm32f412xx devices */
lypinator 0:bb348c97df44 386 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO 0x00000000U /*!< For DFSDM1 filter 0 and 1*/
lypinator 0:bb348c97df44 387 #define DFSDM_FILTER_EXT_TRIG_TIM3_TRGO DFSDM_FLTCR1_JEXTSEL_0 /*!< For DFSDM1 filter 0 and 1*/
lypinator 0:bb348c97df44 388 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO DFSDM_FLTCR1_JEXTSEL_1 /*!< For DFSDM1 filter 0 and 1*/
lypinator 0:bb348c97df44 389 #define DFSDM_FILTER_EXT_TRIG_TIM10_OC1 (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1) /*!< For DFSDM1 filter 0 and 1*/
lypinator 0:bb348c97df44 390 #define DFSDM_FILTER_EXT_TRIG_TIM4_TRGO DFSDM_FLTCR1_JEXTSEL_2 /*!< For DFSDM1 filter 0 and 1*/
lypinator 0:bb348c97df44 391 #define DFSDM_FILTER_EXT_TRIG_TIM6_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2) /*!< For DFSDM1 filter 0 and 1*/
lypinator 0:bb348c97df44 392 #define DFSDM_FILTER_EXT_TRIG_EXTI11 (DFSDM_FLTCR1_JEXTSEL_1 | DFSDM_FLTCR1_JEXTSEL_2) /*!< For DFSDM1 filter 0 and 1*/
lypinator 0:bb348c97df44 393 #define DFSDM_FILTER_EXT_TRIG_EXTI15 DFSDM_FLTCR1_JEXTSEL /*!< For DFSDM1 filter 0 and 1*/
lypinator 0:bb348c97df44 394 #endif
lypinator 0:bb348c97df44 395 /**
lypinator 0:bb348c97df44 396 * @}
lypinator 0:bb348c97df44 397 */
lypinator 0:bb348c97df44 398
lypinator 0:bb348c97df44 399 /** @defgroup DFSDM_Filter_ExtTriggerEdge DFSDM filter external trigger edge
lypinator 0:bb348c97df44 400 * @{
lypinator 0:bb348c97df44 401 */
lypinator 0:bb348c97df44 402 #define DFSDM_FILTER_EXT_TRIG_RISING_EDGE DFSDM_FLTCR1_JEXTEN_0 /*!< External rising edge */
lypinator 0:bb348c97df44 403 #define DFSDM_FILTER_EXT_TRIG_FALLING_EDGE DFSDM_FLTCR1_JEXTEN_1 /*!< External falling edge */
lypinator 0:bb348c97df44 404 #define DFSDM_FILTER_EXT_TRIG_BOTH_EDGES DFSDM_FLTCR1_JEXTEN /*!< External rising and falling edges */
lypinator 0:bb348c97df44 405 /**
lypinator 0:bb348c97df44 406 * @}
lypinator 0:bb348c97df44 407 */
lypinator 0:bb348c97df44 408
lypinator 0:bb348c97df44 409 /** @defgroup DFSDM_Filter_SincOrder DFSDM filter sinc order
lypinator 0:bb348c97df44 410 * @{
lypinator 0:bb348c97df44 411 */
lypinator 0:bb348c97df44 412 #define DFSDM_FILTER_FASTSINC_ORDER 0x00000000U /*!< FastSinc filter type */
lypinator 0:bb348c97df44 413 #define DFSDM_FILTER_SINC1_ORDER DFSDM_FLTFCR_FORD_0 /*!< Sinc 1 filter type */
lypinator 0:bb348c97df44 414 #define DFSDM_FILTER_SINC2_ORDER DFSDM_FLTFCR_FORD_1 /*!< Sinc 2 filter type */
lypinator 0:bb348c97df44 415 #define DFSDM_FILTER_SINC3_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_1) /*!< Sinc 3 filter type */
lypinator 0:bb348c97df44 416 #define DFSDM_FILTER_SINC4_ORDER DFSDM_FLTFCR_FORD_2 /*!< Sinc 4 filter type */
lypinator 0:bb348c97df44 417 #define DFSDM_FILTER_SINC5_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_2) /*!< Sinc 5 filter type */
lypinator 0:bb348c97df44 418 /**
lypinator 0:bb348c97df44 419 * @}
lypinator 0:bb348c97df44 420 */
lypinator 0:bb348c97df44 421
lypinator 0:bb348c97df44 422 /** @defgroup DFSDM_Filter_AwdDataSource DFSDM filter analog watchdog data source
lypinator 0:bb348c97df44 423 * @{
lypinator 0:bb348c97df44 424 */
lypinator 0:bb348c97df44 425 #define DFSDM_FILTER_AWD_FILTER_DATA 0x00000000U /*!< From digital filter */
lypinator 0:bb348c97df44 426 #define DFSDM_FILTER_AWD_CHANNEL_DATA DFSDM_FLTCR1_AWFSEL /*!< From analog watchdog channel */
lypinator 0:bb348c97df44 427 /**
lypinator 0:bb348c97df44 428 * @}
lypinator 0:bb348c97df44 429 */
lypinator 0:bb348c97df44 430
lypinator 0:bb348c97df44 431 /** @defgroup DFSDM_Filter_ErrorCode DFSDM filter error code
lypinator 0:bb348c97df44 432 * @{
lypinator 0:bb348c97df44 433 */
lypinator 0:bb348c97df44 434 #define DFSDM_FILTER_ERROR_NONE 0x00000000U /*!< No error */
lypinator 0:bb348c97df44 435 #define DFSDM_FILTER_ERROR_REGULAR_OVERRUN 0x00000001U /*!< Overrun occurs during regular conversion */
lypinator 0:bb348c97df44 436 #define DFSDM_FILTER_ERROR_INJECTED_OVERRUN 0x00000002U /*!< Overrun occurs during injected conversion */
lypinator 0:bb348c97df44 437 #define DFSDM_FILTER_ERROR_DMA 0x00000003U /*!< DMA error occurs */
lypinator 0:bb348c97df44 438 /**
lypinator 0:bb348c97df44 439 * @}
lypinator 0:bb348c97df44 440 */
lypinator 0:bb348c97df44 441
lypinator 0:bb348c97df44 442 /** @defgroup DFSDM_BreakSignals DFSDM break signals
lypinator 0:bb348c97df44 443 * @{
lypinator 0:bb348c97df44 444 */
lypinator 0:bb348c97df44 445 #define DFSDM_NO_BREAK_SIGNAL 0x00000000U /*!< No break signal */
lypinator 0:bb348c97df44 446 #define DFSDM_BREAK_SIGNAL_0 0x00000001U /*!< Break signal 0 */
lypinator 0:bb348c97df44 447 #define DFSDM_BREAK_SIGNAL_1 0x00000002U /*!< Break signal 1 */
lypinator 0:bb348c97df44 448 #define DFSDM_BREAK_SIGNAL_2 0x00000004U /*!< Break signal 2 */
lypinator 0:bb348c97df44 449 #define DFSDM_BREAK_SIGNAL_3 0x00000008U /*!< Break signal 3 */
lypinator 0:bb348c97df44 450 /**
lypinator 0:bb348c97df44 451 * @}
lypinator 0:bb348c97df44 452 */
lypinator 0:bb348c97df44 453
lypinator 0:bb348c97df44 454 /** @defgroup DFSDM_Channel_Selection DFSDM Channel Selection
lypinator 0:bb348c97df44 455 * @{
lypinator 0:bb348c97df44 456 */
lypinator 0:bb348c97df44 457 /* DFSDM Channels ------------------------------------------------------------*/
lypinator 0:bb348c97df44 458 /* The DFSDM channels are defined as follows:
lypinator 0:bb348c97df44 459 - in 16-bit LSB the channel mask is set
lypinator 0:bb348c97df44 460 - in 16-bit MSB the channel number is set
lypinator 0:bb348c97df44 461 e.g. for channel 3 definition:
lypinator 0:bb348c97df44 462 - the channel mask is 0x00000008 (bit 3 is set)
lypinator 0:bb348c97df44 463 - the channel number 3 is 0x00030000
lypinator 0:bb348c97df44 464 --> Consequently, channel 3 definition is 0x00000008 | 0x00030000 = 0x00030008 */
lypinator 0:bb348c97df44 465 #define DFSDM_CHANNEL_0 0x00000001U
lypinator 0:bb348c97df44 466 #define DFSDM_CHANNEL_1 0x00010002U
lypinator 0:bb348c97df44 467 #define DFSDM_CHANNEL_2 0x00020004U
lypinator 0:bb348c97df44 468 #define DFSDM_CHANNEL_3 0x00030008U
lypinator 0:bb348c97df44 469 #define DFSDM_CHANNEL_4 0x00040010U /* only for stmm32f413xx and stm32f423xx devices */
lypinator 0:bb348c97df44 470 #define DFSDM_CHANNEL_5 0x00050020U /* only for stmm32f413xx and stm32f423xx devices */
lypinator 0:bb348c97df44 471 #define DFSDM_CHANNEL_6 0x00060040U /* only for stmm32f413xx and stm32f423xx devices */
lypinator 0:bb348c97df44 472 #define DFSDM_CHANNEL_7 0x00070080U /* only for stmm32f413xx and stm32f423xx devices */
lypinator 0:bb348c97df44 473 /**
lypinator 0:bb348c97df44 474 * @}
lypinator 0:bb348c97df44 475 */
lypinator 0:bb348c97df44 476
lypinator 0:bb348c97df44 477 /** @defgroup DFSDM_ContinuousMode DFSDM Continuous Mode
lypinator 0:bb348c97df44 478 * @{
lypinator 0:bb348c97df44 479 */
lypinator 0:bb348c97df44 480 #define DFSDM_CONTINUOUS_CONV_OFF 0x00000000U /*!< Conversion are not continuous */
lypinator 0:bb348c97df44 481 #define DFSDM_CONTINUOUS_CONV_ON 0x00000001U /*!< Conversion are continuous */
lypinator 0:bb348c97df44 482 /**
lypinator 0:bb348c97df44 483 * @}
lypinator 0:bb348c97df44 484 */
lypinator 0:bb348c97df44 485
lypinator 0:bb348c97df44 486 /** @defgroup DFSDM_AwdThreshold DFSDM analog watchdog threshold
lypinator 0:bb348c97df44 487 * @{
lypinator 0:bb348c97df44 488 */
lypinator 0:bb348c97df44 489 #define DFSDM_AWD_HIGH_THRESHOLD 0x00000000U /*!< Analog watchdog high threshold */
lypinator 0:bb348c97df44 490 #define DFSDM_AWD_LOW_THRESHOLD 0x00000001U /*!< Analog watchdog low threshold */
lypinator 0:bb348c97df44 491 /**
lypinator 0:bb348c97df44 492 * @}
lypinator 0:bb348c97df44 493 */
lypinator 0:bb348c97df44 494
lypinator 0:bb348c97df44 495 #if defined(SYSCFG_MCHDLYCR_BSCKSEL)
lypinator 0:bb348c97df44 496 /** @defgroup DFSDM_1_CLOCKOUT_SELECTION DFSDM1 ClockOut Selection
lypinator 0:bb348c97df44 497 * @{
lypinator 0:bb348c97df44 498 */
lypinator 0:bb348c97df44 499 #define DFSDM1_CKOUT_DFSDM2_CKOUT 0x00000080U
lypinator 0:bb348c97df44 500 #define DFSDM1_CKOUT_DFSDM1 0x00000000U
lypinator 0:bb348c97df44 501 /**
lypinator 0:bb348c97df44 502 * @}
lypinator 0:bb348c97df44 503 */
lypinator 0:bb348c97df44 504
lypinator 0:bb348c97df44 505 /** @defgroup DFSDM_2_CLOCKOUT_SELECTION DFSDM2 ClockOut Selection
lypinator 0:bb348c97df44 506 * @{
lypinator 0:bb348c97df44 507 */
lypinator 0:bb348c97df44 508 #define DFSDM2_CKOUT_DFSDM2_CKOUT 0x00040000U
lypinator 0:bb348c97df44 509 #define DFSDM2_CKOUT_DFSDM2 0x00000000U
lypinator 0:bb348c97df44 510 /**
lypinator 0:bb348c97df44 511 * @}
lypinator 0:bb348c97df44 512 */
lypinator 0:bb348c97df44 513
lypinator 0:bb348c97df44 514 /** @defgroup DFSDM_1_CLOCKIN_SELECTION DFSDM1 ClockIn Selection
lypinator 0:bb348c97df44 515 * @{
lypinator 0:bb348c97df44 516 */
lypinator 0:bb348c97df44 517 #define DFSDM1_CKIN_DFSDM2_CKOUT 0x00000040U
lypinator 0:bb348c97df44 518 #define DFSDM1_CKIN_PAD 0x00000000U
lypinator 0:bb348c97df44 519 /**
lypinator 0:bb348c97df44 520 * @}
lypinator 0:bb348c97df44 521 */
lypinator 0:bb348c97df44 522
lypinator 0:bb348c97df44 523 /** @defgroup DFSDM_2_CLOCKIN_SELECTION DFSDM2 ClockIn Selection
lypinator 0:bb348c97df44 524 * @{
lypinator 0:bb348c97df44 525 */
lypinator 0:bb348c97df44 526 #define DFSDM2_CKIN_DFSDM2_CKOUT 0x00020000U
lypinator 0:bb348c97df44 527 #define DFSDM2_CKIN_PAD 0x00000000U
lypinator 0:bb348c97df44 528 /**
lypinator 0:bb348c97df44 529 * @}
lypinator 0:bb348c97df44 530 */
lypinator 0:bb348c97df44 531
lypinator 0:bb348c97df44 532 /** @defgroup DFSDM_1_BIT_STREAM_DISTRIBUTION DFSDM1 Bit Stream Distribution
lypinator 0:bb348c97df44 533 * @{
lypinator 0:bb348c97df44 534 */
lypinator 0:bb348c97df44 535 #define DFSDM1_T4_OC2_BITSTREAM_CKIN0 0x00000000U /* TIM4_OC2 to CLKIN0 */
lypinator 0:bb348c97df44 536 #define DFSDM1_T4_OC2_BITSTREAM_CKIN2 SYSCFG_MCHDLYCR_DFSDM1CK02SEL /* TIM4_OC2 to CLKIN2 */
lypinator 0:bb348c97df44 537 #define DFSDM1_T4_OC1_BITSTREAM_CKIN3 SYSCFG_MCHDLYCR_DFSDM1CK13SEL /* TIM4_OC1 to CLKIN3 */
lypinator 0:bb348c97df44 538 #define DFSDM1_T4_OC1_BITSTREAM_CKIN1 0x00000000U /* TIM4_OC1 to CLKIN1 */
lypinator 0:bb348c97df44 539 /**
lypinator 0:bb348c97df44 540 * @}
lypinator 0:bb348c97df44 541 */
lypinator 0:bb348c97df44 542
lypinator 0:bb348c97df44 543 /** @defgroup DFSDM_2_BIT_STREAM_DISTRIBUTION DFSDM12 Bit Stream Distribution
lypinator 0:bb348c97df44 544 * @{
lypinator 0:bb348c97df44 545 */
lypinator 0:bb348c97df44 546 #define DFSDM2_T3_OC4_BITSTREAM_CKIN0 0x00000000U /* TIM3_OC4 to CKIN0 */
lypinator 0:bb348c97df44 547 #define DFSDM2_T3_OC4_BITSTREAM_CKIN4 SYSCFG_MCHDLYCR_DFSDM2CK04SEL /* TIM3_OC4 to CKIN4 */
lypinator 0:bb348c97df44 548 #define DFSDM2_T3_OC3_BITSTREAM_CKIN5 SYSCFG_MCHDLYCR_DFSDM2CK15SEL /* TIM3_OC3 to CKIN5 */
lypinator 0:bb348c97df44 549 #define DFSDM2_T3_OC3_BITSTREAM_CKIN1 0x00000000U /* TIM3_OC3 to CKIN1 */
lypinator 0:bb348c97df44 550 #define DFSDM2_T3_OC2_BITSTREAM_CKIN6 SYSCFG_MCHDLYCR_DFSDM2CK26SEL /* TIM3_OC2to CKIN6 */
lypinator 0:bb348c97df44 551 #define DFSDM2_T3_OC2_BITSTREAM_CKIN2 0x00000000U /* TIM3_OC2 to CKIN2 */
lypinator 0:bb348c97df44 552 #define DFSDM2_T3_OC1_BITSTREAM_CKIN3 0x00000000U /* TIM3_OC1 to CKIN3 */
lypinator 0:bb348c97df44 553 #define DFSDM2_T3_OC1_BITSTREAM_CKIN7 SYSCFG_MCHDLYCR_DFSDM2CK37SEL /* TIM3_OC1 to CKIN7 */
lypinator 0:bb348c97df44 554 /**
lypinator 0:bb348c97df44 555 * @}
lypinator 0:bb348c97df44 556 */
lypinator 0:bb348c97df44 557
lypinator 0:bb348c97df44 558 /** @defgroup DFSDM_1_DATA_DISTRIBUTION DFSDM1 Data Distribution
lypinator 0:bb348c97df44 559 * @{
lypinator 0:bb348c97df44 560 */
lypinator 0:bb348c97df44 561 #define DFSDM1_DATIN0_TO_DATIN0_PAD 0x00000000U
lypinator 0:bb348c97df44 562 #define DFSDM1_DATIN0_TO_DATIN1_PAD SYSCFG_MCHDLYCR_DFSDM1D0SEL
lypinator 0:bb348c97df44 563 #define DFSDM1_DATIN2_TO_DATIN2_PAD 0x00000000U
lypinator 0:bb348c97df44 564 #define DFSDM1_DATIN2_TO_DATIN3_PAD SYSCFG_MCHDLYCR_DFSDM1D2SEL
lypinator 0:bb348c97df44 565 /**
lypinator 0:bb348c97df44 566 * @}
lypinator 0:bb348c97df44 567 */
lypinator 0:bb348c97df44 568
lypinator 0:bb348c97df44 569 /** @defgroup DFSDM_2_DATA_DISTRIBUTION DFSDM2 Data Distribution
lypinator 0:bb348c97df44 570 * @{
lypinator 0:bb348c97df44 571 */
lypinator 0:bb348c97df44 572 #define DFSDM2_DATIN0_TO_DATIN0_PAD 0x00000000U
lypinator 0:bb348c97df44 573 #define DFSDM2_DATIN0_TO_DATIN1_PAD SYSCFG_MCHDLYCR_DFSDM2D0SEL
lypinator 0:bb348c97df44 574 #define DFSDM2_DATIN2_TO_DATIN2_PAD 0x00000000U
lypinator 0:bb348c97df44 575 #define DFSDM2_DATIN2_TO_DATIN3_PAD SYSCFG_MCHDLYCR_DFSDM2D2SEL
lypinator 0:bb348c97df44 576 #define DFSDM2_DATIN4_TO_DATIN4_PAD 0x00000000U
lypinator 0:bb348c97df44 577 #define DFSDM2_DATIN4_TO_DATIN5_PAD SYSCFG_MCHDLYCR_DFSDM2D4SEL
lypinator 0:bb348c97df44 578 #define DFSDM2_DATIN6_TO_DATIN6_PAD 0x00000000U
lypinator 0:bb348c97df44 579 #define DFSDM2_DATIN6_TO_DATIN7_PAD SYSCFG_MCHDLYCR_DFSDM2D6SEL
lypinator 0:bb348c97df44 580 /**
lypinator 0:bb348c97df44 581 * @}
lypinator 0:bb348c97df44 582 */
lypinator 0:bb348c97df44 583
lypinator 0:bb348c97df44 584 /** @defgroup HAL_MCHDLY_CLOCK HAL MCHDLY Clock enable
lypinator 0:bb348c97df44 585 * @{
lypinator 0:bb348c97df44 586 */
lypinator 0:bb348c97df44 587 #define HAL_MCHDLY_CLOCK_DFSDM2 SYSCFG_MCHDLYCR_MCHDLY2EN
lypinator 0:bb348c97df44 588 #define HAL_MCHDLY_CLOCK_DFSDM1 SYSCFG_MCHDLYCR_MCHDLY1EN
lypinator 0:bb348c97df44 589 /**
lypinator 0:bb348c97df44 590 * @}
lypinator 0:bb348c97df44 591 */
lypinator 0:bb348c97df44 592
lypinator 0:bb348c97df44 593 /** @defgroup DFSDM_CLOCKIN_SOURCE DFSDM Clock In Source Selection
lypinator 0:bb348c97df44 594 * @{
lypinator 0:bb348c97df44 595 */
lypinator 0:bb348c97df44 596 #define HAL_DFSDM2_CKIN_PAD 0x00040000U
lypinator 0:bb348c97df44 597 #define HAL_DFSDM2_CKIN_DM SYSCFG_MCHDLYCR_DFSDM2CFG
lypinator 0:bb348c97df44 598 #define HAL_DFSDM1_CKIN_PAD 0x00000000U
lypinator 0:bb348c97df44 599 #define HAL_DFSDM1_CKIN_DM SYSCFG_MCHDLYCR_DFSDM1CFG
lypinator 0:bb348c97df44 600 /**
lypinator 0:bb348c97df44 601 * @}
lypinator 0:bb348c97df44 602 */
lypinator 0:bb348c97df44 603
lypinator 0:bb348c97df44 604 /** @defgroup DFSDM_CLOCKOUT_SOURCE DFSDM Clock Source Selection
lypinator 0:bb348c97df44 605 * @{
lypinator 0:bb348c97df44 606 */
lypinator 0:bb348c97df44 607 #define HAL_DFSDM2_CKOUT_DFSDM2 0x10000000U
lypinator 0:bb348c97df44 608 #define HAL_DFSDM2_CKOUT_M27 SYSCFG_MCHDLYCR_DFSDM2CKOSEL
lypinator 0:bb348c97df44 609 #define HAL_DFSDM1_CKOUT_DFSDM1 0x00000000U
lypinator 0:bb348c97df44 610 #define HAL_DFSDM1_CKOUT_M27 SYSCFG_MCHDLYCR_DFSDM1CKOSEL
lypinator 0:bb348c97df44 611 /**
lypinator 0:bb348c97df44 612 * @}
lypinator 0:bb348c97df44 613 */
lypinator 0:bb348c97df44 614
lypinator 0:bb348c97df44 615 /** @defgroup DFSDM_DATAIN0_SOURCE DFSDM Source Selection For DATAIN0
lypinator 0:bb348c97df44 616 * @{
lypinator 0:bb348c97df44 617 */
lypinator 0:bb348c97df44 618 #define HAL_DATAIN0_DFSDM2_PAD 0x10000000U
lypinator 0:bb348c97df44 619 #define HAL_DATAIN0_DFSDM2_DATAIN1 SYSCFG_MCHDLYCR_DFSDM2D0SEL
lypinator 0:bb348c97df44 620 #define HAL_DATAIN0_DFSDM1_PAD 0x00000000U
lypinator 0:bb348c97df44 621 #define HAL_DATAIN0_DFSDM1_DATAIN1 SYSCFG_MCHDLYCR_DFSDM1D0SEL
lypinator 0:bb348c97df44 622 /**
lypinator 0:bb348c97df44 623 * @}
lypinator 0:bb348c97df44 624 */
lypinator 0:bb348c97df44 625
lypinator 0:bb348c97df44 626 /** @defgroup DFSDM_DATAIN2_SOURCE DFSDM Source Selection For DATAIN2
lypinator 0:bb348c97df44 627 * @{
lypinator 0:bb348c97df44 628 */
lypinator 0:bb348c97df44 629 #define HAL_DATAIN2_DFSDM2_PAD 0x10000000U
lypinator 0:bb348c97df44 630 #define HAL_DATAIN2_DFSDM2_DATAIN3 SYSCFG_MCHDLYCR_DFSDM2D2SEL
lypinator 0:bb348c97df44 631 #define HAL_DATAIN2_DFSDM1_PAD 0x00000000U
lypinator 0:bb348c97df44 632 #define HAL_DATAIN2_DFSDM1_DATAIN3 SYSCFG_MCHDLYCR_DFSDM1D2SEL
lypinator 0:bb348c97df44 633 /**
lypinator 0:bb348c97df44 634 * @}
lypinator 0:bb348c97df44 635 */
lypinator 0:bb348c97df44 636
lypinator 0:bb348c97df44 637 /** @defgroup DFSDM_DATAIN4_SOURCE DFSDM Source Selection For DATAIN4
lypinator 0:bb348c97df44 638 * @{
lypinator 0:bb348c97df44 639 */
lypinator 0:bb348c97df44 640 #define HAL_DATAIN4_DFSDM2_PAD 0x00000000U
lypinator 0:bb348c97df44 641 #define HAL_DATAIN4_DFSDM2_DATAIN5 SYSCFG_MCHDLYCR_DFSDM2D4SEL
lypinator 0:bb348c97df44 642 /**
lypinator 0:bb348c97df44 643 * @}
lypinator 0:bb348c97df44 644 */
lypinator 0:bb348c97df44 645
lypinator 0:bb348c97df44 646 /** @defgroup DFSDM_DATAIN6_SOURCE DFSDM Source Selection For DATAIN6
lypinator 0:bb348c97df44 647 * @{
lypinator 0:bb348c97df44 648 */
lypinator 0:bb348c97df44 649 #define HAL_DATAIN6_DFSDM2_PAD 0x00000000U
lypinator 0:bb348c97df44 650 #define HAL_DATAIN6_DFSDM2_DATAIN7 SYSCFG_MCHDLYCR_DFSDM2D6SEL
lypinator 0:bb348c97df44 651 /**
lypinator 0:bb348c97df44 652 * @}
lypinator 0:bb348c97df44 653 */
lypinator 0:bb348c97df44 654
lypinator 0:bb348c97df44 655 /** @defgroup DFSDM1_CLKIN_SOURCE DFSDM1 Source Selection For CLKIN
lypinator 0:bb348c97df44 656 * @{
lypinator 0:bb348c97df44 657 */
lypinator 0:bb348c97df44 658 #define HAL_DFSDM1_CLKIN0_TIM4OC2 0x01000000U
lypinator 0:bb348c97df44 659 #define HAL_DFSDM1_CLKIN2_TIM4OC2 SYSCFG_MCHDLYCR_DFSDM1CK02SEL
lypinator 0:bb348c97df44 660 #define HAL_DFSDM1_CLKIN1_TIM4OC1 0x02000000U
lypinator 0:bb348c97df44 661 #define HAL_DFSDM1_CLKIN3_TIM4OC1 SYSCFG_MCHDLYCR_DFSDM1CK13SEL
lypinator 0:bb348c97df44 662 /**
lypinator 0:bb348c97df44 663 * @}
lypinator 0:bb348c97df44 664 */
lypinator 0:bb348c97df44 665
lypinator 0:bb348c97df44 666 /** @defgroup DFSDM2_CLKIN_SOURCE DFSDM2 Source Selection For CLKIN
lypinator 0:bb348c97df44 667 * @{
lypinator 0:bb348c97df44 668 */
lypinator 0:bb348c97df44 669 #define HAL_DFSDM2_CLKIN0_TIM3OC4 0x04000000U
lypinator 0:bb348c97df44 670 #define HAL_DFSDM2_CLKIN4_TIM3OC4 SYSCFG_MCHDLYCR_DFSDM2CK04SEL
lypinator 0:bb348c97df44 671 #define HAL_DFSDM2_CLKIN1_TIM3OC3 0x08000000U
lypinator 0:bb348c97df44 672 #define HAL_DFSDM2_CLKIN5_TIM3OC3 SYSCFG_MCHDLYCR_DFSDM2CK15SEL
lypinator 0:bb348c97df44 673 #define HAL_DFSDM2_CLKIN2_TIM3OC2 0x10000000U
lypinator 0:bb348c97df44 674 #define HAL_DFSDM2_CLKIN6_TIM3OC2 SYSCFG_MCHDLYCR_DFSDM2CK26SEL
lypinator 0:bb348c97df44 675 #define HAL_DFSDM2_CLKIN3_TIM3OC1 0x00000000U
lypinator 0:bb348c97df44 676 #define HAL_DFSDM2_CLKIN7_TIM3OC1 SYSCFG_MCHDLYCR_DFSDM2CK37SEL
lypinator 0:bb348c97df44 677 /**
lypinator 0:bb348c97df44 678 * @}
lypinator 0:bb348c97df44 679 */
lypinator 0:bb348c97df44 680
lypinator 0:bb348c97df44 681 #endif /* SYSCFG_MCHDLYCR_BSCKSEL*/
lypinator 0:bb348c97df44 682 /**
lypinator 0:bb348c97df44 683 * @}
lypinator 0:bb348c97df44 684 */
lypinator 0:bb348c97df44 685 /* End of exported constants -------------------------------------------------*/
lypinator 0:bb348c97df44 686
lypinator 0:bb348c97df44 687 /* Exported macros -----------------------------------------------------------*/
lypinator 0:bb348c97df44 688 /** @defgroup DFSDM_Exported_Macros DFSDM Exported Macros
lypinator 0:bb348c97df44 689 * @{
lypinator 0:bb348c97df44 690 */
lypinator 0:bb348c97df44 691
lypinator 0:bb348c97df44 692 /** @brief Reset DFSDM channel handle state.
lypinator 0:bb348c97df44 693 * @param __HANDLE__ DFSDM channel handle.
lypinator 0:bb348c97df44 694 * @retval None
lypinator 0:bb348c97df44 695 */
lypinator 0:bb348c97df44 696 #define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET)
lypinator 0:bb348c97df44 697
lypinator 0:bb348c97df44 698 /** @brief Reset DFSDM filter handle state.
lypinator 0:bb348c97df44 699 * @param __HANDLE__ DFSDM filter handle.
lypinator 0:bb348c97df44 700 * @retval None
lypinator 0:bb348c97df44 701 */
lypinator 0:bb348c97df44 702 #define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET)
lypinator 0:bb348c97df44 703
lypinator 0:bb348c97df44 704 /**
lypinator 0:bb348c97df44 705 * @}
lypinator 0:bb348c97df44 706 */
lypinator 0:bb348c97df44 707 /* End of exported macros ----------------------------------------------------*/
lypinator 0:bb348c97df44 708
lypinator 0:bb348c97df44 709 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 710 /** @addtogroup DFSDM_Exported_Functions DFSDM Exported Functions
lypinator 0:bb348c97df44 711 * @{
lypinator 0:bb348c97df44 712 */
lypinator 0:bb348c97df44 713
lypinator 0:bb348c97df44 714 /** @addtogroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
lypinator 0:bb348c97df44 715 * @{
lypinator 0:bb348c97df44 716 */
lypinator 0:bb348c97df44 717 /* Channel initialization and de-initialization functions *********************/
lypinator 0:bb348c97df44 718 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 719 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 720 void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 721 void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 722 /**
lypinator 0:bb348c97df44 723 * @}
lypinator 0:bb348c97df44 724 */
lypinator 0:bb348c97df44 725
lypinator 0:bb348c97df44 726 /** @addtogroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
lypinator 0:bb348c97df44 727 * @{
lypinator 0:bb348c97df44 728 */
lypinator 0:bb348c97df44 729 /* Channel operation functions ************************************************/
lypinator 0:bb348c97df44 730 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 731 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 732 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 733 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 734
lypinator 0:bb348c97df44 735 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
lypinator 0:bb348c97df44 736 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
lypinator 0:bb348c97df44 737 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 738 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 739
lypinator 0:bb348c97df44 740 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 741 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, int32_t Offset);
lypinator 0:bb348c97df44 742
lypinator 0:bb348c97df44 743 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
lypinator 0:bb348c97df44 744 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
lypinator 0:bb348c97df44 745
lypinator 0:bb348c97df44 746 void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 747 void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 748 /**
lypinator 0:bb348c97df44 749 * @}
lypinator 0:bb348c97df44 750 */
lypinator 0:bb348c97df44 751
lypinator 0:bb348c97df44 752 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
lypinator 0:bb348c97df44 753 * @{
lypinator 0:bb348c97df44 754 */
lypinator 0:bb348c97df44 755 /* Channel state function *****************************************************/
lypinator 0:bb348c97df44 756 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
lypinator 0:bb348c97df44 757 /**
lypinator 0:bb348c97df44 758 * @}
lypinator 0:bb348c97df44 759 */
lypinator 0:bb348c97df44 760
lypinator 0:bb348c97df44 761 /** @addtogroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
lypinator 0:bb348c97df44 762 * @{
lypinator 0:bb348c97df44 763 */
lypinator 0:bb348c97df44 764 /* Filter initialization and de-initialization functions *********************/
lypinator 0:bb348c97df44 765 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 766 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 767 void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 768 void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 769 /**
lypinator 0:bb348c97df44 770 * @}
lypinator 0:bb348c97df44 771 */
lypinator 0:bb348c97df44 772
lypinator 0:bb348c97df44 773 /** @addtogroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
lypinator 0:bb348c97df44 774 * @{
lypinator 0:bb348c97df44 775 */
lypinator 0:bb348c97df44 776 /* Filter control functions *********************/
lypinator 0:bb348c97df44 777 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator 0:bb348c97df44 778 uint32_t Channel,
lypinator 0:bb348c97df44 779 uint32_t ContinuousMode);
lypinator 0:bb348c97df44 780 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator 0:bb348c97df44 781 uint32_t Channel);
lypinator 0:bb348c97df44 782 /**
lypinator 0:bb348c97df44 783 * @}
lypinator 0:bb348c97df44 784 */
lypinator 0:bb348c97df44 785
lypinator 0:bb348c97df44 786 /** @addtogroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
lypinator 0:bb348c97df44 787 * @{
lypinator 0:bb348c97df44 788 */
lypinator 0:bb348c97df44 789 /* Filter operation functions *********************/
lypinator 0:bb348c97df44 790 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 791 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 792 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
lypinator 0:bb348c97df44 793 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
lypinator 0:bb348c97df44 794 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 795 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 796 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 797 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 798 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 799 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
lypinator 0:bb348c97df44 800 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
lypinator 0:bb348c97df44 801 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 802 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 803 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 804 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator 0:bb348c97df44 805 DFSDM_Filter_AwdParamTypeDef* awdParam);
lypinator 0:bb348c97df44 806 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 807 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel);
lypinator 0:bb348c97df44 808 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 809
lypinator 0:bb348c97df44 810 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
lypinator 0:bb348c97df44 811 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
lypinator 0:bb348c97df44 812 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
lypinator 0:bb348c97df44 813 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
lypinator 0:bb348c97df44 814 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 815
lypinator 0:bb348c97df44 816 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 817
lypinator 0:bb348c97df44 818 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
lypinator 0:bb348c97df44 819 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
lypinator 0:bb348c97df44 820
lypinator 0:bb348c97df44 821 void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 822 void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 823 void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 824 void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 825 void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold);
lypinator 0:bb348c97df44 826 void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 827 /**
lypinator 0:bb348c97df44 828 * @}
lypinator 0:bb348c97df44 829 */
lypinator 0:bb348c97df44 830
lypinator 0:bb348c97df44 831 /** @addtogroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
lypinator 0:bb348c97df44 832 * @{
lypinator 0:bb348c97df44 833 */
lypinator 0:bb348c97df44 834 /* Filter state functions *****************************************************/
lypinator 0:bb348c97df44 835 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 836 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator 0:bb348c97df44 837 /**
lypinator 0:bb348c97df44 838 * @}
lypinator 0:bb348c97df44 839 */
lypinator 0:bb348c97df44 840 /** @addtogroup DFSDM_Exported_Functions_Group5_Filter MultiChannel operation functions
lypinator 0:bb348c97df44 841 * @{
lypinator 0:bb348c97df44 842 */
lypinator 0:bb348c97df44 843 #if defined(SYSCFG_MCHDLYCR_BSCKSEL)
lypinator 0:bb348c97df44 844 void HAL_DFSDM_ConfigMultiChannelDelay(DFSDM_MultiChannelConfigTypeDef* mchdlystruct);
lypinator 0:bb348c97df44 845 void HAL_DFSDM_BitstreamClock_Start(void);
lypinator 0:bb348c97df44 846 void HAL_DFSDM_BitstreamClock_Stop(void);
lypinator 0:bb348c97df44 847 void HAL_DFSDM_DisableDelayClock(uint32_t MCHDLY);
lypinator 0:bb348c97df44 848 void HAL_DFSDM_EnableDelayClock(uint32_t MCHDLY);
lypinator 0:bb348c97df44 849 void HAL_DFSDM_ClockIn_SourceSelection(uint32_t source);
lypinator 0:bb348c97df44 850 void HAL_DFSDM_ClockOut_SourceSelection(uint32_t source);
lypinator 0:bb348c97df44 851 void HAL_DFSDM_DataIn0_SourceSelection(uint32_t source);
lypinator 0:bb348c97df44 852 void HAL_DFSDM_DataIn2_SourceSelection(uint32_t source);
lypinator 0:bb348c97df44 853 void HAL_DFSDM_DataIn4_SourceSelection(uint32_t source);
lypinator 0:bb348c97df44 854 void HAL_DFSDM_DataIn6_SourceSelection(uint32_t source);
lypinator 0:bb348c97df44 855 void HAL_DFSDM_BitStreamClkDistribution_Config(uint32_t source);
lypinator 0:bb348c97df44 856 #endif /* SYSCFG_MCHDLYCR_BSCKSEL */
lypinator 0:bb348c97df44 857 /**
lypinator 0:bb348c97df44 858 * @}
lypinator 0:bb348c97df44 859 */
lypinator 0:bb348c97df44 860 /**
lypinator 0:bb348c97df44 861 * @}
lypinator 0:bb348c97df44 862 */
lypinator 0:bb348c97df44 863 /* End of exported functions -------------------------------------------------*/
lypinator 0:bb348c97df44 864
lypinator 0:bb348c97df44 865 /* Private macros ------------------------------------------------------------*/
lypinator 0:bb348c97df44 866 /** @defgroup DFSDM_Private_Macros DFSDM Private Macros
lypinator 0:bb348c97df44 867 * @{
lypinator 0:bb348c97df44 868 */
lypinator 0:bb348c97df44 869 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK(CLOCK) (((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM) || \
lypinator 0:bb348c97df44 870 ((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO))
lypinator 0:bb348c97df44 871 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(DIVIDER) ((2U <= (DIVIDER)) && ((DIVIDER) <= 256U))
lypinator 0:bb348c97df44 872 #define IS_DFSDM_CHANNEL_INPUT(INPUT) (((INPUT) == DFSDM_CHANNEL_EXTERNAL_INPUTS) || \
lypinator 0:bb348c97df44 873 ((INPUT) == DFSDM_CHANNEL_INTERNAL_REGISTER))
lypinator 0:bb348c97df44 874 #define IS_DFSDM_CHANNEL_DATA_PACKING(MODE) (((MODE) == DFSDM_CHANNEL_STANDARD_MODE) || \
lypinator 0:bb348c97df44 875 ((MODE) == DFSDM_CHANNEL_INTERLEAVED_MODE) || \
lypinator 0:bb348c97df44 876 ((MODE) == DFSDM_CHANNEL_DUAL_MODE))
lypinator 0:bb348c97df44 877 #define IS_DFSDM_CHANNEL_INPUT_PINS(PINS) (((PINS) == DFSDM_CHANNEL_SAME_CHANNEL_PINS) || \
lypinator 0:bb348c97df44 878 ((PINS) == DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS))
lypinator 0:bb348c97df44 879 #define IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(MODE) (((MODE) == DFSDM_CHANNEL_SPI_RISING) || \
lypinator 0:bb348c97df44 880 ((MODE) == DFSDM_CHANNEL_SPI_FALLING) || \
lypinator 0:bb348c97df44 881 ((MODE) == DFSDM_CHANNEL_MANCHESTER_RISING) || \
lypinator 0:bb348c97df44 882 ((MODE) == DFSDM_CHANNEL_MANCHESTER_FALLING))
lypinator 0:bb348c97df44 883 #define IS_DFSDM_CHANNEL_SPI_CLOCK(TYPE) (((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL) || \
lypinator 0:bb348c97df44 884 ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL) || \
lypinator 0:bb348c97df44 885 ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING) || \
lypinator 0:bb348c97df44 886 ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING))
lypinator 0:bb348c97df44 887 #define IS_DFSDM_CHANNEL_FILTER_ORDER(ORDER) (((ORDER) == DFSDM_CHANNEL_FASTSINC_ORDER) || \
lypinator 0:bb348c97df44 888 ((ORDER) == DFSDM_CHANNEL_SINC1_ORDER) || \
lypinator 0:bb348c97df44 889 ((ORDER) == DFSDM_CHANNEL_SINC2_ORDER) || \
lypinator 0:bb348c97df44 890 ((ORDER) == DFSDM_CHANNEL_SINC3_ORDER))
lypinator 0:bb348c97df44 891 #define IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 32U))
lypinator 0:bb348c97df44 892 #define IS_DFSDM_CHANNEL_OFFSET(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
lypinator 0:bb348c97df44 893 #define IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(VALUE) ((VALUE) <= 0x1FU)
lypinator 0:bb348c97df44 894 #define IS_DFSDM_CHANNEL_SCD_THRESHOLD(VALUE) ((VALUE) <= 0xFFU)
lypinator 0:bb348c97df44 895 #define IS_DFSDM_FILTER_REG_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
lypinator 0:bb348c97df44 896 ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER))
lypinator 0:bb348c97df44 897 #define IS_DFSDM_FILTER_INJ_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
lypinator 0:bb348c97df44 898 ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER) || \
lypinator 0:bb348c97df44 899 ((TRIG) == DFSDM_FILTER_EXT_TRIGGER))
lypinator 0:bb348c97df44 900 #if defined (STM32F413xx) || defined (STM32F423xx)
lypinator 0:bb348c97df44 901 #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \
lypinator 0:bb348c97df44 902 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \
lypinator 0:bb348c97df44 903 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO) || \
lypinator 0:bb348c97df44 904 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM10_OC1) || \
lypinator 0:bb348c97df44 905 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM2_TRGO) || \
lypinator 0:bb348c97df44 906 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM4_TRGO) || \
lypinator 0:bb348c97df44 907 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM11_OC1) || \
lypinator 0:bb348c97df44 908 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \
lypinator 0:bb348c97df44 909 ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \
lypinator 0:bb348c97df44 910 ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15))
lypinator 0:bb348c97df44 911 #define IS_DFSDM_DELAY_CLOCK(CLOCK) (((CLOCK) == HAL_MCHDLY_CLOCK_DFSDM2) || \
lypinator 0:bb348c97df44 912 ((CLOCK) == HAL_MCHDLY_CLOCK_DFSDM1))
lypinator 0:bb348c97df44 913 #else
lypinator 0:bb348c97df44 914 #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \
lypinator 0:bb348c97df44 915 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \
lypinator 0:bb348c97df44 916 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO) || \
lypinator 0:bb348c97df44 917 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM10_OC1) || \
lypinator 0:bb348c97df44 918 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM4_TRGO) || \
lypinator 0:bb348c97df44 919 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \
lypinator 0:bb348c97df44 920 ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \
lypinator 0:bb348c97df44 921 ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15))
lypinator 0:bb348c97df44 922 #endif
lypinator 0:bb348c97df44 923 #define IS_DFSDM_FILTER_EXT_TRIG_EDGE(EDGE) (((EDGE) == DFSDM_FILTER_EXT_TRIG_RISING_EDGE) || \
lypinator 0:bb348c97df44 924 ((EDGE) == DFSDM_FILTER_EXT_TRIG_FALLING_EDGE) || \
lypinator 0:bb348c97df44 925 ((EDGE) == DFSDM_FILTER_EXT_TRIG_BOTH_EDGES))
lypinator 0:bb348c97df44 926 #define IS_DFSDM_FILTER_SINC_ORDER(ORDER) (((ORDER) == DFSDM_FILTER_FASTSINC_ORDER) || \
lypinator 0:bb348c97df44 927 ((ORDER) == DFSDM_FILTER_SINC1_ORDER) || \
lypinator 0:bb348c97df44 928 ((ORDER) == DFSDM_FILTER_SINC2_ORDER) || \
lypinator 0:bb348c97df44 929 ((ORDER) == DFSDM_FILTER_SINC3_ORDER) || \
lypinator 0:bb348c97df44 930 ((ORDER) == DFSDM_FILTER_SINC4_ORDER) || \
lypinator 0:bb348c97df44 931 ((ORDER) == DFSDM_FILTER_SINC5_ORDER))
lypinator 0:bb348c97df44 932 #define IS_DFSDM_FILTER_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 1024U))
lypinator 0:bb348c97df44 933 #define IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 256U))
lypinator 0:bb348c97df44 934 #define IS_DFSDM_FILTER_AWD_DATA_SOURCE(DATA) (((DATA) == DFSDM_FILTER_AWD_FILTER_DATA) || \
lypinator 0:bb348c97df44 935 ((DATA) == DFSDM_FILTER_AWD_CHANNEL_DATA))
lypinator 0:bb348c97df44 936 #define IS_DFSDM_FILTER_AWD_THRESHOLD(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
lypinator 0:bb348c97df44 937 #define IS_DFSDM_BREAK_SIGNALS(VALUE) ((VALUE) <= 0x0FU)
lypinator 0:bb348c97df44 938 #if defined(DFSDM2_Channel0)
lypinator 0:bb348c97df44 939 #define IS_DFSDM_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == DFSDM_CHANNEL_0) || \
lypinator 0:bb348c97df44 940 ((CHANNEL) == DFSDM_CHANNEL_1) || \
lypinator 0:bb348c97df44 941 ((CHANNEL) == DFSDM_CHANNEL_2) || \
lypinator 0:bb348c97df44 942 ((CHANNEL) == DFSDM_CHANNEL_3) || \
lypinator 0:bb348c97df44 943 ((CHANNEL) == DFSDM_CHANNEL_4) || \
lypinator 0:bb348c97df44 944 ((CHANNEL) == DFSDM_CHANNEL_5) || \
lypinator 0:bb348c97df44 945 ((CHANNEL) == DFSDM_CHANNEL_6) || \
lypinator 0:bb348c97df44 946 ((CHANNEL) == DFSDM_CHANNEL_7))
lypinator 0:bb348c97df44 947 #define IS_DFSDM_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0U) && ((CHANNEL) <= 0x000F00FFU))
lypinator 0:bb348c97df44 948 #else
lypinator 0:bb348c97df44 949 #define IS_DFSDM_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == DFSDM_CHANNEL_0) || \
lypinator 0:bb348c97df44 950 ((CHANNEL) == DFSDM_CHANNEL_1) || \
lypinator 0:bb348c97df44 951 ((CHANNEL) == DFSDM_CHANNEL_2) || \
lypinator 0:bb348c97df44 952 ((CHANNEL) == DFSDM_CHANNEL_3))
lypinator 0:bb348c97df44 953 #define IS_DFSDM_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0U) && ((CHANNEL) <= 0x0003000FU))
lypinator 0:bb348c97df44 954 #endif
lypinator 0:bb348c97df44 955 #define IS_DFSDM_CONTINUOUS_MODE(MODE) (((MODE) == DFSDM_CONTINUOUS_CONV_OFF) || \
lypinator 0:bb348c97df44 956 ((MODE) == DFSDM_CONTINUOUS_CONV_ON))
lypinator 0:bb348c97df44 957 #if defined(DFSDM2_Channel0)
lypinator 0:bb348c97df44 958 #define IS_DFSDM1_CHANNEL_INSTANCE(INSTANCE) (((INSTANCE) == DFSDM1_Channel0) || \
lypinator 0:bb348c97df44 959 ((INSTANCE) == DFSDM1_Channel1) || \
lypinator 0:bb348c97df44 960 ((INSTANCE) == DFSDM1_Channel2) || \
lypinator 0:bb348c97df44 961 ((INSTANCE) == DFSDM1_Channel3))
lypinator 0:bb348c97df44 962 #define IS_DFSDM1_FILTER_INSTANCE(INSTANCE) (((INSTANCE) == DFSDM1_Filter0) || \
lypinator 0:bb348c97df44 963 ((INSTANCE) == DFSDM1_Filter1))
lypinator 0:bb348c97df44 964 #endif /* DFSDM2_Channel0 */
lypinator 0:bb348c97df44 965
lypinator 0:bb348c97df44 966 #if defined(SYSCFG_MCHDLYCR_BSCKSEL)
lypinator 0:bb348c97df44 967 #define IS_DFSDM_CLOCKIN_SELECTION(SELECTION) (((SELECTION) == HAL_DFSDM2_CKIN_PAD) || \
lypinator 0:bb348c97df44 968 ((SELECTION) == HAL_DFSDM2_CKIN_DM) || \
lypinator 0:bb348c97df44 969 ((SELECTION) == HAL_DFSDM1_CKIN_PAD) || \
lypinator 0:bb348c97df44 970 ((SELECTION) == HAL_DFSDM1_CKIN_DM))
lypinator 0:bb348c97df44 971 #define IS_DFSDM_CLOCKOUT_SELECTION(SELECTION) (((SELECTION) == HAL_DFSDM2_CKOUT_DFSDM2) || \
lypinator 0:bb348c97df44 972 ((SELECTION) == HAL_DFSDM2_CKOUT_M27) || \
lypinator 0:bb348c97df44 973 ((SELECTION) == HAL_DFSDM1_CKOUT_DFSDM1) || \
lypinator 0:bb348c97df44 974 ((SELECTION) == HAL_DFSDM1_CKOUT_M27))
lypinator 0:bb348c97df44 975 #define IS_DFSDM_DATAIN0_SRC_SELECTION(SELECTION) (((SELECTION) == HAL_DATAIN0_DFSDM2_PAD) || \
lypinator 0:bb348c97df44 976 ((SELECTION) == HAL_DATAIN0_DFSDM2_DATAIN1) || \
lypinator 0:bb348c97df44 977 ((SELECTION) == HAL_DATAIN0_DFSDM1_PAD) || \
lypinator 0:bb348c97df44 978 ((SELECTION) == HAL_DATAIN0_DFSDM1_DATAIN1))
lypinator 0:bb348c97df44 979 #define IS_DFSDM_DATAIN2_SRC_SELECTION(SELECTION) (((SELECTION) == HAL_DATAIN2_DFSDM2_PAD) || \
lypinator 0:bb348c97df44 980 ((SELECTION) == HAL_DATAIN2_DFSDM2_DATAIN3) || \
lypinator 0:bb348c97df44 981 ((SELECTION) == HAL_DATAIN2_DFSDM1_PAD) || \
lypinator 0:bb348c97df44 982 ((SELECTION) == HAL_DATAIN2_DFSDM1_DATAIN3))
lypinator 0:bb348c97df44 983 #define IS_DFSDM_DATAIN4_SRC_SELECTION(SELECTION) (((SELECTION) == HAL_DATAIN4_DFSDM2_PAD) || \
lypinator 0:bb348c97df44 984 ((SELECTION) == HAL_DATAIN4_DFSDM2_DATAIN5))
lypinator 0:bb348c97df44 985 #define IS_DFSDM_DATAIN6_SRC_SELECTION(SELECTION) (((SELECTION) == HAL_DATAIN6_DFSDM2_PAD) || \
lypinator 0:bb348c97df44 986 ((SELECTION) == HAL_DATAIN6_DFSDM2_DATAIN7))
lypinator 0:bb348c97df44 987 #define IS_DFSDM_BITSTREM_CLK_DISTRIBUTION(DISTRIBUTION) (((DISTRIBUTION) == HAL_DFSDM1_CLKIN0_TIM4OC2) || \
lypinator 0:bb348c97df44 988 ((DISTRIBUTION) == HAL_DFSDM1_CLKIN2_TIM4OC2) || \
lypinator 0:bb348c97df44 989 ((DISTRIBUTION) == HAL_DFSDM1_CLKIN1_TIM4OC1) || \
lypinator 0:bb348c97df44 990 ((DISTRIBUTION) == HAL_DFSDM1_CLKIN3_TIM4OC1) || \
lypinator 0:bb348c97df44 991 ((DISTRIBUTION) == HAL_DFSDM2_CLKIN0_TIM3OC4) || \
lypinator 0:bb348c97df44 992 ((DISTRIBUTION) == HAL_DFSDM2_CLKIN4_TIM3OC4) || \
lypinator 0:bb348c97df44 993 ((DISTRIBUTION) == HAL_DFSDM2_CLKIN1_TIM3OC3)|| \
lypinator 0:bb348c97df44 994 ((DISTRIBUTION) == HAL_DFSDM2_CLKIN5_TIM3OC3) || \
lypinator 0:bb348c97df44 995 ((DISTRIBUTION) == HAL_DFSDM2_CLKIN2_TIM3OC2) || \
lypinator 0:bb348c97df44 996 ((DISTRIBUTION) == HAL_DFSDM2_CLKIN6_TIM3OC2) || \
lypinator 0:bb348c97df44 997 ((DISTRIBUTION) == HAL_DFSDM2_CLKIN3_TIM3OC1)|| \
lypinator 0:bb348c97df44 998 ((DISTRIBUTION) == HAL_DFSDM2_CLKIN7_TIM3OC1))
lypinator 0:bb348c97df44 999 #define IS_DFSDM_DFSDM1_CLKOUT(CLKOUT) (((CLKOUT) == DFSDM1_CKOUT_DFSDM2_CKOUT) || \
lypinator 0:bb348c97df44 1000 ((CLKOUT) == DFSDM1_CKOUT_DFSDM1))
lypinator 0:bb348c97df44 1001 #define IS_DFSDM_DFSDM2_CLKOUT(CLKOUT) (((CLKOUT) == DFSDM2_CKOUT_DFSDM2_CKOUT) || \
lypinator 0:bb348c97df44 1002 ((CLKOUT) == DFSDM2_CKOUT_DFSDM2))
lypinator 0:bb348c97df44 1003 #define IS_DFSDM_DFSDM1_CLKIN(CLKIN) (((CLKIN) == DFSDM1_CKIN_DFSDM2_CKOUT) || \
lypinator 0:bb348c97df44 1004 ((CLKIN) == DFSDM1_CKIN_PAD))
lypinator 0:bb348c97df44 1005 #define IS_DFSDM_DFSDM2_CLKIN(CLKIN) (((CLKIN) == DFSDM2_CKIN_DFSDM2_CKOUT) || \
lypinator 0:bb348c97df44 1006 ((CLKIN) == DFSDM2_CKIN_PAD))
lypinator 0:bb348c97df44 1007 #define IS_DFSDM_DFSDM1_BIT_CLK(CLK) (((CLK) == DFSDM1_T4_OC2_BITSTREAM_CKIN0) || \
lypinator 0:bb348c97df44 1008 ((CLK) == DFSDM1_T4_OC2_BITSTREAM_CKIN2) || \
lypinator 0:bb348c97df44 1009 ((CLK) == DFSDM1_T4_OC1_BITSTREAM_CKIN3) || \
lypinator 0:bb348c97df44 1010 ((CLK) == DFSDM1_T4_OC1_BITSTREAM_CKIN1) || \
lypinator 0:bb348c97df44 1011 ((CLK) <= 0x30U))
lypinator 0:bb348c97df44 1012
lypinator 0:bb348c97df44 1013 #define IS_DFSDM_DFSDM2_BIT_CLK(CLK) (((CLK) == DFSDM2_T3_OC4_BITSTREAM_CKIN0) || \
lypinator 0:bb348c97df44 1014 ((CLK) == DFSDM2_T3_OC4_BITSTREAM_CKIN4) || \
lypinator 0:bb348c97df44 1015 ((CLK) == DFSDM2_T3_OC3_BITSTREAM_CKIN5) || \
lypinator 0:bb348c97df44 1016 ((CLK) == DFSDM2_T3_OC3_BITSTREAM_CKIN1) || \
lypinator 0:bb348c97df44 1017 ((CLK) == DFSDM2_T3_OC2_BITSTREAM_CKIN6) || \
lypinator 0:bb348c97df44 1018 ((CLK) == DFSDM2_T3_OC2_BITSTREAM_CKIN2) || \
lypinator 0:bb348c97df44 1019 ((CLK) == DFSDM2_T3_OC1_BITSTREAM_CKIN3) || \
lypinator 0:bb348c97df44 1020 ((CLK) == DFSDM2_T3_OC1_BITSTREAM_CKIN7)|| \
lypinator 0:bb348c97df44 1021 ((CLK) <= 0x1E000U))
lypinator 0:bb348c97df44 1022
lypinator 0:bb348c97df44 1023 #define IS_DFSDM_DFSDM1_DATA_DISTRIBUTION(DISTRIBUTION)(((DISTRIBUTION) == DFSDM1_DATIN0_TO_DATIN0_PAD )|| \
lypinator 0:bb348c97df44 1024 ((DISTRIBUTION) == DFSDM1_DATIN0_TO_DATIN1_PAD) || \
lypinator 0:bb348c97df44 1025 ((DISTRIBUTION) == DFSDM1_DATIN2_TO_DATIN2_PAD) || \
lypinator 0:bb348c97df44 1026 ((DISTRIBUTION) == DFSDM1_DATIN2_TO_DATIN3_PAD)|| \
lypinator 0:bb348c97df44 1027 ((DISTRIBUTION) <= 0xCU))
lypinator 0:bb348c97df44 1028
lypinator 0:bb348c97df44 1029 #define IS_DFSDM_DFSDM2_DATA_DISTRIBUTION(DISTRIBUTION)(((DISTRIBUTION) == DFSDM2_DATIN0_TO_DATIN0_PAD)|| \
lypinator 0:bb348c97df44 1030 ((DISTRIBUTION) == DFSDM2_DATIN0_TO_DATIN1_PAD)|| \
lypinator 0:bb348c97df44 1031 ((DISTRIBUTION) == DFSDM2_DATIN2_TO_DATIN2_PAD)|| \
lypinator 0:bb348c97df44 1032 ((DISTRIBUTION) == DFSDM2_DATIN2_TO_DATIN3_PAD)|| \
lypinator 0:bb348c97df44 1033 ((DISTRIBUTION) == DFSDM2_DATIN4_TO_DATIN4_PAD)|| \
lypinator 0:bb348c97df44 1034 ((DISTRIBUTION) == DFSDM2_DATIN4_TO_DATIN5_PAD)|| \
lypinator 0:bb348c97df44 1035 ((DISTRIBUTION) == DFSDM2_DATIN6_TO_DATIN6_PAD)|| \
lypinator 0:bb348c97df44 1036 ((DISTRIBUTION) == DFSDM2_DATIN6_TO_DATIN7_PAD)|| \
lypinator 0:bb348c97df44 1037 ((DISTRIBUTION) <= 0x1D00U))
lypinator 0:bb348c97df44 1038 #endif /* (SYSCFG_MCHDLYCR_BSCKSEL) */
lypinator 0:bb348c97df44 1039 /**
lypinator 0:bb348c97df44 1040 * @}
lypinator 0:bb348c97df44 1041 */
lypinator 0:bb348c97df44 1042 /* End of private macros -----------------------------------------------------*/
lypinator 0:bb348c97df44 1043
lypinator 0:bb348c97df44 1044 /**
lypinator 0:bb348c97df44 1045 * @}
lypinator 0:bb348c97df44 1046 */
lypinator 0:bb348c97df44 1047
lypinator 0:bb348c97df44 1048 /**
lypinator 0:bb348c97df44 1049 * @}
lypinator 0:bb348c97df44 1050 */
lypinator 0:bb348c97df44 1051 #endif /* STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
lypinator 0:bb348c97df44 1052 #ifdef __cplusplus
lypinator 0:bb348c97df44 1053 }
lypinator 0:bb348c97df44 1054 #endif
lypinator 0:bb348c97df44 1055
lypinator 0:bb348c97df44 1056 #endif /* __STM32F4xx_HAL_DFSDM_H */
lypinator 0:bb348c97df44 1057
lypinator 0:bb348c97df44 1058 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/