DevLibMemoryController - Initial commit

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Initial commit

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dfsdm.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:: lypinator
Date:: Wed Sep 16 01:11:49 2020 +0000
Revision:: 0:bb348c97df44

Added PWM

Who changed what in which revision?

User	Revision	Line number	New contents of line
lypinator	0:bb348c97df44	1	/**
lypinator	0:bb348c97df44	2	******************************************************************************
lypinator	0:bb348c97df44	3	* @file stm32f4xx_hal_dfsdm.c
lypinator	0:bb348c97df44	4	* @author MCD Application Team
lypinator	0:bb348c97df44	5	* @brief This file provides firmware functions to manage the following
lypinator	0:bb348c97df44	6	* functionalities of the Digital Filter for Sigma-Delta Modulators
lypinator	0:bb348c97df44	7	* (DFSDM) peripherals:
lypinator	0:bb348c97df44	8	* + Initialization and configuration of channels and filters
lypinator	0:bb348c97df44	9	* + Regular channels configuration
lypinator	0:bb348c97df44	10	* + Injected channels configuration
lypinator	0:bb348c97df44	11	* + Regular/Injected Channels DMA Configuration
lypinator	0:bb348c97df44	12	* + Interrupts and flags management
lypinator	0:bb348c97df44	13	* + Analog watchdog feature
lypinator	0:bb348c97df44	14	* + Short-circuit detector feature
lypinator	0:bb348c97df44	15	* + Extremes detector feature
lypinator	0:bb348c97df44	16	* + Clock absence detector feature
lypinator	0:bb348c97df44	17	* + Break generation on analog watchdog or short-circuit event
lypinator	0:bb348c97df44	18	*
lypinator	0:bb348c97df44	19	@verbatim
lypinator	0:bb348c97df44	20	==============================================================================
lypinator	0:bb348c97df44	21	##### How to use this driver #####
lypinator	0:bb348c97df44	22	==============================================================================
lypinator	0:bb348c97df44	23	[..]
lypinator	0:bb348c97df44	24	* Channel initialization *
lypinator	0:bb348c97df44	25	==============================
lypinator	0:bb348c97df44	26	[..]
lypinator	0:bb348c97df44	27	(#) User has first to initialize channels (before filters initialization).
lypinator	0:bb348c97df44	28	(#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
lypinator	0:bb348c97df44	29	(++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
lypinator	0:bb348c97df44	30	(++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
lypinator	0:bb348c97df44	31	(++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
lypinator	0:bb348c97df44	32	(++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
lypinator	0:bb348c97df44	33	interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
lypinator	0:bb348c97df44	34	(#) Configure the output clock, input, serial interface, analog watchdog,
lypinator	0:bb348c97df44	35	offset and data right bit shift parameters for this channel using the
lypinator	0:bb348c97df44	36	HAL_DFSDM_ChannelInit() function.
lypinator	0:bb348c97df44	37
lypinator	0:bb348c97df44	38	* Channel clock absence detector *
lypinator	0:bb348c97df44	39	======================================
lypinator	0:bb348c97df44	40	[..]
lypinator	0:bb348c97df44	41	(#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
lypinator	0:bb348c97df44	42	HAL_DFSDM_ChannelCkabStart_IT().
lypinator	0:bb348c97df44	43	(#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
lypinator	0:bb348c97df44	44	absence.
lypinator	0:bb348c97df44	45	(#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
lypinator	0:bb348c97df44	46	clock absence is detected.
lypinator	0:bb348c97df44	47	(#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
lypinator	0:bb348c97df44	48	HAL_DFSDM_ChannelCkabStop_IT().
lypinator	0:bb348c97df44	49	(#) Please note that the same mode (polling or interrupt) has to be used
lypinator	0:bb348c97df44	50	for all channels because the channels are sharing the same interrupt.
lypinator	0:bb348c97df44	51	(#) Please note also that in interrupt mode, if clock absence detector is
lypinator	0:bb348c97df44	52	stopped for one channel, interrupt will be disabled for all channels.
lypinator	0:bb348c97df44	53
lypinator	0:bb348c97df44	54	* Channel short circuit detector *
lypinator	0:bb348c97df44	55	======================================
lypinator	0:bb348c97df44	56	[..]
lypinator	0:bb348c97df44	57	(#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
lypinator	0:bb348c97df44	58	or HAL_DFSDM_ChannelScdStart_IT().
lypinator	0:bb348c97df44	59	(#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
lypinator	0:bb348c97df44	60	circuit.
lypinator	0:bb348c97df44	61	(#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
lypinator	0:bb348c97df44	62	short circuit is detected.
lypinator	0:bb348c97df44	63	(#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
lypinator	0:bb348c97df44	64	or HAL_DFSDM_ChannelScdStop_IT().
lypinator	0:bb348c97df44	65	(#) Please note that the same mode (polling or interrupt) has to be used
lypinator	0:bb348c97df44	66	for all channels because the channels are sharing the same interrupt.
lypinator	0:bb348c97df44	67	(#) Please note also that in interrupt mode, if short circuit detector is
lypinator	0:bb348c97df44	68	stopped for one channel, interrupt will be disabled for all channels.
lypinator	0:bb348c97df44	69
lypinator	0:bb348c97df44	70	* Channel analog watchdog value *
lypinator	0:bb348c97df44	71	=====================================
lypinator	0:bb348c97df44	72	[..]
lypinator	0:bb348c97df44	73	(#) Get analog watchdog filter value of a channel using
lypinator	0:bb348c97df44	74	HAL_DFSDM_ChannelGetAwdValue().
lypinator	0:bb348c97df44	75
lypinator	0:bb348c97df44	76	* Channel offset value *
lypinator	0:bb348c97df44	77	=====================================
lypinator	0:bb348c97df44	78	[..]
lypinator	0:bb348c97df44	79	(#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
lypinator	0:bb348c97df44	80
lypinator	0:bb348c97df44	81	* Filter initialization *
lypinator	0:bb348c97df44	82	=============================
lypinator	0:bb348c97df44	83	[..]
lypinator	0:bb348c97df44	84	(#) After channel initialization, user has to init filters.
lypinator	0:bb348c97df44	85	(#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
lypinator	0:bb348c97df44	86	(++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
lypinator	0:bb348c97df44	87	interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
lypinator	0:bb348c97df44	88	Please note that DFSDMz_FLT0 global interrupt could be already
lypinator	0:bb348c97df44	89	enabled if interrupt is used for channel.
lypinator	0:bb348c97df44	90	(++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
lypinator	0:bb348c97df44	91	with DFSDMz filter handle using __HAL_LINKDMA().
lypinator	0:bb348c97df44	92	(#) Configure the regular conversion, injected conversion and filter
lypinator	0:bb348c97df44	93	parameters for this filter using the HAL_DFSDM_FilterInit() function.
lypinator	0:bb348c97df44	94
lypinator	0:bb348c97df44	95	* Filter regular channel conversion *
lypinator	0:bb348c97df44	96	=========================================
lypinator	0:bb348c97df44	97	[..]
lypinator	0:bb348c97df44	98	(#) Select regular channel and enable/disable continuous mode using
lypinator	0:bb348c97df44	99	HAL_DFSDM_FilterConfigRegChannel().
lypinator	0:bb348c97df44	100	(#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
lypinator	0:bb348c97df44	101	HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
lypinator	0:bb348c97df44	102	HAL_DFSDM_FilterRegularMsbStart_DMA().
lypinator	0:bb348c97df44	103	(#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
lypinator	0:bb348c97df44	104	the end of regular conversion.
lypinator	0:bb348c97df44	105	(#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
lypinator	0:bb348c97df44	106	at the end of regular conversion.
lypinator	0:bb348c97df44	107	(#) Get value of regular conversion and corresponding channel using
lypinator	0:bb348c97df44	108	HAL_DFSDM_FilterGetRegularValue().
lypinator	0:bb348c97df44	109	(#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
lypinator	0:bb348c97df44	110	HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
lypinator	0:bb348c97df44	111	half transfer and at the transfer complete. Please note that
lypinator	0:bb348c97df44	112	HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
lypinator	0:bb348c97df44	113	circular mode.
lypinator	0:bb348c97df44	114	(#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
lypinator	0:bb348c97df44	115	HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
lypinator	0:bb348c97df44	116
lypinator	0:bb348c97df44	117	* Filter injected channels conversion *
lypinator	0:bb348c97df44	118	===========================================
lypinator	0:bb348c97df44	119	[..]
lypinator	0:bb348c97df44	120	(#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
lypinator	0:bb348c97df44	121	(#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
lypinator	0:bb348c97df44	122	HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
lypinator	0:bb348c97df44	123	HAL_DFSDM_FilterInjectedMsbStart_DMA().
lypinator	0:bb348c97df44	124	(#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
lypinator	0:bb348c97df44	125	the end of injected conversion.
lypinator	0:bb348c97df44	126	(#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
lypinator	0:bb348c97df44	127	at the end of injected conversion.
lypinator	0:bb348c97df44	128	(#) Get value of injected conversion and corresponding channel using
lypinator	0:bb348c97df44	129	HAL_DFSDM_FilterGetInjectedValue().
lypinator	0:bb348c97df44	130	(#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
lypinator	0:bb348c97df44	131	HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
lypinator	0:bb348c97df44	132	half transfer and at the transfer complete. Please note that
lypinator	0:bb348c97df44	133	HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
lypinator	0:bb348c97df44	134	circular mode.
lypinator	0:bb348c97df44	135	(#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
lypinator	0:bb348c97df44	136	HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
lypinator	0:bb348c97df44	137
lypinator	0:bb348c97df44	138	* Filter analog watchdog *
lypinator	0:bb348c97df44	139	==============================
lypinator	0:bb348c97df44	140	[..]
lypinator	0:bb348c97df44	141	(#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
lypinator	0:bb348c97df44	142	(#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
lypinator	0:bb348c97df44	143	(#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
lypinator	0:bb348c97df44	144
lypinator	0:bb348c97df44	145	* Filter extreme detector *
lypinator	0:bb348c97df44	146	===============================
lypinator	0:bb348c97df44	147	[..]
lypinator	0:bb348c97df44	148	(#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
lypinator	0:bb348c97df44	149	(#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
lypinator	0:bb348c97df44	150	(#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
lypinator	0:bb348c97df44	151	(#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
lypinator	0:bb348c97df44	152
lypinator	0:bb348c97df44	153	* Filter conversion time *
lypinator	0:bb348c97df44	154	==============================
lypinator	0:bb348c97df44	155	[..]
lypinator	0:bb348c97df44	156	(#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
lypinator	0:bb348c97df44	157
lypinator	0:bb348c97df44	158	@endverbatim
lypinator	0:bb348c97df44	159	******************************************************************************
lypinator	0:bb348c97df44	160	* @attention
lypinator	0:bb348c97df44	161	*
lypinator	0:bb348c97df44	162	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator	0:bb348c97df44	163	*
lypinator	0:bb348c97df44	164	* Redistribution and use in source and binary forms, with or without modification,
lypinator	0:bb348c97df44	165	* are permitted provided that the following conditions are met:
lypinator	0:bb348c97df44	166	* 1. Redistributions of source code must retain the above copyright notice,
lypinator	0:bb348c97df44	167	* this list of conditions and the following disclaimer.
lypinator	0:bb348c97df44	168	* 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator	0:bb348c97df44	169	* this list of conditions and the following disclaimer in the documentation
lypinator	0:bb348c97df44	170	* and/or other materials provided with the distribution.
lypinator	0:bb348c97df44	171	* 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator	0:bb348c97df44	172	* may be used to endorse or promote products derived from this software
lypinator	0:bb348c97df44	173	* without specific prior written permission.
lypinator	0:bb348c97df44	174	*
lypinator	0:bb348c97df44	175	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator	0:bb348c97df44	176	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator	0:bb348c97df44	177	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator	0:bb348c97df44	178	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator	0:bb348c97df44	179	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator	0:bb348c97df44	180	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator	0:bb348c97df44	181	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator	0:bb348c97df44	182	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator	0:bb348c97df44	183	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator	0:bb348c97df44	184	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator	0:bb348c97df44	185	*
lypinator	0:bb348c97df44	186	******************************************************************************
lypinator	0:bb348c97df44	187	*/
lypinator	0:bb348c97df44	188
lypinator	0:bb348c97df44	189	/* Includes ------------------------------------------------------------------*/
lypinator	0:bb348c97df44	190	#include "stm32f4xx_hal.h"
lypinator	0:bb348c97df44	191
lypinator	0:bb348c97df44	192	/** @addtogroup STM32F4xx_HAL_Driver
lypinator	0:bb348c97df44	193	* @{
lypinator	0:bb348c97df44	194	*/
lypinator	0:bb348c97df44	195	#ifdef HAL_DFSDM_MODULE_ENABLED
lypinator	0:bb348c97df44	196	#if defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx) \|\| defined(STM32F413xx) \|\| defined(STM32F423xx)
lypinator	0:bb348c97df44	197	/** @defgroup DFSDM DFSDM
lypinator	0:bb348c97df44	198	* @brief DFSDM HAL driver module
lypinator	0:bb348c97df44	199	* @{
lypinator	0:bb348c97df44	200	*/
lypinator	0:bb348c97df44	201
lypinator	0:bb348c97df44	202	/* Private typedef -----------------------------------------------------------*/
lypinator	0:bb348c97df44	203	/* Private define ------------------------------------------------------------*/
lypinator	0:bb348c97df44	204	/** @defgroup DFSDM_Private_Define DFSDM Private Define
lypinator	0:bb348c97df44	205	* @{
lypinator	0:bb348c97df44	206	*/
lypinator	0:bb348c97df44	207
lypinator	0:bb348c97df44	208	#define DFSDM_FLTCR1_MSB_RCH_OFFSET 8U
lypinator	0:bb348c97df44	209
lypinator	0:bb348c97df44	210	#define DFSDM_MSB_MASK 0xFFFF0000U
lypinator	0:bb348c97df44	211	#define DFSDM_LSB_MASK 0x0000FFFFU
lypinator	0:bb348c97df44	212	#define DFSDM_CKAB_TIMEOUT 5000U
lypinator	0:bb348c97df44	213	#define DFSDM1_CHANNEL_NUMBER 4U
lypinator	0:bb348c97df44	214	#if defined (DFSDM2_Channel0)
lypinator	0:bb348c97df44	215	#define DFSDM2_CHANNEL_NUMBER 8U
lypinator	0:bb348c97df44	216	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	217
lypinator	0:bb348c97df44	218	/**
lypinator	0:bb348c97df44	219	* @}
lypinator	0:bb348c97df44	220	*/
lypinator	0:bb348c97df44	221	/** @addtogroup DFSDM_Private_Macros
lypinator	0:bb348c97df44	222	* @{
lypinator	0:bb348c97df44	223	*/
lypinator	0:bb348c97df44	224
lypinator	0:bb348c97df44	225	/**
lypinator	0:bb348c97df44	226	* @}
lypinator	0:bb348c97df44	227	*/
lypinator	0:bb348c97df44	228	/* Private macro -------------------------------------------------------------*/
lypinator	0:bb348c97df44	229	/* Private variables ---------------------------------------------------------*/
lypinator	0:bb348c97df44	230	/** @defgroup DFSDM_Private_Variables DFSDM Private Variables
lypinator	0:bb348c97df44	231	* @{
lypinator	0:bb348c97df44	232	*/
lypinator	0:bb348c97df44	233	__IO uint32_t v_dfsdm1ChannelCounter = 0U;
lypinator	0:bb348c97df44	234	DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
lypinator	0:bb348c97df44	235
lypinator	0:bb348c97df44	236	#if defined (DFSDM2_Channel0)
lypinator	0:bb348c97df44	237	__IO uint32_t v_dfsdm2ChannelCounter = 0U;
lypinator	0:bb348c97df44	238	DFSDM_Channel_HandleTypeDef* a_dfsdm2ChannelHandle[DFSDM2_CHANNEL_NUMBER] = {NULL};
lypinator	0:bb348c97df44	239	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	240	/**
lypinator	0:bb348c97df44	241	* @}
lypinator	0:bb348c97df44	242	*/
lypinator	0:bb348c97df44	243
lypinator	0:bb348c97df44	244	/* Private function prototypes -----------------------------------------------*/
lypinator	0:bb348c97df44	245	/** @defgroup DFSDM_Private_Functions DFSDM Private Functions
lypinator	0:bb348c97df44	246	* @{
lypinator	0:bb348c97df44	247	*/
lypinator	0:bb348c97df44	248	static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
lypinator	0:bb348c97df44	249	static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance);
lypinator	0:bb348c97df44	250	static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
lypinator	0:bb348c97df44	251	static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
lypinator	0:bb348c97df44	252	static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
lypinator	0:bb348c97df44	253	static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
lypinator	0:bb348c97df44	254	static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
lypinator	0:bb348c97df44	255	static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
lypinator	0:bb348c97df44	256	static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
lypinator	0:bb348c97df44	257	static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
lypinator	0:bb348c97df44	258	static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
lypinator	0:bb348c97df44	259
lypinator	0:bb348c97df44	260	/**
lypinator	0:bb348c97df44	261	* @}
lypinator	0:bb348c97df44	262	*/
lypinator	0:bb348c97df44	263
lypinator	0:bb348c97df44	264	/* Exported functions --------------------------------------------------------*/
lypinator	0:bb348c97df44	265	/** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
lypinator	0:bb348c97df44	266	* @{
lypinator	0:bb348c97df44	267	*/
lypinator	0:bb348c97df44	268
lypinator	0:bb348c97df44	269	/** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
lypinator	0:bb348c97df44	270	* @brief Channel initialization and de-initialization functions
lypinator	0:bb348c97df44	271	*
lypinator	0:bb348c97df44	272	@verbatim
lypinator	0:bb348c97df44	273	==============================================================================
lypinator	0:bb348c97df44	274	##### Channel initialization and de-initialization functions #####
lypinator	0:bb348c97df44	275	==============================================================================
lypinator	0:bb348c97df44	276	[..] This section provides functions allowing to:
lypinator	0:bb348c97df44	277	(+) Initialize the DFSDM channel.
lypinator	0:bb348c97df44	278	(+) De-initialize the DFSDM channel.
lypinator	0:bb348c97df44	279	@endverbatim
lypinator	0:bb348c97df44	280	* @{
lypinator	0:bb348c97df44	281	*/
lypinator	0:bb348c97df44	282
lypinator	0:bb348c97df44	283	/**
lypinator	0:bb348c97df44	284	* @brief Initialize the DFSDM channel according to the specified parameters
lypinator	0:bb348c97df44	285	* in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
lypinator	0:bb348c97df44	286	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	287	* @retval HAL status.
lypinator	0:bb348c97df44	288	*/
lypinator	0:bb348c97df44	289	HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	290	{
lypinator	0:bb348c97df44	291	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	292	__IO uint32_t* channelCounterPtr;
lypinator	0:bb348c97df44	293	DFSDM_Channel_HandleTypeDef **channelHandleTable;
lypinator	0:bb348c97df44	294	DFSDM_Channel_TypeDef* channel0Instance;
lypinator	0:bb348c97df44	295	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	296
lypinator	0:bb348c97df44	297	/* Check DFSDM Channel handle */
lypinator	0:bb348c97df44	298	if(hdfsdm_channel == NULL)
lypinator	0:bb348c97df44	299	{
lypinator	0:bb348c97df44	300	return HAL_ERROR;
lypinator	0:bb348c97df44	301	}
lypinator	0:bb348c97df44	302
lypinator	0:bb348c97df44	303	/* Check parameters */
lypinator	0:bb348c97df44	304	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	305	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
lypinator	0:bb348c97df44	306	assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
lypinator	0:bb348c97df44	307	assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
lypinator	0:bb348c97df44	308	assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
lypinator	0:bb348c97df44	309	assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
lypinator	0:bb348c97df44	310	assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
lypinator	0:bb348c97df44	311	assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
lypinator	0:bb348c97df44	312	assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
lypinator	0:bb348c97df44	313	assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
lypinator	0:bb348c97df44	314	assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
lypinator	0:bb348c97df44	315
lypinator	0:bb348c97df44	316	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	317	/* Get channel counter, channel handle table and channel 0 instance */
lypinator	0:bb348c97df44	318	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
lypinator	0:bb348c97df44	319	{
lypinator	0:bb348c97df44	320	channelCounterPtr = &v_dfsdm1ChannelCounter;
lypinator	0:bb348c97df44	321	channelHandleTable = a_dfsdm1ChannelHandle;
lypinator	0:bb348c97df44	322	channel0Instance = DFSDM1_Channel0;
lypinator	0:bb348c97df44	323	}
lypinator	0:bb348c97df44	324	else
lypinator	0:bb348c97df44	325	{
lypinator	0:bb348c97df44	326	channelCounterPtr = &v_dfsdm2ChannelCounter;
lypinator	0:bb348c97df44	327	channelHandleTable = a_dfsdm2ChannelHandle;
lypinator	0:bb348c97df44	328	channel0Instance = DFSDM2_Channel0;
lypinator	0:bb348c97df44	329	}
lypinator	0:bb348c97df44	330
lypinator	0:bb348c97df44	331	/* Check that channel has not been already initialized */
lypinator	0:bb348c97df44	332	if(channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
lypinator	0:bb348c97df44	333	{
lypinator	0:bb348c97df44	334	return HAL_ERROR;
lypinator	0:bb348c97df44	335	}
lypinator	0:bb348c97df44	336
lypinator	0:bb348c97df44	337	/* Call MSP init function */
lypinator	0:bb348c97df44	338	HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
lypinator	0:bb348c97df44	339
lypinator	0:bb348c97df44	340	/* Update the channel counter */
lypinator	0:bb348c97df44	341	(*channelCounterPtr)++;
lypinator	0:bb348c97df44	342
lypinator	0:bb348c97df44	343	/* Configure output serial clock and enable global DFSDM interface only for first channel */
lypinator	0:bb348c97df44	344	if(*channelCounterPtr == 1U)
lypinator	0:bb348c97df44	345	{
lypinator	0:bb348c97df44	346	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
lypinator	0:bb348c97df44	347	/* Set the output serial clock source */
lypinator	0:bb348c97df44	348	channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
lypinator	0:bb348c97df44	349	channel0Instance->CHCFGR1 \|= hdfsdm_channel->Init.OutputClock.Selection;
lypinator	0:bb348c97df44	350
lypinator	0:bb348c97df44	351	/* Reset clock divider */
lypinator	0:bb348c97df44	352	channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
lypinator	0:bb348c97df44	353	if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
lypinator	0:bb348c97df44	354	{
lypinator	0:bb348c97df44	355	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
lypinator	0:bb348c97df44	356	/* Set the output clock divider */
lypinator	0:bb348c97df44	357	channel0Instance->CHCFGR1 \|= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
lypinator	0:bb348c97df44	358	DFSDM_CHCFGR1_CKOUTDIV_Pos);
lypinator	0:bb348c97df44	359	}
lypinator	0:bb348c97df44	360
lypinator	0:bb348c97df44	361	/* enable the DFSDM global interface */
lypinator	0:bb348c97df44	362	channel0Instance->CHCFGR1 \|= DFSDM_CHCFGR1_DFSDMEN;
lypinator	0:bb348c97df44	363	}
lypinator	0:bb348c97df44	364
lypinator	0:bb348c97df44	365	/* Set channel input parameters */
lypinator	0:bb348c97df44	366	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK \| DFSDM_CHCFGR1_DATMPX \|
lypinator	0:bb348c97df44	367	DFSDM_CHCFGR1_CHINSEL);
lypinator	0:bb348c97df44	368	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.Input.Multiplexer \|
lypinator	0:bb348c97df44	369	hdfsdm_channel->Init.Input.DataPacking \|
lypinator	0:bb348c97df44	370	hdfsdm_channel->Init.Input.Pins);
lypinator	0:bb348c97df44	371
lypinator	0:bb348c97df44	372	/* Set serial interface parameters */
lypinator	0:bb348c97df44	373	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP \| DFSDM_CHCFGR1_SPICKSEL);
lypinator	0:bb348c97df44	374	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.SerialInterface.Type \|
lypinator	0:bb348c97df44	375	hdfsdm_channel->Init.SerialInterface.SpiClock);
lypinator	0:bb348c97df44	376
lypinator	0:bb348c97df44	377	/* Set analog watchdog parameters */
lypinator	0:bb348c97df44	378	hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD \| DFSDM_CHAWSCDR_AWFOSR);
lypinator	0:bb348c97df44	379	hdfsdm_channel->Instance->CHAWSCDR \|= (hdfsdm_channel->Init.Awd.FilterOrder \|
lypinator	0:bb348c97df44	380	((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos));
lypinator	0:bb348c97df44	381
lypinator	0:bb348c97df44	382	/* Set channel offset and right bit shift */
lypinator	0:bb348c97df44	383	hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET \| DFSDM_CHCFGR2_DTRBS);
lypinator	0:bb348c97df44	384	hdfsdm_channel->Instance->CHCFGR2 \|= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) \|
lypinator	0:bb348c97df44	385	(hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
lypinator	0:bb348c97df44	386
lypinator	0:bb348c97df44	387	/* Enable DFSDM channel */
lypinator	0:bb348c97df44	388	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CHEN;
lypinator	0:bb348c97df44	389
lypinator	0:bb348c97df44	390	/* Set DFSDM Channel to ready state */
lypinator	0:bb348c97df44	391	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
lypinator	0:bb348c97df44	392
lypinator	0:bb348c97df44	393	/* Store channel handle in DFSDM channel handle table */
lypinator	0:bb348c97df44	394	channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
lypinator	0:bb348c97df44	395
lypinator	0:bb348c97df44	396	#else
lypinator	0:bb348c97df44	397	/* Check that channel has not been already initialized */
lypinator	0:bb348c97df44	398	if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
lypinator	0:bb348c97df44	399	{
lypinator	0:bb348c97df44	400	return HAL_ERROR;
lypinator	0:bb348c97df44	401	}
lypinator	0:bb348c97df44	402
lypinator	0:bb348c97df44	403	/* Call MSP init function */
lypinator	0:bb348c97df44	404	HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
lypinator	0:bb348c97df44	405
lypinator	0:bb348c97df44	406	/* Update the channel counter */
lypinator	0:bb348c97df44	407	v_dfsdm1ChannelCounter++;
lypinator	0:bb348c97df44	408
lypinator	0:bb348c97df44	409	/* Configure output serial clock and enable global DFSDM interface only for first channel */
lypinator	0:bb348c97df44	410	if(v_dfsdm1ChannelCounter == 1U)
lypinator	0:bb348c97df44	411	{
lypinator	0:bb348c97df44	412	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
lypinator	0:bb348c97df44	413	/* Set the output serial clock source */
lypinator	0:bb348c97df44	414	DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
lypinator	0:bb348c97df44	415	DFSDM1_Channel0->CHCFGR1 \|= hdfsdm_channel->Init.OutputClock.Selection;
lypinator	0:bb348c97df44	416
lypinator	0:bb348c97df44	417	/* Reset clock divider */
lypinator	0:bb348c97df44	418	DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
lypinator	0:bb348c97df44	419	if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
lypinator	0:bb348c97df44	420	{
lypinator	0:bb348c97df44	421	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
lypinator	0:bb348c97df44	422	/* Set the output clock divider */
lypinator	0:bb348c97df44	423	DFSDM1_Channel0->CHCFGR1 \|= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
lypinator	0:bb348c97df44	424	DFSDM_CHCFGR1_CKOUTDIV_Pos);
lypinator	0:bb348c97df44	425	}
lypinator	0:bb348c97df44	426
lypinator	0:bb348c97df44	427	/* enable the DFSDM global interface */
lypinator	0:bb348c97df44	428	DFSDM1_Channel0->CHCFGR1 \|= DFSDM_CHCFGR1_DFSDMEN;
lypinator	0:bb348c97df44	429	}
lypinator	0:bb348c97df44	430
lypinator	0:bb348c97df44	431	/* Set channel input parameters */
lypinator	0:bb348c97df44	432	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK \| DFSDM_CHCFGR1_DATMPX \|
lypinator	0:bb348c97df44	433	DFSDM_CHCFGR1_CHINSEL);
lypinator	0:bb348c97df44	434	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.Input.Multiplexer \|
lypinator	0:bb348c97df44	435	hdfsdm_channel->Init.Input.DataPacking \|
lypinator	0:bb348c97df44	436	hdfsdm_channel->Init.Input.Pins);
lypinator	0:bb348c97df44	437
lypinator	0:bb348c97df44	438	/* Set serial interface parameters */
lypinator	0:bb348c97df44	439	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP \| DFSDM_CHCFGR1_SPICKSEL);
lypinator	0:bb348c97df44	440	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.SerialInterface.Type \|
lypinator	0:bb348c97df44	441	hdfsdm_channel->Init.SerialInterface.SpiClock);
lypinator	0:bb348c97df44	442
lypinator	0:bb348c97df44	443	/* Set analog watchdog parameters */
lypinator	0:bb348c97df44	444	hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD \| DFSDM_CHAWSCDR_AWFOSR);
lypinator	0:bb348c97df44	445	hdfsdm_channel->Instance->CHAWSCDR \|= (hdfsdm_channel->Init.Awd.FilterOrder \|
lypinator	0:bb348c97df44	446	((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos));
lypinator	0:bb348c97df44	447
lypinator	0:bb348c97df44	448	/* Set channel offset and right bit shift */
lypinator	0:bb348c97df44	449	hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET \| DFSDM_CHCFGR2_DTRBS);
lypinator	0:bb348c97df44	450	hdfsdm_channel->Instance->CHCFGR2 \|= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) \|
lypinator	0:bb348c97df44	451	(hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
lypinator	0:bb348c97df44	452
lypinator	0:bb348c97df44	453	/* Enable DFSDM channel */
lypinator	0:bb348c97df44	454	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CHEN;
lypinator	0:bb348c97df44	455
lypinator	0:bb348c97df44	456	/* Set DFSDM Channel to ready state */
lypinator	0:bb348c97df44	457	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
lypinator	0:bb348c97df44	458
lypinator	0:bb348c97df44	459	/* Store channel handle in DFSDM channel handle table */
lypinator	0:bb348c97df44	460	a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
lypinator	0:bb348c97df44	461	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	462
lypinator	0:bb348c97df44	463	return HAL_OK;
lypinator	0:bb348c97df44	464	}
lypinator	0:bb348c97df44	465
lypinator	0:bb348c97df44	466	/**
lypinator	0:bb348c97df44	467	* @brief De-initialize the DFSDM channel.
lypinator	0:bb348c97df44	468	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	469	* @retval HAL status.
lypinator	0:bb348c97df44	470	*/
lypinator	0:bb348c97df44	471	HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	472	{
lypinator	0:bb348c97df44	473	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	474	__IO uint32_t* channelCounterPtr;
lypinator	0:bb348c97df44	475	DFSDM_Channel_HandleTypeDef **channelHandleTable;
lypinator	0:bb348c97df44	476	DFSDM_Channel_TypeDef* channel0Instance;
lypinator	0:bb348c97df44	477	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	478
lypinator	0:bb348c97df44	479	/* Check DFSDM Channel handle */
lypinator	0:bb348c97df44	480	if(hdfsdm_channel == NULL)
lypinator	0:bb348c97df44	481	{
lypinator	0:bb348c97df44	482	return HAL_ERROR;
lypinator	0:bb348c97df44	483	}
lypinator	0:bb348c97df44	484
lypinator	0:bb348c97df44	485	/* Check parameters */
lypinator	0:bb348c97df44	486	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	487
lypinator	0:bb348c97df44	488	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	489	/* Get channel counter, channel handle table and channel 0 instance */
lypinator	0:bb348c97df44	490	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
lypinator	0:bb348c97df44	491	{
lypinator	0:bb348c97df44	492	channelCounterPtr = &v_dfsdm1ChannelCounter;
lypinator	0:bb348c97df44	493	channelHandleTable = a_dfsdm1ChannelHandle;
lypinator	0:bb348c97df44	494	channel0Instance = DFSDM1_Channel0;
lypinator	0:bb348c97df44	495	}
lypinator	0:bb348c97df44	496	else
lypinator	0:bb348c97df44	497	{
lypinator	0:bb348c97df44	498	channelCounterPtr = &v_dfsdm2ChannelCounter;
lypinator	0:bb348c97df44	499	channelHandleTable = a_dfsdm2ChannelHandle;
lypinator	0:bb348c97df44	500	channel0Instance = DFSDM2_Channel0;
lypinator	0:bb348c97df44	501	}
lypinator	0:bb348c97df44	502
lypinator	0:bb348c97df44	503	/* Check that channel has not been already deinitialized */
lypinator	0:bb348c97df44	504	if(channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
lypinator	0:bb348c97df44	505	{
lypinator	0:bb348c97df44	506	return HAL_ERROR;
lypinator	0:bb348c97df44	507	}
lypinator	0:bb348c97df44	508
lypinator	0:bb348c97df44	509	/* Disable the DFSDM channel */
lypinator	0:bb348c97df44	510	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
lypinator	0:bb348c97df44	511
lypinator	0:bb348c97df44	512	/* Update the channel counter */
lypinator	0:bb348c97df44	513	(*channelCounterPtr)--;
lypinator	0:bb348c97df44	514
lypinator	0:bb348c97df44	515	/* Disable global DFSDM at deinit of last channel */
lypinator	0:bb348c97df44	516	if(*channelCounterPtr == 0U)
lypinator	0:bb348c97df44	517	{
lypinator	0:bb348c97df44	518	channel0Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
lypinator	0:bb348c97df44	519	}
lypinator	0:bb348c97df44	520
lypinator	0:bb348c97df44	521	/* Call MSP deinit function */
lypinator	0:bb348c97df44	522	HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
lypinator	0:bb348c97df44	523
lypinator	0:bb348c97df44	524	/* Set DFSDM Channel in reset state */
lypinator	0:bb348c97df44	525	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
lypinator	0:bb348c97df44	526
lypinator	0:bb348c97df44	527	/* Reset channel handle in DFSDM channel handle table */
lypinator	0:bb348c97df44	528	channelHandleTable[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = NULL;
lypinator	0:bb348c97df44	529	#else
lypinator	0:bb348c97df44	530	/* Check that channel has not been already deinitialized */
lypinator	0:bb348c97df44	531	if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
lypinator	0:bb348c97df44	532	{
lypinator	0:bb348c97df44	533	return HAL_ERROR;
lypinator	0:bb348c97df44	534	}
lypinator	0:bb348c97df44	535
lypinator	0:bb348c97df44	536	/* Disable the DFSDM channel */
lypinator	0:bb348c97df44	537	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
lypinator	0:bb348c97df44	538
lypinator	0:bb348c97df44	539	/* Update the channel counter */
lypinator	0:bb348c97df44	540	v_dfsdm1ChannelCounter--;
lypinator	0:bb348c97df44	541
lypinator	0:bb348c97df44	542	/* Disable global DFSDM at deinit of last channel */
lypinator	0:bb348c97df44	543	if(v_dfsdm1ChannelCounter == 0U)
lypinator	0:bb348c97df44	544	{
lypinator	0:bb348c97df44	545	DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
lypinator	0:bb348c97df44	546	}
lypinator	0:bb348c97df44	547
lypinator	0:bb348c97df44	548	/* Call MSP deinit function */
lypinator	0:bb348c97df44	549	HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
lypinator	0:bb348c97df44	550
lypinator	0:bb348c97df44	551	/* Set DFSDM Channel in reset state */
lypinator	0:bb348c97df44	552	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
lypinator	0:bb348c97df44	553
lypinator	0:bb348c97df44	554	/* Reset channel handle in DFSDM channel handle table */
lypinator	0:bb348c97df44	555	a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
lypinator	0:bb348c97df44	556	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	557
lypinator	0:bb348c97df44	558	return HAL_OK;
lypinator	0:bb348c97df44	559	}
lypinator	0:bb348c97df44	560
lypinator	0:bb348c97df44	561	/**
lypinator	0:bb348c97df44	562	* @brief Initialize the DFSDM channel MSP.
lypinator	0:bb348c97df44	563	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	564	* @retval None
lypinator	0:bb348c97df44	565	*/
lypinator	0:bb348c97df44	566	__weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	567	{
lypinator	0:bb348c97df44	568	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	569	UNUSED(hdfsdm_channel);
lypinator	0:bb348c97df44	570	/* NOTE : This function should not be modified, when the function is needed,
lypinator	0:bb348c97df44	571	the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
lypinator	0:bb348c97df44	572	*/
lypinator	0:bb348c97df44	573	}
lypinator	0:bb348c97df44	574
lypinator	0:bb348c97df44	575	/**
lypinator	0:bb348c97df44	576	* @brief De-initialize the DFSDM channel MSP.
lypinator	0:bb348c97df44	577	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	578	* @retval None
lypinator	0:bb348c97df44	579	*/
lypinator	0:bb348c97df44	580	__weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	581	{
lypinator	0:bb348c97df44	582	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	583	UNUSED(hdfsdm_channel);
lypinator	0:bb348c97df44	584	/* NOTE : This function should not be modified, when the function is needed,
lypinator	0:bb348c97df44	585	the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
lypinator	0:bb348c97df44	586	*/
lypinator	0:bb348c97df44	587	}
lypinator	0:bb348c97df44	588
lypinator	0:bb348c97df44	589	/**
lypinator	0:bb348c97df44	590	* @}
lypinator	0:bb348c97df44	591	*/
lypinator	0:bb348c97df44	592
lypinator	0:bb348c97df44	593	/** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
lypinator	0:bb348c97df44	594	* @brief Channel operation functions
lypinator	0:bb348c97df44	595	*
lypinator	0:bb348c97df44	596	@verbatim
lypinator	0:bb348c97df44	597	==============================================================================
lypinator	0:bb348c97df44	598	##### Channel operation functions #####
lypinator	0:bb348c97df44	599	==============================================================================
lypinator	0:bb348c97df44	600	[..] This section provides functions allowing to:
lypinator	0:bb348c97df44	601	(+) Manage clock absence detector feature.
lypinator	0:bb348c97df44	602	(+) Manage short circuit detector feature.
lypinator	0:bb348c97df44	603	(+) Get analog watchdog value.
lypinator	0:bb348c97df44	604	(+) Modify offset value.
lypinator	0:bb348c97df44	605	@endverbatim
lypinator	0:bb348c97df44	606	* @{
lypinator	0:bb348c97df44	607	*/
lypinator	0:bb348c97df44	608
lypinator	0:bb348c97df44	609	/**
lypinator	0:bb348c97df44	610	* @brief This function allows to start clock absence detection in polling mode.
lypinator	0:bb348c97df44	611	* @note Same mode has to be used for all channels.
lypinator	0:bb348c97df44	612	* @note If clock is not available on this channel during 5 seconds,
lypinator	0:bb348c97df44	613	* clock absence detection will not be activated and function
lypinator	0:bb348c97df44	614	* will return HAL_TIMEOUT error.
lypinator	0:bb348c97df44	615	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	616	* @retval HAL status
lypinator	0:bb348c97df44	617	*/
lypinator	0:bb348c97df44	618	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	619	{
lypinator	0:bb348c97df44	620	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	621	uint32_t tickstart;
lypinator	0:bb348c97df44	622	uint32_t channel;
lypinator	0:bb348c97df44	623
lypinator	0:bb348c97df44	624	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	625	DFSDM_Filter_TypeDef* filter0Instance;
lypinator	0:bb348c97df44	626	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	627
lypinator	0:bb348c97df44	628	/* Check parameters */
lypinator	0:bb348c97df44	629	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	630
lypinator	0:bb348c97df44	631	/* Check DFSDM channel state */
lypinator	0:bb348c97df44	632	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
lypinator	0:bb348c97df44	633	{
lypinator	0:bb348c97df44	634	/* Return error status */
lypinator	0:bb348c97df44	635	status = HAL_ERROR;
lypinator	0:bb348c97df44	636	}
lypinator	0:bb348c97df44	637	else
lypinator	0:bb348c97df44	638	{
lypinator	0:bb348c97df44	639	#if defined (DFSDM2_Channel0)
lypinator	0:bb348c97df44	640	/* Get channel counter, channel handle table and channel 0 instance */
lypinator	0:bb348c97df44	641	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
lypinator	0:bb348c97df44	642	{
lypinator	0:bb348c97df44	643	filter0Instance = DFSDM1_Filter0;
lypinator	0:bb348c97df44	644	}
lypinator	0:bb348c97df44	645	else
lypinator	0:bb348c97df44	646	{
lypinator	0:bb348c97df44	647	filter0Instance = DFSDM2_Filter0;
lypinator	0:bb348c97df44	648	}
lypinator	0:bb348c97df44	649	/* Get channel number from channel instance */
lypinator	0:bb348c97df44	650	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	651
lypinator	0:bb348c97df44	652	/* Get timeout */
lypinator	0:bb348c97df44	653	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	654
lypinator	0:bb348c97df44	655	/* Clear clock absence flag */
lypinator	0:bb348c97df44	656	while((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
lypinator	0:bb348c97df44	657	{
lypinator	0:bb348c97df44	658	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	659
lypinator	0:bb348c97df44	660	/* Check the Timeout */
lypinator	0:bb348c97df44	661	if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
lypinator	0:bb348c97df44	662	{
lypinator	0:bb348c97df44	663	/* Set timeout status */
lypinator	0:bb348c97df44	664	status = HAL_TIMEOUT;
lypinator	0:bb348c97df44	665	break;
lypinator	0:bb348c97df44	666	}
lypinator	0:bb348c97df44	667	}
lypinator	0:bb348c97df44	668	#else
lypinator	0:bb348c97df44	669	/* Get channel number from channel instance */
lypinator	0:bb348c97df44	670	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	671
lypinator	0:bb348c97df44	672	/* Get timeout */
lypinator	0:bb348c97df44	673	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	674
lypinator	0:bb348c97df44	675	/* Clear clock absence flag */
lypinator	0:bb348c97df44	676	while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
lypinator	0:bb348c97df44	677	{
lypinator	0:bb348c97df44	678	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	679
lypinator	0:bb348c97df44	680	/* Check the Timeout */
lypinator	0:bb348c97df44	681	if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
lypinator	0:bb348c97df44	682	{
lypinator	0:bb348c97df44	683	/* Set timeout status */
lypinator	0:bb348c97df44	684	status = HAL_TIMEOUT;
lypinator	0:bb348c97df44	685	break;
lypinator	0:bb348c97df44	686	}
lypinator	0:bb348c97df44	687	}
lypinator	0:bb348c97df44	688	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	689
lypinator	0:bb348c97df44	690	if(status == HAL_OK)
lypinator	0:bb348c97df44	691	{
lypinator	0:bb348c97df44	692	/* Start clock absence detection */
lypinator	0:bb348c97df44	693	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CKABEN;
lypinator	0:bb348c97df44	694	}
lypinator	0:bb348c97df44	695	}
lypinator	0:bb348c97df44	696	/* Return function status */
lypinator	0:bb348c97df44	697	return status;
lypinator	0:bb348c97df44	698	}
lypinator	0:bb348c97df44	699
lypinator	0:bb348c97df44	700	/**
lypinator	0:bb348c97df44	701	* @brief This function allows to poll for the clock absence detection.
lypinator	0:bb348c97df44	702	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	703	* @param Timeout Timeout value in milliseconds.
lypinator	0:bb348c97df44	704	* @retval HAL status
lypinator	0:bb348c97df44	705	*/
lypinator	0:bb348c97df44	706	HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
lypinator	0:bb348c97df44	707	uint32_t Timeout)
lypinator	0:bb348c97df44	708	{
lypinator	0:bb348c97df44	709	uint32_t tickstart;
lypinator	0:bb348c97df44	710	uint32_t channel;
lypinator	0:bb348c97df44	711	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	712	DFSDM_Filter_TypeDef* filter0Instance;
lypinator	0:bb348c97df44	713	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	714
lypinator	0:bb348c97df44	715	/* Check parameters */
lypinator	0:bb348c97df44	716	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	717
lypinator	0:bb348c97df44	718	/* Check DFSDM channel state */
lypinator	0:bb348c97df44	719	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
lypinator	0:bb348c97df44	720	{
lypinator	0:bb348c97df44	721	/* Return error status */
lypinator	0:bb348c97df44	722	return HAL_ERROR;
lypinator	0:bb348c97df44	723	}
lypinator	0:bb348c97df44	724	else
lypinator	0:bb348c97df44	725	{
lypinator	0:bb348c97df44	726	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	727
lypinator	0:bb348c97df44	728	/* Get channel counter, channel handle table and channel 0 instance */
lypinator	0:bb348c97df44	729	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
lypinator	0:bb348c97df44	730	{
lypinator	0:bb348c97df44	731	filter0Instance = DFSDM1_Filter0;
lypinator	0:bb348c97df44	732	}
lypinator	0:bb348c97df44	733	else
lypinator	0:bb348c97df44	734	{
lypinator	0:bb348c97df44	735	filter0Instance = DFSDM2_Filter0;
lypinator	0:bb348c97df44	736	}
lypinator	0:bb348c97df44	737
lypinator	0:bb348c97df44	738	/* Get channel number from channel instance */
lypinator	0:bb348c97df44	739	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	740
lypinator	0:bb348c97df44	741	/* Get timeout */
lypinator	0:bb348c97df44	742	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	743
lypinator	0:bb348c97df44	744	/* Wait clock absence detection */
lypinator	0:bb348c97df44	745	while((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) == 0U)
lypinator	0:bb348c97df44	746	{
lypinator	0:bb348c97df44	747	/* Check the Timeout */
lypinator	0:bb348c97df44	748	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	749	{
lypinator	0:bb348c97df44	750	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
lypinator	0:bb348c97df44	751	{
lypinator	0:bb348c97df44	752	/* Return timeout status */
lypinator	0:bb348c97df44	753	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	754	}
lypinator	0:bb348c97df44	755	}
lypinator	0:bb348c97df44	756	}
lypinator	0:bb348c97df44	757
lypinator	0:bb348c97df44	758	/* Clear clock absence detection flag */
lypinator	0:bb348c97df44	759	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	760	#else
lypinator	0:bb348c97df44	761	/* Get channel number from channel instance */
lypinator	0:bb348c97df44	762	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	763
lypinator	0:bb348c97df44	764	/* Get timeout */
lypinator	0:bb348c97df44	765	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	766
lypinator	0:bb348c97df44	767	/* Wait clock absence detection */
lypinator	0:bb348c97df44	768	while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) == 0U)
lypinator	0:bb348c97df44	769	{
lypinator	0:bb348c97df44	770	/* Check the Timeout */
lypinator	0:bb348c97df44	771	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	772	{
lypinator	0:bb348c97df44	773	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
lypinator	0:bb348c97df44	774	{
lypinator	0:bb348c97df44	775	/* Return timeout status */
lypinator	0:bb348c97df44	776	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	777	}
lypinator	0:bb348c97df44	778	}
lypinator	0:bb348c97df44	779	}
lypinator	0:bb348c97df44	780
lypinator	0:bb348c97df44	781	/* Clear clock absence detection flag */
lypinator	0:bb348c97df44	782	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	783	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	784	/* Return function status */
lypinator	0:bb348c97df44	785	return HAL_OK;
lypinator	0:bb348c97df44	786	}
lypinator	0:bb348c97df44	787	}
lypinator	0:bb348c97df44	788
lypinator	0:bb348c97df44	789	/**
lypinator	0:bb348c97df44	790	* @brief This function allows to stop clock absence detection in polling mode.
lypinator	0:bb348c97df44	791	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	792	* @retval HAL status
lypinator	0:bb348c97df44	793	*/
lypinator	0:bb348c97df44	794	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	795	{
lypinator	0:bb348c97df44	796	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	797	uint32_t channel;
lypinator	0:bb348c97df44	798	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	799	DFSDM_Filter_TypeDef* filter0Instance;
lypinator	0:bb348c97df44	800	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	801
lypinator	0:bb348c97df44	802	/* Check parameters */
lypinator	0:bb348c97df44	803	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	804
lypinator	0:bb348c97df44	805	/* Check DFSDM channel state */
lypinator	0:bb348c97df44	806	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
lypinator	0:bb348c97df44	807	{
lypinator	0:bb348c97df44	808	/* Return error status */
lypinator	0:bb348c97df44	809	status = HAL_ERROR;
lypinator	0:bb348c97df44	810	}
lypinator	0:bb348c97df44	811	else
lypinator	0:bb348c97df44	812	{
lypinator	0:bb348c97df44	813	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	814
lypinator	0:bb348c97df44	815	/* Get channel counter, channel handle table and channel 0 instance */
lypinator	0:bb348c97df44	816	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
lypinator	0:bb348c97df44	817	{
lypinator	0:bb348c97df44	818	filter0Instance = DFSDM1_Filter0;
lypinator	0:bb348c97df44	819	}
lypinator	0:bb348c97df44	820	else
lypinator	0:bb348c97df44	821	{
lypinator	0:bb348c97df44	822	filter0Instance = DFSDM2_Filter0;
lypinator	0:bb348c97df44	823	}
lypinator	0:bb348c97df44	824
lypinator	0:bb348c97df44	825	/* Stop clock absence detection */
lypinator	0:bb348c97df44	826	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
lypinator	0:bb348c97df44	827
lypinator	0:bb348c97df44	828	/* Clear clock absence flag */
lypinator	0:bb348c97df44	829	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	830	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	831
lypinator	0:bb348c97df44	832	#else
lypinator	0:bb348c97df44	833	/* Stop clock absence detection */
lypinator	0:bb348c97df44	834	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
lypinator	0:bb348c97df44	835
lypinator	0:bb348c97df44	836	/* Clear clock absence flag */
lypinator	0:bb348c97df44	837	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	838	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	839	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	840	}
lypinator	0:bb348c97df44	841	/* Return function status */
lypinator	0:bb348c97df44	842	return status;
lypinator	0:bb348c97df44	843	}
lypinator	0:bb348c97df44	844
lypinator	0:bb348c97df44	845	/**
lypinator	0:bb348c97df44	846	* @brief This function allows to start clock absence detection in interrupt mode.
lypinator	0:bb348c97df44	847	* @note Same mode has to be used for all channels.
lypinator	0:bb348c97df44	848	* @note If clock is not available on this channel during 5 seconds,
lypinator	0:bb348c97df44	849	* clock absence detection will not be activated and function
lypinator	0:bb348c97df44	850	* will return HAL_TIMEOUT error.
lypinator	0:bb348c97df44	851	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	852	* @retval HAL status
lypinator	0:bb348c97df44	853	*/
lypinator	0:bb348c97df44	854	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	855	{
lypinator	0:bb348c97df44	856	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	857	uint32_t channel;
lypinator	0:bb348c97df44	858	uint32_t tickstart;
lypinator	0:bb348c97df44	859	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	860	DFSDM_Filter_TypeDef* filter0Instance;
lypinator	0:bb348c97df44	861	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	862
lypinator	0:bb348c97df44	863	/* Check parameters */
lypinator	0:bb348c97df44	864	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	865
lypinator	0:bb348c97df44	866	/* Check DFSDM channel state */
lypinator	0:bb348c97df44	867	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
lypinator	0:bb348c97df44	868	{
lypinator	0:bb348c97df44	869	/* Return error status */
lypinator	0:bb348c97df44	870	status = HAL_ERROR;
lypinator	0:bb348c97df44	871	}
lypinator	0:bb348c97df44	872	else
lypinator	0:bb348c97df44	873	{
lypinator	0:bb348c97df44	874	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	875
lypinator	0:bb348c97df44	876	/* Get channel counter, channel handle table and channel 0 instance */
lypinator	0:bb348c97df44	877	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
lypinator	0:bb348c97df44	878	{
lypinator	0:bb348c97df44	879	filter0Instance = DFSDM1_Filter0;
lypinator	0:bb348c97df44	880	}
lypinator	0:bb348c97df44	881	else
lypinator	0:bb348c97df44	882	{
lypinator	0:bb348c97df44	883	filter0Instance = DFSDM2_Filter0;
lypinator	0:bb348c97df44	884	}
lypinator	0:bb348c97df44	885
lypinator	0:bb348c97df44	886	/* Get channel number from channel instance */
lypinator	0:bb348c97df44	887	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	888
lypinator	0:bb348c97df44	889	/* Get timeout */
lypinator	0:bb348c97df44	890	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	891
lypinator	0:bb348c97df44	892	/* Clear clock absence flag */
lypinator	0:bb348c97df44	893	while((((filter0Instance->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
lypinator	0:bb348c97df44	894	{
lypinator	0:bb348c97df44	895	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	896
lypinator	0:bb348c97df44	897	/* Check the Timeout */
lypinator	0:bb348c97df44	898	if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
lypinator	0:bb348c97df44	899	{
lypinator	0:bb348c97df44	900	/* Set timeout status */
lypinator	0:bb348c97df44	901	status = HAL_TIMEOUT;
lypinator	0:bb348c97df44	902	break;
lypinator	0:bb348c97df44	903	}
lypinator	0:bb348c97df44	904	}
lypinator	0:bb348c97df44	905
lypinator	0:bb348c97df44	906	if(status == HAL_OK)
lypinator	0:bb348c97df44	907	{
lypinator	0:bb348c97df44	908	/* Activate clock absence detection interrupt */
lypinator	0:bb348c97df44	909	filter0Instance->FLTCR2 \|= DFSDM_FLTCR2_CKABIE;
lypinator	0:bb348c97df44	910
lypinator	0:bb348c97df44	911	/* Start clock absence detection */
lypinator	0:bb348c97df44	912	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CKABEN;
lypinator	0:bb348c97df44	913	}
lypinator	0:bb348c97df44	914	#else
lypinator	0:bb348c97df44	915	/* Get channel number from channel instance */
lypinator	0:bb348c97df44	916	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	917
lypinator	0:bb348c97df44	918	/* Get timeout */
lypinator	0:bb348c97df44	919	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	920
lypinator	0:bb348c97df44	921	/* Clear clock absence flag */
lypinator	0:bb348c97df44	922	while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
lypinator	0:bb348c97df44	923	{
lypinator	0:bb348c97df44	924	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	925
lypinator	0:bb348c97df44	926	/* Check the Timeout */
lypinator	0:bb348c97df44	927	if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
lypinator	0:bb348c97df44	928	{
lypinator	0:bb348c97df44	929	/* Set timeout status */
lypinator	0:bb348c97df44	930	status = HAL_TIMEOUT;
lypinator	0:bb348c97df44	931	break;
lypinator	0:bb348c97df44	932	}
lypinator	0:bb348c97df44	933	}
lypinator	0:bb348c97df44	934
lypinator	0:bb348c97df44	935	if(status == HAL_OK)
lypinator	0:bb348c97df44	936	{
lypinator	0:bb348c97df44	937	/* Activate clock absence detection interrupt */
lypinator	0:bb348c97df44	938	DFSDM1_Filter0->FLTCR2 \|= DFSDM_FLTCR2_CKABIE;
lypinator	0:bb348c97df44	939
lypinator	0:bb348c97df44	940	/* Start clock absence detection */
lypinator	0:bb348c97df44	941	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CKABEN;
lypinator	0:bb348c97df44	942	}
lypinator	0:bb348c97df44	943
lypinator	0:bb348c97df44	944	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	945	}
lypinator	0:bb348c97df44	946	/* Return function status */
lypinator	0:bb348c97df44	947	return status;
lypinator	0:bb348c97df44	948	}
lypinator	0:bb348c97df44	949
lypinator	0:bb348c97df44	950	/**
lypinator	0:bb348c97df44	951	* @brief Clock absence detection callback.
lypinator	0:bb348c97df44	952	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	953	* @retval None
lypinator	0:bb348c97df44	954	*/
lypinator	0:bb348c97df44	955	__weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	956	{
lypinator	0:bb348c97df44	957	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	958	UNUSED(hdfsdm_channel);
lypinator	0:bb348c97df44	959	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	960	the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
lypinator	0:bb348c97df44	961	*/
lypinator	0:bb348c97df44	962	}
lypinator	0:bb348c97df44	963
lypinator	0:bb348c97df44	964	/**
lypinator	0:bb348c97df44	965	* @brief This function allows to stop clock absence detection in interrupt mode.
lypinator	0:bb348c97df44	966	* @note Interrupt will be disabled for all channels
lypinator	0:bb348c97df44	967	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	968	* @retval HAL status
lypinator	0:bb348c97df44	969	*/
lypinator	0:bb348c97df44	970	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	971	{
lypinator	0:bb348c97df44	972	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	973	uint32_t channel;
lypinator	0:bb348c97df44	974	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	975	DFSDM_Filter_TypeDef* filter0Instance;
lypinator	0:bb348c97df44	976	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	977
lypinator	0:bb348c97df44	978	/* Check parameters */
lypinator	0:bb348c97df44	979	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	980
lypinator	0:bb348c97df44	981	/* Check DFSDM channel state */
lypinator	0:bb348c97df44	982	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
lypinator	0:bb348c97df44	983	{
lypinator	0:bb348c97df44	984	/* Return error status */
lypinator	0:bb348c97df44	985	status = HAL_ERROR;
lypinator	0:bb348c97df44	986	}
lypinator	0:bb348c97df44	987	else
lypinator	0:bb348c97df44	988	{
lypinator	0:bb348c97df44	989	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	990
lypinator	0:bb348c97df44	991	/* Get channel counter, channel handle table and channel 0 instance */
lypinator	0:bb348c97df44	992	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
lypinator	0:bb348c97df44	993	{
lypinator	0:bb348c97df44	994	filter0Instance = DFSDM1_Filter0;
lypinator	0:bb348c97df44	995	}
lypinator	0:bb348c97df44	996	else
lypinator	0:bb348c97df44	997	{
lypinator	0:bb348c97df44	998	filter0Instance = DFSDM2_Filter0;
lypinator	0:bb348c97df44	999	}
lypinator	0:bb348c97df44	1000
lypinator	0:bb348c97df44	1001	/* Stop clock absence detection */
lypinator	0:bb348c97df44	1002	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
lypinator	0:bb348c97df44	1003
lypinator	0:bb348c97df44	1004	/* Clear clock absence flag */
lypinator	0:bb348c97df44	1005	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	1006	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	1007
lypinator	0:bb348c97df44	1008	/* Disable clock absence detection interrupt */
lypinator	0:bb348c97df44	1009	filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
lypinator	0:bb348c97df44	1010	#else
lypinator	0:bb348c97df44	1011
lypinator	0:bb348c97df44	1012	/* Stop clock absence detection */
lypinator	0:bb348c97df44	1013	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
lypinator	0:bb348c97df44	1014
lypinator	0:bb348c97df44	1015	/* Clear clock absence flag */
lypinator	0:bb348c97df44	1016	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	1017	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	1018
lypinator	0:bb348c97df44	1019	/* Disable clock absence detection interrupt */
lypinator	0:bb348c97df44	1020	DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
lypinator	0:bb348c97df44	1021	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	1022	}
lypinator	0:bb348c97df44	1023
lypinator	0:bb348c97df44	1024	/* Return function status */
lypinator	0:bb348c97df44	1025	return status;
lypinator	0:bb348c97df44	1026	}
lypinator	0:bb348c97df44	1027
lypinator	0:bb348c97df44	1028	/**
lypinator	0:bb348c97df44	1029	* @brief This function allows to start short circuit detection in polling mode.
lypinator	0:bb348c97df44	1030	* @note Same mode has to be used for all channels
lypinator	0:bb348c97df44	1031	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	1032	* @param Threshold Short circuit detector threshold.
lypinator	0:bb348c97df44	1033	* This parameter must be a number between Min_Data = 0 and Max_Data = 255.
lypinator	0:bb348c97df44	1034	* @param BreakSignal Break signals assigned to short circuit event.
lypinator	0:bb348c97df44	1035	* This parameter can be a values combination of @ref DFSDM_BreakSignals.
lypinator	0:bb348c97df44	1036	* @retval HAL status
lypinator	0:bb348c97df44	1037	*/
lypinator	0:bb348c97df44	1038	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
lypinator	0:bb348c97df44	1039	uint32_t Threshold,
lypinator	0:bb348c97df44	1040	uint32_t BreakSignal)
lypinator	0:bb348c97df44	1041	{
lypinator	0:bb348c97df44	1042	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1043
lypinator	0:bb348c97df44	1044	/* Check parameters */
lypinator	0:bb348c97df44	1045	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	1046	assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
lypinator	0:bb348c97df44	1047	assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
lypinator	0:bb348c97df44	1048
lypinator	0:bb348c97df44	1049	/* Check DFSDM channel state */
lypinator	0:bb348c97df44	1050	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
lypinator	0:bb348c97df44	1051	{
lypinator	0:bb348c97df44	1052	/* Return error status */
lypinator	0:bb348c97df44	1053	status = HAL_ERROR;
lypinator	0:bb348c97df44	1054	}
lypinator	0:bb348c97df44	1055	else
lypinator	0:bb348c97df44	1056	{
lypinator	0:bb348c97df44	1057	/* Configure threshold and break signals */
lypinator	0:bb348c97df44	1058	hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD \| DFSDM_CHAWSCDR_SCDT);
lypinator	0:bb348c97df44	1059	hdfsdm_channel->Instance->CHAWSCDR \|= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) \| \
lypinator	0:bb348c97df44	1060	Threshold);
lypinator	0:bb348c97df44	1061
lypinator	0:bb348c97df44	1062	/* Start short circuit detection */
lypinator	0:bb348c97df44	1063	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_SCDEN;
lypinator	0:bb348c97df44	1064	}
lypinator	0:bb348c97df44	1065	/* Return function status */
lypinator	0:bb348c97df44	1066	return status;
lypinator	0:bb348c97df44	1067	}
lypinator	0:bb348c97df44	1068
lypinator	0:bb348c97df44	1069	/**
lypinator	0:bb348c97df44	1070	* @brief This function allows to poll for the short circuit detection.
lypinator	0:bb348c97df44	1071	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	1072	* @param Timeout Timeout value in milliseconds.
lypinator	0:bb348c97df44	1073	* @retval HAL status
lypinator	0:bb348c97df44	1074	*/
lypinator	0:bb348c97df44	1075	HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
lypinator	0:bb348c97df44	1076	uint32_t Timeout)
lypinator	0:bb348c97df44	1077	{
lypinator	0:bb348c97df44	1078	uint32_t tickstart;
lypinator	0:bb348c97df44	1079	uint32_t channel;
lypinator	0:bb348c97df44	1080	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	1081	DFSDM_Filter_TypeDef* filter0Instance;
lypinator	0:bb348c97df44	1082	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	1083
lypinator	0:bb348c97df44	1084	/* Check parameters */
lypinator	0:bb348c97df44	1085	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	1086
lypinator	0:bb348c97df44	1087	/* Check DFSDM channel state */
lypinator	0:bb348c97df44	1088	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
lypinator	0:bb348c97df44	1089	{
lypinator	0:bb348c97df44	1090	/* Return error status */
lypinator	0:bb348c97df44	1091	return HAL_ERROR;
lypinator	0:bb348c97df44	1092	}
lypinator	0:bb348c97df44	1093	else
lypinator	0:bb348c97df44	1094	{
lypinator	0:bb348c97df44	1095	/* Get channel number from channel instance */
lypinator	0:bb348c97df44	1096	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	1097
lypinator	0:bb348c97df44	1098	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	1099	/* Get channel counter, channel handle table and channel 0 instance */
lypinator	0:bb348c97df44	1100	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
lypinator	0:bb348c97df44	1101	{
lypinator	0:bb348c97df44	1102	filter0Instance = DFSDM1_Filter0;
lypinator	0:bb348c97df44	1103	}
lypinator	0:bb348c97df44	1104	else
lypinator	0:bb348c97df44	1105	{
lypinator	0:bb348c97df44	1106	filter0Instance = DFSDM2_Filter0;
lypinator	0:bb348c97df44	1107	}
lypinator	0:bb348c97df44	1108
lypinator	0:bb348c97df44	1109	/* Get timeout */
lypinator	0:bb348c97df44	1110	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	1111
lypinator	0:bb348c97df44	1112	/* Wait short circuit detection */
lypinator	0:bb348c97df44	1113	while(((filter0Instance->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0U)
lypinator	0:bb348c97df44	1114	{
lypinator	0:bb348c97df44	1115	/* Check the Timeout */
lypinator	0:bb348c97df44	1116	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	1117	{
lypinator	0:bb348c97df44	1118	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
lypinator	0:bb348c97df44	1119	{
lypinator	0:bb348c97df44	1120	/* Return timeout status */
lypinator	0:bb348c97df44	1121	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1122	}
lypinator	0:bb348c97df44	1123	}
lypinator	0:bb348c97df44	1124	}
lypinator	0:bb348c97df44	1125
lypinator	0:bb348c97df44	1126	/* Clear short circuit detection flag */
lypinator	0:bb348c97df44	1127	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
lypinator	0:bb348c97df44	1128
lypinator	0:bb348c97df44	1129	#else
lypinator	0:bb348c97df44	1130	/* Get timeout */
lypinator	0:bb348c97df44	1131	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	1132
lypinator	0:bb348c97df44	1133	/* Wait short circuit detection */
lypinator	0:bb348c97df44	1134	while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0U)
lypinator	0:bb348c97df44	1135	{
lypinator	0:bb348c97df44	1136	/* Check the Timeout */
lypinator	0:bb348c97df44	1137	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	1138	{
lypinator	0:bb348c97df44	1139	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
lypinator	0:bb348c97df44	1140	{
lypinator	0:bb348c97df44	1141	/* Return timeout status */
lypinator	0:bb348c97df44	1142	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1143	}
lypinator	0:bb348c97df44	1144	}
lypinator	0:bb348c97df44	1145	}
lypinator	0:bb348c97df44	1146
lypinator	0:bb348c97df44	1147	/* Clear short circuit detection flag */
lypinator	0:bb348c97df44	1148	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
lypinator	0:bb348c97df44	1149	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	1150
lypinator	0:bb348c97df44	1151	/* Return function status */
lypinator	0:bb348c97df44	1152	return HAL_OK;
lypinator	0:bb348c97df44	1153	}
lypinator	0:bb348c97df44	1154	}
lypinator	0:bb348c97df44	1155
lypinator	0:bb348c97df44	1156	/**
lypinator	0:bb348c97df44	1157	* @brief This function allows to stop short circuit detection in polling mode.
lypinator	0:bb348c97df44	1158	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	1159	* @retval HAL status
lypinator	0:bb348c97df44	1160	*/
lypinator	0:bb348c97df44	1161	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	1162	{
lypinator	0:bb348c97df44	1163	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1164	uint32_t channel;
lypinator	0:bb348c97df44	1165	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	1166	DFSDM_Filter_TypeDef* filter0Instance;
lypinator	0:bb348c97df44	1167	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	1168
lypinator	0:bb348c97df44	1169	/* Check parameters */
lypinator	0:bb348c97df44	1170	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	1171
lypinator	0:bb348c97df44	1172	/* Check DFSDM channel state */
lypinator	0:bb348c97df44	1173	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
lypinator	0:bb348c97df44	1174	{
lypinator	0:bb348c97df44	1175	/* Return error status */
lypinator	0:bb348c97df44	1176	status = HAL_ERROR;
lypinator	0:bb348c97df44	1177	}
lypinator	0:bb348c97df44	1178	else
lypinator	0:bb348c97df44	1179	{
lypinator	0:bb348c97df44	1180	/* Stop short circuit detection */
lypinator	0:bb348c97df44	1181	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
lypinator	0:bb348c97df44	1182
lypinator	0:bb348c97df44	1183	/* Clear short circuit detection flag */
lypinator	0:bb348c97df44	1184	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	1185
lypinator	0:bb348c97df44	1186	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	1187	/* Get channel counter, channel handle table and channel 0 instance */
lypinator	0:bb348c97df44	1188	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
lypinator	0:bb348c97df44	1189	{
lypinator	0:bb348c97df44	1190	filter0Instance = DFSDM1_Filter0;
lypinator	0:bb348c97df44	1191	}
lypinator	0:bb348c97df44	1192	else
lypinator	0:bb348c97df44	1193	{
lypinator	0:bb348c97df44	1194	filter0Instance = DFSDM2_Filter0;
lypinator	0:bb348c97df44	1195	}
lypinator	0:bb348c97df44	1196
lypinator	0:bb348c97df44	1197	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
lypinator	0:bb348c97df44	1198	#else
lypinator	0:bb348c97df44	1199	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
lypinator	0:bb348c97df44	1200	#endif /* DFSDM2_Channel0*/
lypinator	0:bb348c97df44	1201	}
lypinator	0:bb348c97df44	1202	/* Return function status */
lypinator	0:bb348c97df44	1203	return status;
lypinator	0:bb348c97df44	1204	}
lypinator	0:bb348c97df44	1205
lypinator	0:bb348c97df44	1206	/**
lypinator	0:bb348c97df44	1207	* @brief This function allows to start short circuit detection in interrupt mode.
lypinator	0:bb348c97df44	1208	* @note Same mode has to be used for all channels
lypinator	0:bb348c97df44	1209	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	1210	* @param Threshold Short circuit detector threshold.
lypinator	0:bb348c97df44	1211	* This parameter must be a number between Min_Data = 0 and Max_Data = 255.
lypinator	0:bb348c97df44	1212	* @param BreakSignal Break signals assigned to short circuit event.
lypinator	0:bb348c97df44	1213	* This parameter can be a values combination of @ref DFSDM_BreakSignals.
lypinator	0:bb348c97df44	1214	* @retval HAL status
lypinator	0:bb348c97df44	1215	*/
lypinator	0:bb348c97df44	1216	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
lypinator	0:bb348c97df44	1217	uint32_t Threshold,
lypinator	0:bb348c97df44	1218	uint32_t BreakSignal)
lypinator	0:bb348c97df44	1219	{
lypinator	0:bb348c97df44	1220	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1221	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	1222	DFSDM_Filter_TypeDef* filter0Instance;
lypinator	0:bb348c97df44	1223	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	1224
lypinator	0:bb348c97df44	1225	/* Check parameters */
lypinator	0:bb348c97df44	1226	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	1227	assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
lypinator	0:bb348c97df44	1228	assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
lypinator	0:bb348c97df44	1229
lypinator	0:bb348c97df44	1230	/* Check DFSDM channel state */
lypinator	0:bb348c97df44	1231	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
lypinator	0:bb348c97df44	1232	{
lypinator	0:bb348c97df44	1233	/* Return error status */
lypinator	0:bb348c97df44	1234	status = HAL_ERROR;
lypinator	0:bb348c97df44	1235	}
lypinator	0:bb348c97df44	1236	else
lypinator	0:bb348c97df44	1237	{
lypinator	0:bb348c97df44	1238	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	1239	/* Get channel counter, channel handle table and channel 0 instance */
lypinator	0:bb348c97df44	1240	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
lypinator	0:bb348c97df44	1241	{
lypinator	0:bb348c97df44	1242	filter0Instance = DFSDM1_Filter0;
lypinator	0:bb348c97df44	1243	}
lypinator	0:bb348c97df44	1244	else
lypinator	0:bb348c97df44	1245	{
lypinator	0:bb348c97df44	1246	filter0Instance = DFSDM2_Filter0;
lypinator	0:bb348c97df44	1247	}
lypinator	0:bb348c97df44	1248	/* Activate short circuit detection interrupt */
lypinator	0:bb348c97df44	1249	filter0Instance->FLTCR2 \|= DFSDM_FLTCR2_SCDIE;
lypinator	0:bb348c97df44	1250	#else
lypinator	0:bb348c97df44	1251	/* Activate short circuit detection interrupt */
lypinator	0:bb348c97df44	1252	DFSDM1_Filter0->FLTCR2 \|= DFSDM_FLTCR2_SCDIE;
lypinator	0:bb348c97df44	1253	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	1254
lypinator	0:bb348c97df44	1255	/* Configure threshold and break signals */
lypinator	0:bb348c97df44	1256	hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD \| DFSDM_CHAWSCDR_SCDT);
lypinator	0:bb348c97df44	1257	hdfsdm_channel->Instance->CHAWSCDR \|= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) \| \
lypinator	0:bb348c97df44	1258	Threshold);
lypinator	0:bb348c97df44	1259
lypinator	0:bb348c97df44	1260	/* Start short circuit detection */
lypinator	0:bb348c97df44	1261	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_SCDEN;
lypinator	0:bb348c97df44	1262	}
lypinator	0:bb348c97df44	1263	/* Return function status */
lypinator	0:bb348c97df44	1264	return status;
lypinator	0:bb348c97df44	1265	}
lypinator	0:bb348c97df44	1266
lypinator	0:bb348c97df44	1267	/**
lypinator	0:bb348c97df44	1268	* @brief Short circuit detection callback.
lypinator	0:bb348c97df44	1269	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	1270	* @retval None
lypinator	0:bb348c97df44	1271	*/
lypinator	0:bb348c97df44	1272	__weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	1273	{
lypinator	0:bb348c97df44	1274	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	1275	UNUSED(hdfsdm_channel);
lypinator	0:bb348c97df44	1276	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	1277	the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
lypinator	0:bb348c97df44	1278	*/
lypinator	0:bb348c97df44	1279	}
lypinator	0:bb348c97df44	1280
lypinator	0:bb348c97df44	1281	/**
lypinator	0:bb348c97df44	1282	* @brief This function allows to stop short circuit detection in interrupt mode.
lypinator	0:bb348c97df44	1283	* @note Interrupt will be disabled for all channels
lypinator	0:bb348c97df44	1284	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	1285	* @retval HAL status
lypinator	0:bb348c97df44	1286	*/
lypinator	0:bb348c97df44	1287	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	1288	{
lypinator	0:bb348c97df44	1289	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1290	uint32_t channel;
lypinator	0:bb348c97df44	1291	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	1292	DFSDM_Filter_TypeDef* filter0Instance;
lypinator	0:bb348c97df44	1293	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	1294
lypinator	0:bb348c97df44	1295	/* Check parameters */
lypinator	0:bb348c97df44	1296	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	1297
lypinator	0:bb348c97df44	1298	/* Check DFSDM channel state */
lypinator	0:bb348c97df44	1299	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
lypinator	0:bb348c97df44	1300	{
lypinator	0:bb348c97df44	1301	/* Return error status */
lypinator	0:bb348c97df44	1302	status = HAL_ERROR;
lypinator	0:bb348c97df44	1303	}
lypinator	0:bb348c97df44	1304	else
lypinator	0:bb348c97df44	1305	{
lypinator	0:bb348c97df44	1306	/* Stop short circuit detection */
lypinator	0:bb348c97df44	1307	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
lypinator	0:bb348c97df44	1308
lypinator	0:bb348c97df44	1309	/* Clear short circuit detection flag */
lypinator	0:bb348c97df44	1310	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
lypinator	0:bb348c97df44	1311	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	1312	/* Get channel counter, channel handle table and channel 0 instance */
lypinator	0:bb348c97df44	1313	if(IS_DFSDM1_CHANNEL_INSTANCE(hdfsdm_channel->Instance))
lypinator	0:bb348c97df44	1314	{
lypinator	0:bb348c97df44	1315	filter0Instance = DFSDM1_Filter0;
lypinator	0:bb348c97df44	1316	}
lypinator	0:bb348c97df44	1317	else
lypinator	0:bb348c97df44	1318	{
lypinator	0:bb348c97df44	1319	filter0Instance = DFSDM2_Filter0;
lypinator	0:bb348c97df44	1320	}
lypinator	0:bb348c97df44	1321
lypinator	0:bb348c97df44	1322	filter0Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
lypinator	0:bb348c97df44	1323
lypinator	0:bb348c97df44	1324	/* Disable short circuit detection interrupt */
lypinator	0:bb348c97df44	1325	filter0Instance->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
lypinator	0:bb348c97df44	1326	#else
lypinator	0:bb348c97df44	1327	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
lypinator	0:bb348c97df44	1328
lypinator	0:bb348c97df44	1329	/* Disable short circuit detection interrupt */
lypinator	0:bb348c97df44	1330	DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
lypinator	0:bb348c97df44	1331	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	1332	}
lypinator	0:bb348c97df44	1333	/* Return function status */
lypinator	0:bb348c97df44	1334	return status;
lypinator	0:bb348c97df44	1335	}
lypinator	0:bb348c97df44	1336
lypinator	0:bb348c97df44	1337	/**
lypinator	0:bb348c97df44	1338	* @brief This function allows to get channel analog watchdog value.
lypinator	0:bb348c97df44	1339	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	1340	* @retval Channel analog watchdog value.
lypinator	0:bb348c97df44	1341	*/
lypinator	0:bb348c97df44	1342	int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	1343	{
lypinator	0:bb348c97df44	1344	return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
lypinator	0:bb348c97df44	1345	}
lypinator	0:bb348c97df44	1346
lypinator	0:bb348c97df44	1347	/**
lypinator	0:bb348c97df44	1348	* @brief This function allows to modify channel offset value.
lypinator	0:bb348c97df44	1349	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	1350	* @param Offset DFSDM channel offset.
lypinator	0:bb348c97df44	1351	* This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
lypinator	0:bb348c97df44	1352	* @retval HAL status.
lypinator	0:bb348c97df44	1353	*/
lypinator	0:bb348c97df44	1354	HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
lypinator	0:bb348c97df44	1355	int32_t Offset)
lypinator	0:bb348c97df44	1356	{
lypinator	0:bb348c97df44	1357	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1358
lypinator	0:bb348c97df44	1359	/* Check parameters */
lypinator	0:bb348c97df44	1360	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
lypinator	0:bb348c97df44	1361	assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
lypinator	0:bb348c97df44	1362
lypinator	0:bb348c97df44	1363	/* Check DFSDM channel state */
lypinator	0:bb348c97df44	1364	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
lypinator	0:bb348c97df44	1365	{
lypinator	0:bb348c97df44	1366	/* Return error status */
lypinator	0:bb348c97df44	1367	status = HAL_ERROR;
lypinator	0:bb348c97df44	1368	}
lypinator	0:bb348c97df44	1369	else
lypinator	0:bb348c97df44	1370	{
lypinator	0:bb348c97df44	1371	/* Modify channel offset */
lypinator	0:bb348c97df44	1372	hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
lypinator	0:bb348c97df44	1373	hdfsdm_channel->Instance->CHCFGR2 \|= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);
lypinator	0:bb348c97df44	1374	}
lypinator	0:bb348c97df44	1375	/* Return function status */
lypinator	0:bb348c97df44	1376	return status;
lypinator	0:bb348c97df44	1377	}
lypinator	0:bb348c97df44	1378
lypinator	0:bb348c97df44	1379	/**
lypinator	0:bb348c97df44	1380	* @}
lypinator	0:bb348c97df44	1381	*/
lypinator	0:bb348c97df44	1382
lypinator	0:bb348c97df44	1383	/** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
lypinator	0:bb348c97df44	1384	* @brief Channel state function
lypinator	0:bb348c97df44	1385	*
lypinator	0:bb348c97df44	1386	@verbatim
lypinator	0:bb348c97df44	1387	==============================================================================
lypinator	0:bb348c97df44	1388	##### Channel state function #####
lypinator	0:bb348c97df44	1389	==============================================================================
lypinator	0:bb348c97df44	1390	[..] This section provides function allowing to:
lypinator	0:bb348c97df44	1391	(+) Get channel handle state.
lypinator	0:bb348c97df44	1392	@endverbatim
lypinator	0:bb348c97df44	1393	* @{
lypinator	0:bb348c97df44	1394	*/
lypinator	0:bb348c97df44	1395
lypinator	0:bb348c97df44	1396	/**
lypinator	0:bb348c97df44	1397	* @brief This function allows to get the current DFSDM channel handle state.
lypinator	0:bb348c97df44	1398	* @param hdfsdm_channel DFSDM channel handle.
lypinator	0:bb348c97df44	1399	* @retval DFSDM channel state.
lypinator	0:bb348c97df44	1400	*/
lypinator	0:bb348c97df44	1401	HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
lypinator	0:bb348c97df44	1402	{
lypinator	0:bb348c97df44	1403	/* Return DFSDM channel handle state */
lypinator	0:bb348c97df44	1404	return hdfsdm_channel->State;
lypinator	0:bb348c97df44	1405	}
lypinator	0:bb348c97df44	1406
lypinator	0:bb348c97df44	1407	/**
lypinator	0:bb348c97df44	1408	* @}
lypinator	0:bb348c97df44	1409	*/
lypinator	0:bb348c97df44	1410
lypinator	0:bb348c97df44	1411	/** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
lypinator	0:bb348c97df44	1412	* @brief Filter initialization and de-initialization functions
lypinator	0:bb348c97df44	1413	*
lypinator	0:bb348c97df44	1414	@verbatim
lypinator	0:bb348c97df44	1415	==============================================================================
lypinator	0:bb348c97df44	1416	##### Filter initialization and de-initialization functions #####
lypinator	0:bb348c97df44	1417	==============================================================================
lypinator	0:bb348c97df44	1418	[..] This section provides functions allowing to:
lypinator	0:bb348c97df44	1419	(+) Initialize the DFSDM filter.
lypinator	0:bb348c97df44	1420	(+) De-initialize the DFSDM filter.
lypinator	0:bb348c97df44	1421	@endverbatim
lypinator	0:bb348c97df44	1422	* @{
lypinator	0:bb348c97df44	1423	*/
lypinator	0:bb348c97df44	1424
lypinator	0:bb348c97df44	1425	/**
lypinator	0:bb348c97df44	1426	* @brief Initialize the DFSDM filter according to the specified parameters
lypinator	0:bb348c97df44	1427	* in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
lypinator	0:bb348c97df44	1428	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1429	* @retval HAL status.
lypinator	0:bb348c97df44	1430	*/
lypinator	0:bb348c97df44	1431	HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	1432	{
lypinator	0:bb348c97df44	1433	/* Check DFSDM Channel handle */
lypinator	0:bb348c97df44	1434	if(hdfsdm_filter == NULL)
lypinator	0:bb348c97df44	1435	{
lypinator	0:bb348c97df44	1436	return HAL_ERROR;
lypinator	0:bb348c97df44	1437	}
lypinator	0:bb348c97df44	1438
lypinator	0:bb348c97df44	1439	/* Check parameters */
lypinator	0:bb348c97df44	1440	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	1441	assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
lypinator	0:bb348c97df44	1442	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
lypinator	0:bb348c97df44	1443	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
lypinator	0:bb348c97df44	1444	assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
lypinator	0:bb348c97df44	1445	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
lypinator	0:bb348c97df44	1446	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
lypinator	0:bb348c97df44	1447	assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
lypinator	0:bb348c97df44	1448	assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
lypinator	0:bb348c97df44	1449	assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
lypinator	0:bb348c97df44	1450
lypinator	0:bb348c97df44	1451	/* Check parameters compatibility */
lypinator	0:bb348c97df44	1452	if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
lypinator	0:bb348c97df44	1453	((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) \|\|
lypinator	0:bb348c97df44	1454	(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
lypinator	0:bb348c97df44	1455	{
lypinator	0:bb348c97df44	1456	return HAL_ERROR;
lypinator	0:bb348c97df44	1457	}
lypinator	0:bb348c97df44	1458	#if defined (DFSDM2_Channel0)
lypinator	0:bb348c97df44	1459	if((hdfsdm_filter->Instance == DFSDM2_Filter0) &&
lypinator	0:bb348c97df44	1460	((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) \|\|
lypinator	0:bb348c97df44	1461	(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
lypinator	0:bb348c97df44	1462	{
lypinator	0:bb348c97df44	1463	return HAL_ERROR;
lypinator	0:bb348c97df44	1464	}
lypinator	0:bb348c97df44	1465	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	1466
lypinator	0:bb348c97df44	1467	/* Initialize DFSDM filter variables with default values */
lypinator	0:bb348c97df44	1468	hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
lypinator	0:bb348c97df44	1469	hdfsdm_filter->InjectedChannelsNbr = 1U;
lypinator	0:bb348c97df44	1470	hdfsdm_filter->InjConvRemaining = 1U;
lypinator	0:bb348c97df44	1471	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
lypinator	0:bb348c97df44	1472
lypinator	0:bb348c97df44	1473	/* Call MSP init function */
lypinator	0:bb348c97df44	1474	HAL_DFSDM_FilterMspInit(hdfsdm_filter);
lypinator	0:bb348c97df44	1475
lypinator	0:bb348c97df44	1476	/* Set regular parameters */
lypinator	0:bb348c97df44	1477	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
lypinator	0:bb348c97df44	1478	if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
lypinator	0:bb348c97df44	1479	{
lypinator	0:bb348c97df44	1480	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_FAST;
lypinator	0:bb348c97df44	1481	}
lypinator	0:bb348c97df44	1482	else
lypinator	0:bb348c97df44	1483	{
lypinator	0:bb348c97df44	1484	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
lypinator	0:bb348c97df44	1485	}
lypinator	0:bb348c97df44	1486
lypinator	0:bb348c97df44	1487	if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
lypinator	0:bb348c97df44	1488	{
lypinator	0:bb348c97df44	1489	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RDMAEN;
lypinator	0:bb348c97df44	1490	}
lypinator	0:bb348c97df44	1491	else
lypinator	0:bb348c97df44	1492	{
lypinator	0:bb348c97df44	1493	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
lypinator	0:bb348c97df44	1494	}
lypinator	0:bb348c97df44	1495
lypinator	0:bb348c97df44	1496	/* Set injected parameters */
lypinator	0:bb348c97df44	1497	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC \| DFSDM_FLTCR1_JEXTEN \| DFSDM_FLTCR1_JEXTSEL);
lypinator	0:bb348c97df44	1498	if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
lypinator	0:bb348c97df44	1499	{
lypinator	0:bb348c97df44	1500	assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
lypinator	0:bb348c97df44	1501	assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
lypinator	0:bb348c97df44	1502	hdfsdm_filter->Instance->FLTCR1 \|= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
lypinator	0:bb348c97df44	1503	}
lypinator	0:bb348c97df44	1504
lypinator	0:bb348c97df44	1505	if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
lypinator	0:bb348c97df44	1506	{
lypinator	0:bb348c97df44	1507	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSCAN;
lypinator	0:bb348c97df44	1508	}
lypinator	0:bb348c97df44	1509	else
lypinator	0:bb348c97df44	1510	{
lypinator	0:bb348c97df44	1511	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
lypinator	0:bb348c97df44	1512	}
lypinator	0:bb348c97df44	1513
lypinator	0:bb348c97df44	1514	if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
lypinator	0:bb348c97df44	1515	{
lypinator	0:bb348c97df44	1516	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JDMAEN;
lypinator	0:bb348c97df44	1517	}
lypinator	0:bb348c97df44	1518	else
lypinator	0:bb348c97df44	1519	{
lypinator	0:bb348c97df44	1520	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
lypinator	0:bb348c97df44	1521	}
lypinator	0:bb348c97df44	1522
lypinator	0:bb348c97df44	1523	/* Set filter parameters */
lypinator	0:bb348c97df44	1524	hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD \| DFSDM_FLTFCR_FOSR \| DFSDM_FLTFCR_IOSR);
lypinator	0:bb348c97df44	1525	hdfsdm_filter->Instance->FLTFCR \|= (hdfsdm_filter->Init.FilterParam.SincOrder \|
lypinator	0:bb348c97df44	1526	((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) \|
lypinator	0:bb348c97df44	1527	(hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));
lypinator	0:bb348c97df44	1528
lypinator	0:bb348c97df44	1529	/* Store regular and injected triggers and injected scan mode*/
lypinator	0:bb348c97df44	1530	hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
lypinator	0:bb348c97df44	1531	hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
lypinator	0:bb348c97df44	1532	hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
lypinator	0:bb348c97df44	1533	hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
lypinator	0:bb348c97df44	1534
lypinator	0:bb348c97df44	1535	/* Enable DFSDM filter */
lypinator	0:bb348c97df44	1536	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
lypinator	0:bb348c97df44	1537
lypinator	0:bb348c97df44	1538	/* Set DFSDM filter to ready state */
lypinator	0:bb348c97df44	1539	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
lypinator	0:bb348c97df44	1540
lypinator	0:bb348c97df44	1541	return HAL_OK;
lypinator	0:bb348c97df44	1542	}
lypinator	0:bb348c97df44	1543
lypinator	0:bb348c97df44	1544	/**
lypinator	0:bb348c97df44	1545	* @brief De-initializes the DFSDM filter.
lypinator	0:bb348c97df44	1546	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1547	* @retval HAL status.
lypinator	0:bb348c97df44	1548	*/
lypinator	0:bb348c97df44	1549	HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	1550	{
lypinator	0:bb348c97df44	1551	/* Check DFSDM filter handle */
lypinator	0:bb348c97df44	1552	if(hdfsdm_filter == NULL)
lypinator	0:bb348c97df44	1553	{
lypinator	0:bb348c97df44	1554	return HAL_ERROR;
lypinator	0:bb348c97df44	1555	}
lypinator	0:bb348c97df44	1556
lypinator	0:bb348c97df44	1557	/* Check parameters */
lypinator	0:bb348c97df44	1558	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	1559
lypinator	0:bb348c97df44	1560	/* Disable the DFSDM filter */
lypinator	0:bb348c97df44	1561	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
lypinator	0:bb348c97df44	1562
lypinator	0:bb348c97df44	1563	/* Call MSP deinit function */
lypinator	0:bb348c97df44	1564	HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
lypinator	0:bb348c97df44	1565
lypinator	0:bb348c97df44	1566	/* Set DFSDM filter in reset state */
lypinator	0:bb348c97df44	1567	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
lypinator	0:bb348c97df44	1568
lypinator	0:bb348c97df44	1569	return HAL_OK;
lypinator	0:bb348c97df44	1570	}
lypinator	0:bb348c97df44	1571
lypinator	0:bb348c97df44	1572	/**
lypinator	0:bb348c97df44	1573	* @brief Initializes the DFSDM filter MSP.
lypinator	0:bb348c97df44	1574	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1575	* @retval None
lypinator	0:bb348c97df44	1576	*/
lypinator	0:bb348c97df44	1577	__weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	1578	{
lypinator	0:bb348c97df44	1579	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	1580	UNUSED(hdfsdm_filter);
lypinator	0:bb348c97df44	1581	/* NOTE : This function should not be modified, when the function is needed,
lypinator	0:bb348c97df44	1582	the HAL_DFSDM_FilterMspInit could be implemented in the user file.
lypinator	0:bb348c97df44	1583	*/
lypinator	0:bb348c97df44	1584	}
lypinator	0:bb348c97df44	1585
lypinator	0:bb348c97df44	1586	/**
lypinator	0:bb348c97df44	1587	* @brief De-initializes the DFSDM filter MSP.
lypinator	0:bb348c97df44	1588	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1589	* @retval None
lypinator	0:bb348c97df44	1590	*/
lypinator	0:bb348c97df44	1591	__weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	1592	{
lypinator	0:bb348c97df44	1593	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	1594	UNUSED(hdfsdm_filter);
lypinator	0:bb348c97df44	1595	/* NOTE : This function should not be modified, when the function is needed,
lypinator	0:bb348c97df44	1596	the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
lypinator	0:bb348c97df44	1597	*/
lypinator	0:bb348c97df44	1598	}
lypinator	0:bb348c97df44	1599
lypinator	0:bb348c97df44	1600	/**
lypinator	0:bb348c97df44	1601	* @}
lypinator	0:bb348c97df44	1602	*/
lypinator	0:bb348c97df44	1603
lypinator	0:bb348c97df44	1604	/** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
lypinator	0:bb348c97df44	1605	* @brief Filter control functions
lypinator	0:bb348c97df44	1606	*
lypinator	0:bb348c97df44	1607	@verbatim
lypinator	0:bb348c97df44	1608	==============================================================================
lypinator	0:bb348c97df44	1609	##### Filter control functions #####
lypinator	0:bb348c97df44	1610	==============================================================================
lypinator	0:bb348c97df44	1611	[..] This section provides functions allowing to:
lypinator	0:bb348c97df44	1612	(+) Select channel and enable/disable continuous mode for regular conversion.
lypinator	0:bb348c97df44	1613	(+) Select channels for injected conversion.
lypinator	0:bb348c97df44	1614	@endverbatim
lypinator	0:bb348c97df44	1615	* @{
lypinator	0:bb348c97df44	1616	*/
lypinator	0:bb348c97df44	1617
lypinator	0:bb348c97df44	1618	/**
lypinator	0:bb348c97df44	1619	* @brief This function allows to select channel and to enable/disable
lypinator	0:bb348c97df44	1620	* continuous mode for regular conversion.
lypinator	0:bb348c97df44	1621	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1622	* @param Channel Channel for regular conversion.
lypinator	0:bb348c97df44	1623	* This parameter can be a value of @ref DFSDM_Channel_Selection.
lypinator	0:bb348c97df44	1624	* @param ContinuousMode Enable/disable continuous mode for regular conversion.
lypinator	0:bb348c97df44	1625	* This parameter can be a value of @ref DFSDM_ContinuousMode.
lypinator	0:bb348c97df44	1626	* @retval HAL status
lypinator	0:bb348c97df44	1627	*/
lypinator	0:bb348c97df44	1628	HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	1629	uint32_t Channel,
lypinator	0:bb348c97df44	1630	uint32_t ContinuousMode)
lypinator	0:bb348c97df44	1631	{
lypinator	0:bb348c97df44	1632	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1633
lypinator	0:bb348c97df44	1634	/* Check parameters */
lypinator	0:bb348c97df44	1635	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	1636	assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
lypinator	0:bb348c97df44	1637	assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
lypinator	0:bb348c97df44	1638
lypinator	0:bb348c97df44	1639	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	1640	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
lypinator	0:bb348c97df44	1641	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
lypinator	0:bb348c97df44	1642	{
lypinator	0:bb348c97df44	1643	/* Configure channel and continuous mode for regular conversion */
lypinator	0:bb348c97df44	1644	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH \| DFSDM_FLTCR1_RCONT);
lypinator	0:bb348c97df44	1645	if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
lypinator	0:bb348c97df44	1646	{
lypinator	0:bb348c97df44	1647	hdfsdm_filter->Instance->FLTCR1 \|= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) \|
lypinator	0:bb348c97df44	1648	DFSDM_FLTCR1_RCONT);
lypinator	0:bb348c97df44	1649	}
lypinator	0:bb348c97df44	1650	else
lypinator	0:bb348c97df44	1651	{
lypinator	0:bb348c97df44	1652	hdfsdm_filter->Instance->FLTCR1 \|= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
lypinator	0:bb348c97df44	1653	}
lypinator	0:bb348c97df44	1654	/* Store continuous mode information */
lypinator	0:bb348c97df44	1655	hdfsdm_filter->RegularContMode = ContinuousMode;
lypinator	0:bb348c97df44	1656	}
lypinator	0:bb348c97df44	1657	else
lypinator	0:bb348c97df44	1658	{
lypinator	0:bb348c97df44	1659	status = HAL_ERROR;
lypinator	0:bb348c97df44	1660	}
lypinator	0:bb348c97df44	1661
lypinator	0:bb348c97df44	1662	/* Return function status */
lypinator	0:bb348c97df44	1663	return status;
lypinator	0:bb348c97df44	1664	}
lypinator	0:bb348c97df44	1665
lypinator	0:bb348c97df44	1666	/**
lypinator	0:bb348c97df44	1667	* @brief This function allows to select channels for injected conversion.
lypinator	0:bb348c97df44	1668	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1669	* @param Channel Channels for injected conversion.
lypinator	0:bb348c97df44	1670	* This parameter can be a values combination of @ref DFSDM_Channel_Selection.
lypinator	0:bb348c97df44	1671	* @retval HAL status
lypinator	0:bb348c97df44	1672	*/
lypinator	0:bb348c97df44	1673	HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	1674	uint32_t Channel)
lypinator	0:bb348c97df44	1675	{
lypinator	0:bb348c97df44	1676	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1677
lypinator	0:bb348c97df44	1678	/* Check parameters */
lypinator	0:bb348c97df44	1679	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	1680	assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
lypinator	0:bb348c97df44	1681
lypinator	0:bb348c97df44	1682	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	1683	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
lypinator	0:bb348c97df44	1684	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
lypinator	0:bb348c97df44	1685	{
lypinator	0:bb348c97df44	1686	/* Configure channel for injected conversion */
lypinator	0:bb348c97df44	1687	hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
lypinator	0:bb348c97df44	1688	/* Store number of injected channels */
lypinator	0:bb348c97df44	1689	hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
lypinator	0:bb348c97df44	1690	/* Update number of injected channels remaining */
lypinator	0:bb348c97df44	1691	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
lypinator	0:bb348c97df44	1692	hdfsdm_filter->InjectedChannelsNbr : 1U;
lypinator	0:bb348c97df44	1693	}
lypinator	0:bb348c97df44	1694	else
lypinator	0:bb348c97df44	1695	{
lypinator	0:bb348c97df44	1696	status = HAL_ERROR;
lypinator	0:bb348c97df44	1697	}
lypinator	0:bb348c97df44	1698	/* Return function status */
lypinator	0:bb348c97df44	1699	return status;
lypinator	0:bb348c97df44	1700	}
lypinator	0:bb348c97df44	1701
lypinator	0:bb348c97df44	1702	/**
lypinator	0:bb348c97df44	1703	* @}
lypinator	0:bb348c97df44	1704	*/
lypinator	0:bb348c97df44	1705
lypinator	0:bb348c97df44	1706	/** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
lypinator	0:bb348c97df44	1707	* @brief Filter operation functions
lypinator	0:bb348c97df44	1708	*
lypinator	0:bb348c97df44	1709	@verbatim
lypinator	0:bb348c97df44	1710	==============================================================================
lypinator	0:bb348c97df44	1711	##### Filter operation functions #####
lypinator	0:bb348c97df44	1712	==============================================================================
lypinator	0:bb348c97df44	1713	[..] This section provides functions allowing to:
lypinator	0:bb348c97df44	1714	(+) Start conversion of regular/injected channel.
lypinator	0:bb348c97df44	1715	(+) Poll for the end of regular/injected conversion.
lypinator	0:bb348c97df44	1716	(+) Stop conversion of regular/injected channel.
lypinator	0:bb348c97df44	1717	(+) Start conversion of regular/injected channel and enable interrupt.
lypinator	0:bb348c97df44	1718	(+) Call the callback functions at the end of regular/injected conversions.
lypinator	0:bb348c97df44	1719	(+) Stop conversion of regular/injected channel and disable interrupt.
lypinator	0:bb348c97df44	1720	(+) Start conversion of regular/injected channel and enable DMA transfer.
lypinator	0:bb348c97df44	1721	(+) Stop conversion of regular/injected channel and disable DMA transfer.
lypinator	0:bb348c97df44	1722	(+) Start analog watchdog and enable interrupt.
lypinator	0:bb348c97df44	1723	(+) Call the callback function when analog watchdog occurs.
lypinator	0:bb348c97df44	1724	(+) Stop analog watchdog and disable interrupt.
lypinator	0:bb348c97df44	1725	(+) Start extreme detector.
lypinator	0:bb348c97df44	1726	(+) Stop extreme detector.
lypinator	0:bb348c97df44	1727	(+) Get result of regular channel conversion.
lypinator	0:bb348c97df44	1728	(+) Get result of injected channel conversion.
lypinator	0:bb348c97df44	1729	(+) Get extreme detector maximum and minimum values.
lypinator	0:bb348c97df44	1730	(+) Get conversion time.
lypinator	0:bb348c97df44	1731	(+) Handle DFSDM interrupt request.
lypinator	0:bb348c97df44	1732	@endverbatim
lypinator	0:bb348c97df44	1733	* @{
lypinator	0:bb348c97df44	1734	*/
lypinator	0:bb348c97df44	1735
lypinator	0:bb348c97df44	1736	/**
lypinator	0:bb348c97df44	1737	* @brief This function allows to start regular conversion in polling mode.
lypinator	0:bb348c97df44	1738	* @note This function should be called only when DFSDM filter instance is
lypinator	0:bb348c97df44	1739	* in idle state or if injected conversion is ongoing.
lypinator	0:bb348c97df44	1740	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1741	* @retval HAL status
lypinator	0:bb348c97df44	1742	*/
lypinator	0:bb348c97df44	1743	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	1744	{
lypinator	0:bb348c97df44	1745	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1746
lypinator	0:bb348c97df44	1747	/* Check parameters */
lypinator	0:bb348c97df44	1748	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	1749
lypinator	0:bb348c97df44	1750	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	1751	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
lypinator	0:bb348c97df44	1752	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
lypinator	0:bb348c97df44	1753	{
lypinator	0:bb348c97df44	1754	/* Start regular conversion */
lypinator	0:bb348c97df44	1755	DFSDM_RegConvStart(hdfsdm_filter);
lypinator	0:bb348c97df44	1756	}
lypinator	0:bb348c97df44	1757	else
lypinator	0:bb348c97df44	1758	{
lypinator	0:bb348c97df44	1759	status = HAL_ERROR;
lypinator	0:bb348c97df44	1760	}
lypinator	0:bb348c97df44	1761	/* Return function status */
lypinator	0:bb348c97df44	1762	return status;
lypinator	0:bb348c97df44	1763	}
lypinator	0:bb348c97df44	1764
lypinator	0:bb348c97df44	1765	/**
lypinator	0:bb348c97df44	1766	* @brief This function allows to poll for the end of regular conversion.
lypinator	0:bb348c97df44	1767	* @note This function should be called only if regular conversion is ongoing.
lypinator	0:bb348c97df44	1768	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1769	* @param Timeout Timeout value in milliseconds.
lypinator	0:bb348c97df44	1770	* @retval HAL status
lypinator	0:bb348c97df44	1771	*/
lypinator	0:bb348c97df44	1772	HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	1773	uint32_t Timeout)
lypinator	0:bb348c97df44	1774	{
lypinator	0:bb348c97df44	1775	uint32_t tickstart;
lypinator	0:bb348c97df44	1776
lypinator	0:bb348c97df44	1777	/* Check parameters */
lypinator	0:bb348c97df44	1778	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	1779
lypinator	0:bb348c97df44	1780	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	1781	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
lypinator	0:bb348c97df44	1782	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
lypinator	0:bb348c97df44	1783	{
lypinator	0:bb348c97df44	1784	/* Return error status */
lypinator	0:bb348c97df44	1785	return HAL_ERROR;
lypinator	0:bb348c97df44	1786	}
lypinator	0:bb348c97df44	1787	else
lypinator	0:bb348c97df44	1788	{
lypinator	0:bb348c97df44	1789	/* Get timeout */
lypinator	0:bb348c97df44	1790	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	1791
lypinator	0:bb348c97df44	1792	/* Wait end of regular conversion */
lypinator	0:bb348c97df44	1793	while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
lypinator	0:bb348c97df44	1794	{
lypinator	0:bb348c97df44	1795	/* Check the Timeout */
lypinator	0:bb348c97df44	1796	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	1797	{
lypinator	0:bb348c97df44	1798	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
lypinator	0:bb348c97df44	1799	{
lypinator	0:bb348c97df44	1800	/* Return timeout status */
lypinator	0:bb348c97df44	1801	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	1802	}
lypinator	0:bb348c97df44	1803	}
lypinator	0:bb348c97df44	1804	}
lypinator	0:bb348c97df44	1805	/* Check if overrun occurs */
lypinator	0:bb348c97df44	1806	if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
lypinator	0:bb348c97df44	1807	{
lypinator	0:bb348c97df44	1808	/* Update error code and call error callback */
lypinator	0:bb348c97df44	1809	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
lypinator	0:bb348c97df44	1810	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
lypinator	0:bb348c97df44	1811
lypinator	0:bb348c97df44	1812	/* Clear regular overrun flag */
lypinator	0:bb348c97df44	1813	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
lypinator	0:bb348c97df44	1814	}
lypinator	0:bb348c97df44	1815	/* Update DFSDM filter state only if not continuous conversion and SW trigger */
lypinator	0:bb348c97df44	1816	if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
lypinator	0:bb348c97df44	1817	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
lypinator	0:bb348c97df44	1818	{
lypinator	0:bb348c97df44	1819	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
lypinator	0:bb348c97df44	1820	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
lypinator	0:bb348c97df44	1821	}
lypinator	0:bb348c97df44	1822	/* Return function status */
lypinator	0:bb348c97df44	1823	return HAL_OK;
lypinator	0:bb348c97df44	1824	}
lypinator	0:bb348c97df44	1825	}
lypinator	0:bb348c97df44	1826
lypinator	0:bb348c97df44	1827	/**
lypinator	0:bb348c97df44	1828	* @brief This function allows to stop regular conversion in polling mode.
lypinator	0:bb348c97df44	1829	* @note This function should be called only if regular conversion is ongoing.
lypinator	0:bb348c97df44	1830	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1831	* @retval HAL status
lypinator	0:bb348c97df44	1832	*/
lypinator	0:bb348c97df44	1833	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	1834	{
lypinator	0:bb348c97df44	1835	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1836
lypinator	0:bb348c97df44	1837	/* Check parameters */
lypinator	0:bb348c97df44	1838	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	1839
lypinator	0:bb348c97df44	1840	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	1841	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
lypinator	0:bb348c97df44	1842	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
lypinator	0:bb348c97df44	1843	{
lypinator	0:bb348c97df44	1844	/* Return error status */
lypinator	0:bb348c97df44	1845	status = HAL_ERROR;
lypinator	0:bb348c97df44	1846	}
lypinator	0:bb348c97df44	1847	else
lypinator	0:bb348c97df44	1848	{
lypinator	0:bb348c97df44	1849	/* Stop regular conversion */
lypinator	0:bb348c97df44	1850	DFSDM_RegConvStop(hdfsdm_filter);
lypinator	0:bb348c97df44	1851	}
lypinator	0:bb348c97df44	1852	/* Return function status */
lypinator	0:bb348c97df44	1853	return status;
lypinator	0:bb348c97df44	1854	}
lypinator	0:bb348c97df44	1855
lypinator	0:bb348c97df44	1856	/**
lypinator	0:bb348c97df44	1857	* @brief This function allows to start regular conversion in interrupt mode.
lypinator	0:bb348c97df44	1858	* @note This function should be called only when DFSDM filter instance is
lypinator	0:bb348c97df44	1859	* in idle state or if injected conversion is ongoing.
lypinator	0:bb348c97df44	1860	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1861	* @retval HAL status
lypinator	0:bb348c97df44	1862	*/
lypinator	0:bb348c97df44	1863	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	1864	{
lypinator	0:bb348c97df44	1865	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1866
lypinator	0:bb348c97df44	1867	/* Check parameters */
lypinator	0:bb348c97df44	1868	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	1869
lypinator	0:bb348c97df44	1870	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	1871	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
lypinator	0:bb348c97df44	1872	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
lypinator	0:bb348c97df44	1873	{
lypinator	0:bb348c97df44	1874	/* Enable interrupts for regular conversions */
lypinator	0:bb348c97df44	1875	hdfsdm_filter->Instance->FLTCR2 \|= (DFSDM_FLTCR2_REOCIE \| DFSDM_FLTCR2_ROVRIE);
lypinator	0:bb348c97df44	1876
lypinator	0:bb348c97df44	1877	/* Start regular conversion */
lypinator	0:bb348c97df44	1878	DFSDM_RegConvStart(hdfsdm_filter);
lypinator	0:bb348c97df44	1879	}
lypinator	0:bb348c97df44	1880	else
lypinator	0:bb348c97df44	1881	{
lypinator	0:bb348c97df44	1882	status = HAL_ERROR;
lypinator	0:bb348c97df44	1883	}
lypinator	0:bb348c97df44	1884	/* Return function status */
lypinator	0:bb348c97df44	1885	return status;
lypinator	0:bb348c97df44	1886	}
lypinator	0:bb348c97df44	1887
lypinator	0:bb348c97df44	1888	/**
lypinator	0:bb348c97df44	1889	* @brief This function allows to stop regular conversion in interrupt mode.
lypinator	0:bb348c97df44	1890	* @note This function should be called only if regular conversion is ongoing.
lypinator	0:bb348c97df44	1891	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1892	* @retval HAL status
lypinator	0:bb348c97df44	1893	*/
lypinator	0:bb348c97df44	1894	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	1895	{
lypinator	0:bb348c97df44	1896	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1897
lypinator	0:bb348c97df44	1898	/* Check parameters */
lypinator	0:bb348c97df44	1899	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	1900
lypinator	0:bb348c97df44	1901	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	1902	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
lypinator	0:bb348c97df44	1903	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
lypinator	0:bb348c97df44	1904	{
lypinator	0:bb348c97df44	1905	/* Return error status */
lypinator	0:bb348c97df44	1906	status = HAL_ERROR;
lypinator	0:bb348c97df44	1907	}
lypinator	0:bb348c97df44	1908	else
lypinator	0:bb348c97df44	1909	{
lypinator	0:bb348c97df44	1910	/* Disable interrupts for regular conversions */
lypinator	0:bb348c97df44	1911	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE \| DFSDM_FLTCR2_ROVRIE);
lypinator	0:bb348c97df44	1912
lypinator	0:bb348c97df44	1913	/* Stop regular conversion */
lypinator	0:bb348c97df44	1914	DFSDM_RegConvStop(hdfsdm_filter);
lypinator	0:bb348c97df44	1915	}
lypinator	0:bb348c97df44	1916	/* Return function status */
lypinator	0:bb348c97df44	1917	return status;
lypinator	0:bb348c97df44	1918	}
lypinator	0:bb348c97df44	1919
lypinator	0:bb348c97df44	1920	/**
lypinator	0:bb348c97df44	1921	* @brief This function allows to start regular conversion in DMA mode.
lypinator	0:bb348c97df44	1922	* @note This function should be called only when DFSDM filter instance is
lypinator	0:bb348c97df44	1923	* in idle state or if injected conversion is ongoing.
lypinator	0:bb348c97df44	1924	* Please note that data on buffer will contain signed regular conversion
lypinator	0:bb348c97df44	1925	* value on 24 most significant bits and corresponding channel on 3 least
lypinator	0:bb348c97df44	1926	* significant bits.
lypinator	0:bb348c97df44	1927	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	1928	* @param pData The destination buffer address.
lypinator	0:bb348c97df44	1929	* @param Length The length of data to be transferred from DFSDM filter to memory.
lypinator	0:bb348c97df44	1930	* @retval HAL status
lypinator	0:bb348c97df44	1931	*/
lypinator	0:bb348c97df44	1932	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	1933	int32_t *pData,
lypinator	0:bb348c97df44	1934	uint32_t Length)
lypinator	0:bb348c97df44	1935	{
lypinator	0:bb348c97df44	1936	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	1937
lypinator	0:bb348c97df44	1938	/* Check parameters */
lypinator	0:bb348c97df44	1939	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	1940
lypinator	0:bb348c97df44	1941	/* Check destination address and length */
lypinator	0:bb348c97df44	1942	if((pData == NULL) \|\| (Length == 0U))
lypinator	0:bb348c97df44	1943	{
lypinator	0:bb348c97df44	1944	status = HAL_ERROR;
lypinator	0:bb348c97df44	1945	}
lypinator	0:bb348c97df44	1946	/* Check that DMA is enabled for regular conversion */
lypinator	0:bb348c97df44	1947	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
lypinator	0:bb348c97df44	1948	{
lypinator	0:bb348c97df44	1949	status = HAL_ERROR;
lypinator	0:bb348c97df44	1950	}
lypinator	0:bb348c97df44	1951	/* Check parameters compatibility */
lypinator	0:bb348c97df44	1952	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
lypinator	0:bb348c97df44	1953	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
lypinator	0:bb348c97df44	1954	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
lypinator	0:bb348c97df44	1955	(Length != 1U))
lypinator	0:bb348c97df44	1956	{
lypinator	0:bb348c97df44	1957	status = HAL_ERROR;
lypinator	0:bb348c97df44	1958	}
lypinator	0:bb348c97df44	1959	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
lypinator	0:bb348c97df44	1960	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
lypinator	0:bb348c97df44	1961	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
lypinator	0:bb348c97df44	1962	{
lypinator	0:bb348c97df44	1963	status = HAL_ERROR;
lypinator	0:bb348c97df44	1964	}
lypinator	0:bb348c97df44	1965	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	1966	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
lypinator	0:bb348c97df44	1967	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
lypinator	0:bb348c97df44	1968	{
lypinator	0:bb348c97df44	1969	/* Set callbacks on DMA handler */
lypinator	0:bb348c97df44	1970	hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
lypinator	0:bb348c97df44	1971	hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
lypinator	0:bb348c97df44	1972	hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
lypinator	0:bb348c97df44	1973	DFSDM_DMARegularHalfConvCplt : NULL;
lypinator	0:bb348c97df44	1974
lypinator	0:bb348c97df44	1975	/* Start DMA in interrupt mode */
lypinator	0:bb348c97df44	1976	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
lypinator	0:bb348c97df44	1977	(uint32_t) pData, Length) != HAL_OK)
lypinator	0:bb348c97df44	1978	{
lypinator	0:bb348c97df44	1979	/* Set DFSDM filter in error state */
lypinator	0:bb348c97df44	1980	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
lypinator	0:bb348c97df44	1981	status = HAL_ERROR;
lypinator	0:bb348c97df44	1982	}
lypinator	0:bb348c97df44	1983	else
lypinator	0:bb348c97df44	1984	{
lypinator	0:bb348c97df44	1985	/* Start regular conversion */
lypinator	0:bb348c97df44	1986	DFSDM_RegConvStart(hdfsdm_filter);
lypinator	0:bb348c97df44	1987	}
lypinator	0:bb348c97df44	1988	}
lypinator	0:bb348c97df44	1989	else
lypinator	0:bb348c97df44	1990	{
lypinator	0:bb348c97df44	1991	status = HAL_ERROR;
lypinator	0:bb348c97df44	1992	}
lypinator	0:bb348c97df44	1993	/* Return function status */
lypinator	0:bb348c97df44	1994	return status;
lypinator	0:bb348c97df44	1995	}
lypinator	0:bb348c97df44	1996
lypinator	0:bb348c97df44	1997	/**
lypinator	0:bb348c97df44	1998	* @brief This function allows to start regular conversion in DMA mode and to get
lypinator	0:bb348c97df44	1999	* only the 16 most significant bits of conversion.
lypinator	0:bb348c97df44	2000	* @note This function should be called only when DFSDM filter instance is
lypinator	0:bb348c97df44	2001	* in idle state or if injected conversion is ongoing.
lypinator	0:bb348c97df44	2002	* Please note that data on buffer will contain signed 16 most significant
lypinator	0:bb348c97df44	2003	* bits of regular conversion.
lypinator	0:bb348c97df44	2004	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2005	* @param pData The destination buffer address.
lypinator	0:bb348c97df44	2006	* @param Length The length of data to be transferred from DFSDM filter to memory.
lypinator	0:bb348c97df44	2007	* @retval HAL status
lypinator	0:bb348c97df44	2008	*/
lypinator	0:bb348c97df44	2009	HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	2010	int16_t *pData,
lypinator	0:bb348c97df44	2011	uint32_t Length)
lypinator	0:bb348c97df44	2012	{
lypinator	0:bb348c97df44	2013	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2014
lypinator	0:bb348c97df44	2015	/* Check parameters */
lypinator	0:bb348c97df44	2016	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2017
lypinator	0:bb348c97df44	2018	/* Check destination address and length */
lypinator	0:bb348c97df44	2019	if((pData == NULL) \|\| (Length == 0U))
lypinator	0:bb348c97df44	2020	{
lypinator	0:bb348c97df44	2021	status = HAL_ERROR;
lypinator	0:bb348c97df44	2022	}
lypinator	0:bb348c97df44	2023	/* Check that DMA is enabled for regular conversion */
lypinator	0:bb348c97df44	2024	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
lypinator	0:bb348c97df44	2025	{
lypinator	0:bb348c97df44	2026	status = HAL_ERROR;
lypinator	0:bb348c97df44	2027	}
lypinator	0:bb348c97df44	2028	/* Check parameters compatibility */
lypinator	0:bb348c97df44	2029	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
lypinator	0:bb348c97df44	2030	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
lypinator	0:bb348c97df44	2031	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
lypinator	0:bb348c97df44	2032	(Length != 1U))
lypinator	0:bb348c97df44	2033	{
lypinator	0:bb348c97df44	2034	status = HAL_ERROR;
lypinator	0:bb348c97df44	2035	}
lypinator	0:bb348c97df44	2036	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
lypinator	0:bb348c97df44	2037	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
lypinator	0:bb348c97df44	2038	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
lypinator	0:bb348c97df44	2039	{
lypinator	0:bb348c97df44	2040	status = HAL_ERROR;
lypinator	0:bb348c97df44	2041	}
lypinator	0:bb348c97df44	2042	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2043	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
lypinator	0:bb348c97df44	2044	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
lypinator	0:bb348c97df44	2045	{
lypinator	0:bb348c97df44	2046	/* Set callbacks on DMA handler */
lypinator	0:bb348c97df44	2047	hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
lypinator	0:bb348c97df44	2048	hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
lypinator	0:bb348c97df44	2049	hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
lypinator	0:bb348c97df44	2050	DFSDM_DMARegularHalfConvCplt : NULL;
lypinator	0:bb348c97df44	2051
lypinator	0:bb348c97df44	2052	/* Start DMA in interrupt mode */
lypinator	0:bb348c97df44	2053	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \
lypinator	0:bb348c97df44	2054	(uint32_t) pData, Length) != HAL_OK)
lypinator	0:bb348c97df44	2055	{
lypinator	0:bb348c97df44	2056	/* Set DFSDM filter in error state */
lypinator	0:bb348c97df44	2057	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
lypinator	0:bb348c97df44	2058	status = HAL_ERROR;
lypinator	0:bb348c97df44	2059	}
lypinator	0:bb348c97df44	2060	else
lypinator	0:bb348c97df44	2061	{
lypinator	0:bb348c97df44	2062	/* Start regular conversion */
lypinator	0:bb348c97df44	2063	DFSDM_RegConvStart(hdfsdm_filter);
lypinator	0:bb348c97df44	2064	}
lypinator	0:bb348c97df44	2065	}
lypinator	0:bb348c97df44	2066	else
lypinator	0:bb348c97df44	2067	{
lypinator	0:bb348c97df44	2068	status = HAL_ERROR;
lypinator	0:bb348c97df44	2069	}
lypinator	0:bb348c97df44	2070	/* Return function status */
lypinator	0:bb348c97df44	2071	return status;
lypinator	0:bb348c97df44	2072	}
lypinator	0:bb348c97df44	2073
lypinator	0:bb348c97df44	2074	/**
lypinator	0:bb348c97df44	2075	* @brief This function allows to stop regular conversion in DMA mode.
lypinator	0:bb348c97df44	2076	* @note This function should be called only if regular conversion is ongoing.
lypinator	0:bb348c97df44	2077	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2078	* @retval HAL status
lypinator	0:bb348c97df44	2079	*/
lypinator	0:bb348c97df44	2080	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	2081	{
lypinator	0:bb348c97df44	2082	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2083
lypinator	0:bb348c97df44	2084	/* Check parameters */
lypinator	0:bb348c97df44	2085	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2086
lypinator	0:bb348c97df44	2087	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2088	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
lypinator	0:bb348c97df44	2089	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
lypinator	0:bb348c97df44	2090	{
lypinator	0:bb348c97df44	2091	/* Return error status */
lypinator	0:bb348c97df44	2092	status = HAL_ERROR;
lypinator	0:bb348c97df44	2093	}
lypinator	0:bb348c97df44	2094	else
lypinator	0:bb348c97df44	2095	{
lypinator	0:bb348c97df44	2096	/* Stop current DMA transfer */
lypinator	0:bb348c97df44	2097	if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
lypinator	0:bb348c97df44	2098	{
lypinator	0:bb348c97df44	2099	/* Set DFSDM filter in error state */
lypinator	0:bb348c97df44	2100	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
lypinator	0:bb348c97df44	2101	status = HAL_ERROR;
lypinator	0:bb348c97df44	2102	}
lypinator	0:bb348c97df44	2103	else
lypinator	0:bb348c97df44	2104	{
lypinator	0:bb348c97df44	2105	/* Stop regular conversion */
lypinator	0:bb348c97df44	2106	DFSDM_RegConvStop(hdfsdm_filter);
lypinator	0:bb348c97df44	2107	}
lypinator	0:bb348c97df44	2108	}
lypinator	0:bb348c97df44	2109	/* Return function status */
lypinator	0:bb348c97df44	2110	return status;
lypinator	0:bb348c97df44	2111	}
lypinator	0:bb348c97df44	2112
lypinator	0:bb348c97df44	2113	/**
lypinator	0:bb348c97df44	2114	* @brief This function allows to get regular conversion value.
lypinator	0:bb348c97df44	2115	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2116	* @param Channel Corresponding channel of regular conversion.
lypinator	0:bb348c97df44	2117	* @retval Regular conversion value
lypinator	0:bb348c97df44	2118	*/
lypinator	0:bb348c97df44	2119	int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	2120	uint32_t *Channel)
lypinator	0:bb348c97df44	2121	{
lypinator	0:bb348c97df44	2122	uint32_t reg = 0U;
lypinator	0:bb348c97df44	2123	int32_t value = 0;
lypinator	0:bb348c97df44	2124
lypinator	0:bb348c97df44	2125	/* Check parameters */
lypinator	0:bb348c97df44	2126	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2127	assert_param(Channel != NULL);
lypinator	0:bb348c97df44	2128
lypinator	0:bb348c97df44	2129	/* Get value of data register for regular channel */
lypinator	0:bb348c97df44	2130	reg = hdfsdm_filter->Instance->FLTRDATAR;
lypinator	0:bb348c97df44	2131
lypinator	0:bb348c97df44	2132	/* Extract channel and regular conversion value */
lypinator	0:bb348c97df44	2133	*Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
lypinator	0:bb348c97df44	2134	value = ((int32_t)(reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_RDATA_Pos);
lypinator	0:bb348c97df44	2135
lypinator	0:bb348c97df44	2136	/* return regular conversion value */
lypinator	0:bb348c97df44	2137	return value;
lypinator	0:bb348c97df44	2138	}
lypinator	0:bb348c97df44	2139
lypinator	0:bb348c97df44	2140	/**
lypinator	0:bb348c97df44	2141	* @brief This function allows to start injected conversion in polling mode.
lypinator	0:bb348c97df44	2142	* @note This function should be called only when DFSDM filter instance is
lypinator	0:bb348c97df44	2143	* in idle state or if regular conversion is ongoing.
lypinator	0:bb348c97df44	2144	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2145	* @retval HAL status
lypinator	0:bb348c97df44	2146	*/
lypinator	0:bb348c97df44	2147	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	2148	{
lypinator	0:bb348c97df44	2149	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2150
lypinator	0:bb348c97df44	2151	/* Check parameters */
lypinator	0:bb348c97df44	2152	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2153
lypinator	0:bb348c97df44	2154	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2155	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
lypinator	0:bb348c97df44	2156	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
lypinator	0:bb348c97df44	2157	{
lypinator	0:bb348c97df44	2158	/* Start injected conversion */
lypinator	0:bb348c97df44	2159	DFSDM_InjConvStart(hdfsdm_filter);
lypinator	0:bb348c97df44	2160	}
lypinator	0:bb348c97df44	2161	else
lypinator	0:bb348c97df44	2162	{
lypinator	0:bb348c97df44	2163	status = HAL_ERROR;
lypinator	0:bb348c97df44	2164	}
lypinator	0:bb348c97df44	2165	/* Return function status */
lypinator	0:bb348c97df44	2166	return status;
lypinator	0:bb348c97df44	2167	}
lypinator	0:bb348c97df44	2168
lypinator	0:bb348c97df44	2169	/**
lypinator	0:bb348c97df44	2170	* @brief This function allows to poll for the end of injected conversion.
lypinator	0:bb348c97df44	2171	* @note This function should be called only if injected conversion is ongoing.
lypinator	0:bb348c97df44	2172	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2173	* @param Timeout Timeout value in milliseconds.
lypinator	0:bb348c97df44	2174	* @retval HAL status
lypinator	0:bb348c97df44	2175	*/
lypinator	0:bb348c97df44	2176	HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	2177	uint32_t Timeout)
lypinator	0:bb348c97df44	2178	{
lypinator	0:bb348c97df44	2179	uint32_t tickstart;
lypinator	0:bb348c97df44	2180
lypinator	0:bb348c97df44	2181	/* Check parameters */
lypinator	0:bb348c97df44	2182	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2183
lypinator	0:bb348c97df44	2184	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2185	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
lypinator	0:bb348c97df44	2186	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
lypinator	0:bb348c97df44	2187	{
lypinator	0:bb348c97df44	2188	/* Return error status */
lypinator	0:bb348c97df44	2189	return HAL_ERROR;
lypinator	0:bb348c97df44	2190	}
lypinator	0:bb348c97df44	2191	else
lypinator	0:bb348c97df44	2192	{
lypinator	0:bb348c97df44	2193	/* Get timeout */
lypinator	0:bb348c97df44	2194	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	2195
lypinator	0:bb348c97df44	2196	/* Wait end of injected conversions */
lypinator	0:bb348c97df44	2197	while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
lypinator	0:bb348c97df44	2198	{
lypinator	0:bb348c97df44	2199	/* Check the Timeout */
lypinator	0:bb348c97df44	2200	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	2201	{
lypinator	0:bb348c97df44	2202	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
lypinator	0:bb348c97df44	2203	{
lypinator	0:bb348c97df44	2204	/* Return timeout status */
lypinator	0:bb348c97df44	2205	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	2206	}
lypinator	0:bb348c97df44	2207	}
lypinator	0:bb348c97df44	2208	}
lypinator	0:bb348c97df44	2209	/* Check if overrun occurs */
lypinator	0:bb348c97df44	2210	if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
lypinator	0:bb348c97df44	2211	{
lypinator	0:bb348c97df44	2212	/* Update error code and call error callback */
lypinator	0:bb348c97df44	2213	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
lypinator	0:bb348c97df44	2214	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
lypinator	0:bb348c97df44	2215
lypinator	0:bb348c97df44	2216	/* Clear injected overrun flag */
lypinator	0:bb348c97df44	2217	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
lypinator	0:bb348c97df44	2218	}
lypinator	0:bb348c97df44	2219
lypinator	0:bb348c97df44	2220	/* Update remaining injected conversions */
lypinator	0:bb348c97df44	2221	hdfsdm_filter->InjConvRemaining--;
lypinator	0:bb348c97df44	2222	if(hdfsdm_filter->InjConvRemaining == 0U)
lypinator	0:bb348c97df44	2223	{
lypinator	0:bb348c97df44	2224	/* Update DFSDM filter state only if trigger is software */
lypinator	0:bb348c97df44	2225	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
lypinator	0:bb348c97df44	2226	{
lypinator	0:bb348c97df44	2227	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
lypinator	0:bb348c97df44	2228	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
lypinator	0:bb348c97df44	2229	}
lypinator	0:bb348c97df44	2230
lypinator	0:bb348c97df44	2231	/* end of injected sequence, reset the value */
lypinator	0:bb348c97df44	2232	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
lypinator	0:bb348c97df44	2233	hdfsdm_filter->InjectedChannelsNbr : 1U;
lypinator	0:bb348c97df44	2234	}
lypinator	0:bb348c97df44	2235
lypinator	0:bb348c97df44	2236	/* Return function status */
lypinator	0:bb348c97df44	2237	return HAL_OK;
lypinator	0:bb348c97df44	2238	}
lypinator	0:bb348c97df44	2239	}
lypinator	0:bb348c97df44	2240
lypinator	0:bb348c97df44	2241	/**
lypinator	0:bb348c97df44	2242	* @brief This function allows to stop injected conversion in polling mode.
lypinator	0:bb348c97df44	2243	* @note This function should be called only if injected conversion is ongoing.
lypinator	0:bb348c97df44	2244	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2245	* @retval HAL status
lypinator	0:bb348c97df44	2246	*/
lypinator	0:bb348c97df44	2247	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	2248	{
lypinator	0:bb348c97df44	2249	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2250
lypinator	0:bb348c97df44	2251	/* Check parameters */
lypinator	0:bb348c97df44	2252	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2253
lypinator	0:bb348c97df44	2254	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2255	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
lypinator	0:bb348c97df44	2256	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
lypinator	0:bb348c97df44	2257	{
lypinator	0:bb348c97df44	2258	/* Return error status */
lypinator	0:bb348c97df44	2259	status = HAL_ERROR;
lypinator	0:bb348c97df44	2260	}
lypinator	0:bb348c97df44	2261	else
lypinator	0:bb348c97df44	2262	{
lypinator	0:bb348c97df44	2263	/* Stop injected conversion */
lypinator	0:bb348c97df44	2264	DFSDM_InjConvStop(hdfsdm_filter);
lypinator	0:bb348c97df44	2265	}
lypinator	0:bb348c97df44	2266	/* Return function status */
lypinator	0:bb348c97df44	2267	return status;
lypinator	0:bb348c97df44	2268	}
lypinator	0:bb348c97df44	2269
lypinator	0:bb348c97df44	2270	/**
lypinator	0:bb348c97df44	2271	* @brief This function allows to start injected conversion in interrupt mode.
lypinator	0:bb348c97df44	2272	* @note This function should be called only when DFSDM filter instance is
lypinator	0:bb348c97df44	2273	* in idle state or if regular conversion is ongoing.
lypinator	0:bb348c97df44	2274	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2275	* @retval HAL status
lypinator	0:bb348c97df44	2276	*/
lypinator	0:bb348c97df44	2277	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	2278	{
lypinator	0:bb348c97df44	2279	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2280
lypinator	0:bb348c97df44	2281	/* Check parameters */
lypinator	0:bb348c97df44	2282	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2283
lypinator	0:bb348c97df44	2284	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2285	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
lypinator	0:bb348c97df44	2286	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
lypinator	0:bb348c97df44	2287	{
lypinator	0:bb348c97df44	2288	/* Enable interrupts for injected conversions */
lypinator	0:bb348c97df44	2289	hdfsdm_filter->Instance->FLTCR2 \|= (DFSDM_FLTCR2_JEOCIE \| DFSDM_FLTCR2_JOVRIE);
lypinator	0:bb348c97df44	2290
lypinator	0:bb348c97df44	2291	/* Start injected conversion */
lypinator	0:bb348c97df44	2292	DFSDM_InjConvStart(hdfsdm_filter);
lypinator	0:bb348c97df44	2293	}
lypinator	0:bb348c97df44	2294	else
lypinator	0:bb348c97df44	2295	{
lypinator	0:bb348c97df44	2296	status = HAL_ERROR;
lypinator	0:bb348c97df44	2297	}
lypinator	0:bb348c97df44	2298	/* Return function status */
lypinator	0:bb348c97df44	2299	return status;
lypinator	0:bb348c97df44	2300	}
lypinator	0:bb348c97df44	2301
lypinator	0:bb348c97df44	2302	/**
lypinator	0:bb348c97df44	2303	* @brief This function allows to stop injected conversion in interrupt mode.
lypinator	0:bb348c97df44	2304	* @note This function should be called only if injected conversion is ongoing.
lypinator	0:bb348c97df44	2305	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2306	* @retval HAL status
lypinator	0:bb348c97df44	2307	*/
lypinator	0:bb348c97df44	2308	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	2309	{
lypinator	0:bb348c97df44	2310	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2311
lypinator	0:bb348c97df44	2312	/* Check parameters */
lypinator	0:bb348c97df44	2313	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2314
lypinator	0:bb348c97df44	2315	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2316	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
lypinator	0:bb348c97df44	2317	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
lypinator	0:bb348c97df44	2318	{
lypinator	0:bb348c97df44	2319	/* Return error status */
lypinator	0:bb348c97df44	2320	status = HAL_ERROR;
lypinator	0:bb348c97df44	2321	}
lypinator	0:bb348c97df44	2322	else
lypinator	0:bb348c97df44	2323	{
lypinator	0:bb348c97df44	2324	/* Disable interrupts for injected conversions */
lypinator	0:bb348c97df44	2325	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE \| DFSDM_FLTCR2_JOVRIE);
lypinator	0:bb348c97df44	2326
lypinator	0:bb348c97df44	2327	/* Stop injected conversion */
lypinator	0:bb348c97df44	2328	DFSDM_InjConvStop(hdfsdm_filter);
lypinator	0:bb348c97df44	2329	}
lypinator	0:bb348c97df44	2330	/* Return function status */
lypinator	0:bb348c97df44	2331	return status;
lypinator	0:bb348c97df44	2332	}
lypinator	0:bb348c97df44	2333
lypinator	0:bb348c97df44	2334	/**
lypinator	0:bb348c97df44	2335	* @brief This function allows to start injected conversion in DMA mode.
lypinator	0:bb348c97df44	2336	* @note This function should be called only when DFSDM filter instance is
lypinator	0:bb348c97df44	2337	* in idle state or if regular conversion is ongoing.
lypinator	0:bb348c97df44	2338	* Please note that data on buffer will contain signed injected conversion
lypinator	0:bb348c97df44	2339	* value on 24 most significant bits and corresponding channel on 3 least
lypinator	0:bb348c97df44	2340	* significant bits.
lypinator	0:bb348c97df44	2341	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2342	* @param pData The destination buffer address.
lypinator	0:bb348c97df44	2343	* @param Length The length of data to be transferred from DFSDM filter to memory.
lypinator	0:bb348c97df44	2344	* @retval HAL status
lypinator	0:bb348c97df44	2345	*/
lypinator	0:bb348c97df44	2346	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	2347	int32_t *pData,
lypinator	0:bb348c97df44	2348	uint32_t Length)
lypinator	0:bb348c97df44	2349	{
lypinator	0:bb348c97df44	2350	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2351
lypinator	0:bb348c97df44	2352	/* Check parameters */
lypinator	0:bb348c97df44	2353	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2354
lypinator	0:bb348c97df44	2355	/* Check destination address and length */
lypinator	0:bb348c97df44	2356	if((pData == NULL) \|\| (Length == 0U))
lypinator	0:bb348c97df44	2357	{
lypinator	0:bb348c97df44	2358	status = HAL_ERROR;
lypinator	0:bb348c97df44	2359	}
lypinator	0:bb348c97df44	2360	/* Check that DMA is enabled for injected conversion */
lypinator	0:bb348c97df44	2361	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
lypinator	0:bb348c97df44	2362	{
lypinator	0:bb348c97df44	2363	status = HAL_ERROR;
lypinator	0:bb348c97df44	2364	}
lypinator	0:bb348c97df44	2365	/* Check parameters compatibility */
lypinator	0:bb348c97df44	2366	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
lypinator	0:bb348c97df44	2367	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
lypinator	0:bb348c97df44	2368	(Length > hdfsdm_filter->InjConvRemaining))
lypinator	0:bb348c97df44	2369	{
lypinator	0:bb348c97df44	2370	status = HAL_ERROR;
lypinator	0:bb348c97df44	2371	}
lypinator	0:bb348c97df44	2372	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
lypinator	0:bb348c97df44	2373	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
lypinator	0:bb348c97df44	2374	{
lypinator	0:bb348c97df44	2375	status = HAL_ERROR;
lypinator	0:bb348c97df44	2376	}
lypinator	0:bb348c97df44	2377	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2378	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
lypinator	0:bb348c97df44	2379	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
lypinator	0:bb348c97df44	2380	{
lypinator	0:bb348c97df44	2381	/* Set callbacks on DMA handler */
lypinator	0:bb348c97df44	2382	hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
lypinator	0:bb348c97df44	2383	hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
lypinator	0:bb348c97df44	2384	hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
lypinator	0:bb348c97df44	2385	DFSDM_DMAInjectedHalfConvCplt : NULL;
lypinator	0:bb348c97df44	2386
lypinator	0:bb348c97df44	2387	/* Start DMA in interrupt mode */
lypinator	0:bb348c97df44	2388	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
lypinator	0:bb348c97df44	2389	(uint32_t) pData, Length) != HAL_OK)
lypinator	0:bb348c97df44	2390	{
lypinator	0:bb348c97df44	2391	/* Set DFSDM filter in error state */
lypinator	0:bb348c97df44	2392	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
lypinator	0:bb348c97df44	2393	status = HAL_ERROR;
lypinator	0:bb348c97df44	2394	}
lypinator	0:bb348c97df44	2395	else
lypinator	0:bb348c97df44	2396	{
lypinator	0:bb348c97df44	2397	/* Start injected conversion */
lypinator	0:bb348c97df44	2398	DFSDM_InjConvStart(hdfsdm_filter);
lypinator	0:bb348c97df44	2399	}
lypinator	0:bb348c97df44	2400	}
lypinator	0:bb348c97df44	2401	else
lypinator	0:bb348c97df44	2402	{
lypinator	0:bb348c97df44	2403	status = HAL_ERROR;
lypinator	0:bb348c97df44	2404	}
lypinator	0:bb348c97df44	2405	/* Return function status */
lypinator	0:bb348c97df44	2406	return status;
lypinator	0:bb348c97df44	2407	}
lypinator	0:bb348c97df44	2408
lypinator	0:bb348c97df44	2409	/**
lypinator	0:bb348c97df44	2410	* @brief This function allows to start injected conversion in DMA mode and to get
lypinator	0:bb348c97df44	2411	* only the 16 most significant bits of conversion.
lypinator	0:bb348c97df44	2412	* @note This function should be called only when DFSDM filter instance is
lypinator	0:bb348c97df44	2413	* in idle state or if regular conversion is ongoing.
lypinator	0:bb348c97df44	2414	* Please note that data on buffer will contain signed 16 most significant
lypinator	0:bb348c97df44	2415	* bits of injected conversion.
lypinator	0:bb348c97df44	2416	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2417	* @param pData The destination buffer address.
lypinator	0:bb348c97df44	2418	* @param Length The length of data to be transferred from DFSDM filter to memory.
lypinator	0:bb348c97df44	2419	* @retval HAL status
lypinator	0:bb348c97df44	2420	*/
lypinator	0:bb348c97df44	2421	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	2422	int16_t *pData,
lypinator	0:bb348c97df44	2423	uint32_t Length)
lypinator	0:bb348c97df44	2424	{
lypinator	0:bb348c97df44	2425	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2426
lypinator	0:bb348c97df44	2427	/* Check parameters */
lypinator	0:bb348c97df44	2428	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2429
lypinator	0:bb348c97df44	2430	/* Check destination address and length */
lypinator	0:bb348c97df44	2431	if((pData == NULL) \|\| (Length == 0U))
lypinator	0:bb348c97df44	2432	{
lypinator	0:bb348c97df44	2433	status = HAL_ERROR;
lypinator	0:bb348c97df44	2434	}
lypinator	0:bb348c97df44	2435	/* Check that DMA is enabled for injected conversion */
lypinator	0:bb348c97df44	2436	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
lypinator	0:bb348c97df44	2437	{
lypinator	0:bb348c97df44	2438	status = HAL_ERROR;
lypinator	0:bb348c97df44	2439	}
lypinator	0:bb348c97df44	2440	/* Check parameters compatibility */
lypinator	0:bb348c97df44	2441	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
lypinator	0:bb348c97df44	2442	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
lypinator	0:bb348c97df44	2443	(Length > hdfsdm_filter->InjConvRemaining))
lypinator	0:bb348c97df44	2444	{
lypinator	0:bb348c97df44	2445	status = HAL_ERROR;
lypinator	0:bb348c97df44	2446	}
lypinator	0:bb348c97df44	2447	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
lypinator	0:bb348c97df44	2448	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
lypinator	0:bb348c97df44	2449	{
lypinator	0:bb348c97df44	2450	status = HAL_ERROR;
lypinator	0:bb348c97df44	2451	}
lypinator	0:bb348c97df44	2452	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2453	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
lypinator	0:bb348c97df44	2454	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
lypinator	0:bb348c97df44	2455	{
lypinator	0:bb348c97df44	2456	/* Set callbacks on DMA handler */
lypinator	0:bb348c97df44	2457	hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
lypinator	0:bb348c97df44	2458	hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
lypinator	0:bb348c97df44	2459	hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
lypinator	0:bb348c97df44	2460	DFSDM_DMAInjectedHalfConvCplt : NULL;
lypinator	0:bb348c97df44	2461
lypinator	0:bb348c97df44	2462	/* Start DMA in interrupt mode */
lypinator	0:bb348c97df44	2463	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \
lypinator	0:bb348c97df44	2464	(uint32_t) pData, Length) != HAL_OK)
lypinator	0:bb348c97df44	2465	{
lypinator	0:bb348c97df44	2466	/* Set DFSDM filter in error state */
lypinator	0:bb348c97df44	2467	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
lypinator	0:bb348c97df44	2468	status = HAL_ERROR;
lypinator	0:bb348c97df44	2469	}
lypinator	0:bb348c97df44	2470	else
lypinator	0:bb348c97df44	2471	{
lypinator	0:bb348c97df44	2472	/* Start injected conversion */
lypinator	0:bb348c97df44	2473	DFSDM_InjConvStart(hdfsdm_filter);
lypinator	0:bb348c97df44	2474	}
lypinator	0:bb348c97df44	2475	}
lypinator	0:bb348c97df44	2476	else
lypinator	0:bb348c97df44	2477	{
lypinator	0:bb348c97df44	2478	status = HAL_ERROR;
lypinator	0:bb348c97df44	2479	}
lypinator	0:bb348c97df44	2480	/* Return function status */
lypinator	0:bb348c97df44	2481	return status;
lypinator	0:bb348c97df44	2482	}
lypinator	0:bb348c97df44	2483
lypinator	0:bb348c97df44	2484	/**
lypinator	0:bb348c97df44	2485	* @brief This function allows to stop injected conversion in DMA mode.
lypinator	0:bb348c97df44	2486	* @note This function should be called only if injected conversion is ongoing.
lypinator	0:bb348c97df44	2487	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2488	* @retval HAL status
lypinator	0:bb348c97df44	2489	*/
lypinator	0:bb348c97df44	2490	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	2491	{
lypinator	0:bb348c97df44	2492	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2493
lypinator	0:bb348c97df44	2494	/* Check parameters */
lypinator	0:bb348c97df44	2495	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2496
lypinator	0:bb348c97df44	2497	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2498	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
lypinator	0:bb348c97df44	2499	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
lypinator	0:bb348c97df44	2500	{
lypinator	0:bb348c97df44	2501	/* Return error status */
lypinator	0:bb348c97df44	2502	status = HAL_ERROR;
lypinator	0:bb348c97df44	2503	}
lypinator	0:bb348c97df44	2504	else
lypinator	0:bb348c97df44	2505	{
lypinator	0:bb348c97df44	2506	/* Stop current DMA transfer */
lypinator	0:bb348c97df44	2507	if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
lypinator	0:bb348c97df44	2508	{
lypinator	0:bb348c97df44	2509	/* Set DFSDM filter in error state */
lypinator	0:bb348c97df44	2510	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
lypinator	0:bb348c97df44	2511	status = HAL_ERROR;
lypinator	0:bb348c97df44	2512	}
lypinator	0:bb348c97df44	2513	else
lypinator	0:bb348c97df44	2514	{
lypinator	0:bb348c97df44	2515	/* Stop regular conversion */
lypinator	0:bb348c97df44	2516	DFSDM_InjConvStop(hdfsdm_filter);
lypinator	0:bb348c97df44	2517	}
lypinator	0:bb348c97df44	2518	}
lypinator	0:bb348c97df44	2519	/* Return function status */
lypinator	0:bb348c97df44	2520	return status;
lypinator	0:bb348c97df44	2521	}
lypinator	0:bb348c97df44	2522
lypinator	0:bb348c97df44	2523	/**
lypinator	0:bb348c97df44	2524	* @brief This function allows to get injected conversion value.
lypinator	0:bb348c97df44	2525	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2526	* @param Channel Corresponding channel of injected conversion.
lypinator	0:bb348c97df44	2527	* @retval Injected conversion value
lypinator	0:bb348c97df44	2528	*/
lypinator	0:bb348c97df44	2529	int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	2530	uint32_t *Channel)
lypinator	0:bb348c97df44	2531	{
lypinator	0:bb348c97df44	2532	uint32_t reg = 0U;
lypinator	0:bb348c97df44	2533	int32_t value = 0;
lypinator	0:bb348c97df44	2534
lypinator	0:bb348c97df44	2535	/* Check parameters */
lypinator	0:bb348c97df44	2536	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2537	assert_param(Channel != NULL);
lypinator	0:bb348c97df44	2538
lypinator	0:bb348c97df44	2539	/* Get value of data register for injected channel */
lypinator	0:bb348c97df44	2540	reg = hdfsdm_filter->Instance->FLTJDATAR;
lypinator	0:bb348c97df44	2541
lypinator	0:bb348c97df44	2542	/* Extract channel and injected conversion value */
lypinator	0:bb348c97df44	2543	*Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
lypinator	0:bb348c97df44	2544	value = ((int32_t)(reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_JDATA_Pos);
lypinator	0:bb348c97df44	2545
lypinator	0:bb348c97df44	2546	/* return regular conversion value */
lypinator	0:bb348c97df44	2547	return value;
lypinator	0:bb348c97df44	2548	}
lypinator	0:bb348c97df44	2549
lypinator	0:bb348c97df44	2550	/**
lypinator	0:bb348c97df44	2551	* @brief This function allows to start filter analog watchdog in interrupt mode.
lypinator	0:bb348c97df44	2552	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2553	* @param awdParam DFSDM filter analog watchdog parameters.
lypinator	0:bb348c97df44	2554	* @retval HAL status
lypinator	0:bb348c97df44	2555	*/
lypinator	0:bb348c97df44	2556	HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	2557	DFSDM_Filter_AwdParamTypeDef *awdParam)
lypinator	0:bb348c97df44	2558	{
lypinator	0:bb348c97df44	2559	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2560
lypinator	0:bb348c97df44	2561	/* Check parameters */
lypinator	0:bb348c97df44	2562	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2563	assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
lypinator	0:bb348c97df44	2564	assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
lypinator	0:bb348c97df44	2565	assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
lypinator	0:bb348c97df44	2566	assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
lypinator	0:bb348c97df44	2567	assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
lypinator	0:bb348c97df44	2568	assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
lypinator	0:bb348c97df44	2569
lypinator	0:bb348c97df44	2570	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2571	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
lypinator	0:bb348c97df44	2572	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
lypinator	0:bb348c97df44	2573	{
lypinator	0:bb348c97df44	2574	/* Return error status */
lypinator	0:bb348c97df44	2575	status = HAL_ERROR;
lypinator	0:bb348c97df44	2576	}
lypinator	0:bb348c97df44	2577	else
lypinator	0:bb348c97df44	2578	{
lypinator	0:bb348c97df44	2579	/* Set analog watchdog data source */
lypinator	0:bb348c97df44	2580	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
lypinator	0:bb348c97df44	2581	hdfsdm_filter->Instance->FLTCR1 \|= awdParam->DataSource;
lypinator	0:bb348c97df44	2582
lypinator	0:bb348c97df44	2583	/* Set thresholds and break signals */
lypinator	0:bb348c97df44	2584	hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT \| DFSDM_FLTAWHTR_BKAWH);
lypinator	0:bb348c97df44	2585	hdfsdm_filter->Instance->FLTAWHTR \|= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) \| \
lypinator	0:bb348c97df44	2586	awdParam->HighBreakSignal);
lypinator	0:bb348c97df44	2587	hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT \| DFSDM_FLTAWLTR_BKAWL);
lypinator	0:bb348c97df44	2588	hdfsdm_filter->Instance->FLTAWLTR \|= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) \| \
lypinator	0:bb348c97df44	2589	awdParam->LowBreakSignal);
lypinator	0:bb348c97df44	2590
lypinator	0:bb348c97df44	2591	/* Set channels and interrupt for analog watchdog */
lypinator	0:bb348c97df44	2592	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
lypinator	0:bb348c97df44	2593	hdfsdm_filter->Instance->FLTCR2 \|= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) \| \
lypinator	0:bb348c97df44	2594	DFSDM_FLTCR2_AWDIE);
lypinator	0:bb348c97df44	2595	}
lypinator	0:bb348c97df44	2596	/* Return function status */
lypinator	0:bb348c97df44	2597	return status;
lypinator	0:bb348c97df44	2598	}
lypinator	0:bb348c97df44	2599
lypinator	0:bb348c97df44	2600	/**
lypinator	0:bb348c97df44	2601	* @brief This function allows to stop filter analog watchdog in interrupt mode.
lypinator	0:bb348c97df44	2602	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2603	* @retval HAL status
lypinator	0:bb348c97df44	2604	*/
lypinator	0:bb348c97df44	2605	HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	2606	{
lypinator	0:bb348c97df44	2607	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2608
lypinator	0:bb348c97df44	2609	/* Check parameters */
lypinator	0:bb348c97df44	2610	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2611
lypinator	0:bb348c97df44	2612	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2613	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
lypinator	0:bb348c97df44	2614	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
lypinator	0:bb348c97df44	2615	{
lypinator	0:bb348c97df44	2616	/* Return error status */
lypinator	0:bb348c97df44	2617	status = HAL_ERROR;
lypinator	0:bb348c97df44	2618	}
lypinator	0:bb348c97df44	2619	else
lypinator	0:bb348c97df44	2620	{
lypinator	0:bb348c97df44	2621	/* Reset channels for analog watchdog and deactivate interrupt */
lypinator	0:bb348c97df44	2622	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH \| DFSDM_FLTCR2_AWDIE);
lypinator	0:bb348c97df44	2623
lypinator	0:bb348c97df44	2624	/* Clear all analog watchdog flags */
lypinator	0:bb348c97df44	2625	hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF \| DFSDM_FLTAWCFR_CLRAWLTF);
lypinator	0:bb348c97df44	2626
lypinator	0:bb348c97df44	2627	/* Reset thresholds and break signals */
lypinator	0:bb348c97df44	2628	hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT \| DFSDM_FLTAWHTR_BKAWH);
lypinator	0:bb348c97df44	2629	hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT \| DFSDM_FLTAWLTR_BKAWL);
lypinator	0:bb348c97df44	2630
lypinator	0:bb348c97df44	2631	/* Reset analog watchdog data source */
lypinator	0:bb348c97df44	2632	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
lypinator	0:bb348c97df44	2633	}
lypinator	0:bb348c97df44	2634	/* Return function status */
lypinator	0:bb348c97df44	2635	return status;
lypinator	0:bb348c97df44	2636	}
lypinator	0:bb348c97df44	2637
lypinator	0:bb348c97df44	2638	/**
lypinator	0:bb348c97df44	2639	* @brief This function allows to start extreme detector feature.
lypinator	0:bb348c97df44	2640	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2641	* @param Channel Channels where extreme detector is enabled.
lypinator	0:bb348c97df44	2642	* This parameter can be a values combination of @ref DFSDM_Channel_Selection.
lypinator	0:bb348c97df44	2643	* @retval HAL status
lypinator	0:bb348c97df44	2644	*/
lypinator	0:bb348c97df44	2645	HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	2646	uint32_t Channel)
lypinator	0:bb348c97df44	2647	{
lypinator	0:bb348c97df44	2648	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2649
lypinator	0:bb348c97df44	2650	/* Check parameters */
lypinator	0:bb348c97df44	2651	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2652	assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
lypinator	0:bb348c97df44	2653
lypinator	0:bb348c97df44	2654	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2655	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
lypinator	0:bb348c97df44	2656	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
lypinator	0:bb348c97df44	2657	{
lypinator	0:bb348c97df44	2658	/* Return error status */
lypinator	0:bb348c97df44	2659	status = HAL_ERROR;
lypinator	0:bb348c97df44	2660	}
lypinator	0:bb348c97df44	2661	else
lypinator	0:bb348c97df44	2662	{
lypinator	0:bb348c97df44	2663	/* Set channels for extreme detector */
lypinator	0:bb348c97df44	2664	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
lypinator	0:bb348c97df44	2665	hdfsdm_filter->Instance->FLTCR2 \|= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);
lypinator	0:bb348c97df44	2666	}
lypinator	0:bb348c97df44	2667	/* Return function status */
lypinator	0:bb348c97df44	2668	return status;
lypinator	0:bb348c97df44	2669	}
lypinator	0:bb348c97df44	2670
lypinator	0:bb348c97df44	2671	/**
lypinator	0:bb348c97df44	2672	* @brief This function allows to stop extreme detector feature.
lypinator	0:bb348c97df44	2673	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2674	* @retval HAL status
lypinator	0:bb348c97df44	2675	*/
lypinator	0:bb348c97df44	2676	HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	2677	{
lypinator	0:bb348c97df44	2678	HAL_StatusTypeDef status = HAL_OK;
lypinator	0:bb348c97df44	2679	__IO uint32_t reg1;
lypinator	0:bb348c97df44	2680	__IO uint32_t reg2;
lypinator	0:bb348c97df44	2681
lypinator	0:bb348c97df44	2682	/* Check parameters */
lypinator	0:bb348c97df44	2683	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2684
lypinator	0:bb348c97df44	2685	/* Check DFSDM filter state */
lypinator	0:bb348c97df44	2686	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
lypinator	0:bb348c97df44	2687	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
lypinator	0:bb348c97df44	2688	{
lypinator	0:bb348c97df44	2689	/* Return error status */
lypinator	0:bb348c97df44	2690	status = HAL_ERROR;
lypinator	0:bb348c97df44	2691	}
lypinator	0:bb348c97df44	2692	else
lypinator	0:bb348c97df44	2693	{
lypinator	0:bb348c97df44	2694	/* Reset channels for extreme detector */
lypinator	0:bb348c97df44	2695	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
lypinator	0:bb348c97df44	2696
lypinator	0:bb348c97df44	2697	/* Clear extreme detector values */
lypinator	0:bb348c97df44	2698	reg1 = hdfsdm_filter->Instance->FLTEXMAX;
lypinator	0:bb348c97df44	2699	reg2 = hdfsdm_filter->Instance->FLTEXMIN;
lypinator	0:bb348c97df44	2700	UNUSED(reg1); /* To avoid GCC warning */
lypinator	0:bb348c97df44	2701	UNUSED(reg2); /* To avoid GCC warning */
lypinator	0:bb348c97df44	2702	}
lypinator	0:bb348c97df44	2703	/* Return function status */
lypinator	0:bb348c97df44	2704	return status;
lypinator	0:bb348c97df44	2705	}
lypinator	0:bb348c97df44	2706
lypinator	0:bb348c97df44	2707	/**
lypinator	0:bb348c97df44	2708	* @brief This function allows to get extreme detector maximum value.
lypinator	0:bb348c97df44	2709	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2710	* @param Channel Corresponding channel.
lypinator	0:bb348c97df44	2711	* @retval Extreme detector maximum value
lypinator	0:bb348c97df44	2712	* This value is between Min_Data = -8388608 and Max_Data = 8388607.
lypinator	0:bb348c97df44	2713	*/
lypinator	0:bb348c97df44	2714	int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	2715	uint32_t *Channel)
lypinator	0:bb348c97df44	2716	{
lypinator	0:bb348c97df44	2717	uint32_t reg = 0U;
lypinator	0:bb348c97df44	2718	int32_t value = 0;
lypinator	0:bb348c97df44	2719
lypinator	0:bb348c97df44	2720	/* Check parameters */
lypinator	0:bb348c97df44	2721	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2722	assert_param(Channel != NULL);
lypinator	0:bb348c97df44	2723
lypinator	0:bb348c97df44	2724	/* Get value of extreme detector maximum register */
lypinator	0:bb348c97df44	2725	reg = hdfsdm_filter->Instance->FLTEXMAX;
lypinator	0:bb348c97df44	2726
lypinator	0:bb348c97df44	2727	/* Extract channel and extreme detector maximum value */
lypinator	0:bb348c97df44	2728	*Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
lypinator	0:bb348c97df44	2729	value = ((int32_t)(reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_EXMAX_Pos);
lypinator	0:bb348c97df44	2730
lypinator	0:bb348c97df44	2731	/* return extreme detector maximum value */
lypinator	0:bb348c97df44	2732	return value;
lypinator	0:bb348c97df44	2733	}
lypinator	0:bb348c97df44	2734
lypinator	0:bb348c97df44	2735	/**
lypinator	0:bb348c97df44	2736	* @brief This function allows to get extreme detector minimum value.
lypinator	0:bb348c97df44	2737	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2738	* @param Channel Corresponding channel.
lypinator	0:bb348c97df44	2739	* @retval Extreme detector minimum value
lypinator	0:bb348c97df44	2740	* This value is between Min_Data = -8388608 and Max_Data = 8388607.
lypinator	0:bb348c97df44	2741	*/
lypinator	0:bb348c97df44	2742	int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	2743	uint32_t *Channel)
lypinator	0:bb348c97df44	2744	{
lypinator	0:bb348c97df44	2745	uint32_t reg = 0U;
lypinator	0:bb348c97df44	2746	int32_t value = 0;
lypinator	0:bb348c97df44	2747
lypinator	0:bb348c97df44	2748	/* Check parameters */
lypinator	0:bb348c97df44	2749	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2750	assert_param(Channel != NULL);
lypinator	0:bb348c97df44	2751
lypinator	0:bb348c97df44	2752	/* Get value of extreme detector minimum register */
lypinator	0:bb348c97df44	2753	reg = hdfsdm_filter->Instance->FLTEXMIN;
lypinator	0:bb348c97df44	2754
lypinator	0:bb348c97df44	2755	/* Extract channel and extreme detector minimum value */
lypinator	0:bb348c97df44	2756	*Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
lypinator	0:bb348c97df44	2757	value = ((int32_t)(reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_EXMIN_Pos);
lypinator	0:bb348c97df44	2758
lypinator	0:bb348c97df44	2759	/* return extreme detector minimum value */
lypinator	0:bb348c97df44	2760	return value;
lypinator	0:bb348c97df44	2761	}
lypinator	0:bb348c97df44	2762
lypinator	0:bb348c97df44	2763	/**
lypinator	0:bb348c97df44	2764	* @brief This function allows to get conversion time value.
lypinator	0:bb348c97df44	2765	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2766	* @retval Conversion time value
lypinator	0:bb348c97df44	2767	* @note To get time in second, this value has to be divided by DFSDM clock frequency.
lypinator	0:bb348c97df44	2768	*/
lypinator	0:bb348c97df44	2769	uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	2770	{
lypinator	0:bb348c97df44	2771	uint32_t reg = 0U;
lypinator	0:bb348c97df44	2772	uint32_t value = 0U;
lypinator	0:bb348c97df44	2773
lypinator	0:bb348c97df44	2774	/* Check parameters */
lypinator	0:bb348c97df44	2775	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
lypinator	0:bb348c97df44	2776
lypinator	0:bb348c97df44	2777	/* Get value of conversion timer register */
lypinator	0:bb348c97df44	2778	reg = hdfsdm_filter->Instance->FLTCNVTIMR;
lypinator	0:bb348c97df44	2779
lypinator	0:bb348c97df44	2780	/* Extract conversion time value */
lypinator	0:bb348c97df44	2781	value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);
lypinator	0:bb348c97df44	2782
lypinator	0:bb348c97df44	2783	/* return extreme detector minimum value */
lypinator	0:bb348c97df44	2784	return value;
lypinator	0:bb348c97df44	2785	}
lypinator	0:bb348c97df44	2786
lypinator	0:bb348c97df44	2787	/**
lypinator	0:bb348c97df44	2788	* @brief This function handles the DFSDM interrupts.
lypinator	0:bb348c97df44	2789	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	2790	* @retval None
lypinator	0:bb348c97df44	2791	*/
lypinator	0:bb348c97df44	2792	void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	2793	{
lypinator	0:bb348c97df44	2794	/* Check if overrun occurs during regular conversion */
lypinator	0:bb348c97df44	2795	if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) != 0U) && \
lypinator	0:bb348c97df44	2796	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_ROVRIE) != 0U))
lypinator	0:bb348c97df44	2797	{
lypinator	0:bb348c97df44	2798	/* Clear regular overrun flag */
lypinator	0:bb348c97df44	2799	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
lypinator	0:bb348c97df44	2800
lypinator	0:bb348c97df44	2801	/* Update error code */
lypinator	0:bb348c97df44	2802	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
lypinator	0:bb348c97df44	2803
lypinator	0:bb348c97df44	2804	/* Call error callback */
lypinator	0:bb348c97df44	2805	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
lypinator	0:bb348c97df44	2806	}
lypinator	0:bb348c97df44	2807	/* Check if overrun occurs during injected conversion */
lypinator	0:bb348c97df44	2808	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) != 0U) && \
lypinator	0:bb348c97df44	2809	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JOVRIE) != 0U))
lypinator	0:bb348c97df44	2810	{
lypinator	0:bb348c97df44	2811	/* Clear injected overrun flag */
lypinator	0:bb348c97df44	2812	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
lypinator	0:bb348c97df44	2813
lypinator	0:bb348c97df44	2814	/* Update error code */
lypinator	0:bb348c97df44	2815	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
lypinator	0:bb348c97df44	2816
lypinator	0:bb348c97df44	2817	/* Call error callback */
lypinator	0:bb348c97df44	2818	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
lypinator	0:bb348c97df44	2819	}
lypinator	0:bb348c97df44	2820	/* Check if end of regular conversion */
lypinator	0:bb348c97df44	2821	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != 0U) && \
lypinator	0:bb348c97df44	2822	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_REOCIE) != 0U))
lypinator	0:bb348c97df44	2823	{
lypinator	0:bb348c97df44	2824	/* Call regular conversion complete callback */
lypinator	0:bb348c97df44	2825	HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
lypinator	0:bb348c97df44	2826
lypinator	0:bb348c97df44	2827	/* End of conversion if mode is not continuous and software trigger */
lypinator	0:bb348c97df44	2828	if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
lypinator	0:bb348c97df44	2829	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
lypinator	0:bb348c97df44	2830	{
lypinator	0:bb348c97df44	2831	/* Disable interrupts for regular conversions */
lypinator	0:bb348c97df44	2832	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
lypinator	0:bb348c97df44	2833
lypinator	0:bb348c97df44	2834	/* Update DFSDM filter state */
lypinator	0:bb348c97df44	2835	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
lypinator	0:bb348c97df44	2836	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
lypinator	0:bb348c97df44	2837	}
lypinator	0:bb348c97df44	2838	}
lypinator	0:bb348c97df44	2839	/* Check if end of injected conversion */
lypinator	0:bb348c97df44	2840	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != 0U) && \
lypinator	0:bb348c97df44	2841	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JEOCIE) != 0U))
lypinator	0:bb348c97df44	2842	{
lypinator	0:bb348c97df44	2843	/* Call injected conversion complete callback */
lypinator	0:bb348c97df44	2844	HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
lypinator	0:bb348c97df44	2845
lypinator	0:bb348c97df44	2846	/* Update remaining injected conversions */
lypinator	0:bb348c97df44	2847	hdfsdm_filter->InjConvRemaining--;
lypinator	0:bb348c97df44	2848	if(hdfsdm_filter->InjConvRemaining == 0U)
lypinator	0:bb348c97df44	2849	{
lypinator	0:bb348c97df44	2850	/* End of conversion if trigger is software */
lypinator	0:bb348c97df44	2851	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
lypinator	0:bb348c97df44	2852	{
lypinator	0:bb348c97df44	2853	/* Disable interrupts for injected conversions */
lypinator	0:bb348c97df44	2854	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
lypinator	0:bb348c97df44	2855
lypinator	0:bb348c97df44	2856	/* Update DFSDM filter state */
lypinator	0:bb348c97df44	2857	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
lypinator	0:bb348c97df44	2858	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
lypinator	0:bb348c97df44	2859	}
lypinator	0:bb348c97df44	2860	/* end of injected sequence, reset the value */
lypinator	0:bb348c97df44	2861	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
lypinator	0:bb348c97df44	2862	hdfsdm_filter->InjectedChannelsNbr : 1U;
lypinator	0:bb348c97df44	2863	}
lypinator	0:bb348c97df44	2864	}
lypinator	0:bb348c97df44	2865	/* Check if analog watchdog occurs */
lypinator	0:bb348c97df44	2866	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_AWDF) != 0U) && \
lypinator	0:bb348c97df44	2867	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_AWDIE) != 0U))
lypinator	0:bb348c97df44	2868	{
lypinator	0:bb348c97df44	2869	uint32_t reg = 0U;
lypinator	0:bb348c97df44	2870	uint32_t threshold = 0U;
lypinator	0:bb348c97df44	2871	uint32_t channel = 0U;
lypinator	0:bb348c97df44	2872
lypinator	0:bb348c97df44	2873	/* Get channel and threshold */
lypinator	0:bb348c97df44	2874	reg = hdfsdm_filter->Instance->FLTAWSR;
lypinator	0:bb348c97df44	2875	threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
lypinator	0:bb348c97df44	2876	if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
lypinator	0:bb348c97df44	2877	{
lypinator	0:bb348c97df44	2878	reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;
lypinator	0:bb348c97df44	2879	}
lypinator	0:bb348c97df44	2880	while((reg & 1U) == 0U)
lypinator	0:bb348c97df44	2881	{
lypinator	0:bb348c97df44	2882	channel++;
lypinator	0:bb348c97df44	2883	reg = reg >> 1U;
lypinator	0:bb348c97df44	2884	}
lypinator	0:bb348c97df44	2885	/* Clear analog watchdog flag */
lypinator	0:bb348c97df44	2886	hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
lypinator	0:bb348c97df44	2887	(1U << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \
lypinator	0:bb348c97df44	2888	(1U << channel);
lypinator	0:bb348c97df44	2889
lypinator	0:bb348c97df44	2890	/* Call analog watchdog callback */
lypinator	0:bb348c97df44	2891	HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
lypinator	0:bb348c97df44	2892	}
lypinator	0:bb348c97df44	2893	/* Check if clock absence occurs */
lypinator	0:bb348c97df44	2894	else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
lypinator	0:bb348c97df44	2895	((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0U) && \
lypinator	0:bb348c97df44	2896	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0U))
lypinator	0:bb348c97df44	2897	{
lypinator	0:bb348c97df44	2898	uint32_t reg = 0U;
lypinator	0:bb348c97df44	2899	uint32_t channel = 0U;
lypinator	0:bb348c97df44	2900
lypinator	0:bb348c97df44	2901	reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
lypinator	0:bb348c97df44	2902
lypinator	0:bb348c97df44	2903	while(channel < DFSDM1_CHANNEL_NUMBER)
lypinator	0:bb348c97df44	2904	{
lypinator	0:bb348c97df44	2905	/* Check if flag is set and corresponding channel is enabled */
lypinator	0:bb348c97df44	2906	if(((reg & 1U) != 0U) && (a_dfsdm1ChannelHandle[channel] != NULL))
lypinator	0:bb348c97df44	2907	{
lypinator	0:bb348c97df44	2908	/* Check clock absence has been enabled for this channel */
lypinator	0:bb348c97df44	2909	if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
lypinator	0:bb348c97df44	2910	{
lypinator	0:bb348c97df44	2911	/* Clear clock absence flag */
lypinator	0:bb348c97df44	2912	hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	2913
lypinator	0:bb348c97df44	2914	/* Call clock absence callback */
lypinator	0:bb348c97df44	2915	HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
lypinator	0:bb348c97df44	2916	}
lypinator	0:bb348c97df44	2917	}
lypinator	0:bb348c97df44	2918	channel++;
lypinator	0:bb348c97df44	2919	reg = reg >> 1U;
lypinator	0:bb348c97df44	2920	}
lypinator	0:bb348c97df44	2921	}
lypinator	0:bb348c97df44	2922	#if defined (DFSDM2_Channel0)
lypinator	0:bb348c97df44	2923	/* Check if clock absence occurs */
lypinator	0:bb348c97df44	2924	else if((hdfsdm_filter->Instance == DFSDM2_Filter0) && \
lypinator	0:bb348c97df44	2925	((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0U) && \
lypinator	0:bb348c97df44	2926	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0U))
lypinator	0:bb348c97df44	2927	{
lypinator	0:bb348c97df44	2928	uint32_t reg = 0U;
lypinator	0:bb348c97df44	2929	uint32_t channel = 0U;
lypinator	0:bb348c97df44	2930
lypinator	0:bb348c97df44	2931	reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
lypinator	0:bb348c97df44	2932
lypinator	0:bb348c97df44	2933	while(channel < DFSDM2_CHANNEL_NUMBER)
lypinator	0:bb348c97df44	2934	{
lypinator	0:bb348c97df44	2935	/* Check if flag is set and corresponding channel is enabled */
lypinator	0:bb348c97df44	2936	if(((reg & 1U) != 0U) && (a_dfsdm2ChannelHandle[channel] != NULL))
lypinator	0:bb348c97df44	2937	{
lypinator	0:bb348c97df44	2938	/* Check clock absence has been enabled for this channel */
lypinator	0:bb348c97df44	2939	if((a_dfsdm2ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
lypinator	0:bb348c97df44	2940	{
lypinator	0:bb348c97df44	2941	/* Clear clock absence flag */
lypinator	0:bb348c97df44	2942	hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
lypinator	0:bb348c97df44	2943
lypinator	0:bb348c97df44	2944	/* Call clock absence callback */
lypinator	0:bb348c97df44	2945	HAL_DFSDM_ChannelCkabCallback(a_dfsdm2ChannelHandle[channel]);
lypinator	0:bb348c97df44	2946	}
lypinator	0:bb348c97df44	2947	}
lypinator	0:bb348c97df44	2948	channel++;
lypinator	0:bb348c97df44	2949	reg = reg >> 1U;
lypinator	0:bb348c97df44	2950	}
lypinator	0:bb348c97df44	2951	}
lypinator	0:bb348c97df44	2952	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	2953	/* Check if short circuit detection occurs */
lypinator	0:bb348c97df44	2954	else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
lypinator	0:bb348c97df44	2955	((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0U) && \
lypinator	0:bb348c97df44	2956	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0U))
lypinator	0:bb348c97df44	2957	{
lypinator	0:bb348c97df44	2958	uint32_t reg = 0U;
lypinator	0:bb348c97df44	2959	uint32_t channel = 0U;
lypinator	0:bb348c97df44	2960
lypinator	0:bb348c97df44	2961	/* Get channel */
lypinator	0:bb348c97df44	2962	reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
lypinator	0:bb348c97df44	2963	while((reg & 1U) == 0U)
lypinator	0:bb348c97df44	2964	{
lypinator	0:bb348c97df44	2965	channel++;
lypinator	0:bb348c97df44	2966	reg = reg >> 1U;
lypinator	0:bb348c97df44	2967	}
lypinator	0:bb348c97df44	2968
lypinator	0:bb348c97df44	2969	/* Clear short circuit detection flag */
lypinator	0:bb348c97df44	2970	hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
lypinator	0:bb348c97df44	2971
lypinator	0:bb348c97df44	2972	/* Call short circuit detection callback */
lypinator	0:bb348c97df44	2973	HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
lypinator	0:bb348c97df44	2974	}
lypinator	0:bb348c97df44	2975	#if defined (DFSDM2_Channel0)
lypinator	0:bb348c97df44	2976	/* Check if short circuit detection occurs */
lypinator	0:bb348c97df44	2977	else if((hdfsdm_filter->Instance == DFSDM2_Filter0) && \
lypinator	0:bb348c97df44	2978	((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0U) && \
lypinator	0:bb348c97df44	2979	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0U))
lypinator	0:bb348c97df44	2980	{
lypinator	0:bb348c97df44	2981	uint32_t reg = 0U;
lypinator	0:bb348c97df44	2982	uint32_t channel = 0U;
lypinator	0:bb348c97df44	2983
lypinator	0:bb348c97df44	2984	/* Get channel */
lypinator	0:bb348c97df44	2985	reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
lypinator	0:bb348c97df44	2986	while((reg & 1U) == 0U)
lypinator	0:bb348c97df44	2987	{
lypinator	0:bb348c97df44	2988	channel++;
lypinator	0:bb348c97df44	2989	reg = reg >> 1U;
lypinator	0:bb348c97df44	2990	}
lypinator	0:bb348c97df44	2991
lypinator	0:bb348c97df44	2992	/* Clear short circuit detection flag */
lypinator	0:bb348c97df44	2993	hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCSDF_Pos + channel));
lypinator	0:bb348c97df44	2994
lypinator	0:bb348c97df44	2995	/* Call short circuit detection callback */
lypinator	0:bb348c97df44	2996	HAL_DFSDM_ChannelScdCallback(a_dfsdm2ChannelHandle[channel]);
lypinator	0:bb348c97df44	2997	}
lypinator	0:bb348c97df44	2998	#endif /* DFSDM2_Channel0 */
lypinator	0:bb348c97df44	2999	}
lypinator	0:bb348c97df44	3000
lypinator	0:bb348c97df44	3001	/**
lypinator	0:bb348c97df44	3002	* @brief Regular conversion complete callback.
lypinator	0:bb348c97df44	3003	* @note In interrupt mode, user has to read conversion value in this function
lypinator	0:bb348c97df44	3004	* using HAL_DFSDM_FilterGetRegularValue.
lypinator	0:bb348c97df44	3005	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3006	* @retval None
lypinator	0:bb348c97df44	3007	*/
lypinator	0:bb348c97df44	3008	__weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	3009	{
lypinator	0:bb348c97df44	3010	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3011	UNUSED(hdfsdm_filter);
lypinator	0:bb348c97df44	3012	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3013	the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
lypinator	0:bb348c97df44	3014	*/
lypinator	0:bb348c97df44	3015	}
lypinator	0:bb348c97df44	3016
lypinator	0:bb348c97df44	3017	/**
lypinator	0:bb348c97df44	3018	* @brief Half regular conversion complete callback.
lypinator	0:bb348c97df44	3019	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3020	* @retval None
lypinator	0:bb348c97df44	3021	*/
lypinator	0:bb348c97df44	3022	__weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	3023	{
lypinator	0:bb348c97df44	3024	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3025	UNUSED(hdfsdm_filter);
lypinator	0:bb348c97df44	3026	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3027	the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
lypinator	0:bb348c97df44	3028	*/
lypinator	0:bb348c97df44	3029	}
lypinator	0:bb348c97df44	3030
lypinator	0:bb348c97df44	3031	/**
lypinator	0:bb348c97df44	3032	* @brief Injected conversion complete callback.
lypinator	0:bb348c97df44	3033	* @note In interrupt mode, user has to read conversion value in this function
lypinator	0:bb348c97df44	3034	* using HAL_DFSDM_FilterGetInjectedValue.
lypinator	0:bb348c97df44	3035	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3036	* @retval None
lypinator	0:bb348c97df44	3037	*/
lypinator	0:bb348c97df44	3038	__weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	3039	{
lypinator	0:bb348c97df44	3040	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3041	UNUSED(hdfsdm_filter);
lypinator	0:bb348c97df44	3042	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3043	the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
lypinator	0:bb348c97df44	3044	*/
lypinator	0:bb348c97df44	3045	}
lypinator	0:bb348c97df44	3046
lypinator	0:bb348c97df44	3047	/**
lypinator	0:bb348c97df44	3048	* @brief Half injected conversion complete callback.
lypinator	0:bb348c97df44	3049	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3050	* @retval None
lypinator	0:bb348c97df44	3051	*/
lypinator	0:bb348c97df44	3052	__weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	3053	{
lypinator	0:bb348c97df44	3054	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3055	UNUSED(hdfsdm_filter);
lypinator	0:bb348c97df44	3056	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3057	the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
lypinator	0:bb348c97df44	3058	*/
lypinator	0:bb348c97df44	3059	}
lypinator	0:bb348c97df44	3060
lypinator	0:bb348c97df44	3061	/**
lypinator	0:bb348c97df44	3062	* @brief Filter analog watchdog callback.
lypinator	0:bb348c97df44	3063	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3064	* @param Channel Corresponding channel.
lypinator	0:bb348c97df44	3065	* @param Threshold Low or high threshold has been reached.
lypinator	0:bb348c97df44	3066	* @retval None
lypinator	0:bb348c97df44	3067	*/
lypinator	0:bb348c97df44	3068	__weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
lypinator	0:bb348c97df44	3069	uint32_t Channel, uint32_t Threshold)
lypinator	0:bb348c97df44	3070	{
lypinator	0:bb348c97df44	3071	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3072	UNUSED(hdfsdm_filter);
lypinator	0:bb348c97df44	3073	UNUSED(Channel);
lypinator	0:bb348c97df44	3074	UNUSED(Threshold);
lypinator	0:bb348c97df44	3075
lypinator	0:bb348c97df44	3076	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3077	the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
lypinator	0:bb348c97df44	3078	*/
lypinator	0:bb348c97df44	3079	}
lypinator	0:bb348c97df44	3080
lypinator	0:bb348c97df44	3081	/**
lypinator	0:bb348c97df44	3082	* @brief Error callback.
lypinator	0:bb348c97df44	3083	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3084	* @retval None
lypinator	0:bb348c97df44	3085	*/
lypinator	0:bb348c97df44	3086	__weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	3087	{
lypinator	0:bb348c97df44	3088	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	3089	UNUSED(hdfsdm_filter);
lypinator	0:bb348c97df44	3090	/* NOTE : This function should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	3091	the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
lypinator	0:bb348c97df44	3092	*/
lypinator	0:bb348c97df44	3093	}
lypinator	0:bb348c97df44	3094
lypinator	0:bb348c97df44	3095	/**
lypinator	0:bb348c97df44	3096	* @}
lypinator	0:bb348c97df44	3097	*/
lypinator	0:bb348c97df44	3098
lypinator	0:bb348c97df44	3099	/** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
lypinator	0:bb348c97df44	3100	* @brief Filter state functions
lypinator	0:bb348c97df44	3101	*
lypinator	0:bb348c97df44	3102	@verbatim
lypinator	0:bb348c97df44	3103	==============================================================================
lypinator	0:bb348c97df44	3104	##### Filter state functions #####
lypinator	0:bb348c97df44	3105	==============================================================================
lypinator	0:bb348c97df44	3106	[..] This section provides functions allowing to:
lypinator	0:bb348c97df44	3107	(+) Get the DFSDM filter state.
lypinator	0:bb348c97df44	3108	(+) Get the DFSDM filter error.
lypinator	0:bb348c97df44	3109	@endverbatim
lypinator	0:bb348c97df44	3110	* @{
lypinator	0:bb348c97df44	3111	*/
lypinator	0:bb348c97df44	3112
lypinator	0:bb348c97df44	3113	/**
lypinator	0:bb348c97df44	3114	* @brief This function allows to get the current DFSDM filter handle state.
lypinator	0:bb348c97df44	3115	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3116	* @retval DFSDM filter state.
lypinator	0:bb348c97df44	3117	*/
lypinator	0:bb348c97df44	3118	HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	3119	{
lypinator	0:bb348c97df44	3120	/* Return DFSDM filter handle state */
lypinator	0:bb348c97df44	3121	return hdfsdm_filter->State;
lypinator	0:bb348c97df44	3122	}
lypinator	0:bb348c97df44	3123
lypinator	0:bb348c97df44	3124	/**
lypinator	0:bb348c97df44	3125	* @brief This function allows to get the current DFSDM filter error.
lypinator	0:bb348c97df44	3126	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3127	* @retval DFSDM filter error code.
lypinator	0:bb348c97df44	3128	*/
lypinator	0:bb348c97df44	3129	uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
lypinator	0:bb348c97df44	3130	{
lypinator	0:bb348c97df44	3131	return hdfsdm_filter->ErrorCode;
lypinator	0:bb348c97df44	3132	}
lypinator	0:bb348c97df44	3133
lypinator	0:bb348c97df44	3134	/**
lypinator	0:bb348c97df44	3135	* @}
lypinator	0:bb348c97df44	3136	*/
lypinator	0:bb348c97df44	3137
lypinator	0:bb348c97df44	3138	/** @defgroup DFSDM_Exported_Functions_Group5_Filter MultiChannel operation functions
lypinator	0:bb348c97df44	3139	* @brief Filter state functions
lypinator	0:bb348c97df44	3140	*
lypinator	0:bb348c97df44	3141	@verbatim
lypinator	0:bb348c97df44	3142	==============================================================================
lypinator	0:bb348c97df44	3143	##### Filter MultiChannel operation functions #####
lypinator	0:bb348c97df44	3144	==============================================================================
lypinator	0:bb348c97df44	3145	[..] This section provides functions allowing to:
lypinator	0:bb348c97df44	3146	(+) Control the DFSDM Multi channel delay block
lypinator	0:bb348c97df44	3147	@endverbatim
lypinator	0:bb348c97df44	3148	* @{
lypinator	0:bb348c97df44	3149	*/
lypinator	0:bb348c97df44	3150	#if defined(SYSCFG_MCHDLYCR_BSCKSEL)
lypinator	0:bb348c97df44	3151	/**
lypinator	0:bb348c97df44	3152	* @brief Select the DFSDM2 as clock source for the bitstream clock.
lypinator	0:bb348c97df44	3153	* @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
lypinator	0:bb348c97df44	3154	* before HAL_DFSDM_BitstreamClock_Start()
lypinator	0:bb348c97df44	3155	*/
lypinator	0:bb348c97df44	3156	void HAL_DFSDM_BitstreamClock_Start(void)
lypinator	0:bb348c97df44	3157	{
lypinator	0:bb348c97df44	3158	uint32_t tmp = 0;
lypinator	0:bb348c97df44	3159
lypinator	0:bb348c97df44	3160	tmp = SYSCFG->MCHDLYCR;
lypinator	0:bb348c97df44	3161	tmp = (tmp &(~SYSCFG_MCHDLYCR_BSCKSEL));
lypinator	0:bb348c97df44	3162
lypinator	0:bb348c97df44	3163	SYSCFG->MCHDLYCR = (tmp\|SYSCFG_MCHDLYCR_BSCKSEL);
lypinator	0:bb348c97df44	3164	}
lypinator	0:bb348c97df44	3165
lypinator	0:bb348c97df44	3166	/**
lypinator	0:bb348c97df44	3167	* @brief Stop the DFSDM2 as clock source for the bitstream clock.
lypinator	0:bb348c97df44	3168	* @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
lypinator	0:bb348c97df44	3169	* before HAL_DFSDM_BitstreamClock_Stop()
lypinator	0:bb348c97df44	3170	* @retval None
lypinator	0:bb348c97df44	3171	*/
lypinator	0:bb348c97df44	3172	void HAL_DFSDM_BitstreamClock_Stop(void)
lypinator	0:bb348c97df44	3173	{
lypinator	0:bb348c97df44	3174	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	3175
lypinator	0:bb348c97df44	3176	tmp = SYSCFG->MCHDLYCR;
lypinator	0:bb348c97df44	3177	tmp = (tmp &(~SYSCFG_MCHDLYCR_BSCKSEL));
lypinator	0:bb348c97df44	3178
lypinator	0:bb348c97df44	3179	SYSCFG->MCHDLYCR = tmp;
lypinator	0:bb348c97df44	3180	}
lypinator	0:bb348c97df44	3181
lypinator	0:bb348c97df44	3182	/**
lypinator	0:bb348c97df44	3183	* @brief Disable Delay Clock for DFSDM1/2.
lypinator	0:bb348c97df44	3184	* @param MCHDLY HAL_MCHDLY_CLOCK_DFSDM2.
lypinator	0:bb348c97df44	3185	* HAL_MCHDLY_CLOCK_DFSDM1.
lypinator	0:bb348c97df44	3186	* @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
lypinator	0:bb348c97df44	3187	* before HAL_DFSDM_DisableDelayClock()
lypinator	0:bb348c97df44	3188	* @retval None
lypinator	0:bb348c97df44	3189	*/
lypinator	0:bb348c97df44	3190	void HAL_DFSDM_DisableDelayClock(uint32_t MCHDLY)
lypinator	0:bb348c97df44	3191	{
lypinator	0:bb348c97df44	3192	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	3193
lypinator	0:bb348c97df44	3194	assert_param(IS_DFSDM_DELAY_CLOCK(MCHDLY));
lypinator	0:bb348c97df44	3195
lypinator	0:bb348c97df44	3196	tmp = SYSCFG->MCHDLYCR;
lypinator	0:bb348c97df44	3197	if(MCHDLY == HAL_MCHDLY_CLOCK_DFSDM2)
lypinator	0:bb348c97df44	3198	{
lypinator	0:bb348c97df44	3199	tmp = tmp &(~SYSCFG_MCHDLYCR_MCHDLY2EN);
lypinator	0:bb348c97df44	3200	}
lypinator	0:bb348c97df44	3201	else
lypinator	0:bb348c97df44	3202	{
lypinator	0:bb348c97df44	3203	tmp = tmp &(~SYSCFG_MCHDLYCR_MCHDLY1EN);
lypinator	0:bb348c97df44	3204	}
lypinator	0:bb348c97df44	3205
lypinator	0:bb348c97df44	3206	SYSCFG->MCHDLYCR = tmp;
lypinator	0:bb348c97df44	3207	}
lypinator	0:bb348c97df44	3208
lypinator	0:bb348c97df44	3209	/**
lypinator	0:bb348c97df44	3210	* @brief Enable Delay Clock for DFSDM1/2.
lypinator	0:bb348c97df44	3211	* @param MCHDLY HAL_MCHDLY_CLOCK_DFSDM2.
lypinator	0:bb348c97df44	3212	* HAL_MCHDLY_CLOCK_DFSDM1.
lypinator	0:bb348c97df44	3213	* @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
lypinator	0:bb348c97df44	3214	* before HAL_DFSDM_EnableDelayClock()
lypinator	0:bb348c97df44	3215	* @retval None
lypinator	0:bb348c97df44	3216	*/
lypinator	0:bb348c97df44	3217	void HAL_DFSDM_EnableDelayClock(uint32_t MCHDLY)
lypinator	0:bb348c97df44	3218	{
lypinator	0:bb348c97df44	3219	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	3220
lypinator	0:bb348c97df44	3221	assert_param(IS_DFSDM_DELAY_CLOCK(MCHDLY));
lypinator	0:bb348c97df44	3222
lypinator	0:bb348c97df44	3223	tmp = SYSCFG->MCHDLYCR;
lypinator	0:bb348c97df44	3224	tmp = tmp & ~MCHDLY;
lypinator	0:bb348c97df44	3225
lypinator	0:bb348c97df44	3226	SYSCFG->MCHDLYCR = (tmp\|MCHDLY);
lypinator	0:bb348c97df44	3227	}
lypinator	0:bb348c97df44	3228
lypinator	0:bb348c97df44	3229	/**
lypinator	0:bb348c97df44	3230	* @brief Select the source for CKin signals for DFSDM1/2.
lypinator	0:bb348c97df44	3231	* @param source DFSDM2_CKIN_PAD.
lypinator	0:bb348c97df44	3232	* DFSDM2_CKIN_DM.
lypinator	0:bb348c97df44	3233	* DFSDM1_CKIN_PAD.
lypinator	0:bb348c97df44	3234	* DFSDM1_CKIN_DM.
lypinator	0:bb348c97df44	3235	* @retval None
lypinator	0:bb348c97df44	3236	*/
lypinator	0:bb348c97df44	3237	void HAL_DFSDM_ClockIn_SourceSelection(uint32_t source)
lypinator	0:bb348c97df44	3238	{
lypinator	0:bb348c97df44	3239	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	3240
lypinator	0:bb348c97df44	3241	assert_param(IS_DFSDM_CLOCKIN_SELECTION(source));
lypinator	0:bb348c97df44	3242
lypinator	0:bb348c97df44	3243	tmp = SYSCFG->MCHDLYCR;
lypinator	0:bb348c97df44	3244
lypinator	0:bb348c97df44	3245	if((source == HAL_DFSDM2_CKIN_PAD) \|\| (source == HAL_DFSDM2_CKIN_DM))
lypinator	0:bb348c97df44	3246	{
lypinator	0:bb348c97df44	3247	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CFG);
lypinator	0:bb348c97df44	3248
lypinator	0:bb348c97df44	3249	if(source == HAL_DFSDM2_CKIN_PAD)
lypinator	0:bb348c97df44	3250	{
lypinator	0:bb348c97df44	3251	source = 0x000000U;
lypinator	0:bb348c97df44	3252	}
lypinator	0:bb348c97df44	3253	}
lypinator	0:bb348c97df44	3254	else
lypinator	0:bb348c97df44	3255	{
lypinator	0:bb348c97df44	3256	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CFG);
lypinator	0:bb348c97df44	3257	}
lypinator	0:bb348c97df44	3258
lypinator	0:bb348c97df44	3259	SYSCFG->MCHDLYCR = (source\|tmp);
lypinator	0:bb348c97df44	3260	}
lypinator	0:bb348c97df44	3261
lypinator	0:bb348c97df44	3262	/**
lypinator	0:bb348c97df44	3263	* @brief Select the source for CKOut signals for DFSDM1/2.
lypinator	0:bb348c97df44	3264	* @param source: DFSDM2_CKOUT_DFSDM2.
lypinator	0:bb348c97df44	3265	* DFSDM2_CKOUT_M27.
lypinator	0:bb348c97df44	3266	* DFSDM1_CKOUT_DFSDM1.
lypinator	0:bb348c97df44	3267	* DFSDM1_CKOUT_M27.
lypinator	0:bb348c97df44	3268	* @retval None
lypinator	0:bb348c97df44	3269	*/
lypinator	0:bb348c97df44	3270	void HAL_DFSDM_ClockOut_SourceSelection(uint32_t source)
lypinator	0:bb348c97df44	3271	{
lypinator	0:bb348c97df44	3272	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	3273
lypinator	0:bb348c97df44	3274	assert_param(IS_DFSDM_CLOCKOUT_SELECTION(source));
lypinator	0:bb348c97df44	3275
lypinator	0:bb348c97df44	3276	tmp = SYSCFG->MCHDLYCR;
lypinator	0:bb348c97df44	3277
lypinator	0:bb348c97df44	3278	if((source == HAL_DFSDM2_CKOUT_DFSDM2) \|\| (source == HAL_DFSDM2_CKOUT_M27))
lypinator	0:bb348c97df44	3279	{
lypinator	0:bb348c97df44	3280	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CKOSEL);
lypinator	0:bb348c97df44	3281
lypinator	0:bb348c97df44	3282	if(source == HAL_DFSDM2_CKOUT_DFSDM2)
lypinator	0:bb348c97df44	3283	{
lypinator	0:bb348c97df44	3284	source = 0x000U;
lypinator	0:bb348c97df44	3285	}
lypinator	0:bb348c97df44	3286	}
lypinator	0:bb348c97df44	3287	else
lypinator	0:bb348c97df44	3288	{
lypinator	0:bb348c97df44	3289	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CKOSEL);
lypinator	0:bb348c97df44	3290	}
lypinator	0:bb348c97df44	3291
lypinator	0:bb348c97df44	3292	SYSCFG->MCHDLYCR = (source\|tmp);
lypinator	0:bb348c97df44	3293	}
lypinator	0:bb348c97df44	3294
lypinator	0:bb348c97df44	3295	/**
lypinator	0:bb348c97df44	3296	* @brief Select the source for DataIn0 signals for DFSDM1/2.
lypinator	0:bb348c97df44	3297	* @param source DATAIN0_DFSDM2_PAD.
lypinator	0:bb348c97df44	3298	* DATAIN0_DFSDM2_DATAIN1.
lypinator	0:bb348c97df44	3299	* DATAIN0_DFSDM1_PAD.
lypinator	0:bb348c97df44	3300	* DATAIN0_DFSDM1_DATAIN1.
lypinator	0:bb348c97df44	3301	* @retval None
lypinator	0:bb348c97df44	3302	*/
lypinator	0:bb348c97df44	3303	void HAL_DFSDM_DataIn0_SourceSelection(uint32_t source)
lypinator	0:bb348c97df44	3304	{
lypinator	0:bb348c97df44	3305	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	3306
lypinator	0:bb348c97df44	3307	assert_param(IS_DFSDM_DATAIN0_SRC_SELECTION(source));
lypinator	0:bb348c97df44	3308
lypinator	0:bb348c97df44	3309	tmp = SYSCFG->MCHDLYCR;
lypinator	0:bb348c97df44	3310
lypinator	0:bb348c97df44	3311	if((source == HAL_DATAIN0_DFSDM2_PAD)\|\| (source == HAL_DATAIN0_DFSDM2_DATAIN1))
lypinator	0:bb348c97df44	3312	{
lypinator	0:bb348c97df44	3313	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D0SEL);
lypinator	0:bb348c97df44	3314	if(source == HAL_DATAIN0_DFSDM2_PAD)
lypinator	0:bb348c97df44	3315	{
lypinator	0:bb348c97df44	3316	source = 0x00000U;
lypinator	0:bb348c97df44	3317	}
lypinator	0:bb348c97df44	3318	}
lypinator	0:bb348c97df44	3319	else
lypinator	0:bb348c97df44	3320	{
lypinator	0:bb348c97df44	3321	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1D0SEL);
lypinator	0:bb348c97df44	3322	}
lypinator	0:bb348c97df44	3323	SYSCFG->MCHDLYCR = (source\|tmp);
lypinator	0:bb348c97df44	3324	}
lypinator	0:bb348c97df44	3325
lypinator	0:bb348c97df44	3326	/**
lypinator	0:bb348c97df44	3327	* @brief Select the source for DataIn2 signals for DFSDM1/2.
lypinator	0:bb348c97df44	3328	* @param source DATAIN2_DFSDM2_PAD.
lypinator	0:bb348c97df44	3329	* DATAIN2_DFSDM2_DATAIN3.
lypinator	0:bb348c97df44	3330	* DATAIN2_DFSDM1_PAD.
lypinator	0:bb348c97df44	3331	* DATAIN2_DFSDM1_DATAIN3.
lypinator	0:bb348c97df44	3332	* @retval None
lypinator	0:bb348c97df44	3333	*/
lypinator	0:bb348c97df44	3334	void HAL_DFSDM_DataIn2_SourceSelection(uint32_t source)
lypinator	0:bb348c97df44	3335	{
lypinator	0:bb348c97df44	3336	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	3337
lypinator	0:bb348c97df44	3338	assert_param(IS_DFSDM_DATAIN2_SRC_SELECTION(source));
lypinator	0:bb348c97df44	3339
lypinator	0:bb348c97df44	3340	tmp = SYSCFG->MCHDLYCR;
lypinator	0:bb348c97df44	3341
lypinator	0:bb348c97df44	3342	if((source == HAL_DATAIN2_DFSDM2_PAD)\|\| (source == HAL_DATAIN2_DFSDM2_DATAIN3))
lypinator	0:bb348c97df44	3343	{
lypinator	0:bb348c97df44	3344	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D2SEL);
lypinator	0:bb348c97df44	3345	if (source == HAL_DATAIN2_DFSDM2_PAD)
lypinator	0:bb348c97df44	3346	{
lypinator	0:bb348c97df44	3347	source = 0x0000U;
lypinator	0:bb348c97df44	3348	}
lypinator	0:bb348c97df44	3349	}
lypinator	0:bb348c97df44	3350	else
lypinator	0:bb348c97df44	3351	{
lypinator	0:bb348c97df44	3352	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1D2SEL);
lypinator	0:bb348c97df44	3353	}
lypinator	0:bb348c97df44	3354	SYSCFG->MCHDLYCR = (source\|tmp);
lypinator	0:bb348c97df44	3355	}
lypinator	0:bb348c97df44	3356
lypinator	0:bb348c97df44	3357	/**
lypinator	0:bb348c97df44	3358	* @brief Select the source for DataIn4 signals for DFSDM2.
lypinator	0:bb348c97df44	3359	* @param source DATAIN4_DFSDM2_PAD.
lypinator	0:bb348c97df44	3360	* DATAIN4_DFSDM2_DATAIN5
lypinator	0:bb348c97df44	3361	* @retval None
lypinator	0:bb348c97df44	3362	*/
lypinator	0:bb348c97df44	3363	void HAL_DFSDM_DataIn4_SourceSelection(uint32_t source)
lypinator	0:bb348c97df44	3364	{
lypinator	0:bb348c97df44	3365	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	3366
lypinator	0:bb348c97df44	3367	assert_param(IS_DFSDM_DATAIN4_SRC_SELECTION(source));
lypinator	0:bb348c97df44	3368
lypinator	0:bb348c97df44	3369	tmp = SYSCFG->MCHDLYCR;
lypinator	0:bb348c97df44	3370	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D4SEL);
lypinator	0:bb348c97df44	3371
lypinator	0:bb348c97df44	3372	SYSCFG->MCHDLYCR = (source\|tmp);
lypinator	0:bb348c97df44	3373	}
lypinator	0:bb348c97df44	3374
lypinator	0:bb348c97df44	3375	/**
lypinator	0:bb348c97df44	3376	* @brief Select the source for DataIn6 signals for DFSDM2.
lypinator	0:bb348c97df44	3377	* @param source DATAIN6_DFSDM2_PAD.
lypinator	0:bb348c97df44	3378	* DATAIN6_DFSDM2_DATAIN7.
lypinator	0:bb348c97df44	3379	* @retval None
lypinator	0:bb348c97df44	3380	*/
lypinator	0:bb348c97df44	3381	void HAL_DFSDM_DataIn6_SourceSelection(uint32_t source)
lypinator	0:bb348c97df44	3382	{
lypinator	0:bb348c97df44	3383	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	3384
lypinator	0:bb348c97df44	3385	assert_param(IS_DFSDM_DATAIN6_SRC_SELECTION(source));
lypinator	0:bb348c97df44	3386
lypinator	0:bb348c97df44	3387	tmp = SYSCFG->MCHDLYCR;
lypinator	0:bb348c97df44	3388
lypinator	0:bb348c97df44	3389	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2D6SEL);
lypinator	0:bb348c97df44	3390
lypinator	0:bb348c97df44	3391	SYSCFG->MCHDLYCR = (source\|tmp);
lypinator	0:bb348c97df44	3392	}
lypinator	0:bb348c97df44	3393
lypinator	0:bb348c97df44	3394	/**
lypinator	0:bb348c97df44	3395	* @brief Configure the distribution of the bitstream clock gated from TIM4_OC
lypinator	0:bb348c97df44	3396	* for DFSDM1 or TIM3_OC for DFSDM2
lypinator	0:bb348c97df44	3397	* @param source DFSDM1_CLKIN0_TIM4OC2
lypinator	0:bb348c97df44	3398	* DFSDM1_CLKIN2_TIM4OC2
lypinator	0:bb348c97df44	3399	* DFSDM1_CLKIN1_TIM4OC1
lypinator	0:bb348c97df44	3400	* DFSDM1_CLKIN3_TIM4OC1
lypinator	0:bb348c97df44	3401	* DFSDM2_CLKIN0_TIM3OC4
lypinator	0:bb348c97df44	3402	* DFSDM2_CLKIN4_TIM3OC4
lypinator	0:bb348c97df44	3403	* DFSDM2_CLKIN1_TIM3OC3
lypinator	0:bb348c97df44	3404	* DFSDM2_CLKIN5_TIM3OC3
lypinator	0:bb348c97df44	3405	* DFSDM2_CLKIN2_TIM3OC2
lypinator	0:bb348c97df44	3406	* DFSDM2_CLKIN6_TIM3OC2
lypinator	0:bb348c97df44	3407	* DFSDM2_CLKIN3_TIM3OC1
lypinator	0:bb348c97df44	3408	* DFSDM2_CLKIN7_TIM3OC1
lypinator	0:bb348c97df44	3409	* @retval None
lypinator	0:bb348c97df44	3410	*/
lypinator	0:bb348c97df44	3411	void HAL_DFSDM_BitStreamClkDistribution_Config(uint32_t source)
lypinator	0:bb348c97df44	3412	{
lypinator	0:bb348c97df44	3413	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	3414
lypinator	0:bb348c97df44	3415	assert_param(IS_DFSDM_BITSTREM_CLK_DISTRIBUTION(source));
lypinator	0:bb348c97df44	3416
lypinator	0:bb348c97df44	3417	tmp = SYSCFG->MCHDLYCR;
lypinator	0:bb348c97df44	3418
lypinator	0:bb348c97df44	3419	if ((source == HAL_DFSDM1_CLKIN0_TIM4OC2) \|\| (source == HAL_DFSDM1_CLKIN2_TIM4OC2))
lypinator	0:bb348c97df44	3420	{
lypinator	0:bb348c97df44	3421	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CK02SEL);
lypinator	0:bb348c97df44	3422	}
lypinator	0:bb348c97df44	3423	else if ((source == HAL_DFSDM1_CLKIN1_TIM4OC1) \|\| (source == HAL_DFSDM1_CLKIN3_TIM4OC1))
lypinator	0:bb348c97df44	3424	{
lypinator	0:bb348c97df44	3425	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM1CK13SEL);
lypinator	0:bb348c97df44	3426	}
lypinator	0:bb348c97df44	3427	else if ((source == HAL_DFSDM2_CLKIN0_TIM3OC4) \|\| (source == HAL_DFSDM2_CLKIN4_TIM3OC4))
lypinator	0:bb348c97df44	3428	{
lypinator	0:bb348c97df44	3429	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK04SEL);
lypinator	0:bb348c97df44	3430	}
lypinator	0:bb348c97df44	3431	else if ((source == HAL_DFSDM2_CLKIN1_TIM3OC3) \|\| (source == HAL_DFSDM2_CLKIN5_TIM3OC3))
lypinator	0:bb348c97df44	3432	{
lypinator	0:bb348c97df44	3433	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK15SEL);
lypinator	0:bb348c97df44	3434
lypinator	0:bb348c97df44	3435	}else if ((source == HAL_DFSDM2_CLKIN2_TIM3OC2) \|\| (source == HAL_DFSDM2_CLKIN6_TIM3OC2))
lypinator	0:bb348c97df44	3436	{
lypinator	0:bb348c97df44	3437	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK26SEL);
lypinator	0:bb348c97df44	3438	}
lypinator	0:bb348c97df44	3439	else
lypinator	0:bb348c97df44	3440	{
lypinator	0:bb348c97df44	3441	tmp = (tmp & ~SYSCFG_MCHDLYCR_DFSDM2CK37SEL);
lypinator	0:bb348c97df44	3442	}
lypinator	0:bb348c97df44	3443
lypinator	0:bb348c97df44	3444	if((source == HAL_DFSDM1_CLKIN0_TIM4OC2) \|\|(source == HAL_DFSDM1_CLKIN1_TIM4OC1)\|\|
lypinator	0:bb348c97df44	3445	(source == HAL_DFSDM2_CLKIN0_TIM3OC4) \|\|(source == HAL_DFSDM2_CLKIN1_TIM3OC3)\|\|
lypinator	0:bb348c97df44	3446	(source == HAL_DFSDM2_CLKIN2_TIM3OC2) \|\|(source == HAL_DFSDM2_CLKIN3_TIM3OC1))
lypinator	0:bb348c97df44	3447	{
lypinator	0:bb348c97df44	3448	source = 0x0000U;
lypinator	0:bb348c97df44	3449	}
lypinator	0:bb348c97df44	3450
lypinator	0:bb348c97df44	3451	SYSCFG->MCHDLYCR = (source\|tmp);
lypinator	0:bb348c97df44	3452	}
lypinator	0:bb348c97df44	3453
lypinator	0:bb348c97df44	3454	/**
lypinator	0:bb348c97df44	3455	* @brief Configure multi channel delay block: Use DFSDM2 audio clock source as input
lypinator	0:bb348c97df44	3456	* clock for DFSDM1 and DFSDM2 filters to Synchronize DFSDMx filters.
lypinator	0:bb348c97df44	3457	* Set the path of the DFSDM2 clock output (dfsdm2_ckout) to the
lypinator	0:bb348c97df44	3458	* DFSDM1/2 CkInx and data inputs channels by configuring following MCHDLY muxes
lypinator	0:bb348c97df44	3459	* or demuxes: M1, M2, M3, M4, M5, M6, M7, M8, DM1, DM2, DM3, DM4, DM5, DM6,
lypinator	0:bb348c97df44	3460	* M9, M10, M11, M12, M13, M14, M15, M16, M17, M18, M19, M20 based on the
lypinator	0:bb348c97df44	3461	* contains of the DFSDM_MultiChannelConfigTypeDef structure
lypinator	0:bb348c97df44	3462	* @param mchdlystruct Structure of multi channel configuration
lypinator	0:bb348c97df44	3463	* @retval None
lypinator	0:bb348c97df44	3464	* @note The SYSCFG clock marco __HAL_RCC_SYSCFG_CLK_ENABLE() must be called
lypinator	0:bb348c97df44	3465	* before HAL_DFSDM_ConfigMultiChannelDelay()
lypinator	0:bb348c97df44	3466	* @note The HAL_DFSDM_ConfigMultiChannelDelay() function clears the SYSCFG-MCHDLYCR
lypinator	0:bb348c97df44	3467	* register before setting the new configuration.
lypinator	0:bb348c97df44	3468	*/
lypinator	0:bb348c97df44	3469	void HAL_DFSDM_ConfigMultiChannelDelay(DFSDM_MultiChannelConfigTypeDef* mchdlystruct)
lypinator	0:bb348c97df44	3470	{
lypinator	0:bb348c97df44	3471	uint32_t mchdlyreg = 0U;
lypinator	0:bb348c97df44	3472
lypinator	0:bb348c97df44	3473	assert_param(IS_DFSDM_DFSDM1_CLKOUT(mchdlystruct->DFSDM1ClockOut));
lypinator	0:bb348c97df44	3474	assert_param(IS_DFSDM_DFSDM2_CLKOUT(mchdlystruct->DFSDM2ClockOut));
lypinator	0:bb348c97df44	3475	assert_param(IS_DFSDM_DFSDM1_CLKIN(mchdlystruct->DFSDM1ClockIn));
lypinator	0:bb348c97df44	3476	assert_param(IS_DFSDM_DFSDM2_CLKIN(mchdlystruct->DFSDM2ClockIn));
lypinator	0:bb348c97df44	3477	assert_param(IS_DFSDM_DFSDM1_BIT_CLK((mchdlystruct->DFSDM1BitClkDistribution)));
lypinator	0:bb348c97df44	3478	assert_param(IS_DFSDM_DFSDM2_BIT_CLK(mchdlystruct->DFSDM2BitClkDistribution));
lypinator	0:bb348c97df44	3479	assert_param(IS_DFSDM_DFSDM1_DATA_DISTRIBUTION(mchdlystruct->DFSDM1DataDistribution));
lypinator	0:bb348c97df44	3480	assert_param(IS_DFSDM_DFSDM2_DATA_DISTRIBUTION(mchdlystruct->DFSDM2DataDistribution));
lypinator	0:bb348c97df44	3481
lypinator	0:bb348c97df44	3482	mchdlyreg = (SYSCFG->MCHDLYCR & 0x80103U);
lypinator	0:bb348c97df44	3483
lypinator	0:bb348c97df44	3484	SYSCFG->MCHDLYCR = (mchdlyreg \|(mchdlystruct->DFSDM1ClockOut)\|(mchdlystruct->DFSDM2ClockOut)\|
lypinator	0:bb348c97df44	3485	(mchdlystruct->DFSDM1ClockIn)\|(mchdlystruct->DFSDM2ClockIn)\|
lypinator	0:bb348c97df44	3486	(mchdlystruct->DFSDM1BitClkDistribution)\| (mchdlystruct->DFSDM2BitClkDistribution)\|
lypinator	0:bb348c97df44	3487	(mchdlystruct->DFSDM1DataDistribution)\| (mchdlystruct->DFSDM2DataDistribution));
lypinator	0:bb348c97df44	3488
lypinator	0:bb348c97df44	3489	}
lypinator	0:bb348c97df44	3490	#endif /* SYSCFG_MCHDLYCR_BSCKSEL */
lypinator	0:bb348c97df44	3491	/**
lypinator	0:bb348c97df44	3492	* @}
lypinator	0:bb348c97df44	3493	*/
lypinator	0:bb348c97df44	3494	/**
lypinator	0:bb348c97df44	3495	* @}
lypinator	0:bb348c97df44	3496	*/
lypinator	0:bb348c97df44	3497	/* End of exported functions -------------------------------------------------*/
lypinator	0:bb348c97df44	3498
lypinator	0:bb348c97df44	3499	/* Private functions ---------------------------------------------------------*/
lypinator	0:bb348c97df44	3500	/** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
lypinator	0:bb348c97df44	3501	* @{
lypinator	0:bb348c97df44	3502	*/
lypinator	0:bb348c97df44	3503
lypinator	0:bb348c97df44	3504	/**
lypinator	0:bb348c97df44	3505	* @brief DMA half transfer complete callback for regular conversion.
lypinator	0:bb348c97df44	3506	* @param hdma DMA handle.
lypinator	0:bb348c97df44	3507	* @retval None
lypinator	0:bb348c97df44	3508	*/
lypinator	0:bb348c97df44	3509	static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
lypinator	0:bb348c97df44	3510	{
lypinator	0:bb348c97df44	3511	/* Get DFSDM filter handle */
lypinator	0:bb348c97df44	3512	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
lypinator	0:bb348c97df44	3513
lypinator	0:bb348c97df44	3514	/* Call regular half conversion complete callback */
lypinator	0:bb348c97df44	3515	HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
lypinator	0:bb348c97df44	3516	}
lypinator	0:bb348c97df44	3517
lypinator	0:bb348c97df44	3518	/**
lypinator	0:bb348c97df44	3519	* @brief DMA transfer complete callback for regular conversion.
lypinator	0:bb348c97df44	3520	* @param hdma DMA handle.
lypinator	0:bb348c97df44	3521	* @retval None
lypinator	0:bb348c97df44	3522	*/
lypinator	0:bb348c97df44	3523	static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
lypinator	0:bb348c97df44	3524	{
lypinator	0:bb348c97df44	3525	/* Get DFSDM filter handle */
lypinator	0:bb348c97df44	3526	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
lypinator	0:bb348c97df44	3527
lypinator	0:bb348c97df44	3528	/* Call regular conversion complete callback */
lypinator	0:bb348c97df44	3529	HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
lypinator	0:bb348c97df44	3530	}
lypinator	0:bb348c97df44	3531
lypinator	0:bb348c97df44	3532	/**
lypinator	0:bb348c97df44	3533	* @brief DMA half transfer complete callback for injected conversion.
lypinator	0:bb348c97df44	3534	* @param hdma DMA handle.
lypinator	0:bb348c97df44	3535	* @retval None
lypinator	0:bb348c97df44	3536	*/
lypinator	0:bb348c97df44	3537	static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
lypinator	0:bb348c97df44	3538	{
lypinator	0:bb348c97df44	3539	/* Get DFSDM filter handle */
lypinator	0:bb348c97df44	3540	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
lypinator	0:bb348c97df44	3541
lypinator	0:bb348c97df44	3542	/* Call injected half conversion complete callback */
lypinator	0:bb348c97df44	3543	HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
lypinator	0:bb348c97df44	3544	}
lypinator	0:bb348c97df44	3545
lypinator	0:bb348c97df44	3546	/**
lypinator	0:bb348c97df44	3547	* @brief DMA transfer complete callback for injected conversion.
lypinator	0:bb348c97df44	3548	* @param hdma DMA handle.
lypinator	0:bb348c97df44	3549	* @retval None
lypinator	0:bb348c97df44	3550	*/
lypinator	0:bb348c97df44	3551	static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
lypinator	0:bb348c97df44	3552	{
lypinator	0:bb348c97df44	3553	/* Get DFSDM filter handle */
lypinator	0:bb348c97df44	3554	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
lypinator	0:bb348c97df44	3555
lypinator	0:bb348c97df44	3556	/* Call injected conversion complete callback */
lypinator	0:bb348c97df44	3557	HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
lypinator	0:bb348c97df44	3558	}
lypinator	0:bb348c97df44	3559
lypinator	0:bb348c97df44	3560	/**
lypinator	0:bb348c97df44	3561	* @brief DMA error callback.
lypinator	0:bb348c97df44	3562	* @param hdma DMA handle.
lypinator	0:bb348c97df44	3563	* @retval None
lypinator	0:bb348c97df44	3564	*/
lypinator	0:bb348c97df44	3565	static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
lypinator	0:bb348c97df44	3566	{
lypinator	0:bb348c97df44	3567	/* Get DFSDM filter handle */
lypinator	0:bb348c97df44	3568	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
lypinator	0:bb348c97df44	3569
lypinator	0:bb348c97df44	3570	/* Update error code */
lypinator	0:bb348c97df44	3571	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
lypinator	0:bb348c97df44	3572
lypinator	0:bb348c97df44	3573	/* Call error callback */
lypinator	0:bb348c97df44	3574	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
lypinator	0:bb348c97df44	3575	}
lypinator	0:bb348c97df44	3576
lypinator	0:bb348c97df44	3577	/**
lypinator	0:bb348c97df44	3578	* @brief This function allows to get the number of injected channels.
lypinator	0:bb348c97df44	3579	* @param Channels bitfield of injected channels.
lypinator	0:bb348c97df44	3580	* @retval Number of injected channels.
lypinator	0:bb348c97df44	3581	*/
lypinator	0:bb348c97df44	3582	static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
lypinator	0:bb348c97df44	3583	{
lypinator	0:bb348c97df44	3584	uint32_t nbChannels = 0U;
lypinator	0:bb348c97df44	3585	uint32_t tmp;
lypinator	0:bb348c97df44	3586
lypinator	0:bb348c97df44	3587	/* Get the number of channels from bitfield */
lypinator	0:bb348c97df44	3588	tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
lypinator	0:bb348c97df44	3589	while(tmp != 0U)
lypinator	0:bb348c97df44	3590	{
lypinator	0:bb348c97df44	3591	if((tmp & 1U) != 0U)
lypinator	0:bb348c97df44	3592	{
lypinator	0:bb348c97df44	3593	nbChannels++;
lypinator	0:bb348c97df44	3594	}
lypinator	0:bb348c97df44	3595	tmp = (uint32_t) (tmp >> 1U);
lypinator	0:bb348c97df44	3596	}
lypinator	0:bb348c97df44	3597	return nbChannels;
lypinator	0:bb348c97df44	3598	}
lypinator	0:bb348c97df44	3599
lypinator	0:bb348c97df44	3600	/**
lypinator	0:bb348c97df44	3601	* @brief This function allows to get the channel number from channel instance.
lypinator	0:bb348c97df44	3602	* @param Instance DFSDM channel instance.
lypinator	0:bb348c97df44	3603	* @retval Channel number.
lypinator	0:bb348c97df44	3604	*/
lypinator	0:bb348c97df44	3605	static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
lypinator	0:bb348c97df44	3606	{
lypinator	0:bb348c97df44	3607	uint32_t channel = 0xFFU;
lypinator	0:bb348c97df44	3608
lypinator	0:bb348c97df44	3609	/* Get channel from instance */
lypinator	0:bb348c97df44	3610	#if defined(DFSDM2_Channel0)
lypinator	0:bb348c97df44	3611	if((Instance == DFSDM1_Channel0) \|\| (Instance == DFSDM2_Channel0))
lypinator	0:bb348c97df44	3612	{
lypinator	0:bb348c97df44	3613	channel = 0U;
lypinator	0:bb348c97df44	3614	}
lypinator	0:bb348c97df44	3615	else if((Instance == DFSDM1_Channel1) \|\| (Instance == DFSDM2_Channel1))
lypinator	0:bb348c97df44	3616	{
lypinator	0:bb348c97df44	3617	channel = 1U;
lypinator	0:bb348c97df44	3618	}
lypinator	0:bb348c97df44	3619	else if((Instance == DFSDM1_Channel2) \|\| (Instance == DFSDM2_Channel2))
lypinator	0:bb348c97df44	3620	{
lypinator	0:bb348c97df44	3621	channel = 2U;
lypinator	0:bb348c97df44	3622	}
lypinator	0:bb348c97df44	3623	else if((Instance == DFSDM1_Channel3) \|\| (Instance == DFSDM2_Channel3))
lypinator	0:bb348c97df44	3624	{
lypinator	0:bb348c97df44	3625	channel = 3U;
lypinator	0:bb348c97df44	3626	}
lypinator	0:bb348c97df44	3627	else if(Instance == DFSDM2_Channel4)
lypinator	0:bb348c97df44	3628	{
lypinator	0:bb348c97df44	3629	channel = 4U;
lypinator	0:bb348c97df44	3630	}
lypinator	0:bb348c97df44	3631	else if(Instance == DFSDM2_Channel5)
lypinator	0:bb348c97df44	3632	{
lypinator	0:bb348c97df44	3633	channel = 5U;
lypinator	0:bb348c97df44	3634	}
lypinator	0:bb348c97df44	3635	else if(Instance == DFSDM2_Channel6)
lypinator	0:bb348c97df44	3636	{
lypinator	0:bb348c97df44	3637	channel = 6U;
lypinator	0:bb348c97df44	3638	}
lypinator	0:bb348c97df44	3639	else if(Instance == DFSDM2_Channel7)
lypinator	0:bb348c97df44	3640	{
lypinator	0:bb348c97df44	3641	channel = 7U;
lypinator	0:bb348c97df44	3642	}
lypinator	0:bb348c97df44	3643	#else
lypinator	0:bb348c97df44	3644	if(Instance == DFSDM1_Channel0)
lypinator	0:bb348c97df44	3645	{
lypinator	0:bb348c97df44	3646	channel = 0U;
lypinator	0:bb348c97df44	3647	}
lypinator	0:bb348c97df44	3648	else if(Instance == DFSDM1_Channel1)
lypinator	0:bb348c97df44	3649	{
lypinator	0:bb348c97df44	3650	channel = 1U;
lypinator	0:bb348c97df44	3651	}
lypinator	0:bb348c97df44	3652	else if(Instance == DFSDM1_Channel2)
lypinator	0:bb348c97df44	3653	{
lypinator	0:bb348c97df44	3654	channel = 2U;
lypinator	0:bb348c97df44	3655	}
lypinator	0:bb348c97df44	3656	else if(Instance == DFSDM1_Channel3)
lypinator	0:bb348c97df44	3657	{
lypinator	0:bb348c97df44	3658	channel = 3U;
lypinator	0:bb348c97df44	3659	}
lypinator	0:bb348c97df44	3660	#endif /* defined(DFSDM2_Channel0) */
lypinator	0:bb348c97df44	3661
lypinator	0:bb348c97df44	3662	return channel;
lypinator	0:bb348c97df44	3663	}
lypinator	0:bb348c97df44	3664
lypinator	0:bb348c97df44	3665	/**
lypinator	0:bb348c97df44	3666	* @brief This function allows to really start regular conversion.
lypinator	0:bb348c97df44	3667	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3668	* @retval None
lypinator	0:bb348c97df44	3669	*/
lypinator	0:bb348c97df44	3670	static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
lypinator	0:bb348c97df44	3671	{
lypinator	0:bb348c97df44	3672	/* Check regular trigger */
lypinator	0:bb348c97df44	3673	if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
lypinator	0:bb348c97df44	3674	{
lypinator	0:bb348c97df44	3675	/* Software start of regular conversion */
lypinator	0:bb348c97df44	3676	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSWSTART;
lypinator	0:bb348c97df44	3677	}
lypinator	0:bb348c97df44	3678	else /* synchronous trigger */
lypinator	0:bb348c97df44	3679	{
lypinator	0:bb348c97df44	3680	/* Disable DFSDM filter */
lypinator	0:bb348c97df44	3681	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
lypinator	0:bb348c97df44	3682
lypinator	0:bb348c97df44	3683	/* Set RSYNC bit in DFSDM_FLTCR1 register */
lypinator	0:bb348c97df44	3684	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSYNC;
lypinator	0:bb348c97df44	3685
lypinator	0:bb348c97df44	3686	/* Enable DFSDM filter */
lypinator	0:bb348c97df44	3687	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
lypinator	0:bb348c97df44	3688
lypinator	0:bb348c97df44	3689	/* If injected conversion was in progress, restart it */
lypinator	0:bb348c97df44	3690	if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
lypinator	0:bb348c97df44	3691	{
lypinator	0:bb348c97df44	3692	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
lypinator	0:bb348c97df44	3693	{
lypinator	0:bb348c97df44	3694	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSWSTART;
lypinator	0:bb348c97df44	3695	}
lypinator	0:bb348c97df44	3696	/* Update remaining injected conversions */
lypinator	0:bb348c97df44	3697	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
lypinator	0:bb348c97df44	3698	hdfsdm_filter->InjectedChannelsNbr : 1U;
lypinator	0:bb348c97df44	3699	}
lypinator	0:bb348c97df44	3700	}
lypinator	0:bb348c97df44	3701	/* Update DFSDM filter state */
lypinator	0:bb348c97df44	3702	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
lypinator	0:bb348c97df44	3703	HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
lypinator	0:bb348c97df44	3704	}
lypinator	0:bb348c97df44	3705
lypinator	0:bb348c97df44	3706	/**
lypinator	0:bb348c97df44	3707	* @brief This function allows to really stop regular conversion.
lypinator	0:bb348c97df44	3708	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3709	* @retval None
lypinator	0:bb348c97df44	3710	*/
lypinator	0:bb348c97df44	3711	static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
lypinator	0:bb348c97df44	3712	{
lypinator	0:bb348c97df44	3713	/* Disable DFSDM filter */
lypinator	0:bb348c97df44	3714	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
lypinator	0:bb348c97df44	3715
lypinator	0:bb348c97df44	3716	/* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
lypinator	0:bb348c97df44	3717	if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
lypinator	0:bb348c97df44	3718	{
lypinator	0:bb348c97df44	3719	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
lypinator	0:bb348c97df44	3720	}
lypinator	0:bb348c97df44	3721
lypinator	0:bb348c97df44	3722	/* Enable DFSDM filter */
lypinator	0:bb348c97df44	3723	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
lypinator	0:bb348c97df44	3724
lypinator	0:bb348c97df44	3725	/* If injected conversion was in progress, restart it */
lypinator	0:bb348c97df44	3726	if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
lypinator	0:bb348c97df44	3727	{
lypinator	0:bb348c97df44	3728	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
lypinator	0:bb348c97df44	3729	{
lypinator	0:bb348c97df44	3730	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSWSTART;
lypinator	0:bb348c97df44	3731	}
lypinator	0:bb348c97df44	3732	/* Update remaining injected conversions */
lypinator	0:bb348c97df44	3733	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
lypinator	0:bb348c97df44	3734	hdfsdm_filter->InjectedChannelsNbr : 1U;
lypinator	0:bb348c97df44	3735	}
lypinator	0:bb348c97df44	3736
lypinator	0:bb348c97df44	3737	/* Update DFSDM filter state */
lypinator	0:bb348c97df44	3738	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
lypinator	0:bb348c97df44	3739	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
lypinator	0:bb348c97df44	3740	}
lypinator	0:bb348c97df44	3741
lypinator	0:bb348c97df44	3742	/**
lypinator	0:bb348c97df44	3743	* @brief This function allows to really start injected conversion.
lypinator	0:bb348c97df44	3744	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3745	* @retval None
lypinator	0:bb348c97df44	3746	*/
lypinator	0:bb348c97df44	3747	static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
lypinator	0:bb348c97df44	3748	{
lypinator	0:bb348c97df44	3749	/* Check injected trigger */
lypinator	0:bb348c97df44	3750	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
lypinator	0:bb348c97df44	3751	{
lypinator	0:bb348c97df44	3752	/* Software start of injected conversion */
lypinator	0:bb348c97df44	3753	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSWSTART;
lypinator	0:bb348c97df44	3754	}
lypinator	0:bb348c97df44	3755	else /* external or synchronous trigger */
lypinator	0:bb348c97df44	3756	{
lypinator	0:bb348c97df44	3757	/* Disable DFSDM filter */
lypinator	0:bb348c97df44	3758	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
lypinator	0:bb348c97df44	3759
lypinator	0:bb348c97df44	3760	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
lypinator	0:bb348c97df44	3761	{
lypinator	0:bb348c97df44	3762	/* Set JSYNC bit in DFSDM_FLTCR1 register */
lypinator	0:bb348c97df44	3763	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSYNC;
lypinator	0:bb348c97df44	3764	}
lypinator	0:bb348c97df44	3765	else /* external trigger */
lypinator	0:bb348c97df44	3766	{
lypinator	0:bb348c97df44	3767	/* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
lypinator	0:bb348c97df44	3768	hdfsdm_filter->Instance->FLTCR1 \|= hdfsdm_filter->ExtTriggerEdge;
lypinator	0:bb348c97df44	3769	}
lypinator	0:bb348c97df44	3770
lypinator	0:bb348c97df44	3771	/* Enable DFSDM filter */
lypinator	0:bb348c97df44	3772	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
lypinator	0:bb348c97df44	3773
lypinator	0:bb348c97df44	3774	/* If regular conversion was in progress, restart it */
lypinator	0:bb348c97df44	3775	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
lypinator	0:bb348c97df44	3776	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
lypinator	0:bb348c97df44	3777	{
lypinator	0:bb348c97df44	3778	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSWSTART;
lypinator	0:bb348c97df44	3779	}
lypinator	0:bb348c97df44	3780	}
lypinator	0:bb348c97df44	3781	/* Update DFSDM filter state */
lypinator	0:bb348c97df44	3782	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
lypinator	0:bb348c97df44	3783	HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
lypinator	0:bb348c97df44	3784	}
lypinator	0:bb348c97df44	3785
lypinator	0:bb348c97df44	3786	/**
lypinator	0:bb348c97df44	3787	* @brief This function allows to really stop injected conversion.
lypinator	0:bb348c97df44	3788	* @param hdfsdm_filter DFSDM filter handle.
lypinator	0:bb348c97df44	3789	* @retval None
lypinator	0:bb348c97df44	3790	*/
lypinator	0:bb348c97df44	3791	static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
lypinator	0:bb348c97df44	3792	{
lypinator	0:bb348c97df44	3793	/* Disable DFSDM filter */
lypinator	0:bb348c97df44	3794	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
lypinator	0:bb348c97df44	3795
lypinator	0:bb348c97df44	3796	/* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
lypinator	0:bb348c97df44	3797	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
lypinator	0:bb348c97df44	3798	{
lypinator	0:bb348c97df44	3799	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
lypinator	0:bb348c97df44	3800	}
lypinator	0:bb348c97df44	3801	else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
lypinator	0:bb348c97df44	3802	{
lypinator	0:bb348c97df44	3803	/* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
lypinator	0:bb348c97df44	3804	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
lypinator	0:bb348c97df44	3805	}
lypinator	0:bb348c97df44	3806
lypinator	0:bb348c97df44	3807	/* Enable DFSDM filter */
lypinator	0:bb348c97df44	3808	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
lypinator	0:bb348c97df44	3809
lypinator	0:bb348c97df44	3810	/* If regular conversion was in progress, restart it */
lypinator	0:bb348c97df44	3811	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
lypinator	0:bb348c97df44	3812	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
lypinator	0:bb348c97df44	3813	{
lypinator	0:bb348c97df44	3814	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSWSTART;
lypinator	0:bb348c97df44	3815	}
lypinator	0:bb348c97df44	3816
lypinator	0:bb348c97df44	3817	/* Update remaining injected conversions */
lypinator	0:bb348c97df44	3818	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
lypinator	0:bb348c97df44	3819	hdfsdm_filter->InjectedChannelsNbr : 1U;
lypinator	0:bb348c97df44	3820
lypinator	0:bb348c97df44	3821	/* Update DFSDM filter state */
lypinator	0:bb348c97df44	3822	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
lypinator	0:bb348c97df44	3823	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
lypinator	0:bb348c97df44	3824	}
lypinator	0:bb348c97df44	3825	/**
lypinator	0:bb348c97df44	3826	* @}
lypinator	0:bb348c97df44	3827	*/
lypinator	0:bb348c97df44	3828	/* End of private functions --------------------------------------------------*/
lypinator	0:bb348c97df44	3829
lypinator	0:bb348c97df44	3830	/**
lypinator	0:bb348c97df44	3831	* @}
lypinator	0:bb348c97df44	3832	*/
lypinator	0:bb348c97df44	3833	#endif /* STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx \|\| STM32F413xx \|\| STM32F423xx */
lypinator	0:bb348c97df44	3834	#endif /* HAL_DFSDM_MODULE_ENABLED */
lypinator	0:bb348c97df44	3835	/**
lypinator	0:bb348c97df44	3836	* @}
lypinator	0:bb348c97df44	3837	*/
lypinator	0:bb348c97df44	3838
lypinator	0:bb348c97df44	3839	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	16 Sep 2020
Imports:	1
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	1
Followers:	1

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dfsdm.c@0:bb348c97df44, 2020-09-16 (annotated)

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