Initial commit

Dependencies:   FastPWM

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32f4xx_hal_cortex.c
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief CORTEX HAL module driver.
lypinator 0:bb348c97df44 6 * This file provides firmware functions to manage the following
lypinator 0:bb348c97df44 7 * functionalities of the CORTEX:
lypinator 0:bb348c97df44 8 * + Initialization and de-initialization functions
lypinator 0:bb348c97df44 9 * + Peripheral Control functions
lypinator 0:bb348c97df44 10 *
lypinator 0:bb348c97df44 11 @verbatim
lypinator 0:bb348c97df44 12 ==============================================================================
lypinator 0:bb348c97df44 13 ##### How to use this driver #####
lypinator 0:bb348c97df44 14 ==============================================================================
lypinator 0:bb348c97df44 15
lypinator 0:bb348c97df44 16 [..]
lypinator 0:bb348c97df44 17 *** How to configure Interrupts using CORTEX HAL driver ***
lypinator 0:bb348c97df44 18 ===========================================================
lypinator 0:bb348c97df44 19 [..]
lypinator 0:bb348c97df44 20 This section provides functions allowing to configure the NVIC interrupts (IRQ).
lypinator 0:bb348c97df44 21 The Cortex-M4 exceptions are managed by CMSIS functions.
lypinator 0:bb348c97df44 22
lypinator 0:bb348c97df44 23 (#) Configure the NVIC Priority Grouping using HAL_NVIC_SetPriorityGrouping()
lypinator 0:bb348c97df44 24 function according to the following table.
lypinator 0:bb348c97df44 25 (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority().
lypinator 0:bb348c97df44 26 (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ().
lypinator 0:bb348c97df44 27 (#) please refer to programming manual for details in how to configure priority.
lypinator 0:bb348c97df44 28
lypinator 0:bb348c97df44 29 -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ preemption is no more possible.
lypinator 0:bb348c97df44 30 The pending IRQ priority will be managed only by the sub priority.
lypinator 0:bb348c97df44 31
lypinator 0:bb348c97df44 32 -@- IRQ priority order (sorted by highest to lowest priority):
lypinator 0:bb348c97df44 33 (+@) Lowest preemption priority
lypinator 0:bb348c97df44 34 (+@) Lowest sub priority
lypinator 0:bb348c97df44 35 (+@) Lowest hardware priority (IRQ number)
lypinator 0:bb348c97df44 36
lypinator 0:bb348c97df44 37 [..]
lypinator 0:bb348c97df44 38 *** How to configure Systick using CORTEX HAL driver ***
lypinator 0:bb348c97df44 39 ========================================================
lypinator 0:bb348c97df44 40 [..]
lypinator 0:bb348c97df44 41 Setup SysTick Timer for time base.
lypinator 0:bb348c97df44 42
lypinator 0:bb348c97df44 43 (+) The HAL_SYSTICK_Config() function calls the SysTick_Config() function which
lypinator 0:bb348c97df44 44 is a CMSIS function that:
lypinator 0:bb348c97df44 45 (++) Configures the SysTick Reload register with value passed as function parameter.
lypinator 0:bb348c97df44 46 (++) Configures the SysTick IRQ priority to the lowest value 0x0F.
lypinator 0:bb348c97df44 47 (++) Resets the SysTick Counter register.
lypinator 0:bb348c97df44 48 (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK).
lypinator 0:bb348c97df44 49 (++) Enables the SysTick Interrupt.
lypinator 0:bb348c97df44 50 (++) Starts the SysTick Counter.
lypinator 0:bb348c97df44 51
lypinator 0:bb348c97df44 52 (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro
lypinator 0:bb348c97df44 53 __HAL_CORTEX_SYSTICKCLK_CONFIG(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the
lypinator 0:bb348c97df44 54 HAL_SYSTICK_Config() function call. The __HAL_CORTEX_SYSTICKCLK_CONFIG() macro is defined
lypinator 0:bb348c97df44 55 inside the stm32f4xx_hal_cortex.h file.
lypinator 0:bb348c97df44 56
lypinator 0:bb348c97df44 57 (+) You can change the SysTick IRQ priority by calling the
lypinator 0:bb348c97df44 58 HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function
lypinator 0:bb348c97df44 59 call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS function.
lypinator 0:bb348c97df44 60
lypinator 0:bb348c97df44 61 (+) To adjust the SysTick time base, use the following formula:
lypinator 0:bb348c97df44 62
lypinator 0:bb348c97df44 63 Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s)
lypinator 0:bb348c97df44 64 (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function
lypinator 0:bb348c97df44 65 (++) Reload Value should not exceed 0xFFFFFF
lypinator 0:bb348c97df44 66
lypinator 0:bb348c97df44 67 @endverbatim
lypinator 0:bb348c97df44 68 ******************************************************************************
lypinator 0:bb348c97df44 69 * @attention
lypinator 0:bb348c97df44 70 *
lypinator 0:bb348c97df44 71 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 72 *
lypinator 0:bb348c97df44 73 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 74 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 75 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 76 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 77 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 78 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 79 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 80 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 81 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 82 * without specific prior written permission.
lypinator 0:bb348c97df44 83 *
lypinator 0:bb348c97df44 84 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 85 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 86 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 87 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 88 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 89 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 90 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 91 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 92 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 93 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 94 *
lypinator 0:bb348c97df44 95 ******************************************************************************
lypinator 0:bb348c97df44 96 */
lypinator 0:bb348c97df44 97
lypinator 0:bb348c97df44 98 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 99 #include "stm32f4xx_hal.h"
lypinator 0:bb348c97df44 100
lypinator 0:bb348c97df44 101 /** @addtogroup STM32F4xx_HAL_Driver
lypinator 0:bb348c97df44 102 * @{
lypinator 0:bb348c97df44 103 */
lypinator 0:bb348c97df44 104
lypinator 0:bb348c97df44 105 /** @defgroup CORTEX CORTEX
lypinator 0:bb348c97df44 106 * @brief CORTEX HAL module driver
lypinator 0:bb348c97df44 107 * @{
lypinator 0:bb348c97df44 108 */
lypinator 0:bb348c97df44 109
lypinator 0:bb348c97df44 110 #ifdef HAL_CORTEX_MODULE_ENABLED
lypinator 0:bb348c97df44 111
lypinator 0:bb348c97df44 112 /* Private types -------------------------------------------------------------*/
lypinator 0:bb348c97df44 113 /* Private variables ---------------------------------------------------------*/
lypinator 0:bb348c97df44 114 /* Private constants ---------------------------------------------------------*/
lypinator 0:bb348c97df44 115 /* Private macros ------------------------------------------------------------*/
lypinator 0:bb348c97df44 116 /* Private functions ---------------------------------------------------------*/
lypinator 0:bb348c97df44 117 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 118
lypinator 0:bb348c97df44 119 /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
lypinator 0:bb348c97df44 120 * @{
lypinator 0:bb348c97df44 121 */
lypinator 0:bb348c97df44 122
lypinator 0:bb348c97df44 123
lypinator 0:bb348c97df44 124 /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions
lypinator 0:bb348c97df44 125 * @brief Initialization and Configuration functions
lypinator 0:bb348c97df44 126 *
lypinator 0:bb348c97df44 127 @verbatim
lypinator 0:bb348c97df44 128 ==============================================================================
lypinator 0:bb348c97df44 129 ##### Initialization and de-initialization functions #####
lypinator 0:bb348c97df44 130 ==============================================================================
lypinator 0:bb348c97df44 131 [..]
lypinator 0:bb348c97df44 132 This section provides the CORTEX HAL driver functions allowing to configure Interrupts
lypinator 0:bb348c97df44 133 Systick functionalities
lypinator 0:bb348c97df44 134
lypinator 0:bb348c97df44 135 @endverbatim
lypinator 0:bb348c97df44 136 * @{
lypinator 0:bb348c97df44 137 */
lypinator 0:bb348c97df44 138
lypinator 0:bb348c97df44 139
lypinator 0:bb348c97df44 140 /**
lypinator 0:bb348c97df44 141 * @brief Sets the priority grouping field (preemption priority and subpriority)
lypinator 0:bb348c97df44 142 * using the required unlock sequence.
lypinator 0:bb348c97df44 143 * @param PriorityGroup The priority grouping bits length.
lypinator 0:bb348c97df44 144 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 145 * @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
lypinator 0:bb348c97df44 146 * 4 bits for subpriority
lypinator 0:bb348c97df44 147 * @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
lypinator 0:bb348c97df44 148 * 3 bits for subpriority
lypinator 0:bb348c97df44 149 * @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
lypinator 0:bb348c97df44 150 * 2 bits for subpriority
lypinator 0:bb348c97df44 151 * @arg NVIC_PRIORITYGROUP_3: 3 bits for preemption priority
lypinator 0:bb348c97df44 152 * 1 bits for subpriority
lypinator 0:bb348c97df44 153 * @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
lypinator 0:bb348c97df44 154 * 0 bits for subpriority
lypinator 0:bb348c97df44 155 * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
lypinator 0:bb348c97df44 156 * The pending IRQ priority will be managed only by the subpriority.
lypinator 0:bb348c97df44 157 * @retval None
lypinator 0:bb348c97df44 158 */
lypinator 0:bb348c97df44 159 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
lypinator 0:bb348c97df44 160 {
lypinator 0:bb348c97df44 161 /* Check the parameters */
lypinator 0:bb348c97df44 162 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
lypinator 0:bb348c97df44 163
lypinator 0:bb348c97df44 164 /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
lypinator 0:bb348c97df44 165 NVIC_SetPriorityGrouping(PriorityGroup);
lypinator 0:bb348c97df44 166 }
lypinator 0:bb348c97df44 167
lypinator 0:bb348c97df44 168 /**
lypinator 0:bb348c97df44 169 * @brief Sets the priority of an interrupt.
lypinator 0:bb348c97df44 170 * @param IRQn External interrupt number.
lypinator 0:bb348c97df44 171 * This parameter can be an enumerator of IRQn_Type enumeration
lypinator 0:bb348c97df44 172 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
lypinator 0:bb348c97df44 173 * @param PreemptPriority The preemption priority for the IRQn channel.
lypinator 0:bb348c97df44 174 * This parameter can be a value between 0 and 15
lypinator 0:bb348c97df44 175 * A lower priority value indicates a higher priority
lypinator 0:bb348c97df44 176 * @param SubPriority the subpriority level for the IRQ channel.
lypinator 0:bb348c97df44 177 * This parameter can be a value between 0 and 15
lypinator 0:bb348c97df44 178 * A lower priority value indicates a higher priority.
lypinator 0:bb348c97df44 179 * @retval None
lypinator 0:bb348c97df44 180 */
lypinator 0:bb348c97df44 181 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
lypinator 0:bb348c97df44 182 {
lypinator 0:bb348c97df44 183 uint32_t prioritygroup = 0x00U;
lypinator 0:bb348c97df44 184
lypinator 0:bb348c97df44 185 /* Check the parameters */
lypinator 0:bb348c97df44 186 assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
lypinator 0:bb348c97df44 187 assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
lypinator 0:bb348c97df44 188
lypinator 0:bb348c97df44 189 prioritygroup = NVIC_GetPriorityGrouping();
lypinator 0:bb348c97df44 190
lypinator 0:bb348c97df44 191 NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
lypinator 0:bb348c97df44 192 }
lypinator 0:bb348c97df44 193
lypinator 0:bb348c97df44 194 /**
lypinator 0:bb348c97df44 195 * @brief Enables a device specific interrupt in the NVIC interrupt controller.
lypinator 0:bb348c97df44 196 * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
lypinator 0:bb348c97df44 197 * function should be called before.
lypinator 0:bb348c97df44 198 * @param IRQn External interrupt number.
lypinator 0:bb348c97df44 199 * This parameter can be an enumerator of IRQn_Type enumeration
lypinator 0:bb348c97df44 200 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
lypinator 0:bb348c97df44 201 * @retval None
lypinator 0:bb348c97df44 202 */
lypinator 0:bb348c97df44 203 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
lypinator 0:bb348c97df44 204 {
lypinator 0:bb348c97df44 205 /* Check the parameters */
lypinator 0:bb348c97df44 206 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
lypinator 0:bb348c97df44 207
lypinator 0:bb348c97df44 208 /* Enable interrupt */
lypinator 0:bb348c97df44 209 NVIC_EnableIRQ(IRQn);
lypinator 0:bb348c97df44 210 }
lypinator 0:bb348c97df44 211
lypinator 0:bb348c97df44 212 /**
lypinator 0:bb348c97df44 213 * @brief Disables a device specific interrupt in the NVIC interrupt controller.
lypinator 0:bb348c97df44 214 * @param IRQn External interrupt number.
lypinator 0:bb348c97df44 215 * This parameter can be an enumerator of IRQn_Type enumeration
lypinator 0:bb348c97df44 216 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
lypinator 0:bb348c97df44 217 * @retval None
lypinator 0:bb348c97df44 218 */
lypinator 0:bb348c97df44 219 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
lypinator 0:bb348c97df44 220 {
lypinator 0:bb348c97df44 221 /* Check the parameters */
lypinator 0:bb348c97df44 222 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
lypinator 0:bb348c97df44 223
lypinator 0:bb348c97df44 224 /* Disable interrupt */
lypinator 0:bb348c97df44 225 NVIC_DisableIRQ(IRQn);
lypinator 0:bb348c97df44 226 }
lypinator 0:bb348c97df44 227
lypinator 0:bb348c97df44 228 /**
lypinator 0:bb348c97df44 229 * @brief Initiates a system reset request to reset the MCU.
lypinator 0:bb348c97df44 230 * @retval None
lypinator 0:bb348c97df44 231 */
lypinator 0:bb348c97df44 232 void HAL_NVIC_SystemReset(void)
lypinator 0:bb348c97df44 233 {
lypinator 0:bb348c97df44 234 /* System Reset */
lypinator 0:bb348c97df44 235 NVIC_SystemReset();
lypinator 0:bb348c97df44 236 }
lypinator 0:bb348c97df44 237
lypinator 0:bb348c97df44 238 /**
lypinator 0:bb348c97df44 239 * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer.
lypinator 0:bb348c97df44 240 * Counter is in free running mode to generate periodic interrupts.
lypinator 0:bb348c97df44 241 * @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
lypinator 0:bb348c97df44 242 * @retval status: - 0 Function succeeded.
lypinator 0:bb348c97df44 243 * - 1 Function failed.
lypinator 0:bb348c97df44 244 */
lypinator 0:bb348c97df44 245 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
lypinator 0:bb348c97df44 246 {
lypinator 0:bb348c97df44 247 return SysTick_Config(TicksNumb);
lypinator 0:bb348c97df44 248 }
lypinator 0:bb348c97df44 249 /**
lypinator 0:bb348c97df44 250 * @}
lypinator 0:bb348c97df44 251 */
lypinator 0:bb348c97df44 252
lypinator 0:bb348c97df44 253 /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
lypinator 0:bb348c97df44 254 * @brief Cortex control functions
lypinator 0:bb348c97df44 255 *
lypinator 0:bb348c97df44 256 @verbatim
lypinator 0:bb348c97df44 257 ==============================================================================
lypinator 0:bb348c97df44 258 ##### Peripheral Control functions #####
lypinator 0:bb348c97df44 259 ==============================================================================
lypinator 0:bb348c97df44 260 [..]
lypinator 0:bb348c97df44 261 This subsection provides a set of functions allowing to control the CORTEX
lypinator 0:bb348c97df44 262 (NVIC, SYSTICK, MPU) functionalities.
lypinator 0:bb348c97df44 263
lypinator 0:bb348c97df44 264
lypinator 0:bb348c97df44 265 @endverbatim
lypinator 0:bb348c97df44 266 * @{
lypinator 0:bb348c97df44 267 */
lypinator 0:bb348c97df44 268
lypinator 0:bb348c97df44 269 #if (__MPU_PRESENT == 1U)
lypinator 0:bb348c97df44 270 /**
lypinator 0:bb348c97df44 271 * @brief Disables the MPU
lypinator 0:bb348c97df44 272 * @retval None
lypinator 0:bb348c97df44 273 */
lypinator 0:bb348c97df44 274 void HAL_MPU_Disable(void)
lypinator 0:bb348c97df44 275 {
lypinator 0:bb348c97df44 276 /* Make sure outstanding transfers are done */
lypinator 0:bb348c97df44 277 __DMB();
lypinator 0:bb348c97df44 278
lypinator 0:bb348c97df44 279 /* Disable fault exceptions */
lypinator 0:bb348c97df44 280 SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
lypinator 0:bb348c97df44 281
lypinator 0:bb348c97df44 282 /* Disable the MPU and clear the control register*/
lypinator 0:bb348c97df44 283 MPU->CTRL = 0U;
lypinator 0:bb348c97df44 284 }
lypinator 0:bb348c97df44 285
lypinator 0:bb348c97df44 286 /**
lypinator 0:bb348c97df44 287 * @brief Enable the MPU.
lypinator 0:bb348c97df44 288 * @param MPU_Control Specifies the control mode of the MPU during hard fault,
lypinator 0:bb348c97df44 289 * NMI, FAULTMASK and privileged access to the default memory
lypinator 0:bb348c97df44 290 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 291 * @arg MPU_HFNMI_PRIVDEF_NONE
lypinator 0:bb348c97df44 292 * @arg MPU_HARDFAULT_NMI
lypinator 0:bb348c97df44 293 * @arg MPU_PRIVILEGED_DEFAULT
lypinator 0:bb348c97df44 294 * @arg MPU_HFNMI_PRIVDEF
lypinator 0:bb348c97df44 295 * @retval None
lypinator 0:bb348c97df44 296 */
lypinator 0:bb348c97df44 297 void HAL_MPU_Enable(uint32_t MPU_Control)
lypinator 0:bb348c97df44 298 {
lypinator 0:bb348c97df44 299 /* Enable the MPU */
lypinator 0:bb348c97df44 300 MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
lypinator 0:bb348c97df44 301
lypinator 0:bb348c97df44 302 /* Enable fault exceptions */
lypinator 0:bb348c97df44 303 SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
lypinator 0:bb348c97df44 304
lypinator 0:bb348c97df44 305 /* Ensure MPU setting take effects */
lypinator 0:bb348c97df44 306 __DSB();
lypinator 0:bb348c97df44 307 __ISB();
lypinator 0:bb348c97df44 308 }
lypinator 0:bb348c97df44 309
lypinator 0:bb348c97df44 310 /**
lypinator 0:bb348c97df44 311 * @brief Initializes and configures the Region and the memory to be protected.
lypinator 0:bb348c97df44 312 * @param MPU_Init Pointer to a MPU_Region_InitTypeDef structure that contains
lypinator 0:bb348c97df44 313 * the initialization and configuration information.
lypinator 0:bb348c97df44 314 * @retval None
lypinator 0:bb348c97df44 315 */
lypinator 0:bb348c97df44 316 void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init)
lypinator 0:bb348c97df44 317 {
lypinator 0:bb348c97df44 318 /* Check the parameters */
lypinator 0:bb348c97df44 319 assert_param(IS_MPU_REGION_NUMBER(MPU_Init->Number));
lypinator 0:bb348c97df44 320 assert_param(IS_MPU_REGION_ENABLE(MPU_Init->Enable));
lypinator 0:bb348c97df44 321
lypinator 0:bb348c97df44 322 /* Set the Region number */
lypinator 0:bb348c97df44 323 MPU->RNR = MPU_Init->Number;
lypinator 0:bb348c97df44 324
lypinator 0:bb348c97df44 325 if ((MPU_Init->Enable) != RESET)
lypinator 0:bb348c97df44 326 {
lypinator 0:bb348c97df44 327 /* Check the parameters */
lypinator 0:bb348c97df44 328 assert_param(IS_MPU_INSTRUCTION_ACCESS(MPU_Init->DisableExec));
lypinator 0:bb348c97df44 329 assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
lypinator 0:bb348c97df44 330 assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
lypinator 0:bb348c97df44 331 assert_param(IS_MPU_ACCESS_SHAREABLE(MPU_Init->IsShareable));
lypinator 0:bb348c97df44 332 assert_param(IS_MPU_ACCESS_CACHEABLE(MPU_Init->IsCacheable));
lypinator 0:bb348c97df44 333 assert_param(IS_MPU_ACCESS_BUFFERABLE(MPU_Init->IsBufferable));
lypinator 0:bb348c97df44 334 assert_param(IS_MPU_SUB_REGION_DISABLE(MPU_Init->SubRegionDisable));
lypinator 0:bb348c97df44 335 assert_param(IS_MPU_REGION_SIZE(MPU_Init->Size));
lypinator 0:bb348c97df44 336
lypinator 0:bb348c97df44 337 MPU->RBAR = MPU_Init->BaseAddress;
lypinator 0:bb348c97df44 338 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) |
lypinator 0:bb348c97df44 339 ((uint32_t)MPU_Init->AccessPermission << MPU_RASR_AP_Pos) |
lypinator 0:bb348c97df44 340 ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
lypinator 0:bb348c97df44 341 ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
lypinator 0:bb348c97df44 342 ((uint32_t)MPU_Init->IsCacheable << MPU_RASR_C_Pos) |
lypinator 0:bb348c97df44 343 ((uint32_t)MPU_Init->IsBufferable << MPU_RASR_B_Pos) |
lypinator 0:bb348c97df44 344 ((uint32_t)MPU_Init->SubRegionDisable << MPU_RASR_SRD_Pos) |
lypinator 0:bb348c97df44 345 ((uint32_t)MPU_Init->Size << MPU_RASR_SIZE_Pos) |
lypinator 0:bb348c97df44 346 ((uint32_t)MPU_Init->Enable << MPU_RASR_ENABLE_Pos);
lypinator 0:bb348c97df44 347 }
lypinator 0:bb348c97df44 348 else
lypinator 0:bb348c97df44 349 {
lypinator 0:bb348c97df44 350 MPU->RBAR = 0x00U;
lypinator 0:bb348c97df44 351 MPU->RASR = 0x00U;
lypinator 0:bb348c97df44 352 }
lypinator 0:bb348c97df44 353 }
lypinator 0:bb348c97df44 354 #endif /* __MPU_PRESENT */
lypinator 0:bb348c97df44 355
lypinator 0:bb348c97df44 356 /**
lypinator 0:bb348c97df44 357 * @brief Gets the priority grouping field from the NVIC Interrupt Controller.
lypinator 0:bb348c97df44 358 * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
lypinator 0:bb348c97df44 359 */
lypinator 0:bb348c97df44 360 uint32_t HAL_NVIC_GetPriorityGrouping(void)
lypinator 0:bb348c97df44 361 {
lypinator 0:bb348c97df44 362 /* Get the PRIGROUP[10:8] field value */
lypinator 0:bb348c97df44 363 return NVIC_GetPriorityGrouping();
lypinator 0:bb348c97df44 364 }
lypinator 0:bb348c97df44 365
lypinator 0:bb348c97df44 366 /**
lypinator 0:bb348c97df44 367 * @brief Gets the priority of an interrupt.
lypinator 0:bb348c97df44 368 * @param IRQn External interrupt number.
lypinator 0:bb348c97df44 369 * This parameter can be an enumerator of IRQn_Type enumeration
lypinator 0:bb348c97df44 370 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
lypinator 0:bb348c97df44 371 * @param PriorityGroup the priority grouping bits length.
lypinator 0:bb348c97df44 372 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 373 * @arg NVIC_PRIORITYGROUP_0: 0 bits for preemption priority
lypinator 0:bb348c97df44 374 * 4 bits for subpriority
lypinator 0:bb348c97df44 375 * @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
lypinator 0:bb348c97df44 376 * 3 bits for subpriority
lypinator 0:bb348c97df44 377 * @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
lypinator 0:bb348c97df44 378 * 2 bits for subpriority
lypinator 0:bb348c97df44 379 * @arg NVIC_PRIORITYGROUP_3: 3 bits for preemption priority
lypinator 0:bb348c97df44 380 * 1 bits for subpriority
lypinator 0:bb348c97df44 381 * @arg NVIC_PRIORITYGROUP_4: 4 bits for preemption priority
lypinator 0:bb348c97df44 382 * 0 bits for subpriority
lypinator 0:bb348c97df44 383 * @param pPreemptPriority Pointer on the Preemptive priority value (starting from 0).
lypinator 0:bb348c97df44 384 * @param pSubPriority Pointer on the Subpriority value (starting from 0).
lypinator 0:bb348c97df44 385 * @retval None
lypinator 0:bb348c97df44 386 */
lypinator 0:bb348c97df44 387 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
lypinator 0:bb348c97df44 388 {
lypinator 0:bb348c97df44 389 /* Check the parameters */
lypinator 0:bb348c97df44 390 assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
lypinator 0:bb348c97df44 391 /* Get priority for Cortex-M system or device specific interrupts */
lypinator 0:bb348c97df44 392 NVIC_DecodePriority(NVIC_GetPriority(IRQn), PriorityGroup, pPreemptPriority, pSubPriority);
lypinator 0:bb348c97df44 393 }
lypinator 0:bb348c97df44 394
lypinator 0:bb348c97df44 395 /**
lypinator 0:bb348c97df44 396 * @brief Sets Pending bit of an external interrupt.
lypinator 0:bb348c97df44 397 * @param IRQn External interrupt number
lypinator 0:bb348c97df44 398 * This parameter can be an enumerator of IRQn_Type enumeration
lypinator 0:bb348c97df44 399 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
lypinator 0:bb348c97df44 400 * @retval None
lypinator 0:bb348c97df44 401 */
lypinator 0:bb348c97df44 402 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
lypinator 0:bb348c97df44 403 {
lypinator 0:bb348c97df44 404 /* Check the parameters */
lypinator 0:bb348c97df44 405 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
lypinator 0:bb348c97df44 406
lypinator 0:bb348c97df44 407 /* Set interrupt pending */
lypinator 0:bb348c97df44 408 NVIC_SetPendingIRQ(IRQn);
lypinator 0:bb348c97df44 409 }
lypinator 0:bb348c97df44 410
lypinator 0:bb348c97df44 411 /**
lypinator 0:bb348c97df44 412 * @brief Gets Pending Interrupt (reads the pending register in the NVIC
lypinator 0:bb348c97df44 413 * and returns the pending bit for the specified interrupt).
lypinator 0:bb348c97df44 414 * @param IRQn External interrupt number.
lypinator 0:bb348c97df44 415 * This parameter can be an enumerator of IRQn_Type enumeration
lypinator 0:bb348c97df44 416 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
lypinator 0:bb348c97df44 417 * @retval status: - 0 Interrupt status is not pending.
lypinator 0:bb348c97df44 418 * - 1 Interrupt status is pending.
lypinator 0:bb348c97df44 419 */
lypinator 0:bb348c97df44 420 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
lypinator 0:bb348c97df44 421 {
lypinator 0:bb348c97df44 422 /* Check the parameters */
lypinator 0:bb348c97df44 423 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
lypinator 0:bb348c97df44 424
lypinator 0:bb348c97df44 425 /* Return 1 if pending else 0 */
lypinator 0:bb348c97df44 426 return NVIC_GetPendingIRQ(IRQn);
lypinator 0:bb348c97df44 427 }
lypinator 0:bb348c97df44 428
lypinator 0:bb348c97df44 429 /**
lypinator 0:bb348c97df44 430 * @brief Clears the pending bit of an external interrupt.
lypinator 0:bb348c97df44 431 * @param IRQn External interrupt number.
lypinator 0:bb348c97df44 432 * This parameter can be an enumerator of IRQn_Type enumeration
lypinator 0:bb348c97df44 433 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
lypinator 0:bb348c97df44 434 * @retval None
lypinator 0:bb348c97df44 435 */
lypinator 0:bb348c97df44 436 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
lypinator 0:bb348c97df44 437 {
lypinator 0:bb348c97df44 438 /* Check the parameters */
lypinator 0:bb348c97df44 439 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
lypinator 0:bb348c97df44 440
lypinator 0:bb348c97df44 441 /* Clear pending interrupt */
lypinator 0:bb348c97df44 442 NVIC_ClearPendingIRQ(IRQn);
lypinator 0:bb348c97df44 443 }
lypinator 0:bb348c97df44 444
lypinator 0:bb348c97df44 445 /**
lypinator 0:bb348c97df44 446 * @brief Gets active interrupt ( reads the active register in NVIC and returns the active bit).
lypinator 0:bb348c97df44 447 * @param IRQn External interrupt number
lypinator 0:bb348c97df44 448 * This parameter can be an enumerator of IRQn_Type enumeration
lypinator 0:bb348c97df44 449 * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
lypinator 0:bb348c97df44 450 * @retval status: - 0 Interrupt status is not pending.
lypinator 0:bb348c97df44 451 * - 1 Interrupt status is pending.
lypinator 0:bb348c97df44 452 */
lypinator 0:bb348c97df44 453 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
lypinator 0:bb348c97df44 454 {
lypinator 0:bb348c97df44 455 /* Check the parameters */
lypinator 0:bb348c97df44 456 assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
lypinator 0:bb348c97df44 457
lypinator 0:bb348c97df44 458 /* Return 1 if active else 0 */
lypinator 0:bb348c97df44 459 return NVIC_GetActive(IRQn);
lypinator 0:bb348c97df44 460 }
lypinator 0:bb348c97df44 461
lypinator 0:bb348c97df44 462 /**
lypinator 0:bb348c97df44 463 * @brief Configures the SysTick clock source.
lypinator 0:bb348c97df44 464 * @param CLKSource specifies the SysTick clock source.
lypinator 0:bb348c97df44 465 * This parameter can be one of the following values:
lypinator 0:bb348c97df44 466 * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock source.
lypinator 0:bb348c97df44 467 * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source.
lypinator 0:bb348c97df44 468 * @retval None
lypinator 0:bb348c97df44 469 */
lypinator 0:bb348c97df44 470 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
lypinator 0:bb348c97df44 471 {
lypinator 0:bb348c97df44 472 /* Check the parameters */
lypinator 0:bb348c97df44 473 assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource));
lypinator 0:bb348c97df44 474 if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
lypinator 0:bb348c97df44 475 {
lypinator 0:bb348c97df44 476 SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK;
lypinator 0:bb348c97df44 477 }
lypinator 0:bb348c97df44 478 else
lypinator 0:bb348c97df44 479 {
lypinator 0:bb348c97df44 480 SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK;
lypinator 0:bb348c97df44 481 }
lypinator 0:bb348c97df44 482 }
lypinator 0:bb348c97df44 483
lypinator 0:bb348c97df44 484 /**
lypinator 0:bb348c97df44 485 * @brief This function handles SYSTICK interrupt request.
lypinator 0:bb348c97df44 486 * @retval None
lypinator 0:bb348c97df44 487 */
lypinator 0:bb348c97df44 488 void HAL_SYSTICK_IRQHandler(void)
lypinator 0:bb348c97df44 489 {
lypinator 0:bb348c97df44 490 HAL_SYSTICK_Callback();
lypinator 0:bb348c97df44 491 }
lypinator 0:bb348c97df44 492
lypinator 0:bb348c97df44 493 /**
lypinator 0:bb348c97df44 494 * @brief SYSTICK callback.
lypinator 0:bb348c97df44 495 * @retval None
lypinator 0:bb348c97df44 496 */
lypinator 0:bb348c97df44 497 __weak void HAL_SYSTICK_Callback(void)
lypinator 0:bb348c97df44 498 {
lypinator 0:bb348c97df44 499 /* NOTE : This function Should not be modified, when the callback is needed,
lypinator 0:bb348c97df44 500 the HAL_SYSTICK_Callback could be implemented in the user file
lypinator 0:bb348c97df44 501 */
lypinator 0:bb348c97df44 502 }
lypinator 0:bb348c97df44 503
lypinator 0:bb348c97df44 504 /**
lypinator 0:bb348c97df44 505 * @}
lypinator 0:bb348c97df44 506 */
lypinator 0:bb348c97df44 507
lypinator 0:bb348c97df44 508 /**
lypinator 0:bb348c97df44 509 * @}
lypinator 0:bb348c97df44 510 */
lypinator 0:bb348c97df44 511
lypinator 0:bb348c97df44 512 #endif /* HAL_CORTEX_MODULE_ENABLED */
lypinator 0:bb348c97df44 513 /**
lypinator 0:bb348c97df44 514 * @}
lypinator 0:bb348c97df44 515 */
lypinator 0:bb348c97df44 516
lypinator 0:bb348c97df44 517 /**
lypinator 0:bb348c97df44 518 * @}
lypinator 0:bb348c97df44 519 */
lypinator 0:bb348c97df44 520
lypinator 0:bb348c97df44 521 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/