DevLibMemoryController - Initial commit

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Initial commit

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:: lypinator
Date:: Wed Sep 16 01:11:49 2020 +0000
Revision:: 0:bb348c97df44

Added PWM

Who changed what in which revision?

User	Revision	Line number	New contents of line
lypinator	0:bb348c97df44	1	/**
lypinator	0:bb348c97df44	2	******************************************************************************
lypinator	0:bb348c97df44	3	* @file stm32f4xx_hal_adc.c
lypinator	0:bb348c97df44	4	* @author MCD Application Team
lypinator	0:bb348c97df44	5	* @brief This file provides firmware functions to manage the following
lypinator	0:bb348c97df44	6	* functionalities of the Analog to Digital Convertor (ADC) peripheral:
lypinator	0:bb348c97df44	7	* + Initialization and de-initialization functions
lypinator	0:bb348c97df44	8	* + IO operation functions
lypinator	0:bb348c97df44	9	* + State and errors functions
lypinator	0:bb348c97df44	10	*
lypinator	0:bb348c97df44	11	@verbatim
lypinator	0:bb348c97df44	12	==============================================================================
lypinator	0:bb348c97df44	13	##### ADC Peripheral features #####
lypinator	0:bb348c97df44	14	==============================================================================
lypinator	0:bb348c97df44	15	[..]
lypinator	0:bb348c97df44	16	(#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution.
lypinator	0:bb348c97df44	17	(#) Interrupt generation at the end of conversion, end of injected conversion,
lypinator	0:bb348c97df44	18	and in case of analog watchdog or overrun events
lypinator	0:bb348c97df44	19	(#) Single and continuous conversion modes.
lypinator	0:bb348c97df44	20	(#) Scan mode for automatic conversion of channel 0 to channel x.
lypinator	0:bb348c97df44	21	(#) Data alignment with in-built data coherency.
lypinator	0:bb348c97df44	22	(#) Channel-wise programmable sampling time.
lypinator	0:bb348c97df44	23	(#) External trigger option with configurable polarity for both regular and
lypinator	0:bb348c97df44	24	injected conversion.
lypinator	0:bb348c97df44	25	(#) Dual/Triple mode (on devices with 2 ADCs or more).
lypinator	0:bb348c97df44	26	(#) Configurable DMA data storage in Dual/Triple ADC mode.
lypinator	0:bb348c97df44	27	(#) Configurable delay between conversions in Dual/Triple interleaved mode.
lypinator	0:bb348c97df44	28	(#) ADC conversion type (refer to the datasheets).
lypinator	0:bb348c97df44	29	(#) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
lypinator	0:bb348c97df44	30	slower speed.
lypinator	0:bb348c97df44	31	(#) ADC input range: VREF(minus) = VIN = VREF(plus).
lypinator	0:bb348c97df44	32	(#) DMA request generation during regular channel conversion.
lypinator	0:bb348c97df44	33
lypinator	0:bb348c97df44	34
lypinator	0:bb348c97df44	35	##### How to use this driver #####
lypinator	0:bb348c97df44	36	==============================================================================
lypinator	0:bb348c97df44	37	[..]
lypinator	0:bb348c97df44	38	(#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
lypinator	0:bb348c97df44	39	(##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
lypinator	0:bb348c97df44	40	(##) ADC pins configuration
lypinator	0:bb348c97df44	41	(+++) Enable the clock for the ADC GPIOs using the following function:
lypinator	0:bb348c97df44	42	__HAL_RCC_GPIOx_CLK_ENABLE()
lypinator	0:bb348c97df44	43	(+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
lypinator	0:bb348c97df44	44	(##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
lypinator	0:bb348c97df44	45	(+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
lypinator	0:bb348c97df44	46	(+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
lypinator	0:bb348c97df44	47	(+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
lypinator	0:bb348c97df44	48	(##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
lypinator	0:bb348c97df44	49	(+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
lypinator	0:bb348c97df44	50	(+++) Configure and enable two DMA streams stream for managing data
lypinator	0:bb348c97df44	51	transfer from peripheral to memory (output stream)
lypinator	0:bb348c97df44	52	(+++) Associate the initialized DMA handle to the CRYP DMA handle
lypinator	0:bb348c97df44	53	using __HAL_LINKDMA()
lypinator	0:bb348c97df44	54	(+++) Configure the priority and enable the NVIC for the transfer complete
lypinator	0:bb348c97df44	55	interrupt on the two DMA Streams. The output stream should have higher
lypinator	0:bb348c97df44	56	priority than the input stream.
lypinator	0:bb348c97df44	57
lypinator	0:bb348c97df44	58	* Configuration of ADC, groups regular/injected, channels parameters *
lypinator	0:bb348c97df44	59	==============================================================================
lypinator	0:bb348c97df44	60	[..]
lypinator	0:bb348c97df44	61	(#) Configure the ADC parameters (resolution, data alignment, ...)
lypinator	0:bb348c97df44	62	and regular group parameters (conversion trigger, sequencer, ...)
lypinator	0:bb348c97df44	63	using function HAL_ADC_Init().
lypinator	0:bb348c97df44	64
lypinator	0:bb348c97df44	65	(#) Configure the channels for regular group parameters (channel number,
lypinator	0:bb348c97df44	66	channel rank into sequencer, ..., into regular group)
lypinator	0:bb348c97df44	67	using function HAL_ADC_ConfigChannel().
lypinator	0:bb348c97df44	68
lypinator	0:bb348c97df44	69	(#) Optionally, configure the injected group parameters (conversion trigger,
lypinator	0:bb348c97df44	70	sequencer, ..., of injected group)
lypinator	0:bb348c97df44	71	and the channels for injected group parameters (channel number,
lypinator	0:bb348c97df44	72	channel rank into sequencer, ..., into injected group)
lypinator	0:bb348c97df44	73	using function HAL_ADCEx_InjectedConfigChannel().
lypinator	0:bb348c97df44	74
lypinator	0:bb348c97df44	75	(#) Optionally, configure the analog watchdog parameters (channels
lypinator	0:bb348c97df44	76	monitored, thresholds, ...) using function HAL_ADC_AnalogWDGConfig().
lypinator	0:bb348c97df44	77
lypinator	0:bb348c97df44	78	(#) Optionally, for devices with several ADC instances: configure the
lypinator	0:bb348c97df44	79	multimode parameters using function HAL_ADCEx_MultiModeConfigChannel().
lypinator	0:bb348c97df44	80
lypinator	0:bb348c97df44	81	* Execution of ADC conversions *
lypinator	0:bb348c97df44	82	==============================================================================
lypinator	0:bb348c97df44	83	[..]
lypinator	0:bb348c97df44	84	(#) ADC driver can be used among three modes: polling, interruption,
lypinator	0:bb348c97df44	85	transfer by DMA.
lypinator	0:bb348c97df44	86
lypinator	0:bb348c97df44	87	* Polling mode IO operation *
lypinator	0:bb348c97df44	88	=================================
lypinator	0:bb348c97df44	89	[..]
lypinator	0:bb348c97df44	90	(+) Start the ADC peripheral using HAL_ADC_Start()
lypinator	0:bb348c97df44	91	(+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
lypinator	0:bb348c97df44	92	user can specify the value of timeout according to his end application
lypinator	0:bb348c97df44	93	(+) To read the ADC converted values, use the HAL_ADC_GetValue() function.
lypinator	0:bb348c97df44	94	(+) Stop the ADC peripheral using HAL_ADC_Stop()
lypinator	0:bb348c97df44	95
lypinator	0:bb348c97df44	96	* Interrupt mode IO operation *
lypinator	0:bb348c97df44	97	===================================
lypinator	0:bb348c97df44	98	[..]
lypinator	0:bb348c97df44	99	(+) Start the ADC peripheral using HAL_ADC_Start_IT()
lypinator	0:bb348c97df44	100	(+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
lypinator	0:bb348c97df44	101	(+) At ADC end of conversion HAL_ADC_ConvCpltCallback() function is executed and user can
lypinator	0:bb348c97df44	102	add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
lypinator	0:bb348c97df44	103	(+) In case of ADC Error, HAL_ADC_ErrorCallback() function is executed and user can
lypinator	0:bb348c97df44	104	add his own code by customization of function pointer HAL_ADC_ErrorCallback
lypinator	0:bb348c97df44	105	(+) Stop the ADC peripheral using HAL_ADC_Stop_IT()
lypinator	0:bb348c97df44	106
lypinator	0:bb348c97df44	107	* DMA mode IO operation *
lypinator	0:bb348c97df44	108	==============================
lypinator	0:bb348c97df44	109	[..]
lypinator	0:bb348c97df44	110	(+) Start the ADC peripheral using HAL_ADC_Start_DMA(), at this stage the user specify the length
lypinator	0:bb348c97df44	111	of data to be transferred at each end of conversion
lypinator	0:bb348c97df44	112	(+) At The end of data transfer by HAL_ADC_ConvCpltCallback() function is executed and user can
lypinator	0:bb348c97df44	113	add his own code by customization of function pointer HAL_ADC_ConvCpltCallback
lypinator	0:bb348c97df44	114	(+) In case of transfer Error, HAL_ADC_ErrorCallback() function is executed and user can
lypinator	0:bb348c97df44	115	add his own code by customization of function pointer HAL_ADC_ErrorCallback
lypinator	0:bb348c97df44	116	(+) Stop the ADC peripheral using HAL_ADC_Stop_DMA()
lypinator	0:bb348c97df44	117
lypinator	0:bb348c97df44	118	* ADC HAL driver macros list *
lypinator	0:bb348c97df44	119	=============================================
lypinator	0:bb348c97df44	120	[..]
lypinator	0:bb348c97df44	121	Below the list of most used macros in ADC HAL driver.
lypinator	0:bb348c97df44	122
lypinator	0:bb348c97df44	123	(+) __HAL_ADC_ENABLE : Enable the ADC peripheral
lypinator	0:bb348c97df44	124	(+) __HAL_ADC_DISABLE : Disable the ADC peripheral
lypinator	0:bb348c97df44	125	(+) __HAL_ADC_ENABLE_IT: Enable the ADC end of conversion interrupt
lypinator	0:bb348c97df44	126	(+) __HAL_ADC_DISABLE_IT: Disable the ADC end of conversion interrupt
lypinator	0:bb348c97df44	127	(+) __HAL_ADC_GET_IT_SOURCE: Check if the specified ADC interrupt source is enabled or disabled
lypinator	0:bb348c97df44	128	(+) __HAL_ADC_CLEAR_FLAG: Clear the ADC's pending flags
lypinator	0:bb348c97df44	129	(+) __HAL_ADC_GET_FLAG: Get the selected ADC's flag status
lypinator	0:bb348c97df44	130	(+) ADC_GET_RESOLUTION: Return resolution bits in CR1 register
lypinator	0:bb348c97df44	131
lypinator	0:bb348c97df44	132	[..]
lypinator	0:bb348c97df44	133	(@) You can refer to the ADC HAL driver header file for more useful macros
lypinator	0:bb348c97df44	134
lypinator	0:bb348c97df44	135	* Deinitialization of ADC *
lypinator	0:bb348c97df44	136	==============================================================================
lypinator	0:bb348c97df44	137	[..]
lypinator	0:bb348c97df44	138	(#) Disable the ADC interface
lypinator	0:bb348c97df44	139	(++) ADC clock can be hard reset and disabled at RCC top level.
lypinator	0:bb348c97df44	140	(++) Hard reset of ADC peripherals
lypinator	0:bb348c97df44	141	using macro __HAL_RCC_ADC_FORCE_RESET(), __HAL_RCC_ADC_RELEASE_RESET().
lypinator	0:bb348c97df44	142	(++) ADC clock disable using the equivalent macro/functions as configuration step.
lypinator	0:bb348c97df44	143	(+++) Example:
lypinator	0:bb348c97df44	144	Into HAL_ADC_MspDeInit() (recommended code location) or with
lypinator	0:bb348c97df44	145	other device clock parameters configuration:
lypinator	0:bb348c97df44	146	(+++) HAL_RCC_GetOscConfig(&RCC_OscInitStructure);
lypinator	0:bb348c97df44	147	(+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI;
lypinator	0:bb348c97df44	148	(+++) RCC_OscInitStructure.HSIState = RCC_HSI_OFF; (if not used for system clock)
lypinator	0:bb348c97df44	149	(+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
lypinator	0:bb348c97df44	150
lypinator	0:bb348c97df44	151	(#) ADC pins configuration
lypinator	0:bb348c97df44	152	(++) Disable the clock for the ADC GPIOs using macro __HAL_RCC_GPIOx_CLK_DISABLE()
lypinator	0:bb348c97df44	153
lypinator	0:bb348c97df44	154	(#) Optionally, in case of usage of ADC with interruptions:
lypinator	0:bb348c97df44	155	(++) Disable the NVIC for ADC using function HAL_NVIC_DisableIRQ(ADCx_IRQn)
lypinator	0:bb348c97df44	156
lypinator	0:bb348c97df44	157	(#) Optionally, in case of usage of DMA:
lypinator	0:bb348c97df44	158	(++) Deinitialize the DMA using function HAL_DMA_DeInit().
lypinator	0:bb348c97df44	159	(++) Disable the NVIC for DMA using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn)
lypinator	0:bb348c97df44	160
lypinator	0:bb348c97df44	161	@endverbatim
lypinator	0:bb348c97df44	162	******************************************************************************
lypinator	0:bb348c97df44	163	* @attention
lypinator	0:bb348c97df44	164	*
lypinator	0:bb348c97df44	165	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator	0:bb348c97df44	166	*
lypinator	0:bb348c97df44	167	* Redistribution and use in source and binary forms, with or without modification,
lypinator	0:bb348c97df44	168	* are permitted provided that the following conditions are met:
lypinator	0:bb348c97df44	169	* 1. Redistributions of source code must retain the above copyright notice,
lypinator	0:bb348c97df44	170	* this list of conditions and the following disclaimer.
lypinator	0:bb348c97df44	171	* 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator	0:bb348c97df44	172	* this list of conditions and the following disclaimer in the documentation
lypinator	0:bb348c97df44	173	* and/or other materials provided with the distribution.
lypinator	0:bb348c97df44	174	* 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator	0:bb348c97df44	175	* may be used to endorse or promote products derived from this software
lypinator	0:bb348c97df44	176	* without specific prior written permission.
lypinator	0:bb348c97df44	177	*
lypinator	0:bb348c97df44	178	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator	0:bb348c97df44	179	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator	0:bb348c97df44	180	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator	0:bb348c97df44	181	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator	0:bb348c97df44	182	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator	0:bb348c97df44	183	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator	0:bb348c97df44	184	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator	0:bb348c97df44	185	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator	0:bb348c97df44	186	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator	0:bb348c97df44	187	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator	0:bb348c97df44	188	*
lypinator	0:bb348c97df44	189	******************************************************************************
lypinator	0:bb348c97df44	190	*/
lypinator	0:bb348c97df44	191
lypinator	0:bb348c97df44	192	/* Includes ------------------------------------------------------------------*/
lypinator	0:bb348c97df44	193	#include "stm32f4xx_hal.h"
lypinator	0:bb348c97df44	194
lypinator	0:bb348c97df44	195	/** @addtogroup STM32F4xx_HAL_Driver
lypinator	0:bb348c97df44	196	* @{
lypinator	0:bb348c97df44	197	*/
lypinator	0:bb348c97df44	198
lypinator	0:bb348c97df44	199	/** @defgroup ADC ADC
lypinator	0:bb348c97df44	200	* @brief ADC driver modules
lypinator	0:bb348c97df44	201	* @{
lypinator	0:bb348c97df44	202	*/
lypinator	0:bb348c97df44	203
lypinator	0:bb348c97df44	204	#ifdef HAL_ADC_MODULE_ENABLED
lypinator	0:bb348c97df44	205
lypinator	0:bb348c97df44	206	/* Private typedef -----------------------------------------------------------*/
lypinator	0:bb348c97df44	207	/* Private define ------------------------------------------------------------*/
lypinator	0:bb348c97df44	208	/* Private macro -------------------------------------------------------------*/
lypinator	0:bb348c97df44	209	/* Private variables ---------------------------------------------------------*/
lypinator	0:bb348c97df44	210	/** @addtogroup ADC_Private_Functions
lypinator	0:bb348c97df44	211	* @{
lypinator	0:bb348c97df44	212	*/
lypinator	0:bb348c97df44	213	/* Private function prototypes -----------------------------------------------*/
lypinator	0:bb348c97df44	214	static void ADC_Init(ADC_HandleTypeDef* hadc);
lypinator	0:bb348c97df44	215	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
lypinator	0:bb348c97df44	216	static void ADC_DMAError(DMA_HandleTypeDef *hdma);
lypinator	0:bb348c97df44	217	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
lypinator	0:bb348c97df44	218	/**
lypinator	0:bb348c97df44	219	* @}
lypinator	0:bb348c97df44	220	*/
lypinator	0:bb348c97df44	221	/* Exported functions --------------------------------------------------------*/
lypinator	0:bb348c97df44	222	/** @defgroup ADC_Exported_Functions ADC Exported Functions
lypinator	0:bb348c97df44	223	* @{
lypinator	0:bb348c97df44	224	*/
lypinator	0:bb348c97df44	225
lypinator	0:bb348c97df44	226	/** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions
lypinator	0:bb348c97df44	227	* @brief Initialization and Configuration functions
lypinator	0:bb348c97df44	228	*
lypinator	0:bb348c97df44	229	@verbatim
lypinator	0:bb348c97df44	230	===============================================================================
lypinator	0:bb348c97df44	231	##### Initialization and de-initialization functions #####
lypinator	0:bb348c97df44	232	===============================================================================
lypinator	0:bb348c97df44	233	[..] This section provides functions allowing to:
lypinator	0:bb348c97df44	234	(+) Initialize and configure the ADC.
lypinator	0:bb348c97df44	235	(+) De-initialize the ADC.
lypinator	0:bb348c97df44	236
lypinator	0:bb348c97df44	237	@endverbatim
lypinator	0:bb348c97df44	238	* @{
lypinator	0:bb348c97df44	239	*/
lypinator	0:bb348c97df44	240
lypinator	0:bb348c97df44	241	/**
lypinator	0:bb348c97df44	242	* @brief Initializes the ADCx peripheral according to the specified parameters
lypinator	0:bb348c97df44	243	* in the ADC_InitStruct and initializes the ADC MSP.
lypinator	0:bb348c97df44	244	*
lypinator	0:bb348c97df44	245	* @note This function is used to configure the global features of the ADC (
lypinator	0:bb348c97df44	246	* ClockPrescaler, Resolution, Data Alignment and number of conversion), however,
lypinator	0:bb348c97df44	247	* the rest of the configuration parameters are specific to the regular
lypinator	0:bb348c97df44	248	* channels group (scan mode activation, continuous mode activation,
lypinator	0:bb348c97df44	249	* External trigger source and edge, DMA continuous request after the
lypinator	0:bb348c97df44	250	* last transfer and End of conversion selection).
lypinator	0:bb348c97df44	251	*
lypinator	0:bb348c97df44	252	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	253	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	254	* @retval HAL status
lypinator	0:bb348c97df44	255	*/
lypinator	0:bb348c97df44	256	HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	257	{
lypinator	0:bb348c97df44	258	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
lypinator	0:bb348c97df44	259
lypinator	0:bb348c97df44	260	/* Check ADC handle */
lypinator	0:bb348c97df44	261	if(hadc == NULL)
lypinator	0:bb348c97df44	262	{
lypinator	0:bb348c97df44	263	return HAL_ERROR;
lypinator	0:bb348c97df44	264	}
lypinator	0:bb348c97df44	265
lypinator	0:bb348c97df44	266	/* Check the parameters */
lypinator	0:bb348c97df44	267	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
lypinator	0:bb348c97df44	268	assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
lypinator	0:bb348c97df44	269	assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
lypinator	0:bb348c97df44	270	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ScanConvMode));
lypinator	0:bb348c97df44	271	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
lypinator	0:bb348c97df44	272	assert_param(IS_ADC_EXT_TRIG(hadc->Init.ExternalTrigConv));
lypinator	0:bb348c97df44	273	assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
lypinator	0:bb348c97df44	274	assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
lypinator	0:bb348c97df44	275	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
lypinator	0:bb348c97df44	276	assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
lypinator	0:bb348c97df44	277	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
lypinator	0:bb348c97df44	278
lypinator	0:bb348c97df44	279	if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
lypinator	0:bb348c97df44	280	{
lypinator	0:bb348c97df44	281	assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
lypinator	0:bb348c97df44	282	}
lypinator	0:bb348c97df44	283
lypinator	0:bb348c97df44	284	if(hadc->State == HAL_ADC_STATE_RESET)
lypinator	0:bb348c97df44	285	{
lypinator	0:bb348c97df44	286	/* Initialize ADC error code */
lypinator	0:bb348c97df44	287	ADC_CLEAR_ERRORCODE(hadc);
lypinator	0:bb348c97df44	288
lypinator	0:bb348c97df44	289	/* Allocate lock resource and initialize it */
lypinator	0:bb348c97df44	290	hadc->Lock = HAL_UNLOCKED;
lypinator	0:bb348c97df44	291
lypinator	0:bb348c97df44	292	/* Init the low level hardware */
lypinator	0:bb348c97df44	293	HAL_ADC_MspInit(hadc);
lypinator	0:bb348c97df44	294	}
lypinator	0:bb348c97df44	295
lypinator	0:bb348c97df44	296	/* Configuration of ADC parameters if previous preliminary actions are */
lypinator	0:bb348c97df44	297	/* correctly completed. */
lypinator	0:bb348c97df44	298	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
lypinator	0:bb348c97df44	299	{
lypinator	0:bb348c97df44	300	/* Set ADC state */
lypinator	0:bb348c97df44	301	ADC_STATE_CLR_SET(hadc->State,
lypinator	0:bb348c97df44	302	HAL_ADC_STATE_REG_BUSY \| HAL_ADC_STATE_INJ_BUSY,
lypinator	0:bb348c97df44	303	HAL_ADC_STATE_BUSY_INTERNAL);
lypinator	0:bb348c97df44	304
lypinator	0:bb348c97df44	305	/* Set ADC parameters */
lypinator	0:bb348c97df44	306	ADC_Init(hadc);
lypinator	0:bb348c97df44	307
lypinator	0:bb348c97df44	308	/* Set ADC error code to none */
lypinator	0:bb348c97df44	309	ADC_CLEAR_ERRORCODE(hadc);
lypinator	0:bb348c97df44	310
lypinator	0:bb348c97df44	311	/* Set the ADC state */
lypinator	0:bb348c97df44	312	ADC_STATE_CLR_SET(hadc->State,
lypinator	0:bb348c97df44	313	HAL_ADC_STATE_BUSY_INTERNAL,
lypinator	0:bb348c97df44	314	HAL_ADC_STATE_READY);
lypinator	0:bb348c97df44	315	}
lypinator	0:bb348c97df44	316	else
lypinator	0:bb348c97df44	317	{
lypinator	0:bb348c97df44	318	tmp_hal_status = HAL_ERROR;
lypinator	0:bb348c97df44	319	}
lypinator	0:bb348c97df44	320
lypinator	0:bb348c97df44	321	/* Release Lock */
lypinator	0:bb348c97df44	322	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	323
lypinator	0:bb348c97df44	324	/* Return function status */
lypinator	0:bb348c97df44	325	return tmp_hal_status;
lypinator	0:bb348c97df44	326	}
lypinator	0:bb348c97df44	327
lypinator	0:bb348c97df44	328	/**
lypinator	0:bb348c97df44	329	* @brief Deinitializes the ADCx peripheral registers to their default reset values.
lypinator	0:bb348c97df44	330	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	331	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	332	* @retval HAL status
lypinator	0:bb348c97df44	333	*/
lypinator	0:bb348c97df44	334	HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	335	{
lypinator	0:bb348c97df44	336	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
lypinator	0:bb348c97df44	337
lypinator	0:bb348c97df44	338	/* Check ADC handle */
lypinator	0:bb348c97df44	339	if(hadc == NULL)
lypinator	0:bb348c97df44	340	{
lypinator	0:bb348c97df44	341	return HAL_ERROR;
lypinator	0:bb348c97df44	342	}
lypinator	0:bb348c97df44	343
lypinator	0:bb348c97df44	344	/* Check the parameters */
lypinator	0:bb348c97df44	345	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
lypinator	0:bb348c97df44	346
lypinator	0:bb348c97df44	347	/* Set ADC state */
lypinator	0:bb348c97df44	348	SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
lypinator	0:bb348c97df44	349
lypinator	0:bb348c97df44	350	/* Stop potential conversion on going, on regular and injected groups */
lypinator	0:bb348c97df44	351	/* Disable ADC peripheral */
lypinator	0:bb348c97df44	352	__HAL_ADC_DISABLE(hadc);
lypinator	0:bb348c97df44	353
lypinator	0:bb348c97df44	354	/* Configuration of ADC parameters if previous preliminary actions are */
lypinator	0:bb348c97df44	355	/* correctly completed. */
lypinator	0:bb348c97df44	356	if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
lypinator	0:bb348c97df44	357	{
lypinator	0:bb348c97df44	358	/* DeInit the low level hardware */
lypinator	0:bb348c97df44	359	HAL_ADC_MspDeInit(hadc);
lypinator	0:bb348c97df44	360
lypinator	0:bb348c97df44	361	/* Set ADC error code to none */
lypinator	0:bb348c97df44	362	ADC_CLEAR_ERRORCODE(hadc);
lypinator	0:bb348c97df44	363
lypinator	0:bb348c97df44	364	/* Set ADC state */
lypinator	0:bb348c97df44	365	hadc->State = HAL_ADC_STATE_RESET;
lypinator	0:bb348c97df44	366	}
lypinator	0:bb348c97df44	367
lypinator	0:bb348c97df44	368	/* Process unlocked */
lypinator	0:bb348c97df44	369	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	370
lypinator	0:bb348c97df44	371	/* Return function status */
lypinator	0:bb348c97df44	372	return tmp_hal_status;
lypinator	0:bb348c97df44	373	}
lypinator	0:bb348c97df44	374
lypinator	0:bb348c97df44	375	/**
lypinator	0:bb348c97df44	376	* @brief Initializes the ADC MSP.
lypinator	0:bb348c97df44	377	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	378	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	379	* @retval None
lypinator	0:bb348c97df44	380	*/
lypinator	0:bb348c97df44	381	__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	382	{
lypinator	0:bb348c97df44	383	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	384	UNUSED(hadc);
lypinator	0:bb348c97df44	385	/* NOTE : This function Should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	386	the HAL_ADC_MspInit could be implemented in the user file
lypinator	0:bb348c97df44	387	*/
lypinator	0:bb348c97df44	388	}
lypinator	0:bb348c97df44	389
lypinator	0:bb348c97df44	390	/**
lypinator	0:bb348c97df44	391	* @brief DeInitializes the ADC MSP.
lypinator	0:bb348c97df44	392	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	393	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	394	* @retval None
lypinator	0:bb348c97df44	395	*/
lypinator	0:bb348c97df44	396	__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	397	{
lypinator	0:bb348c97df44	398	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	399	UNUSED(hadc);
lypinator	0:bb348c97df44	400	/* NOTE : This function Should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	401	the HAL_ADC_MspDeInit could be implemented in the user file
lypinator	0:bb348c97df44	402	*/
lypinator	0:bb348c97df44	403	}
lypinator	0:bb348c97df44	404
lypinator	0:bb348c97df44	405	/**
lypinator	0:bb348c97df44	406	* @}
lypinator	0:bb348c97df44	407	*/
lypinator	0:bb348c97df44	408
lypinator	0:bb348c97df44	409	/** @defgroup ADC_Exported_Functions_Group2 IO operation functions
lypinator	0:bb348c97df44	410	* @brief IO operation functions
lypinator	0:bb348c97df44	411	*
lypinator	0:bb348c97df44	412	@verbatim
lypinator	0:bb348c97df44	413	===============================================================================
lypinator	0:bb348c97df44	414	##### IO operation functions #####
lypinator	0:bb348c97df44	415	===============================================================================
lypinator	0:bb348c97df44	416	[..] This section provides functions allowing to:
lypinator	0:bb348c97df44	417	(+) Start conversion of regular channel.
lypinator	0:bb348c97df44	418	(+) Stop conversion of regular channel.
lypinator	0:bb348c97df44	419	(+) Start conversion of regular channel and enable interrupt.
lypinator	0:bb348c97df44	420	(+) Stop conversion of regular channel and disable interrupt.
lypinator	0:bb348c97df44	421	(+) Start conversion of regular channel and enable DMA transfer.
lypinator	0:bb348c97df44	422	(+) Stop conversion of regular channel and disable DMA transfer.
lypinator	0:bb348c97df44	423	(+) Handle ADC interrupt request.
lypinator	0:bb348c97df44	424
lypinator	0:bb348c97df44	425	@endverbatim
lypinator	0:bb348c97df44	426	* @{
lypinator	0:bb348c97df44	427	*/
lypinator	0:bb348c97df44	428
lypinator	0:bb348c97df44	429	/**
lypinator	0:bb348c97df44	430	* @brief Enables ADC and starts conversion of the regular channels.
lypinator	0:bb348c97df44	431	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	432	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	433	* @retval HAL status
lypinator	0:bb348c97df44	434	*/
lypinator	0:bb348c97df44	435	HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	436	{
lypinator	0:bb348c97df44	437	__IO uint32_t counter = 0U;
lypinator	0:bb348c97df44	438	ADC_Common_TypeDef *tmpADC_Common;
lypinator	0:bb348c97df44	439
lypinator	0:bb348c97df44	440	/* Check the parameters */
lypinator	0:bb348c97df44	441	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
lypinator	0:bb348c97df44	442	assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
lypinator	0:bb348c97df44	443
lypinator	0:bb348c97df44	444	/* Process locked */
lypinator	0:bb348c97df44	445	__HAL_LOCK(hadc);
lypinator	0:bb348c97df44	446
lypinator	0:bb348c97df44	447	/* Enable the ADC peripheral */
lypinator	0:bb348c97df44	448	/* Check if ADC peripheral is disabled in order to enable it and wait during
lypinator	0:bb348c97df44	449	Tstab time the ADC's stabilization */
lypinator	0:bb348c97df44	450	if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
lypinator	0:bb348c97df44	451	{
lypinator	0:bb348c97df44	452	/* Enable the Peripheral */
lypinator	0:bb348c97df44	453	__HAL_ADC_ENABLE(hadc);
lypinator	0:bb348c97df44	454
lypinator	0:bb348c97df44	455	/* Delay for ADC stabilization time */
lypinator	0:bb348c97df44	456	/* Compute number of CPU cycles to wait for */
lypinator	0:bb348c97df44	457	counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
lypinator	0:bb348c97df44	458	while(counter != 0U)
lypinator	0:bb348c97df44	459	{
lypinator	0:bb348c97df44	460	counter--;
lypinator	0:bb348c97df44	461	}
lypinator	0:bb348c97df44	462	}
lypinator	0:bb348c97df44	463
lypinator	0:bb348c97df44	464	/* Start conversion if ADC is effectively enabled */
lypinator	0:bb348c97df44	465	if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
lypinator	0:bb348c97df44	466	{
lypinator	0:bb348c97df44	467	/* Set ADC state */
lypinator	0:bb348c97df44	468	/* - Clear state bitfield related to regular group conversion results */
lypinator	0:bb348c97df44	469	/* - Set state bitfield related to regular group operation */
lypinator	0:bb348c97df44	470	ADC_STATE_CLR_SET(hadc->State,
lypinator	0:bb348c97df44	471	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR,
lypinator	0:bb348c97df44	472	HAL_ADC_STATE_REG_BUSY);
lypinator	0:bb348c97df44	473
lypinator	0:bb348c97df44	474	/* If conversions on group regular are also triggering group injected, */
lypinator	0:bb348c97df44	475	/* update ADC state. */
lypinator	0:bb348c97df44	476	if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
lypinator	0:bb348c97df44	477	{
lypinator	0:bb348c97df44	478	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
lypinator	0:bb348c97df44	479	}
lypinator	0:bb348c97df44	480
lypinator	0:bb348c97df44	481	/* State machine update: Check if an injected conversion is ongoing */
lypinator	0:bb348c97df44	482	if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
lypinator	0:bb348c97df44	483	{
lypinator	0:bb348c97df44	484	/* Reset ADC error code fields related to conversions on group regular */
lypinator	0:bb348c97df44	485	CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR \| HAL_ADC_ERROR_DMA));
lypinator	0:bb348c97df44	486	}
lypinator	0:bb348c97df44	487	else
lypinator	0:bb348c97df44	488	{
lypinator	0:bb348c97df44	489	/* Reset ADC all error code fields */
lypinator	0:bb348c97df44	490	ADC_CLEAR_ERRORCODE(hadc);
lypinator	0:bb348c97df44	491	}
lypinator	0:bb348c97df44	492
lypinator	0:bb348c97df44	493	/* Process unlocked */
lypinator	0:bb348c97df44	494	/* Unlock before starting ADC conversions: in case of potential */
lypinator	0:bb348c97df44	495	/* interruption, to let the process to ADC IRQ Handler. */
lypinator	0:bb348c97df44	496	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	497
lypinator	0:bb348c97df44	498	/* Pointer to the common control register to which is belonging hadc */
lypinator	0:bb348c97df44	499	/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
lypinator	0:bb348c97df44	500	/* control register) */
lypinator	0:bb348c97df44	501	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
lypinator	0:bb348c97df44	502
lypinator	0:bb348c97df44	503	/* Clear regular group conversion flag and overrun flag */
lypinator	0:bb348c97df44	504	/* (To ensure of no unknown state from potential previous ADC operations) */
lypinator	0:bb348c97df44	505	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC \| ADC_FLAG_OVR);
lypinator	0:bb348c97df44	506
lypinator	0:bb348c97df44	507	/* Check if Multimode enabled */
lypinator	0:bb348c97df44	508	if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
lypinator	0:bb348c97df44	509	{
lypinator	0:bb348c97df44	510	/* if no external trigger present enable software conversion of regular channels */
lypinator	0:bb348c97df44	511	if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
lypinator	0:bb348c97df44	512	{
lypinator	0:bb348c97df44	513	/* Enable the selected ADC software conversion for regular group */
lypinator	0:bb348c97df44	514	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
lypinator	0:bb348c97df44	515	}
lypinator	0:bb348c97df44	516	}
lypinator	0:bb348c97df44	517	else
lypinator	0:bb348c97df44	518	{
lypinator	0:bb348c97df44	519	/* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
lypinator	0:bb348c97df44	520	if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
lypinator	0:bb348c97df44	521	{
lypinator	0:bb348c97df44	522	/* Enable the selected ADC software conversion for regular group */
lypinator	0:bb348c97df44	523	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
lypinator	0:bb348c97df44	524	}
lypinator	0:bb348c97df44	525	}
lypinator	0:bb348c97df44	526	}
lypinator	0:bb348c97df44	527
lypinator	0:bb348c97df44	528	/* Return function status */
lypinator	0:bb348c97df44	529	return HAL_OK;
lypinator	0:bb348c97df44	530	}
lypinator	0:bb348c97df44	531
lypinator	0:bb348c97df44	532	/**
lypinator	0:bb348c97df44	533	* @brief Disables ADC and stop conversion of regular channels.
lypinator	0:bb348c97df44	534	*
lypinator	0:bb348c97df44	535	* @note Caution: This function will stop also injected channels.
lypinator	0:bb348c97df44	536	*
lypinator	0:bb348c97df44	537	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	538	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	539	*
lypinator	0:bb348c97df44	540	* @retval HAL status.
lypinator	0:bb348c97df44	541	*/
lypinator	0:bb348c97df44	542	HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	543	{
lypinator	0:bb348c97df44	544	/* Check the parameters */
lypinator	0:bb348c97df44	545	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
lypinator	0:bb348c97df44	546
lypinator	0:bb348c97df44	547	/* Process locked */
lypinator	0:bb348c97df44	548	__HAL_LOCK(hadc);
lypinator	0:bb348c97df44	549
lypinator	0:bb348c97df44	550	/* Stop potential conversion on going, on regular and injected groups */
lypinator	0:bb348c97df44	551	/* Disable ADC peripheral */
lypinator	0:bb348c97df44	552	__HAL_ADC_DISABLE(hadc);
lypinator	0:bb348c97df44	553
lypinator	0:bb348c97df44	554	/* Check if ADC is effectively disabled */
lypinator	0:bb348c97df44	555	if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
lypinator	0:bb348c97df44	556	{
lypinator	0:bb348c97df44	557	/* Set ADC state */
lypinator	0:bb348c97df44	558	ADC_STATE_CLR_SET(hadc->State,
lypinator	0:bb348c97df44	559	HAL_ADC_STATE_REG_BUSY \| HAL_ADC_STATE_INJ_BUSY,
lypinator	0:bb348c97df44	560	HAL_ADC_STATE_READY);
lypinator	0:bb348c97df44	561	}
lypinator	0:bb348c97df44	562
lypinator	0:bb348c97df44	563	/* Process unlocked */
lypinator	0:bb348c97df44	564	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	565
lypinator	0:bb348c97df44	566	/* Return function status */
lypinator	0:bb348c97df44	567	return HAL_OK;
lypinator	0:bb348c97df44	568	}
lypinator	0:bb348c97df44	569
lypinator	0:bb348c97df44	570	/**
lypinator	0:bb348c97df44	571	* @brief Poll for regular conversion complete
lypinator	0:bb348c97df44	572	* @note ADC conversion flags EOS (end of sequence) and EOC (end of
lypinator	0:bb348c97df44	573	* conversion) are cleared by this function.
lypinator	0:bb348c97df44	574	* @note This function cannot be used in a particular setup: ADC configured
lypinator	0:bb348c97df44	575	* in DMA mode and polling for end of each conversion (ADC init
lypinator	0:bb348c97df44	576	* parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
lypinator	0:bb348c97df44	577	* In this case, DMA resets the flag EOC and polling cannot be
lypinator	0:bb348c97df44	578	* performed on each conversion. Nevertheless, polling can still
lypinator	0:bb348c97df44	579	* be performed on the complete sequence.
lypinator	0:bb348c97df44	580	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	581	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	582	* @param Timeout Timeout value in millisecond.
lypinator	0:bb348c97df44	583	* @retval HAL status
lypinator	0:bb348c97df44	584	*/
lypinator	0:bb348c97df44	585	HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
lypinator	0:bb348c97df44	586	{
lypinator	0:bb348c97df44	587	uint32_t tickstart = 0U;
lypinator	0:bb348c97df44	588
lypinator	0:bb348c97df44	589	/* Verification that ADC configuration is compliant with polling for */
lypinator	0:bb348c97df44	590	/* each conversion: */
lypinator	0:bb348c97df44	591	/* Particular case is ADC configured in DMA mode and ADC sequencer with */
lypinator	0:bb348c97df44	592	/* several ranks and polling for end of each conversion. */
lypinator	0:bb348c97df44	593	/* For code simplicity sake, this particular case is generalized to */
lypinator	0:bb348c97df44	594	/* ADC configured in DMA mode and polling for end of each conversion. */
lypinator	0:bb348c97df44	595	if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) &&
lypinator	0:bb348c97df44	596	HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA) )
lypinator	0:bb348c97df44	597	{
lypinator	0:bb348c97df44	598	/* Update ADC state machine to error */
lypinator	0:bb348c97df44	599	SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
lypinator	0:bb348c97df44	600
lypinator	0:bb348c97df44	601	/* Process unlocked */
lypinator	0:bb348c97df44	602	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	603
lypinator	0:bb348c97df44	604	return HAL_ERROR;
lypinator	0:bb348c97df44	605	}
lypinator	0:bb348c97df44	606
lypinator	0:bb348c97df44	607	/* Get tick */
lypinator	0:bb348c97df44	608	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	609
lypinator	0:bb348c97df44	610	/* Check End of conversion flag */
lypinator	0:bb348c97df44	611	while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC)))
lypinator	0:bb348c97df44	612	{
lypinator	0:bb348c97df44	613	/* Check if timeout is disabled (set to infinite wait) */
lypinator	0:bb348c97df44	614	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	615	{
lypinator	0:bb348c97df44	616	if((Timeout == 0U) \|\| ((HAL_GetTick() - tickstart ) > Timeout))
lypinator	0:bb348c97df44	617	{
lypinator	0:bb348c97df44	618	/* Update ADC state machine to timeout */
lypinator	0:bb348c97df44	619	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
lypinator	0:bb348c97df44	620
lypinator	0:bb348c97df44	621	/* Process unlocked */
lypinator	0:bb348c97df44	622	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	623
lypinator	0:bb348c97df44	624	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	625	}
lypinator	0:bb348c97df44	626	}
lypinator	0:bb348c97df44	627	}
lypinator	0:bb348c97df44	628
lypinator	0:bb348c97df44	629	/* Clear regular group conversion flag */
lypinator	0:bb348c97df44	630	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT \| ADC_FLAG_EOC);
lypinator	0:bb348c97df44	631
lypinator	0:bb348c97df44	632	/* Update ADC state machine */
lypinator	0:bb348c97df44	633	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
lypinator	0:bb348c97df44	634
lypinator	0:bb348c97df44	635	/* Determine whether any further conversion upcoming on group regular */
lypinator	0:bb348c97df44	636	/* by external trigger, continuous mode or scan sequence on going. */
lypinator	0:bb348c97df44	637	/* Note: On STM32F4, there is no independent flag of end of sequence. */
lypinator	0:bb348c97df44	638	/* The test of scan sequence on going is done either with scan */
lypinator	0:bb348c97df44	639	/* sequence disabled or with end of conversion flag set to */
lypinator	0:bb348c97df44	640	/* of end of sequence. */
lypinator	0:bb348c97df44	641	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
lypinator	0:bb348c97df44	642	(hadc->Init.ContinuousConvMode == DISABLE) &&
lypinator	0:bb348c97df44	643	(HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) \|\|
lypinator	0:bb348c97df44	644	HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
lypinator	0:bb348c97df44	645	{
lypinator	0:bb348c97df44	646	/* Set ADC state */
lypinator	0:bb348c97df44	647	CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
lypinator	0:bb348c97df44	648
lypinator	0:bb348c97df44	649	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
lypinator	0:bb348c97df44	650	{
lypinator	0:bb348c97df44	651	SET_BIT(hadc->State, HAL_ADC_STATE_READY);
lypinator	0:bb348c97df44	652	}
lypinator	0:bb348c97df44	653	}
lypinator	0:bb348c97df44	654
lypinator	0:bb348c97df44	655	/* Return ADC state */
lypinator	0:bb348c97df44	656	return HAL_OK;
lypinator	0:bb348c97df44	657	}
lypinator	0:bb348c97df44	658
lypinator	0:bb348c97df44	659	/**
lypinator	0:bb348c97df44	660	* @brief Poll for conversion event
lypinator	0:bb348c97df44	661	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	662	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	663	* @param EventType the ADC event type.
lypinator	0:bb348c97df44	664	* This parameter can be one of the following values:
lypinator	0:bb348c97df44	665	* @arg ADC_AWD_EVENT: ADC Analog watch Dog event.
lypinator	0:bb348c97df44	666	* @arg ADC_OVR_EVENT: ADC Overrun event.
lypinator	0:bb348c97df44	667	* @param Timeout Timeout value in millisecond.
lypinator	0:bb348c97df44	668	* @retval HAL status
lypinator	0:bb348c97df44	669	*/
lypinator	0:bb348c97df44	670	HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout)
lypinator	0:bb348c97df44	671	{
lypinator	0:bb348c97df44	672	uint32_t tickstart = 0U;
lypinator	0:bb348c97df44	673
lypinator	0:bb348c97df44	674	/* Check the parameters */
lypinator	0:bb348c97df44	675	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
lypinator	0:bb348c97df44	676	assert_param(IS_ADC_EVENT_TYPE(EventType));
lypinator	0:bb348c97df44	677
lypinator	0:bb348c97df44	678	/* Get tick */
lypinator	0:bb348c97df44	679	tickstart = HAL_GetTick();
lypinator	0:bb348c97df44	680
lypinator	0:bb348c97df44	681	/* Check selected event flag */
lypinator	0:bb348c97df44	682	while(!(__HAL_ADC_GET_FLAG(hadc,EventType)))
lypinator	0:bb348c97df44	683	{
lypinator	0:bb348c97df44	684	/* Check for the Timeout */
lypinator	0:bb348c97df44	685	if(Timeout != HAL_MAX_DELAY)
lypinator	0:bb348c97df44	686	{
lypinator	0:bb348c97df44	687	if((Timeout == 0U) \|\| ((HAL_GetTick() - tickstart ) > Timeout))
lypinator	0:bb348c97df44	688	{
lypinator	0:bb348c97df44	689	/* Update ADC state machine to timeout */
lypinator	0:bb348c97df44	690	SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
lypinator	0:bb348c97df44	691
lypinator	0:bb348c97df44	692	/* Process unlocked */
lypinator	0:bb348c97df44	693	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	694
lypinator	0:bb348c97df44	695	return HAL_TIMEOUT;
lypinator	0:bb348c97df44	696	}
lypinator	0:bb348c97df44	697	}
lypinator	0:bb348c97df44	698	}
lypinator	0:bb348c97df44	699
lypinator	0:bb348c97df44	700	/* Analog watchdog (level out of window) event */
lypinator	0:bb348c97df44	701	if(EventType == ADC_AWD_EVENT)
lypinator	0:bb348c97df44	702	{
lypinator	0:bb348c97df44	703	/* Set ADC state */
lypinator	0:bb348c97df44	704	SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
lypinator	0:bb348c97df44	705
lypinator	0:bb348c97df44	706	/* Clear ADC analog watchdog flag */
lypinator	0:bb348c97df44	707	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
lypinator	0:bb348c97df44	708	}
lypinator	0:bb348c97df44	709	/* Overrun event */
lypinator	0:bb348c97df44	710	else
lypinator	0:bb348c97df44	711	{
lypinator	0:bb348c97df44	712	/* Set ADC state */
lypinator	0:bb348c97df44	713	SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
lypinator	0:bb348c97df44	714	/* Set ADC error code to overrun */
lypinator	0:bb348c97df44	715	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
lypinator	0:bb348c97df44	716
lypinator	0:bb348c97df44	717	/* Clear ADC overrun flag */
lypinator	0:bb348c97df44	718	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
lypinator	0:bb348c97df44	719	}
lypinator	0:bb348c97df44	720
lypinator	0:bb348c97df44	721	/* Return ADC state */
lypinator	0:bb348c97df44	722	return HAL_OK;
lypinator	0:bb348c97df44	723	}
lypinator	0:bb348c97df44	724
lypinator	0:bb348c97df44	725
lypinator	0:bb348c97df44	726	/**
lypinator	0:bb348c97df44	727	* @brief Enables the interrupt and starts ADC conversion of regular channels.
lypinator	0:bb348c97df44	728	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	729	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	730	* @retval HAL status.
lypinator	0:bb348c97df44	731	*/
lypinator	0:bb348c97df44	732	HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	733	{
lypinator	0:bb348c97df44	734	__IO uint32_t counter = 0U;
lypinator	0:bb348c97df44	735	ADC_Common_TypeDef *tmpADC_Common;
lypinator	0:bb348c97df44	736
lypinator	0:bb348c97df44	737	/* Check the parameters */
lypinator	0:bb348c97df44	738	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
lypinator	0:bb348c97df44	739	assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
lypinator	0:bb348c97df44	740
lypinator	0:bb348c97df44	741	/* Process locked */
lypinator	0:bb348c97df44	742	__HAL_LOCK(hadc);
lypinator	0:bb348c97df44	743
lypinator	0:bb348c97df44	744	/* Enable the ADC peripheral */
lypinator	0:bb348c97df44	745	/* Check if ADC peripheral is disabled in order to enable it and wait during
lypinator	0:bb348c97df44	746	Tstab time the ADC's stabilization */
lypinator	0:bb348c97df44	747	if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
lypinator	0:bb348c97df44	748	{
lypinator	0:bb348c97df44	749	/* Enable the Peripheral */
lypinator	0:bb348c97df44	750	__HAL_ADC_ENABLE(hadc);
lypinator	0:bb348c97df44	751
lypinator	0:bb348c97df44	752	/* Delay for ADC stabilization time */
lypinator	0:bb348c97df44	753	/* Compute number of CPU cycles to wait for */
lypinator	0:bb348c97df44	754	counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
lypinator	0:bb348c97df44	755	while(counter != 0U)
lypinator	0:bb348c97df44	756	{
lypinator	0:bb348c97df44	757	counter--;
lypinator	0:bb348c97df44	758	}
lypinator	0:bb348c97df44	759	}
lypinator	0:bb348c97df44	760
lypinator	0:bb348c97df44	761	/* Start conversion if ADC is effectively enabled */
lypinator	0:bb348c97df44	762	if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
lypinator	0:bb348c97df44	763	{
lypinator	0:bb348c97df44	764	/* Set ADC state */
lypinator	0:bb348c97df44	765	/* - Clear state bitfield related to regular group conversion results */
lypinator	0:bb348c97df44	766	/* - Set state bitfield related to regular group operation */
lypinator	0:bb348c97df44	767	ADC_STATE_CLR_SET(hadc->State,
lypinator	0:bb348c97df44	768	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR,
lypinator	0:bb348c97df44	769	HAL_ADC_STATE_REG_BUSY);
lypinator	0:bb348c97df44	770
lypinator	0:bb348c97df44	771	/* If conversions on group regular are also triggering group injected, */
lypinator	0:bb348c97df44	772	/* update ADC state. */
lypinator	0:bb348c97df44	773	if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
lypinator	0:bb348c97df44	774	{
lypinator	0:bb348c97df44	775	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
lypinator	0:bb348c97df44	776	}
lypinator	0:bb348c97df44	777
lypinator	0:bb348c97df44	778	/* State machine update: Check if an injected conversion is ongoing */
lypinator	0:bb348c97df44	779	if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
lypinator	0:bb348c97df44	780	{
lypinator	0:bb348c97df44	781	/* Reset ADC error code fields related to conversions on group regular */
lypinator	0:bb348c97df44	782	CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR \| HAL_ADC_ERROR_DMA));
lypinator	0:bb348c97df44	783	}
lypinator	0:bb348c97df44	784	else
lypinator	0:bb348c97df44	785	{
lypinator	0:bb348c97df44	786	/* Reset ADC all error code fields */
lypinator	0:bb348c97df44	787	ADC_CLEAR_ERRORCODE(hadc);
lypinator	0:bb348c97df44	788	}
lypinator	0:bb348c97df44	789
lypinator	0:bb348c97df44	790	/* Process unlocked */
lypinator	0:bb348c97df44	791	/* Unlock before starting ADC conversions: in case of potential */
lypinator	0:bb348c97df44	792	/* interruption, to let the process to ADC IRQ Handler. */
lypinator	0:bb348c97df44	793	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	794
lypinator	0:bb348c97df44	795	/* Pointer to the common control register to which is belonging hadc */
lypinator	0:bb348c97df44	796	/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
lypinator	0:bb348c97df44	797	/* control register) */
lypinator	0:bb348c97df44	798	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
lypinator	0:bb348c97df44	799
lypinator	0:bb348c97df44	800	/* Clear regular group conversion flag and overrun flag */
lypinator	0:bb348c97df44	801	/* (To ensure of no unknown state from potential previous ADC operations) */
lypinator	0:bb348c97df44	802	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC \| ADC_FLAG_OVR);
lypinator	0:bb348c97df44	803
lypinator	0:bb348c97df44	804	/* Enable end of conversion interrupt for regular group */
lypinator	0:bb348c97df44	805	__HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_OVR));
lypinator	0:bb348c97df44	806
lypinator	0:bb348c97df44	807	/* Check if Multimode enabled */
lypinator	0:bb348c97df44	808	if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
lypinator	0:bb348c97df44	809	{
lypinator	0:bb348c97df44	810	/* if no external trigger present enable software conversion of regular channels */
lypinator	0:bb348c97df44	811	if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
lypinator	0:bb348c97df44	812	{
lypinator	0:bb348c97df44	813	/* Enable the selected ADC software conversion for regular group */
lypinator	0:bb348c97df44	814	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
lypinator	0:bb348c97df44	815	}
lypinator	0:bb348c97df44	816	}
lypinator	0:bb348c97df44	817	else
lypinator	0:bb348c97df44	818	{
lypinator	0:bb348c97df44	819	/* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
lypinator	0:bb348c97df44	820	if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
lypinator	0:bb348c97df44	821	{
lypinator	0:bb348c97df44	822	/* Enable the selected ADC software conversion for regular group */
lypinator	0:bb348c97df44	823	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
lypinator	0:bb348c97df44	824	}
lypinator	0:bb348c97df44	825	}
lypinator	0:bb348c97df44	826	}
lypinator	0:bb348c97df44	827
lypinator	0:bb348c97df44	828	/* Return function status */
lypinator	0:bb348c97df44	829	return HAL_OK;
lypinator	0:bb348c97df44	830	}
lypinator	0:bb348c97df44	831
lypinator	0:bb348c97df44	832	/**
lypinator	0:bb348c97df44	833	* @brief Disables the interrupt and stop ADC conversion of regular channels.
lypinator	0:bb348c97df44	834	*
lypinator	0:bb348c97df44	835	* @note Caution: This function will stop also injected channels.
lypinator	0:bb348c97df44	836	*
lypinator	0:bb348c97df44	837	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	838	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	839	* @retval HAL status.
lypinator	0:bb348c97df44	840	*/
lypinator	0:bb348c97df44	841	HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	842	{
lypinator	0:bb348c97df44	843	/* Check the parameters */
lypinator	0:bb348c97df44	844	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
lypinator	0:bb348c97df44	845
lypinator	0:bb348c97df44	846	/* Process locked */
lypinator	0:bb348c97df44	847	__HAL_LOCK(hadc);
lypinator	0:bb348c97df44	848
lypinator	0:bb348c97df44	849	/* Stop potential conversion on going, on regular and injected groups */
lypinator	0:bb348c97df44	850	/* Disable ADC peripheral */
lypinator	0:bb348c97df44	851	__HAL_ADC_DISABLE(hadc);
lypinator	0:bb348c97df44	852
lypinator	0:bb348c97df44	853	/* Check if ADC is effectively disabled */
lypinator	0:bb348c97df44	854	if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
lypinator	0:bb348c97df44	855	{
lypinator	0:bb348c97df44	856	/* Disable ADC end of conversion interrupt for regular group */
lypinator	0:bb348c97df44	857	__HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC \| ADC_IT_OVR));
lypinator	0:bb348c97df44	858
lypinator	0:bb348c97df44	859	/* Set ADC state */
lypinator	0:bb348c97df44	860	ADC_STATE_CLR_SET(hadc->State,
lypinator	0:bb348c97df44	861	HAL_ADC_STATE_REG_BUSY \| HAL_ADC_STATE_INJ_BUSY,
lypinator	0:bb348c97df44	862	HAL_ADC_STATE_READY);
lypinator	0:bb348c97df44	863	}
lypinator	0:bb348c97df44	864
lypinator	0:bb348c97df44	865	/* Process unlocked */
lypinator	0:bb348c97df44	866	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	867
lypinator	0:bb348c97df44	868	/* Return function status */
lypinator	0:bb348c97df44	869	return HAL_OK;
lypinator	0:bb348c97df44	870	}
lypinator	0:bb348c97df44	871
lypinator	0:bb348c97df44	872	/**
lypinator	0:bb348c97df44	873	* @brief Handles ADC interrupt request
lypinator	0:bb348c97df44	874	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	875	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	876	* @retval None
lypinator	0:bb348c97df44	877	*/
lypinator	0:bb348c97df44	878	void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	879	{
lypinator	0:bb348c97df44	880	uint32_t tmp1 = 0U, tmp2 = 0U;
lypinator	0:bb348c97df44	881
lypinator	0:bb348c97df44	882	/* Check the parameters */
lypinator	0:bb348c97df44	883	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
lypinator	0:bb348c97df44	884	assert_param(IS_ADC_REGULAR_LENGTH(hadc->Init.NbrOfConversion));
lypinator	0:bb348c97df44	885	assert_param(IS_ADC_EOCSelection(hadc->Init.EOCSelection));
lypinator	0:bb348c97df44	886
lypinator	0:bb348c97df44	887	tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC);
lypinator	0:bb348c97df44	888	tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC);
lypinator	0:bb348c97df44	889	/* Check End of conversion flag for regular channels */
lypinator	0:bb348c97df44	890	if(tmp1 && tmp2)
lypinator	0:bb348c97df44	891	{
lypinator	0:bb348c97df44	892	/* Update state machine on conversion status if not in error state */
lypinator	0:bb348c97df44	893	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
lypinator	0:bb348c97df44	894	{
lypinator	0:bb348c97df44	895	/* Set ADC state */
lypinator	0:bb348c97df44	896	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
lypinator	0:bb348c97df44	897	}
lypinator	0:bb348c97df44	898
lypinator	0:bb348c97df44	899	/* Determine whether any further conversion upcoming on group regular */
lypinator	0:bb348c97df44	900	/* by external trigger, continuous mode or scan sequence on going. */
lypinator	0:bb348c97df44	901	/* Note: On STM32F4, there is no independent flag of end of sequence. */
lypinator	0:bb348c97df44	902	/* The test of scan sequence on going is done either with scan */
lypinator	0:bb348c97df44	903	/* sequence disabled or with end of conversion flag set to */
lypinator	0:bb348c97df44	904	/* of end of sequence. */
lypinator	0:bb348c97df44	905	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
lypinator	0:bb348c97df44	906	(hadc->Init.ContinuousConvMode == DISABLE) &&
lypinator	0:bb348c97df44	907	(HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) \|\|
lypinator	0:bb348c97df44	908	HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
lypinator	0:bb348c97df44	909	{
lypinator	0:bb348c97df44	910	/* Disable ADC end of single conversion interrupt on group regular */
lypinator	0:bb348c97df44	911	/* Note: Overrun interrupt was enabled with EOC interrupt in */
lypinator	0:bb348c97df44	912	/* HAL_ADC_Start_IT(), but is not disabled here because can be used */
lypinator	0:bb348c97df44	913	/* by overrun IRQ process below. */
lypinator	0:bb348c97df44	914	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
lypinator	0:bb348c97df44	915
lypinator	0:bb348c97df44	916	/* Set ADC state */
lypinator	0:bb348c97df44	917	CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
lypinator	0:bb348c97df44	918
lypinator	0:bb348c97df44	919	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
lypinator	0:bb348c97df44	920	{
lypinator	0:bb348c97df44	921	SET_BIT(hadc->State, HAL_ADC_STATE_READY);
lypinator	0:bb348c97df44	922	}
lypinator	0:bb348c97df44	923	}
lypinator	0:bb348c97df44	924
lypinator	0:bb348c97df44	925	/* Conversion complete callback */
lypinator	0:bb348c97df44	926	HAL_ADC_ConvCpltCallback(hadc);
lypinator	0:bb348c97df44	927
lypinator	0:bb348c97df44	928	/* Clear regular group conversion flag */
lypinator	0:bb348c97df44	929	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT \| ADC_FLAG_EOC);
lypinator	0:bb348c97df44	930	}
lypinator	0:bb348c97df44	931
lypinator	0:bb348c97df44	932	tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC);
lypinator	0:bb348c97df44	933	tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_JEOC);
lypinator	0:bb348c97df44	934	/* Check End of conversion flag for injected channels */
lypinator	0:bb348c97df44	935	if(tmp1 && tmp2)
lypinator	0:bb348c97df44	936	{
lypinator	0:bb348c97df44	937	/* Update state machine on conversion status if not in error state */
lypinator	0:bb348c97df44	938	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
lypinator	0:bb348c97df44	939	{
lypinator	0:bb348c97df44	940	/* Set ADC state */
lypinator	0:bb348c97df44	941	SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
lypinator	0:bb348c97df44	942	}
lypinator	0:bb348c97df44	943
lypinator	0:bb348c97df44	944	/* Determine whether any further conversion upcoming on group injected */
lypinator	0:bb348c97df44	945	/* by external trigger, scan sequence on going or by automatic injected */
lypinator	0:bb348c97df44	946	/* conversion from group regular (same conditions as group regular */
lypinator	0:bb348c97df44	947	/* interruption disabling above). */
lypinator	0:bb348c97df44	948	if(ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
lypinator	0:bb348c97df44	949	(HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) \|\|
lypinator	0:bb348c97df44	950	HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) &&
lypinator	0:bb348c97df44	951	(HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
lypinator	0:bb348c97df44	952	(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
lypinator	0:bb348c97df44	953	(hadc->Init.ContinuousConvMode == DISABLE) ) ) )
lypinator	0:bb348c97df44	954	{
lypinator	0:bb348c97df44	955	/* Disable ADC end of single conversion interrupt on group injected */
lypinator	0:bb348c97df44	956	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
lypinator	0:bb348c97df44	957
lypinator	0:bb348c97df44	958	/* Set ADC state */
lypinator	0:bb348c97df44	959	CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
lypinator	0:bb348c97df44	960
lypinator	0:bb348c97df44	961	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
lypinator	0:bb348c97df44	962	{
lypinator	0:bb348c97df44	963	SET_BIT(hadc->State, HAL_ADC_STATE_READY);
lypinator	0:bb348c97df44	964	}
lypinator	0:bb348c97df44	965	}
lypinator	0:bb348c97df44	966
lypinator	0:bb348c97df44	967	/* Conversion complete callback */
lypinator	0:bb348c97df44	968	HAL_ADCEx_InjectedConvCpltCallback(hadc);
lypinator	0:bb348c97df44	969
lypinator	0:bb348c97df44	970	/* Clear injected group conversion flag */
lypinator	0:bb348c97df44	971	__HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JSTRT \| ADC_FLAG_JEOC));
lypinator	0:bb348c97df44	972	}
lypinator	0:bb348c97df44	973
lypinator	0:bb348c97df44	974	tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD);
lypinator	0:bb348c97df44	975	tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD);
lypinator	0:bb348c97df44	976	/* Check Analog watchdog flag */
lypinator	0:bb348c97df44	977	if(tmp1 && tmp2)
lypinator	0:bb348c97df44	978	{
lypinator	0:bb348c97df44	979	if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD))
lypinator	0:bb348c97df44	980	{
lypinator	0:bb348c97df44	981	/* Set ADC state */
lypinator	0:bb348c97df44	982	SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
lypinator	0:bb348c97df44	983
lypinator	0:bb348c97df44	984	/* Level out of window callback */
lypinator	0:bb348c97df44	985	HAL_ADC_LevelOutOfWindowCallback(hadc);
lypinator	0:bb348c97df44	986
lypinator	0:bb348c97df44	987	/* Clear the ADC analog watchdog flag */
lypinator	0:bb348c97df44	988	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
lypinator	0:bb348c97df44	989	}
lypinator	0:bb348c97df44	990	}
lypinator	0:bb348c97df44	991
lypinator	0:bb348c97df44	992	tmp1 = __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR);
lypinator	0:bb348c97df44	993	tmp2 = __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR);
lypinator	0:bb348c97df44	994	/* Check Overrun flag */
lypinator	0:bb348c97df44	995	if(tmp1 && tmp2)
lypinator	0:bb348c97df44	996	{
lypinator	0:bb348c97df44	997	/* Note: On STM32F4, ADC overrun can be set through other parameters */
lypinator	0:bb348c97df44	998	/* refer to description of parameter "EOCSelection" for more */
lypinator	0:bb348c97df44	999	/* details. */
lypinator	0:bb348c97df44	1000
lypinator	0:bb348c97df44	1001	/* Set ADC error code to overrun */
lypinator	0:bb348c97df44	1002	SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
lypinator	0:bb348c97df44	1003
lypinator	0:bb348c97df44	1004	/* Clear ADC overrun flag */
lypinator	0:bb348c97df44	1005	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
lypinator	0:bb348c97df44	1006
lypinator	0:bb348c97df44	1007	/* Error callback */
lypinator	0:bb348c97df44	1008	HAL_ADC_ErrorCallback(hadc);
lypinator	0:bb348c97df44	1009
lypinator	0:bb348c97df44	1010	/* Clear the Overrun flag */
lypinator	0:bb348c97df44	1011	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
lypinator	0:bb348c97df44	1012	}
lypinator	0:bb348c97df44	1013	}
lypinator	0:bb348c97df44	1014
lypinator	0:bb348c97df44	1015	/**
lypinator	0:bb348c97df44	1016	* @brief Enables ADC DMA request after last transfer (Single-ADC mode) and enables ADC peripheral
lypinator	0:bb348c97df44	1017	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1018	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1019	* @param pData The destination Buffer address.
lypinator	0:bb348c97df44	1020	* @param Length The length of data to be transferred from ADC peripheral to memory.
lypinator	0:bb348c97df44	1021	* @retval HAL status
lypinator	0:bb348c97df44	1022	*/
lypinator	0:bb348c97df44	1023	HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
lypinator	0:bb348c97df44	1024	{
lypinator	0:bb348c97df44	1025	__IO uint32_t counter = 0U;
lypinator	0:bb348c97df44	1026	ADC_Common_TypeDef *tmpADC_Common;
lypinator	0:bb348c97df44	1027
lypinator	0:bb348c97df44	1028	/* Check the parameters */
lypinator	0:bb348c97df44	1029	assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
lypinator	0:bb348c97df44	1030	assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
lypinator	0:bb348c97df44	1031
lypinator	0:bb348c97df44	1032	/* Process locked */
lypinator	0:bb348c97df44	1033	__HAL_LOCK(hadc);
lypinator	0:bb348c97df44	1034
lypinator	0:bb348c97df44	1035	/* Enable the ADC peripheral */
lypinator	0:bb348c97df44	1036	/* Check if ADC peripheral is disabled in order to enable it and wait during
lypinator	0:bb348c97df44	1037	Tstab time the ADC's stabilization */
lypinator	0:bb348c97df44	1038	if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
lypinator	0:bb348c97df44	1039	{
lypinator	0:bb348c97df44	1040	/* Enable the Peripheral */
lypinator	0:bb348c97df44	1041	__HAL_ADC_ENABLE(hadc);
lypinator	0:bb348c97df44	1042
lypinator	0:bb348c97df44	1043	/* Delay for ADC stabilization time */
lypinator	0:bb348c97df44	1044	/* Compute number of CPU cycles to wait for */
lypinator	0:bb348c97df44	1045	counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
lypinator	0:bb348c97df44	1046	while(counter != 0U)
lypinator	0:bb348c97df44	1047	{
lypinator	0:bb348c97df44	1048	counter--;
lypinator	0:bb348c97df44	1049	}
lypinator	0:bb348c97df44	1050	}
lypinator	0:bb348c97df44	1051
lypinator	0:bb348c97df44	1052	/* Start conversion if ADC is effectively enabled */
lypinator	0:bb348c97df44	1053	if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
lypinator	0:bb348c97df44	1054	{
lypinator	0:bb348c97df44	1055	/* Set ADC state */
lypinator	0:bb348c97df44	1056	/* - Clear state bitfield related to regular group conversion results */
lypinator	0:bb348c97df44	1057	/* - Set state bitfield related to regular group operation */
lypinator	0:bb348c97df44	1058	ADC_STATE_CLR_SET(hadc->State,
lypinator	0:bb348c97df44	1059	HAL_ADC_STATE_READY \| HAL_ADC_STATE_REG_EOC \| HAL_ADC_STATE_REG_OVR,
lypinator	0:bb348c97df44	1060	HAL_ADC_STATE_REG_BUSY);
lypinator	0:bb348c97df44	1061
lypinator	0:bb348c97df44	1062	/* If conversions on group regular are also triggering group injected, */
lypinator	0:bb348c97df44	1063	/* update ADC state. */
lypinator	0:bb348c97df44	1064	if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
lypinator	0:bb348c97df44	1065	{
lypinator	0:bb348c97df44	1066	ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
lypinator	0:bb348c97df44	1067	}
lypinator	0:bb348c97df44	1068
lypinator	0:bb348c97df44	1069	/* State machine update: Check if an injected conversion is ongoing */
lypinator	0:bb348c97df44	1070	if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
lypinator	0:bb348c97df44	1071	{
lypinator	0:bb348c97df44	1072	/* Reset ADC error code fields related to conversions on group regular */
lypinator	0:bb348c97df44	1073	CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR \| HAL_ADC_ERROR_DMA));
lypinator	0:bb348c97df44	1074	}
lypinator	0:bb348c97df44	1075	else
lypinator	0:bb348c97df44	1076	{
lypinator	0:bb348c97df44	1077	/* Reset ADC all error code fields */
lypinator	0:bb348c97df44	1078	ADC_CLEAR_ERRORCODE(hadc);
lypinator	0:bb348c97df44	1079	}
lypinator	0:bb348c97df44	1080
lypinator	0:bb348c97df44	1081	/* Process unlocked */
lypinator	0:bb348c97df44	1082	/* Unlock before starting ADC conversions: in case of potential */
lypinator	0:bb348c97df44	1083	/* interruption, to let the process to ADC IRQ Handler. */
lypinator	0:bb348c97df44	1084	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	1085
lypinator	0:bb348c97df44	1086	/* Pointer to the common control register to which is belonging hadc */
lypinator	0:bb348c97df44	1087	/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
lypinator	0:bb348c97df44	1088	/* control register) */
lypinator	0:bb348c97df44	1089	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
lypinator	0:bb348c97df44	1090
lypinator	0:bb348c97df44	1091	/* Set the DMA transfer complete callback */
lypinator	0:bb348c97df44	1092	hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
lypinator	0:bb348c97df44	1093
lypinator	0:bb348c97df44	1094	/* Set the DMA half transfer complete callback */
lypinator	0:bb348c97df44	1095	hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
lypinator	0:bb348c97df44	1096
lypinator	0:bb348c97df44	1097	/* Set the DMA error callback */
lypinator	0:bb348c97df44	1098	hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
lypinator	0:bb348c97df44	1099
lypinator	0:bb348c97df44	1100
lypinator	0:bb348c97df44	1101	/* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
lypinator	0:bb348c97df44	1102	/* start (in case of SW start): */
lypinator	0:bb348c97df44	1103
lypinator	0:bb348c97df44	1104	/* Clear regular group conversion flag and overrun flag */
lypinator	0:bb348c97df44	1105	/* (To ensure of no unknown state from potential previous ADC operations) */
lypinator	0:bb348c97df44	1106	__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC \| ADC_FLAG_OVR);
lypinator	0:bb348c97df44	1107
lypinator	0:bb348c97df44	1108	/* Enable ADC overrun interrupt */
lypinator	0:bb348c97df44	1109	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
lypinator	0:bb348c97df44	1110
lypinator	0:bb348c97df44	1111	/* Enable ADC DMA mode */
lypinator	0:bb348c97df44	1112	hadc->Instance->CR2 \|= ADC_CR2_DMA;
lypinator	0:bb348c97df44	1113
lypinator	0:bb348c97df44	1114	/* Start the DMA channel */
lypinator	0:bb348c97df44	1115	HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
lypinator	0:bb348c97df44	1116
lypinator	0:bb348c97df44	1117	/* Check if Multimode enabled */
lypinator	0:bb348c97df44	1118	if(HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_MULTI))
lypinator	0:bb348c97df44	1119	{
lypinator	0:bb348c97df44	1120	/* if no external trigger present enable software conversion of regular channels */
lypinator	0:bb348c97df44	1121	if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
lypinator	0:bb348c97df44	1122	{
lypinator	0:bb348c97df44	1123	/* Enable the selected ADC software conversion for regular group */
lypinator	0:bb348c97df44	1124	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
lypinator	0:bb348c97df44	1125	}
lypinator	0:bb348c97df44	1126	}
lypinator	0:bb348c97df44	1127	else
lypinator	0:bb348c97df44	1128	{
lypinator	0:bb348c97df44	1129	/* if instance of handle correspond to ADC1 and no external trigger present enable software conversion of regular channels */
lypinator	0:bb348c97df44	1130	if((hadc->Instance == ADC1) && ((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET))
lypinator	0:bb348c97df44	1131	{
lypinator	0:bb348c97df44	1132	/* Enable the selected ADC software conversion for regular group */
lypinator	0:bb348c97df44	1133	hadc->Instance->CR2 \|= (uint32_t)ADC_CR2_SWSTART;
lypinator	0:bb348c97df44	1134	}
lypinator	0:bb348c97df44	1135	}
lypinator	0:bb348c97df44	1136	}
lypinator	0:bb348c97df44	1137
lypinator	0:bb348c97df44	1138	/* Return function status */
lypinator	0:bb348c97df44	1139	return HAL_OK;
lypinator	0:bb348c97df44	1140	}
lypinator	0:bb348c97df44	1141
lypinator	0:bb348c97df44	1142	/**
lypinator	0:bb348c97df44	1143	* @brief Disables ADC DMA (Single-ADC mode) and disables ADC peripheral
lypinator	0:bb348c97df44	1144	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1145	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1146	* @retval HAL status
lypinator	0:bb348c97df44	1147	*/
lypinator	0:bb348c97df44	1148	HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	1149	{
lypinator	0:bb348c97df44	1150	HAL_StatusTypeDef tmp_hal_status = HAL_OK;
lypinator	0:bb348c97df44	1151
lypinator	0:bb348c97df44	1152	/* Check the parameters */
lypinator	0:bb348c97df44	1153	assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
lypinator	0:bb348c97df44	1154
lypinator	0:bb348c97df44	1155	/* Process locked */
lypinator	0:bb348c97df44	1156	__HAL_LOCK(hadc);
lypinator	0:bb348c97df44	1157
lypinator	0:bb348c97df44	1158	/* Stop potential conversion on going, on regular and injected groups */
lypinator	0:bb348c97df44	1159	/* Disable ADC peripheral */
lypinator	0:bb348c97df44	1160	__HAL_ADC_DISABLE(hadc);
lypinator	0:bb348c97df44	1161
lypinator	0:bb348c97df44	1162	/* Check if ADC is effectively disabled */
lypinator	0:bb348c97df44	1163	if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
lypinator	0:bb348c97df44	1164	{
lypinator	0:bb348c97df44	1165	/* Disable the selected ADC DMA mode */
lypinator	0:bb348c97df44	1166	hadc->Instance->CR2 &= ~ADC_CR2_DMA;
lypinator	0:bb348c97df44	1167
lypinator	0:bb348c97df44	1168	/* Disable the DMA channel (in case of DMA in circular mode or stop while */
lypinator	0:bb348c97df44	1169	/* DMA transfer is on going) */
lypinator	0:bb348c97df44	1170	tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
lypinator	0:bb348c97df44	1171
lypinator	0:bb348c97df44	1172	/* Disable ADC overrun interrupt */
lypinator	0:bb348c97df44	1173	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
lypinator	0:bb348c97df44	1174
lypinator	0:bb348c97df44	1175	/* Set ADC state */
lypinator	0:bb348c97df44	1176	ADC_STATE_CLR_SET(hadc->State,
lypinator	0:bb348c97df44	1177	HAL_ADC_STATE_REG_BUSY \| HAL_ADC_STATE_INJ_BUSY,
lypinator	0:bb348c97df44	1178	HAL_ADC_STATE_READY);
lypinator	0:bb348c97df44	1179	}
lypinator	0:bb348c97df44	1180
lypinator	0:bb348c97df44	1181	/* Process unlocked */
lypinator	0:bb348c97df44	1182	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	1183
lypinator	0:bb348c97df44	1184	/* Return function status */
lypinator	0:bb348c97df44	1185	return tmp_hal_status;
lypinator	0:bb348c97df44	1186	}
lypinator	0:bb348c97df44	1187
lypinator	0:bb348c97df44	1188	/**
lypinator	0:bb348c97df44	1189	* @brief Gets the converted value from data register of regular channel.
lypinator	0:bb348c97df44	1190	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1191	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1192	* @retval Converted value
lypinator	0:bb348c97df44	1193	*/
lypinator	0:bb348c97df44	1194	uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	1195	{
lypinator	0:bb348c97df44	1196	/* Return the selected ADC converted value */
lypinator	0:bb348c97df44	1197	return hadc->Instance->DR;
lypinator	0:bb348c97df44	1198	}
lypinator	0:bb348c97df44	1199
lypinator	0:bb348c97df44	1200	/**
lypinator	0:bb348c97df44	1201	* @brief Regular conversion complete callback in non blocking mode
lypinator	0:bb348c97df44	1202	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1203	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1204	* @retval None
lypinator	0:bb348c97df44	1205	*/
lypinator	0:bb348c97df44	1206	__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	1207	{
lypinator	0:bb348c97df44	1208	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	1209	UNUSED(hadc);
lypinator	0:bb348c97df44	1210	/* NOTE : This function Should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	1211	the HAL_ADC_ConvCpltCallback could be implemented in the user file
lypinator	0:bb348c97df44	1212	*/
lypinator	0:bb348c97df44	1213	}
lypinator	0:bb348c97df44	1214
lypinator	0:bb348c97df44	1215	/**
lypinator	0:bb348c97df44	1216	* @brief Regular conversion half DMA transfer callback in non blocking mode
lypinator	0:bb348c97df44	1217	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1218	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1219	* @retval None
lypinator	0:bb348c97df44	1220	*/
lypinator	0:bb348c97df44	1221	__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	1222	{
lypinator	0:bb348c97df44	1223	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	1224	UNUSED(hadc);
lypinator	0:bb348c97df44	1225	/* NOTE : This function Should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	1226	the HAL_ADC_ConvHalfCpltCallback could be implemented in the user file
lypinator	0:bb348c97df44	1227	*/
lypinator	0:bb348c97df44	1228	}
lypinator	0:bb348c97df44	1229
lypinator	0:bb348c97df44	1230	/**
lypinator	0:bb348c97df44	1231	* @brief Analog watchdog callback in non blocking mode
lypinator	0:bb348c97df44	1232	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1233	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1234	* @retval None
lypinator	0:bb348c97df44	1235	*/
lypinator	0:bb348c97df44	1236	__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	1237	{
lypinator	0:bb348c97df44	1238	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	1239	UNUSED(hadc);
lypinator	0:bb348c97df44	1240	/* NOTE : This function Should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	1241	the HAL_ADC_LevelOoutOfWindowCallback could be implemented in the user file
lypinator	0:bb348c97df44	1242	*/
lypinator	0:bb348c97df44	1243	}
lypinator	0:bb348c97df44	1244
lypinator	0:bb348c97df44	1245	/**
lypinator	0:bb348c97df44	1246	* @brief Error ADC callback.
lypinator	0:bb348c97df44	1247	* @note In case of error due to overrun when using ADC with DMA transfer
lypinator	0:bb348c97df44	1248	* (HAL ADC handle paramater "ErrorCode" to state "HAL_ADC_ERROR_OVR"):
lypinator	0:bb348c97df44	1249	* - Reinitialize the DMA using function "HAL_ADC_Stop_DMA()".
lypinator	0:bb348c97df44	1250	* - If needed, restart a new ADC conversion using function
lypinator	0:bb348c97df44	1251	* "HAL_ADC_Start_DMA()"
lypinator	0:bb348c97df44	1252	* (this function is also clearing overrun flag)
lypinator	0:bb348c97df44	1253	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1254	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1255	* @retval None
lypinator	0:bb348c97df44	1256	*/
lypinator	0:bb348c97df44	1257	__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
lypinator	0:bb348c97df44	1258	{
lypinator	0:bb348c97df44	1259	/* Prevent unused argument(s) compilation warning */
lypinator	0:bb348c97df44	1260	UNUSED(hadc);
lypinator	0:bb348c97df44	1261	/* NOTE : This function Should not be modified, when the callback is needed,
lypinator	0:bb348c97df44	1262	the HAL_ADC_ErrorCallback could be implemented in the user file
lypinator	0:bb348c97df44	1263	*/
lypinator	0:bb348c97df44	1264	}
lypinator	0:bb348c97df44	1265
lypinator	0:bb348c97df44	1266	/**
lypinator	0:bb348c97df44	1267	* @}
lypinator	0:bb348c97df44	1268	*/
lypinator	0:bb348c97df44	1269
lypinator	0:bb348c97df44	1270	/** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
lypinator	0:bb348c97df44	1271	* @brief Peripheral Control functions
lypinator	0:bb348c97df44	1272	*
lypinator	0:bb348c97df44	1273	@verbatim
lypinator	0:bb348c97df44	1274	===============================================================================
lypinator	0:bb348c97df44	1275	##### Peripheral Control functions #####
lypinator	0:bb348c97df44	1276	===============================================================================
lypinator	0:bb348c97df44	1277	[..] This section provides functions allowing to:
lypinator	0:bb348c97df44	1278	(+) Configure regular channels.
lypinator	0:bb348c97df44	1279	(+) Configure injected channels.
lypinator	0:bb348c97df44	1280	(+) Configure multimode.
lypinator	0:bb348c97df44	1281	(+) Configure the analog watch dog.
lypinator	0:bb348c97df44	1282
lypinator	0:bb348c97df44	1283	@endverbatim
lypinator	0:bb348c97df44	1284	* @{
lypinator	0:bb348c97df44	1285	*/
lypinator	0:bb348c97df44	1286
lypinator	0:bb348c97df44	1287	/**
lypinator	0:bb348c97df44	1288	* @brief Configures for the selected ADC regular channel its corresponding
lypinator	0:bb348c97df44	1289	* rank in the sequencer and its sample time.
lypinator	0:bb348c97df44	1290	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1291	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1292	* @param sConfig ADC configuration structure.
lypinator	0:bb348c97df44	1293	* @retval HAL status
lypinator	0:bb348c97df44	1294	*/
lypinator	0:bb348c97df44	1295	HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
lypinator	0:bb348c97df44	1296	{
lypinator	0:bb348c97df44	1297	__IO uint32_t counter = 0U;
lypinator	0:bb348c97df44	1298	ADC_Common_TypeDef *tmpADC_Common;
lypinator	0:bb348c97df44	1299
lypinator	0:bb348c97df44	1300	/* Check the parameters */
lypinator	0:bb348c97df44	1301	assert_param(IS_ADC_CHANNEL(sConfig->Channel));
lypinator	0:bb348c97df44	1302	assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
lypinator	0:bb348c97df44	1303	assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
lypinator	0:bb348c97df44	1304
lypinator	0:bb348c97df44	1305	/* Process locked */
lypinator	0:bb348c97df44	1306	__HAL_LOCK(hadc);
lypinator	0:bb348c97df44	1307
lypinator	0:bb348c97df44	1308	/* if ADC_Channel_10 ... ADC_Channel_18 is selected */
lypinator	0:bb348c97df44	1309	if (sConfig->Channel > ADC_CHANNEL_9)
lypinator	0:bb348c97df44	1310	{
lypinator	0:bb348c97df44	1311	/* Clear the old sample time */
lypinator	0:bb348c97df44	1312	hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel);
lypinator	0:bb348c97df44	1313
lypinator	0:bb348c97df44	1314	/* Set the new sample time */
lypinator	0:bb348c97df44	1315	hadc->Instance->SMPR1 \|= ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel);
lypinator	0:bb348c97df44	1316	}
lypinator	0:bb348c97df44	1317	else /* ADC_Channel include in ADC_Channel_[0..9] */
lypinator	0:bb348c97df44	1318	{
lypinator	0:bb348c97df44	1319	/* Clear the old sample time */
lypinator	0:bb348c97df44	1320	hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfig->Channel);
lypinator	0:bb348c97df44	1321
lypinator	0:bb348c97df44	1322	/* Set the new sample time */
lypinator	0:bb348c97df44	1323	hadc->Instance->SMPR2 \|= ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel);
lypinator	0:bb348c97df44	1324	}
lypinator	0:bb348c97df44	1325
lypinator	0:bb348c97df44	1326	/* For Rank 1 to 6 */
lypinator	0:bb348c97df44	1327	if (sConfig->Rank < 7U)
lypinator	0:bb348c97df44	1328	{
lypinator	0:bb348c97df44	1329	/* Clear the old SQx bits for the selected rank */
lypinator	0:bb348c97df44	1330	hadc->Instance->SQR3 &= ~ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank);
lypinator	0:bb348c97df44	1331
lypinator	0:bb348c97df44	1332	/* Set the SQx bits for the selected rank */
lypinator	0:bb348c97df44	1333	hadc->Instance->SQR3 \|= ADC_SQR3_RK(sConfig->Channel, sConfig->Rank);
lypinator	0:bb348c97df44	1334	}
lypinator	0:bb348c97df44	1335	/* For Rank 7 to 12 */
lypinator	0:bb348c97df44	1336	else if (sConfig->Rank < 13U)
lypinator	0:bb348c97df44	1337	{
lypinator	0:bb348c97df44	1338	/* Clear the old SQx bits for the selected rank */
lypinator	0:bb348c97df44	1339	hadc->Instance->SQR2 &= ~ADC_SQR2_RK(ADC_SQR2_SQ7, sConfig->Rank);
lypinator	0:bb348c97df44	1340
lypinator	0:bb348c97df44	1341	/* Set the SQx bits for the selected rank */
lypinator	0:bb348c97df44	1342	hadc->Instance->SQR2 \|= ADC_SQR2_RK(sConfig->Channel, sConfig->Rank);
lypinator	0:bb348c97df44	1343	}
lypinator	0:bb348c97df44	1344	/* For Rank 13 to 16 */
lypinator	0:bb348c97df44	1345	else
lypinator	0:bb348c97df44	1346	{
lypinator	0:bb348c97df44	1347	/* Clear the old SQx bits for the selected rank */
lypinator	0:bb348c97df44	1348	hadc->Instance->SQR1 &= ~ADC_SQR1_RK(ADC_SQR1_SQ13, sConfig->Rank);
lypinator	0:bb348c97df44	1349
lypinator	0:bb348c97df44	1350	/* Set the SQx bits for the selected rank */
lypinator	0:bb348c97df44	1351	hadc->Instance->SQR1 \|= ADC_SQR1_RK(sConfig->Channel, sConfig->Rank);
lypinator	0:bb348c97df44	1352	}
lypinator	0:bb348c97df44	1353
lypinator	0:bb348c97df44	1354	/* Pointer to the common control register to which is belonging hadc */
lypinator	0:bb348c97df44	1355	/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
lypinator	0:bb348c97df44	1356	/* control register) */
lypinator	0:bb348c97df44	1357	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
lypinator	0:bb348c97df44	1358
lypinator	0:bb348c97df44	1359	/* if ADC1 Channel_18 is selected enable VBAT Channel */
lypinator	0:bb348c97df44	1360	if ((hadc->Instance == ADC1) && (sConfig->Channel == ADC_CHANNEL_VBAT))
lypinator	0:bb348c97df44	1361	{
lypinator	0:bb348c97df44	1362	/* Enable the VBAT channel*/
lypinator	0:bb348c97df44	1363	tmpADC_Common->CCR \|= ADC_CCR_VBATE;
lypinator	0:bb348c97df44	1364	}
lypinator	0:bb348c97df44	1365
lypinator	0:bb348c97df44	1366	/* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
lypinator	0:bb348c97df44	1367	if ((hadc->Instance == ADC1) && ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) \|\| (sConfig->Channel == ADC_CHANNEL_VREFINT)))
lypinator	0:bb348c97df44	1368	{
lypinator	0:bb348c97df44	1369	/* Enable the TSVREFE channel*/
lypinator	0:bb348c97df44	1370	tmpADC_Common->CCR \|= ADC_CCR_TSVREFE;
lypinator	0:bb348c97df44	1371
lypinator	0:bb348c97df44	1372	if((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR))
lypinator	0:bb348c97df44	1373	{
lypinator	0:bb348c97df44	1374	/* Delay for temperature sensor stabilization time */
lypinator	0:bb348c97df44	1375	/* Compute number of CPU cycles to wait for */
lypinator	0:bb348c97df44	1376	counter = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
lypinator	0:bb348c97df44	1377	while(counter != 0U)
lypinator	0:bb348c97df44	1378	{
lypinator	0:bb348c97df44	1379	counter--;
lypinator	0:bb348c97df44	1380	}
lypinator	0:bb348c97df44	1381	}
lypinator	0:bb348c97df44	1382	}
lypinator	0:bb348c97df44	1383
lypinator	0:bb348c97df44	1384	/* Process unlocked */
lypinator	0:bb348c97df44	1385	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	1386
lypinator	0:bb348c97df44	1387	/* Return function status */
lypinator	0:bb348c97df44	1388	return HAL_OK;
lypinator	0:bb348c97df44	1389	}
lypinator	0:bb348c97df44	1390
lypinator	0:bb348c97df44	1391	/**
lypinator	0:bb348c97df44	1392	* @brief Configures the analog watchdog.
lypinator	0:bb348c97df44	1393	* @note Analog watchdog thresholds can be modified while ADC conversion
lypinator	0:bb348c97df44	1394	* is on going.
lypinator	0:bb348c97df44	1395	* In this case, some constraints must be taken into account:
lypinator	0:bb348c97df44	1396	* The programmed threshold values are effective from the next
lypinator	0:bb348c97df44	1397	* ADC EOC (end of unitary conversion).
lypinator	0:bb348c97df44	1398	* Considering that registers write delay may happen due to
lypinator	0:bb348c97df44	1399	* bus activity, this might cause an uncertainty on the
lypinator	0:bb348c97df44	1400	* effective timing of the new programmed threshold values.
lypinator	0:bb348c97df44	1401	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1402	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1403	* @param AnalogWDGConfig pointer to an ADC_AnalogWDGConfTypeDef structure
lypinator	0:bb348c97df44	1404	* that contains the configuration information of ADC analog watchdog.
lypinator	0:bb348c97df44	1405	* @retval HAL status
lypinator	0:bb348c97df44	1406	*/
lypinator	0:bb348c97df44	1407	HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
lypinator	0:bb348c97df44	1408	{
lypinator	0:bb348c97df44	1409	#ifdef USE_FULL_ASSERT
lypinator	0:bb348c97df44	1410	uint32_t tmp = 0U;
lypinator	0:bb348c97df44	1411	#endif /* USE_FULL_ASSERT */
lypinator	0:bb348c97df44	1412
lypinator	0:bb348c97df44	1413	/* Check the parameters */
lypinator	0:bb348c97df44	1414	assert_param(IS_ADC_ANALOG_WATCHDOG(AnalogWDGConfig->WatchdogMode));
lypinator	0:bb348c97df44	1415	assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
lypinator	0:bb348c97df44	1416	assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
lypinator	0:bb348c97df44	1417
lypinator	0:bb348c97df44	1418	#ifdef USE_FULL_ASSERT
lypinator	0:bb348c97df44	1419	tmp = ADC_GET_RESOLUTION(hadc);
lypinator	0:bb348c97df44	1420	assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->HighThreshold));
lypinator	0:bb348c97df44	1421	assert_param(IS_ADC_RANGE(tmp, AnalogWDGConfig->LowThreshold));
lypinator	0:bb348c97df44	1422	#endif /* USE_FULL_ASSERT */
lypinator	0:bb348c97df44	1423
lypinator	0:bb348c97df44	1424	/* Process locked */
lypinator	0:bb348c97df44	1425	__HAL_LOCK(hadc);
lypinator	0:bb348c97df44	1426
lypinator	0:bb348c97df44	1427	if(AnalogWDGConfig->ITMode == ENABLE)
lypinator	0:bb348c97df44	1428	{
lypinator	0:bb348c97df44	1429	/* Enable the ADC Analog watchdog interrupt */
lypinator	0:bb348c97df44	1430	__HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
lypinator	0:bb348c97df44	1431	}
lypinator	0:bb348c97df44	1432	else
lypinator	0:bb348c97df44	1433	{
lypinator	0:bb348c97df44	1434	/* Disable the ADC Analog watchdog interrupt */
lypinator	0:bb348c97df44	1435	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
lypinator	0:bb348c97df44	1436	}
lypinator	0:bb348c97df44	1437
lypinator	0:bb348c97df44	1438	/* Clear AWDEN, JAWDEN and AWDSGL bits */
lypinator	0:bb348c97df44	1439	hadc->Instance->CR1 &= ~(ADC_CR1_AWDSGL \| ADC_CR1_JAWDEN \| ADC_CR1_AWDEN);
lypinator	0:bb348c97df44	1440
lypinator	0:bb348c97df44	1441	/* Set the analog watchdog enable mode */
lypinator	0:bb348c97df44	1442	hadc->Instance->CR1 \|= AnalogWDGConfig->WatchdogMode;
lypinator	0:bb348c97df44	1443
lypinator	0:bb348c97df44	1444	/* Set the high threshold */
lypinator	0:bb348c97df44	1445	hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
lypinator	0:bb348c97df44	1446
lypinator	0:bb348c97df44	1447	/* Set the low threshold */
lypinator	0:bb348c97df44	1448	hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
lypinator	0:bb348c97df44	1449
lypinator	0:bb348c97df44	1450	/* Clear the Analog watchdog channel select bits */
lypinator	0:bb348c97df44	1451	hadc->Instance->CR1 &= ~ADC_CR1_AWDCH;
lypinator	0:bb348c97df44	1452
lypinator	0:bb348c97df44	1453	/* Set the Analog watchdog channel */
lypinator	0:bb348c97df44	1454	hadc->Instance->CR1 \|= (uint32_t)((uint16_t)(AnalogWDGConfig->Channel));
lypinator	0:bb348c97df44	1455
lypinator	0:bb348c97df44	1456	/* Process unlocked */
lypinator	0:bb348c97df44	1457	__HAL_UNLOCK(hadc);
lypinator	0:bb348c97df44	1458
lypinator	0:bb348c97df44	1459	/* Return function status */
lypinator	0:bb348c97df44	1460	return HAL_OK;
lypinator	0:bb348c97df44	1461	}
lypinator	0:bb348c97df44	1462
lypinator	0:bb348c97df44	1463	/**
lypinator	0:bb348c97df44	1464	* @}
lypinator	0:bb348c97df44	1465	*/
lypinator	0:bb348c97df44	1466
lypinator	0:bb348c97df44	1467	/** @defgroup ADC_Exported_Functions_Group4 ADC Peripheral State functions
lypinator	0:bb348c97df44	1468	* @brief ADC Peripheral State functions
lypinator	0:bb348c97df44	1469	*
lypinator	0:bb348c97df44	1470	@verbatim
lypinator	0:bb348c97df44	1471	===============================================================================
lypinator	0:bb348c97df44	1472	##### Peripheral State and errors functions #####
lypinator	0:bb348c97df44	1473	===============================================================================
lypinator	0:bb348c97df44	1474	[..]
lypinator	0:bb348c97df44	1475	This subsection provides functions allowing to
lypinator	0:bb348c97df44	1476	(+) Check the ADC state
lypinator	0:bb348c97df44	1477	(+) Check the ADC Error
lypinator	0:bb348c97df44	1478
lypinator	0:bb348c97df44	1479	@endverbatim
lypinator	0:bb348c97df44	1480	* @{
lypinator	0:bb348c97df44	1481	*/
lypinator	0:bb348c97df44	1482
lypinator	0:bb348c97df44	1483	/**
lypinator	0:bb348c97df44	1484	* @brief return the ADC state
lypinator	0:bb348c97df44	1485	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1486	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1487	* @retval HAL state
lypinator	0:bb348c97df44	1488	*/
lypinator	0:bb348c97df44	1489	uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	1490	{
lypinator	0:bb348c97df44	1491	/* Return ADC state */
lypinator	0:bb348c97df44	1492	return hadc->State;
lypinator	0:bb348c97df44	1493	}
lypinator	0:bb348c97df44	1494
lypinator	0:bb348c97df44	1495	/**
lypinator	0:bb348c97df44	1496	* @brief Return the ADC error code
lypinator	0:bb348c97df44	1497	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1498	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1499	* @retval ADC Error Code
lypinator	0:bb348c97df44	1500	*/
lypinator	0:bb348c97df44	1501	uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
lypinator	0:bb348c97df44	1502	{
lypinator	0:bb348c97df44	1503	return hadc->ErrorCode;
lypinator	0:bb348c97df44	1504	}
lypinator	0:bb348c97df44	1505
lypinator	0:bb348c97df44	1506	/**
lypinator	0:bb348c97df44	1507	* @}
lypinator	0:bb348c97df44	1508	*/
lypinator	0:bb348c97df44	1509
lypinator	0:bb348c97df44	1510	/** @addtogroup ADC_Private_Functions
lypinator	0:bb348c97df44	1511	* @{
lypinator	0:bb348c97df44	1512	*/
lypinator	0:bb348c97df44	1513
lypinator	0:bb348c97df44	1514	/**
lypinator	0:bb348c97df44	1515	* @brief Initializes the ADCx peripheral according to the specified parameters
lypinator	0:bb348c97df44	1516	* in the ADC_InitStruct without initializing the ADC MSP.
lypinator	0:bb348c97df44	1517	* @param hadc pointer to a ADC_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1518	* the configuration information for the specified ADC.
lypinator	0:bb348c97df44	1519	* @retval None
lypinator	0:bb348c97df44	1520	*/
lypinator	0:bb348c97df44	1521	static void ADC_Init(ADC_HandleTypeDef* hadc)
lypinator	0:bb348c97df44	1522	{
lypinator	0:bb348c97df44	1523	ADC_Common_TypeDef *tmpADC_Common;
lypinator	0:bb348c97df44	1524
lypinator	0:bb348c97df44	1525	/* Set ADC parameters */
lypinator	0:bb348c97df44	1526	/* Pointer to the common control register to which is belonging hadc */
lypinator	0:bb348c97df44	1527	/* (Depending on STM32F4 product, there may be up to 3 ADCs and 1 common */
lypinator	0:bb348c97df44	1528	/* control register) */
lypinator	0:bb348c97df44	1529	tmpADC_Common = ADC_COMMON_REGISTER(hadc);
lypinator	0:bb348c97df44	1530
lypinator	0:bb348c97df44	1531	/* Set the ADC clock prescaler */
lypinator	0:bb348c97df44	1532	tmpADC_Common->CCR &= ~(ADC_CCR_ADCPRE);
lypinator	0:bb348c97df44	1533	tmpADC_Common->CCR \|= hadc->Init.ClockPrescaler;
lypinator	0:bb348c97df44	1534
lypinator	0:bb348c97df44	1535	/* Set ADC scan mode */
lypinator	0:bb348c97df44	1536	hadc->Instance->CR1 &= ~(ADC_CR1_SCAN);
lypinator	0:bb348c97df44	1537	hadc->Instance->CR1 \|= ADC_CR1_SCANCONV(hadc->Init.ScanConvMode);
lypinator	0:bb348c97df44	1538
lypinator	0:bb348c97df44	1539	/* Set ADC resolution */
lypinator	0:bb348c97df44	1540	hadc->Instance->CR1 &= ~(ADC_CR1_RES);
lypinator	0:bb348c97df44	1541	hadc->Instance->CR1 \|= hadc->Init.Resolution;
lypinator	0:bb348c97df44	1542
lypinator	0:bb348c97df44	1543	/* Set ADC data alignment */
lypinator	0:bb348c97df44	1544	hadc->Instance->CR2 &= ~(ADC_CR2_ALIGN);
lypinator	0:bb348c97df44	1545	hadc->Instance->CR2 \|= hadc->Init.DataAlign;
lypinator	0:bb348c97df44	1546
lypinator	0:bb348c97df44	1547	/* Enable external trigger if trigger selection is different of software */
lypinator	0:bb348c97df44	1548	/* start. */
lypinator	0:bb348c97df44	1549	/* Note: This configuration keeps the hardware feature of parameter */
lypinator	0:bb348c97df44	1550	/* ExternalTrigConvEdge "trigger edge none" equivalent to */
lypinator	0:bb348c97df44	1551	/* software start. */
lypinator	0:bb348c97df44	1552	if(hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
lypinator	0:bb348c97df44	1553	{
lypinator	0:bb348c97df44	1554	/* Select external trigger to start conversion */
lypinator	0:bb348c97df44	1555	hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
lypinator	0:bb348c97df44	1556	hadc->Instance->CR2 \|= hadc->Init.ExternalTrigConv;
lypinator	0:bb348c97df44	1557
lypinator	0:bb348c97df44	1558	/* Select external trigger polarity */
lypinator	0:bb348c97df44	1559	hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
lypinator	0:bb348c97df44	1560	hadc->Instance->CR2 \|= hadc->Init.ExternalTrigConvEdge;
lypinator	0:bb348c97df44	1561	}
lypinator	0:bb348c97df44	1562	else
lypinator	0:bb348c97df44	1563	{
lypinator	0:bb348c97df44	1564	/* Reset the external trigger */
lypinator	0:bb348c97df44	1565	hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
lypinator	0:bb348c97df44	1566	hadc->Instance->CR2 &= ~(ADC_CR2_EXTEN);
lypinator	0:bb348c97df44	1567	}
lypinator	0:bb348c97df44	1568
lypinator	0:bb348c97df44	1569	/* Enable or disable ADC continuous conversion mode */
lypinator	0:bb348c97df44	1570	hadc->Instance->CR2 &= ~(ADC_CR2_CONT);
lypinator	0:bb348c97df44	1571	hadc->Instance->CR2 \|= ADC_CR2_CONTINUOUS(hadc->Init.ContinuousConvMode);
lypinator	0:bb348c97df44	1572
lypinator	0:bb348c97df44	1573	if(hadc->Init.DiscontinuousConvMode != DISABLE)
lypinator	0:bb348c97df44	1574	{
lypinator	0:bb348c97df44	1575	assert_param(IS_ADC_REGULAR_DISC_NUMBER(hadc->Init.NbrOfDiscConversion));
lypinator	0:bb348c97df44	1576
lypinator	0:bb348c97df44	1577	/* Enable the selected ADC regular discontinuous mode */
lypinator	0:bb348c97df44	1578	hadc->Instance->CR1 \|= (uint32_t)ADC_CR1_DISCEN;
lypinator	0:bb348c97df44	1579
lypinator	0:bb348c97df44	1580	/* Set the number of channels to be converted in discontinuous mode */
lypinator	0:bb348c97df44	1581	hadc->Instance->CR1 &= ~(ADC_CR1_DISCNUM);
lypinator	0:bb348c97df44	1582	hadc->Instance->CR1 \|= ADC_CR1_DISCONTINUOUS(hadc->Init.NbrOfDiscConversion);
lypinator	0:bb348c97df44	1583	}
lypinator	0:bb348c97df44	1584	else
lypinator	0:bb348c97df44	1585	{
lypinator	0:bb348c97df44	1586	/* Disable the selected ADC regular discontinuous mode */
lypinator	0:bb348c97df44	1587	hadc->Instance->CR1 &= ~(ADC_CR1_DISCEN);
lypinator	0:bb348c97df44	1588	}
lypinator	0:bb348c97df44	1589
lypinator	0:bb348c97df44	1590	/* Set ADC number of conversion */
lypinator	0:bb348c97df44	1591	hadc->Instance->SQR1 &= ~(ADC_SQR1_L);
lypinator	0:bb348c97df44	1592	hadc->Instance->SQR1 \|= ADC_SQR1(hadc->Init.NbrOfConversion);
lypinator	0:bb348c97df44	1593
lypinator	0:bb348c97df44	1594	/* Enable or disable ADC DMA continuous request */
lypinator	0:bb348c97df44	1595	hadc->Instance->CR2 &= ~(ADC_CR2_DDS);
lypinator	0:bb348c97df44	1596	hadc->Instance->CR2 \|= ADC_CR2_DMAContReq(hadc->Init.DMAContinuousRequests);
lypinator	0:bb348c97df44	1597
lypinator	0:bb348c97df44	1598	/* Enable or disable ADC end of conversion selection */
lypinator	0:bb348c97df44	1599	hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
lypinator	0:bb348c97df44	1600	hadc->Instance->CR2 \|= ADC_CR2_EOCSelection(hadc->Init.EOCSelection);
lypinator	0:bb348c97df44	1601	}
lypinator	0:bb348c97df44	1602
lypinator	0:bb348c97df44	1603	/**
lypinator	0:bb348c97df44	1604	* @brief DMA transfer complete callback.
lypinator	0:bb348c97df44	1605	* @param hdma pointer to a DMA_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1606	* the configuration information for the specified DMA module.
lypinator	0:bb348c97df44	1607	* @retval None
lypinator	0:bb348c97df44	1608	*/
lypinator	0:bb348c97df44	1609	static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
lypinator	0:bb348c97df44	1610	{
lypinator	0:bb348c97df44	1611	/* Retrieve ADC handle corresponding to current DMA handle */
lypinator	0:bb348c97df44	1612	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator	0:bb348c97df44	1613
lypinator	0:bb348c97df44	1614	/* Update state machine on conversion status if not in error state */
lypinator	0:bb348c97df44	1615	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL \| HAL_ADC_STATE_ERROR_DMA))
lypinator	0:bb348c97df44	1616	{
lypinator	0:bb348c97df44	1617	/* Update ADC state machine */
lypinator	0:bb348c97df44	1618	SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
lypinator	0:bb348c97df44	1619
lypinator	0:bb348c97df44	1620	/* Determine whether any further conversion upcoming on group regular */
lypinator	0:bb348c97df44	1621	/* by external trigger, continuous mode or scan sequence on going. */
lypinator	0:bb348c97df44	1622	/* Note: On STM32F4, there is no independent flag of end of sequence. */
lypinator	0:bb348c97df44	1623	/* The test of scan sequence on going is done either with scan */
lypinator	0:bb348c97df44	1624	/* sequence disabled or with end of conversion flag set to */
lypinator	0:bb348c97df44	1625	/* of end of sequence. */
lypinator	0:bb348c97df44	1626	if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
lypinator	0:bb348c97df44	1627	(hadc->Init.ContinuousConvMode == DISABLE) &&
lypinator	0:bb348c97df44	1628	(HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) \|\|
lypinator	0:bb348c97df44	1629	HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
lypinator	0:bb348c97df44	1630	{
lypinator	0:bb348c97df44	1631	/* Disable ADC end of single conversion interrupt on group regular */
lypinator	0:bb348c97df44	1632	/* Note: Overrun interrupt was enabled with EOC interrupt in */
lypinator	0:bb348c97df44	1633	/* HAL_ADC_Start_IT(), but is not disabled here because can be used */
lypinator	0:bb348c97df44	1634	/* by overrun IRQ process below. */
lypinator	0:bb348c97df44	1635	__HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
lypinator	0:bb348c97df44	1636
lypinator	0:bb348c97df44	1637	/* Set ADC state */
lypinator	0:bb348c97df44	1638	CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
lypinator	0:bb348c97df44	1639
lypinator	0:bb348c97df44	1640	if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
lypinator	0:bb348c97df44	1641	{
lypinator	0:bb348c97df44	1642	SET_BIT(hadc->State, HAL_ADC_STATE_READY);
lypinator	0:bb348c97df44	1643	}
lypinator	0:bb348c97df44	1644	}
lypinator	0:bb348c97df44	1645
lypinator	0:bb348c97df44	1646	/* Conversion complete callback */
lypinator	0:bb348c97df44	1647	HAL_ADC_ConvCpltCallback(hadc);
lypinator	0:bb348c97df44	1648	}
lypinator	0:bb348c97df44	1649	else
lypinator	0:bb348c97df44	1650	{
lypinator	0:bb348c97df44	1651	/* Call DMA error callback */
lypinator	0:bb348c97df44	1652	hadc->DMA_Handle->XferErrorCallback(hdma);
lypinator	0:bb348c97df44	1653	}
lypinator	0:bb348c97df44	1654	}
lypinator	0:bb348c97df44	1655
lypinator	0:bb348c97df44	1656	/**
lypinator	0:bb348c97df44	1657	* @brief DMA half transfer complete callback.
lypinator	0:bb348c97df44	1658	* @param hdma pointer to a DMA_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1659	* the configuration information for the specified DMA module.
lypinator	0:bb348c97df44	1660	* @retval None
lypinator	0:bb348c97df44	1661	*/
lypinator	0:bb348c97df44	1662	static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
lypinator	0:bb348c97df44	1663	{
lypinator	0:bb348c97df44	1664	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator	0:bb348c97df44	1665	/* Conversion complete callback */
lypinator	0:bb348c97df44	1666	HAL_ADC_ConvHalfCpltCallback(hadc);
lypinator	0:bb348c97df44	1667	}
lypinator	0:bb348c97df44	1668
lypinator	0:bb348c97df44	1669	/**
lypinator	0:bb348c97df44	1670	* @brief DMA error callback
lypinator	0:bb348c97df44	1671	* @param hdma pointer to a DMA_HandleTypeDef structure that contains
lypinator	0:bb348c97df44	1672	* the configuration information for the specified DMA module.
lypinator	0:bb348c97df44	1673	* @retval None
lypinator	0:bb348c97df44	1674	*/
lypinator	0:bb348c97df44	1675	static void ADC_DMAError(DMA_HandleTypeDef *hdma)
lypinator	0:bb348c97df44	1676	{
lypinator	0:bb348c97df44	1677	ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
lypinator	0:bb348c97df44	1678	hadc->State= HAL_ADC_STATE_ERROR_DMA;
lypinator	0:bb348c97df44	1679	/* Set ADC error code to DMA error */
lypinator	0:bb348c97df44	1680	hadc->ErrorCode \|= HAL_ADC_ERROR_DMA;
lypinator	0:bb348c97df44	1681	HAL_ADC_ErrorCallback(hadc);
lypinator	0:bb348c97df44	1682	}
lypinator	0:bb348c97df44	1683
lypinator	0:bb348c97df44	1684	/**
lypinator	0:bb348c97df44	1685	* @}
lypinator	0:bb348c97df44	1686	*/
lypinator	0:bb348c97df44	1687
lypinator	0:bb348c97df44	1688	/**
lypinator	0:bb348c97df44	1689	* @}
lypinator	0:bb348c97df44	1690	*/
lypinator	0:bb348c97df44	1691
lypinator	0:bb348c97df44	1692	#endif /* HAL_ADC_MODULE_ENABLED */
lypinator	0:bb348c97df44	1693	/**
lypinator	0:bb348c97df44	1694	* @}
lypinator	0:bb348c97df44	1695	*/
lypinator	0:bb348c97df44	1696
lypinator	0:bb348c97df44	1697	/**
lypinator	0:bb348c97df44	1698	* @}
lypinator	0:bb348c97df44	1699	*/
lypinator	0:bb348c97df44	1700
lypinator	0:bb348c97df44	1701	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	16 Sep 2020
Imports:	1
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	1
Followers:	1

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc.c@0:bb348c97df44, 2020-09-16 (annotated)

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