Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/device/stm32_hal_legacy.h@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file stm32_hal_legacy.h
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief This file contains aliases definition for the STM32Cube HAL constants
lypinator 0:bb348c97df44 6 * macros and functions maintained for legacy purpose.
lypinator 0:bb348c97df44 7 ******************************************************************************
lypinator 0:bb348c97df44 8 * @attention
lypinator 0:bb348c97df44 9 *
lypinator 0:bb348c97df44 10 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 11 *
lypinator 0:bb348c97df44 12 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 13 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 14 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 15 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 17 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 18 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 20 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 21 * without specific prior written permission.
lypinator 0:bb348c97df44 22 *
lypinator 0:bb348c97df44 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 33 *
lypinator 0:bb348c97df44 34 ******************************************************************************
lypinator 0:bb348c97df44 35 */
lypinator 0:bb348c97df44 36
lypinator 0:bb348c97df44 37 /* Define to prevent recursive inclusion -------------------------------------*/
lypinator 0:bb348c97df44 38 #ifndef __STM32_HAL_LEGACY
lypinator 0:bb348c97df44 39 #define __STM32_HAL_LEGACY
lypinator 0:bb348c97df44 40
lypinator 0:bb348c97df44 41 #ifdef __cplusplus
lypinator 0:bb348c97df44 42 extern "C" {
lypinator 0:bb348c97df44 43 #endif
lypinator 0:bb348c97df44 44
lypinator 0:bb348c97df44 45 /* Includes ------------------------------------------------------------------*/
lypinator 0:bb348c97df44 46 /* Exported types ------------------------------------------------------------*/
lypinator 0:bb348c97df44 47 /* Exported constants --------------------------------------------------------*/
lypinator 0:bb348c97df44 48
lypinator 0:bb348c97df44 49 /** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 50 * @{
lypinator 0:bb348c97df44 51 */
lypinator 0:bb348c97df44 52 #define AES_FLAG_RDERR CRYP_FLAG_RDERR
lypinator 0:bb348c97df44 53 #define AES_FLAG_WRERR CRYP_FLAG_WRERR
lypinator 0:bb348c97df44 54 #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
lypinator 0:bb348c97df44 55 #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
lypinator 0:bb348c97df44 56 #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
lypinator 0:bb348c97df44 57
lypinator 0:bb348c97df44 58 /**
lypinator 0:bb348c97df44 59 * @}
lypinator 0:bb348c97df44 60 */
lypinator 0:bb348c97df44 61
lypinator 0:bb348c97df44 62 /** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 63 * @{
lypinator 0:bb348c97df44 64 */
lypinator 0:bb348c97df44 65 #define ADC_RESOLUTION12b ADC_RESOLUTION_12B
lypinator 0:bb348c97df44 66 #define ADC_RESOLUTION10b ADC_RESOLUTION_10B
lypinator 0:bb348c97df44 67 #define ADC_RESOLUTION8b ADC_RESOLUTION_8B
lypinator 0:bb348c97df44 68 #define ADC_RESOLUTION6b ADC_RESOLUTION_6B
lypinator 0:bb348c97df44 69 #define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN
lypinator 0:bb348c97df44 70 #define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED
lypinator 0:bb348c97df44 71 #define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV
lypinator 0:bb348c97df44 72 #define EOC_SEQ_CONV ADC_EOC_SEQ_CONV
lypinator 0:bb348c97df44 73 #define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV
lypinator 0:bb348c97df44 74 #define REGULAR_GROUP ADC_REGULAR_GROUP
lypinator 0:bb348c97df44 75 #define INJECTED_GROUP ADC_INJECTED_GROUP
lypinator 0:bb348c97df44 76 #define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP
lypinator 0:bb348c97df44 77 #define AWD_EVENT ADC_AWD_EVENT
lypinator 0:bb348c97df44 78 #define AWD1_EVENT ADC_AWD1_EVENT
lypinator 0:bb348c97df44 79 #define AWD2_EVENT ADC_AWD2_EVENT
lypinator 0:bb348c97df44 80 #define AWD3_EVENT ADC_AWD3_EVENT
lypinator 0:bb348c97df44 81 #define OVR_EVENT ADC_OVR_EVENT
lypinator 0:bb348c97df44 82 #define JQOVF_EVENT ADC_JQOVF_EVENT
lypinator 0:bb348c97df44 83 #define ALL_CHANNELS ADC_ALL_CHANNELS
lypinator 0:bb348c97df44 84 #define REGULAR_CHANNELS ADC_REGULAR_CHANNELS
lypinator 0:bb348c97df44 85 #define INJECTED_CHANNELS ADC_INJECTED_CHANNELS
lypinator 0:bb348c97df44 86 #define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR
lypinator 0:bb348c97df44 87 #define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT
lypinator 0:bb348c97df44 88 #define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1
lypinator 0:bb348c97df44 89 #define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2
lypinator 0:bb348c97df44 90 #define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4
lypinator 0:bb348c97df44 91 #define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6
lypinator 0:bb348c97df44 92 #define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8
lypinator 0:bb348c97df44 93 #define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO
lypinator 0:bb348c97df44 94 #define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2
lypinator 0:bb348c97df44 95 #define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO
lypinator 0:bb348c97df44 96 #define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4
lypinator 0:bb348c97df44 97 #define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO
lypinator 0:bb348c97df44 98 #define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11
lypinator 0:bb348c97df44 99 #define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1
lypinator 0:bb348c97df44 100 #define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE
lypinator 0:bb348c97df44 101 #define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING
lypinator 0:bb348c97df44 102 #define ADC_EXTERNALTRIG_EDGE_FALLING ADC_EXTERNALTRIGCONVEDGE_FALLING
lypinator 0:bb348c97df44 103 #define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
lypinator 0:bb348c97df44 104 #define ADC_SAMPLETIME_2CYCLE_5 ADC_SAMPLETIME_2CYCLES_5
lypinator 0:bb348c97df44 105
lypinator 0:bb348c97df44 106 #define HAL_ADC_STATE_BUSY_REG HAL_ADC_STATE_REG_BUSY
lypinator 0:bb348c97df44 107 #define HAL_ADC_STATE_BUSY_INJ HAL_ADC_STATE_INJ_BUSY
lypinator 0:bb348c97df44 108 #define HAL_ADC_STATE_EOC_REG HAL_ADC_STATE_REG_EOC
lypinator 0:bb348c97df44 109 #define HAL_ADC_STATE_EOC_INJ HAL_ADC_STATE_INJ_EOC
lypinator 0:bb348c97df44 110 #define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL
lypinator 0:bb348c97df44 111 #define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL
lypinator 0:bb348c97df44 112 #define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1
lypinator 0:bb348c97df44 113 /**
lypinator 0:bb348c97df44 114 * @}
lypinator 0:bb348c97df44 115 */
lypinator 0:bb348c97df44 116
lypinator 0:bb348c97df44 117 /** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 118 * @{
lypinator 0:bb348c97df44 119 */
lypinator 0:bb348c97df44 120
lypinator 0:bb348c97df44 121 #define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG
lypinator 0:bb348c97df44 122
lypinator 0:bb348c97df44 123 /**
lypinator 0:bb348c97df44 124 * @}
lypinator 0:bb348c97df44 125 */
lypinator 0:bb348c97df44 126
lypinator 0:bb348c97df44 127 /** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 128 * @{
lypinator 0:bb348c97df44 129 */
lypinator 0:bb348c97df44 130 #define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE
lypinator 0:bb348c97df44 131 #define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE
lypinator 0:bb348c97df44 132 #define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1
lypinator 0:bb348c97df44 133 #define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2
lypinator 0:bb348c97df44 134 #define COMP_EXTI_LINE_COMP3_EVENT COMP_EXTI_LINE_COMP3
lypinator 0:bb348c97df44 135 #define COMP_EXTI_LINE_COMP4_EVENT COMP_EXTI_LINE_COMP4
lypinator 0:bb348c97df44 136 #define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5
lypinator 0:bb348c97df44 137 #define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6
lypinator 0:bb348c97df44 138 #define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7
lypinator 0:bb348c97df44 139 #if defined(STM32L0)
lypinator 0:bb348c97df44 140 #define COMP_LPTIMCONNECTION_ENABLED ((uint32_t)0x00000003U) /*!< COMPX output generic naming: connected to LPTIM input 1 for COMP1, LPTIM input 2 for COMP2 */
lypinator 0:bb348c97df44 141 #endif
lypinator 0:bb348c97df44 142 #define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR
lypinator 0:bb348c97df44 143 #if defined(STM32F373xC) || defined(STM32F378xx)
lypinator 0:bb348c97df44 144 #define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1
lypinator 0:bb348c97df44 145 #define COMP_OUTPUT_TIM3OCREFCLR COMP_OUTPUT_COMP1_TIM3OCREFCLR
lypinator 0:bb348c97df44 146 #endif /* STM32F373xC || STM32F378xx */
lypinator 0:bb348c97df44 147
lypinator 0:bb348c97df44 148 #if defined(STM32L0) || defined(STM32L4)
lypinator 0:bb348c97df44 149 #define COMP_WINDOWMODE_ENABLE COMP_WINDOWMODE_COMP1_INPUT_PLUS_COMMON
lypinator 0:bb348c97df44 150
lypinator 0:bb348c97df44 151 #define COMP_NONINVERTINGINPUT_IO1 COMP_INPUT_PLUS_IO1
lypinator 0:bb348c97df44 152 #define COMP_NONINVERTINGINPUT_IO2 COMP_INPUT_PLUS_IO2
lypinator 0:bb348c97df44 153 #define COMP_NONINVERTINGINPUT_IO3 COMP_INPUT_PLUS_IO3
lypinator 0:bb348c97df44 154 #define COMP_NONINVERTINGINPUT_IO4 COMP_INPUT_PLUS_IO4
lypinator 0:bb348c97df44 155 #define COMP_NONINVERTINGINPUT_IO5 COMP_INPUT_PLUS_IO5
lypinator 0:bb348c97df44 156 #define COMP_NONINVERTINGINPUT_IO6 COMP_INPUT_PLUS_IO6
lypinator 0:bb348c97df44 157
lypinator 0:bb348c97df44 158 #define COMP_INVERTINGINPUT_1_4VREFINT COMP_INPUT_MINUS_1_4VREFINT
lypinator 0:bb348c97df44 159 #define COMP_INVERTINGINPUT_1_2VREFINT COMP_INPUT_MINUS_1_2VREFINT
lypinator 0:bb348c97df44 160 #define COMP_INVERTINGINPUT_3_4VREFINT COMP_INPUT_MINUS_3_4VREFINT
lypinator 0:bb348c97df44 161 #define COMP_INVERTINGINPUT_VREFINT COMP_INPUT_MINUS_VREFINT
lypinator 0:bb348c97df44 162 #define COMP_INVERTINGINPUT_DAC1_CH1 COMP_INPUT_MINUS_DAC1_CH1
lypinator 0:bb348c97df44 163 #define COMP_INVERTINGINPUT_DAC1_CH2 COMP_INPUT_MINUS_DAC1_CH2
lypinator 0:bb348c97df44 164 #define COMP_INVERTINGINPUT_DAC1 COMP_INPUT_MINUS_DAC1_CH1
lypinator 0:bb348c97df44 165 #define COMP_INVERTINGINPUT_DAC2 COMP_INPUT_MINUS_DAC1_CH2
lypinator 0:bb348c97df44 166 #define COMP_INVERTINGINPUT_IO1 COMP_INPUT_MINUS_IO1
lypinator 0:bb348c97df44 167 #if defined(STM32L0)
lypinator 0:bb348c97df44 168 /* Issue fixed on STM32L0 COMP driver: only 2 dedicated IO (IO1 and IO2), */
lypinator 0:bb348c97df44 169 /* IO2 was wrongly assigned to IO shared with DAC and IO3 was corresponding */
lypinator 0:bb348c97df44 170 /* to the second dedicated IO (only for COMP2). */
lypinator 0:bb348c97df44 171 #define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_DAC1_CH2
lypinator 0:bb348c97df44 172 #define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO2
lypinator 0:bb348c97df44 173 #else
lypinator 0:bb348c97df44 174 #define COMP_INVERTINGINPUT_IO2 COMP_INPUT_MINUS_IO2
lypinator 0:bb348c97df44 175 #define COMP_INVERTINGINPUT_IO3 COMP_INPUT_MINUS_IO3
lypinator 0:bb348c97df44 176 #endif
lypinator 0:bb348c97df44 177 #define COMP_INVERTINGINPUT_IO4 COMP_INPUT_MINUS_IO4
lypinator 0:bb348c97df44 178 #define COMP_INVERTINGINPUT_IO5 COMP_INPUT_MINUS_IO5
lypinator 0:bb348c97df44 179
lypinator 0:bb348c97df44 180 #define COMP_OUTPUTLEVEL_LOW COMP_OUTPUT_LEVEL_LOW
lypinator 0:bb348c97df44 181 #define COMP_OUTPUTLEVEL_HIGH COMP_OUTPUT_LEVEL_HIGH
lypinator 0:bb348c97df44 182
lypinator 0:bb348c97df44 183 /* Note: Literal "COMP_FLAG_LOCK" kept for legacy purpose. */
lypinator 0:bb348c97df44 184 /* To check COMP lock state, use macro "__HAL_COMP_IS_LOCKED()". */
lypinator 0:bb348c97df44 185 #if defined(COMP_CSR_LOCK)
lypinator 0:bb348c97df44 186 #define COMP_FLAG_LOCK COMP_CSR_LOCK
lypinator 0:bb348c97df44 187 #elif defined(COMP_CSR_COMP1LOCK)
lypinator 0:bb348c97df44 188 #define COMP_FLAG_LOCK COMP_CSR_COMP1LOCK
lypinator 0:bb348c97df44 189 #elif defined(COMP_CSR_COMPxLOCK)
lypinator 0:bb348c97df44 190 #define COMP_FLAG_LOCK COMP_CSR_COMPxLOCK
lypinator 0:bb348c97df44 191 #endif
lypinator 0:bb348c97df44 192
lypinator 0:bb348c97df44 193 #if defined(STM32L4)
lypinator 0:bb348c97df44 194 #define COMP_BLANKINGSRCE_TIM1OC5 COMP_BLANKINGSRC_TIM1_OC5_COMP1
lypinator 0:bb348c97df44 195 #define COMP_BLANKINGSRCE_TIM2OC3 COMP_BLANKINGSRC_TIM2_OC3_COMP1
lypinator 0:bb348c97df44 196 #define COMP_BLANKINGSRCE_TIM3OC3 COMP_BLANKINGSRC_TIM3_OC3_COMP1
lypinator 0:bb348c97df44 197 #define COMP_BLANKINGSRCE_TIM3OC4 COMP_BLANKINGSRC_TIM3_OC4_COMP2
lypinator 0:bb348c97df44 198 #define COMP_BLANKINGSRCE_TIM8OC5 COMP_BLANKINGSRC_TIM8_OC5_COMP2
lypinator 0:bb348c97df44 199 #define COMP_BLANKINGSRCE_TIM15OC1 COMP_BLANKINGSRC_TIM15_OC1_COMP2
lypinator 0:bb348c97df44 200 #define COMP_BLANKINGSRCE_NONE COMP_BLANKINGSRC_NONE
lypinator 0:bb348c97df44 201 #endif
lypinator 0:bb348c97df44 202
lypinator 0:bb348c97df44 203 #if defined(STM32L0)
lypinator 0:bb348c97df44 204 #define COMP_MODE_HIGHSPEED COMP_POWERMODE_MEDIUMSPEED
lypinator 0:bb348c97df44 205 #define COMP_MODE_LOWSPEED COMP_POWERMODE_ULTRALOWPOWER
lypinator 0:bb348c97df44 206 #else
lypinator 0:bb348c97df44 207 #define COMP_MODE_HIGHSPEED COMP_POWERMODE_HIGHSPEED
lypinator 0:bb348c97df44 208 #define COMP_MODE_MEDIUMSPEED COMP_POWERMODE_MEDIUMSPEED
lypinator 0:bb348c97df44 209 #define COMP_MODE_LOWPOWER COMP_POWERMODE_LOWPOWER
lypinator 0:bb348c97df44 210 #define COMP_MODE_ULTRALOWPOWER COMP_POWERMODE_ULTRALOWPOWER
lypinator 0:bb348c97df44 211 #endif
lypinator 0:bb348c97df44 212
lypinator 0:bb348c97df44 213 #endif
lypinator 0:bb348c97df44 214 /**
lypinator 0:bb348c97df44 215 * @}
lypinator 0:bb348c97df44 216 */
lypinator 0:bb348c97df44 217
lypinator 0:bb348c97df44 218 /** @defgroup HAL_CORTEX_Aliased_Defines HAL CORTEX Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 219 * @{
lypinator 0:bb348c97df44 220 */
lypinator 0:bb348c97df44 221 #define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig
lypinator 0:bb348c97df44 222 /**
lypinator 0:bb348c97df44 223 * @}
lypinator 0:bb348c97df44 224 */
lypinator 0:bb348c97df44 225
lypinator 0:bb348c97df44 226 /** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 227 * @{
lypinator 0:bb348c97df44 228 */
lypinator 0:bb348c97df44 229
lypinator 0:bb348c97df44 230 #define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE
lypinator 0:bb348c97df44 231 #define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE
lypinator 0:bb348c97df44 232
lypinator 0:bb348c97df44 233 /**
lypinator 0:bb348c97df44 234 * @}
lypinator 0:bb348c97df44 235 */
lypinator 0:bb348c97df44 236
lypinator 0:bb348c97df44 237 /** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 238 * @{
lypinator 0:bb348c97df44 239 */
lypinator 0:bb348c97df44 240
lypinator 0:bb348c97df44 241 #define DAC1_CHANNEL_1 DAC_CHANNEL_1
lypinator 0:bb348c97df44 242 #define DAC1_CHANNEL_2 DAC_CHANNEL_2
lypinator 0:bb348c97df44 243 #define DAC2_CHANNEL_1 DAC_CHANNEL_1
lypinator 0:bb348c97df44 244 #define DAC_WAVE_NONE 0x00000000U
lypinator 0:bb348c97df44 245 #define DAC_WAVE_NOISE DAC_CR_WAVE1_0
lypinator 0:bb348c97df44 246 #define DAC_WAVE_TRIANGLE DAC_CR_WAVE1_1
lypinator 0:bb348c97df44 247 #define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE
lypinator 0:bb348c97df44 248 #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
lypinator 0:bb348c97df44 249 #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
lypinator 0:bb348c97df44 250
lypinator 0:bb348c97df44 251 /**
lypinator 0:bb348c97df44 252 * @}
lypinator 0:bb348c97df44 253 */
lypinator 0:bb348c97df44 254
lypinator 0:bb348c97df44 255 /** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 256 * @{
lypinator 0:bb348c97df44 257 */
lypinator 0:bb348c97df44 258 #define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2
lypinator 0:bb348c97df44 259 #define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4
lypinator 0:bb348c97df44 260 #define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5
lypinator 0:bb348c97df44 261 #define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4
lypinator 0:bb348c97df44 262 #define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2
lypinator 0:bb348c97df44 263 #define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32
lypinator 0:bb348c97df44 264 #define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6
lypinator 0:bb348c97df44 265 #define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7
lypinator 0:bb348c97df44 266 #define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67
lypinator 0:bb348c97df44 267 #define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67
lypinator 0:bb348c97df44 268 #define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76
lypinator 0:bb348c97df44 269 #define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6
lypinator 0:bb348c97df44 270 #define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7
lypinator 0:bb348c97df44 271 #define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6
lypinator 0:bb348c97df44 272
lypinator 0:bb348c97df44 273 #define IS_HAL_REMAPDMA IS_DMA_REMAP
lypinator 0:bb348c97df44 274 #define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE
lypinator 0:bb348c97df44 275 #define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE
lypinator 0:bb348c97df44 276
lypinator 0:bb348c97df44 277
lypinator 0:bb348c97df44 278
lypinator 0:bb348c97df44 279 /**
lypinator 0:bb348c97df44 280 * @}
lypinator 0:bb348c97df44 281 */
lypinator 0:bb348c97df44 282
lypinator 0:bb348c97df44 283 /** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 284 * @{
lypinator 0:bb348c97df44 285 */
lypinator 0:bb348c97df44 286
lypinator 0:bb348c97df44 287 #define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE
lypinator 0:bb348c97df44 288 #define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD
lypinator 0:bb348c97df44 289 #define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD
lypinator 0:bb348c97df44 290 #define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD
lypinator 0:bb348c97df44 291 #define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS
lypinator 0:bb348c97df44 292 #define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES
lypinator 0:bb348c97df44 293 #define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES
lypinator 0:bb348c97df44 294 #define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE
lypinator 0:bb348c97df44 295 #define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE
lypinator 0:bb348c97df44 296 #define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE
lypinator 0:bb348c97df44 297 #define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE
lypinator 0:bb348c97df44 298 #define OBEX_PCROP OPTIONBYTE_PCROP
lypinator 0:bb348c97df44 299 #define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG
lypinator 0:bb348c97df44 300 #define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE
lypinator 0:bb348c97df44 301 #define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE
lypinator 0:bb348c97df44 302 #define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE
lypinator 0:bb348c97df44 303 #define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD
lypinator 0:bb348c97df44 304 #define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD
lypinator 0:bb348c97df44 305 #define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE
lypinator 0:bb348c97df44 306 #define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD
lypinator 0:bb348c97df44 307 #define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD
lypinator 0:bb348c97df44 308 #define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
lypinator 0:bb348c97df44 309 #define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
lypinator 0:bb348c97df44 310 #define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
lypinator 0:bb348c97df44 311 #define PAGESIZE FLASH_PAGE_SIZE
lypinator 0:bb348c97df44 312 #define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
lypinator 0:bb348c97df44 313 #define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
lypinator 0:bb348c97df44 314 #define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
lypinator 0:bb348c97df44 315 #define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1
lypinator 0:bb348c97df44 316 #define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2
lypinator 0:bb348c97df44 317 #define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3
lypinator 0:bb348c97df44 318 #define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4
lypinator 0:bb348c97df44 319 #define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST
lypinator 0:bb348c97df44 320 #define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST
lypinator 0:bb348c97df44 321 #define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA
lypinator 0:bb348c97df44 322 #define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB
lypinator 0:bb348c97df44 323 #define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA
lypinator 0:bb348c97df44 324 #define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB
lypinator 0:bb348c97df44 325 #define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE
lypinator 0:bb348c97df44 326 #define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN
lypinator 0:bb348c97df44 327 #define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE
lypinator 0:bb348c97df44 328 #define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN
lypinator 0:bb348c97df44 329 #define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE
lypinator 0:bb348c97df44 330 #define FLASH_ERROR_RD HAL_FLASH_ERROR_RD
lypinator 0:bb348c97df44 331 #define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG
lypinator 0:bb348c97df44 332 #define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS
lypinator 0:bb348c97df44 333 #define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP
lypinator 0:bb348c97df44 334 #define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV
lypinator 0:bb348c97df44 335 #define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR
lypinator 0:bb348c97df44 336 #define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG
lypinator 0:bb348c97df44 337 #define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION
lypinator 0:bb348c97df44 338 #define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA
lypinator 0:bb348c97df44 339 #define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE
lypinator 0:bb348c97df44 340 #define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE
lypinator 0:bb348c97df44 341 #define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS
lypinator 0:bb348c97df44 342 #define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS
lypinator 0:bb348c97df44 343 #define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST
lypinator 0:bb348c97df44 344 #define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR
lypinator 0:bb348c97df44 345 #define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO
lypinator 0:bb348c97df44 346 #define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION
lypinator 0:bb348c97df44 347 #define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS
lypinator 0:bb348c97df44 348 #define OB_WDG_SW OB_IWDG_SW
lypinator 0:bb348c97df44 349 #define OB_WDG_HW OB_IWDG_HW
lypinator 0:bb348c97df44 350 #define OB_SDADC12_VDD_MONITOR_SET OB_SDACD_VDD_MONITOR_SET
lypinator 0:bb348c97df44 351 #define OB_SDADC12_VDD_MONITOR_RESET OB_SDACD_VDD_MONITOR_RESET
lypinator 0:bb348c97df44 352 #define OB_RAM_PARITY_CHECK_SET OB_SRAM_PARITY_SET
lypinator 0:bb348c97df44 353 #define OB_RAM_PARITY_CHECK_RESET OB_SRAM_PARITY_RESET
lypinator 0:bb348c97df44 354 #define IS_OB_SDADC12_VDD_MONITOR IS_OB_SDACD_VDD_MONITOR
lypinator 0:bb348c97df44 355 #define OB_RDP_LEVEL0 OB_RDP_LEVEL_0
lypinator 0:bb348c97df44 356 #define OB_RDP_LEVEL1 OB_RDP_LEVEL_1
lypinator 0:bb348c97df44 357 #define OB_RDP_LEVEL2 OB_RDP_LEVEL_2
lypinator 0:bb348c97df44 358
lypinator 0:bb348c97df44 359 /**
lypinator 0:bb348c97df44 360 * @}
lypinator 0:bb348c97df44 361 */
lypinator 0:bb348c97df44 362
lypinator 0:bb348c97df44 363 /** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 364 * @{
lypinator 0:bb348c97df44 365 */
lypinator 0:bb348c97df44 366
lypinator 0:bb348c97df44 367 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9 I2C_FASTMODEPLUS_PA9
lypinator 0:bb348c97df44 368 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10 I2C_FASTMODEPLUS_PA10
lypinator 0:bb348c97df44 369 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6
lypinator 0:bb348c97df44 370 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7
lypinator 0:bb348c97df44 371 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8
lypinator 0:bb348c97df44 372 #define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9
lypinator 0:bb348c97df44 373 #define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1
lypinator 0:bb348c97df44 374 #define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2
lypinator 0:bb348c97df44 375 #define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3
lypinator 0:bb348c97df44 376 /**
lypinator 0:bb348c97df44 377 * @}
lypinator 0:bb348c97df44 378 */
lypinator 0:bb348c97df44 379
lypinator 0:bb348c97df44 380
lypinator 0:bb348c97df44 381 /** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
lypinator 0:bb348c97df44 382 * @{
lypinator 0:bb348c97df44 383 */
lypinator 0:bb348c97df44 384 #if defined(STM32L4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
lypinator 0:bb348c97df44 385 #define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE
lypinator 0:bb348c97df44 386 #define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE
lypinator 0:bb348c97df44 387 #define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8
lypinator 0:bb348c97df44 388 #define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16
lypinator 0:bb348c97df44 389 #else
lypinator 0:bb348c97df44 390 #define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE
lypinator 0:bb348c97df44 391 #define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE
lypinator 0:bb348c97df44 392 #define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8
lypinator 0:bb348c97df44 393 #define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16
lypinator 0:bb348c97df44 394 #endif
lypinator 0:bb348c97df44 395 /**
lypinator 0:bb348c97df44 396 * @}
lypinator 0:bb348c97df44 397 */
lypinator 0:bb348c97df44 398
lypinator 0:bb348c97df44 399 /** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 400 * @{
lypinator 0:bb348c97df44 401 */
lypinator 0:bb348c97df44 402
lypinator 0:bb348c97df44 403 #define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef
lypinator 0:bb348c97df44 404 #define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef
lypinator 0:bb348c97df44 405 /**
lypinator 0:bb348c97df44 406 * @}
lypinator 0:bb348c97df44 407 */
lypinator 0:bb348c97df44 408
lypinator 0:bb348c97df44 409 /** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 410 * @{
lypinator 0:bb348c97df44 411 */
lypinator 0:bb348c97df44 412 #define GET_GPIO_SOURCE GPIO_GET_INDEX
lypinator 0:bb348c97df44 413 #define GET_GPIO_INDEX GPIO_GET_INDEX
lypinator 0:bb348c97df44 414
lypinator 0:bb348c97df44 415 #if defined(STM32F4)
lypinator 0:bb348c97df44 416 #define GPIO_AF12_SDMMC GPIO_AF12_SDIO
lypinator 0:bb348c97df44 417 #define GPIO_AF12_SDMMC1 GPIO_AF12_SDIO
lypinator 0:bb348c97df44 418 #endif
lypinator 0:bb348c97df44 419
lypinator 0:bb348c97df44 420 #if defined(STM32F7)
lypinator 0:bb348c97df44 421 #define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
lypinator 0:bb348c97df44 422 #define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
lypinator 0:bb348c97df44 423 #endif
lypinator 0:bb348c97df44 424
lypinator 0:bb348c97df44 425 #if defined(STM32L4)
lypinator 0:bb348c97df44 426 #define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
lypinator 0:bb348c97df44 427 #define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
lypinator 0:bb348c97df44 428 #endif
lypinator 0:bb348c97df44 429
lypinator 0:bb348c97df44 430 #define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1
lypinator 0:bb348c97df44 431 #define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
lypinator 0:bb348c97df44 432 #define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
lypinator 0:bb348c97df44 433
lypinator 0:bb348c97df44 434 #if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4)
lypinator 0:bb348c97df44 435 #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
lypinator 0:bb348c97df44 436 #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
lypinator 0:bb348c97df44 437 #define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
lypinator 0:bb348c97df44 438 #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
lypinator 0:bb348c97df44 439 #endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 */
lypinator 0:bb348c97df44 440
lypinator 0:bb348c97df44 441 #if defined(STM32L1)
lypinator 0:bb348c97df44 442 #define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
lypinator 0:bb348c97df44 443 #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_MEDIUM
lypinator 0:bb348c97df44 444 #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_HIGH
lypinator 0:bb348c97df44 445 #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
lypinator 0:bb348c97df44 446 #endif /* STM32L1 */
lypinator 0:bb348c97df44 447
lypinator 0:bb348c97df44 448 #if defined(STM32F0) || defined(STM32F3) || defined(STM32F1)
lypinator 0:bb348c97df44 449 #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
lypinator 0:bb348c97df44 450 #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
lypinator 0:bb348c97df44 451 #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_HIGH
lypinator 0:bb348c97df44 452 #endif /* STM32F0 || STM32F3 || STM32F1 */
lypinator 0:bb348c97df44 453
lypinator 0:bb348c97df44 454 #define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1
lypinator 0:bb348c97df44 455 /**
lypinator 0:bb348c97df44 456 * @}
lypinator 0:bb348c97df44 457 */
lypinator 0:bb348c97df44 458
lypinator 0:bb348c97df44 459 /** @defgroup HAL_JPEG_Aliased_Macros HAL JPEG Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 460 * @{
lypinator 0:bb348c97df44 461 */
lypinator 0:bb348c97df44 462
lypinator 0:bb348c97df44 463 #if defined(STM32H7)
lypinator 0:bb348c97df44 464 #define __HAL_RCC_JPEG_CLK_ENABLE __HAL_RCC_JPGDECEN_CLK_ENABLE
lypinator 0:bb348c97df44 465 #define __HAL_RCC_JPEG_CLK_DISABLE __HAL_RCC_JPGDECEN_CLK_DISABLE
lypinator 0:bb348c97df44 466 #define __HAL_RCC_JPEG_FORCE_RESET __HAL_RCC_JPGDECRST_FORCE_RESET
lypinator 0:bb348c97df44 467 #define __HAL_RCC_JPEG_RELEASE_RESET __HAL_RCC_JPGDECRST_RELEASE_RESET
lypinator 0:bb348c97df44 468 #define __HAL_RCC_JPEG_CLK_SLEEP_ENABLE __HAL_RCC_JPGDEC_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 469 #define __HAL_RCC_JPEG_CLK_SLEEP_DISABLE __HAL_RCC_JPGDEC_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 470
lypinator 0:bb348c97df44 471 #define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1
lypinator 0:bb348c97df44 472 #define DMA_REQUEST_DAC2 DMA_REQUEST_DAC1_CH2
lypinator 0:bb348c97df44 473
lypinator 0:bb348c97df44 474 #define BDMA_REQUEST_LP_UART1_RX BDMA_REQUEST_LPUART1_RX
lypinator 0:bb348c97df44 475 #define BDMA_REQUEST_LP_UART1_TX BDMA_REQUEST_LPUART1_TX
lypinator 0:bb348c97df44 476
lypinator 0:bb348c97df44 477 #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT
lypinator 0:bb348c97df44 478 #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT
lypinator 0:bb348c97df44 479 #define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT
lypinator 0:bb348c97df44 480 #define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT
lypinator 0:bb348c97df44 481 #define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT
lypinator 0:bb348c97df44 482 #define HAL_DMAMUX1_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT
lypinator 0:bb348c97df44 483 #define HAL_DMAMUX1_REQUEST_GEN_EXTI0 HAL_DMAMUX1_REQ_GEN_EXTI0
lypinator 0:bb348c97df44 484 #define HAL_DMAMUX1_REQUEST_GEN_TIM12_TRGO HAL_DMAMUX1_REQ_GEN_TIM12_TRGO
lypinator 0:bb348c97df44 485
lypinator 0:bb348c97df44 486 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH0_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT
lypinator 0:bb348c97df44 487 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH1_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT
lypinator 0:bb348c97df44 488 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH2_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT
lypinator 0:bb348c97df44 489 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH3_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT
lypinator 0:bb348c97df44 490 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH4_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT
lypinator 0:bb348c97df44 491 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH5_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT
lypinator 0:bb348c97df44 492 #define HAL_DMAMUX2_REQUEST_GEN_DMAMUX2_CH6_EVT HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT
lypinator 0:bb348c97df44 493 #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP
lypinator 0:bb348c97df44 494 #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_WKUP HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP
lypinator 0:bb348c97df44 495 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP
lypinator 0:bb348c97df44 496 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM2_OUT HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT
lypinator 0:bb348c97df44 497 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP
lypinator 0:bb348c97df44 498 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM3_OUT HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT
lypinator 0:bb348c97df44 499 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM4_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP
lypinator 0:bb348c97df44 500 #define HAL_DMAMUX2_REQUEST_GEN_LPTIM5_WKUP HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP
lypinator 0:bb348c97df44 501 #define HAL_DMAMUX2_REQUEST_GEN_I2C4_WKUP HAL_DMAMUX2_REQ_GEN_I2C4_WKUP
lypinator 0:bb348c97df44 502 #define HAL_DMAMUX2_REQUEST_GEN_SPI6_WKUP HAL_DMAMUX2_REQ_GEN_SPI6_WKUP
lypinator 0:bb348c97df44 503 #define HAL_DMAMUX2_REQUEST_GEN_COMP1_OUT HAL_DMAMUX2_REQ_GEN_COMP1_OUT
lypinator 0:bb348c97df44 504 #define HAL_DMAMUX2_REQUEST_GEN_COMP2_OUT HAL_DMAMUX2_REQ_GEN_COMP2_OUT
lypinator 0:bb348c97df44 505 #define HAL_DMAMUX2_REQUEST_GEN_RTC_WKUP HAL_DMAMUX2_REQ_GEN_RTC_WKUP
lypinator 0:bb348c97df44 506 #define HAL_DMAMUX2_REQUEST_GEN_EXTI0 HAL_DMAMUX2_REQ_GEN_EXTI0
lypinator 0:bb348c97df44 507 #define HAL_DMAMUX2_REQUEST_GEN_EXTI2 HAL_DMAMUX2_REQ_GEN_EXTI2
lypinator 0:bb348c97df44 508 #define HAL_DMAMUX2_REQUEST_GEN_I2C4_IT_EVT HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT
lypinator 0:bb348c97df44 509 #define HAL_DMAMUX2_REQUEST_GEN_SPI6_IT HAL_DMAMUX2_REQ_GEN_SPI6_IT
lypinator 0:bb348c97df44 510 #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_TX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT
lypinator 0:bb348c97df44 511 #define HAL_DMAMUX2_REQUEST_GEN_LPUART1_RX_IT HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT
lypinator 0:bb348c97df44 512 #define HAL_DMAMUX2_REQUEST_GEN_ADC3_IT HAL_DMAMUX2_REQ_GEN_ADC3_IT
lypinator 0:bb348c97df44 513 #define HAL_DMAMUX2_REQUEST_GEN_ADC3_AWD1_OUT HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT
lypinator 0:bb348c97df44 514 #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH0_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT
lypinator 0:bb348c97df44 515 #define HAL_DMAMUX2_REQUEST_GEN_BDMA_CH1_IT HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT
lypinator 0:bb348c97df44 516
lypinator 0:bb348c97df44 517 #define HAL_DMAMUX_REQUEST_GEN_NO_EVENT HAL_DMAMUX_REQ_GEN_NO_EVENT
lypinator 0:bb348c97df44 518 #define HAL_DMAMUX_REQUEST_GEN_RISING HAL_DMAMUX_REQ_GEN_RISING
lypinator 0:bb348c97df44 519 #define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING
lypinator 0:bb348c97df44 520 #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING
lypinator 0:bb348c97df44 521
lypinator 0:bb348c97df44 522
lypinator 0:bb348c97df44 523 #endif /* STM32H7 */
lypinator 0:bb348c97df44 524
lypinator 0:bb348c97df44 525
lypinator 0:bb348c97df44 526 /**
lypinator 0:bb348c97df44 527 * @}
lypinator 0:bb348c97df44 528 */
lypinator 0:bb348c97df44 529
lypinator 0:bb348c97df44 530
lypinator 0:bb348c97df44 531 /** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 532 * @{
lypinator 0:bb348c97df44 533 */
lypinator 0:bb348c97df44 534 #define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED
lypinator 0:bb348c97df44 535 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6
lypinator 0:bb348c97df44 536 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6
lypinator 0:bb348c97df44 537 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6
lypinator 0:bb348c97df44 538 #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6
lypinator 0:bb348c97df44 539 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7
lypinator 0:bb348c97df44 540 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7
lypinator 0:bb348c97df44 541 #define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7
lypinator 0:bb348c97df44 542 #define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7
lypinator 0:bb348c97df44 543
lypinator 0:bb348c97df44 544 #define __HAL_HRTIM_SetCounter __HAL_HRTIM_SETCOUNTER
lypinator 0:bb348c97df44 545 #define __HAL_HRTIM_GetCounter __HAL_HRTIM_GETCOUNTER
lypinator 0:bb348c97df44 546 #define __HAL_HRTIM_SetPeriod __HAL_HRTIM_SETPERIOD
lypinator 0:bb348c97df44 547 #define __HAL_HRTIM_GetPeriod __HAL_HRTIM_GETPERIOD
lypinator 0:bb348c97df44 548 #define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER
lypinator 0:bb348c97df44 549 #define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER
lypinator 0:bb348c97df44 550 #define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE
lypinator 0:bb348c97df44 551 #define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE
lypinator 0:bb348c97df44 552 /**
lypinator 0:bb348c97df44 553 * @}
lypinator 0:bb348c97df44 554 */
lypinator 0:bb348c97df44 555
lypinator 0:bb348c97df44 556 /** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 557 * @{
lypinator 0:bb348c97df44 558 */
lypinator 0:bb348c97df44 559 #define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE
lypinator 0:bb348c97df44 560 #define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE
lypinator 0:bb348c97df44 561 #define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE
lypinator 0:bb348c97df44 562 #define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE
lypinator 0:bb348c97df44 563 #define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE
lypinator 0:bb348c97df44 564 #define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
lypinator 0:bb348c97df44 565 #define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
lypinator 0:bb348c97df44 566 #define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
lypinator 0:bb348c97df44 567 #if defined(STM32F0) || defined(STM32F1) || defined(STM32F3) || defined(STM32G0) || defined(STM32L4) || defined(STM32L1) || defined(STM32F7)
lypinator 0:bb348c97df44 568 #define HAL_I2C_STATE_MEM_BUSY_TX HAL_I2C_STATE_BUSY_TX
lypinator 0:bb348c97df44 569 #define HAL_I2C_STATE_MEM_BUSY_RX HAL_I2C_STATE_BUSY_RX
lypinator 0:bb348c97df44 570 #define HAL_I2C_STATE_MASTER_BUSY_TX HAL_I2C_STATE_BUSY_TX
lypinator 0:bb348c97df44 571 #define HAL_I2C_STATE_MASTER_BUSY_RX HAL_I2C_STATE_BUSY_RX
lypinator 0:bb348c97df44 572 #define HAL_I2C_STATE_SLAVE_BUSY_TX HAL_I2C_STATE_BUSY_TX
lypinator 0:bb348c97df44 573 #define HAL_I2C_STATE_SLAVE_BUSY_RX HAL_I2C_STATE_BUSY_RX
lypinator 0:bb348c97df44 574 #endif
lypinator 0:bb348c97df44 575 /**
lypinator 0:bb348c97df44 576 * @}
lypinator 0:bb348c97df44 577 */
lypinator 0:bb348c97df44 578
lypinator 0:bb348c97df44 579 /** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 580 * @{
lypinator 0:bb348c97df44 581 */
lypinator 0:bb348c97df44 582 #define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE
lypinator 0:bb348c97df44 583 #define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE
lypinator 0:bb348c97df44 584
lypinator 0:bb348c97df44 585 /**
lypinator 0:bb348c97df44 586 * @}
lypinator 0:bb348c97df44 587 */
lypinator 0:bb348c97df44 588
lypinator 0:bb348c97df44 589 /** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 590 * @{
lypinator 0:bb348c97df44 591 */
lypinator 0:bb348c97df44 592 #define KR_KEY_RELOAD IWDG_KEY_RELOAD
lypinator 0:bb348c97df44 593 #define KR_KEY_ENABLE IWDG_KEY_ENABLE
lypinator 0:bb348c97df44 594 #define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE
lypinator 0:bb348c97df44 595 #define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE
lypinator 0:bb348c97df44 596 /**
lypinator 0:bb348c97df44 597 * @}
lypinator 0:bb348c97df44 598 */
lypinator 0:bb348c97df44 599
lypinator 0:bb348c97df44 600 /** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 601 * @{
lypinator 0:bb348c97df44 602 */
lypinator 0:bb348c97df44 603
lypinator 0:bb348c97df44 604 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
lypinator 0:bb348c97df44 605 #define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CLOCKSAMPLETIME_2TRANSITIONS
lypinator 0:bb348c97df44 606 #define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CLOCKSAMPLETIME_4TRANSITIONS
lypinator 0:bb348c97df44 607 #define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CLOCKSAMPLETIME_8TRANSITIONS
lypinator 0:bb348c97df44 608
lypinator 0:bb348c97df44 609 #define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING
lypinator 0:bb348c97df44 610 #define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING
lypinator 0:bb348c97df44 611 #define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING
lypinator 0:bb348c97df44 612
lypinator 0:bb348c97df44 613 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION
lypinator 0:bb348c97df44 614 #define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS
lypinator 0:bb348c97df44 615 #define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS
lypinator 0:bb348c97df44 616 #define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS
lypinator 0:bb348c97df44 617
lypinator 0:bb348c97df44 618 /* The following 3 definition have also been present in a temporary version of lptim.h */
lypinator 0:bb348c97df44 619 /* They need to be renamed also to the right name, just in case */
lypinator 0:bb348c97df44 620 #define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS
lypinator 0:bb348c97df44 621 #define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS
lypinator 0:bb348c97df44 622 #define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS
lypinator 0:bb348c97df44 623
lypinator 0:bb348c97df44 624 /**
lypinator 0:bb348c97df44 625 * @}
lypinator 0:bb348c97df44 626 */
lypinator 0:bb348c97df44 627
lypinator 0:bb348c97df44 628 /** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 629 * @{
lypinator 0:bb348c97df44 630 */
lypinator 0:bb348c97df44 631 #define HAL_NAND_Read_Page HAL_NAND_Read_Page_8b
lypinator 0:bb348c97df44 632 #define HAL_NAND_Write_Page HAL_NAND_Write_Page_8b
lypinator 0:bb348c97df44 633 #define HAL_NAND_Read_SpareArea HAL_NAND_Read_SpareArea_8b
lypinator 0:bb348c97df44 634 #define HAL_NAND_Write_SpareArea HAL_NAND_Write_SpareArea_8b
lypinator 0:bb348c97df44 635
lypinator 0:bb348c97df44 636 #define NAND_AddressTypedef NAND_AddressTypeDef
lypinator 0:bb348c97df44 637
lypinator 0:bb348c97df44 638 #define __ARRAY_ADDRESS ARRAY_ADDRESS
lypinator 0:bb348c97df44 639 #define __ADDR_1st_CYCLE ADDR_1ST_CYCLE
lypinator 0:bb348c97df44 640 #define __ADDR_2nd_CYCLE ADDR_2ND_CYCLE
lypinator 0:bb348c97df44 641 #define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE
lypinator 0:bb348c97df44 642 #define __ADDR_4th_CYCLE ADDR_4TH_CYCLE
lypinator 0:bb348c97df44 643 /**
lypinator 0:bb348c97df44 644 * @}
lypinator 0:bb348c97df44 645 */
lypinator 0:bb348c97df44 646
lypinator 0:bb348c97df44 647 /** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 648 * @{
lypinator 0:bb348c97df44 649 */
lypinator 0:bb348c97df44 650 #define NOR_StatusTypedef HAL_NOR_StatusTypeDef
lypinator 0:bb348c97df44 651 #define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS
lypinator 0:bb348c97df44 652 #define NOR_ONGOING HAL_NOR_STATUS_ONGOING
lypinator 0:bb348c97df44 653 #define NOR_ERROR HAL_NOR_STATUS_ERROR
lypinator 0:bb348c97df44 654 #define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT
lypinator 0:bb348c97df44 655
lypinator 0:bb348c97df44 656 #define __NOR_WRITE NOR_WRITE
lypinator 0:bb348c97df44 657 #define __NOR_ADDR_SHIFT NOR_ADDR_SHIFT
lypinator 0:bb348c97df44 658 /**
lypinator 0:bb348c97df44 659 * @}
lypinator 0:bb348c97df44 660 */
lypinator 0:bb348c97df44 661
lypinator 0:bb348c97df44 662 /** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 663 * @{
lypinator 0:bb348c97df44 664 */
lypinator 0:bb348c97df44 665
lypinator 0:bb348c97df44 666 #define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0
lypinator 0:bb348c97df44 667 #define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1
lypinator 0:bb348c97df44 668 #define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2
lypinator 0:bb348c97df44 669 #define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3
lypinator 0:bb348c97df44 670
lypinator 0:bb348c97df44 671 #define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0
lypinator 0:bb348c97df44 672 #define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1
lypinator 0:bb348c97df44 673 #define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2
lypinator 0:bb348c97df44 674 #define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3
lypinator 0:bb348c97df44 675
lypinator 0:bb348c97df44 676 #define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
lypinator 0:bb348c97df44 677 #define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
lypinator 0:bb348c97df44 678
lypinator 0:bb348c97df44 679 #define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
lypinator 0:bb348c97df44 680 #define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
lypinator 0:bb348c97df44 681
lypinator 0:bb348c97df44 682 #define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0
lypinator 0:bb348c97df44 683 #define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1
lypinator 0:bb348c97df44 684
lypinator 0:bb348c97df44 685 #define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1
lypinator 0:bb348c97df44 686
lypinator 0:bb348c97df44 687 #define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
lypinator 0:bb348c97df44 688 #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
lypinator 0:bb348c97df44 689 #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
lypinator 0:bb348c97df44 690
lypinator 0:bb348c97df44 691 /**
lypinator 0:bb348c97df44 692 * @}
lypinator 0:bb348c97df44 693 */
lypinator 0:bb348c97df44 694
lypinator 0:bb348c97df44 695 /** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 696 * @{
lypinator 0:bb348c97df44 697 */
lypinator 0:bb348c97df44 698 #define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
lypinator 0:bb348c97df44 699 #if defined(STM32F7)
lypinator 0:bb348c97df44 700 #define I2S_CLOCK_SYSCLK I2S_CLOCK_PLL
lypinator 0:bb348c97df44 701 #endif
lypinator 0:bb348c97df44 702 /**
lypinator 0:bb348c97df44 703 * @}
lypinator 0:bb348c97df44 704 */
lypinator 0:bb348c97df44 705
lypinator 0:bb348c97df44 706 /** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 707 * @{
lypinator 0:bb348c97df44 708 */
lypinator 0:bb348c97df44 709
lypinator 0:bb348c97df44 710 /* Compact Flash-ATA registers description */
lypinator 0:bb348c97df44 711 #define CF_DATA ATA_DATA
lypinator 0:bb348c97df44 712 #define CF_SECTOR_COUNT ATA_SECTOR_COUNT
lypinator 0:bb348c97df44 713 #define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER
lypinator 0:bb348c97df44 714 #define CF_CYLINDER_LOW ATA_CYLINDER_LOW
lypinator 0:bb348c97df44 715 #define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH
lypinator 0:bb348c97df44 716 #define CF_CARD_HEAD ATA_CARD_HEAD
lypinator 0:bb348c97df44 717 #define CF_STATUS_CMD ATA_STATUS_CMD
lypinator 0:bb348c97df44 718 #define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE
lypinator 0:bb348c97df44 719 #define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA
lypinator 0:bb348c97df44 720
lypinator 0:bb348c97df44 721 /* Compact Flash-ATA commands */
lypinator 0:bb348c97df44 722 #define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD
lypinator 0:bb348c97df44 723 #define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD
lypinator 0:bb348c97df44 724 #define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD
lypinator 0:bb348c97df44 725 #define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD
lypinator 0:bb348c97df44 726
lypinator 0:bb348c97df44 727 #define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef
lypinator 0:bb348c97df44 728 #define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS
lypinator 0:bb348c97df44 729 #define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING
lypinator 0:bb348c97df44 730 #define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR
lypinator 0:bb348c97df44 731 #define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT
lypinator 0:bb348c97df44 732 /**
lypinator 0:bb348c97df44 733 * @}
lypinator 0:bb348c97df44 734 */
lypinator 0:bb348c97df44 735
lypinator 0:bb348c97df44 736 /** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 737 * @{
lypinator 0:bb348c97df44 738 */
lypinator 0:bb348c97df44 739
lypinator 0:bb348c97df44 740 #define FORMAT_BIN RTC_FORMAT_BIN
lypinator 0:bb348c97df44 741 #define FORMAT_BCD RTC_FORMAT_BCD
lypinator 0:bb348c97df44 742
lypinator 0:bb348c97df44 743 #define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE
lypinator 0:bb348c97df44 744 #define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
lypinator 0:bb348c97df44 745 #define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
lypinator 0:bb348c97df44 746 #define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
lypinator 0:bb348c97df44 747
lypinator 0:bb348c97df44 748 #define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
lypinator 0:bb348c97df44 749 #define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
lypinator 0:bb348c97df44 750 #define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
lypinator 0:bb348c97df44 751 #define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
lypinator 0:bb348c97df44 752 #define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
lypinator 0:bb348c97df44 753
lypinator 0:bb348c97df44 754 #define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT
lypinator 0:bb348c97df44 755 #define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
lypinator 0:bb348c97df44 756 #define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
lypinator 0:bb348c97df44 757 #define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2
lypinator 0:bb348c97df44 758
lypinator 0:bb348c97df44 759 #define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE
lypinator 0:bb348c97df44 760 #define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1
lypinator 0:bb348c97df44 761 #define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1
lypinator 0:bb348c97df44 762
lypinator 0:bb348c97df44 763 #define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT
lypinator 0:bb348c97df44 764 #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
lypinator 0:bb348c97df44 765 #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
lypinator 0:bb348c97df44 766
lypinator 0:bb348c97df44 767 /**
lypinator 0:bb348c97df44 768 * @}
lypinator 0:bb348c97df44 769 */
lypinator 0:bb348c97df44 770
lypinator 0:bb348c97df44 771
lypinator 0:bb348c97df44 772 /** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 773 * @{
lypinator 0:bb348c97df44 774 */
lypinator 0:bb348c97df44 775 #define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE
lypinator 0:bb348c97df44 776 #define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE
lypinator 0:bb348c97df44 777
lypinator 0:bb348c97df44 778 #define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE
lypinator 0:bb348c97df44 779 #define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE
lypinator 0:bb348c97df44 780 #define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE
lypinator 0:bb348c97df44 781 #define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE
lypinator 0:bb348c97df44 782
lypinator 0:bb348c97df44 783 #define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE
lypinator 0:bb348c97df44 784 #define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE
lypinator 0:bb348c97df44 785
lypinator 0:bb348c97df44 786 #define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE
lypinator 0:bb348c97df44 787 #define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE
lypinator 0:bb348c97df44 788 /**
lypinator 0:bb348c97df44 789 * @}
lypinator 0:bb348c97df44 790 */
lypinator 0:bb348c97df44 791
lypinator 0:bb348c97df44 792
lypinator 0:bb348c97df44 793 /** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 794 * @{
lypinator 0:bb348c97df44 795 */
lypinator 0:bb348c97df44 796 #define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE
lypinator 0:bb348c97df44 797 #define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE
lypinator 0:bb348c97df44 798 #define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE
lypinator 0:bb348c97df44 799 #define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE
lypinator 0:bb348c97df44 800 #define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE
lypinator 0:bb348c97df44 801 #define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE
lypinator 0:bb348c97df44 802 #define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE
lypinator 0:bb348c97df44 803 #define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE
lypinator 0:bb348c97df44 804 #define SMBUS_PEC_DISABLED SMBUS_PEC_DISABLE
lypinator 0:bb348c97df44 805 #define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE
lypinator 0:bb348c97df44 806 #define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN
lypinator 0:bb348c97df44 807 /**
lypinator 0:bb348c97df44 808 * @}
lypinator 0:bb348c97df44 809 */
lypinator 0:bb348c97df44 810
lypinator 0:bb348c97df44 811 /** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 812 * @{
lypinator 0:bb348c97df44 813 */
lypinator 0:bb348c97df44 814 #define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE
lypinator 0:bb348c97df44 815 #define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE
lypinator 0:bb348c97df44 816
lypinator 0:bb348c97df44 817 #define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE
lypinator 0:bb348c97df44 818 #define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE
lypinator 0:bb348c97df44 819
lypinator 0:bb348c97df44 820 #define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE
lypinator 0:bb348c97df44 821 #define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE
lypinator 0:bb348c97df44 822
lypinator 0:bb348c97df44 823 /**
lypinator 0:bb348c97df44 824 * @}
lypinator 0:bb348c97df44 825 */
lypinator 0:bb348c97df44 826
lypinator 0:bb348c97df44 827 /** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 828 * @{
lypinator 0:bb348c97df44 829 */
lypinator 0:bb348c97df44 830 #define CCER_CCxE_MASK TIM_CCER_CCxE_MASK
lypinator 0:bb348c97df44 831 #define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK
lypinator 0:bb348c97df44 832
lypinator 0:bb348c97df44 833 #define TIM_DMABase_CR1 TIM_DMABASE_CR1
lypinator 0:bb348c97df44 834 #define TIM_DMABase_CR2 TIM_DMABASE_CR2
lypinator 0:bb348c97df44 835 #define TIM_DMABase_SMCR TIM_DMABASE_SMCR
lypinator 0:bb348c97df44 836 #define TIM_DMABase_DIER TIM_DMABASE_DIER
lypinator 0:bb348c97df44 837 #define TIM_DMABase_SR TIM_DMABASE_SR
lypinator 0:bb348c97df44 838 #define TIM_DMABase_EGR TIM_DMABASE_EGR
lypinator 0:bb348c97df44 839 #define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1
lypinator 0:bb348c97df44 840 #define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2
lypinator 0:bb348c97df44 841 #define TIM_DMABase_CCER TIM_DMABASE_CCER
lypinator 0:bb348c97df44 842 #define TIM_DMABase_CNT TIM_DMABASE_CNT
lypinator 0:bb348c97df44 843 #define TIM_DMABase_PSC TIM_DMABASE_PSC
lypinator 0:bb348c97df44 844 #define TIM_DMABase_ARR TIM_DMABASE_ARR
lypinator 0:bb348c97df44 845 #define TIM_DMABase_RCR TIM_DMABASE_RCR
lypinator 0:bb348c97df44 846 #define TIM_DMABase_CCR1 TIM_DMABASE_CCR1
lypinator 0:bb348c97df44 847 #define TIM_DMABase_CCR2 TIM_DMABASE_CCR2
lypinator 0:bb348c97df44 848 #define TIM_DMABase_CCR3 TIM_DMABASE_CCR3
lypinator 0:bb348c97df44 849 #define TIM_DMABase_CCR4 TIM_DMABASE_CCR4
lypinator 0:bb348c97df44 850 #define TIM_DMABase_BDTR TIM_DMABASE_BDTR
lypinator 0:bb348c97df44 851 #define TIM_DMABase_DCR TIM_DMABASE_DCR
lypinator 0:bb348c97df44 852 #define TIM_DMABase_DMAR TIM_DMABASE_DMAR
lypinator 0:bb348c97df44 853 #define TIM_DMABase_OR1 TIM_DMABASE_OR1
lypinator 0:bb348c97df44 854 #define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3
lypinator 0:bb348c97df44 855 #define TIM_DMABase_CCR5 TIM_DMABASE_CCR5
lypinator 0:bb348c97df44 856 #define TIM_DMABase_CCR6 TIM_DMABASE_CCR6
lypinator 0:bb348c97df44 857 #define TIM_DMABase_OR2 TIM_DMABASE_OR2
lypinator 0:bb348c97df44 858 #define TIM_DMABase_OR3 TIM_DMABASE_OR3
lypinator 0:bb348c97df44 859 #define TIM_DMABase_OR TIM_DMABASE_OR
lypinator 0:bb348c97df44 860
lypinator 0:bb348c97df44 861 #define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE
lypinator 0:bb348c97df44 862 #define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1
lypinator 0:bb348c97df44 863 #define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2
lypinator 0:bb348c97df44 864 #define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3
lypinator 0:bb348c97df44 865 #define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4
lypinator 0:bb348c97df44 866 #define TIM_EventSource_COM TIM_EVENTSOURCE_COM
lypinator 0:bb348c97df44 867 #define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER
lypinator 0:bb348c97df44 868 #define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK
lypinator 0:bb348c97df44 869 #define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2
lypinator 0:bb348c97df44 870
lypinator 0:bb348c97df44 871 #define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER
lypinator 0:bb348c97df44 872 #define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS
lypinator 0:bb348c97df44 873 #define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS
lypinator 0:bb348c97df44 874 #define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS
lypinator 0:bb348c97df44 875 #define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS
lypinator 0:bb348c97df44 876 #define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS
lypinator 0:bb348c97df44 877 #define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS
lypinator 0:bb348c97df44 878 #define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS
lypinator 0:bb348c97df44 879 #define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS
lypinator 0:bb348c97df44 880 #define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS
lypinator 0:bb348c97df44 881 #define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS
lypinator 0:bb348c97df44 882 #define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS
lypinator 0:bb348c97df44 883 #define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS
lypinator 0:bb348c97df44 884 #define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS
lypinator 0:bb348c97df44 885 #define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS
lypinator 0:bb348c97df44 886 #define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS
lypinator 0:bb348c97df44 887 #define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS
lypinator 0:bb348c97df44 888 #define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS
lypinator 0:bb348c97df44 889
lypinator 0:bb348c97df44 890 /**
lypinator 0:bb348c97df44 891 * @}
lypinator 0:bb348c97df44 892 */
lypinator 0:bb348c97df44 893
lypinator 0:bb348c97df44 894 /** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 895 * @{
lypinator 0:bb348c97df44 896 */
lypinator 0:bb348c97df44 897 #define TSC_SYNC_POL_FALL TSC_SYNC_POLARITY_FALLING
lypinator 0:bb348c97df44 898 #define TSC_SYNC_POL_RISE_HIGH TSC_SYNC_POLARITY_RISING
lypinator 0:bb348c97df44 899 /**
lypinator 0:bb348c97df44 900 * @}
lypinator 0:bb348c97df44 901 */
lypinator 0:bb348c97df44 902
lypinator 0:bb348c97df44 903 /** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 904 * @{
lypinator 0:bb348c97df44 905 */
lypinator 0:bb348c97df44 906 #define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
lypinator 0:bb348c97df44 907 #define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
lypinator 0:bb348c97df44 908 #define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
lypinator 0:bb348c97df44 909 #define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
lypinator 0:bb348c97df44 910
lypinator 0:bb348c97df44 911 #define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE
lypinator 0:bb348c97df44 912 #define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE
lypinator 0:bb348c97df44 913
lypinator 0:bb348c97df44 914 #define __DIV_SAMPLING16 UART_DIV_SAMPLING16
lypinator 0:bb348c97df44 915 #define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16
lypinator 0:bb348c97df44 916 #define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16
lypinator 0:bb348c97df44 917 #define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16
lypinator 0:bb348c97df44 918
lypinator 0:bb348c97df44 919 #define __DIV_SAMPLING8 UART_DIV_SAMPLING8
lypinator 0:bb348c97df44 920 #define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8
lypinator 0:bb348c97df44 921 #define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8
lypinator 0:bb348c97df44 922 #define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8
lypinator 0:bb348c97df44 923
lypinator 0:bb348c97df44 924 #define __DIV_LPUART UART_DIV_LPUART
lypinator 0:bb348c97df44 925
lypinator 0:bb348c97df44 926 #define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE
lypinator 0:bb348c97df44 927 #define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK
lypinator 0:bb348c97df44 928
lypinator 0:bb348c97df44 929 /**
lypinator 0:bb348c97df44 930 * @}
lypinator 0:bb348c97df44 931 */
lypinator 0:bb348c97df44 932
lypinator 0:bb348c97df44 933
lypinator 0:bb348c97df44 934 /** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 935 * @{
lypinator 0:bb348c97df44 936 */
lypinator 0:bb348c97df44 937
lypinator 0:bb348c97df44 938 #define USART_CLOCK_DISABLED USART_CLOCK_DISABLE
lypinator 0:bb348c97df44 939 #define USART_CLOCK_ENABLED USART_CLOCK_ENABLE
lypinator 0:bb348c97df44 940
lypinator 0:bb348c97df44 941 #define USARTNACK_ENABLED USART_NACK_ENABLE
lypinator 0:bb348c97df44 942 #define USARTNACK_DISABLED USART_NACK_DISABLE
lypinator 0:bb348c97df44 943 /**
lypinator 0:bb348c97df44 944 * @}
lypinator 0:bb348c97df44 945 */
lypinator 0:bb348c97df44 946
lypinator 0:bb348c97df44 947 /** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 948 * @{
lypinator 0:bb348c97df44 949 */
lypinator 0:bb348c97df44 950 #define CFR_BASE WWDG_CFR_BASE
lypinator 0:bb348c97df44 951
lypinator 0:bb348c97df44 952 /**
lypinator 0:bb348c97df44 953 * @}
lypinator 0:bb348c97df44 954 */
lypinator 0:bb348c97df44 955
lypinator 0:bb348c97df44 956 /** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 957 * @{
lypinator 0:bb348c97df44 958 */
lypinator 0:bb348c97df44 959 #define CAN_FilterFIFO0 CAN_FILTER_FIFO0
lypinator 0:bb348c97df44 960 #define CAN_FilterFIFO1 CAN_FILTER_FIFO1
lypinator 0:bb348c97df44 961 #define CAN_IT_RQCP0 CAN_IT_TME
lypinator 0:bb348c97df44 962 #define CAN_IT_RQCP1 CAN_IT_TME
lypinator 0:bb348c97df44 963 #define CAN_IT_RQCP2 CAN_IT_TME
lypinator 0:bb348c97df44 964 #define INAK_TIMEOUT CAN_TIMEOUT_VALUE
lypinator 0:bb348c97df44 965 #define SLAK_TIMEOUT CAN_TIMEOUT_VALUE
lypinator 0:bb348c97df44 966 #define CAN_TXSTATUS_FAILED ((uint8_t)0x00U)
lypinator 0:bb348c97df44 967 #define CAN_TXSTATUS_OK ((uint8_t)0x01U)
lypinator 0:bb348c97df44 968 #define CAN_TXSTATUS_PENDING ((uint8_t)0x02U)
lypinator 0:bb348c97df44 969
lypinator 0:bb348c97df44 970 /**
lypinator 0:bb348c97df44 971 * @}
lypinator 0:bb348c97df44 972 */
lypinator 0:bb348c97df44 973
lypinator 0:bb348c97df44 974 /** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 975 * @{
lypinator 0:bb348c97df44 976 */
lypinator 0:bb348c97df44 977
lypinator 0:bb348c97df44 978 #define VLAN_TAG ETH_VLAN_TAG
lypinator 0:bb348c97df44 979 #define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD
lypinator 0:bb348c97df44 980 #define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD
lypinator 0:bb348c97df44 981 #define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD
lypinator 0:bb348c97df44 982 #define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK
lypinator 0:bb348c97df44 983 #define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK
lypinator 0:bb348c97df44 984 #define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK
lypinator 0:bb348c97df44 985 #define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK
lypinator 0:bb348c97df44 986
lypinator 0:bb348c97df44 987 #define ETH_MMCCR 0x00000100U
lypinator 0:bb348c97df44 988 #define ETH_MMCRIR 0x00000104U
lypinator 0:bb348c97df44 989 #define ETH_MMCTIR 0x00000108U
lypinator 0:bb348c97df44 990 #define ETH_MMCRIMR 0x0000010CU
lypinator 0:bb348c97df44 991 #define ETH_MMCTIMR 0x00000110U
lypinator 0:bb348c97df44 992 #define ETH_MMCTGFSCCR 0x0000014CU
lypinator 0:bb348c97df44 993 #define ETH_MMCTGFMSCCR 0x00000150U
lypinator 0:bb348c97df44 994 #define ETH_MMCTGFCR 0x00000168U
lypinator 0:bb348c97df44 995 #define ETH_MMCRFCECR 0x00000194U
lypinator 0:bb348c97df44 996 #define ETH_MMCRFAECR 0x00000198U
lypinator 0:bb348c97df44 997 #define ETH_MMCRGUFCR 0x000001C4U
lypinator 0:bb348c97df44 998
lypinator 0:bb348c97df44 999 #define ETH_MAC_TXFIFO_FULL 0x02000000U /* Tx FIFO full */
lypinator 0:bb348c97df44 1000 #define ETH_MAC_TXFIFONOT_EMPTY 0x01000000U /* Tx FIFO not empty */
lypinator 0:bb348c97df44 1001 #define ETH_MAC_TXFIFO_WRITE_ACTIVE 0x00400000U /* Tx FIFO write active */
lypinator 0:bb348c97df44 1002 #define ETH_MAC_TXFIFO_IDLE 0x00000000U /* Tx FIFO read status: Idle */
lypinator 0:bb348c97df44 1003 #define ETH_MAC_TXFIFO_READ 0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
lypinator 0:bb348c97df44 1004 #define ETH_MAC_TXFIFO_WAITING 0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
lypinator 0:bb348c97df44 1005 #define ETH_MAC_TXFIFO_WRITING 0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
lypinator 0:bb348c97df44 1006 #define ETH_MAC_TRANSMISSION_PAUSE 0x00080000U /* MAC transmitter in pause */
lypinator 0:bb348c97df44 1007 #define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE 0x00000000U /* MAC transmit frame controller: Idle */
lypinator 0:bb348c97df44 1008 #define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING 0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
lypinator 0:bb348c97df44 1009 #define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF 0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
lypinator 0:bb348c97df44 1010 #define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING 0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */
lypinator 0:bb348c97df44 1011 #define ETH_MAC_MII_TRANSMIT_ACTIVE 0x00010000U /* MAC MII transmit engine active */
lypinator 0:bb348c97df44 1012 #define ETH_MAC_RXFIFO_EMPTY 0x00000000U /* Rx FIFO fill level: empty */
lypinator 0:bb348c97df44 1013 #define ETH_MAC_RXFIFO_BELOW_THRESHOLD 0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
lypinator 0:bb348c97df44 1014 #define ETH_MAC_RXFIFO_ABOVE_THRESHOLD 0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
lypinator 0:bb348c97df44 1015 #define ETH_MAC_RXFIFO_FULL 0x00000300U /* Rx FIFO fill level: full */
lypinator 0:bb348c97df44 1016 #if defined(STM32F1)
lypinator 0:bb348c97df44 1017 #else
lypinator 0:bb348c97df44 1018 #define ETH_MAC_READCONTROLLER_IDLE 0x00000000U /* Rx FIFO read controller IDLE state */
lypinator 0:bb348c97df44 1019 #define ETH_MAC_READCONTROLLER_READING_DATA 0x00000020U /* Rx FIFO read controller Reading frame data */
lypinator 0:bb348c97df44 1020 #define ETH_MAC_READCONTROLLER_READING_STATUS 0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
lypinator 0:bb348c97df44 1021 #endif
lypinator 0:bb348c97df44 1022 #define ETH_MAC_READCONTROLLER_FLUSHING 0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
lypinator 0:bb348c97df44 1023 #define ETH_MAC_RXFIFO_WRITE_ACTIVE 0x00000010U /* Rx FIFO write controller active */
lypinator 0:bb348c97df44 1024 #define ETH_MAC_SMALL_FIFO_NOTACTIVE 0x00000000U /* MAC small FIFO read / write controllers not active */
lypinator 0:bb348c97df44 1025 #define ETH_MAC_SMALL_FIFO_READ_ACTIVE 0x00000002U /* MAC small FIFO read controller active */
lypinator 0:bb348c97df44 1026 #define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE 0x00000004U /* MAC small FIFO write controller active */
lypinator 0:bb348c97df44 1027 #define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */
lypinator 0:bb348c97df44 1028 #define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */
lypinator 0:bb348c97df44 1029
lypinator 0:bb348c97df44 1030 /**
lypinator 0:bb348c97df44 1031 * @}
lypinator 0:bb348c97df44 1032 */
lypinator 0:bb348c97df44 1033
lypinator 0:bb348c97df44 1034 /** @defgroup HAL_DCMI_Aliased_Defines HAL DCMI Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 1035 * @{
lypinator 0:bb348c97df44 1036 */
lypinator 0:bb348c97df44 1037 #define HAL_DCMI_ERROR_OVF HAL_DCMI_ERROR_OVR
lypinator 0:bb348c97df44 1038 #define DCMI_IT_OVF DCMI_IT_OVR
lypinator 0:bb348c97df44 1039 #define DCMI_FLAG_OVFRI DCMI_FLAG_OVRRI
lypinator 0:bb348c97df44 1040 #define DCMI_FLAG_OVFMI DCMI_FLAG_OVRMI
lypinator 0:bb348c97df44 1041
lypinator 0:bb348c97df44 1042 #define HAL_DCMI_ConfigCROP HAL_DCMI_ConfigCrop
lypinator 0:bb348c97df44 1043 #define HAL_DCMI_EnableCROP HAL_DCMI_EnableCrop
lypinator 0:bb348c97df44 1044 #define HAL_DCMI_DisableCROP HAL_DCMI_DisableCrop
lypinator 0:bb348c97df44 1045
lypinator 0:bb348c97df44 1046 /**
lypinator 0:bb348c97df44 1047 * @}
lypinator 0:bb348c97df44 1048 */
lypinator 0:bb348c97df44 1049
lypinator 0:bb348c97df44 1050 #if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) ||\
lypinator 0:bb348c97df44 1051 defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
lypinator 0:bb348c97df44 1052 /** @defgroup HAL_DMA2D_Aliased_Defines HAL DMA2D Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 1053 * @{
lypinator 0:bb348c97df44 1054 */
lypinator 0:bb348c97df44 1055 #define DMA2D_ARGB8888 DMA2D_OUTPUT_ARGB8888
lypinator 0:bb348c97df44 1056 #define DMA2D_RGB888 DMA2D_OUTPUT_RGB888
lypinator 0:bb348c97df44 1057 #define DMA2D_RGB565 DMA2D_OUTPUT_RGB565
lypinator 0:bb348c97df44 1058 #define DMA2D_ARGB1555 DMA2D_OUTPUT_ARGB1555
lypinator 0:bb348c97df44 1059 #define DMA2D_ARGB4444 DMA2D_OUTPUT_ARGB4444
lypinator 0:bb348c97df44 1060
lypinator 0:bb348c97df44 1061 #define CM_ARGB8888 DMA2D_INPUT_ARGB8888
lypinator 0:bb348c97df44 1062 #define CM_RGB888 DMA2D_INPUT_RGB888
lypinator 0:bb348c97df44 1063 #define CM_RGB565 DMA2D_INPUT_RGB565
lypinator 0:bb348c97df44 1064 #define CM_ARGB1555 DMA2D_INPUT_ARGB1555
lypinator 0:bb348c97df44 1065 #define CM_ARGB4444 DMA2D_INPUT_ARGB4444
lypinator 0:bb348c97df44 1066 #define CM_L8 DMA2D_INPUT_L8
lypinator 0:bb348c97df44 1067 #define CM_AL44 DMA2D_INPUT_AL44
lypinator 0:bb348c97df44 1068 #define CM_AL88 DMA2D_INPUT_AL88
lypinator 0:bb348c97df44 1069 #define CM_L4 DMA2D_INPUT_L4
lypinator 0:bb348c97df44 1070 #define CM_A8 DMA2D_INPUT_A8
lypinator 0:bb348c97df44 1071 #define CM_A4 DMA2D_INPUT_A4
lypinator 0:bb348c97df44 1072 /**
lypinator 0:bb348c97df44 1073 * @}
lypinator 0:bb348c97df44 1074 */
lypinator 0:bb348c97df44 1075 #endif /* STM32L4 || STM32F7*/
lypinator 0:bb348c97df44 1076
lypinator 0:bb348c97df44 1077 /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
lypinator 0:bb348c97df44 1078 * @{
lypinator 0:bb348c97df44 1079 */
lypinator 0:bb348c97df44 1080
lypinator 0:bb348c97df44 1081 /**
lypinator 0:bb348c97df44 1082 * @}
lypinator 0:bb348c97df44 1083 */
lypinator 0:bb348c97df44 1084
lypinator 0:bb348c97df44 1085 /* Exported functions --------------------------------------------------------*/
lypinator 0:bb348c97df44 1086
lypinator 0:bb348c97df44 1087 /** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1088 * @{
lypinator 0:bb348c97df44 1089 */
lypinator 0:bb348c97df44 1090 #define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback
lypinator 0:bb348c97df44 1091 /**
lypinator 0:bb348c97df44 1092 * @}
lypinator 0:bb348c97df44 1093 */
lypinator 0:bb348c97df44 1094
lypinator 0:bb348c97df44 1095 /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1096 * @{
lypinator 0:bb348c97df44 1097 */
lypinator 0:bb348c97df44 1098 #define HAL_HASH_STATETypeDef HAL_HASH_StateTypeDef
lypinator 0:bb348c97df44 1099 #define HAL_HASHPhaseTypeDef HAL_HASH_PhaseTypeDef
lypinator 0:bb348c97df44 1100 #define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
lypinator 0:bb348c97df44 1101 #define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
lypinator 0:bb348c97df44 1102 #define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
lypinator 0:bb348c97df44 1103 #define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
lypinator 0:bb348c97df44 1104
lypinator 0:bb348c97df44 1105 /*HASH Algorithm Selection*/
lypinator 0:bb348c97df44 1106
lypinator 0:bb348c97df44 1107 #define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1
lypinator 0:bb348c97df44 1108 #define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224
lypinator 0:bb348c97df44 1109 #define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256
lypinator 0:bb348c97df44 1110 #define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5
lypinator 0:bb348c97df44 1111
lypinator 0:bb348c97df44 1112 #define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH
lypinator 0:bb348c97df44 1113 #define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC
lypinator 0:bb348c97df44 1114
lypinator 0:bb348c97df44 1115 #define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY
lypinator 0:bb348c97df44 1116 #define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY
lypinator 0:bb348c97df44 1117 /**
lypinator 0:bb348c97df44 1118 * @}
lypinator 0:bb348c97df44 1119 */
lypinator 0:bb348c97df44 1120
lypinator 0:bb348c97df44 1121 /** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1122 * @{
lypinator 0:bb348c97df44 1123 */
lypinator 0:bb348c97df44 1124 #define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
lypinator 0:bb348c97df44 1125 #define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
lypinator 0:bb348c97df44 1126 #define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
lypinator 0:bb348c97df44 1127 #define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
lypinator 0:bb348c97df44 1128 #define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
lypinator 0:bb348c97df44 1129 #define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
lypinator 0:bb348c97df44 1130 #define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
lypinator 0:bb348c97df44 1131 #define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
lypinator 0:bb348c97df44 1132 #define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
lypinator 0:bb348c97df44 1133 #if defined(STM32L0)
lypinator 0:bb348c97df44 1134 #else
lypinator 0:bb348c97df44 1135 #define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
lypinator 0:bb348c97df44 1136 #endif
lypinator 0:bb348c97df44 1137 #define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
lypinator 0:bb348c97df44 1138 #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
lypinator 0:bb348c97df44 1139 /**
lypinator 0:bb348c97df44 1140 * @}
lypinator 0:bb348c97df44 1141 */
lypinator 0:bb348c97df44 1142
lypinator 0:bb348c97df44 1143 /** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1144 * @{
lypinator 0:bb348c97df44 1145 */
lypinator 0:bb348c97df44 1146 #define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram
lypinator 0:bb348c97df44 1147 #define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown
lypinator 0:bb348c97df44 1148 #define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown
lypinator 0:bb348c97df44 1149 #define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock
lypinator 0:bb348c97df44 1150 #define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock
lypinator 0:bb348c97df44 1151 #define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase
lypinator 0:bb348c97df44 1152 #define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program
lypinator 0:bb348c97df44 1153
lypinator 0:bb348c97df44 1154 /**
lypinator 0:bb348c97df44 1155 * @}
lypinator 0:bb348c97df44 1156 */
lypinator 0:bb348c97df44 1157
lypinator 0:bb348c97df44 1158 /** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1159 * @{
lypinator 0:bb348c97df44 1160 */
lypinator 0:bb348c97df44 1161 #define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter
lypinator 0:bb348c97df44 1162 #define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter
lypinator 0:bb348c97df44 1163 #define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter
lypinator 0:bb348c97df44 1164 #define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
lypinator 0:bb348c97df44 1165
lypinator 0:bb348c97df44 1166 #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
lypinator 0:bb348c97df44 1167 /**
lypinator 0:bb348c97df44 1168 * @}
lypinator 0:bb348c97df44 1169 */
lypinator 0:bb348c97df44 1170
lypinator 0:bb348c97df44 1171 /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
lypinator 0:bb348c97df44 1172 * @{
lypinator 0:bb348c97df44 1173 */
lypinator 0:bb348c97df44 1174 #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD
lypinator 0:bb348c97df44 1175 #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg
lypinator 0:bb348c97df44 1176 #define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown
lypinator 0:bb348c97df44 1177 #define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor
lypinator 0:bb348c97df44 1178 #define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg
lypinator 0:bb348c97df44 1179 #define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown
lypinator 0:bb348c97df44 1180 #define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor
lypinator 0:bb348c97df44 1181 #define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler
lypinator 0:bb348c97df44 1182 #define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD
lypinator 0:bb348c97df44 1183 #define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler
lypinator 0:bb348c97df44 1184 #define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback
lypinator 0:bb348c97df44 1185 #define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive
lypinator 0:bb348c97df44 1186 #define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive
lypinator 0:bb348c97df44 1187 #define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC
lypinator 0:bb348c97df44 1188 #define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC
lypinator 0:bb348c97df44 1189 #define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM
lypinator 0:bb348c97df44 1190
lypinator 0:bb348c97df44 1191 #define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL
lypinator 0:bb348c97df44 1192 #define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING
lypinator 0:bb348c97df44 1193 #define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING
lypinator 0:bb348c97df44 1194 #define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING
lypinator 0:bb348c97df44 1195 #define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING
lypinator 0:bb348c97df44 1196 #define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING
lypinator 0:bb348c97df44 1197 #define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING
lypinator 0:bb348c97df44 1198
lypinator 0:bb348c97df44 1199 #define CR_OFFSET_BB PWR_CR_OFFSET_BB
lypinator 0:bb348c97df44 1200 #define CSR_OFFSET_BB PWR_CSR_OFFSET_BB
lypinator 0:bb348c97df44 1201 #define PMODE_BIT_NUMBER VOS_BIT_NUMBER
lypinator 0:bb348c97df44 1202 #define CR_PMODE_BB CR_VOS_BB
lypinator 0:bb348c97df44 1203
lypinator 0:bb348c97df44 1204 #define DBP_BitNumber DBP_BIT_NUMBER
lypinator 0:bb348c97df44 1205 #define PVDE_BitNumber PVDE_BIT_NUMBER
lypinator 0:bb348c97df44 1206 #define PMODE_BitNumber PMODE_BIT_NUMBER
lypinator 0:bb348c97df44 1207 #define EWUP_BitNumber EWUP_BIT_NUMBER
lypinator 0:bb348c97df44 1208 #define FPDS_BitNumber FPDS_BIT_NUMBER
lypinator 0:bb348c97df44 1209 #define ODEN_BitNumber ODEN_BIT_NUMBER
lypinator 0:bb348c97df44 1210 #define ODSWEN_BitNumber ODSWEN_BIT_NUMBER
lypinator 0:bb348c97df44 1211 #define MRLVDS_BitNumber MRLVDS_BIT_NUMBER
lypinator 0:bb348c97df44 1212 #define LPLVDS_BitNumber LPLVDS_BIT_NUMBER
lypinator 0:bb348c97df44 1213 #define BRE_BitNumber BRE_BIT_NUMBER
lypinator 0:bb348c97df44 1214
lypinator 0:bb348c97df44 1215 #define PWR_MODE_EVT PWR_PVD_MODE_NORMAL
lypinator 0:bb348c97df44 1216
lypinator 0:bb348c97df44 1217 /**
lypinator 0:bb348c97df44 1218 * @}
lypinator 0:bb348c97df44 1219 */
lypinator 0:bb348c97df44 1220
lypinator 0:bb348c97df44 1221 /** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1222 * @{
lypinator 0:bb348c97df44 1223 */
lypinator 0:bb348c97df44 1224 #define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT
lypinator 0:bb348c97df44 1225 #define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback
lypinator 0:bb348c97df44 1226 #define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback
lypinator 0:bb348c97df44 1227 /**
lypinator 0:bb348c97df44 1228 * @}
lypinator 0:bb348c97df44 1229 */
lypinator 0:bb348c97df44 1230
lypinator 0:bb348c97df44 1231 /** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1232 * @{
lypinator 0:bb348c97df44 1233 */
lypinator 0:bb348c97df44 1234 #define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo
lypinator 0:bb348c97df44 1235 /**
lypinator 0:bb348c97df44 1236 * @}
lypinator 0:bb348c97df44 1237 */
lypinator 0:bb348c97df44 1238
lypinator 0:bb348c97df44 1239 /** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1240 * @{
lypinator 0:bb348c97df44 1241 */
lypinator 0:bb348c97df44 1242 #define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt
lypinator 0:bb348c97df44 1243 #define HAL_TIM_DMAError TIM_DMAError
lypinator 0:bb348c97df44 1244 #define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
lypinator 0:bb348c97df44 1245 #define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
lypinator 0:bb348c97df44 1246 /**
lypinator 0:bb348c97df44 1247 * @}
lypinator 0:bb348c97df44 1248 */
lypinator 0:bb348c97df44 1249
lypinator 0:bb348c97df44 1250 /** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1251 * @{
lypinator 0:bb348c97df44 1252 */
lypinator 0:bb348c97df44 1253 #define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
lypinator 0:bb348c97df44 1254 /**
lypinator 0:bb348c97df44 1255 * @}
lypinator 0:bb348c97df44 1256 */
lypinator 0:bb348c97df44 1257
lypinator 0:bb348c97df44 1258 /** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1259 * @{
lypinator 0:bb348c97df44 1260 */
lypinator 0:bb348c97df44 1261 #define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback
lypinator 0:bb348c97df44 1262 #define HAL_LTDC_Relaod HAL_LTDC_Reload
lypinator 0:bb348c97df44 1263 #define HAL_LTDC_StructInitFromVideoConfig HAL_LTDCEx_StructInitFromVideoConfig
lypinator 0:bb348c97df44 1264 #define HAL_LTDC_StructInitFromAdaptedCommandConfig HAL_LTDCEx_StructInitFromAdaptedCommandConfig
lypinator 0:bb348c97df44 1265 /**
lypinator 0:bb348c97df44 1266 * @}
lypinator 0:bb348c97df44 1267 */
lypinator 0:bb348c97df44 1268
lypinator 0:bb348c97df44 1269
lypinator 0:bb348c97df44 1270 /** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1271 * @{
lypinator 0:bb348c97df44 1272 */
lypinator 0:bb348c97df44 1273
lypinator 0:bb348c97df44 1274 /**
lypinator 0:bb348c97df44 1275 * @}
lypinator 0:bb348c97df44 1276 */
lypinator 0:bb348c97df44 1277
lypinator 0:bb348c97df44 1278 /* Exported macros ------------------------------------------------------------*/
lypinator 0:bb348c97df44 1279
lypinator 0:bb348c97df44 1280 /** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1281 * @{
lypinator 0:bb348c97df44 1282 */
lypinator 0:bb348c97df44 1283 #define AES_IT_CC CRYP_IT_CC
lypinator 0:bb348c97df44 1284 #define AES_IT_ERR CRYP_IT_ERR
lypinator 0:bb348c97df44 1285 #define AES_FLAG_CCF CRYP_FLAG_CCF
lypinator 0:bb348c97df44 1286 /**
lypinator 0:bb348c97df44 1287 * @}
lypinator 0:bb348c97df44 1288 */
lypinator 0:bb348c97df44 1289
lypinator 0:bb348c97df44 1290 /** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1291 * @{
lypinator 0:bb348c97df44 1292 */
lypinator 0:bb348c97df44 1293 #define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE
lypinator 0:bb348c97df44 1294 #define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH
lypinator 0:bb348c97df44 1295 #define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
lypinator 0:bb348c97df44 1296 #define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM
lypinator 0:bb348c97df44 1297 #define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC
lypinator 0:bb348c97df44 1298 #define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM
lypinator 0:bb348c97df44 1299 #define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC
lypinator 0:bb348c97df44 1300 #define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI
lypinator 0:bb348c97df44 1301 #define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK
lypinator 0:bb348c97df44 1302 #define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG
lypinator 0:bb348c97df44 1303 #define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG
lypinator 0:bb348c97df44 1304 #define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE
lypinator 0:bb348c97df44 1305 #define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE
lypinator 0:bb348c97df44 1306 #define __HAL_SYSCFG_SRAM2_WRP_ENABLE __HAL_SYSCFG_SRAM2_WRP_0_31_ENABLE
lypinator 0:bb348c97df44 1307
lypinator 0:bb348c97df44 1308 #define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY
lypinator 0:bb348c97df44 1309 #define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48
lypinator 0:bb348c97df44 1310 #define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS
lypinator 0:bb348c97df44 1311 #define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER
lypinator 0:bb348c97df44 1312 #define CMP_PD_BitNumber CMP_PD_BIT_NUMBER
lypinator 0:bb348c97df44 1313
lypinator 0:bb348c97df44 1314 /**
lypinator 0:bb348c97df44 1315 * @}
lypinator 0:bb348c97df44 1316 */
lypinator 0:bb348c97df44 1317
lypinator 0:bb348c97df44 1318
lypinator 0:bb348c97df44 1319 /** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1320 * @{
lypinator 0:bb348c97df44 1321 */
lypinator 0:bb348c97df44 1322 #define __ADC_ENABLE __HAL_ADC_ENABLE
lypinator 0:bb348c97df44 1323 #define __ADC_DISABLE __HAL_ADC_DISABLE
lypinator 0:bb348c97df44 1324 #define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS
lypinator 0:bb348c97df44 1325 #define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS
lypinator 0:bb348c97df44 1326 #define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE
lypinator 0:bb348c97df44 1327 #define __ADC_IS_ENABLED ADC_IS_ENABLE
lypinator 0:bb348c97df44 1328 #define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR
lypinator 0:bb348c97df44 1329 #define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED
lypinator 0:bb348c97df44 1330 #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
lypinator 0:bb348c97df44 1331 #define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR
lypinator 0:bb348c97df44 1332 #define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED
lypinator 0:bb348c97df44 1333 #define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING
lypinator 0:bb348c97df44 1334 #define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE
lypinator 0:bb348c97df44 1335
lypinator 0:bb348c97df44 1336 #define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
lypinator 0:bb348c97df44 1337 #define __HAL_ADC_JSQR_RK ADC_JSQR_RK
lypinator 0:bb348c97df44 1338 #define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT
lypinator 0:bb348c97df44 1339 #define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR
lypinator 0:bb348c97df44 1340 #define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION
lypinator 0:bb348c97df44 1341 #define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE
lypinator 0:bb348c97df44 1342 #define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS
lypinator 0:bb348c97df44 1343 #define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS
lypinator 0:bb348c97df44 1344 #define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM
lypinator 0:bb348c97df44 1345 #define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT
lypinator 0:bb348c97df44 1346 #define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS
lypinator 0:bb348c97df44 1347 #define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN
lypinator 0:bb348c97df44 1348 #define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ
lypinator 0:bb348c97df44 1349 #define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET
lypinator 0:bb348c97df44 1350 #define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET
lypinator 0:bb348c97df44 1351 #define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL
lypinator 0:bb348c97df44 1352 #define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL
lypinator 0:bb348c97df44 1353 #define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET
lypinator 0:bb348c97df44 1354 #define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET
lypinator 0:bb348c97df44 1355 #define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD
lypinator 0:bb348c97df44 1356
lypinator 0:bb348c97df44 1357 #define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION
lypinator 0:bb348c97df44 1358 #define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
lypinator 0:bb348c97df44 1359 #define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
lypinator 0:bb348c97df44 1360 #define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER
lypinator 0:bb348c97df44 1361 #define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI
lypinator 0:bb348c97df44 1362 #define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
lypinator 0:bb348c97df44 1363 #define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
lypinator 0:bb348c97df44 1364 #define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER
lypinator 0:bb348c97df44 1365 #define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER
lypinator 0:bb348c97df44 1366 #define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE
lypinator 0:bb348c97df44 1367
lypinator 0:bb348c97df44 1368 #define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT
lypinator 0:bb348c97df44 1369 #define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT
lypinator 0:bb348c97df44 1370 #define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL
lypinator 0:bb348c97df44 1371 #define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM
lypinator 0:bb348c97df44 1372 #define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET
lypinator 0:bb348c97df44 1373 #define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE
lypinator 0:bb348c97df44 1374 #define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE
lypinator 0:bb348c97df44 1375 #define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER
lypinator 0:bb348c97df44 1376
lypinator 0:bb348c97df44 1377 #define __HAL_ADC_SQR1 ADC_SQR1
lypinator 0:bb348c97df44 1378 #define __HAL_ADC_SMPR1 ADC_SMPR1
lypinator 0:bb348c97df44 1379 #define __HAL_ADC_SMPR2 ADC_SMPR2
lypinator 0:bb348c97df44 1380 #define __HAL_ADC_SQR3_RK ADC_SQR3_RK
lypinator 0:bb348c97df44 1381 #define __HAL_ADC_SQR2_RK ADC_SQR2_RK
lypinator 0:bb348c97df44 1382 #define __HAL_ADC_SQR1_RK ADC_SQR1_RK
lypinator 0:bb348c97df44 1383 #define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS
lypinator 0:bb348c97df44 1384 #define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS
lypinator 0:bb348c97df44 1385 #define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV
lypinator 0:bb348c97df44 1386 #define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection
lypinator 0:bb348c97df44 1387 #define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq
lypinator 0:bb348c97df44 1388 #define __HAL_ADC_JSQR ADC_JSQR
lypinator 0:bb348c97df44 1389
lypinator 0:bb348c97df44 1390 #define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL
lypinator 0:bb348c97df44 1391 #define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS
lypinator 0:bb348c97df44 1392 #define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF
lypinator 0:bb348c97df44 1393 #define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT
lypinator 0:bb348c97df44 1394 #define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS
lypinator 0:bb348c97df44 1395 #define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN
lypinator 0:bb348c97df44 1396 #define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR
lypinator 0:bb348c97df44 1397 #define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ
lypinator 0:bb348c97df44 1398
lypinator 0:bb348c97df44 1399 /**
lypinator 0:bb348c97df44 1400 * @}
lypinator 0:bb348c97df44 1401 */
lypinator 0:bb348c97df44 1402
lypinator 0:bb348c97df44 1403 /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1404 * @{
lypinator 0:bb348c97df44 1405 */
lypinator 0:bb348c97df44 1406 #define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT
lypinator 0:bb348c97df44 1407 #define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT
lypinator 0:bb348c97df44 1408 #define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT
lypinator 0:bb348c97df44 1409 #define IS_DAC_GENERATE_WAVE IS_DAC_WAVE
lypinator 0:bb348c97df44 1410
lypinator 0:bb348c97df44 1411 /**
lypinator 0:bb348c97df44 1412 * @}
lypinator 0:bb348c97df44 1413 */
lypinator 0:bb348c97df44 1414
lypinator 0:bb348c97df44 1415 /** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1416 * @{
lypinator 0:bb348c97df44 1417 */
lypinator 0:bb348c97df44 1418 #define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
lypinator 0:bb348c97df44 1419 #define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
lypinator 0:bb348c97df44 1420 #define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
lypinator 0:bb348c97df44 1421 #define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
lypinator 0:bb348c97df44 1422 #define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
lypinator 0:bb348c97df44 1423 #define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
lypinator 0:bb348c97df44 1424 #define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
lypinator 0:bb348c97df44 1425 #define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
lypinator 0:bb348c97df44 1426 #define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
lypinator 0:bb348c97df44 1427 #define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
lypinator 0:bb348c97df44 1428 #define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
lypinator 0:bb348c97df44 1429 #define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
lypinator 0:bb348c97df44 1430 #define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
lypinator 0:bb348c97df44 1431 #define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
lypinator 0:bb348c97df44 1432 #define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
lypinator 0:bb348c97df44 1433 #define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
lypinator 0:bb348c97df44 1434
lypinator 0:bb348c97df44 1435 #define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
lypinator 0:bb348c97df44 1436 #define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
lypinator 0:bb348c97df44 1437 #define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
lypinator 0:bb348c97df44 1438 #define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
lypinator 0:bb348c97df44 1439 #define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
lypinator 0:bb348c97df44 1440 #define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
lypinator 0:bb348c97df44 1441 #define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
lypinator 0:bb348c97df44 1442 #define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
lypinator 0:bb348c97df44 1443 #define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
lypinator 0:bb348c97df44 1444 #define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
lypinator 0:bb348c97df44 1445 #define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
lypinator 0:bb348c97df44 1446 #define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
lypinator 0:bb348c97df44 1447 #define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
lypinator 0:bb348c97df44 1448 #define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
lypinator 0:bb348c97df44 1449
lypinator 0:bb348c97df44 1450
lypinator 0:bb348c97df44 1451 #define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
lypinator 0:bb348c97df44 1452 #define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
lypinator 0:bb348c97df44 1453 #define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
lypinator 0:bb348c97df44 1454 #define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
lypinator 0:bb348c97df44 1455 #define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
lypinator 0:bb348c97df44 1456 #define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
lypinator 0:bb348c97df44 1457 #define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
lypinator 0:bb348c97df44 1458 #define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
lypinator 0:bb348c97df44 1459 #define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
lypinator 0:bb348c97df44 1460 #define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
lypinator 0:bb348c97df44 1461 #define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
lypinator 0:bb348c97df44 1462 #define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
lypinator 0:bb348c97df44 1463 #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
lypinator 0:bb348c97df44 1464 #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
lypinator 0:bb348c97df44 1465 #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
lypinator 0:bb348c97df44 1466 #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
lypinator 0:bb348c97df44 1467 #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
lypinator 0:bb348c97df44 1468 #define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
lypinator 0:bb348c97df44 1469 #define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
lypinator 0:bb348c97df44 1470 #define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
lypinator 0:bb348c97df44 1471 #define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
lypinator 0:bb348c97df44 1472 #define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
lypinator 0:bb348c97df44 1473 #define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
lypinator 0:bb348c97df44 1474 #define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
lypinator 0:bb348c97df44 1475
lypinator 0:bb348c97df44 1476 /**
lypinator 0:bb348c97df44 1477 * @}
lypinator 0:bb348c97df44 1478 */
lypinator 0:bb348c97df44 1479
lypinator 0:bb348c97df44 1480 /** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1481 * @{
lypinator 0:bb348c97df44 1482 */
lypinator 0:bb348c97df44 1483 #if defined(STM32F3)
lypinator 0:bb348c97df44 1484 #define COMP_START __HAL_COMP_ENABLE
lypinator 0:bb348c97df44 1485 #define COMP_STOP __HAL_COMP_DISABLE
lypinator 0:bb348c97df44 1486 #define COMP_LOCK __HAL_COMP_LOCK
lypinator 0:bb348c97df44 1487
lypinator 0:bb348c97df44 1488 #if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F318xx) || defined(STM32F303x8) || defined(STM32F334x8) || defined(STM32F328xx)
lypinator 0:bb348c97df44 1489 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1490 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1491 __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
lypinator 0:bb348c97df44 1492 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1493 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1494 __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
lypinator 0:bb348c97df44 1495 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1496 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1497 __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
lypinator 0:bb348c97df44 1498 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1499 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1500 __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
lypinator 0:bb348c97df44 1501 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1502 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1503 __HAL_COMP_COMP6_EXTI_ENABLE_IT())
lypinator 0:bb348c97df44 1504 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1505 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1506 __HAL_COMP_COMP6_EXTI_DISABLE_IT())
lypinator 0:bb348c97df44 1507 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1508 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1509 __HAL_COMP_COMP6_EXTI_GET_FLAG())
lypinator 0:bb348c97df44 1510 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1511 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1512 __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
lypinator 0:bb348c97df44 1513 # endif
lypinator 0:bb348c97df44 1514 # if defined(STM32F302xE) || defined(STM32F302xC)
lypinator 0:bb348c97df44 1515 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1516 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1517 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1518 __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
lypinator 0:bb348c97df44 1519 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1520 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1521 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1522 __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
lypinator 0:bb348c97df44 1523 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1524 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1525 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1526 __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
lypinator 0:bb348c97df44 1527 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1528 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1529 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1530 __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
lypinator 0:bb348c97df44 1531 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1532 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1533 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1534 __HAL_COMP_COMP6_EXTI_ENABLE_IT())
lypinator 0:bb348c97df44 1535 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1536 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1537 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1538 __HAL_COMP_COMP6_EXTI_DISABLE_IT())
lypinator 0:bb348c97df44 1539 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1540 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1541 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1542 __HAL_COMP_COMP6_EXTI_GET_FLAG())
lypinator 0:bb348c97df44 1543 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1544 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1545 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1546 __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
lypinator 0:bb348c97df44 1547 # endif
lypinator 0:bb348c97df44 1548 # if defined(STM32F303xE) || defined(STM32F398xx) || defined(STM32F303xC) || defined(STM32F358xx)
lypinator 0:bb348c97df44 1549 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1550 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1551 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1552 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1553 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1554 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1555 __HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE())
lypinator 0:bb348c97df44 1556 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1557 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1558 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1559 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1560 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1561 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1562 __HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE())
lypinator 0:bb348c97df44 1563 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1564 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1565 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1566 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1567 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1568 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1569 __HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE())
lypinator 0:bb348c97df44 1570 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1571 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1572 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1573 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1574 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1575 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1576 __HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE())
lypinator 0:bb348c97df44 1577 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1578 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1579 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1580 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1581 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1582 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1583 __HAL_COMP_COMP7_EXTI_ENABLE_IT())
lypinator 0:bb348c97df44 1584 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1585 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1586 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1587 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1588 ((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1589 ((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1590 __HAL_COMP_COMP7_EXTI_DISABLE_IT())
lypinator 0:bb348c97df44 1591 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1592 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1593 ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1594 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1595 ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1596 ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1597 __HAL_COMP_COMP7_EXTI_GET_FLAG())
lypinator 0:bb348c97df44 1598 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1599 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1600 ((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1601 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1602 ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1603 ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1604 __HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
lypinator 0:bb348c97df44 1605 # endif
lypinator 0:bb348c97df44 1606 # if defined(STM32F373xC) ||defined(STM32F378xx)
lypinator 0:bb348c97df44 1607 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1608 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
lypinator 0:bb348c97df44 1609 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1610 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
lypinator 0:bb348c97df44 1611 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1612 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
lypinator 0:bb348c97df44 1613 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1614 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
lypinator 0:bb348c97df44 1615 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1616 __HAL_COMP_COMP2_EXTI_ENABLE_IT())
lypinator 0:bb348c97df44 1617 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1618 __HAL_COMP_COMP2_EXTI_DISABLE_IT())
lypinator 0:bb348c97df44 1619 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1620 __HAL_COMP_COMP2_EXTI_GET_FLAG())
lypinator 0:bb348c97df44 1621 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1622 __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
lypinator 0:bb348c97df44 1623 # endif
lypinator 0:bb348c97df44 1624 #else
lypinator 0:bb348c97df44 1625 #define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1626 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
lypinator 0:bb348c97df44 1627 #define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
lypinator 0:bb348c97df44 1628 __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
lypinator 0:bb348c97df44 1629 #define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1630 __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
lypinator 0:bb348c97df44 1631 #define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
lypinator 0:bb348c97df44 1632 __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
lypinator 0:bb348c97df44 1633 #define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 1634 __HAL_COMP_COMP2_EXTI_ENABLE_IT())
lypinator 0:bb348c97df44 1635 #define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 1636 __HAL_COMP_COMP2_EXTI_DISABLE_IT())
lypinator 0:bb348c97df44 1637 #define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 1638 __HAL_COMP_COMP2_EXTI_GET_FLAG())
lypinator 0:bb348c97df44 1639 #define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 1640 __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
lypinator 0:bb348c97df44 1641 #endif
lypinator 0:bb348c97df44 1642
lypinator 0:bb348c97df44 1643 #define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE
lypinator 0:bb348c97df44 1644
lypinator 0:bb348c97df44 1645 #if defined(STM32L0) || defined(STM32L4)
lypinator 0:bb348c97df44 1646 /* Note: On these STM32 families, the only argument of this macro */
lypinator 0:bb348c97df44 1647 /* is COMP_FLAG_LOCK. */
lypinator 0:bb348c97df44 1648 /* This macro is replaced by __HAL_COMP_IS_LOCKED with only HAL handle */
lypinator 0:bb348c97df44 1649 /* argument. */
lypinator 0:bb348c97df44 1650 #define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) (__HAL_COMP_IS_LOCKED(__HANDLE__))
lypinator 0:bb348c97df44 1651 #endif
lypinator 0:bb348c97df44 1652 /**
lypinator 0:bb348c97df44 1653 * @}
lypinator 0:bb348c97df44 1654 */
lypinator 0:bb348c97df44 1655
lypinator 0:bb348c97df44 1656 #if defined(STM32L0) || defined(STM32L4)
lypinator 0:bb348c97df44 1657 /** @defgroup HAL_COMP_Aliased_Functions HAL COMP Aliased Functions maintained for legacy purpose
lypinator 0:bb348c97df44 1658 * @{
lypinator 0:bb348c97df44 1659 */
lypinator 0:bb348c97df44 1660 #define HAL_COMP_Start_IT HAL_COMP_Start /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
lypinator 0:bb348c97df44 1661 #define HAL_COMP_Stop_IT HAL_COMP_Stop /* Function considered as legacy as EXTI event or IT configuration is done into HAL_COMP_Init() */
lypinator 0:bb348c97df44 1662 /**
lypinator 0:bb348c97df44 1663 * @}
lypinator 0:bb348c97df44 1664 */
lypinator 0:bb348c97df44 1665 #endif
lypinator 0:bb348c97df44 1666
lypinator 0:bb348c97df44 1667 /** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1668 * @{
lypinator 0:bb348c97df44 1669 */
lypinator 0:bb348c97df44 1670
lypinator 0:bb348c97df44 1671 #define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) || \
lypinator 0:bb348c97df44 1672 ((WAVE) == DAC_WAVE_NOISE)|| \
lypinator 0:bb348c97df44 1673 ((WAVE) == DAC_WAVE_TRIANGLE))
lypinator 0:bb348c97df44 1674
lypinator 0:bb348c97df44 1675 /**
lypinator 0:bb348c97df44 1676 * @}
lypinator 0:bb348c97df44 1677 */
lypinator 0:bb348c97df44 1678
lypinator 0:bb348c97df44 1679 /** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1680 * @{
lypinator 0:bb348c97df44 1681 */
lypinator 0:bb348c97df44 1682
lypinator 0:bb348c97df44 1683 #define IS_WRPAREA IS_OB_WRPAREA
lypinator 0:bb348c97df44 1684 #define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM
lypinator 0:bb348c97df44 1685 #define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
lypinator 0:bb348c97df44 1686 #define IS_TYPEERASE IS_FLASH_TYPEERASE
lypinator 0:bb348c97df44 1687 #define IS_NBSECTORS IS_FLASH_NBSECTORS
lypinator 0:bb348c97df44 1688 #define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE
lypinator 0:bb348c97df44 1689
lypinator 0:bb348c97df44 1690 /**
lypinator 0:bb348c97df44 1691 * @}
lypinator 0:bb348c97df44 1692 */
lypinator 0:bb348c97df44 1693
lypinator 0:bb348c97df44 1694 /** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1695 * @{
lypinator 0:bb348c97df44 1696 */
lypinator 0:bb348c97df44 1697
lypinator 0:bb348c97df44 1698 #define __HAL_I2C_RESET_CR2 I2C_RESET_CR2
lypinator 0:bb348c97df44 1699 #define __HAL_I2C_GENERATE_START I2C_GENERATE_START
lypinator 0:bb348c97df44 1700 #if defined(STM32F1)
lypinator 0:bb348c97df44 1701 #define __HAL_I2C_FREQ_RANGE I2C_FREQRANGE
lypinator 0:bb348c97df44 1702 #else
lypinator 0:bb348c97df44 1703 #define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE
lypinator 0:bb348c97df44 1704 #endif /* STM32F1 */
lypinator 0:bb348c97df44 1705 #define __HAL_I2C_RISE_TIME I2C_RISE_TIME
lypinator 0:bb348c97df44 1706 #define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD
lypinator 0:bb348c97df44 1707 #define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST
lypinator 0:bb348c97df44 1708 #define __HAL_I2C_SPEED I2C_SPEED
lypinator 0:bb348c97df44 1709 #define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE
lypinator 0:bb348c97df44 1710 #define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ
lypinator 0:bb348c97df44 1711 #define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS
lypinator 0:bb348c97df44 1712 #define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE
lypinator 0:bb348c97df44 1713 #define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ
lypinator 0:bb348c97df44 1714 #define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB
lypinator 0:bb348c97df44 1715 #define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB
lypinator 0:bb348c97df44 1716 #define __HAL_I2C_FREQRANGE I2C_FREQRANGE
lypinator 0:bb348c97df44 1717 /**
lypinator 0:bb348c97df44 1718 * @}
lypinator 0:bb348c97df44 1719 */
lypinator 0:bb348c97df44 1720
lypinator 0:bb348c97df44 1721 /** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1722 * @{
lypinator 0:bb348c97df44 1723 */
lypinator 0:bb348c97df44 1724
lypinator 0:bb348c97df44 1725 #define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE
lypinator 0:bb348c97df44 1726 #define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT
lypinator 0:bb348c97df44 1727
lypinator 0:bb348c97df44 1728 /**
lypinator 0:bb348c97df44 1729 * @}
lypinator 0:bb348c97df44 1730 */
lypinator 0:bb348c97df44 1731
lypinator 0:bb348c97df44 1732 /** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1733 * @{
lypinator 0:bb348c97df44 1734 */
lypinator 0:bb348c97df44 1735
lypinator 0:bb348c97df44 1736 #define __IRDA_DISABLE __HAL_IRDA_DISABLE
lypinator 0:bb348c97df44 1737 #define __IRDA_ENABLE __HAL_IRDA_ENABLE
lypinator 0:bb348c97df44 1738
lypinator 0:bb348c97df44 1739 #define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
lypinator 0:bb348c97df44 1740 #define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
lypinator 0:bb348c97df44 1741 #define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
lypinator 0:bb348c97df44 1742 #define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
lypinator 0:bb348c97df44 1743
lypinator 0:bb348c97df44 1744 #define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE
lypinator 0:bb348c97df44 1745
lypinator 0:bb348c97df44 1746
lypinator 0:bb348c97df44 1747 /**
lypinator 0:bb348c97df44 1748 * @}
lypinator 0:bb348c97df44 1749 */
lypinator 0:bb348c97df44 1750
lypinator 0:bb348c97df44 1751
lypinator 0:bb348c97df44 1752 /** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1753 * @{
lypinator 0:bb348c97df44 1754 */
lypinator 0:bb348c97df44 1755 #define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS
lypinator 0:bb348c97df44 1756 #define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
lypinator 0:bb348c97df44 1757 /**
lypinator 0:bb348c97df44 1758 * @}
lypinator 0:bb348c97df44 1759 */
lypinator 0:bb348c97df44 1760
lypinator 0:bb348c97df44 1761
lypinator 0:bb348c97df44 1762 /** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1763 * @{
lypinator 0:bb348c97df44 1764 */
lypinator 0:bb348c97df44 1765
lypinator 0:bb348c97df44 1766 #define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT
lypinator 0:bb348c97df44 1767 #define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT
lypinator 0:bb348c97df44 1768 #define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE
lypinator 0:bb348c97df44 1769
lypinator 0:bb348c97df44 1770 /**
lypinator 0:bb348c97df44 1771 * @}
lypinator 0:bb348c97df44 1772 */
lypinator 0:bb348c97df44 1773
lypinator 0:bb348c97df44 1774
lypinator 0:bb348c97df44 1775 /** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1776 * @{
lypinator 0:bb348c97df44 1777 */
lypinator 0:bb348c97df44 1778 #define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD
lypinator 0:bb348c97df44 1779 #define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX
lypinator 0:bb348c97df44 1780 #define __OPAMP_CSR_S4SELX OPAMP_CSR_S4SELX
lypinator 0:bb348c97df44 1781 #define __OPAMP_CSR_S5SELX OPAMP_CSR_S5SELX
lypinator 0:bb348c97df44 1782 #define __OPAMP_CSR_S6SELX OPAMP_CSR_S6SELX
lypinator 0:bb348c97df44 1783 #define __OPAMP_CSR_OPAXCAL_L OPAMP_CSR_OPAXCAL_L
lypinator 0:bb348c97df44 1784 #define __OPAMP_CSR_OPAXCAL_H OPAMP_CSR_OPAXCAL_H
lypinator 0:bb348c97df44 1785 #define __OPAMP_CSR_OPAXLPM OPAMP_CSR_OPAXLPM
lypinator 0:bb348c97df44 1786 #define __OPAMP_CSR_ALL_SWITCHES OPAMP_CSR_ALL_SWITCHES
lypinator 0:bb348c97df44 1787 #define __OPAMP_CSR_ANAWSELX OPAMP_CSR_ANAWSELX
lypinator 0:bb348c97df44 1788 #define __OPAMP_CSR_OPAXCALOUT OPAMP_CSR_OPAXCALOUT
lypinator 0:bb348c97df44 1789 #define __OPAMP_OFFSET_TRIM_BITSPOSITION OPAMP_OFFSET_TRIM_BITSPOSITION
lypinator 0:bb348c97df44 1790 #define __OPAMP_OFFSET_TRIM_SET OPAMP_OFFSET_TRIM_SET
lypinator 0:bb348c97df44 1791
lypinator 0:bb348c97df44 1792 /**
lypinator 0:bb348c97df44 1793 * @}
lypinator 0:bb348c97df44 1794 */
lypinator 0:bb348c97df44 1795
lypinator 0:bb348c97df44 1796
lypinator 0:bb348c97df44 1797 /** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 1798 * @{
lypinator 0:bb348c97df44 1799 */
lypinator 0:bb348c97df44 1800 #define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
lypinator 0:bb348c97df44 1801 #define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
lypinator 0:bb348c97df44 1802 #define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
lypinator 0:bb348c97df44 1803 #define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
lypinator 0:bb348c97df44 1804 #define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
lypinator 0:bb348c97df44 1805 #define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
lypinator 0:bb348c97df44 1806 #define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE
lypinator 0:bb348c97df44 1807 #define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE
lypinator 0:bb348c97df44 1808 #define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
lypinator 0:bb348c97df44 1809 #define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
lypinator 0:bb348c97df44 1810 #define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
lypinator 0:bb348c97df44 1811 #define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
lypinator 0:bb348c97df44 1812 #define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine
lypinator 0:bb348c97df44 1813 #define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
lypinator 0:bb348c97df44 1814 #define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
lypinator 0:bb348c97df44 1815 #define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
lypinator 0:bb348c97df44 1816 #define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0)
lypinator 0:bb348c97df44 1817 #define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
lypinator 0:bb348c97df44 1818 #define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
lypinator 0:bb348c97df44 1819 #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
lypinator 0:bb348c97df44 1820 #define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
lypinator 0:bb348c97df44 1821 #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
lypinator 0:bb348c97df44 1822 #define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
lypinator 0:bb348c97df44 1823 #define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
lypinator 0:bb348c97df44 1824 #define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
lypinator 0:bb348c97df44 1825 #define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0)
lypinator 0:bb348c97df44 1826 #define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0)
lypinator 0:bb348c97df44 1827 #define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
lypinator 0:bb348c97df44 1828 #define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
lypinator 0:bb348c97df44 1829 #define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
lypinator 0:bb348c97df44 1830 #define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2
lypinator 0:bb348c97df44 1831 #define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
lypinator 0:bb348c97df44 1832 #define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
lypinator 0:bb348c97df44 1833 #define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB
lypinator 0:bb348c97df44 1834 #define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB
lypinator 0:bb348c97df44 1835
lypinator 0:bb348c97df44 1836 #if defined (STM32F4)
lypinator 0:bb348c97df44 1837 #define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT()
lypinator 0:bb348c97df44 1838 #define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT()
lypinator 0:bb348c97df44 1839 #define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG()
lypinator 0:bb348c97df44 1840 #define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
lypinator 0:bb348c97df44 1841 #define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
lypinator 0:bb348c97df44 1842 #else
lypinator 0:bb348c97df44 1843 #define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG
lypinator 0:bb348c97df44 1844 #define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT
lypinator 0:bb348c97df44 1845 #define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT
lypinator 0:bb348c97df44 1846 #define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT
lypinator 0:bb348c97df44 1847 #define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG
lypinator 0:bb348c97df44 1848 #endif /* STM32F4 */
lypinator 0:bb348c97df44 1849 /**
lypinator 0:bb348c97df44 1850 * @}
lypinator 0:bb348c97df44 1851 */
lypinator 0:bb348c97df44 1852
lypinator 0:bb348c97df44 1853
lypinator 0:bb348c97df44 1854 /** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose
lypinator 0:bb348c97df44 1855 * @{
lypinator 0:bb348c97df44 1856 */
lypinator 0:bb348c97df44 1857
lypinator 0:bb348c97df44 1858 #define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI
lypinator 0:bb348c97df44 1859 #define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI
lypinator 0:bb348c97df44 1860
lypinator 0:bb348c97df44 1861 #define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
lypinator 0:bb348c97df44 1862 #define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
lypinator 0:bb348c97df44 1863
lypinator 0:bb348c97df44 1864 #define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
lypinator 0:bb348c97df44 1865 #define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
lypinator 0:bb348c97df44 1866 #define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1867 #define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1868 #define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET
lypinator 0:bb348c97df44 1869 #define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET
lypinator 0:bb348c97df44 1870 #define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE
lypinator 0:bb348c97df44 1871 #define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE
lypinator 0:bb348c97df44 1872 #define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET
lypinator 0:bb348c97df44 1873 #define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET
lypinator 0:bb348c97df44 1874 #define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1875 #define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1876 #define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE
lypinator 0:bb348c97df44 1877 #define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE
lypinator 0:bb348c97df44 1878 #define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
lypinator 0:bb348c97df44 1879 #define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
lypinator 0:bb348c97df44 1880 #define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
lypinator 0:bb348c97df44 1881 #define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
lypinator 0:bb348c97df44 1882 #define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
lypinator 0:bb348c97df44 1883 #define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
lypinator 0:bb348c97df44 1884 #define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
lypinator 0:bb348c97df44 1885 #define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
lypinator 0:bb348c97df44 1886 #define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1887 #define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1888 #define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
lypinator 0:bb348c97df44 1889 #define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
lypinator 0:bb348c97df44 1890 #define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1891 #define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1892 #define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE
lypinator 0:bb348c97df44 1893 #define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE
lypinator 0:bb348c97df44 1894 #define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
lypinator 0:bb348c97df44 1895 #define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET
lypinator 0:bb348c97df44 1896 #define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
lypinator 0:bb348c97df44 1897 #define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
lypinator 0:bb348c97df44 1898 #define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
lypinator 0:bb348c97df44 1899 #define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
lypinator 0:bb348c97df44 1900 #define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
lypinator 0:bb348c97df44 1901 #define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
lypinator 0:bb348c97df44 1902 #define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
lypinator 0:bb348c97df44 1903 #define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
lypinator 0:bb348c97df44 1904 #define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
lypinator 0:bb348c97df44 1905 #define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
lypinator 0:bb348c97df44 1906 #define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
lypinator 0:bb348c97df44 1907 #define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
lypinator 0:bb348c97df44 1908 #define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
lypinator 0:bb348c97df44 1909 #define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
lypinator 0:bb348c97df44 1910 #define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
lypinator 0:bb348c97df44 1911 #define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
lypinator 0:bb348c97df44 1912 #define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
lypinator 0:bb348c97df44 1913 #define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
lypinator 0:bb348c97df44 1914 #define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
lypinator 0:bb348c97df44 1915 #define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
lypinator 0:bb348c97df44 1916 #define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
lypinator 0:bb348c97df44 1917 #define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
lypinator 0:bb348c97df44 1918 #define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1919 #define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1920 #define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
lypinator 0:bb348c97df44 1921 #define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
lypinator 0:bb348c97df44 1922 #define __CAN_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
lypinator 0:bb348c97df44 1923 #define __CAN_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
lypinator 0:bb348c97df44 1924 #define __CAN_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
lypinator 0:bb348c97df44 1925 #define __CAN_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
lypinator 0:bb348c97df44 1926 #define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
lypinator 0:bb348c97df44 1927 #define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
lypinator 0:bb348c97df44 1928 #define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
lypinator 0:bb348c97df44 1929 #define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
lypinator 0:bb348c97df44 1930 #define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
lypinator 0:bb348c97df44 1931 #define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
lypinator 0:bb348c97df44 1932 #define __COMP_CLK_DISABLE __HAL_RCC_COMP_CLK_DISABLE
lypinator 0:bb348c97df44 1933 #define __COMP_CLK_ENABLE __HAL_RCC_COMP_CLK_ENABLE
lypinator 0:bb348c97df44 1934 #define __COMP_FORCE_RESET __HAL_RCC_COMP_FORCE_RESET
lypinator 0:bb348c97df44 1935 #define __COMP_RELEASE_RESET __HAL_RCC_COMP_RELEASE_RESET
lypinator 0:bb348c97df44 1936 #define __COMP_CLK_SLEEP_ENABLE __HAL_RCC_COMP_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1937 #define __COMP_CLK_SLEEP_DISABLE __HAL_RCC_COMP_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1938 #define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
lypinator 0:bb348c97df44 1939 #define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
lypinator 0:bb348c97df44 1940 #define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
lypinator 0:bb348c97df44 1941 #define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
lypinator 0:bb348c97df44 1942 #define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1943 #define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1944 #define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
lypinator 0:bb348c97df44 1945 #define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
lypinator 0:bb348c97df44 1946 #define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
lypinator 0:bb348c97df44 1947 #define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
lypinator 0:bb348c97df44 1948 #define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
lypinator 0:bb348c97df44 1949 #define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
lypinator 0:bb348c97df44 1950 #define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
lypinator 0:bb348c97df44 1951 #define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
lypinator 0:bb348c97df44 1952 #define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1953 #define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1954 #define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
lypinator 0:bb348c97df44 1955 #define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
lypinator 0:bb348c97df44 1956 #define __DBGMCU_CLK_ENABLE __HAL_RCC_DBGMCU_CLK_ENABLE
lypinator 0:bb348c97df44 1957 #define __DBGMCU_CLK_DISABLE __HAL_RCC_DBGMCU_CLK_DISABLE
lypinator 0:bb348c97df44 1958 #define __DBGMCU_FORCE_RESET __HAL_RCC_DBGMCU_FORCE_RESET
lypinator 0:bb348c97df44 1959 #define __DBGMCU_RELEASE_RESET __HAL_RCC_DBGMCU_RELEASE_RESET
lypinator 0:bb348c97df44 1960 #define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
lypinator 0:bb348c97df44 1961 #define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
lypinator 0:bb348c97df44 1962 #define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1963 #define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1964 #define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
lypinator 0:bb348c97df44 1965 #define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
lypinator 0:bb348c97df44 1966 #define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
lypinator 0:bb348c97df44 1967 #define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
lypinator 0:bb348c97df44 1968 #define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1969 #define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1970 #define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
lypinator 0:bb348c97df44 1971 #define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
lypinator 0:bb348c97df44 1972 #define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
lypinator 0:bb348c97df44 1973 #define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
lypinator 0:bb348c97df44 1974 #define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1975 #define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1976 #define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
lypinator 0:bb348c97df44 1977 #define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
lypinator 0:bb348c97df44 1978 #define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
lypinator 0:bb348c97df44 1979 #define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
lypinator 0:bb348c97df44 1980 #define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
lypinator 0:bb348c97df44 1981 #define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
lypinator 0:bb348c97df44 1982 #define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
lypinator 0:bb348c97df44 1983 #define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
lypinator 0:bb348c97df44 1984 #define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
lypinator 0:bb348c97df44 1985 #define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
lypinator 0:bb348c97df44 1986 #define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
lypinator 0:bb348c97df44 1987 #define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
lypinator 0:bb348c97df44 1988 #define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
lypinator 0:bb348c97df44 1989 #define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
lypinator 0:bb348c97df44 1990 #define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 1991 #define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1992 #define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
lypinator 0:bb348c97df44 1993 #define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
lypinator 0:bb348c97df44 1994 #define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE
lypinator 0:bb348c97df44 1995 #define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE
lypinator 0:bb348c97df44 1996 #define __FLITF_FORCE_RESET __HAL_RCC_FLITF_FORCE_RESET
lypinator 0:bb348c97df44 1997 #define __FLITF_RELEASE_RESET __HAL_RCC_FLITF_RELEASE_RESET
lypinator 0:bb348c97df44 1998 #define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 1999 #define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2000 #define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
lypinator 0:bb348c97df44 2001 #define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
lypinator 0:bb348c97df44 2002 #define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2003 #define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2004 #define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
lypinator 0:bb348c97df44 2005 #define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
lypinator 0:bb348c97df44 2006 #define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
lypinator 0:bb348c97df44 2007 #define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
lypinator 0:bb348c97df44 2008 #define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
lypinator 0:bb348c97df44 2009 #define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
lypinator 0:bb348c97df44 2010 #define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2011 #define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2012 #define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
lypinator 0:bb348c97df44 2013 #define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
lypinator 0:bb348c97df44 2014 #define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
lypinator 0:bb348c97df44 2015 #define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
lypinator 0:bb348c97df44 2016 #define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2017 #define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2018 #define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
lypinator 0:bb348c97df44 2019 #define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
lypinator 0:bb348c97df44 2020 #define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
lypinator 0:bb348c97df44 2021 #define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
lypinator 0:bb348c97df44 2022 #define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2023 #define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2024 #define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
lypinator 0:bb348c97df44 2025 #define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
lypinator 0:bb348c97df44 2026 #define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
lypinator 0:bb348c97df44 2027 #define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
lypinator 0:bb348c97df44 2028 #define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2029 #define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2030 #define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
lypinator 0:bb348c97df44 2031 #define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
lypinator 0:bb348c97df44 2032 #define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
lypinator 0:bb348c97df44 2033 #define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
lypinator 0:bb348c97df44 2034 #define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2035 #define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2036 #define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
lypinator 0:bb348c97df44 2037 #define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
lypinator 0:bb348c97df44 2038 #define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
lypinator 0:bb348c97df44 2039 #define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
lypinator 0:bb348c97df44 2040 #define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2041 #define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2042 #define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
lypinator 0:bb348c97df44 2043 #define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
lypinator 0:bb348c97df44 2044 #define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
lypinator 0:bb348c97df44 2045 #define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
lypinator 0:bb348c97df44 2046 #define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2047 #define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2048 #define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
lypinator 0:bb348c97df44 2049 #define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
lypinator 0:bb348c97df44 2050 #define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
lypinator 0:bb348c97df44 2051 #define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
lypinator 0:bb348c97df44 2052 #define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2053 #define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2054 #define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
lypinator 0:bb348c97df44 2055 #define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
lypinator 0:bb348c97df44 2056 #define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
lypinator 0:bb348c97df44 2057 #define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
lypinator 0:bb348c97df44 2058 #define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2059 #define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2060 #define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
lypinator 0:bb348c97df44 2061 #define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
lypinator 0:bb348c97df44 2062 #define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
lypinator 0:bb348c97df44 2063 #define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
lypinator 0:bb348c97df44 2064 #define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2065 #define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2066 #define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
lypinator 0:bb348c97df44 2067 #define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
lypinator 0:bb348c97df44 2068 #define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
lypinator 0:bb348c97df44 2069 #define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
lypinator 0:bb348c97df44 2070 #define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2071 #define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2072 #define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
lypinator 0:bb348c97df44 2073 #define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
lypinator 0:bb348c97df44 2074 #define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
lypinator 0:bb348c97df44 2075 #define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
lypinator 0:bb348c97df44 2076 #define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2077 #define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2078 #define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
lypinator 0:bb348c97df44 2079 #define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
lypinator 0:bb348c97df44 2080 #define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
lypinator 0:bb348c97df44 2081 #define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
lypinator 0:bb348c97df44 2082 #define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2083 #define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2084 #define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
lypinator 0:bb348c97df44 2085 #define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
lypinator 0:bb348c97df44 2086 #define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
lypinator 0:bb348c97df44 2087 #define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
lypinator 0:bb348c97df44 2088 #define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2089 #define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2090 #define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
lypinator 0:bb348c97df44 2091 #define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
lypinator 0:bb348c97df44 2092 #define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
lypinator 0:bb348c97df44 2093 #define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
lypinator 0:bb348c97df44 2094 #define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2095 #define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2096 #define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
lypinator 0:bb348c97df44 2097 #define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
lypinator 0:bb348c97df44 2098 #define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
lypinator 0:bb348c97df44 2099 #define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
lypinator 0:bb348c97df44 2100 #define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2101 #define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2102 #define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
lypinator 0:bb348c97df44 2103 #define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
lypinator 0:bb348c97df44 2104 #define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
lypinator 0:bb348c97df44 2105 #define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
lypinator 0:bb348c97df44 2106 #define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2107 #define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2108 #define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
lypinator 0:bb348c97df44 2109 #define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
lypinator 0:bb348c97df44 2110 #define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
lypinator 0:bb348c97df44 2111 #define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
lypinator 0:bb348c97df44 2112 #define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2113 #define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2114 #define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
lypinator 0:bb348c97df44 2115 #define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
lypinator 0:bb348c97df44 2116 #define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
lypinator 0:bb348c97df44 2117 #define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
lypinator 0:bb348c97df44 2118 #define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2119 #define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2120 #define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
lypinator 0:bb348c97df44 2121 #define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
lypinator 0:bb348c97df44 2122
lypinator 0:bb348c97df44 2123 #if defined(STM32WB)
lypinator 0:bb348c97df44 2124 #define __HAL_RCC_QSPI_CLK_DISABLE __HAL_RCC_QUADSPI_CLK_DISABLE
lypinator 0:bb348c97df44 2125 #define __HAL_RCC_QSPI_CLK_ENABLE __HAL_RCC_QUADSPI_CLK_ENABLE
lypinator 0:bb348c97df44 2126 #define __HAL_RCC_QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QUADSPI_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2127 #define __HAL_RCC_QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QUADSPI_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2128 #define __HAL_RCC_QSPI_FORCE_RESET __HAL_RCC_QUADSPI_FORCE_RESET
lypinator 0:bb348c97df44 2129 #define __HAL_RCC_QSPI_RELEASE_RESET __HAL_RCC_QUADSPI_RELEASE_RESET
lypinator 0:bb348c97df44 2130 #define __HAL_RCC_QSPI_IS_CLK_ENABLED __HAL_RCC_QUADSPI_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2131 #define __HAL_RCC_QSPI_IS_CLK_DISABLED __HAL_RCC_QUADSPI_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2132 #define __HAL_RCC_QSPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_ENABLED
lypinator 0:bb348c97df44 2133 #define __HAL_RCC_QSPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_QUADSPI_IS_CLK_SLEEP_DISABLED
lypinator 0:bb348c97df44 2134 #define QSPI_IRQHandler QUADSPI_IRQHandler
lypinator 0:bb348c97df44 2135 #endif /* __HAL_RCC_QUADSPI_CLK_ENABLE */
lypinator 0:bb348c97df44 2136
lypinator 0:bb348c97df44 2137 #define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
lypinator 0:bb348c97df44 2138 #define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
lypinator 0:bb348c97df44 2139 #define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2140 #define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2141 #define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
lypinator 0:bb348c97df44 2142 #define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
lypinator 0:bb348c97df44 2143 #define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
lypinator 0:bb348c97df44 2144 #define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
lypinator 0:bb348c97df44 2145 #define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2146 #define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2147 #define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
lypinator 0:bb348c97df44 2148 #define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
lypinator 0:bb348c97df44 2149 #define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
lypinator 0:bb348c97df44 2150 #define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
lypinator 0:bb348c97df44 2151 #define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2152 #define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2153 #define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
lypinator 0:bb348c97df44 2154 #define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
lypinator 0:bb348c97df44 2155 #define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
lypinator 0:bb348c97df44 2156 #define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
lypinator 0:bb348c97df44 2157 #define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
lypinator 0:bb348c97df44 2158 #define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
lypinator 0:bb348c97df44 2159 #define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2160 #define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2161 #define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
lypinator 0:bb348c97df44 2162 #define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
lypinator 0:bb348c97df44 2163 #define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
lypinator 0:bb348c97df44 2164 #define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
lypinator 0:bb348c97df44 2165 #define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2166 #define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2167 #define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
lypinator 0:bb348c97df44 2168 #define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
lypinator 0:bb348c97df44 2169 #define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
lypinator 0:bb348c97df44 2170 #define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
lypinator 0:bb348c97df44 2171 #define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2172 #define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2173 #define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
lypinator 0:bb348c97df44 2174 #define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
lypinator 0:bb348c97df44 2175 #define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
lypinator 0:bb348c97df44 2176 #define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
lypinator 0:bb348c97df44 2177 #define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2178 #define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2179 #define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
lypinator 0:bb348c97df44 2180 #define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
lypinator 0:bb348c97df44 2181 #define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
lypinator 0:bb348c97df44 2182 #define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
lypinator 0:bb348c97df44 2183 #define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2184 #define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2185 #define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2186 #define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2187 #define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
lypinator 0:bb348c97df44 2188 #define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
lypinator 0:bb348c97df44 2189 #define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2190 #define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2191 #define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
lypinator 0:bb348c97df44 2192 #define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
lypinator 0:bb348c97df44 2193 #define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
lypinator 0:bb348c97df44 2194 #define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
lypinator 0:bb348c97df44 2195 #define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2196 #define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2197 #define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
lypinator 0:bb348c97df44 2198 #define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
lypinator 0:bb348c97df44 2199 #define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
lypinator 0:bb348c97df44 2200 #define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
lypinator 0:bb348c97df44 2201 #define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2202 #define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2203 #define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
lypinator 0:bb348c97df44 2204 #define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
lypinator 0:bb348c97df44 2205 #define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
lypinator 0:bb348c97df44 2206 #define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
lypinator 0:bb348c97df44 2207 #define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
lypinator 0:bb348c97df44 2208 #define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
lypinator 0:bb348c97df44 2209 #define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
lypinator 0:bb348c97df44 2210 #define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
lypinator 0:bb348c97df44 2211 #define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
lypinator 0:bb348c97df44 2212 #define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
lypinator 0:bb348c97df44 2213 #define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
lypinator 0:bb348c97df44 2214 #define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
lypinator 0:bb348c97df44 2215 #define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
lypinator 0:bb348c97df44 2216 #define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
lypinator 0:bb348c97df44 2217 #define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
lypinator 0:bb348c97df44 2218 #define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
lypinator 0:bb348c97df44 2219 #define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
lypinator 0:bb348c97df44 2220 #define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
lypinator 0:bb348c97df44 2221 #define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
lypinator 0:bb348c97df44 2222 #define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
lypinator 0:bb348c97df44 2223 #define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
lypinator 0:bb348c97df44 2224 #define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
lypinator 0:bb348c97df44 2225 #define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
lypinator 0:bb348c97df44 2226 #define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
lypinator 0:bb348c97df44 2227 #define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2228 #define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2229 #define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
lypinator 0:bb348c97df44 2230 #define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
lypinator 0:bb348c97df44 2231 #define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
lypinator 0:bb348c97df44 2232 #define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
lypinator 0:bb348c97df44 2233 #define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2234 #define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2235 #define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
lypinator 0:bb348c97df44 2236 #define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
lypinator 0:bb348c97df44 2237 #define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
lypinator 0:bb348c97df44 2238 #define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
lypinator 0:bb348c97df44 2239 #define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2240 #define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2241 #define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
lypinator 0:bb348c97df44 2242 #define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
lypinator 0:bb348c97df44 2243 #define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
lypinator 0:bb348c97df44 2244 #define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
lypinator 0:bb348c97df44 2245 #define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2246 #define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2247 #define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
lypinator 0:bb348c97df44 2248 #define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
lypinator 0:bb348c97df44 2249 #define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
lypinator 0:bb348c97df44 2250 #define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
lypinator 0:bb348c97df44 2251 #define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2252 #define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2253 #define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
lypinator 0:bb348c97df44 2254 #define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
lypinator 0:bb348c97df44 2255 #define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
lypinator 0:bb348c97df44 2256 #define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
lypinator 0:bb348c97df44 2257 #define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2258 #define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2259 #define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
lypinator 0:bb348c97df44 2260 #define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
lypinator 0:bb348c97df44 2261 #define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
lypinator 0:bb348c97df44 2262 #define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
lypinator 0:bb348c97df44 2263 #define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2264 #define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2265 #define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
lypinator 0:bb348c97df44 2266 #define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
lypinator 0:bb348c97df44 2267 #define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
lypinator 0:bb348c97df44 2268 #define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
lypinator 0:bb348c97df44 2269 #define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2270 #define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2271 #define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
lypinator 0:bb348c97df44 2272 #define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
lypinator 0:bb348c97df44 2273 #define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
lypinator 0:bb348c97df44 2274 #define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
lypinator 0:bb348c97df44 2275 #define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2276 #define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2277 #define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
lypinator 0:bb348c97df44 2278 #define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
lypinator 0:bb348c97df44 2279 #define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
lypinator 0:bb348c97df44 2280 #define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
lypinator 0:bb348c97df44 2281 #define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2282 #define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2283 #define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
lypinator 0:bb348c97df44 2284 #define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
lypinator 0:bb348c97df44 2285 #define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
lypinator 0:bb348c97df44 2286 #define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
lypinator 0:bb348c97df44 2287 #define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
lypinator 0:bb348c97df44 2288 #define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
lypinator 0:bb348c97df44 2289 #define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
lypinator 0:bb348c97df44 2290 #define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
lypinator 0:bb348c97df44 2291 #define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2292 #define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2293 #define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
lypinator 0:bb348c97df44 2294 #define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
lypinator 0:bb348c97df44 2295 #define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
lypinator 0:bb348c97df44 2296 #define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
lypinator 0:bb348c97df44 2297 #define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2298 #define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2299 #define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
lypinator 0:bb348c97df44 2300 #define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
lypinator 0:bb348c97df44 2301 #define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
lypinator 0:bb348c97df44 2302 #define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
lypinator 0:bb348c97df44 2303 #define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2304 #define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2305 #define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
lypinator 0:bb348c97df44 2306 #define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
lypinator 0:bb348c97df44 2307 #define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
lypinator 0:bb348c97df44 2308 #define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
lypinator 0:bb348c97df44 2309 #define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2310 #define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2311 #define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
lypinator 0:bb348c97df44 2312 #define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
lypinator 0:bb348c97df44 2313 #define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
lypinator 0:bb348c97df44 2314 #define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
lypinator 0:bb348c97df44 2315 #define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2316 #define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2317 #define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
lypinator 0:bb348c97df44 2318 #define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
lypinator 0:bb348c97df44 2319 #define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
lypinator 0:bb348c97df44 2320 #define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
lypinator 0:bb348c97df44 2321 #define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2322 #define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2323 #define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
lypinator 0:bb348c97df44 2324 #define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
lypinator 0:bb348c97df44 2325 #define __USART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
lypinator 0:bb348c97df44 2326 #define __USART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
lypinator 0:bb348c97df44 2327 #define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2328 #define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2329 #define __USART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
lypinator 0:bb348c97df44 2330 #define __USART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
lypinator 0:bb348c97df44 2331 #define __USART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
lypinator 0:bb348c97df44 2332 #define __USART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
lypinator 0:bb348c97df44 2333 #define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2334 #define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2335 #define __USART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
lypinator 0:bb348c97df44 2336 #define __USART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
lypinator 0:bb348c97df44 2337 #define __USART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE
lypinator 0:bb348c97df44 2338 #define __USART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE
lypinator 0:bb348c97df44 2339 #define __USART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET
lypinator 0:bb348c97df44 2340 #define __USART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET
lypinator 0:bb348c97df44 2341 #define __USART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE
lypinator 0:bb348c97df44 2342 #define __USART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE
lypinator 0:bb348c97df44 2343 #define __USART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET
lypinator 0:bb348c97df44 2344 #define __USART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET
lypinator 0:bb348c97df44 2345 #define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE
lypinator 0:bb348c97df44 2346 #define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE
lypinator 0:bb348c97df44 2347 #define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET
lypinator 0:bb348c97df44 2348 #define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2349 #define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2350 #define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
lypinator 0:bb348c97df44 2351 #define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
lypinator 0:bb348c97df44 2352 #define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
lypinator 0:bb348c97df44 2353 #define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
lypinator 0:bb348c97df44 2354 #define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
lypinator 0:bb348c97df44 2355 #define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2356 #define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2357 #define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
lypinator 0:bb348c97df44 2358 #define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
lypinator 0:bb348c97df44 2359 #define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE
lypinator 0:bb348c97df44 2360 #define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE
lypinator 0:bb348c97df44 2361 #define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET
lypinator 0:bb348c97df44 2362 #define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET
lypinator 0:bb348c97df44 2363 #define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2364 #define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2365 #define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE
lypinator 0:bb348c97df44 2366 #define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE
lypinator 0:bb348c97df44 2367 #define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET
lypinator 0:bb348c97df44 2368 #define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET
lypinator 0:bb348c97df44 2369 #define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2370 #define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2371 #define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
lypinator 0:bb348c97df44 2372 #define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
lypinator 0:bb348c97df44 2373 #define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2374 #define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2375 #define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
lypinator 0:bb348c97df44 2376 #define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
lypinator 0:bb348c97df44 2377 #define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
lypinator 0:bb348c97df44 2378 #define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
lypinator 0:bb348c97df44 2379
lypinator 0:bb348c97df44 2380 #define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
lypinator 0:bb348c97df44 2381 #define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
lypinator 0:bb348c97df44 2382 #define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2383 #define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2384 #define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE
lypinator 0:bb348c97df44 2385 #define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE
lypinator 0:bb348c97df44 2386 #define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
lypinator 0:bb348c97df44 2387 #define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE
lypinator 0:bb348c97df44 2388 #define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2389 #define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2390 #define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2391 #define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2392 #define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2393 #define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2394 #define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2395 #define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2396 #define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE
lypinator 0:bb348c97df44 2397 #define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE
lypinator 0:bb348c97df44 2398 #define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE
lypinator 0:bb348c97df44 2399 #define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET
lypinator 0:bb348c97df44 2400 #define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET
lypinator 0:bb348c97df44 2401 #define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2402 #define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2403 #define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE
lypinator 0:bb348c97df44 2404 #define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE
lypinator 0:bb348c97df44 2405 #define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE
lypinator 0:bb348c97df44 2406 #define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET
lypinator 0:bb348c97df44 2407 #define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET
lypinator 0:bb348c97df44 2408 #define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2409 #define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2410 #define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE
lypinator 0:bb348c97df44 2411 #define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE
lypinator 0:bb348c97df44 2412 #define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET
lypinator 0:bb348c97df44 2413 #define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET
lypinator 0:bb348c97df44 2414 #define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2415 #define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2416 #define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE
lypinator 0:bb348c97df44 2417 #define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE
lypinator 0:bb348c97df44 2418 #define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET
lypinator 0:bb348c97df44 2419 #define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET
lypinator 0:bb348c97df44 2420 #define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2421 #define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2422 #define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2423 #define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2424 #define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2425 #define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2426 #define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2427 #define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2428 #define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2429 #define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2430 #define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2431 #define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2432 #define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2433 #define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE
lypinator 0:bb348c97df44 2434 #define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE
lypinator 0:bb348c97df44 2435 #define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2436 #define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2437 #define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
lypinator 0:bb348c97df44 2438 #define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE
lypinator 0:bb348c97df44 2439 #define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE
lypinator 0:bb348c97df44 2440 #define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE
lypinator 0:bb348c97df44 2441 #define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET
lypinator 0:bb348c97df44 2442 #define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET
lypinator 0:bb348c97df44 2443 #define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2444 #define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2445 #define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE
lypinator 0:bb348c97df44 2446 #define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE
lypinator 0:bb348c97df44 2447 #define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET
lypinator 0:bb348c97df44 2448 #define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET
lypinator 0:bb348c97df44 2449 #define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2450 #define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2451 #define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE
lypinator 0:bb348c97df44 2452 #define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE
lypinator 0:bb348c97df44 2453 #define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET
lypinator 0:bb348c97df44 2454 #define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET
lypinator 0:bb348c97df44 2455 #define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2456 #define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2457 #define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE
lypinator 0:bb348c97df44 2458 #define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE
lypinator 0:bb348c97df44 2459 #define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET
lypinator 0:bb348c97df44 2460 #define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET
lypinator 0:bb348c97df44 2461 #define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2462 #define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2463 #define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE
lypinator 0:bb348c97df44 2464 #define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE
lypinator 0:bb348c97df44 2465 #define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET
lypinator 0:bb348c97df44 2466 #define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2467 #define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2468 #define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE
lypinator 0:bb348c97df44 2469 #define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE
lypinator 0:bb348c97df44 2470 #define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE
lypinator 0:bb348c97df44 2471 #define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE
lypinator 0:bb348c97df44 2472 #define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET
lypinator 0:bb348c97df44 2473 #define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET
lypinator 0:bb348c97df44 2474 #define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2475 #define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2476 #define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE
lypinator 0:bb348c97df44 2477 #define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE
lypinator 0:bb348c97df44 2478 #define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET
lypinator 0:bb348c97df44 2479 #define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET
lypinator 0:bb348c97df44 2480 #define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2481 #define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2482 #define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE
lypinator 0:bb348c97df44 2483 #define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE
lypinator 0:bb348c97df44 2484 #define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET
lypinator 0:bb348c97df44 2485 #define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET
lypinator 0:bb348c97df44 2486 #define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2487 #define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2488 #define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2489 #define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2490 #define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
lypinator 0:bb348c97df44 2491 #define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
lypinator 0:bb348c97df44 2492 #define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2493 #define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2494 #define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2495 #define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2496 #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED
lypinator 0:bb348c97df44 2497 #define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED
lypinator 0:bb348c97df44 2498 #define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
lypinator 0:bb348c97df44 2499 #define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
lypinator 0:bb348c97df44 2500 #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2501 #define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2502 #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
lypinator 0:bb348c97df44 2503 #define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED
lypinator 0:bb348c97df44 2504 #define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2505 #define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2506 #define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2507 #define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2508 #define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2509 #define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2510 #define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2511 #define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2512 #define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2513 #define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET
lypinator 0:bb348c97df44 2514 #define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET
lypinator 0:bb348c97df44 2515 #define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2516 #define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2517 #define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
lypinator 0:bb348c97df44 2518 #define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
lypinator 0:bb348c97df44 2519 #define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2520 #define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2521 #define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE
lypinator 0:bb348c97df44 2522 #define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE
lypinator 0:bb348c97df44 2523 #define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET
lypinator 0:bb348c97df44 2524 #define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET
lypinator 0:bb348c97df44 2525 #define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2526 #define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2527
lypinator 0:bb348c97df44 2528 /* alias define maintained for legacy */
lypinator 0:bb348c97df44 2529 #define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
lypinator 0:bb348c97df44 2530 #define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
lypinator 0:bb348c97df44 2531
lypinator 0:bb348c97df44 2532 #define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
lypinator 0:bb348c97df44 2533 #define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
lypinator 0:bb348c97df44 2534 #define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE
lypinator 0:bb348c97df44 2535 #define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE
lypinator 0:bb348c97df44 2536 #define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE
lypinator 0:bb348c97df44 2537 #define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE
lypinator 0:bb348c97df44 2538 #define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE
lypinator 0:bb348c97df44 2539 #define __TIM18_CLK_DISABLE __HAL_RCC_TIM18_CLK_DISABLE
lypinator 0:bb348c97df44 2540 #define __TIM19_CLK_ENABLE __HAL_RCC_TIM19_CLK_ENABLE
lypinator 0:bb348c97df44 2541 #define __TIM19_CLK_DISABLE __HAL_RCC_TIM19_CLK_DISABLE
lypinator 0:bb348c97df44 2542 #define __TIM20_CLK_ENABLE __HAL_RCC_TIM20_CLK_ENABLE
lypinator 0:bb348c97df44 2543 #define __TIM20_CLK_DISABLE __HAL_RCC_TIM20_CLK_DISABLE
lypinator 0:bb348c97df44 2544 #define __HRTIM1_CLK_ENABLE __HAL_RCC_HRTIM1_CLK_ENABLE
lypinator 0:bb348c97df44 2545 #define __HRTIM1_CLK_DISABLE __HAL_RCC_HRTIM1_CLK_DISABLE
lypinator 0:bb348c97df44 2546 #define __SDADC1_CLK_ENABLE __HAL_RCC_SDADC1_CLK_ENABLE
lypinator 0:bb348c97df44 2547 #define __SDADC2_CLK_ENABLE __HAL_RCC_SDADC2_CLK_ENABLE
lypinator 0:bb348c97df44 2548 #define __SDADC3_CLK_ENABLE __HAL_RCC_SDADC3_CLK_ENABLE
lypinator 0:bb348c97df44 2549 #define __SDADC1_CLK_DISABLE __HAL_RCC_SDADC1_CLK_DISABLE
lypinator 0:bb348c97df44 2550 #define __SDADC2_CLK_DISABLE __HAL_RCC_SDADC2_CLK_DISABLE
lypinator 0:bb348c97df44 2551 #define __SDADC3_CLK_DISABLE __HAL_RCC_SDADC3_CLK_DISABLE
lypinator 0:bb348c97df44 2552
lypinator 0:bb348c97df44 2553 #define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
lypinator 0:bb348c97df44 2554 #define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
lypinator 0:bb348c97df44 2555 #define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET
lypinator 0:bb348c97df44 2556 #define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET
lypinator 0:bb348c97df44 2557 #define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET
lypinator 0:bb348c97df44 2558 #define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET
lypinator 0:bb348c97df44 2559 #define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET
lypinator 0:bb348c97df44 2560 #define __TIM18_RELEASE_RESET __HAL_RCC_TIM18_RELEASE_RESET
lypinator 0:bb348c97df44 2561 #define __TIM19_FORCE_RESET __HAL_RCC_TIM19_FORCE_RESET
lypinator 0:bb348c97df44 2562 #define __TIM19_RELEASE_RESET __HAL_RCC_TIM19_RELEASE_RESET
lypinator 0:bb348c97df44 2563 #define __TIM20_FORCE_RESET __HAL_RCC_TIM20_FORCE_RESET
lypinator 0:bb348c97df44 2564 #define __TIM20_RELEASE_RESET __HAL_RCC_TIM20_RELEASE_RESET
lypinator 0:bb348c97df44 2565 #define __HRTIM1_FORCE_RESET __HAL_RCC_HRTIM1_FORCE_RESET
lypinator 0:bb348c97df44 2566 #define __HRTIM1_RELEASE_RESET __HAL_RCC_HRTIM1_RELEASE_RESET
lypinator 0:bb348c97df44 2567 #define __SDADC1_FORCE_RESET __HAL_RCC_SDADC1_FORCE_RESET
lypinator 0:bb348c97df44 2568 #define __SDADC2_FORCE_RESET __HAL_RCC_SDADC2_FORCE_RESET
lypinator 0:bb348c97df44 2569 #define __SDADC3_FORCE_RESET __HAL_RCC_SDADC3_FORCE_RESET
lypinator 0:bb348c97df44 2570 #define __SDADC1_RELEASE_RESET __HAL_RCC_SDADC1_RELEASE_RESET
lypinator 0:bb348c97df44 2571 #define __SDADC2_RELEASE_RESET __HAL_RCC_SDADC2_RELEASE_RESET
lypinator 0:bb348c97df44 2572 #define __SDADC3_RELEASE_RESET __HAL_RCC_SDADC3_RELEASE_RESET
lypinator 0:bb348c97df44 2573
lypinator 0:bb348c97df44 2574 #define __ADC1_IS_CLK_ENABLED __HAL_RCC_ADC1_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2575 #define __ADC1_IS_CLK_DISABLED __HAL_RCC_ADC1_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2576 #define __ADC12_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2577 #define __ADC12_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2578 #define __ADC34_IS_CLK_ENABLED __HAL_RCC_ADC34_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2579 #define __ADC34_IS_CLK_DISABLED __HAL_RCC_ADC34_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2580 #define __CEC_IS_CLK_ENABLED __HAL_RCC_CEC_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2581 #define __CEC_IS_CLK_DISABLED __HAL_RCC_CEC_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2582 #define __CRC_IS_CLK_ENABLED __HAL_RCC_CRC_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2583 #define __CRC_IS_CLK_DISABLED __HAL_RCC_CRC_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2584 #define __DAC1_IS_CLK_ENABLED __HAL_RCC_DAC1_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2585 #define __DAC1_IS_CLK_DISABLED __HAL_RCC_DAC1_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2586 #define __DAC2_IS_CLK_ENABLED __HAL_RCC_DAC2_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2587 #define __DAC2_IS_CLK_DISABLED __HAL_RCC_DAC2_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2588 #define __DMA1_IS_CLK_ENABLED __HAL_RCC_DMA1_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2589 #define __DMA1_IS_CLK_DISABLED __HAL_RCC_DMA1_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2590 #define __DMA2_IS_CLK_ENABLED __HAL_RCC_DMA2_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2591 #define __DMA2_IS_CLK_DISABLED __HAL_RCC_DMA2_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2592 #define __FLITF_IS_CLK_ENABLED __HAL_RCC_FLITF_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2593 #define __FLITF_IS_CLK_DISABLED __HAL_RCC_FLITF_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2594 #define __FMC_IS_CLK_ENABLED __HAL_RCC_FMC_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2595 #define __FMC_IS_CLK_DISABLED __HAL_RCC_FMC_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2596 #define __GPIOA_IS_CLK_ENABLED __HAL_RCC_GPIOA_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2597 #define __GPIOA_IS_CLK_DISABLED __HAL_RCC_GPIOA_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2598 #define __GPIOB_IS_CLK_ENABLED __HAL_RCC_GPIOB_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2599 #define __GPIOB_IS_CLK_DISABLED __HAL_RCC_GPIOB_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2600 #define __GPIOC_IS_CLK_ENABLED __HAL_RCC_GPIOC_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2601 #define __GPIOC_IS_CLK_DISABLED __HAL_RCC_GPIOC_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2602 #define __GPIOD_IS_CLK_ENABLED __HAL_RCC_GPIOD_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2603 #define __GPIOD_IS_CLK_DISABLED __HAL_RCC_GPIOD_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2604 #define __GPIOE_IS_CLK_ENABLED __HAL_RCC_GPIOE_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2605 #define __GPIOE_IS_CLK_DISABLED __HAL_RCC_GPIOE_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2606 #define __GPIOF_IS_CLK_ENABLED __HAL_RCC_GPIOF_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2607 #define __GPIOF_IS_CLK_DISABLED __HAL_RCC_GPIOF_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2608 #define __GPIOG_IS_CLK_ENABLED __HAL_RCC_GPIOG_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2609 #define __GPIOG_IS_CLK_DISABLED __HAL_RCC_GPIOG_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2610 #define __GPIOH_IS_CLK_ENABLED __HAL_RCC_GPIOH_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2611 #define __GPIOH_IS_CLK_DISABLED __HAL_RCC_GPIOH_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2612 #define __HRTIM1_IS_CLK_ENABLED __HAL_RCC_HRTIM1_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2613 #define __HRTIM1_IS_CLK_DISABLED __HAL_RCC_HRTIM1_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2614 #define __I2C1_IS_CLK_ENABLED __HAL_RCC_I2C1_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2615 #define __I2C1_IS_CLK_DISABLED __HAL_RCC_I2C1_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2616 #define __I2C2_IS_CLK_ENABLED __HAL_RCC_I2C2_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2617 #define __I2C2_IS_CLK_DISABLED __HAL_RCC_I2C2_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2618 #define __I2C3_IS_CLK_ENABLED __HAL_RCC_I2C3_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2619 #define __I2C3_IS_CLK_DISABLED __HAL_RCC_I2C3_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2620 #define __PWR_IS_CLK_ENABLED __HAL_RCC_PWR_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2621 #define __PWR_IS_CLK_DISABLED __HAL_RCC_PWR_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2622 #define __SYSCFG_IS_CLK_ENABLED __HAL_RCC_SYSCFG_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2623 #define __SYSCFG_IS_CLK_DISABLED __HAL_RCC_SYSCFG_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2624 #define __SPI1_IS_CLK_ENABLED __HAL_RCC_SPI1_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2625 #define __SPI1_IS_CLK_DISABLED __HAL_RCC_SPI1_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2626 #define __SPI2_IS_CLK_ENABLED __HAL_RCC_SPI2_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2627 #define __SPI2_IS_CLK_DISABLED __HAL_RCC_SPI2_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2628 #define __SPI3_IS_CLK_ENABLED __HAL_RCC_SPI3_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2629 #define __SPI3_IS_CLK_DISABLED __HAL_RCC_SPI3_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2630 #define __SPI4_IS_CLK_ENABLED __HAL_RCC_SPI4_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2631 #define __SPI4_IS_CLK_DISABLED __HAL_RCC_SPI4_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2632 #define __SDADC1_IS_CLK_ENABLED __HAL_RCC_SDADC1_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2633 #define __SDADC1_IS_CLK_DISABLED __HAL_RCC_SDADC1_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2634 #define __SDADC2_IS_CLK_ENABLED __HAL_RCC_SDADC2_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2635 #define __SDADC2_IS_CLK_DISABLED __HAL_RCC_SDADC2_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2636 #define __SDADC3_IS_CLK_ENABLED __HAL_RCC_SDADC3_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2637 #define __SDADC3_IS_CLK_DISABLED __HAL_RCC_SDADC3_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2638 #define __SRAM_IS_CLK_ENABLED __HAL_RCC_SRAM_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2639 #define __SRAM_IS_CLK_DISABLED __HAL_RCC_SRAM_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2640 #define __TIM1_IS_CLK_ENABLED __HAL_RCC_TIM1_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2641 #define __TIM1_IS_CLK_DISABLED __HAL_RCC_TIM1_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2642 #define __TIM2_IS_CLK_ENABLED __HAL_RCC_TIM2_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2643 #define __TIM2_IS_CLK_DISABLED __HAL_RCC_TIM2_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2644 #define __TIM3_IS_CLK_ENABLED __HAL_RCC_TIM3_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2645 #define __TIM3_IS_CLK_DISABLED __HAL_RCC_TIM3_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2646 #define __TIM4_IS_CLK_ENABLED __HAL_RCC_TIM4_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2647 #define __TIM4_IS_CLK_DISABLED __HAL_RCC_TIM4_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2648 #define __TIM5_IS_CLK_ENABLED __HAL_RCC_TIM5_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2649 #define __TIM5_IS_CLK_DISABLED __HAL_RCC_TIM5_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2650 #define __TIM6_IS_CLK_ENABLED __HAL_RCC_TIM6_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2651 #define __TIM6_IS_CLK_DISABLED __HAL_RCC_TIM6_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2652 #define __TIM7_IS_CLK_ENABLED __HAL_RCC_TIM7_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2653 #define __TIM7_IS_CLK_DISABLED __HAL_RCC_TIM7_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2654 #define __TIM8_IS_CLK_ENABLED __HAL_RCC_TIM8_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2655 #define __TIM8_IS_CLK_DISABLED __HAL_RCC_TIM8_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2656 #define __TIM12_IS_CLK_ENABLED __HAL_RCC_TIM12_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2657 #define __TIM12_IS_CLK_DISABLED __HAL_RCC_TIM12_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2658 #define __TIM13_IS_CLK_ENABLED __HAL_RCC_TIM13_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2659 #define __TIM13_IS_CLK_DISABLED __HAL_RCC_TIM13_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2660 #define __TIM14_IS_CLK_ENABLED __HAL_RCC_TIM14_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2661 #define __TIM14_IS_CLK_DISABLED __HAL_RCC_TIM14_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2662 #define __TIM15_IS_CLK_ENABLED __HAL_RCC_TIM15_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2663 #define __TIM15_IS_CLK_DISABLED __HAL_RCC_TIM15_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2664 #define __TIM16_IS_CLK_ENABLED __HAL_RCC_TIM16_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2665 #define __TIM16_IS_CLK_DISABLED __HAL_RCC_TIM16_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2666 #define __TIM17_IS_CLK_ENABLED __HAL_RCC_TIM17_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2667 #define __TIM17_IS_CLK_DISABLED __HAL_RCC_TIM17_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2668 #define __TIM18_IS_CLK_ENABLED __HAL_RCC_TIM18_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2669 #define __TIM18_IS_CLK_DISABLED __HAL_RCC_TIM18_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2670 #define __TIM19_IS_CLK_ENABLED __HAL_RCC_TIM19_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2671 #define __TIM19_IS_CLK_DISABLED __HAL_RCC_TIM19_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2672 #define __TIM20_IS_CLK_ENABLED __HAL_RCC_TIM20_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2673 #define __TIM20_IS_CLK_DISABLED __HAL_RCC_TIM20_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2674 #define __TSC_IS_CLK_ENABLED __HAL_RCC_TSC_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2675 #define __TSC_IS_CLK_DISABLED __HAL_RCC_TSC_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2676 #define __UART4_IS_CLK_ENABLED __HAL_RCC_UART4_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2677 #define __UART4_IS_CLK_DISABLED __HAL_RCC_UART4_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2678 #define __UART5_IS_CLK_ENABLED __HAL_RCC_UART5_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2679 #define __UART5_IS_CLK_DISABLED __HAL_RCC_UART5_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2680 #define __USART1_IS_CLK_ENABLED __HAL_RCC_USART1_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2681 #define __USART1_IS_CLK_DISABLED __HAL_RCC_USART1_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2682 #define __USART2_IS_CLK_ENABLED __HAL_RCC_USART2_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2683 #define __USART2_IS_CLK_DISABLED __HAL_RCC_USART2_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2684 #define __USART3_IS_CLK_ENABLED __HAL_RCC_USART3_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2685 #define __USART3_IS_CLK_DISABLED __HAL_RCC_USART3_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2686 #define __USB_IS_CLK_ENABLED __HAL_RCC_USB_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2687 #define __USB_IS_CLK_DISABLED __HAL_RCC_USB_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2688 #define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2689 #define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2690
lypinator 0:bb348c97df44 2691 #if defined(STM32F4)
lypinator 0:bb348c97df44 2692 #define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
lypinator 0:bb348c97df44 2693 #define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
lypinator 0:bb348c97df44 2694 #define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2695 #define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2696 #define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
lypinator 0:bb348c97df44 2697 #define __HAL_RCC_SDMMC1_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
lypinator 0:bb348c97df44 2698 #define __HAL_RCC_SDMMC1_IS_CLK_ENABLED __HAL_RCC_SDIO_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2699 #define __HAL_RCC_SDMMC1_IS_CLK_DISABLED __HAL_RCC_SDIO_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2700 #define Sdmmc1ClockSelection SdioClockSelection
lypinator 0:bb348c97df44 2701 #define RCC_PERIPHCLK_SDMMC1 RCC_PERIPHCLK_SDIO
lypinator 0:bb348c97df44 2702 #define RCC_SDMMC1CLKSOURCE_CLK48 RCC_SDIOCLKSOURCE_CK48
lypinator 0:bb348c97df44 2703 #define RCC_SDMMC1CLKSOURCE_SYSCLK RCC_SDIOCLKSOURCE_SYSCLK
lypinator 0:bb348c97df44 2704 #define __HAL_RCC_SDMMC1_CONFIG __HAL_RCC_SDIO_CONFIG
lypinator 0:bb348c97df44 2705 #define __HAL_RCC_GET_SDMMC1_SOURCE __HAL_RCC_GET_SDIO_SOURCE
lypinator 0:bb348c97df44 2706 #endif
lypinator 0:bb348c97df44 2707
lypinator 0:bb348c97df44 2708 #if defined(STM32F7) || defined(STM32L4)
lypinator 0:bb348c97df44 2709 #define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET
lypinator 0:bb348c97df44 2710 #define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET
lypinator 0:bb348c97df44 2711 #define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2712 #define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2713 #define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
lypinator 0:bb348c97df44 2714 #define __HAL_RCC_SDIO_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE
lypinator 0:bb348c97df44 2715 #define __HAL_RCC_SDIO_IS_CLK_ENABLED __HAL_RCC_SDMMC1_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2716 #define __HAL_RCC_SDIO_IS_CLK_DISABLED __HAL_RCC_SDMMC1_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2717 #define SdioClockSelection Sdmmc1ClockSelection
lypinator 0:bb348c97df44 2718 #define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1
lypinator 0:bb348c97df44 2719 #define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG
lypinator 0:bb348c97df44 2720 #define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE
lypinator 0:bb348c97df44 2721 #endif
lypinator 0:bb348c97df44 2722
lypinator 0:bb348c97df44 2723 #if defined(STM32F7)
lypinator 0:bb348c97df44 2724 #define RCC_SDIOCLKSOURCE_CLK48 RCC_SDMMC1CLKSOURCE_CLK48
lypinator 0:bb348c97df44 2725 #define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK
lypinator 0:bb348c97df44 2726 #endif
lypinator 0:bb348c97df44 2727
lypinator 0:bb348c97df44 2728 #if defined(STM32H7)
lypinator 0:bb348c97df44 2729 #define __HAL_RCC_USB_OTG_HS_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_ENABLE()
lypinator 0:bb348c97df44 2730 #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE()
lypinator 0:bb348c97df44 2731 #define __HAL_RCC_USB_OTG_HS_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_DISABLE()
lypinator 0:bb348c97df44 2732 #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_DISABLE()
lypinator 0:bb348c97df44 2733 #define __HAL_RCC_USB_OTG_HS_FORCE_RESET() __HAL_RCC_USB1_OTG_HS_FORCE_RESET()
lypinator 0:bb348c97df44 2734 #define __HAL_RCC_USB_OTG_HS_RELEASE_RESET() __HAL_RCC_USB1_OTG_HS_RELEASE_RESET()
lypinator 0:bb348c97df44 2735 #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_ENABLE()
lypinator 0:bb348c97df44 2736 #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_ENABLE()
lypinator 0:bb348c97df44 2737 #define __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_CLK_SLEEP_DISABLE()
lypinator 0:bb348c97df44 2738 #define __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_DISABLE()
lypinator 0:bb348c97df44 2739
lypinator 0:bb348c97df44 2740 #define __HAL_RCC_USB_OTG_FS_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_ENABLE()
lypinator 0:bb348c97df44 2741 #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_ENABLE()
lypinator 0:bb348c97df44 2742 #define __HAL_RCC_USB_OTG_FS_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_DISABLE()
lypinator 0:bb348c97df44 2743 #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_DISABLE()
lypinator 0:bb348c97df44 2744 #define __HAL_RCC_USB_OTG_FS_FORCE_RESET() __HAL_RCC_USB2_OTG_FS_FORCE_RESET()
lypinator 0:bb348c97df44 2745 #define __HAL_RCC_USB_OTG_FS_RELEASE_RESET() __HAL_RCC_USB2_OTG_FS_RELEASE_RESET()
lypinator 0:bb348c97df44 2746 #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_ENABLE()
lypinator 0:bb348c97df44 2747 #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_ENABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_ENABLE()
lypinator 0:bb348c97df44 2748 #define __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_CLK_SLEEP_DISABLE()
lypinator 0:bb348c97df44 2749 #define __HAL_RCC_USB_OTG_FS_ULPI_CLK_SLEEP_DISABLE() __HAL_RCC_USB2_OTG_FS_ULPI_CLK_SLEEP_DISABLE()
lypinator 0:bb348c97df44 2750 #endif
lypinator 0:bb348c97df44 2751
lypinator 0:bb348c97df44 2752 #define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG
lypinator 0:bb348c97df44 2753 #define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG
lypinator 0:bb348c97df44 2754
lypinator 0:bb348c97df44 2755 #define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE
lypinator 0:bb348c97df44 2756
lypinator 0:bb348c97df44 2757 #define IS_RCC_MSIRANGE IS_RCC_MSI_CLOCK_RANGE
lypinator 0:bb348c97df44 2758 #define IS_RCC_RTCCLK_SOURCE IS_RCC_RTCCLKSOURCE
lypinator 0:bb348c97df44 2759 #define IS_RCC_SYSCLK_DIV IS_RCC_HCLK
lypinator 0:bb348c97df44 2760 #define IS_RCC_HCLK_DIV IS_RCC_PCLK
lypinator 0:bb348c97df44 2761 #define IS_RCC_PERIPHCLK IS_RCC_PERIPHCLOCK
lypinator 0:bb348c97df44 2762
lypinator 0:bb348c97df44 2763 #define RCC_IT_HSI14 RCC_IT_HSI14RDY
lypinator 0:bb348c97df44 2764
lypinator 0:bb348c97df44 2765 #define RCC_IT_CSSLSE RCC_IT_LSECSS
lypinator 0:bb348c97df44 2766 #define RCC_IT_CSSHSE RCC_IT_CSS
lypinator 0:bb348c97df44 2767
lypinator 0:bb348c97df44 2768 #define RCC_PLLMUL_3 RCC_PLL_MUL3
lypinator 0:bb348c97df44 2769 #define RCC_PLLMUL_4 RCC_PLL_MUL4
lypinator 0:bb348c97df44 2770 #define RCC_PLLMUL_6 RCC_PLL_MUL6
lypinator 0:bb348c97df44 2771 #define RCC_PLLMUL_8 RCC_PLL_MUL8
lypinator 0:bb348c97df44 2772 #define RCC_PLLMUL_12 RCC_PLL_MUL12
lypinator 0:bb348c97df44 2773 #define RCC_PLLMUL_16 RCC_PLL_MUL16
lypinator 0:bb348c97df44 2774 #define RCC_PLLMUL_24 RCC_PLL_MUL24
lypinator 0:bb348c97df44 2775 #define RCC_PLLMUL_32 RCC_PLL_MUL32
lypinator 0:bb348c97df44 2776 #define RCC_PLLMUL_48 RCC_PLL_MUL48
lypinator 0:bb348c97df44 2777
lypinator 0:bb348c97df44 2778 #define RCC_PLLDIV_2 RCC_PLL_DIV2
lypinator 0:bb348c97df44 2779 #define RCC_PLLDIV_3 RCC_PLL_DIV3
lypinator 0:bb348c97df44 2780 #define RCC_PLLDIV_4 RCC_PLL_DIV4
lypinator 0:bb348c97df44 2781
lypinator 0:bb348c97df44 2782 #define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE
lypinator 0:bb348c97df44 2783 #define __HAL_RCC_MCO_CONFIG __HAL_RCC_MCO1_CONFIG
lypinator 0:bb348c97df44 2784 #define RCC_MCO_NODIV RCC_MCODIV_1
lypinator 0:bb348c97df44 2785 #define RCC_MCO_DIV1 RCC_MCODIV_1
lypinator 0:bb348c97df44 2786 #define RCC_MCO_DIV2 RCC_MCODIV_2
lypinator 0:bb348c97df44 2787 #define RCC_MCO_DIV4 RCC_MCODIV_4
lypinator 0:bb348c97df44 2788 #define RCC_MCO_DIV8 RCC_MCODIV_8
lypinator 0:bb348c97df44 2789 #define RCC_MCO_DIV16 RCC_MCODIV_16
lypinator 0:bb348c97df44 2790 #define RCC_MCO_DIV32 RCC_MCODIV_32
lypinator 0:bb348c97df44 2791 #define RCC_MCO_DIV64 RCC_MCODIV_64
lypinator 0:bb348c97df44 2792 #define RCC_MCO_DIV128 RCC_MCODIV_128
lypinator 0:bb348c97df44 2793 #define RCC_MCOSOURCE_NONE RCC_MCO1SOURCE_NOCLOCK
lypinator 0:bb348c97df44 2794 #define RCC_MCOSOURCE_LSI RCC_MCO1SOURCE_LSI
lypinator 0:bb348c97df44 2795 #define RCC_MCOSOURCE_LSE RCC_MCO1SOURCE_LSE
lypinator 0:bb348c97df44 2796 #define RCC_MCOSOURCE_SYSCLK RCC_MCO1SOURCE_SYSCLK
lypinator 0:bb348c97df44 2797 #define RCC_MCOSOURCE_HSI RCC_MCO1SOURCE_HSI
lypinator 0:bb348c97df44 2798 #define RCC_MCOSOURCE_HSI14 RCC_MCO1SOURCE_HSI14
lypinator 0:bb348c97df44 2799 #define RCC_MCOSOURCE_HSI48 RCC_MCO1SOURCE_HSI48
lypinator 0:bb348c97df44 2800 #define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE
lypinator 0:bb348c97df44 2801 #define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK
lypinator 0:bb348c97df44 2802 #define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
lypinator 0:bb348c97df44 2803 #define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
lypinator 0:bb348c97df44 2804
lypinator 0:bb348c97df44 2805 #if defined(STM32L4)
lypinator 0:bb348c97df44 2806 #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
lypinator 0:bb348c97df44 2807 #elif defined(STM32WB) || defined(STM32G0)
lypinator 0:bb348c97df44 2808 #else
lypinator 0:bb348c97df44 2809 #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
lypinator 0:bb348c97df44 2810 #endif
lypinator 0:bb348c97df44 2811
lypinator 0:bb348c97df44 2812 #define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1
lypinator 0:bb348c97df44 2813 #define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL
lypinator 0:bb348c97df44 2814 #define RCC_USBCLK_MSI RCC_USBCLKSOURCE_MSI
lypinator 0:bb348c97df44 2815 #define RCC_USBCLKSOURCE_PLLCLK RCC_USBCLKSOURCE_PLL
lypinator 0:bb348c97df44 2816 #define RCC_USBPLLCLK_DIV1 RCC_USBCLKSOURCE_PLL
lypinator 0:bb348c97df44 2817 #define RCC_USBPLLCLK_DIV1_5 RCC_USBCLKSOURCE_PLL_DIV1_5
lypinator 0:bb348c97df44 2818 #define RCC_USBPLLCLK_DIV2 RCC_USBCLKSOURCE_PLL_DIV2
lypinator 0:bb348c97df44 2819 #define RCC_USBPLLCLK_DIV3 RCC_USBCLKSOURCE_PLL_DIV3
lypinator 0:bb348c97df44 2820
lypinator 0:bb348c97df44 2821 #define HSION_BitNumber RCC_HSION_BIT_NUMBER
lypinator 0:bb348c97df44 2822 #define HSION_BITNUMBER RCC_HSION_BIT_NUMBER
lypinator 0:bb348c97df44 2823 #define HSEON_BitNumber RCC_HSEON_BIT_NUMBER
lypinator 0:bb348c97df44 2824 #define HSEON_BITNUMBER RCC_HSEON_BIT_NUMBER
lypinator 0:bb348c97df44 2825 #define MSION_BITNUMBER RCC_MSION_BIT_NUMBER
lypinator 0:bb348c97df44 2826 #define CSSON_BitNumber RCC_CSSON_BIT_NUMBER
lypinator 0:bb348c97df44 2827 #define CSSON_BITNUMBER RCC_CSSON_BIT_NUMBER
lypinator 0:bb348c97df44 2828 #define PLLON_BitNumber RCC_PLLON_BIT_NUMBER
lypinator 0:bb348c97df44 2829 #define PLLON_BITNUMBER RCC_PLLON_BIT_NUMBER
lypinator 0:bb348c97df44 2830 #define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER
lypinator 0:bb348c97df44 2831 #define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER
lypinator 0:bb348c97df44 2832 #define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER
lypinator 0:bb348c97df44 2833 #define RTCEN_BITNUMBER RCC_RTCEN_BIT_NUMBER
lypinator 0:bb348c97df44 2834 #define BDRST_BitNumber RCC_BDRST_BIT_NUMBER
lypinator 0:bb348c97df44 2835 #define BDRST_BITNUMBER RCC_BDRST_BIT_NUMBER
lypinator 0:bb348c97df44 2836 #define RTCRST_BITNUMBER RCC_RTCRST_BIT_NUMBER
lypinator 0:bb348c97df44 2837 #define LSION_BitNumber RCC_LSION_BIT_NUMBER
lypinator 0:bb348c97df44 2838 #define LSION_BITNUMBER RCC_LSION_BIT_NUMBER
lypinator 0:bb348c97df44 2839 #define LSEON_BitNumber RCC_LSEON_BIT_NUMBER
lypinator 0:bb348c97df44 2840 #define LSEON_BITNUMBER RCC_LSEON_BIT_NUMBER
lypinator 0:bb348c97df44 2841 #define LSEBYP_BITNUMBER RCC_LSEBYP_BIT_NUMBER
lypinator 0:bb348c97df44 2842 #define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER
lypinator 0:bb348c97df44 2843 #define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER
lypinator 0:bb348c97df44 2844 #define RMVF_BitNumber RCC_RMVF_BIT_NUMBER
lypinator 0:bb348c97df44 2845 #define RMVF_BITNUMBER RCC_RMVF_BIT_NUMBER
lypinator 0:bb348c97df44 2846 #define RCC_CR2_HSI14TRIM_BitNumber RCC_HSI14TRIM_BIT_NUMBER
lypinator 0:bb348c97df44 2847 #define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS
lypinator 0:bb348c97df44 2848 #define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS
lypinator 0:bb348c97df44 2849 #define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS
lypinator 0:bb348c97df44 2850 #define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS
lypinator 0:bb348c97df44 2851 #define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE
lypinator 0:bb348c97df44 2852 #define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE
lypinator 0:bb348c97df44 2853
lypinator 0:bb348c97df44 2854 #define CR_HSION_BB RCC_CR_HSION_BB
lypinator 0:bb348c97df44 2855 #define CR_CSSON_BB RCC_CR_CSSON_BB
lypinator 0:bb348c97df44 2856 #define CR_PLLON_BB RCC_CR_PLLON_BB
lypinator 0:bb348c97df44 2857 #define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB
lypinator 0:bb348c97df44 2858 #define CR_MSION_BB RCC_CR_MSION_BB
lypinator 0:bb348c97df44 2859 #define CSR_LSION_BB RCC_CSR_LSION_BB
lypinator 0:bb348c97df44 2860 #define CSR_LSEON_BB RCC_CSR_LSEON_BB
lypinator 0:bb348c97df44 2861 #define CSR_LSEBYP_BB RCC_CSR_LSEBYP_BB
lypinator 0:bb348c97df44 2862 #define CSR_RTCEN_BB RCC_CSR_RTCEN_BB
lypinator 0:bb348c97df44 2863 #define CSR_RTCRST_BB RCC_CSR_RTCRST_BB
lypinator 0:bb348c97df44 2864 #define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB
lypinator 0:bb348c97df44 2865 #define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB
lypinator 0:bb348c97df44 2866 #define BDCR_BDRST_BB RCC_BDCR_BDRST_BB
lypinator 0:bb348c97df44 2867 #define CR_HSEON_BB RCC_CR_HSEON_BB
lypinator 0:bb348c97df44 2868 #define CSR_RMVF_BB RCC_CSR_RMVF_BB
lypinator 0:bb348c97df44 2869 #define CR_PLLSAION_BB RCC_CR_PLLSAION_BB
lypinator 0:bb348c97df44 2870 #define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB
lypinator 0:bb348c97df44 2871
lypinator 0:bb348c97df44 2872 #define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE
lypinator 0:bb348c97df44 2873 #define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE
lypinator 0:bb348c97df44 2874 #define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE
lypinator 0:bb348c97df44 2875 #define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE
lypinator 0:bb348c97df44 2876 #define __HAL_RCC_CRS_CALCULATE_RELOADVALUE __HAL_RCC_CRS_RELOADVALUE_CALCULATE
lypinator 0:bb348c97df44 2877
lypinator 0:bb348c97df44 2878 #define __HAL_RCC_GET_IT_SOURCE __HAL_RCC_GET_IT
lypinator 0:bb348c97df44 2879
lypinator 0:bb348c97df44 2880 #define RCC_CRS_SYNCWARM RCC_CRS_SYNCWARN
lypinator 0:bb348c97df44 2881 #define RCC_CRS_TRIMOV RCC_CRS_TRIMOVF
lypinator 0:bb348c97df44 2882
lypinator 0:bb348c97df44 2883 #define RCC_PERIPHCLK_CK48 RCC_PERIPHCLK_CLK48
lypinator 0:bb348c97df44 2884 #define RCC_CK48CLKSOURCE_PLLQ RCC_CLK48CLKSOURCE_PLLQ
lypinator 0:bb348c97df44 2885 #define RCC_CK48CLKSOURCE_PLLSAIP RCC_CLK48CLKSOURCE_PLLSAIP
lypinator 0:bb348c97df44 2886 #define RCC_CK48CLKSOURCE_PLLI2SQ RCC_CLK48CLKSOURCE_PLLI2SQ
lypinator 0:bb348c97df44 2887 #define IS_RCC_CK48CLKSOURCE IS_RCC_CLK48CLKSOURCE
lypinator 0:bb348c97df44 2888 #define RCC_SDIOCLKSOURCE_CK48 RCC_SDIOCLKSOURCE_CLK48
lypinator 0:bb348c97df44 2889
lypinator 0:bb348c97df44 2890 #define __HAL_RCC_DFSDM_CLK_ENABLE __HAL_RCC_DFSDM1_CLK_ENABLE
lypinator 0:bb348c97df44 2891 #define __HAL_RCC_DFSDM_CLK_DISABLE __HAL_RCC_DFSDM1_CLK_DISABLE
lypinator 0:bb348c97df44 2892 #define __HAL_RCC_DFSDM_IS_CLK_ENABLED __HAL_RCC_DFSDM1_IS_CLK_ENABLED
lypinator 0:bb348c97df44 2893 #define __HAL_RCC_DFSDM_IS_CLK_DISABLED __HAL_RCC_DFSDM1_IS_CLK_DISABLED
lypinator 0:bb348c97df44 2894 #define __HAL_RCC_DFSDM_FORCE_RESET __HAL_RCC_DFSDM1_FORCE_RESET
lypinator 0:bb348c97df44 2895 #define __HAL_RCC_DFSDM_RELEASE_RESET __HAL_RCC_DFSDM1_RELEASE_RESET
lypinator 0:bb348c97df44 2896 #define __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE
lypinator 0:bb348c97df44 2897 #define __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE
lypinator 0:bb348c97df44 2898 #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED
lypinator 0:bb348c97df44 2899 #define __HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED __HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED
lypinator 0:bb348c97df44 2900 #define DfsdmClockSelection Dfsdm1ClockSelection
lypinator 0:bb348c97df44 2901 #define RCC_PERIPHCLK_DFSDM RCC_PERIPHCLK_DFSDM1
lypinator 0:bb348c97df44 2902 #define RCC_DFSDMCLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
lypinator 0:bb348c97df44 2903 #define RCC_DFSDMCLKSOURCE_SYSCLK RCC_DFSDM1CLKSOURCE_SYSCLK
lypinator 0:bb348c97df44 2904 #define __HAL_RCC_DFSDM_CONFIG __HAL_RCC_DFSDM1_CONFIG
lypinator 0:bb348c97df44 2905 #define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE
lypinator 0:bb348c97df44 2906 #define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
lypinator 0:bb348c97df44 2907 #define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1
lypinator 0:bb348c97df44 2908 #define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1
lypinator 0:bb348c97df44 2909 #define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1
lypinator 0:bb348c97df44 2910
lypinator 0:bb348c97df44 2911 #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1
lypinator 0:bb348c97df44 2912 #define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2
lypinator 0:bb348c97df44 2913 #define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM2AUDIOCLKSOURCE_I2S1
lypinator 0:bb348c97df44 2914 #define RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM2AUDIOCLKSOURCE_I2S2
lypinator 0:bb348c97df44 2915 #define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2
lypinator 0:bb348c97df44 2916 #define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2
lypinator 0:bb348c97df44 2917 #define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1
lypinator 0:bb348c97df44 2918
lypinator 0:bb348c97df44 2919 /**
lypinator 0:bb348c97df44 2920 * @}
lypinator 0:bb348c97df44 2921 */
lypinator 0:bb348c97df44 2922
lypinator 0:bb348c97df44 2923 /** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 2924 * @{
lypinator 0:bb348c97df44 2925 */
lypinator 0:bb348c97df44 2926 #define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit)
lypinator 0:bb348c97df44 2927
lypinator 0:bb348c97df44 2928 /**
lypinator 0:bb348c97df44 2929 * @}
lypinator 0:bb348c97df44 2930 */
lypinator 0:bb348c97df44 2931
lypinator 0:bb348c97df44 2932 /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 2933 * @{
lypinator 0:bb348c97df44 2934 */
lypinator 0:bb348c97df44 2935 #if defined (STM32G0)
lypinator 0:bb348c97df44 2936 #else
lypinator 0:bb348c97df44 2937 #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
lypinator 0:bb348c97df44 2938 #endif
lypinator 0:bb348c97df44 2939 #define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT
lypinator 0:bb348c97df44 2940 #define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT
lypinator 0:bb348c97df44 2941
lypinator 0:bb348c97df44 2942 #if defined (STM32F1)
lypinator 0:bb348c97df44 2943 #define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
lypinator 0:bb348c97df44 2944
lypinator 0:bb348c97df44 2945 #define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT()
lypinator 0:bb348c97df44 2946
lypinator 0:bb348c97df44 2947 #define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT()
lypinator 0:bb348c97df44 2948
lypinator 0:bb348c97df44 2949 #define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG()
lypinator 0:bb348c97df44 2950
lypinator 0:bb348c97df44 2951 #define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
lypinator 0:bb348c97df44 2952 #else
lypinator 0:bb348c97df44 2953 #define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 2954 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
lypinator 0:bb348c97df44 2955 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
lypinator 0:bb348c97df44 2956 #define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 2957 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
lypinator 0:bb348c97df44 2958 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
lypinator 0:bb348c97df44 2959 #define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 2960 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
lypinator 0:bb348c97df44 2961 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
lypinator 0:bb348c97df44 2962 #define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 2963 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
lypinator 0:bb348c97df44 2964 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
lypinator 0:bb348c97df44 2965 #define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
lypinator 0:bb348c97df44 2966 (((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \
lypinator 0:bb348c97df44 2967 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
lypinator 0:bb348c97df44 2968 #endif /* STM32F1 */
lypinator 0:bb348c97df44 2969
lypinator 0:bb348c97df44 2970 #define IS_ALARM IS_RTC_ALARM
lypinator 0:bb348c97df44 2971 #define IS_ALARM_MASK IS_RTC_ALARM_MASK
lypinator 0:bb348c97df44 2972 #define IS_TAMPER IS_RTC_TAMPER
lypinator 0:bb348c97df44 2973 #define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE
lypinator 0:bb348c97df44 2974 #define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER
lypinator 0:bb348c97df44 2975 #define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT
lypinator 0:bb348c97df44 2976 #define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE
lypinator 0:bb348c97df44 2977 #define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION
lypinator 0:bb348c97df44 2978 #define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE
lypinator 0:bb348c97df44 2979 #define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ
lypinator 0:bb348c97df44 2980 #define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
lypinator 0:bb348c97df44 2981 #define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER
lypinator 0:bb348c97df44 2982 #define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK
lypinator 0:bb348c97df44 2983 #define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER
lypinator 0:bb348c97df44 2984
lypinator 0:bb348c97df44 2985 #define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
lypinator 0:bb348c97df44 2986 #define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
lypinator 0:bb348c97df44 2987
lypinator 0:bb348c97df44 2988 /**
lypinator 0:bb348c97df44 2989 * @}
lypinator 0:bb348c97df44 2990 */
lypinator 0:bb348c97df44 2991
lypinator 0:bb348c97df44 2992 /** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 2993 * @{
lypinator 0:bb348c97df44 2994 */
lypinator 0:bb348c97df44 2995
lypinator 0:bb348c97df44 2996 #define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
lypinator 0:bb348c97df44 2997 #define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
lypinator 0:bb348c97df44 2998
lypinator 0:bb348c97df44 2999 #if defined(STM32F4) || defined(STM32F2)
lypinator 0:bb348c97df44 3000 #define SD_SDMMC_DISABLED SD_SDIO_DISABLED
lypinator 0:bb348c97df44 3001 #define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY
lypinator 0:bb348c97df44 3002 #define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED
lypinator 0:bb348c97df44 3003 #define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION
lypinator 0:bb348c97df44 3004 #define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND
lypinator 0:bb348c97df44 3005 #define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT
lypinator 0:bb348c97df44 3006 #define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED
lypinator 0:bb348c97df44 3007 #define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE
lypinator 0:bb348c97df44 3008 #define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE
lypinator 0:bb348c97df44 3009 #define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE
lypinator 0:bb348c97df44 3010 #define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL
lypinator 0:bb348c97df44 3011 #define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT
lypinator 0:bb348c97df44 3012 #define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT
lypinator 0:bb348c97df44 3013 #define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG
lypinator 0:bb348c97df44 3014 #define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG
lypinator 0:bb348c97df44 3015 #define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT
lypinator 0:bb348c97df44 3016 #define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT
lypinator 0:bb348c97df44 3017 #define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS
lypinator 0:bb348c97df44 3018 #define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT
lypinator 0:bb348c97df44 3019 #define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND
lypinator 0:bb348c97df44 3020 /* alias CMSIS */
lypinator 0:bb348c97df44 3021 #define SDMMC1_IRQn SDIO_IRQn
lypinator 0:bb348c97df44 3022 #define SDMMC1_IRQHandler SDIO_IRQHandler
lypinator 0:bb348c97df44 3023 #endif
lypinator 0:bb348c97df44 3024
lypinator 0:bb348c97df44 3025 #if defined(STM32F7) || defined(STM32L4)
lypinator 0:bb348c97df44 3026 #define SD_SDIO_DISABLED SD_SDMMC_DISABLED
lypinator 0:bb348c97df44 3027 #define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY
lypinator 0:bb348c97df44 3028 #define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED
lypinator 0:bb348c97df44 3029 #define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION
lypinator 0:bb348c97df44 3030 #define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND
lypinator 0:bb348c97df44 3031 #define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT
lypinator 0:bb348c97df44 3032 #define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED
lypinator 0:bb348c97df44 3033 #define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE
lypinator 0:bb348c97df44 3034 #define __HAL_SD_SDIO_DISABLE __HAL_SD_SDMMC_DISABLE
lypinator 0:bb348c97df44 3035 #define __HAL_SD_SDIO_DMA_ENABLE __HAL_SD_SDMMC_DMA_ENABLE
lypinator 0:bb348c97df44 3036 #define __HAL_SD_SDIO_DMA_DISABL __HAL_SD_SDMMC_DMA_DISABLE
lypinator 0:bb348c97df44 3037 #define __HAL_SD_SDIO_ENABLE_IT __HAL_SD_SDMMC_ENABLE_IT
lypinator 0:bb348c97df44 3038 #define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT
lypinator 0:bb348c97df44 3039 #define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG
lypinator 0:bb348c97df44 3040 #define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG
lypinator 0:bb348c97df44 3041 #define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT
lypinator 0:bb348c97df44 3042 #define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT
lypinator 0:bb348c97df44 3043 #define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS
lypinator 0:bb348c97df44 3044 #define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT
lypinator 0:bb348c97df44 3045 #define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND
lypinator 0:bb348c97df44 3046 /* alias CMSIS for compatibilities */
lypinator 0:bb348c97df44 3047 #define SDIO_IRQn SDMMC1_IRQn
lypinator 0:bb348c97df44 3048 #define SDIO_IRQHandler SDMMC1_IRQHandler
lypinator 0:bb348c97df44 3049 #endif
lypinator 0:bb348c97df44 3050
lypinator 0:bb348c97df44 3051 #if defined(STM32F7) || defined(STM32F4) || defined(STM32F2)
lypinator 0:bb348c97df44 3052 #define HAL_SD_CardCIDTypedef HAL_SD_CardCIDTypeDef
lypinator 0:bb348c97df44 3053 #define HAL_SD_CardCSDTypedef HAL_SD_CardCSDTypeDef
lypinator 0:bb348c97df44 3054 #define HAL_SD_CardStatusTypedef HAL_SD_CardStatusTypeDef
lypinator 0:bb348c97df44 3055 #define HAL_SD_CardStateTypedef HAL_SD_CardStateTypeDef
lypinator 0:bb348c97df44 3056 #endif
lypinator 0:bb348c97df44 3057
lypinator 0:bb348c97df44 3058 #if defined(STM32H7)
lypinator 0:bb348c97df44 3059 #define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback HAL_MMCEx_Read_DMADoubleBuf0CpltCallback
lypinator 0:bb348c97df44 3060 #define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback HAL_MMCEx_Read_DMADoubleBuf1CpltCallback
lypinator 0:bb348c97df44 3061 #define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback HAL_MMCEx_Write_DMADoubleBuf0CpltCallback
lypinator 0:bb348c97df44 3062 #define HAL_MMCEx_Write_DMADoubleBuffer1CpltCallback HAL_MMCEx_Write_DMADoubleBuf1CpltCallback
lypinator 0:bb348c97df44 3063 #define HAL_SDEx_Read_DMADoubleBuffer0CpltCallback HAL_SDEx_Read_DMADoubleBuf0CpltCallback
lypinator 0:bb348c97df44 3064 #define HAL_SDEx_Read_DMADoubleBuffer1CpltCallback HAL_SDEx_Read_DMADoubleBuf1CpltCallback
lypinator 0:bb348c97df44 3065 #define HAL_SDEx_Write_DMADoubleBuffer0CpltCallback HAL_SDEx_Write_DMADoubleBuf0CpltCallback
lypinator 0:bb348c97df44 3066 #define HAL_SDEx_Write_DMADoubleBuffer1CpltCallback HAL_SDEx_Write_DMADoubleBuf1CpltCallback
lypinator 0:bb348c97df44 3067 #endif
lypinator 0:bb348c97df44 3068 /**
lypinator 0:bb348c97df44 3069 * @}
lypinator 0:bb348c97df44 3070 */
lypinator 0:bb348c97df44 3071
lypinator 0:bb348c97df44 3072 /** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3073 * @{
lypinator 0:bb348c97df44 3074 */
lypinator 0:bb348c97df44 3075
lypinator 0:bb348c97df44 3076 #define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT
lypinator 0:bb348c97df44 3077 #define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT
lypinator 0:bb348c97df44 3078 #define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE
lypinator 0:bb348c97df44 3079 #define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE
lypinator 0:bb348c97df44 3080 #define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE
lypinator 0:bb348c97df44 3081 #define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
lypinator 0:bb348c97df44 3082
lypinator 0:bb348c97df44 3083 #define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
lypinator 0:bb348c97df44 3084 #define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
lypinator 0:bb348c97df44 3085
lypinator 0:bb348c97df44 3086 #define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE
lypinator 0:bb348c97df44 3087
lypinator 0:bb348c97df44 3088 /**
lypinator 0:bb348c97df44 3089 * @}
lypinator 0:bb348c97df44 3090 */
lypinator 0:bb348c97df44 3091
lypinator 0:bb348c97df44 3092 /** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3093 * @{
lypinator 0:bb348c97df44 3094 */
lypinator 0:bb348c97df44 3095 #define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1
lypinator 0:bb348c97df44 3096 #define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2
lypinator 0:bb348c97df44 3097 #define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START
lypinator 0:bb348c97df44 3098 #define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH
lypinator 0:bb348c97df44 3099 #define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR
lypinator 0:bb348c97df44 3100 #define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE
lypinator 0:bb348c97df44 3101 #define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE
lypinator 0:bb348c97df44 3102 #define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED
lypinator 0:bb348c97df44 3103 /**
lypinator 0:bb348c97df44 3104 * @}
lypinator 0:bb348c97df44 3105 */
lypinator 0:bb348c97df44 3106
lypinator 0:bb348c97df44 3107 /** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3108 * @{
lypinator 0:bb348c97df44 3109 */
lypinator 0:bb348c97df44 3110
lypinator 0:bb348c97df44 3111 #define __HAL_SPI_1LINE_TX SPI_1LINE_TX
lypinator 0:bb348c97df44 3112 #define __HAL_SPI_1LINE_RX SPI_1LINE_RX
lypinator 0:bb348c97df44 3113 #define __HAL_SPI_RESET_CRC SPI_RESET_CRC
lypinator 0:bb348c97df44 3114
lypinator 0:bb348c97df44 3115 /**
lypinator 0:bb348c97df44 3116 * @}
lypinator 0:bb348c97df44 3117 */
lypinator 0:bb348c97df44 3118
lypinator 0:bb348c97df44 3119 /** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3120 * @{
lypinator 0:bb348c97df44 3121 */
lypinator 0:bb348c97df44 3122
lypinator 0:bb348c97df44 3123 #define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
lypinator 0:bb348c97df44 3124 #define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION
lypinator 0:bb348c97df44 3125 #define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
lypinator 0:bb348c97df44 3126 #define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION
lypinator 0:bb348c97df44 3127
lypinator 0:bb348c97df44 3128 #define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD
lypinator 0:bb348c97df44 3129
lypinator 0:bb348c97df44 3130 #define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE
lypinator 0:bb348c97df44 3131 #define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE
lypinator 0:bb348c97df44 3132
lypinator 0:bb348c97df44 3133 /**
lypinator 0:bb348c97df44 3134 * @}
lypinator 0:bb348c97df44 3135 */
lypinator 0:bb348c97df44 3136
lypinator 0:bb348c97df44 3137
lypinator 0:bb348c97df44 3138 /** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3139 * @{
lypinator 0:bb348c97df44 3140 */
lypinator 0:bb348c97df44 3141
lypinator 0:bb348c97df44 3142 #define __USART_ENABLE_IT __HAL_USART_ENABLE_IT
lypinator 0:bb348c97df44 3143 #define __USART_DISABLE_IT __HAL_USART_DISABLE_IT
lypinator 0:bb348c97df44 3144 #define __USART_ENABLE __HAL_USART_ENABLE
lypinator 0:bb348c97df44 3145 #define __USART_DISABLE __HAL_USART_DISABLE
lypinator 0:bb348c97df44 3146
lypinator 0:bb348c97df44 3147 #define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
lypinator 0:bb348c97df44 3148 #define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
lypinator 0:bb348c97df44 3149
lypinator 0:bb348c97df44 3150 /**
lypinator 0:bb348c97df44 3151 * @}
lypinator 0:bb348c97df44 3152 */
lypinator 0:bb348c97df44 3153
lypinator 0:bb348c97df44 3154 /** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3155 * @{
lypinator 0:bb348c97df44 3156 */
lypinator 0:bb348c97df44 3157 #define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE
lypinator 0:bb348c97df44 3158
lypinator 0:bb348c97df44 3159 #define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
lypinator 0:bb348c97df44 3160 #define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
lypinator 0:bb348c97df44 3161 #define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
lypinator 0:bb348c97df44 3162 #define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE
lypinator 0:bb348c97df44 3163
lypinator 0:bb348c97df44 3164 #define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
lypinator 0:bb348c97df44 3165 #define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
lypinator 0:bb348c97df44 3166 #define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
lypinator 0:bb348c97df44 3167 #define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE
lypinator 0:bb348c97df44 3168
lypinator 0:bb348c97df44 3169 #define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT
lypinator 0:bb348c97df44 3170 #define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT
lypinator 0:bb348c97df44 3171 #define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG
lypinator 0:bb348c97df44 3172 #define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
lypinator 0:bb348c97df44 3173 #define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
lypinator 0:bb348c97df44 3174 #define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
lypinator 0:bb348c97df44 3175 #define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
lypinator 0:bb348c97df44 3176
lypinator 0:bb348c97df44 3177 #define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
lypinator 0:bb348c97df44 3178 #define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
lypinator 0:bb348c97df44 3179 #define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
lypinator 0:bb348c97df44 3180 #define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
lypinator 0:bb348c97df44 3181 #define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
lypinator 0:bb348c97df44 3182 #define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
lypinator 0:bb348c97df44 3183 #define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
lypinator 0:bb348c97df44 3184 #define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
lypinator 0:bb348c97df44 3185
lypinator 0:bb348c97df44 3186 #define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
lypinator 0:bb348c97df44 3187 #define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
lypinator 0:bb348c97df44 3188 #define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
lypinator 0:bb348c97df44 3189 #define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
lypinator 0:bb348c97df44 3190 #define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
lypinator 0:bb348c97df44 3191 #define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
lypinator 0:bb348c97df44 3192 #define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
lypinator 0:bb348c97df44 3193 #define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
lypinator 0:bb348c97df44 3194
lypinator 0:bb348c97df44 3195 #define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup
lypinator 0:bb348c97df44 3196 #define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup
lypinator 0:bb348c97df44 3197
lypinator 0:bb348c97df44 3198 #define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
lypinator 0:bb348c97df44 3199 #define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
lypinator 0:bb348c97df44 3200 /**
lypinator 0:bb348c97df44 3201 * @}
lypinator 0:bb348c97df44 3202 */
lypinator 0:bb348c97df44 3203
lypinator 0:bb348c97df44 3204 /** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3205 * @{
lypinator 0:bb348c97df44 3206 */
lypinator 0:bb348c97df44 3207 #define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE
lypinator 0:bb348c97df44 3208 #define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
lypinator 0:bb348c97df44 3209
lypinator 0:bb348c97df44 3210 #define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
lypinator 0:bb348c97df44 3211 #define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT
lypinator 0:bb348c97df44 3212
lypinator 0:bb348c97df44 3213 #define __HAL_TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
lypinator 0:bb348c97df44 3214
lypinator 0:bb348c97df44 3215 #define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN
lypinator 0:bb348c97df44 3216 #define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER
lypinator 0:bb348c97df44 3217 #define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER
lypinator 0:bb348c97df44 3218 #define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER
lypinator 0:bb348c97df44 3219 #define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD
lypinator 0:bb348c97df44 3220 #define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD
lypinator 0:bb348c97df44 3221 #define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION
lypinator 0:bb348c97df44 3222 #define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION
lypinator 0:bb348c97df44 3223 #define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER
lypinator 0:bb348c97df44 3224 #define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER
lypinator 0:bb348c97df44 3225 #define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE
lypinator 0:bb348c97df44 3226 #define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
lypinator 0:bb348c97df44 3227
lypinator 0:bb348c97df44 3228 #define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1
lypinator 0:bb348c97df44 3229 /**
lypinator 0:bb348c97df44 3230 * @}
lypinator 0:bb348c97df44 3231 */
lypinator 0:bb348c97df44 3232
lypinator 0:bb348c97df44 3233 /** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3234 * @{
lypinator 0:bb348c97df44 3235 */
lypinator 0:bb348c97df44 3236
lypinator 0:bb348c97df44 3237 #define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
lypinator 0:bb348c97df44 3238 #define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
lypinator 0:bb348c97df44 3239 #define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG
lypinator 0:bb348c97df44 3240 #define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
lypinator 0:bb348c97df44 3241 #define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
lypinator 0:bb348c97df44 3242 #define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
lypinator 0:bb348c97df44 3243 #define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
lypinator 0:bb348c97df44 3244
lypinator 0:bb348c97df44 3245 #define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE
lypinator 0:bb348c97df44 3246 #define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE
lypinator 0:bb348c97df44 3247 #define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE
lypinator 0:bb348c97df44 3248 /**
lypinator 0:bb348c97df44 3249 * @}
lypinator 0:bb348c97df44 3250 */
lypinator 0:bb348c97df44 3251
lypinator 0:bb348c97df44 3252 /** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3253 * @{
lypinator 0:bb348c97df44 3254 */
lypinator 0:bb348c97df44 3255 #define __HAL_LTDC_LAYER LTDC_LAYER
lypinator 0:bb348c97df44 3256 #define __HAL_LTDC_RELOAD_CONFIG __HAL_LTDC_RELOAD_IMMEDIATE_CONFIG
lypinator 0:bb348c97df44 3257 /**
lypinator 0:bb348c97df44 3258 * @}
lypinator 0:bb348c97df44 3259 */
lypinator 0:bb348c97df44 3260
lypinator 0:bb348c97df44 3261 /** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3262 * @{
lypinator 0:bb348c97df44 3263 */
lypinator 0:bb348c97df44 3264 #define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE
lypinator 0:bb348c97df44 3265 #define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE
lypinator 0:bb348c97df44 3266 #define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE
lypinator 0:bb348c97df44 3267 #define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE
lypinator 0:bb348c97df44 3268 #define SAI_STREOMODE SAI_STEREOMODE
lypinator 0:bb348c97df44 3269 #define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY
lypinator 0:bb348c97df44 3270 #define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL
lypinator 0:bb348c97df44 3271 #define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL
lypinator 0:bb348c97df44 3272 #define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL
lypinator 0:bb348c97df44 3273 #define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL
lypinator 0:bb348c97df44 3274 #define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL
lypinator 0:bb348c97df44 3275 #define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE
lypinator 0:bb348c97df44 3276 #define SAI_SYNCHRONOUS_EXT SAI_SYNCHRONOUS_EXT_SAI1
lypinator 0:bb348c97df44 3277 #define SAI_SYNCEXT_IN_ENABLE SAI_SYNCEXT_OUTBLOCKA_ENABLE
lypinator 0:bb348c97df44 3278 /**
lypinator 0:bb348c97df44 3279 * @}
lypinator 0:bb348c97df44 3280 */
lypinator 0:bb348c97df44 3281
lypinator 0:bb348c97df44 3282 /** @defgroup HAL_SPDIFRX_Aliased_Macros HAL SPDIFRX Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3283 * @{
lypinator 0:bb348c97df44 3284 */
lypinator 0:bb348c97df44 3285 #if defined(STM32H7)
lypinator 0:bb348c97df44 3286 #define HAL_SPDIFRX_ReceiveControlFlow HAL_SPDIFRX_ReceiveCtrlFlow
lypinator 0:bb348c97df44 3287 #define HAL_SPDIFRX_ReceiveControlFlow_IT HAL_SPDIFRX_ReceiveCtrlFlow_IT
lypinator 0:bb348c97df44 3288 #define HAL_SPDIFRX_ReceiveControlFlow_DMA HAL_SPDIFRX_ReceiveCtrlFlow_DMA
lypinator 0:bb348c97df44 3289 #endif
lypinator 0:bb348c97df44 3290 /**
lypinator 0:bb348c97df44 3291 * @}
lypinator 0:bb348c97df44 3292 */
lypinator 0:bb348c97df44 3293
lypinator 0:bb348c97df44 3294 /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
lypinator 0:bb348c97df44 3295 * @{
lypinator 0:bb348c97df44 3296 */
lypinator 0:bb348c97df44 3297
lypinator 0:bb348c97df44 3298 /**
lypinator 0:bb348c97df44 3299 * @}
lypinator 0:bb348c97df44 3300 */
lypinator 0:bb348c97df44 3301
lypinator 0:bb348c97df44 3302 #ifdef __cplusplus
lypinator 0:bb348c97df44 3303 }
lypinator 0:bb348c97df44 3304 #endif
lypinator 0:bb348c97df44 3305
lypinator 0:bb348c97df44 3306 #endif /* ___STM32_HAL_LEGACY */
lypinator 0:bb348c97df44 3307
lypinator 0:bb348c97df44 3308 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
lypinator 0:bb348c97df44 3309