Initial commit

Dependencies:   FastPWM

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file startup_stm32f469xx.s
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief STM32F469xx Devices vector table for GCC based toolchains.
lypinator 0:bb348c97df44 6 * This module performs:
lypinator 0:bb348c97df44 7 * - Set the initial SP
lypinator 0:bb348c97df44 8 * - Set the initial PC == Reset_Handler,
lypinator 0:bb348c97df44 9 * - Set the vector table entries with the exceptions ISR address
lypinator 0:bb348c97df44 10 * - Branches to main in the C library (which eventually
lypinator 0:bb348c97df44 11 * calls main()).
lypinator 0:bb348c97df44 12 * After Reset the Cortex-M4 processor is in Thread mode,
lypinator 0:bb348c97df44 13 * priority is Privileged, and the Stack is set to Main.
lypinator 0:bb348c97df44 14 ******************************************************************************
lypinator 0:bb348c97df44 15 * @attention
lypinator 0:bb348c97df44 16 *
lypinator 0:bb348c97df44 17 * <h2><center>&copy; COPYRIGHT 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 18 *
lypinator 0:bb348c97df44 19 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 20 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 21 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 22 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 23 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 24 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 25 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 26 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 27 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 28 * without specific prior written permission.
lypinator 0:bb348c97df44 29 *
lypinator 0:bb348c97df44 30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 31 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 33 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 36 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 37 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 38 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 40 *
lypinator 0:bb348c97df44 41 ******************************************************************************
lypinator 0:bb348c97df44 42 */
lypinator 0:bb348c97df44 43
lypinator 0:bb348c97df44 44 .syntax unified
lypinator 0:bb348c97df44 45 .cpu cortex-m4
lypinator 0:bb348c97df44 46 .fpu softvfp
lypinator 0:bb348c97df44 47 .thumb
lypinator 0:bb348c97df44 48
lypinator 0:bb348c97df44 49 .global g_pfnVectors
lypinator 0:bb348c97df44 50 .global Default_Handler
lypinator 0:bb348c97df44 51
lypinator 0:bb348c97df44 52 /* start address for the initialization values of the .data section.
lypinator 0:bb348c97df44 53 defined in linker script */
lypinator 0:bb348c97df44 54 .word _sidata
lypinator 0:bb348c97df44 55 /* start address for the .data section. defined in linker script */
lypinator 0:bb348c97df44 56 .word _sdata
lypinator 0:bb348c97df44 57 /* end address for the .data section. defined in linker script */
lypinator 0:bb348c97df44 58 .word _edata
lypinator 0:bb348c97df44 59 /* start address for the .bss section. defined in linker script */
lypinator 0:bb348c97df44 60 .word _sbss
lypinator 0:bb348c97df44 61 /* end address for the .bss section. defined in linker script */
lypinator 0:bb348c97df44 62 .word _ebss
lypinator 0:bb348c97df44 63 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
lypinator 0:bb348c97df44 64
lypinator 0:bb348c97df44 65 /**
lypinator 0:bb348c97df44 66 * @brief This is the code that gets called when the processor first
lypinator 0:bb348c97df44 67 * starts execution following a reset event. Only the absolutely
lypinator 0:bb348c97df44 68 * necessary set is performed, after which the application
lypinator 0:bb348c97df44 69 * supplied main() routine is called.
lypinator 0:bb348c97df44 70 * @param None
lypinator 0:bb348c97df44 71 * @retval : None
lypinator 0:bb348c97df44 72 */
lypinator 0:bb348c97df44 73
lypinator 0:bb348c97df44 74 .section .text.Reset_Handler
lypinator 0:bb348c97df44 75 .weak Reset_Handler
lypinator 0:bb348c97df44 76 .type Reset_Handler, %function
lypinator 0:bb348c97df44 77 Reset_Handler:
lypinator 0:bb348c97df44 78 ldr sp, =_estack /* set stack pointer */
lypinator 0:bb348c97df44 79
lypinator 0:bb348c97df44 80 /* Copy the data segment initializers from flash to SRAM */
lypinator 0:bb348c97df44 81 movs r1, #0
lypinator 0:bb348c97df44 82 b LoopCopyDataInit
lypinator 0:bb348c97df44 83
lypinator 0:bb348c97df44 84 CopyDataInit:
lypinator 0:bb348c97df44 85 ldr r3, =_sidata
lypinator 0:bb348c97df44 86 ldr r3, [r3, r1]
lypinator 0:bb348c97df44 87 str r3, [r0, r1]
lypinator 0:bb348c97df44 88 adds r1, r1, #4
lypinator 0:bb348c97df44 89
lypinator 0:bb348c97df44 90 LoopCopyDataInit:
lypinator 0:bb348c97df44 91 ldr r0, =_sdata
lypinator 0:bb348c97df44 92 ldr r3, =_edata
lypinator 0:bb348c97df44 93 adds r2, r0, r1
lypinator 0:bb348c97df44 94 cmp r2, r3
lypinator 0:bb348c97df44 95 bcc CopyDataInit
lypinator 0:bb348c97df44 96 ldr r2, =_sbss
lypinator 0:bb348c97df44 97 b LoopFillZerobss
lypinator 0:bb348c97df44 98 /* Zero fill the bss segment. */
lypinator 0:bb348c97df44 99 FillZerobss:
lypinator 0:bb348c97df44 100 movs r3, #0
lypinator 0:bb348c97df44 101 str r3, [r2], #4
lypinator 0:bb348c97df44 102
lypinator 0:bb348c97df44 103 LoopFillZerobss:
lypinator 0:bb348c97df44 104 ldr r3, = _ebss
lypinator 0:bb348c97df44 105 cmp r2, r3
lypinator 0:bb348c97df44 106 bcc FillZerobss
lypinator 0:bb348c97df44 107
lypinator 0:bb348c97df44 108 /* Call the clock system intitialization function.*/
lypinator 0:bb348c97df44 109 bl SystemInit
lypinator 0:bb348c97df44 110 /* Call static constructors */
lypinator 0:bb348c97df44 111 //bl __libc_init_array
lypinator 0:bb348c97df44 112 /* Call the application's entry point.*/
lypinator 0:bb348c97df44 113 //bl main
lypinator 0:bb348c97df44 114 // Calling the crt0 'cold-start' entry point. There __libc_init_array is called
lypinator 0:bb348c97df44 115 // and when existing hardware_init_hook() and software_init_hook() before
lypinator 0:bb348c97df44 116 // starting main(). software_init_hook() is available and has to be called due
lypinator 0:bb348c97df44 117 // to initializsation when using rtos.
lypinator 0:bb348c97df44 118 bl _start
lypinator 0:bb348c97df44 119 bx lr
lypinator 0:bb348c97df44 120 .size Reset_Handler, .-Reset_Handler
lypinator 0:bb348c97df44 121
lypinator 0:bb348c97df44 122 /**
lypinator 0:bb348c97df44 123 * @brief This is the code that gets called when the processor receives an
lypinator 0:bb348c97df44 124 * unexpected interrupt. This simply enters an infinite loop, preserving
lypinator 0:bb348c97df44 125 * the system state for examination by a debugger.
lypinator 0:bb348c97df44 126 * @param None
lypinator 0:bb348c97df44 127 * @retval None
lypinator 0:bb348c97df44 128 */
lypinator 0:bb348c97df44 129 .section .text.Default_Handler,"ax",%progbits
lypinator 0:bb348c97df44 130 Default_Handler:
lypinator 0:bb348c97df44 131 Infinite_Loop:
lypinator 0:bb348c97df44 132 b Infinite_Loop
lypinator 0:bb348c97df44 133 .size Default_Handler, .-Default_Handler
lypinator 0:bb348c97df44 134 /******************************************************************************
lypinator 0:bb348c97df44 135 *
lypinator 0:bb348c97df44 136 * The minimal vector table for a Cortex M3. Note that the proper constructs
lypinator 0:bb348c97df44 137 * must be placed on this to ensure that it ends up at physical address
lypinator 0:bb348c97df44 138 * 0x0000.0000.
lypinator 0:bb348c97df44 139 *
lypinator 0:bb348c97df44 140 *******************************************************************************/
lypinator 0:bb348c97df44 141 .section .isr_vector,"a",%progbits
lypinator 0:bb348c97df44 142 .type g_pfnVectors, %object
lypinator 0:bb348c97df44 143 .size g_pfnVectors, .-g_pfnVectors
lypinator 0:bb348c97df44 144
lypinator 0:bb348c97df44 145 g_pfnVectors:
lypinator 0:bb348c97df44 146 .word _estack
lypinator 0:bb348c97df44 147 .word Reset_Handler
lypinator 0:bb348c97df44 148
lypinator 0:bb348c97df44 149 .word NMI_Handler
lypinator 0:bb348c97df44 150 .word HardFault_Handler
lypinator 0:bb348c97df44 151 .word MemManage_Handler
lypinator 0:bb348c97df44 152 .word BusFault_Handler
lypinator 0:bb348c97df44 153 .word UsageFault_Handler
lypinator 0:bb348c97df44 154 .word 0
lypinator 0:bb348c97df44 155 .word 0
lypinator 0:bb348c97df44 156 .word 0
lypinator 0:bb348c97df44 157 .word 0
lypinator 0:bb348c97df44 158 .word SVC_Handler
lypinator 0:bb348c97df44 159 .word DebugMon_Handler
lypinator 0:bb348c97df44 160 .word 0
lypinator 0:bb348c97df44 161 .word PendSV_Handler
lypinator 0:bb348c97df44 162 .word SysTick_Handler
lypinator 0:bb348c97df44 163
lypinator 0:bb348c97df44 164 /* External Interrupts */
lypinator 0:bb348c97df44 165 .word WWDG_IRQHandler /* Window WatchDog */
lypinator 0:bb348c97df44 166 .word PVD_IRQHandler /* PVD through EXTI Line detection */
lypinator 0:bb348c97df44 167 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
lypinator 0:bb348c97df44 168 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
lypinator 0:bb348c97df44 169 .word FLASH_IRQHandler /* FLASH */
lypinator 0:bb348c97df44 170 .word RCC_IRQHandler /* RCC */
lypinator 0:bb348c97df44 171 .word EXTI0_IRQHandler /* EXTI Line0 */
lypinator 0:bb348c97df44 172 .word EXTI1_IRQHandler /* EXTI Line1 */
lypinator 0:bb348c97df44 173 .word EXTI2_IRQHandler /* EXTI Line2 */
lypinator 0:bb348c97df44 174 .word EXTI3_IRQHandler /* EXTI Line3 */
lypinator 0:bb348c97df44 175 .word EXTI4_IRQHandler /* EXTI Line4 */
lypinator 0:bb348c97df44 176 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
lypinator 0:bb348c97df44 177 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
lypinator 0:bb348c97df44 178 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
lypinator 0:bb348c97df44 179 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
lypinator 0:bb348c97df44 180 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
lypinator 0:bb348c97df44 181 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
lypinator 0:bb348c97df44 182 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
lypinator 0:bb348c97df44 183 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
lypinator 0:bb348c97df44 184 .word CAN1_TX_IRQHandler /* CAN1 TX */
lypinator 0:bb348c97df44 185 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
lypinator 0:bb348c97df44 186 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
lypinator 0:bb348c97df44 187 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
lypinator 0:bb348c97df44 188 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
lypinator 0:bb348c97df44 189 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
lypinator 0:bb348c97df44 190 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
lypinator 0:bb348c97df44 191 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
lypinator 0:bb348c97df44 192 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
lypinator 0:bb348c97df44 193 .word TIM2_IRQHandler /* TIM2 */
lypinator 0:bb348c97df44 194 .word TIM3_IRQHandler /* TIM3 */
lypinator 0:bb348c97df44 195 .word TIM4_IRQHandler /* TIM4 */
lypinator 0:bb348c97df44 196 .word I2C1_EV_IRQHandler /* I2C1 Event */
lypinator 0:bb348c97df44 197 .word I2C1_ER_IRQHandler /* I2C1 Error */
lypinator 0:bb348c97df44 198 .word I2C2_EV_IRQHandler /* I2C2 Event */
lypinator 0:bb348c97df44 199 .word I2C2_ER_IRQHandler /* I2C2 Error */
lypinator 0:bb348c97df44 200 .word SPI1_IRQHandler /* SPI1 */
lypinator 0:bb348c97df44 201 .word SPI2_IRQHandler /* SPI2 */
lypinator 0:bb348c97df44 202 .word USART1_IRQHandler /* USART1 */
lypinator 0:bb348c97df44 203 .word USART2_IRQHandler /* USART2 */
lypinator 0:bb348c97df44 204 .word USART3_IRQHandler /* USART3 */
lypinator 0:bb348c97df44 205 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
lypinator 0:bb348c97df44 206 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
lypinator 0:bb348c97df44 207 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
lypinator 0:bb348c97df44 208 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
lypinator 0:bb348c97df44 209 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
lypinator 0:bb348c97df44 210 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
lypinator 0:bb348c97df44 211 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
lypinator 0:bb348c97df44 212 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
lypinator 0:bb348c97df44 213 .word FMC_IRQHandler /* FMC */
lypinator 0:bb348c97df44 214 .word SDIO_IRQHandler /* SDIO */
lypinator 0:bb348c97df44 215 .word TIM5_IRQHandler /* TIM5 */
lypinator 0:bb348c97df44 216 .word SPI3_IRQHandler /* SPI3 */
lypinator 0:bb348c97df44 217 .word UART4_IRQHandler /* UART4 */
lypinator 0:bb348c97df44 218 .word UART5_IRQHandler /* UART5 */
lypinator 0:bb348c97df44 219 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
lypinator 0:bb348c97df44 220 .word TIM7_IRQHandler /* TIM7 */
lypinator 0:bb348c97df44 221 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
lypinator 0:bb348c97df44 222 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
lypinator 0:bb348c97df44 223 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
lypinator 0:bb348c97df44 224 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
lypinator 0:bb348c97df44 225 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
lypinator 0:bb348c97df44 226 .word ETH_IRQHandler /* Ethernet */
lypinator 0:bb348c97df44 227 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
lypinator 0:bb348c97df44 228 .word CAN2_TX_IRQHandler /* CAN2 TX */
lypinator 0:bb348c97df44 229 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
lypinator 0:bb348c97df44 230 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
lypinator 0:bb348c97df44 231 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
lypinator 0:bb348c97df44 232 .word OTG_FS_IRQHandler /* USB OTG FS */
lypinator 0:bb348c97df44 233 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
lypinator 0:bb348c97df44 234 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
lypinator 0:bb348c97df44 235 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
lypinator 0:bb348c97df44 236 .word USART6_IRQHandler /* USART6 */
lypinator 0:bb348c97df44 237 .word I2C3_EV_IRQHandler /* I2C3 event */
lypinator 0:bb348c97df44 238 .word I2C3_ER_IRQHandler /* I2C3 error */
lypinator 0:bb348c97df44 239 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
lypinator 0:bb348c97df44 240 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
lypinator 0:bb348c97df44 241 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
lypinator 0:bb348c97df44 242 .word OTG_HS_IRQHandler /* USB OTG HS */
lypinator 0:bb348c97df44 243 .word DCMI_IRQHandler /* DCMI */
lypinator 0:bb348c97df44 244 .word 0 /* Reserved */
lypinator 0:bb348c97df44 245 .word HASH_RNG_IRQHandler /* Hash and Rng */
lypinator 0:bb348c97df44 246 .word FPU_IRQHandler /* FPU */
lypinator 0:bb348c97df44 247 .word UART7_IRQHandler /* UART7 */
lypinator 0:bb348c97df44 248 .word UART8_IRQHandler /* UART8 */
lypinator 0:bb348c97df44 249 .word SPI4_IRQHandler /* SPI4 */
lypinator 0:bb348c97df44 250 .word SPI5_IRQHandler /* SPI5 */
lypinator 0:bb348c97df44 251 .word SPI6_IRQHandler /* SPI6 */
lypinator 0:bb348c97df44 252 .word SAI1_IRQHandler /* SAI1 */
lypinator 0:bb348c97df44 253 .word LTDC_IRQHandler /* LTDC */
lypinator 0:bb348c97df44 254 .word LTDC_ER_IRQHandler /* LTDC error */
lypinator 0:bb348c97df44 255 .word DMA2D_IRQHandler /* DMA2D */
lypinator 0:bb348c97df44 256 .word QUADSPI_IRQHandler /* QUADSPI */
lypinator 0:bb348c97df44 257 .word DSI_IRQHandler /* DSI */
lypinator 0:bb348c97df44 258
lypinator 0:bb348c97df44 259
lypinator 0:bb348c97df44 260 /*******************************************************************************
lypinator 0:bb348c97df44 261 *
lypinator 0:bb348c97df44 262 * Provide weak aliases for each Exception handler to the Default_Handler.
lypinator 0:bb348c97df44 263 * As they are weak aliases, any function with the same name will override
lypinator 0:bb348c97df44 264 * this definition.
lypinator 0:bb348c97df44 265 *
lypinator 0:bb348c97df44 266 *******************************************************************************/
lypinator 0:bb348c97df44 267 .weak NMI_Handler
lypinator 0:bb348c97df44 268 .thumb_set NMI_Handler,Default_Handler
lypinator 0:bb348c97df44 269
lypinator 0:bb348c97df44 270 .weak HardFault_Handler
lypinator 0:bb348c97df44 271 .thumb_set HardFault_Handler,Default_Handler
lypinator 0:bb348c97df44 272
lypinator 0:bb348c97df44 273 .weak MemManage_Handler
lypinator 0:bb348c97df44 274 .thumb_set MemManage_Handler,Default_Handler
lypinator 0:bb348c97df44 275
lypinator 0:bb348c97df44 276 .weak BusFault_Handler
lypinator 0:bb348c97df44 277 .thumb_set BusFault_Handler,Default_Handler
lypinator 0:bb348c97df44 278
lypinator 0:bb348c97df44 279 .weak UsageFault_Handler
lypinator 0:bb348c97df44 280 .thumb_set UsageFault_Handler,Default_Handler
lypinator 0:bb348c97df44 281
lypinator 0:bb348c97df44 282 .weak SVC_Handler
lypinator 0:bb348c97df44 283 .thumb_set SVC_Handler,Default_Handler
lypinator 0:bb348c97df44 284
lypinator 0:bb348c97df44 285 .weak DebugMon_Handler
lypinator 0:bb348c97df44 286 .thumb_set DebugMon_Handler,Default_Handler
lypinator 0:bb348c97df44 287
lypinator 0:bb348c97df44 288 .weak PendSV_Handler
lypinator 0:bb348c97df44 289 .thumb_set PendSV_Handler,Default_Handler
lypinator 0:bb348c97df44 290
lypinator 0:bb348c97df44 291 .weak SysTick_Handler
lypinator 0:bb348c97df44 292 .thumb_set SysTick_Handler,Default_Handler
lypinator 0:bb348c97df44 293
lypinator 0:bb348c97df44 294 .weak WWDG_IRQHandler
lypinator 0:bb348c97df44 295 .thumb_set WWDG_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 296
lypinator 0:bb348c97df44 297 .weak PVD_IRQHandler
lypinator 0:bb348c97df44 298 .thumb_set PVD_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 299
lypinator 0:bb348c97df44 300 .weak TAMP_STAMP_IRQHandler
lypinator 0:bb348c97df44 301 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 302
lypinator 0:bb348c97df44 303 .weak RTC_WKUP_IRQHandler
lypinator 0:bb348c97df44 304 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 305
lypinator 0:bb348c97df44 306 .weak FLASH_IRQHandler
lypinator 0:bb348c97df44 307 .thumb_set FLASH_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 308
lypinator 0:bb348c97df44 309 .weak RCC_IRQHandler
lypinator 0:bb348c97df44 310 .thumb_set RCC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 311
lypinator 0:bb348c97df44 312 .weak EXTI0_IRQHandler
lypinator 0:bb348c97df44 313 .thumb_set EXTI0_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 314
lypinator 0:bb348c97df44 315 .weak EXTI1_IRQHandler
lypinator 0:bb348c97df44 316 .thumb_set EXTI1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 317
lypinator 0:bb348c97df44 318 .weak EXTI2_IRQHandler
lypinator 0:bb348c97df44 319 .thumb_set EXTI2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 320
lypinator 0:bb348c97df44 321 .weak EXTI3_IRQHandler
lypinator 0:bb348c97df44 322 .thumb_set EXTI3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 323
lypinator 0:bb348c97df44 324 .weak EXTI4_IRQHandler
lypinator 0:bb348c97df44 325 .thumb_set EXTI4_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 326
lypinator 0:bb348c97df44 327 .weak DMA1_Stream0_IRQHandler
lypinator 0:bb348c97df44 328 .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 329
lypinator 0:bb348c97df44 330 .weak DMA1_Stream1_IRQHandler
lypinator 0:bb348c97df44 331 .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 332
lypinator 0:bb348c97df44 333 .weak DMA1_Stream2_IRQHandler
lypinator 0:bb348c97df44 334 .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 335
lypinator 0:bb348c97df44 336 .weak DMA1_Stream3_IRQHandler
lypinator 0:bb348c97df44 337 .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 338
lypinator 0:bb348c97df44 339 .weak DMA1_Stream4_IRQHandler
lypinator 0:bb348c97df44 340 .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 341
lypinator 0:bb348c97df44 342 .weak DMA1_Stream5_IRQHandler
lypinator 0:bb348c97df44 343 .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 344
lypinator 0:bb348c97df44 345 .weak DMA1_Stream6_IRQHandler
lypinator 0:bb348c97df44 346 .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 347
lypinator 0:bb348c97df44 348 .weak ADC_IRQHandler
lypinator 0:bb348c97df44 349 .thumb_set ADC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 350
lypinator 0:bb348c97df44 351 .weak CAN1_TX_IRQHandler
lypinator 0:bb348c97df44 352 .thumb_set CAN1_TX_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 353
lypinator 0:bb348c97df44 354 .weak CAN1_RX0_IRQHandler
lypinator 0:bb348c97df44 355 .thumb_set CAN1_RX0_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 356
lypinator 0:bb348c97df44 357 .weak CAN1_RX1_IRQHandler
lypinator 0:bb348c97df44 358 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 359
lypinator 0:bb348c97df44 360 .weak CAN1_SCE_IRQHandler
lypinator 0:bb348c97df44 361 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 362
lypinator 0:bb348c97df44 363 .weak EXTI9_5_IRQHandler
lypinator 0:bb348c97df44 364 .thumb_set EXTI9_5_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 365
lypinator 0:bb348c97df44 366 .weak TIM1_BRK_TIM9_IRQHandler
lypinator 0:bb348c97df44 367 .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 368
lypinator 0:bb348c97df44 369 .weak TIM1_UP_TIM10_IRQHandler
lypinator 0:bb348c97df44 370 .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 371
lypinator 0:bb348c97df44 372 .weak TIM1_TRG_COM_TIM11_IRQHandler
lypinator 0:bb348c97df44 373 .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 374
lypinator 0:bb348c97df44 375 .weak TIM1_CC_IRQHandler
lypinator 0:bb348c97df44 376 .thumb_set TIM1_CC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 377
lypinator 0:bb348c97df44 378 .weak TIM2_IRQHandler
lypinator 0:bb348c97df44 379 .thumb_set TIM2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 380
lypinator 0:bb348c97df44 381 .weak TIM3_IRQHandler
lypinator 0:bb348c97df44 382 .thumb_set TIM3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 383
lypinator 0:bb348c97df44 384 .weak TIM4_IRQHandler
lypinator 0:bb348c97df44 385 .thumb_set TIM4_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 386
lypinator 0:bb348c97df44 387 .weak I2C1_EV_IRQHandler
lypinator 0:bb348c97df44 388 .thumb_set I2C1_EV_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 389
lypinator 0:bb348c97df44 390 .weak I2C1_ER_IRQHandler
lypinator 0:bb348c97df44 391 .thumb_set I2C1_ER_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 392
lypinator 0:bb348c97df44 393 .weak I2C2_EV_IRQHandler
lypinator 0:bb348c97df44 394 .thumb_set I2C2_EV_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 395
lypinator 0:bb348c97df44 396 .weak I2C2_ER_IRQHandler
lypinator 0:bb348c97df44 397 .thumb_set I2C2_ER_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 398
lypinator 0:bb348c97df44 399 .weak SPI1_IRQHandler
lypinator 0:bb348c97df44 400 .thumb_set SPI1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 401
lypinator 0:bb348c97df44 402 .weak SPI2_IRQHandler
lypinator 0:bb348c97df44 403 .thumb_set SPI2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 404
lypinator 0:bb348c97df44 405 .weak USART1_IRQHandler
lypinator 0:bb348c97df44 406 .thumb_set USART1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 407
lypinator 0:bb348c97df44 408 .weak USART2_IRQHandler
lypinator 0:bb348c97df44 409 .thumb_set USART2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 410
lypinator 0:bb348c97df44 411 .weak USART3_IRQHandler
lypinator 0:bb348c97df44 412 .thumb_set USART3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 413
lypinator 0:bb348c97df44 414 .weak EXTI15_10_IRQHandler
lypinator 0:bb348c97df44 415 .thumb_set EXTI15_10_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 416
lypinator 0:bb348c97df44 417 .weak RTC_Alarm_IRQHandler
lypinator 0:bb348c97df44 418 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 419
lypinator 0:bb348c97df44 420 .weak OTG_FS_WKUP_IRQHandler
lypinator 0:bb348c97df44 421 .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 422
lypinator 0:bb348c97df44 423 .weak TIM8_BRK_TIM12_IRQHandler
lypinator 0:bb348c97df44 424 .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 425
lypinator 0:bb348c97df44 426 .weak TIM8_UP_TIM13_IRQHandler
lypinator 0:bb348c97df44 427 .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 428
lypinator 0:bb348c97df44 429 .weak TIM8_TRG_COM_TIM14_IRQHandler
lypinator 0:bb348c97df44 430 .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 431
lypinator 0:bb348c97df44 432 .weak TIM8_CC_IRQHandler
lypinator 0:bb348c97df44 433 .thumb_set TIM8_CC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 434
lypinator 0:bb348c97df44 435 .weak DMA1_Stream7_IRQHandler
lypinator 0:bb348c97df44 436 .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 437
lypinator 0:bb348c97df44 438 .weak FMC_IRQHandler
lypinator 0:bb348c97df44 439 .thumb_set FMC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 440
lypinator 0:bb348c97df44 441 .weak SDIO_IRQHandler
lypinator 0:bb348c97df44 442 .thumb_set SDIO_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 443
lypinator 0:bb348c97df44 444 .weak TIM5_IRQHandler
lypinator 0:bb348c97df44 445 .thumb_set TIM5_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 446
lypinator 0:bb348c97df44 447 .weak SPI3_IRQHandler
lypinator 0:bb348c97df44 448 .thumb_set SPI3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 449
lypinator 0:bb348c97df44 450 .weak UART4_IRQHandler
lypinator 0:bb348c97df44 451 .thumb_set UART4_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 452
lypinator 0:bb348c97df44 453 .weak UART5_IRQHandler
lypinator 0:bb348c97df44 454 .thumb_set UART5_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 455
lypinator 0:bb348c97df44 456 .weak TIM6_DAC_IRQHandler
lypinator 0:bb348c97df44 457 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 458
lypinator 0:bb348c97df44 459 .weak TIM7_IRQHandler
lypinator 0:bb348c97df44 460 .thumb_set TIM7_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 461
lypinator 0:bb348c97df44 462 .weak DMA2_Stream0_IRQHandler
lypinator 0:bb348c97df44 463 .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 464
lypinator 0:bb348c97df44 465 .weak DMA2_Stream1_IRQHandler
lypinator 0:bb348c97df44 466 .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 467
lypinator 0:bb348c97df44 468 .weak DMA2_Stream2_IRQHandler
lypinator 0:bb348c97df44 469 .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 470
lypinator 0:bb348c97df44 471 .weak DMA2_Stream3_IRQHandler
lypinator 0:bb348c97df44 472 .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 473
lypinator 0:bb348c97df44 474 .weak DMA2_Stream4_IRQHandler
lypinator 0:bb348c97df44 475 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 476
lypinator 0:bb348c97df44 477 .weak ETH_IRQHandler
lypinator 0:bb348c97df44 478 .thumb_set ETH_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 479
lypinator 0:bb348c97df44 480 .weak ETH_WKUP_IRQHandler
lypinator 0:bb348c97df44 481 .thumb_set ETH_WKUP_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 482
lypinator 0:bb348c97df44 483 .weak CAN2_TX_IRQHandler
lypinator 0:bb348c97df44 484 .thumb_set CAN2_TX_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 485
lypinator 0:bb348c97df44 486 .weak CAN2_RX0_IRQHandler
lypinator 0:bb348c97df44 487 .thumb_set CAN2_RX0_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 488
lypinator 0:bb348c97df44 489 .weak CAN2_RX1_IRQHandler
lypinator 0:bb348c97df44 490 .thumb_set CAN2_RX1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 491
lypinator 0:bb348c97df44 492 .weak CAN2_SCE_IRQHandler
lypinator 0:bb348c97df44 493 .thumb_set CAN2_SCE_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 494
lypinator 0:bb348c97df44 495 .weak OTG_FS_IRQHandler
lypinator 0:bb348c97df44 496 .thumb_set OTG_FS_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 497
lypinator 0:bb348c97df44 498 .weak DMA2_Stream5_IRQHandler
lypinator 0:bb348c97df44 499 .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 500
lypinator 0:bb348c97df44 501 .weak DMA2_Stream6_IRQHandler
lypinator 0:bb348c97df44 502 .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 503
lypinator 0:bb348c97df44 504 .weak DMA2_Stream7_IRQHandler
lypinator 0:bb348c97df44 505 .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 506
lypinator 0:bb348c97df44 507 .weak USART6_IRQHandler
lypinator 0:bb348c97df44 508 .thumb_set USART6_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 509
lypinator 0:bb348c97df44 510 .weak I2C3_EV_IRQHandler
lypinator 0:bb348c97df44 511 .thumb_set I2C3_EV_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 512
lypinator 0:bb348c97df44 513 .weak I2C3_ER_IRQHandler
lypinator 0:bb348c97df44 514 .thumb_set I2C3_ER_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 515
lypinator 0:bb348c97df44 516 .weak OTG_HS_EP1_OUT_IRQHandler
lypinator 0:bb348c97df44 517 .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 518
lypinator 0:bb348c97df44 519 .weak OTG_HS_EP1_IN_IRQHandler
lypinator 0:bb348c97df44 520 .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 521
lypinator 0:bb348c97df44 522 .weak OTG_HS_WKUP_IRQHandler
lypinator 0:bb348c97df44 523 .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 524
lypinator 0:bb348c97df44 525 .weak OTG_HS_IRQHandler
lypinator 0:bb348c97df44 526 .thumb_set OTG_HS_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 527
lypinator 0:bb348c97df44 528 .weak DCMI_IRQHandler
lypinator 0:bb348c97df44 529 .thumb_set DCMI_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 530
lypinator 0:bb348c97df44 531 .weak HASH_RNG_IRQHandler
lypinator 0:bb348c97df44 532 .thumb_set HASH_RNG_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 533
lypinator 0:bb348c97df44 534 .weak FPU_IRQHandler
lypinator 0:bb348c97df44 535 .thumb_set FPU_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 536
lypinator 0:bb348c97df44 537 .weak UART7_IRQHandler
lypinator 0:bb348c97df44 538 .thumb_set UART7_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 539
lypinator 0:bb348c97df44 540 .weak UART8_IRQHandler
lypinator 0:bb348c97df44 541 .thumb_set UART8_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 542
lypinator 0:bb348c97df44 543 .weak SPI4_IRQHandler
lypinator 0:bb348c97df44 544 .thumb_set SPI4_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 545
lypinator 0:bb348c97df44 546 .weak SPI5_IRQHandler
lypinator 0:bb348c97df44 547 .thumb_set SPI5_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 548
lypinator 0:bb348c97df44 549 .weak SPI6_IRQHandler
lypinator 0:bb348c97df44 550 .thumb_set SPI6_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 551
lypinator 0:bb348c97df44 552 .weak SAI1_IRQHandler
lypinator 0:bb348c97df44 553 .thumb_set SAI1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 554
lypinator 0:bb348c97df44 555 .weak LTDC_IRQHandler
lypinator 0:bb348c97df44 556 .thumb_set LTDC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 557
lypinator 0:bb348c97df44 558 .weak LTDC_ER_IRQHandler
lypinator 0:bb348c97df44 559 .thumb_set LTDC_ER_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 560
lypinator 0:bb348c97df44 561 .weak DMA2D_IRQHandler
lypinator 0:bb348c97df44 562 .thumb_set DMA2D_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 563
lypinator 0:bb348c97df44 564 .weak QUADSPI_IRQHandler
lypinator 0:bb348c97df44 565 .thumb_set QUADSPI_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 566
lypinator 0:bb348c97df44 567 .weak DSI_IRQHandler
lypinator 0:bb348c97df44 568 .thumb_set DSI_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 569
lypinator 0:bb348c97df44 570 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
lypinator 0:bb348c97df44 571
lypinator 0:bb348c97df44 572
lypinator 0:bb348c97df44 573
lypinator 0:bb348c97df44 574
lypinator 0:bb348c97df44 575
lypinator 0:bb348c97df44 576
lypinator 0:bb348c97df44 577