Initial commit

Dependencies:   FastPWM

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**
lypinator 0:bb348c97df44 2 ******************************************************************************
lypinator 0:bb348c97df44 3 * @file startup_stm32f407xx.s
lypinator 0:bb348c97df44 4 * @author MCD Application Team
lypinator 0:bb348c97df44 5 * @brief STM32F407xx Devices vector table for GCC based toolchains.
lypinator 0:bb348c97df44 6 * This module performs:
lypinator 0:bb348c97df44 7 * - Set the initial SP
lypinator 0:bb348c97df44 8 * - Set the initial PC == Reset_Handler,
lypinator 0:bb348c97df44 9 * - Set the vector table entries with the exceptions ISR address
lypinator 0:bb348c97df44 10 * - Branches to main in the C library (which eventually
lypinator 0:bb348c97df44 11 * calls main()).
lypinator 0:bb348c97df44 12 * After Reset the Cortex-M4 processor is in Thread mode,
lypinator 0:bb348c97df44 13 * priority is Privileged, and the Stack is set to Main.
lypinator 0:bb348c97df44 14 ******************************************************************************
lypinator 0:bb348c97df44 15 * @attention
lypinator 0:bb348c97df44 16 *
lypinator 0:bb348c97df44 17 * <h2><center>&copy; COPYRIGHT 2017 STMicroelectronics</center></h2>
lypinator 0:bb348c97df44 18 *
lypinator 0:bb348c97df44 19 * Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 20 * are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 21 * 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 22 * this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 23 * 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 24 * this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 25 * and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 26 * 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 27 * may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 28 * without specific prior written permission.
lypinator 0:bb348c97df44 29 *
lypinator 0:bb348c97df44 30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 31 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 33 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 36 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 37 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 38 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 40 *
lypinator 0:bb348c97df44 41 ******************************************************************************
lypinator 0:bb348c97df44 42 */
lypinator 0:bb348c97df44 43
lypinator 0:bb348c97df44 44 .syntax unified
lypinator 0:bb348c97df44 45 .cpu cortex-m4
lypinator 0:bb348c97df44 46 .fpu softvfp
lypinator 0:bb348c97df44 47 .thumb
lypinator 0:bb348c97df44 48
lypinator 0:bb348c97df44 49 .global g_pfnVectors
lypinator 0:bb348c97df44 50 .global Default_Handler
lypinator 0:bb348c97df44 51
lypinator 0:bb348c97df44 52 /* start address for the initialization values of the .data section.
lypinator 0:bb348c97df44 53 defined in linker script */
lypinator 0:bb348c97df44 54 .word _sidata
lypinator 0:bb348c97df44 55 /* start address for the .data section. defined in linker script */
lypinator 0:bb348c97df44 56 .word _sdata
lypinator 0:bb348c97df44 57 /* end address for the .data section. defined in linker script */
lypinator 0:bb348c97df44 58 .word _edata
lypinator 0:bb348c97df44 59 /* start address for the .bss section. defined in linker script */
lypinator 0:bb348c97df44 60 .word _sbss
lypinator 0:bb348c97df44 61 /* end address for the .bss section. defined in linker script */
lypinator 0:bb348c97df44 62 .word _ebss
lypinator 0:bb348c97df44 63 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
lypinator 0:bb348c97df44 64
lypinator 0:bb348c97df44 65 /**
lypinator 0:bb348c97df44 66 * @brief This is the code that gets called when the processor first
lypinator 0:bb348c97df44 67 * starts execution following a reset event. Only the absolutely
lypinator 0:bb348c97df44 68 * necessary set is performed, after which the application
lypinator 0:bb348c97df44 69 * supplied main() routine is called.
lypinator 0:bb348c97df44 70 * @param None
lypinator 0:bb348c97df44 71 * @retval : None
lypinator 0:bb348c97df44 72 */
lypinator 0:bb348c97df44 73
lypinator 0:bb348c97df44 74 .section .text.Reset_Handler
lypinator 0:bb348c97df44 75 .weak Reset_Handler
lypinator 0:bb348c97df44 76 .type Reset_Handler, %function
lypinator 0:bb348c97df44 77 Reset_Handler:
lypinator 0:bb348c97df44 78 ldr sp, =_estack /* set stack pointer */
lypinator 0:bb348c97df44 79
lypinator 0:bb348c97df44 80 /* Copy the data segment initializers from flash to SRAM */
lypinator 0:bb348c97df44 81 movs r1, #0
lypinator 0:bb348c97df44 82 b LoopCopyDataInit
lypinator 0:bb348c97df44 83
lypinator 0:bb348c97df44 84 CopyDataInit:
lypinator 0:bb348c97df44 85 ldr r3, =_sidata
lypinator 0:bb348c97df44 86 ldr r3, [r3, r1]
lypinator 0:bb348c97df44 87 str r3, [r0, r1]
lypinator 0:bb348c97df44 88 adds r1, r1, #4
lypinator 0:bb348c97df44 89
lypinator 0:bb348c97df44 90 LoopCopyDataInit:
lypinator 0:bb348c97df44 91 ldr r0, =_sdata
lypinator 0:bb348c97df44 92 ldr r3, =_edata
lypinator 0:bb348c97df44 93 adds r2, r0, r1
lypinator 0:bb348c97df44 94 cmp r2, r3
lypinator 0:bb348c97df44 95 bcc CopyDataInit
lypinator 0:bb348c97df44 96 ldr r2, =_sbss
lypinator 0:bb348c97df44 97 b LoopFillZerobss
lypinator 0:bb348c97df44 98 /* Zero fill the bss segment. */
lypinator 0:bb348c97df44 99 FillZerobss:
lypinator 0:bb348c97df44 100 movs r3, #0
lypinator 0:bb348c97df44 101 str r3, [r2], #4
lypinator 0:bb348c97df44 102
lypinator 0:bb348c97df44 103 LoopFillZerobss:
lypinator 0:bb348c97df44 104 ldr r3, = _ebss
lypinator 0:bb348c97df44 105 cmp r2, r3
lypinator 0:bb348c97df44 106 bcc FillZerobss
lypinator 0:bb348c97df44 107
lypinator 0:bb348c97df44 108 /* Call the clock system intitialization function.*/
lypinator 0:bb348c97df44 109 bl SystemInit
lypinator 0:bb348c97df44 110 /* Call static constructors */
lypinator 0:bb348c97df44 111 //bl __libc_init_array
lypinator 0:bb348c97df44 112 /* Call the application's entry point.*/
lypinator 0:bb348c97df44 113 //bl main
lypinator 0:bb348c97df44 114 // Calling the crt0 'cold-start' entry point. There __libc_init_array is called
lypinator 0:bb348c97df44 115 // and when existing hardware_init_hook() and software_init_hook() before
lypinator 0:bb348c97df44 116 // starting main(). software_init_hook() is available and has to be called due
lypinator 0:bb348c97df44 117 // to initializsation when using rtos.
lypinator 0:bb348c97df44 118 bl _start
lypinator 0:bb348c97df44 119 bx lr
lypinator 0:bb348c97df44 120 .size Reset_Handler, .-Reset_Handler
lypinator 0:bb348c97df44 121
lypinator 0:bb348c97df44 122 /**
lypinator 0:bb348c97df44 123 * @brief This is the code that gets called when the processor receives an
lypinator 0:bb348c97df44 124 * unexpected interrupt. This simply enters an infinite loop, preserving
lypinator 0:bb348c97df44 125 * the system state for examination by a debugger.
lypinator 0:bb348c97df44 126 * @param None
lypinator 0:bb348c97df44 127 * @retval None
lypinator 0:bb348c97df44 128 */
lypinator 0:bb348c97df44 129 .section .text.Default_Handler,"ax",%progbits
lypinator 0:bb348c97df44 130 Default_Handler:
lypinator 0:bb348c97df44 131 Infinite_Loop:
lypinator 0:bb348c97df44 132 b Infinite_Loop
lypinator 0:bb348c97df44 133 .size Default_Handler, .-Default_Handler
lypinator 0:bb348c97df44 134 /******************************************************************************
lypinator 0:bb348c97df44 135 *
lypinator 0:bb348c97df44 136 * The minimal vector table for a Cortex M3. Note that the proper constructs
lypinator 0:bb348c97df44 137 * must be placed on this to ensure that it ends up at physical address
lypinator 0:bb348c97df44 138 * 0x0000.0000.
lypinator 0:bb348c97df44 139 *
lypinator 0:bb348c97df44 140 *******************************************************************************/
lypinator 0:bb348c97df44 141 .section .isr_vector,"a",%progbits
lypinator 0:bb348c97df44 142 .type g_pfnVectors, %object
lypinator 0:bb348c97df44 143 .size g_pfnVectors, .-g_pfnVectors
lypinator 0:bb348c97df44 144
lypinator 0:bb348c97df44 145
lypinator 0:bb348c97df44 146 g_pfnVectors:
lypinator 0:bb348c97df44 147 .word _estack
lypinator 0:bb348c97df44 148 .word Reset_Handler
lypinator 0:bb348c97df44 149 .word NMI_Handler
lypinator 0:bb348c97df44 150 .word HardFault_Handler
lypinator 0:bb348c97df44 151 .word MemManage_Handler
lypinator 0:bb348c97df44 152 .word BusFault_Handler
lypinator 0:bb348c97df44 153 .word UsageFault_Handler
lypinator 0:bb348c97df44 154 .word 0
lypinator 0:bb348c97df44 155 .word 0
lypinator 0:bb348c97df44 156 .word 0
lypinator 0:bb348c97df44 157 .word 0
lypinator 0:bb348c97df44 158 .word SVC_Handler
lypinator 0:bb348c97df44 159 .word DebugMon_Handler
lypinator 0:bb348c97df44 160 .word 0
lypinator 0:bb348c97df44 161 .word PendSV_Handler
lypinator 0:bb348c97df44 162 .word SysTick_Handler
lypinator 0:bb348c97df44 163
lypinator 0:bb348c97df44 164 /* External Interrupts */
lypinator 0:bb348c97df44 165 .word WWDG_IRQHandler /* Window WatchDog */
lypinator 0:bb348c97df44 166 .word PVD_IRQHandler /* PVD through EXTI Line detection */
lypinator 0:bb348c97df44 167 .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
lypinator 0:bb348c97df44 168 .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
lypinator 0:bb348c97df44 169 .word FLASH_IRQHandler /* FLASH */
lypinator 0:bb348c97df44 170 .word RCC_IRQHandler /* RCC */
lypinator 0:bb348c97df44 171 .word EXTI0_IRQHandler /* EXTI Line0 */
lypinator 0:bb348c97df44 172 .word EXTI1_IRQHandler /* EXTI Line1 */
lypinator 0:bb348c97df44 173 .word EXTI2_IRQHandler /* EXTI Line2 */
lypinator 0:bb348c97df44 174 .word EXTI3_IRQHandler /* EXTI Line3 */
lypinator 0:bb348c97df44 175 .word EXTI4_IRQHandler /* EXTI Line4 */
lypinator 0:bb348c97df44 176 .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
lypinator 0:bb348c97df44 177 .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
lypinator 0:bb348c97df44 178 .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
lypinator 0:bb348c97df44 179 .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
lypinator 0:bb348c97df44 180 .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
lypinator 0:bb348c97df44 181 .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
lypinator 0:bb348c97df44 182 .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
lypinator 0:bb348c97df44 183 .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
lypinator 0:bb348c97df44 184 .word CAN1_TX_IRQHandler /* CAN1 TX */
lypinator 0:bb348c97df44 185 .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
lypinator 0:bb348c97df44 186 .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
lypinator 0:bb348c97df44 187 .word CAN1_SCE_IRQHandler /* CAN1 SCE */
lypinator 0:bb348c97df44 188 .word EXTI9_5_IRQHandler /* External Line[9:5]s */
lypinator 0:bb348c97df44 189 .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
lypinator 0:bb348c97df44 190 .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
lypinator 0:bb348c97df44 191 .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
lypinator 0:bb348c97df44 192 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
lypinator 0:bb348c97df44 193 .word TIM2_IRQHandler /* TIM2 */
lypinator 0:bb348c97df44 194 .word TIM3_IRQHandler /* TIM3 */
lypinator 0:bb348c97df44 195 .word TIM4_IRQHandler /* TIM4 */
lypinator 0:bb348c97df44 196 .word I2C1_EV_IRQHandler /* I2C1 Event */
lypinator 0:bb348c97df44 197 .word I2C1_ER_IRQHandler /* I2C1 Error */
lypinator 0:bb348c97df44 198 .word I2C2_EV_IRQHandler /* I2C2 Event */
lypinator 0:bb348c97df44 199 .word I2C2_ER_IRQHandler /* I2C2 Error */
lypinator 0:bb348c97df44 200 .word SPI1_IRQHandler /* SPI1 */
lypinator 0:bb348c97df44 201 .word SPI2_IRQHandler /* SPI2 */
lypinator 0:bb348c97df44 202 .word USART1_IRQHandler /* USART1 */
lypinator 0:bb348c97df44 203 .word USART2_IRQHandler /* USART2 */
lypinator 0:bb348c97df44 204 .word USART3_IRQHandler /* USART3 */
lypinator 0:bb348c97df44 205 .word EXTI15_10_IRQHandler /* External Line[15:10]s */
lypinator 0:bb348c97df44 206 .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
lypinator 0:bb348c97df44 207 .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
lypinator 0:bb348c97df44 208 .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
lypinator 0:bb348c97df44 209 .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
lypinator 0:bb348c97df44 210 .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
lypinator 0:bb348c97df44 211 .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
lypinator 0:bb348c97df44 212 .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
lypinator 0:bb348c97df44 213 .word FSMC_IRQHandler /* FSMC */
lypinator 0:bb348c97df44 214 .word SDIO_IRQHandler /* SDIO */
lypinator 0:bb348c97df44 215 .word TIM5_IRQHandler /* TIM5 */
lypinator 0:bb348c97df44 216 .word SPI3_IRQHandler /* SPI3 */
lypinator 0:bb348c97df44 217 .word UART4_IRQHandler /* UART4 */
lypinator 0:bb348c97df44 218 .word UART5_IRQHandler /* UART5 */
lypinator 0:bb348c97df44 219 .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
lypinator 0:bb348c97df44 220 .word TIM7_IRQHandler /* TIM7 */
lypinator 0:bb348c97df44 221 .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
lypinator 0:bb348c97df44 222 .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
lypinator 0:bb348c97df44 223 .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
lypinator 0:bb348c97df44 224 .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
lypinator 0:bb348c97df44 225 .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
lypinator 0:bb348c97df44 226 .word ETH_IRQHandler /* Ethernet */
lypinator 0:bb348c97df44 227 .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
lypinator 0:bb348c97df44 228 .word CAN2_TX_IRQHandler /* CAN2 TX */
lypinator 0:bb348c97df44 229 .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
lypinator 0:bb348c97df44 230 .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
lypinator 0:bb348c97df44 231 .word CAN2_SCE_IRQHandler /* CAN2 SCE */
lypinator 0:bb348c97df44 232 .word OTG_FS_IRQHandler /* USB OTG FS */
lypinator 0:bb348c97df44 233 .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
lypinator 0:bb348c97df44 234 .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
lypinator 0:bb348c97df44 235 .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
lypinator 0:bb348c97df44 236 .word USART6_IRQHandler /* USART6 */
lypinator 0:bb348c97df44 237 .word I2C3_EV_IRQHandler /* I2C3 event */
lypinator 0:bb348c97df44 238 .word I2C3_ER_IRQHandler /* I2C3 error */
lypinator 0:bb348c97df44 239 .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
lypinator 0:bb348c97df44 240 .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
lypinator 0:bb348c97df44 241 .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
lypinator 0:bb348c97df44 242 .word OTG_HS_IRQHandler /* USB OTG HS */
lypinator 0:bb348c97df44 243 .word DCMI_IRQHandler /* DCMI */
lypinator 0:bb348c97df44 244 .word 0 /* CRYP crypto */
lypinator 0:bb348c97df44 245 .word HASH_RNG_IRQHandler /* Hash and Rng */
lypinator 0:bb348c97df44 246 .word FPU_IRQHandler /* FPU */
lypinator 0:bb348c97df44 247
lypinator 0:bb348c97df44 248
lypinator 0:bb348c97df44 249 /*******************************************************************************
lypinator 0:bb348c97df44 250 *
lypinator 0:bb348c97df44 251 * Provide weak aliases for each Exception handler to the Default_Handler.
lypinator 0:bb348c97df44 252 * As they are weak aliases, any function with the same name will override
lypinator 0:bb348c97df44 253 * this definition.
lypinator 0:bb348c97df44 254 *
lypinator 0:bb348c97df44 255 *******************************************************************************/
lypinator 0:bb348c97df44 256 .weak NMI_Handler
lypinator 0:bb348c97df44 257 .thumb_set NMI_Handler,Default_Handler
lypinator 0:bb348c97df44 258
lypinator 0:bb348c97df44 259 .weak HardFault_Handler
lypinator 0:bb348c97df44 260 .thumb_set HardFault_Handler,Default_Handler
lypinator 0:bb348c97df44 261
lypinator 0:bb348c97df44 262 .weak MemManage_Handler
lypinator 0:bb348c97df44 263 .thumb_set MemManage_Handler,Default_Handler
lypinator 0:bb348c97df44 264
lypinator 0:bb348c97df44 265 .weak BusFault_Handler
lypinator 0:bb348c97df44 266 .thumb_set BusFault_Handler,Default_Handler
lypinator 0:bb348c97df44 267
lypinator 0:bb348c97df44 268 .weak UsageFault_Handler
lypinator 0:bb348c97df44 269 .thumb_set UsageFault_Handler,Default_Handler
lypinator 0:bb348c97df44 270
lypinator 0:bb348c97df44 271 .weak SVC_Handler
lypinator 0:bb348c97df44 272 .thumb_set SVC_Handler,Default_Handler
lypinator 0:bb348c97df44 273
lypinator 0:bb348c97df44 274 .weak DebugMon_Handler
lypinator 0:bb348c97df44 275 .thumb_set DebugMon_Handler,Default_Handler
lypinator 0:bb348c97df44 276
lypinator 0:bb348c97df44 277 .weak PendSV_Handler
lypinator 0:bb348c97df44 278 .thumb_set PendSV_Handler,Default_Handler
lypinator 0:bb348c97df44 279
lypinator 0:bb348c97df44 280 .weak SysTick_Handler
lypinator 0:bb348c97df44 281 .thumb_set SysTick_Handler,Default_Handler
lypinator 0:bb348c97df44 282
lypinator 0:bb348c97df44 283 .weak WWDG_IRQHandler
lypinator 0:bb348c97df44 284 .thumb_set WWDG_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 285
lypinator 0:bb348c97df44 286 .weak PVD_IRQHandler
lypinator 0:bb348c97df44 287 .thumb_set PVD_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 288
lypinator 0:bb348c97df44 289 .weak TAMP_STAMP_IRQHandler
lypinator 0:bb348c97df44 290 .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 291
lypinator 0:bb348c97df44 292 .weak RTC_WKUP_IRQHandler
lypinator 0:bb348c97df44 293 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 294
lypinator 0:bb348c97df44 295 .weak FLASH_IRQHandler
lypinator 0:bb348c97df44 296 .thumb_set FLASH_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 297
lypinator 0:bb348c97df44 298 .weak RCC_IRQHandler
lypinator 0:bb348c97df44 299 .thumb_set RCC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 300
lypinator 0:bb348c97df44 301 .weak EXTI0_IRQHandler
lypinator 0:bb348c97df44 302 .thumb_set EXTI0_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 303
lypinator 0:bb348c97df44 304 .weak EXTI1_IRQHandler
lypinator 0:bb348c97df44 305 .thumb_set EXTI1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 306
lypinator 0:bb348c97df44 307 .weak EXTI2_IRQHandler
lypinator 0:bb348c97df44 308 .thumb_set EXTI2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 309
lypinator 0:bb348c97df44 310 .weak EXTI3_IRQHandler
lypinator 0:bb348c97df44 311 .thumb_set EXTI3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 312
lypinator 0:bb348c97df44 313 .weak EXTI4_IRQHandler
lypinator 0:bb348c97df44 314 .thumb_set EXTI4_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 315
lypinator 0:bb348c97df44 316 .weak DMA1_Stream0_IRQHandler
lypinator 0:bb348c97df44 317 .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 318
lypinator 0:bb348c97df44 319 .weak DMA1_Stream1_IRQHandler
lypinator 0:bb348c97df44 320 .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 321
lypinator 0:bb348c97df44 322 .weak DMA1_Stream2_IRQHandler
lypinator 0:bb348c97df44 323 .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 324
lypinator 0:bb348c97df44 325 .weak DMA1_Stream3_IRQHandler
lypinator 0:bb348c97df44 326 .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 327
lypinator 0:bb348c97df44 328 .weak DMA1_Stream4_IRQHandler
lypinator 0:bb348c97df44 329 .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 330
lypinator 0:bb348c97df44 331 .weak DMA1_Stream5_IRQHandler
lypinator 0:bb348c97df44 332 .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 333
lypinator 0:bb348c97df44 334 .weak DMA1_Stream6_IRQHandler
lypinator 0:bb348c97df44 335 .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 336
lypinator 0:bb348c97df44 337 .weak ADC_IRQHandler
lypinator 0:bb348c97df44 338 .thumb_set ADC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 339
lypinator 0:bb348c97df44 340 .weak CAN1_TX_IRQHandler
lypinator 0:bb348c97df44 341 .thumb_set CAN1_TX_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 342
lypinator 0:bb348c97df44 343 .weak CAN1_RX0_IRQHandler
lypinator 0:bb348c97df44 344 .thumb_set CAN1_RX0_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 345
lypinator 0:bb348c97df44 346 .weak CAN1_RX1_IRQHandler
lypinator 0:bb348c97df44 347 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 348
lypinator 0:bb348c97df44 349 .weak CAN1_SCE_IRQHandler
lypinator 0:bb348c97df44 350 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 351
lypinator 0:bb348c97df44 352 .weak EXTI9_5_IRQHandler
lypinator 0:bb348c97df44 353 .thumb_set EXTI9_5_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 354
lypinator 0:bb348c97df44 355 .weak TIM1_BRK_TIM9_IRQHandler
lypinator 0:bb348c97df44 356 .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 357
lypinator 0:bb348c97df44 358 .weak TIM1_UP_TIM10_IRQHandler
lypinator 0:bb348c97df44 359 .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 360
lypinator 0:bb348c97df44 361 .weak TIM1_TRG_COM_TIM11_IRQHandler
lypinator 0:bb348c97df44 362 .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 363
lypinator 0:bb348c97df44 364 .weak TIM1_CC_IRQHandler
lypinator 0:bb348c97df44 365 .thumb_set TIM1_CC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 366
lypinator 0:bb348c97df44 367 .weak TIM2_IRQHandler
lypinator 0:bb348c97df44 368 .thumb_set TIM2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 369
lypinator 0:bb348c97df44 370 .weak TIM3_IRQHandler
lypinator 0:bb348c97df44 371 .thumb_set TIM3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 372
lypinator 0:bb348c97df44 373 .weak TIM4_IRQHandler
lypinator 0:bb348c97df44 374 .thumb_set TIM4_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 375
lypinator 0:bb348c97df44 376 .weak I2C1_EV_IRQHandler
lypinator 0:bb348c97df44 377 .thumb_set I2C1_EV_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 378
lypinator 0:bb348c97df44 379 .weak I2C1_ER_IRQHandler
lypinator 0:bb348c97df44 380 .thumb_set I2C1_ER_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 381
lypinator 0:bb348c97df44 382 .weak I2C2_EV_IRQHandler
lypinator 0:bb348c97df44 383 .thumb_set I2C2_EV_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 384
lypinator 0:bb348c97df44 385 .weak I2C2_ER_IRQHandler
lypinator 0:bb348c97df44 386 .thumb_set I2C2_ER_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 387
lypinator 0:bb348c97df44 388 .weak SPI1_IRQHandler
lypinator 0:bb348c97df44 389 .thumb_set SPI1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 390
lypinator 0:bb348c97df44 391 .weak SPI2_IRQHandler
lypinator 0:bb348c97df44 392 .thumb_set SPI2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 393
lypinator 0:bb348c97df44 394 .weak USART1_IRQHandler
lypinator 0:bb348c97df44 395 .thumb_set USART1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 396
lypinator 0:bb348c97df44 397 .weak USART2_IRQHandler
lypinator 0:bb348c97df44 398 .thumb_set USART2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 399
lypinator 0:bb348c97df44 400 .weak USART3_IRQHandler
lypinator 0:bb348c97df44 401 .thumb_set USART3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 402
lypinator 0:bb348c97df44 403 .weak EXTI15_10_IRQHandler
lypinator 0:bb348c97df44 404 .thumb_set EXTI15_10_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 405
lypinator 0:bb348c97df44 406 .weak RTC_Alarm_IRQHandler
lypinator 0:bb348c97df44 407 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 408
lypinator 0:bb348c97df44 409 .weak OTG_FS_WKUP_IRQHandler
lypinator 0:bb348c97df44 410 .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 411
lypinator 0:bb348c97df44 412 .weak TIM8_BRK_TIM12_IRQHandler
lypinator 0:bb348c97df44 413 .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 414
lypinator 0:bb348c97df44 415 .weak TIM8_UP_TIM13_IRQHandler
lypinator 0:bb348c97df44 416 .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 417
lypinator 0:bb348c97df44 418 .weak TIM8_TRG_COM_TIM14_IRQHandler
lypinator 0:bb348c97df44 419 .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 420
lypinator 0:bb348c97df44 421 .weak TIM8_CC_IRQHandler
lypinator 0:bb348c97df44 422 .thumb_set TIM8_CC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 423
lypinator 0:bb348c97df44 424 .weak DMA1_Stream7_IRQHandler
lypinator 0:bb348c97df44 425 .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 426
lypinator 0:bb348c97df44 427 .weak FSMC_IRQHandler
lypinator 0:bb348c97df44 428 .thumb_set FSMC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 429
lypinator 0:bb348c97df44 430 .weak SDIO_IRQHandler
lypinator 0:bb348c97df44 431 .thumb_set SDIO_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 432
lypinator 0:bb348c97df44 433 .weak TIM5_IRQHandler
lypinator 0:bb348c97df44 434 .thumb_set TIM5_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 435
lypinator 0:bb348c97df44 436 .weak SPI3_IRQHandler
lypinator 0:bb348c97df44 437 .thumb_set SPI3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 438
lypinator 0:bb348c97df44 439 .weak UART4_IRQHandler
lypinator 0:bb348c97df44 440 .thumb_set UART4_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 441
lypinator 0:bb348c97df44 442 .weak UART5_IRQHandler
lypinator 0:bb348c97df44 443 .thumb_set UART5_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 444
lypinator 0:bb348c97df44 445 .weak TIM6_DAC_IRQHandler
lypinator 0:bb348c97df44 446 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 447
lypinator 0:bb348c97df44 448 .weak TIM7_IRQHandler
lypinator 0:bb348c97df44 449 .thumb_set TIM7_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 450
lypinator 0:bb348c97df44 451 .weak DMA2_Stream0_IRQHandler
lypinator 0:bb348c97df44 452 .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 453
lypinator 0:bb348c97df44 454 .weak DMA2_Stream1_IRQHandler
lypinator 0:bb348c97df44 455 .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 456
lypinator 0:bb348c97df44 457 .weak DMA2_Stream2_IRQHandler
lypinator 0:bb348c97df44 458 .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 459
lypinator 0:bb348c97df44 460 .weak DMA2_Stream3_IRQHandler
lypinator 0:bb348c97df44 461 .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 462
lypinator 0:bb348c97df44 463 .weak DMA2_Stream4_IRQHandler
lypinator 0:bb348c97df44 464 .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 465
lypinator 0:bb348c97df44 466 .weak ETH_IRQHandler
lypinator 0:bb348c97df44 467 .thumb_set ETH_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 468
lypinator 0:bb348c97df44 469 .weak ETH_WKUP_IRQHandler
lypinator 0:bb348c97df44 470 .thumb_set ETH_WKUP_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 471
lypinator 0:bb348c97df44 472 .weak CAN2_TX_IRQHandler
lypinator 0:bb348c97df44 473 .thumb_set CAN2_TX_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 474
lypinator 0:bb348c97df44 475 .weak CAN2_RX0_IRQHandler
lypinator 0:bb348c97df44 476 .thumb_set CAN2_RX0_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 477
lypinator 0:bb348c97df44 478 .weak CAN2_RX1_IRQHandler
lypinator 0:bb348c97df44 479 .thumb_set CAN2_RX1_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 480
lypinator 0:bb348c97df44 481 .weak CAN2_SCE_IRQHandler
lypinator 0:bb348c97df44 482 .thumb_set CAN2_SCE_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 483
lypinator 0:bb348c97df44 484 .weak OTG_FS_IRQHandler
lypinator 0:bb348c97df44 485 .thumb_set OTG_FS_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 486
lypinator 0:bb348c97df44 487 .weak DMA2_Stream5_IRQHandler
lypinator 0:bb348c97df44 488 .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 489
lypinator 0:bb348c97df44 490 .weak DMA2_Stream6_IRQHandler
lypinator 0:bb348c97df44 491 .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 492
lypinator 0:bb348c97df44 493 .weak DMA2_Stream7_IRQHandler
lypinator 0:bb348c97df44 494 .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 495
lypinator 0:bb348c97df44 496 .weak USART6_IRQHandler
lypinator 0:bb348c97df44 497 .thumb_set USART6_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 498
lypinator 0:bb348c97df44 499 .weak I2C3_EV_IRQHandler
lypinator 0:bb348c97df44 500 .thumb_set I2C3_EV_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 501
lypinator 0:bb348c97df44 502 .weak I2C3_ER_IRQHandler
lypinator 0:bb348c97df44 503 .thumb_set I2C3_ER_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 504
lypinator 0:bb348c97df44 505 .weak OTG_HS_EP1_OUT_IRQHandler
lypinator 0:bb348c97df44 506 .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 507
lypinator 0:bb348c97df44 508 .weak OTG_HS_EP1_IN_IRQHandler
lypinator 0:bb348c97df44 509 .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 510
lypinator 0:bb348c97df44 511 .weak OTG_HS_WKUP_IRQHandler
lypinator 0:bb348c97df44 512 .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 513
lypinator 0:bb348c97df44 514 .weak OTG_HS_IRQHandler
lypinator 0:bb348c97df44 515 .thumb_set OTG_HS_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 516
lypinator 0:bb348c97df44 517 .weak DCMI_IRQHandler
lypinator 0:bb348c97df44 518 .thumb_set DCMI_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 519
lypinator 0:bb348c97df44 520 .weak HASH_RNG_IRQHandler
lypinator 0:bb348c97df44 521 .thumb_set HASH_RNG_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 522
lypinator 0:bb348c97df44 523 .weak FPU_IRQHandler
lypinator 0:bb348c97df44 524 .thumb_set FPU_IRQHandler,Default_Handler
lypinator 0:bb348c97df44 525
lypinator 0:bb348c97df44 526 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/