Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 ;******************** (C) COPYRIGHT 2017 STMicroelectronics ********************
lypinator 0:bb348c97df44 2 ;* File Name : startup_stm32f411xe.s
lypinator 0:bb348c97df44 3 ;* Author : MCD Application Team
lypinator 0:bb348c97df44 4 ;* Description : STM32F411xExx devices vector table for MDK-ARM_MICRO toolchain.
lypinator 0:bb348c97df44 5 ;* This module performs:
lypinator 0:bb348c97df44 6 ;* - Set the initial SP
lypinator 0:bb348c97df44 7 ;* - Set the initial PC == Reset_Handler
lypinator 0:bb348c97df44 8 ;* - Set the vector table entries with the exceptions ISR address
lypinator 0:bb348c97df44 9 ;* - Branches to __main in the C library (which eventually
lypinator 0:bb348c97df44 10 ;* calls main()).
lypinator 0:bb348c97df44 11 ;* After Reset the CortexM4 processor is in Thread mode,
lypinator 0:bb348c97df44 12 ;* priority is Privileged, and the Stack is set to Main.
lypinator 0:bb348c97df44 13 ;* <<< Use Configuration Wizard in Context Menu >>>
lypinator 0:bb348c97df44 14 ;*******************************************************************************
lypinator 0:bb348c97df44 15 ;
lypinator 0:bb348c97df44 16 ;* Redistribution and use in source and binary forms, with or without modification,
lypinator 0:bb348c97df44 17 ;* are permitted provided that the following conditions are met:
lypinator 0:bb348c97df44 18 ;* 1. Redistributions of source code must retain the above copyright notice,
lypinator 0:bb348c97df44 19 ;* this list of conditions and the following disclaimer.
lypinator 0:bb348c97df44 20 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
lypinator 0:bb348c97df44 21 ;* this list of conditions and the following disclaimer in the documentation
lypinator 0:bb348c97df44 22 ;* and/or other materials provided with the distribution.
lypinator 0:bb348c97df44 23 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
lypinator 0:bb348c97df44 24 ;* may be used to endorse or promote products derived from this software
lypinator 0:bb348c97df44 25 ;* without specific prior written permission.
lypinator 0:bb348c97df44 26 ;*
lypinator 0:bb348c97df44 27 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
lypinator 0:bb348c97df44 28 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
lypinator 0:bb348c97df44 29 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
lypinator 0:bb348c97df44 30 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
lypinator 0:bb348c97df44 31 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
lypinator 0:bb348c97df44 32 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
lypinator 0:bb348c97df44 33 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
lypinator 0:bb348c97df44 34 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
lypinator 0:bb348c97df44 35 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
lypinator 0:bb348c97df44 36 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
lypinator 0:bb348c97df44 37 ;
lypinator 0:bb348c97df44 38 ;*******************************************************************************
lypinator 0:bb348c97df44 39
lypinator 0:bb348c97df44 40 ; Amount of memory (in bytes) allocated for Stack
lypinator 0:bb348c97df44 41 ; Tailor this value to your application needs
lypinator 0:bb348c97df44 42 ; <h> Stack Configuration
lypinator 0:bb348c97df44 43 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
lypinator 0:bb348c97df44 44 ; </h>
lypinator 0:bb348c97df44 45
lypinator 0:bb348c97df44 46 Stack_Size EQU 0x00000400
lypinator 0:bb348c97df44 47
lypinator 0:bb348c97df44 48 AREA STACK, NOINIT, READWRITE, ALIGN=3
lypinator 0:bb348c97df44 49 EXPORT __initial_sp
lypinator 0:bb348c97df44 50
lypinator 0:bb348c97df44 51 Stack_Mem SPACE Stack_Size
lypinator 0:bb348c97df44 52 __initial_sp EQU 0x20020000 ; Top of RAM
lypinator 0:bb348c97df44 53
lypinator 0:bb348c97df44 54
lypinator 0:bb348c97df44 55 ; <h> Heap Configuration
lypinator 0:bb348c97df44 56 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
lypinator 0:bb348c97df44 57 ; </h>
lypinator 0:bb348c97df44 58
lypinator 0:bb348c97df44 59 Heap_Size EQU 0x00000400
lypinator 0:bb348c97df44 60
lypinator 0:bb348c97df44 61 AREA HEAP, NOINIT, READWRITE, ALIGN=3
lypinator 0:bb348c97df44 62 EXPORT __heap_base
lypinator 0:bb348c97df44 63 EXPORT __heap_limit
lypinator 0:bb348c97df44 64
lypinator 0:bb348c97df44 65 __heap_base
lypinator 0:bb348c97df44 66 Heap_Mem SPACE Heap_Size
lypinator 0:bb348c97df44 67 __heap_limit EQU (__initial_sp - Stack_Size)
lypinator 0:bb348c97df44 68
lypinator 0:bb348c97df44 69 PRESERVE8
lypinator 0:bb348c97df44 70 THUMB
lypinator 0:bb348c97df44 71
lypinator 0:bb348c97df44 72
lypinator 0:bb348c97df44 73 ; Vector Table Mapped to Address 0 at Reset
lypinator 0:bb348c97df44 74 AREA RESET, DATA, READONLY
lypinator 0:bb348c97df44 75 EXPORT __Vectors
lypinator 0:bb348c97df44 76 EXPORT __Vectors_End
lypinator 0:bb348c97df44 77 EXPORT __Vectors_Size
lypinator 0:bb348c97df44 78
lypinator 0:bb348c97df44 79 __Vectors DCD __initial_sp ; Top of Stack
lypinator 0:bb348c97df44 80 DCD Reset_Handler ; Reset Handler
lypinator 0:bb348c97df44 81 DCD NMI_Handler ; NMI Handler
lypinator 0:bb348c97df44 82 DCD HardFault_Handler ; Hard Fault Handler
lypinator 0:bb348c97df44 83 DCD MemManage_Handler ; MPU Fault Handler
lypinator 0:bb348c97df44 84 DCD BusFault_Handler ; Bus Fault Handler
lypinator 0:bb348c97df44 85 DCD UsageFault_Handler ; Usage Fault Handler
lypinator 0:bb348c97df44 86 DCD 0 ; Reserved
lypinator 0:bb348c97df44 87 DCD 0 ; Reserved
lypinator 0:bb348c97df44 88 DCD 0 ; Reserved
lypinator 0:bb348c97df44 89 DCD 0 ; Reserved
lypinator 0:bb348c97df44 90 DCD SVC_Handler ; SVCall Handler
lypinator 0:bb348c97df44 91 DCD DebugMon_Handler ; Debug Monitor Handler
lypinator 0:bb348c97df44 92 DCD 0 ; Reserved
lypinator 0:bb348c97df44 93 DCD PendSV_Handler ; PendSV Handler
lypinator 0:bb348c97df44 94 DCD SysTick_Handler ; SysTick Handler
lypinator 0:bb348c97df44 95
lypinator 0:bb348c97df44 96 ; External Interrupts
lypinator 0:bb348c97df44 97 DCD WWDG_IRQHandler ; Window WatchDog
lypinator 0:bb348c97df44 98 DCD PVD_IRQHandler ; PVD through EXTI Line detection
lypinator 0:bb348c97df44 99 DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
lypinator 0:bb348c97df44 100 DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
lypinator 0:bb348c97df44 101 DCD FLASH_IRQHandler ; FLASH
lypinator 0:bb348c97df44 102 DCD RCC_IRQHandler ; RCC
lypinator 0:bb348c97df44 103 DCD EXTI0_IRQHandler ; EXTI Line0
lypinator 0:bb348c97df44 104 DCD EXTI1_IRQHandler ; EXTI Line1
lypinator 0:bb348c97df44 105 DCD EXTI2_IRQHandler ; EXTI Line2
lypinator 0:bb348c97df44 106 DCD EXTI3_IRQHandler ; EXTI Line3
lypinator 0:bb348c97df44 107 DCD EXTI4_IRQHandler ; EXTI Line4
lypinator 0:bb348c97df44 108 DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
lypinator 0:bb348c97df44 109 DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
lypinator 0:bb348c97df44 110 DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
lypinator 0:bb348c97df44 111 DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
lypinator 0:bb348c97df44 112 DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
lypinator 0:bb348c97df44 113 DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
lypinator 0:bb348c97df44 114 DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
lypinator 0:bb348c97df44 115 DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
lypinator 0:bb348c97df44 116 DCD 0 ; Reserved
lypinator 0:bb348c97df44 117 DCD 0 ; Reserved
lypinator 0:bb348c97df44 118 DCD 0 ; Reserved
lypinator 0:bb348c97df44 119 DCD 0 ; Reserved
lypinator 0:bb348c97df44 120 DCD EXTI9_5_IRQHandler ; External Line[9:5]s
lypinator 0:bb348c97df44 121 DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
lypinator 0:bb348c97df44 122 DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
lypinator 0:bb348c97df44 123 DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
lypinator 0:bb348c97df44 124 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
lypinator 0:bb348c97df44 125 DCD TIM2_IRQHandler ; TIM2
lypinator 0:bb348c97df44 126 DCD TIM3_IRQHandler ; TIM3
lypinator 0:bb348c97df44 127 DCD TIM4_IRQHandler ; TIM4
lypinator 0:bb348c97df44 128 DCD I2C1_EV_IRQHandler ; I2C1 Event
lypinator 0:bb348c97df44 129 DCD I2C1_ER_IRQHandler ; I2C1 Error
lypinator 0:bb348c97df44 130 DCD I2C2_EV_IRQHandler ; I2C2 Event
lypinator 0:bb348c97df44 131 DCD I2C2_ER_IRQHandler ; I2C2 Error
lypinator 0:bb348c97df44 132 DCD SPI1_IRQHandler ; SPI1
lypinator 0:bb348c97df44 133 DCD SPI2_IRQHandler ; SPI2
lypinator 0:bb348c97df44 134 DCD USART1_IRQHandler ; USART1
lypinator 0:bb348c97df44 135 DCD USART2_IRQHandler ; USART2
lypinator 0:bb348c97df44 136 DCD 0 ; Reserved
lypinator 0:bb348c97df44 137 DCD EXTI15_10_IRQHandler ; External Line[15:10]s
lypinator 0:bb348c97df44 138 DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
lypinator 0:bb348c97df44 139 DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
lypinator 0:bb348c97df44 140 DCD 0 ; Reserved
lypinator 0:bb348c97df44 141 DCD 0 ; Reserved
lypinator 0:bb348c97df44 142 DCD 0 ; Reserved
lypinator 0:bb348c97df44 143 DCD 0 ; Reserved
lypinator 0:bb348c97df44 144 DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
lypinator 0:bb348c97df44 145 DCD 0 ; Reserved
lypinator 0:bb348c97df44 146 DCD SDIO_IRQHandler ; SDIO
lypinator 0:bb348c97df44 147 DCD TIM5_IRQHandler ; TIM5
lypinator 0:bb348c97df44 148 DCD SPI3_IRQHandler ; SPI3
lypinator 0:bb348c97df44 149 DCD 0 ; Reserved
lypinator 0:bb348c97df44 150 DCD 0 ; Reserved
lypinator 0:bb348c97df44 151 DCD 0 ; Reserved
lypinator 0:bb348c97df44 152 DCD 0 ; Reserved
lypinator 0:bb348c97df44 153 DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
lypinator 0:bb348c97df44 154 DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
lypinator 0:bb348c97df44 155 DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
lypinator 0:bb348c97df44 156 DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
lypinator 0:bb348c97df44 157 DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
lypinator 0:bb348c97df44 158 DCD 0 ; Reserved
lypinator 0:bb348c97df44 159 DCD 0 ; Reserved
lypinator 0:bb348c97df44 160 DCD 0 ; Reserved
lypinator 0:bb348c97df44 161 DCD 0 ; Reserved
lypinator 0:bb348c97df44 162 DCD 0 ; Reserved
lypinator 0:bb348c97df44 163 DCD 0 ; Reserved
lypinator 0:bb348c97df44 164 DCD OTG_FS_IRQHandler ; USB OTG FS
lypinator 0:bb348c97df44 165 DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
lypinator 0:bb348c97df44 166 DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
lypinator 0:bb348c97df44 167 DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
lypinator 0:bb348c97df44 168 DCD USART6_IRQHandler ; USART6
lypinator 0:bb348c97df44 169 DCD I2C3_EV_IRQHandler ; I2C3 event
lypinator 0:bb348c97df44 170 DCD I2C3_ER_IRQHandler ; I2C3 error
lypinator 0:bb348c97df44 171 DCD 0 ; Reserved
lypinator 0:bb348c97df44 172 DCD 0 ; Reserved
lypinator 0:bb348c97df44 173 DCD 0 ; Reserved
lypinator 0:bb348c97df44 174 DCD 0 ; Reserved
lypinator 0:bb348c97df44 175 DCD 0 ; Reserved
lypinator 0:bb348c97df44 176 DCD 0 ; Reserved
lypinator 0:bb348c97df44 177 DCD 0 ; Reserved
lypinator 0:bb348c97df44 178 DCD FPU_IRQHandler ; FPU
lypinator 0:bb348c97df44 179 DCD 0 ; Reserved
lypinator 0:bb348c97df44 180 DCD 0 ; Reserved
lypinator 0:bb348c97df44 181 DCD SPI4_IRQHandler ; SPI4
lypinator 0:bb348c97df44 182 DCD SPI5_IRQHandler ; SPI5
lypinator 0:bb348c97df44 183
lypinator 0:bb348c97df44 184 __Vectors_End
lypinator 0:bb348c97df44 185
lypinator 0:bb348c97df44 186 __Vectors_Size EQU __Vectors_End - __Vectors
lypinator 0:bb348c97df44 187
lypinator 0:bb348c97df44 188 AREA |.text|, CODE, READONLY
lypinator 0:bb348c97df44 189
lypinator 0:bb348c97df44 190 ; Reset handler
lypinator 0:bb348c97df44 191 Reset_Handler PROC
lypinator 0:bb348c97df44 192 EXPORT Reset_Handler [WEAK]
lypinator 0:bb348c97df44 193 IMPORT SystemInit
lypinator 0:bb348c97df44 194 IMPORT __main
lypinator 0:bb348c97df44 195
lypinator 0:bb348c97df44 196 LDR R0, =SystemInit
lypinator 0:bb348c97df44 197 BLX R0
lypinator 0:bb348c97df44 198 LDR R0, =__main
lypinator 0:bb348c97df44 199 BX R0
lypinator 0:bb348c97df44 200 ENDP
lypinator 0:bb348c97df44 201
lypinator 0:bb348c97df44 202 ; Dummy Exception Handlers (infinite loops which can be modified)
lypinator 0:bb348c97df44 203
lypinator 0:bb348c97df44 204 NMI_Handler PROC
lypinator 0:bb348c97df44 205 EXPORT NMI_Handler [WEAK]
lypinator 0:bb348c97df44 206 B .
lypinator 0:bb348c97df44 207 ENDP
lypinator 0:bb348c97df44 208 HardFault_Handler\
lypinator 0:bb348c97df44 209 PROC
lypinator 0:bb348c97df44 210 EXPORT HardFault_Handler [WEAK]
lypinator 0:bb348c97df44 211 B .
lypinator 0:bb348c97df44 212 ENDP
lypinator 0:bb348c97df44 213 MemManage_Handler\
lypinator 0:bb348c97df44 214 PROC
lypinator 0:bb348c97df44 215 EXPORT MemManage_Handler [WEAK]
lypinator 0:bb348c97df44 216 B .
lypinator 0:bb348c97df44 217 ENDP
lypinator 0:bb348c97df44 218 BusFault_Handler\
lypinator 0:bb348c97df44 219 PROC
lypinator 0:bb348c97df44 220 EXPORT BusFault_Handler [WEAK]
lypinator 0:bb348c97df44 221 B .
lypinator 0:bb348c97df44 222 ENDP
lypinator 0:bb348c97df44 223 UsageFault_Handler\
lypinator 0:bb348c97df44 224 PROC
lypinator 0:bb348c97df44 225 EXPORT UsageFault_Handler [WEAK]
lypinator 0:bb348c97df44 226 B .
lypinator 0:bb348c97df44 227 ENDP
lypinator 0:bb348c97df44 228 SVC_Handler PROC
lypinator 0:bb348c97df44 229 EXPORT SVC_Handler [WEAK]
lypinator 0:bb348c97df44 230 B .
lypinator 0:bb348c97df44 231 ENDP
lypinator 0:bb348c97df44 232 DebugMon_Handler\
lypinator 0:bb348c97df44 233 PROC
lypinator 0:bb348c97df44 234 EXPORT DebugMon_Handler [WEAK]
lypinator 0:bb348c97df44 235 B .
lypinator 0:bb348c97df44 236 ENDP
lypinator 0:bb348c97df44 237 PendSV_Handler PROC
lypinator 0:bb348c97df44 238 EXPORT PendSV_Handler [WEAK]
lypinator 0:bb348c97df44 239 B .
lypinator 0:bb348c97df44 240 ENDP
lypinator 0:bb348c97df44 241 SysTick_Handler PROC
lypinator 0:bb348c97df44 242 EXPORT SysTick_Handler [WEAK]
lypinator 0:bb348c97df44 243 B .
lypinator 0:bb348c97df44 244 ENDP
lypinator 0:bb348c97df44 245
lypinator 0:bb348c97df44 246 Default_Handler PROC
lypinator 0:bb348c97df44 247
lypinator 0:bb348c97df44 248 EXPORT WWDG_IRQHandler [WEAK]
lypinator 0:bb348c97df44 249 EXPORT PVD_IRQHandler [WEAK]
lypinator 0:bb348c97df44 250 EXPORT TAMP_STAMP_IRQHandler [WEAK]
lypinator 0:bb348c97df44 251 EXPORT RTC_WKUP_IRQHandler [WEAK]
lypinator 0:bb348c97df44 252 EXPORT FLASH_IRQHandler [WEAK]
lypinator 0:bb348c97df44 253 EXPORT RCC_IRQHandler [WEAK]
lypinator 0:bb348c97df44 254 EXPORT EXTI0_IRQHandler [WEAK]
lypinator 0:bb348c97df44 255 EXPORT EXTI1_IRQHandler [WEAK]
lypinator 0:bb348c97df44 256 EXPORT EXTI2_IRQHandler [WEAK]
lypinator 0:bb348c97df44 257 EXPORT EXTI3_IRQHandler [WEAK]
lypinator 0:bb348c97df44 258 EXPORT EXTI4_IRQHandler [WEAK]
lypinator 0:bb348c97df44 259 EXPORT DMA1_Stream0_IRQHandler [WEAK]
lypinator 0:bb348c97df44 260 EXPORT DMA1_Stream1_IRQHandler [WEAK]
lypinator 0:bb348c97df44 261 EXPORT DMA1_Stream2_IRQHandler [WEAK]
lypinator 0:bb348c97df44 262 EXPORT DMA1_Stream3_IRQHandler [WEAK]
lypinator 0:bb348c97df44 263 EXPORT DMA1_Stream4_IRQHandler [WEAK]
lypinator 0:bb348c97df44 264 EXPORT DMA1_Stream5_IRQHandler [WEAK]
lypinator 0:bb348c97df44 265 EXPORT DMA1_Stream6_IRQHandler [WEAK]
lypinator 0:bb348c97df44 266 EXPORT ADC_IRQHandler [WEAK]
lypinator 0:bb348c97df44 267 EXPORT EXTI9_5_IRQHandler [WEAK]
lypinator 0:bb348c97df44 268 EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
lypinator 0:bb348c97df44 269 EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
lypinator 0:bb348c97df44 270 EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
lypinator 0:bb348c97df44 271 EXPORT TIM1_CC_IRQHandler [WEAK]
lypinator 0:bb348c97df44 272 EXPORT TIM2_IRQHandler [WEAK]
lypinator 0:bb348c97df44 273 EXPORT TIM3_IRQHandler [WEAK]
lypinator 0:bb348c97df44 274 EXPORT TIM4_IRQHandler [WEAK]
lypinator 0:bb348c97df44 275 EXPORT I2C1_EV_IRQHandler [WEAK]
lypinator 0:bb348c97df44 276 EXPORT I2C1_ER_IRQHandler [WEAK]
lypinator 0:bb348c97df44 277 EXPORT I2C2_EV_IRQHandler [WEAK]
lypinator 0:bb348c97df44 278 EXPORT I2C2_ER_IRQHandler [WEAK]
lypinator 0:bb348c97df44 279 EXPORT SPI1_IRQHandler [WEAK]
lypinator 0:bb348c97df44 280 EXPORT SPI2_IRQHandler [WEAK]
lypinator 0:bb348c97df44 281 EXPORT USART1_IRQHandler [WEAK]
lypinator 0:bb348c97df44 282 EXPORT USART2_IRQHandler [WEAK]
lypinator 0:bb348c97df44 283 EXPORT EXTI15_10_IRQHandler [WEAK]
lypinator 0:bb348c97df44 284 EXPORT RTC_Alarm_IRQHandler [WEAK]
lypinator 0:bb348c97df44 285 EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
lypinator 0:bb348c97df44 286 EXPORT DMA1_Stream7_IRQHandler [WEAK]
lypinator 0:bb348c97df44 287 EXPORT SDIO_IRQHandler [WEAK]
lypinator 0:bb348c97df44 288 EXPORT TIM5_IRQHandler [WEAK]
lypinator 0:bb348c97df44 289 EXPORT SPI3_IRQHandler [WEAK]
lypinator 0:bb348c97df44 290 EXPORT DMA2_Stream0_IRQHandler [WEAK]
lypinator 0:bb348c97df44 291 EXPORT DMA2_Stream1_IRQHandler [WEAK]
lypinator 0:bb348c97df44 292 EXPORT DMA2_Stream2_IRQHandler [WEAK]
lypinator 0:bb348c97df44 293 EXPORT DMA2_Stream3_IRQHandler [WEAK]
lypinator 0:bb348c97df44 294 EXPORT DMA2_Stream4_IRQHandler [WEAK]
lypinator 0:bb348c97df44 295 EXPORT OTG_FS_IRQHandler [WEAK]
lypinator 0:bb348c97df44 296 EXPORT DMA2_Stream5_IRQHandler [WEAK]
lypinator 0:bb348c97df44 297 EXPORT DMA2_Stream6_IRQHandler [WEAK]
lypinator 0:bb348c97df44 298 EXPORT DMA2_Stream7_IRQHandler [WEAK]
lypinator 0:bb348c97df44 299 EXPORT USART6_IRQHandler [WEAK]
lypinator 0:bb348c97df44 300 EXPORT I2C3_EV_IRQHandler [WEAK]
lypinator 0:bb348c97df44 301 EXPORT I2C3_ER_IRQHandler [WEAK]
lypinator 0:bb348c97df44 302 EXPORT FPU_IRQHandler [WEAK]
lypinator 0:bb348c97df44 303 EXPORT SPI4_IRQHandler [WEAK]
lypinator 0:bb348c97df44 304 EXPORT SPI5_IRQHandler [WEAK]
lypinator 0:bb348c97df44 305
lypinator 0:bb348c97df44 306 WWDG_IRQHandler
lypinator 0:bb348c97df44 307 PVD_IRQHandler
lypinator 0:bb348c97df44 308 TAMP_STAMP_IRQHandler
lypinator 0:bb348c97df44 309 RTC_WKUP_IRQHandler
lypinator 0:bb348c97df44 310 FLASH_IRQHandler
lypinator 0:bb348c97df44 311 RCC_IRQHandler
lypinator 0:bb348c97df44 312 EXTI0_IRQHandler
lypinator 0:bb348c97df44 313 EXTI1_IRQHandler
lypinator 0:bb348c97df44 314 EXTI2_IRQHandler
lypinator 0:bb348c97df44 315 EXTI3_IRQHandler
lypinator 0:bb348c97df44 316 EXTI4_IRQHandler
lypinator 0:bb348c97df44 317 DMA1_Stream0_IRQHandler
lypinator 0:bb348c97df44 318 DMA1_Stream1_IRQHandler
lypinator 0:bb348c97df44 319 DMA1_Stream2_IRQHandler
lypinator 0:bb348c97df44 320 DMA1_Stream3_IRQHandler
lypinator 0:bb348c97df44 321 DMA1_Stream4_IRQHandler
lypinator 0:bb348c97df44 322 DMA1_Stream5_IRQHandler
lypinator 0:bb348c97df44 323 DMA1_Stream6_IRQHandler
lypinator 0:bb348c97df44 324 ADC_IRQHandler
lypinator 0:bb348c97df44 325 EXTI9_5_IRQHandler
lypinator 0:bb348c97df44 326 TIM1_BRK_TIM9_IRQHandler
lypinator 0:bb348c97df44 327 TIM1_UP_TIM10_IRQHandler
lypinator 0:bb348c97df44 328 TIM1_TRG_COM_TIM11_IRQHandler
lypinator 0:bb348c97df44 329 TIM1_CC_IRQHandler
lypinator 0:bb348c97df44 330 TIM2_IRQHandler
lypinator 0:bb348c97df44 331 TIM3_IRQHandler
lypinator 0:bb348c97df44 332 TIM4_IRQHandler
lypinator 0:bb348c97df44 333 I2C1_EV_IRQHandler
lypinator 0:bb348c97df44 334 I2C1_ER_IRQHandler
lypinator 0:bb348c97df44 335 I2C2_EV_IRQHandler
lypinator 0:bb348c97df44 336 I2C2_ER_IRQHandler
lypinator 0:bb348c97df44 337 SPI1_IRQHandler
lypinator 0:bb348c97df44 338 SPI2_IRQHandler
lypinator 0:bb348c97df44 339 USART1_IRQHandler
lypinator 0:bb348c97df44 340 USART2_IRQHandler
lypinator 0:bb348c97df44 341 EXTI15_10_IRQHandler
lypinator 0:bb348c97df44 342 RTC_Alarm_IRQHandler
lypinator 0:bb348c97df44 343 OTG_FS_WKUP_IRQHandler
lypinator 0:bb348c97df44 344 DMA1_Stream7_IRQHandler
lypinator 0:bb348c97df44 345 SDIO_IRQHandler
lypinator 0:bb348c97df44 346 TIM5_IRQHandler
lypinator 0:bb348c97df44 347 SPI3_IRQHandler
lypinator 0:bb348c97df44 348 DMA2_Stream0_IRQHandler
lypinator 0:bb348c97df44 349 DMA2_Stream1_IRQHandler
lypinator 0:bb348c97df44 350 DMA2_Stream2_IRQHandler
lypinator 0:bb348c97df44 351 DMA2_Stream3_IRQHandler
lypinator 0:bb348c97df44 352 DMA2_Stream4_IRQHandler
lypinator 0:bb348c97df44 353 OTG_FS_IRQHandler
lypinator 0:bb348c97df44 354 DMA2_Stream5_IRQHandler
lypinator 0:bb348c97df44 355 DMA2_Stream6_IRQHandler
lypinator 0:bb348c97df44 356 DMA2_Stream7_IRQHandler
lypinator 0:bb348c97df44 357 USART6_IRQHandler
lypinator 0:bb348c97df44 358 I2C3_EV_IRQHandler
lypinator 0:bb348c97df44 359 I2C3_ER_IRQHandler
lypinator 0:bb348c97df44 360 FPU_IRQHandler
lypinator 0:bb348c97df44 361 SPI4_IRQHandler
lypinator 0:bb348c97df44 362 SPI5_IRQHandler
lypinator 0:bb348c97df44 363
lypinator 0:bb348c97df44 364 B .
lypinator 0:bb348c97df44 365
lypinator 0:bb348c97df44 366 ENDP
lypinator 0:bb348c97df44 367
lypinator 0:bb348c97df44 368 ALIGN
lypinator 0:bb348c97df44 369 END
lypinator 0:bb348c97df44 370
lypinator 0:bb348c97df44 371 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****