Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/platform/mbed_application.c@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /* mbed Microcontroller Library
lypinator 0:bb348c97df44 2 * Copyright (c) 2017-2017 ARM Limited
lypinator 0:bb348c97df44 3 *
lypinator 0:bb348c97df44 4 * Licensed under the Apache License, Version 2.0 (the "License");
lypinator 0:bb348c97df44 5 * you may not use this file except in compliance with the License.
lypinator 0:bb348c97df44 6 * You may obtain a copy of the License at
lypinator 0:bb348c97df44 7 *
lypinator 0:bb348c97df44 8 * http://www.apache.org/licenses/LICENSE-2.0
lypinator 0:bb348c97df44 9 *
lypinator 0:bb348c97df44 10 * Unless required by applicable law or agreed to in writing, software
lypinator 0:bb348c97df44 11 * distributed under the License is distributed on an "AS IS" BASIS,
lypinator 0:bb348c97df44 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
lypinator 0:bb348c97df44 13 * See the License for the specific language governing permissions and
lypinator 0:bb348c97df44 14 * limitations under the License.
lypinator 0:bb348c97df44 15 */
lypinator 0:bb348c97df44 16
lypinator 0:bb348c97df44 17 #include <stdlib.h>
lypinator 0:bb348c97df44 18 #include <stdarg.h>
lypinator 0:bb348c97df44 19 #include "device.h"
lypinator 0:bb348c97df44 20 #include "platform/mbed_application.h"
lypinator 0:bb348c97df44 21
lypinator 0:bb348c97df44 22 #if MBED_APPLICATION_SUPPORT
lypinator 0:bb348c97df44 23
lypinator 0:bb348c97df44 24 #if defined(__CORTEX_A9)
lypinator 0:bb348c97df44 25
lypinator 0:bb348c97df44 26 static void powerdown_gic(void);
lypinator 0:bb348c97df44 27
lypinator 0:bb348c97df44 28 void mbed_start_application(uintptr_t address)
lypinator 0:bb348c97df44 29 {
lypinator 0:bb348c97df44 30 __disable_irq();
lypinator 0:bb348c97df44 31 powerdown_gic();
lypinator 0:bb348c97df44 32 __enable_irq();
lypinator 0:bb348c97df44 33 ((void(*)())address)();
lypinator 0:bb348c97df44 34 }
lypinator 0:bb348c97df44 35
lypinator 0:bb348c97df44 36 static void powerdown_gic()
lypinator 0:bb348c97df44 37 {
lypinator 0:bb348c97df44 38 int i;
lypinator 0:bb348c97df44 39 int j;
lypinator 0:bb348c97df44 40
lypinator 0:bb348c97df44 41 for (i = 0; i < 32; i++) {
lypinator 0:bb348c97df44 42 GICDistributor->ICENABLER[i] = 0xFFFFFFFF;
lypinator 0:bb348c97df44 43 GICDistributor->ICPENDR[i] = 0xFFFFFFFF;
lypinator 0:bb348c97df44 44 if (i < 4) {
lypinator 0:bb348c97df44 45 GICDistributor->CPENDSGIR[i] = 0xFFFFFFFF;
lypinator 0:bb348c97df44 46 }
lypinator 0:bb348c97df44 47 for (j = 0; j < 8; j++) {
lypinator 0:bb348c97df44 48 GICDistributor->IPRIORITYR[i*8+j] = 0x00000000;
lypinator 0:bb348c97df44 49 }
lypinator 0:bb348c97df44 50 }
lypinator 0:bb348c97df44 51 }
lypinator 0:bb348c97df44 52
lypinator 0:bb348c97df44 53 #else
lypinator 0:bb348c97df44 54
lypinator 0:bb348c97df44 55 static void powerdown_nvic(void);
lypinator 0:bb348c97df44 56 static void powerdown_scb(uint32_t vtor);
lypinator 0:bb348c97df44 57 static void start_new_application(void *sp, void *pc);
lypinator 0:bb348c97df44 58
lypinator 0:bb348c97df44 59 void mbed_start_application(uintptr_t address)
lypinator 0:bb348c97df44 60 {
lypinator 0:bb348c97df44 61 void *sp;
lypinator 0:bb348c97df44 62 void *pc;
lypinator 0:bb348c97df44 63
lypinator 0:bb348c97df44 64 // Interrupts are re-enabled in start_new_application
lypinator 0:bb348c97df44 65 __disable_irq();
lypinator 0:bb348c97df44 66
lypinator 0:bb348c97df44 67 SysTick->CTRL = 0x00000000;
lypinator 0:bb348c97df44 68 powerdown_nvic();
lypinator 0:bb348c97df44 69 powerdown_scb(address);
lypinator 0:bb348c97df44 70
lypinator 0:bb348c97df44 71 sp = *((void **)address + 0);
lypinator 0:bb348c97df44 72 pc = *((void **)address + 1);
lypinator 0:bb348c97df44 73 start_new_application(sp, pc);
lypinator 0:bb348c97df44 74 }
lypinator 0:bb348c97df44 75
lypinator 0:bb348c97df44 76 static void powerdown_nvic()
lypinator 0:bb348c97df44 77 {
lypinator 0:bb348c97df44 78 int isr_groups_32;
lypinator 0:bb348c97df44 79 int i;
lypinator 0:bb348c97df44 80 int j;
lypinator 0:bb348c97df44 81
lypinator 0:bb348c97df44 82 #if defined(__CORTEX_M23)
lypinator 0:bb348c97df44 83 // M23 doesn't support ICTR and supports up to 240 external interrupts.
lypinator 0:bb348c97df44 84 isr_groups_32 = 8;
lypinator 0:bb348c97df44 85 #else
lypinator 0:bb348c97df44 86 isr_groups_32 = ((SCnSCB->ICTR & SCnSCB_ICTR_INTLINESNUM_Msk) >> SCnSCB_ICTR_INTLINESNUM_Pos) + 1;
lypinator 0:bb348c97df44 87 #endif
lypinator 0:bb348c97df44 88 for (i = 0; i < isr_groups_32; i++) {
lypinator 0:bb348c97df44 89 NVIC->ICER[i] = 0xFFFFFFFF;
lypinator 0:bb348c97df44 90 NVIC->ICPR[i] = 0xFFFFFFFF;
lypinator 0:bb348c97df44 91 for (j = 0; j < 8; j++) {
lypinator 0:bb348c97df44 92 #if defined(__CORTEX_M23)
lypinator 0:bb348c97df44 93 NVIC->IPR[i * 8 + j] = 0x00000000;
lypinator 0:bb348c97df44 94 #else
lypinator 0:bb348c97df44 95 NVIC->IP[i * 8 + j] = 0x00000000;
lypinator 0:bb348c97df44 96 #endif
lypinator 0:bb348c97df44 97 }
lypinator 0:bb348c97df44 98 }
lypinator 0:bb348c97df44 99 }
lypinator 0:bb348c97df44 100
lypinator 0:bb348c97df44 101 static void powerdown_scb(uint32_t vtor)
lypinator 0:bb348c97df44 102 {
lypinator 0:bb348c97df44 103 int i;
lypinator 0:bb348c97df44 104
lypinator 0:bb348c97df44 105 // SCB->CPUID - Read only CPU ID register
lypinator 0:bb348c97df44 106 SCB->ICSR = SCB_ICSR_PENDSVCLR_Msk | SCB_ICSR_PENDSTCLR_Msk;
lypinator 0:bb348c97df44 107 SCB->VTOR = vtor;
lypinator 0:bb348c97df44 108 SCB->AIRCR = 0x05FA | 0x0000;
lypinator 0:bb348c97df44 109 SCB->SCR = 0x00000000;
lypinator 0:bb348c97df44 110 // SCB->CCR - Implementation defined value
lypinator 0:bb348c97df44 111 #if defined(__CORTEX_M23)
lypinator 0:bb348c97df44 112 for (i = 0; i < 2; i++) {
lypinator 0:bb348c97df44 113 SCB->SHPR[i] = 0x00;
lypinator 0:bb348c97df44 114 }
lypinator 0:bb348c97df44 115 #else
lypinator 0:bb348c97df44 116 for (i = 0; i < 12; i++) {
lypinator 0:bb348c97df44 117 #if defined(__CORTEX_M7)
lypinator 0:bb348c97df44 118 SCB->SHPR[i] = 0x00;
lypinator 0:bb348c97df44 119 #else
lypinator 0:bb348c97df44 120 SCB->SHP[i] = 0x00;
lypinator 0:bb348c97df44 121 #endif
lypinator 0:bb348c97df44 122 }
lypinator 0:bb348c97df44 123 #endif
lypinator 0:bb348c97df44 124 SCB->SHCSR = 0x00000000;
lypinator 0:bb348c97df44 125 #if defined(__CORTEX_M23)
lypinator 0:bb348c97df44 126 #else
lypinator 0:bb348c97df44 127 SCB->CFSR = 0xFFFFFFFF;
lypinator 0:bb348c97df44 128 SCB->HFSR = SCB_HFSR_DEBUGEVT_Msk | SCB_HFSR_FORCED_Msk | SCB_HFSR_VECTTBL_Msk;
lypinator 0:bb348c97df44 129 SCB->DFSR = SCB_DFSR_EXTERNAL_Msk | SCB_DFSR_VCATCH_Msk |
lypinator 0:bb348c97df44 130 SCB_DFSR_DWTTRAP_Msk | SCB_DFSR_BKPT_Msk | SCB_DFSR_HALTED_Msk;
lypinator 0:bb348c97df44 131 #endif
lypinator 0:bb348c97df44 132 // SCB->MMFAR - Implementation defined value
lypinator 0:bb348c97df44 133 // SCB->BFAR - Implementation defined value
lypinator 0:bb348c97df44 134 // SCB->AFSR - Implementation defined value
lypinator 0:bb348c97df44 135 // SCB->PFR - Read only processor feature register
lypinator 0:bb348c97df44 136 // SCB->DFR - Read only debug feature registers
lypinator 0:bb348c97df44 137 // SCB->ADR - Read only auxiliary feature registers
lypinator 0:bb348c97df44 138 // SCB->MMFR - Read only memory model feature registers
lypinator 0:bb348c97df44 139 // SCB->ISAR - Read only instruction set attribute registers
lypinator 0:bb348c97df44 140 // SCB->CPACR - Implementation defined value
lypinator 0:bb348c97df44 141 }
lypinator 0:bb348c97df44 142
lypinator 0:bb348c97df44 143 #if defined (__CC_ARM)
lypinator 0:bb348c97df44 144
lypinator 0:bb348c97df44 145 __asm static void start_new_application(void *sp, void *pc)
lypinator 0:bb348c97df44 146 {
lypinator 0:bb348c97df44 147 MOV R2, #0
lypinator 0:bb348c97df44 148 MSR CONTROL, R2 // Switch to main stack
lypinator 0:bb348c97df44 149 MOV SP, R0
lypinator 0:bb348c97df44 150 MSR PRIMASK, R2 // Enable interrupts
lypinator 0:bb348c97df44 151 BX R1
lypinator 0:bb348c97df44 152 }
lypinator 0:bb348c97df44 153
lypinator 0:bb348c97df44 154 #elif defined (__GNUC__) || defined (__ICCARM__)
lypinator 0:bb348c97df44 155
lypinator 0:bb348c97df44 156 void start_new_application(void *sp, void *pc)
lypinator 0:bb348c97df44 157 {
lypinator 0:bb348c97df44 158 __asm volatile(
lypinator 0:bb348c97df44 159 "movw r2, #0 \n" // Fail to compile "mov r2, #0" with ARMC6. Replace with MOVW.
lypinator 0:bb348c97df44 160 // We needn't "movt r2, #0" immediately following because MOVW
lypinator 0:bb348c97df44 161 // will zero-extend the 16-bit immediate.
lypinator 0:bb348c97df44 162 "msr control, r2 \n" // Switch to main stack
lypinator 0:bb348c97df44 163 "mov sp, %0 \n"
lypinator 0:bb348c97df44 164 "msr primask, r2 \n" // Enable interrupts
lypinator 0:bb348c97df44 165 "bx %1 \n"
lypinator 0:bb348c97df44 166 :
lypinator 0:bb348c97df44 167 : "l"(sp), "l"(pc)
lypinator 0:bb348c97df44 168 : "r2", "cc", "memory"
lypinator 0:bb348c97df44 169 );
lypinator 0:bb348c97df44 170 }
lypinator 0:bb348c97df44 171
lypinator 0:bb348c97df44 172 #else
lypinator 0:bb348c97df44 173
lypinator 0:bb348c97df44 174 #error "Unsupported toolchain"
lypinator 0:bb348c97df44 175
lypinator 0:bb348c97df44 176 #endif
lypinator 0:bb348c97df44 177
lypinator 0:bb348c97df44 178 #endif
lypinator 0:bb348c97df44 179
lypinator 0:bb348c97df44 180 #endif /* MBED_APPLICATION_SUPPORT */