Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/cmsis/TARGET_CORTEX_M/cmsis_iccarm.h@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**************************************************************************//**
lypinator 0:bb348c97df44 2 * @file cmsis_iccarm.h
lypinator 0:bb348c97df44 3 * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file
lypinator 0:bb348c97df44 4 * @version V5.0.5
lypinator 0:bb348c97df44 5 * @date 10. January 2018
lypinator 0:bb348c97df44 6 ******************************************************************************/
lypinator 0:bb348c97df44 7
lypinator 0:bb348c97df44 8 //------------------------------------------------------------------------------
lypinator 0:bb348c97df44 9 //
lypinator 0:bb348c97df44 10 // Copyright (c) 2017-2018 IAR Systems
lypinator 0:bb348c97df44 11 //
lypinator 0:bb348c97df44 12 // Licensed under the Apache License, Version 2.0 (the "License")
lypinator 0:bb348c97df44 13 // you may not use this file except in compliance with the License.
lypinator 0:bb348c97df44 14 // You may obtain a copy of the License at
lypinator 0:bb348c97df44 15 // http://www.apache.org/licenses/LICENSE-2.0
lypinator 0:bb348c97df44 16 //
lypinator 0:bb348c97df44 17 // Unless required by applicable law or agreed to in writing, software
lypinator 0:bb348c97df44 18 // distributed under the License is distributed on an "AS IS" BASIS,
lypinator 0:bb348c97df44 19 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
lypinator 0:bb348c97df44 20 // See the License for the specific language governing permissions and
lypinator 0:bb348c97df44 21 // limitations under the License.
lypinator 0:bb348c97df44 22 //
lypinator 0:bb348c97df44 23 //------------------------------------------------------------------------------
lypinator 0:bb348c97df44 24
lypinator 0:bb348c97df44 25
lypinator 0:bb348c97df44 26 #ifndef __CMSIS_ICCARM_H__
lypinator 0:bb348c97df44 27 #define __CMSIS_ICCARM_H__
lypinator 0:bb348c97df44 28
lypinator 0:bb348c97df44 29 #ifndef __ICCARM__
lypinator 0:bb348c97df44 30 #error This file should only be compiled by ICCARM
lypinator 0:bb348c97df44 31 #endif
lypinator 0:bb348c97df44 32
lypinator 0:bb348c97df44 33 #pragma system_include
lypinator 0:bb348c97df44 34
lypinator 0:bb348c97df44 35 #define __IAR_FT _Pragma("inline=forced") __intrinsic
lypinator 0:bb348c97df44 36
lypinator 0:bb348c97df44 37 #if (__VER__ >= 8000000)
lypinator 0:bb348c97df44 38 #define __ICCARM_V8 1
lypinator 0:bb348c97df44 39 #else
lypinator 0:bb348c97df44 40 #define __ICCARM_V8 0
lypinator 0:bb348c97df44 41 #endif
lypinator 0:bb348c97df44 42
lypinator 0:bb348c97df44 43 #ifndef __ALIGNED
lypinator 0:bb348c97df44 44 #if __ICCARM_V8
lypinator 0:bb348c97df44 45 #define __ALIGNED(x) __attribute__((aligned(x)))
lypinator 0:bb348c97df44 46 #elif (__VER__ >= 7080000)
lypinator 0:bb348c97df44 47 /* Needs IAR language extensions */
lypinator 0:bb348c97df44 48 #define __ALIGNED(x) __attribute__((aligned(x)))
lypinator 0:bb348c97df44 49 #else
lypinator 0:bb348c97df44 50 #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
lypinator 0:bb348c97df44 51 #define __ALIGNED(x)
lypinator 0:bb348c97df44 52 #endif
lypinator 0:bb348c97df44 53 #endif
lypinator 0:bb348c97df44 54
lypinator 0:bb348c97df44 55
lypinator 0:bb348c97df44 56 /* Define compiler macros for CPU architecture, used in CMSIS 5.
lypinator 0:bb348c97df44 57 */
lypinator 0:bb348c97df44 58 #if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
lypinator 0:bb348c97df44 59 /* Macros already defined */
lypinator 0:bb348c97df44 60 #else
lypinator 0:bb348c97df44 61 #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
lypinator 0:bb348c97df44 62 #define __ARM_ARCH_8M_MAIN__ 1
lypinator 0:bb348c97df44 63 #elif defined(__ARM8M_BASELINE__)
lypinator 0:bb348c97df44 64 #define __ARM_ARCH_8M_BASE__ 1
lypinator 0:bb348c97df44 65 #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
lypinator 0:bb348c97df44 66 #if __ARM_ARCH == 6
lypinator 0:bb348c97df44 67 #define __ARM_ARCH_6M__ 1
lypinator 0:bb348c97df44 68 #elif __ARM_ARCH == 7
lypinator 0:bb348c97df44 69 #if __ARM_FEATURE_DSP
lypinator 0:bb348c97df44 70 #define __ARM_ARCH_7EM__ 1
lypinator 0:bb348c97df44 71 #else
lypinator 0:bb348c97df44 72 #define __ARM_ARCH_7M__ 1
lypinator 0:bb348c97df44 73 #endif
lypinator 0:bb348c97df44 74 #endif /* __ARM_ARCH */
lypinator 0:bb348c97df44 75 #endif /* __ARM_ARCH_PROFILE == 'M' */
lypinator 0:bb348c97df44 76 #endif
lypinator 0:bb348c97df44 77
lypinator 0:bb348c97df44 78 /* Alternativ core deduction for older ICCARM's */
lypinator 0:bb348c97df44 79 #if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
lypinator 0:bb348c97df44 80 !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
lypinator 0:bb348c97df44 81 #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
lypinator 0:bb348c97df44 82 #define __ARM_ARCH_6M__ 1
lypinator 0:bb348c97df44 83 #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
lypinator 0:bb348c97df44 84 #define __ARM_ARCH_7M__ 1
lypinator 0:bb348c97df44 85 #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
lypinator 0:bb348c97df44 86 #define __ARM_ARCH_7EM__ 1
lypinator 0:bb348c97df44 87 #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
lypinator 0:bb348c97df44 88 #define __ARM_ARCH_8M_BASE__ 1
lypinator 0:bb348c97df44 89 #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
lypinator 0:bb348c97df44 90 #define __ARM_ARCH_8M_MAIN__ 1
lypinator 0:bb348c97df44 91 #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
lypinator 0:bb348c97df44 92 #define __ARM_ARCH_8M_MAIN__ 1
lypinator 0:bb348c97df44 93 #else
lypinator 0:bb348c97df44 94 #error "Unknown target."
lypinator 0:bb348c97df44 95 #endif
lypinator 0:bb348c97df44 96 #endif
lypinator 0:bb348c97df44 97
lypinator 0:bb348c97df44 98
lypinator 0:bb348c97df44 99
lypinator 0:bb348c97df44 100 #if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
lypinator 0:bb348c97df44 101 #define __IAR_M0_FAMILY 1
lypinator 0:bb348c97df44 102 #elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
lypinator 0:bb348c97df44 103 #define __IAR_M0_FAMILY 1
lypinator 0:bb348c97df44 104 #else
lypinator 0:bb348c97df44 105 #define __IAR_M0_FAMILY 0
lypinator 0:bb348c97df44 106 #endif
lypinator 0:bb348c97df44 107
lypinator 0:bb348c97df44 108
lypinator 0:bb348c97df44 109 #ifndef __ASM
lypinator 0:bb348c97df44 110 #define __ASM __asm
lypinator 0:bb348c97df44 111 #endif
lypinator 0:bb348c97df44 112
lypinator 0:bb348c97df44 113 #ifndef __INLINE
lypinator 0:bb348c97df44 114 #define __INLINE inline
lypinator 0:bb348c97df44 115 #endif
lypinator 0:bb348c97df44 116
lypinator 0:bb348c97df44 117 #ifndef __NO_RETURN
lypinator 0:bb348c97df44 118 #if __ICCARM_V8
lypinator 0:bb348c97df44 119 #define __NO_RETURN __attribute__((__noreturn__))
lypinator 0:bb348c97df44 120 #else
lypinator 0:bb348c97df44 121 #define __NO_RETURN _Pragma("object_attribute=__noreturn")
lypinator 0:bb348c97df44 122 #endif
lypinator 0:bb348c97df44 123 #endif
lypinator 0:bb348c97df44 124
lypinator 0:bb348c97df44 125 #ifndef __PACKED
lypinator 0:bb348c97df44 126 #if __ICCARM_V8
lypinator 0:bb348c97df44 127 #define __PACKED __attribute__((packed, aligned(1)))
lypinator 0:bb348c97df44 128 #else
lypinator 0:bb348c97df44 129 /* Needs IAR language extensions */
lypinator 0:bb348c97df44 130 #define __PACKED __packed
lypinator 0:bb348c97df44 131 #endif
lypinator 0:bb348c97df44 132 #endif
lypinator 0:bb348c97df44 133
lypinator 0:bb348c97df44 134 #ifndef __PACKED_STRUCT
lypinator 0:bb348c97df44 135 #if __ICCARM_V8
lypinator 0:bb348c97df44 136 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
lypinator 0:bb348c97df44 137 #else
lypinator 0:bb348c97df44 138 /* Needs IAR language extensions */
lypinator 0:bb348c97df44 139 #define __PACKED_STRUCT __packed struct
lypinator 0:bb348c97df44 140 #endif
lypinator 0:bb348c97df44 141 #endif
lypinator 0:bb348c97df44 142
lypinator 0:bb348c97df44 143 #ifndef __PACKED_UNION
lypinator 0:bb348c97df44 144 #if __ICCARM_V8
lypinator 0:bb348c97df44 145 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
lypinator 0:bb348c97df44 146 #else
lypinator 0:bb348c97df44 147 /* Needs IAR language extensions */
lypinator 0:bb348c97df44 148 #define __PACKED_UNION __packed union
lypinator 0:bb348c97df44 149 #endif
lypinator 0:bb348c97df44 150 #endif
lypinator 0:bb348c97df44 151
lypinator 0:bb348c97df44 152 #ifndef __RESTRICT
lypinator 0:bb348c97df44 153 #define __RESTRICT restrict
lypinator 0:bb348c97df44 154 #endif
lypinator 0:bb348c97df44 155
lypinator 0:bb348c97df44 156 #ifndef __STATIC_INLINE
lypinator 0:bb348c97df44 157 #define __STATIC_INLINE static inline
lypinator 0:bb348c97df44 158 #endif
lypinator 0:bb348c97df44 159
lypinator 0:bb348c97df44 160 #ifndef __FORCEINLINE
lypinator 0:bb348c97df44 161 #define __FORCEINLINE _Pragma("inline=forced")
lypinator 0:bb348c97df44 162 #endif
lypinator 0:bb348c97df44 163
lypinator 0:bb348c97df44 164 #ifndef __STATIC_FORCEINLINE
lypinator 0:bb348c97df44 165 #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE
lypinator 0:bb348c97df44 166 #endif
lypinator 0:bb348c97df44 167
lypinator 0:bb348c97df44 168 #ifndef __UNALIGNED_UINT16_READ
lypinator 0:bb348c97df44 169 #pragma language=save
lypinator 0:bb348c97df44 170 #pragma language=extended
lypinator 0:bb348c97df44 171 __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
lypinator 0:bb348c97df44 172 {
lypinator 0:bb348c97df44 173 return *(__packed uint16_t*)(ptr);
lypinator 0:bb348c97df44 174 }
lypinator 0:bb348c97df44 175 #pragma language=restore
lypinator 0:bb348c97df44 176 #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
lypinator 0:bb348c97df44 177 #endif
lypinator 0:bb348c97df44 178
lypinator 0:bb348c97df44 179
lypinator 0:bb348c97df44 180 #ifndef __UNALIGNED_UINT16_WRITE
lypinator 0:bb348c97df44 181 #pragma language=save
lypinator 0:bb348c97df44 182 #pragma language=extended
lypinator 0:bb348c97df44 183 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
lypinator 0:bb348c97df44 184 {
lypinator 0:bb348c97df44 185 *(__packed uint16_t*)(ptr) = val;;
lypinator 0:bb348c97df44 186 }
lypinator 0:bb348c97df44 187 #pragma language=restore
lypinator 0:bb348c97df44 188 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
lypinator 0:bb348c97df44 189 #endif
lypinator 0:bb348c97df44 190
lypinator 0:bb348c97df44 191 #ifndef __UNALIGNED_UINT32_READ
lypinator 0:bb348c97df44 192 #pragma language=save
lypinator 0:bb348c97df44 193 #pragma language=extended
lypinator 0:bb348c97df44 194 __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
lypinator 0:bb348c97df44 195 {
lypinator 0:bb348c97df44 196 return *(__packed uint32_t*)(ptr);
lypinator 0:bb348c97df44 197 }
lypinator 0:bb348c97df44 198 #pragma language=restore
lypinator 0:bb348c97df44 199 #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
lypinator 0:bb348c97df44 200 #endif
lypinator 0:bb348c97df44 201
lypinator 0:bb348c97df44 202 #ifndef __UNALIGNED_UINT32_WRITE
lypinator 0:bb348c97df44 203 #pragma language=save
lypinator 0:bb348c97df44 204 #pragma language=extended
lypinator 0:bb348c97df44 205 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
lypinator 0:bb348c97df44 206 {
lypinator 0:bb348c97df44 207 *(__packed uint32_t*)(ptr) = val;;
lypinator 0:bb348c97df44 208 }
lypinator 0:bb348c97df44 209 #pragma language=restore
lypinator 0:bb348c97df44 210 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
lypinator 0:bb348c97df44 211 #endif
lypinator 0:bb348c97df44 212
lypinator 0:bb348c97df44 213 #ifndef __UNALIGNED_UINT32 /* deprecated */
lypinator 0:bb348c97df44 214 #pragma language=save
lypinator 0:bb348c97df44 215 #pragma language=extended
lypinator 0:bb348c97df44 216 __packed struct __iar_u32 { uint32_t v; };
lypinator 0:bb348c97df44 217 #pragma language=restore
lypinator 0:bb348c97df44 218 #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
lypinator 0:bb348c97df44 219 #endif
lypinator 0:bb348c97df44 220
lypinator 0:bb348c97df44 221 #ifndef __USED
lypinator 0:bb348c97df44 222 #if __ICCARM_V8
lypinator 0:bb348c97df44 223 #define __USED __attribute__((used))
lypinator 0:bb348c97df44 224 #else
lypinator 0:bb348c97df44 225 #define __USED _Pragma("__root")
lypinator 0:bb348c97df44 226 #endif
lypinator 0:bb348c97df44 227 #endif
lypinator 0:bb348c97df44 228
lypinator 0:bb348c97df44 229 #ifndef __WEAK
lypinator 0:bb348c97df44 230 #if __ICCARM_V8
lypinator 0:bb348c97df44 231 #define __WEAK __attribute__((weak))
lypinator 0:bb348c97df44 232 #else
lypinator 0:bb348c97df44 233 #define __WEAK _Pragma("__weak")
lypinator 0:bb348c97df44 234 #endif
lypinator 0:bb348c97df44 235 #endif
lypinator 0:bb348c97df44 236
lypinator 0:bb348c97df44 237
lypinator 0:bb348c97df44 238 #ifndef __ICCARM_INTRINSICS_VERSION__
lypinator 0:bb348c97df44 239 #define __ICCARM_INTRINSICS_VERSION__ 0
lypinator 0:bb348c97df44 240 #endif
lypinator 0:bb348c97df44 241
lypinator 0:bb348c97df44 242 #if __ICCARM_INTRINSICS_VERSION__ == 2
lypinator 0:bb348c97df44 243
lypinator 0:bb348c97df44 244 #if defined(__CLZ)
lypinator 0:bb348c97df44 245 #undef __CLZ
lypinator 0:bb348c97df44 246 #endif
lypinator 0:bb348c97df44 247 #if defined(__REVSH)
lypinator 0:bb348c97df44 248 #undef __REVSH
lypinator 0:bb348c97df44 249 #endif
lypinator 0:bb348c97df44 250 #if defined(__RBIT)
lypinator 0:bb348c97df44 251 #undef __RBIT
lypinator 0:bb348c97df44 252 #endif
lypinator 0:bb348c97df44 253 #if defined(__SSAT)
lypinator 0:bb348c97df44 254 #undef __SSAT
lypinator 0:bb348c97df44 255 #endif
lypinator 0:bb348c97df44 256 #if defined(__USAT)
lypinator 0:bb348c97df44 257 #undef __USAT
lypinator 0:bb348c97df44 258 #endif
lypinator 0:bb348c97df44 259
lypinator 0:bb348c97df44 260 #include "iccarm_builtin.h"
lypinator 0:bb348c97df44 261
lypinator 0:bb348c97df44 262 #define __disable_fault_irq __iar_builtin_disable_fiq
lypinator 0:bb348c97df44 263 #define __disable_irq __iar_builtin_disable_interrupt
lypinator 0:bb348c97df44 264 #define __enable_fault_irq __iar_builtin_enable_fiq
lypinator 0:bb348c97df44 265 #define __enable_irq __iar_builtin_enable_interrupt
lypinator 0:bb348c97df44 266 #define __arm_rsr __iar_builtin_rsr
lypinator 0:bb348c97df44 267 #define __arm_wsr __iar_builtin_wsr
lypinator 0:bb348c97df44 268
lypinator 0:bb348c97df44 269
lypinator 0:bb348c97df44 270 #define __get_APSR() (__arm_rsr("APSR"))
lypinator 0:bb348c97df44 271 #define __get_BASEPRI() (__arm_rsr("BASEPRI"))
lypinator 0:bb348c97df44 272 #define __get_CONTROL() (__arm_rsr("CONTROL"))
lypinator 0:bb348c97df44 273 #define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
lypinator 0:bb348c97df44 274
lypinator 0:bb348c97df44 275 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
lypinator 0:bb348c97df44 276 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
lypinator 0:bb348c97df44 277 #define __get_FPSCR() (__arm_rsr("FPSCR"))
lypinator 0:bb348c97df44 278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
lypinator 0:bb348c97df44 279 #else
lypinator 0:bb348c97df44 280 #define __get_FPSCR() ( 0 )
lypinator 0:bb348c97df44 281 #define __set_FPSCR(VALUE) ((void)VALUE)
lypinator 0:bb348c97df44 282 #endif
lypinator 0:bb348c97df44 283
lypinator 0:bb348c97df44 284 #define __get_IPSR() (__arm_rsr("IPSR"))
lypinator 0:bb348c97df44 285 #define __get_MSP() (__arm_rsr("MSP"))
lypinator 0:bb348c97df44 286 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
lypinator 0:bb348c97df44 287 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
lypinator 0:bb348c97df44 288 // without main extensions, the non-secure MSPLIM is RAZ/WI
lypinator 0:bb348c97df44 289 #define __get_MSPLIM() (0U)
lypinator 0:bb348c97df44 290 #else
lypinator 0:bb348c97df44 291 #define __get_MSPLIM() (__arm_rsr("MSPLIM"))
lypinator 0:bb348c97df44 292 #endif
lypinator 0:bb348c97df44 293 #define __get_PRIMASK() (__arm_rsr("PRIMASK"))
lypinator 0:bb348c97df44 294 #define __get_PSP() (__arm_rsr("PSP"))
lypinator 0:bb348c97df44 295
lypinator 0:bb348c97df44 296 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
lypinator 0:bb348c97df44 297 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
lypinator 0:bb348c97df44 298 // without main extensions, the non-secure PSPLIM is RAZ/WI
lypinator 0:bb348c97df44 299 #define __get_PSPLIM() (0U)
lypinator 0:bb348c97df44 300 #else
lypinator 0:bb348c97df44 301 #define __get_PSPLIM() (__arm_rsr("PSPLIM"))
lypinator 0:bb348c97df44 302 #endif
lypinator 0:bb348c97df44 303
lypinator 0:bb348c97df44 304 #define __get_xPSR() (__arm_rsr("xPSR"))
lypinator 0:bb348c97df44 305
lypinator 0:bb348c97df44 306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
lypinator 0:bb348c97df44 307 #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
lypinator 0:bb348c97df44 308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
lypinator 0:bb348c97df44 309 #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE)))
lypinator 0:bb348c97df44 310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
lypinator 0:bb348c97df44 311
lypinator 0:bb348c97df44 312 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
lypinator 0:bb348c97df44 313 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
lypinator 0:bb348c97df44 314 // without main extensions, the non-secure MSPLIM is RAZ/WI
lypinator 0:bb348c97df44 315 #define __set_MSPLIM(VALUE) ((void)(VALUE))
lypinator 0:bb348c97df44 316 #else
lypinator 0:bb348c97df44 317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
lypinator 0:bb348c97df44 318 #endif
lypinator 0:bb348c97df44 319 #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
lypinator 0:bb348c97df44 320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
lypinator 0:bb348c97df44 321 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
lypinator 0:bb348c97df44 322 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
lypinator 0:bb348c97df44 323 // without main extensions, the non-secure PSPLIM is RAZ/WI
lypinator 0:bb348c97df44 324 #define __set_PSPLIM(VALUE) ((void)(VALUE))
lypinator 0:bb348c97df44 325 #else
lypinator 0:bb348c97df44 326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
lypinator 0:bb348c97df44 327 #endif
lypinator 0:bb348c97df44 328
lypinator 0:bb348c97df44 329 #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS"))
lypinator 0:bb348c97df44 330 #define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE)))
lypinator 0:bb348c97df44 331 #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS"))
lypinator 0:bb348c97df44 332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
lypinator 0:bb348c97df44 333 #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS"))
lypinator 0:bb348c97df44 334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
lypinator 0:bb348c97df44 335 #define __TZ_get_SP_NS() (__arm_rsr("SP_NS"))
lypinator 0:bb348c97df44 336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE)))
lypinator 0:bb348c97df44 337 #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS"))
lypinator 0:bb348c97df44 338 #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE)))
lypinator 0:bb348c97df44 339 #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS"))
lypinator 0:bb348c97df44 340 #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE)))
lypinator 0:bb348c97df44 341 #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS"))
lypinator 0:bb348c97df44 342 #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
lypinator 0:bb348c97df44 343 #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS"))
lypinator 0:bb348c97df44 344 #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
lypinator 0:bb348c97df44 345 #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS"))
lypinator 0:bb348c97df44 346 #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE)))
lypinator 0:bb348c97df44 347
lypinator 0:bb348c97df44 348 #define __NOP __iar_builtin_no_operation
lypinator 0:bb348c97df44 349
lypinator 0:bb348c97df44 350 #define __CLZ __iar_builtin_CLZ
lypinator 0:bb348c97df44 351 #define __CLREX __iar_builtin_CLREX
lypinator 0:bb348c97df44 352
lypinator 0:bb348c97df44 353 #define __DMB __iar_builtin_DMB
lypinator 0:bb348c97df44 354 #define __DSB __iar_builtin_DSB
lypinator 0:bb348c97df44 355 #define __ISB __iar_builtin_ISB
lypinator 0:bb348c97df44 356
lypinator 0:bb348c97df44 357 #define __LDREXB __iar_builtin_LDREXB
lypinator 0:bb348c97df44 358 #define __LDREXH __iar_builtin_LDREXH
lypinator 0:bb348c97df44 359 #define __LDREXW __iar_builtin_LDREX
lypinator 0:bb348c97df44 360
lypinator 0:bb348c97df44 361 #define __RBIT __iar_builtin_RBIT
lypinator 0:bb348c97df44 362 #define __REV __iar_builtin_REV
lypinator 0:bb348c97df44 363 #define __REV16 __iar_builtin_REV16
lypinator 0:bb348c97df44 364
lypinator 0:bb348c97df44 365 __IAR_FT int16_t __REVSH(int16_t val)
lypinator 0:bb348c97df44 366 {
lypinator 0:bb348c97df44 367 return (int16_t) __iar_builtin_REVSH(val);
lypinator 0:bb348c97df44 368 }
lypinator 0:bb348c97df44 369
lypinator 0:bb348c97df44 370 #define __ROR __iar_builtin_ROR
lypinator 0:bb348c97df44 371 #define __RRX __iar_builtin_RRX
lypinator 0:bb348c97df44 372
lypinator 0:bb348c97df44 373 #define __SEV __iar_builtin_SEV
lypinator 0:bb348c97df44 374
lypinator 0:bb348c97df44 375 #if !__IAR_M0_FAMILY
lypinator 0:bb348c97df44 376 #define __SSAT __iar_builtin_SSAT
lypinator 0:bb348c97df44 377 #endif
lypinator 0:bb348c97df44 378
lypinator 0:bb348c97df44 379 #define __STREXB __iar_builtin_STREXB
lypinator 0:bb348c97df44 380 #define __STREXH __iar_builtin_STREXH
lypinator 0:bb348c97df44 381 #define __STREXW __iar_builtin_STREX
lypinator 0:bb348c97df44 382
lypinator 0:bb348c97df44 383 #if !__IAR_M0_FAMILY
lypinator 0:bb348c97df44 384 #define __USAT __iar_builtin_USAT
lypinator 0:bb348c97df44 385 #endif
lypinator 0:bb348c97df44 386
lypinator 0:bb348c97df44 387 #define __WFE __iar_builtin_WFE
lypinator 0:bb348c97df44 388 #define __WFI __iar_builtin_WFI
lypinator 0:bb348c97df44 389
lypinator 0:bb348c97df44 390 #if __ARM_MEDIA__
lypinator 0:bb348c97df44 391 #define __SADD8 __iar_builtin_SADD8
lypinator 0:bb348c97df44 392 #define __QADD8 __iar_builtin_QADD8
lypinator 0:bb348c97df44 393 #define __SHADD8 __iar_builtin_SHADD8
lypinator 0:bb348c97df44 394 #define __UADD8 __iar_builtin_UADD8
lypinator 0:bb348c97df44 395 #define __UQADD8 __iar_builtin_UQADD8
lypinator 0:bb348c97df44 396 #define __UHADD8 __iar_builtin_UHADD8
lypinator 0:bb348c97df44 397 #define __SSUB8 __iar_builtin_SSUB8
lypinator 0:bb348c97df44 398 #define __QSUB8 __iar_builtin_QSUB8
lypinator 0:bb348c97df44 399 #define __SHSUB8 __iar_builtin_SHSUB8
lypinator 0:bb348c97df44 400 #define __USUB8 __iar_builtin_USUB8
lypinator 0:bb348c97df44 401 #define __UQSUB8 __iar_builtin_UQSUB8
lypinator 0:bb348c97df44 402 #define __UHSUB8 __iar_builtin_UHSUB8
lypinator 0:bb348c97df44 403 #define __SADD16 __iar_builtin_SADD16
lypinator 0:bb348c97df44 404 #define __QADD16 __iar_builtin_QADD16
lypinator 0:bb348c97df44 405 #define __SHADD16 __iar_builtin_SHADD16
lypinator 0:bb348c97df44 406 #define __UADD16 __iar_builtin_UADD16
lypinator 0:bb348c97df44 407 #define __UQADD16 __iar_builtin_UQADD16
lypinator 0:bb348c97df44 408 #define __UHADD16 __iar_builtin_UHADD16
lypinator 0:bb348c97df44 409 #define __SSUB16 __iar_builtin_SSUB16
lypinator 0:bb348c97df44 410 #define __QSUB16 __iar_builtin_QSUB16
lypinator 0:bb348c97df44 411 #define __SHSUB16 __iar_builtin_SHSUB16
lypinator 0:bb348c97df44 412 #define __USUB16 __iar_builtin_USUB16
lypinator 0:bb348c97df44 413 #define __UQSUB16 __iar_builtin_UQSUB16
lypinator 0:bb348c97df44 414 #define __UHSUB16 __iar_builtin_UHSUB16
lypinator 0:bb348c97df44 415 #define __SASX __iar_builtin_SASX
lypinator 0:bb348c97df44 416 #define __QASX __iar_builtin_QASX
lypinator 0:bb348c97df44 417 #define __SHASX __iar_builtin_SHASX
lypinator 0:bb348c97df44 418 #define __UASX __iar_builtin_UASX
lypinator 0:bb348c97df44 419 #define __UQASX __iar_builtin_UQASX
lypinator 0:bb348c97df44 420 #define __UHASX __iar_builtin_UHASX
lypinator 0:bb348c97df44 421 #define __SSAX __iar_builtin_SSAX
lypinator 0:bb348c97df44 422 #define __QSAX __iar_builtin_QSAX
lypinator 0:bb348c97df44 423 #define __SHSAX __iar_builtin_SHSAX
lypinator 0:bb348c97df44 424 #define __USAX __iar_builtin_USAX
lypinator 0:bb348c97df44 425 #define __UQSAX __iar_builtin_UQSAX
lypinator 0:bb348c97df44 426 #define __UHSAX __iar_builtin_UHSAX
lypinator 0:bb348c97df44 427 #define __USAD8 __iar_builtin_USAD8
lypinator 0:bb348c97df44 428 #define __USADA8 __iar_builtin_USADA8
lypinator 0:bb348c97df44 429 #define __SSAT16 __iar_builtin_SSAT16
lypinator 0:bb348c97df44 430 #define __USAT16 __iar_builtin_USAT16
lypinator 0:bb348c97df44 431 #define __UXTB16 __iar_builtin_UXTB16
lypinator 0:bb348c97df44 432 #define __UXTAB16 __iar_builtin_UXTAB16
lypinator 0:bb348c97df44 433 #define __SXTB16 __iar_builtin_SXTB16
lypinator 0:bb348c97df44 434 #define __SXTAB16 __iar_builtin_SXTAB16
lypinator 0:bb348c97df44 435 #define __SMUAD __iar_builtin_SMUAD
lypinator 0:bb348c97df44 436 #define __SMUADX __iar_builtin_SMUADX
lypinator 0:bb348c97df44 437 #define __SMMLA __iar_builtin_SMMLA
lypinator 0:bb348c97df44 438 #define __SMLAD __iar_builtin_SMLAD
lypinator 0:bb348c97df44 439 #define __SMLADX __iar_builtin_SMLADX
lypinator 0:bb348c97df44 440 #define __SMLALD __iar_builtin_SMLALD
lypinator 0:bb348c97df44 441 #define __SMLALDX __iar_builtin_SMLALDX
lypinator 0:bb348c97df44 442 #define __SMUSD __iar_builtin_SMUSD
lypinator 0:bb348c97df44 443 #define __SMUSDX __iar_builtin_SMUSDX
lypinator 0:bb348c97df44 444 #define __SMLSD __iar_builtin_SMLSD
lypinator 0:bb348c97df44 445 #define __SMLSDX __iar_builtin_SMLSDX
lypinator 0:bb348c97df44 446 #define __SMLSLD __iar_builtin_SMLSLD
lypinator 0:bb348c97df44 447 #define __SMLSLDX __iar_builtin_SMLSLDX
lypinator 0:bb348c97df44 448 #define __SEL __iar_builtin_SEL
lypinator 0:bb348c97df44 449 #define __QADD __iar_builtin_QADD
lypinator 0:bb348c97df44 450 #define __QSUB __iar_builtin_QSUB
lypinator 0:bb348c97df44 451 #define __PKHBT __iar_builtin_PKHBT
lypinator 0:bb348c97df44 452 #define __PKHTB __iar_builtin_PKHTB
lypinator 0:bb348c97df44 453 #endif
lypinator 0:bb348c97df44 454
lypinator 0:bb348c97df44 455 #else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
lypinator 0:bb348c97df44 456
lypinator 0:bb348c97df44 457 #if __IAR_M0_FAMILY
lypinator 0:bb348c97df44 458 /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
lypinator 0:bb348c97df44 459 #define __CLZ __cmsis_iar_clz_not_active
lypinator 0:bb348c97df44 460 #define __SSAT __cmsis_iar_ssat_not_active
lypinator 0:bb348c97df44 461 #define __USAT __cmsis_iar_usat_not_active
lypinator 0:bb348c97df44 462 #define __RBIT __cmsis_iar_rbit_not_active
lypinator 0:bb348c97df44 463 #define __get_APSR __cmsis_iar_get_APSR_not_active
lypinator 0:bb348c97df44 464 #endif
lypinator 0:bb348c97df44 465
lypinator 0:bb348c97df44 466
lypinator 0:bb348c97df44 467 #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
lypinator 0:bb348c97df44 468 (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
lypinator 0:bb348c97df44 469 #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
lypinator 0:bb348c97df44 470 #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
lypinator 0:bb348c97df44 471 #endif
lypinator 0:bb348c97df44 472
lypinator 0:bb348c97df44 473 #ifdef __INTRINSICS_INCLUDED
lypinator 0:bb348c97df44 474 #error intrinsics.h is already included previously!
lypinator 0:bb348c97df44 475 #endif
lypinator 0:bb348c97df44 476
lypinator 0:bb348c97df44 477 #include <intrinsics.h>
lypinator 0:bb348c97df44 478
lypinator 0:bb348c97df44 479 #if __IAR_M0_FAMILY
lypinator 0:bb348c97df44 480 /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
lypinator 0:bb348c97df44 481 #undef __CLZ
lypinator 0:bb348c97df44 482 #undef __SSAT
lypinator 0:bb348c97df44 483 #undef __USAT
lypinator 0:bb348c97df44 484 #undef __RBIT
lypinator 0:bb348c97df44 485 #undef __get_APSR
lypinator 0:bb348c97df44 486
lypinator 0:bb348c97df44 487 __STATIC_INLINE uint8_t __CLZ(uint32_t data)
lypinator 0:bb348c97df44 488 {
lypinator 0:bb348c97df44 489 if (data == 0U) { return 32U; }
lypinator 0:bb348c97df44 490
lypinator 0:bb348c97df44 491 uint32_t count = 0U;
lypinator 0:bb348c97df44 492 uint32_t mask = 0x80000000U;
lypinator 0:bb348c97df44 493
lypinator 0:bb348c97df44 494 while ((data & mask) == 0U)
lypinator 0:bb348c97df44 495 {
lypinator 0:bb348c97df44 496 count += 1U;
lypinator 0:bb348c97df44 497 mask = mask >> 1U;
lypinator 0:bb348c97df44 498 }
lypinator 0:bb348c97df44 499 return count;
lypinator 0:bb348c97df44 500 }
lypinator 0:bb348c97df44 501
lypinator 0:bb348c97df44 502 __STATIC_INLINE uint32_t __RBIT(uint32_t v)
lypinator 0:bb348c97df44 503 {
lypinator 0:bb348c97df44 504 uint8_t sc = 31U;
lypinator 0:bb348c97df44 505 uint32_t r = v;
lypinator 0:bb348c97df44 506 for (v >>= 1U; v; v >>= 1U)
lypinator 0:bb348c97df44 507 {
lypinator 0:bb348c97df44 508 r <<= 1U;
lypinator 0:bb348c97df44 509 r |= v & 1U;
lypinator 0:bb348c97df44 510 sc--;
lypinator 0:bb348c97df44 511 }
lypinator 0:bb348c97df44 512 return (r << sc);
lypinator 0:bb348c97df44 513 }
lypinator 0:bb348c97df44 514
lypinator 0:bb348c97df44 515 __STATIC_INLINE uint32_t __get_APSR(void)
lypinator 0:bb348c97df44 516 {
lypinator 0:bb348c97df44 517 uint32_t res;
lypinator 0:bb348c97df44 518 __asm("MRS %0,APSR" : "=r" (res));
lypinator 0:bb348c97df44 519 return res;
lypinator 0:bb348c97df44 520 }
lypinator 0:bb348c97df44 521
lypinator 0:bb348c97df44 522 #endif
lypinator 0:bb348c97df44 523
lypinator 0:bb348c97df44 524 #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
lypinator 0:bb348c97df44 525 (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
lypinator 0:bb348c97df44 526 #undef __get_FPSCR
lypinator 0:bb348c97df44 527 #undef __set_FPSCR
lypinator 0:bb348c97df44 528 #define __get_FPSCR() (0)
lypinator 0:bb348c97df44 529 #define __set_FPSCR(VALUE) ((void)VALUE)
lypinator 0:bb348c97df44 530 #endif
lypinator 0:bb348c97df44 531
lypinator 0:bb348c97df44 532 #pragma diag_suppress=Pe940
lypinator 0:bb348c97df44 533 #pragma diag_suppress=Pe177
lypinator 0:bb348c97df44 534
lypinator 0:bb348c97df44 535 #define __enable_irq __enable_interrupt
lypinator 0:bb348c97df44 536 #define __disable_irq __disable_interrupt
lypinator 0:bb348c97df44 537 #define __NOP __no_operation
lypinator 0:bb348c97df44 538
lypinator 0:bb348c97df44 539 #define __get_xPSR __get_PSR
lypinator 0:bb348c97df44 540
lypinator 0:bb348c97df44 541 #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
lypinator 0:bb348c97df44 542
lypinator 0:bb348c97df44 543 __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
lypinator 0:bb348c97df44 544 {
lypinator 0:bb348c97df44 545 return __LDREX((unsigned long *)ptr);
lypinator 0:bb348c97df44 546 }
lypinator 0:bb348c97df44 547
lypinator 0:bb348c97df44 548 __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
lypinator 0:bb348c97df44 549 {
lypinator 0:bb348c97df44 550 return __STREX(value, (unsigned long *)ptr);
lypinator 0:bb348c97df44 551 }
lypinator 0:bb348c97df44 552 #endif
lypinator 0:bb348c97df44 553
lypinator 0:bb348c97df44 554
lypinator 0:bb348c97df44 555 /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
lypinator 0:bb348c97df44 556 #if (__CORTEX_M >= 0x03)
lypinator 0:bb348c97df44 557
lypinator 0:bb348c97df44 558 __IAR_FT uint32_t __RRX(uint32_t value)
lypinator 0:bb348c97df44 559 {
lypinator 0:bb348c97df44 560 uint32_t result;
lypinator 0:bb348c97df44 561 __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
lypinator 0:bb348c97df44 562 return(result);
lypinator 0:bb348c97df44 563 }
lypinator 0:bb348c97df44 564
lypinator 0:bb348c97df44 565 __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
lypinator 0:bb348c97df44 566 {
lypinator 0:bb348c97df44 567 __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value));
lypinator 0:bb348c97df44 568 }
lypinator 0:bb348c97df44 569
lypinator 0:bb348c97df44 570
lypinator 0:bb348c97df44 571 #define __enable_fault_irq __enable_fiq
lypinator 0:bb348c97df44 572 #define __disable_fault_irq __disable_fiq
lypinator 0:bb348c97df44 573
lypinator 0:bb348c97df44 574
lypinator 0:bb348c97df44 575 #endif /* (__CORTEX_M >= 0x03) */
lypinator 0:bb348c97df44 576
lypinator 0:bb348c97df44 577 __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
lypinator 0:bb348c97df44 578 {
lypinator 0:bb348c97df44 579 return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
lypinator 0:bb348c97df44 580 }
lypinator 0:bb348c97df44 581
lypinator 0:bb348c97df44 582 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
lypinator 0:bb348c97df44 583 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
lypinator 0:bb348c97df44 584
lypinator 0:bb348c97df44 585 __IAR_FT uint32_t __get_MSPLIM(void)
lypinator 0:bb348c97df44 586 {
lypinator 0:bb348c97df44 587 uint32_t res;
lypinator 0:bb348c97df44 588 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
lypinator 0:bb348c97df44 589 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
lypinator 0:bb348c97df44 590 // without main extensions, the non-secure MSPLIM is RAZ/WI
lypinator 0:bb348c97df44 591 res = 0U;
lypinator 0:bb348c97df44 592 #else
lypinator 0:bb348c97df44 593 __asm volatile("MRS %0,MSPLIM" : "=r" (res));
lypinator 0:bb348c97df44 594 #endif
lypinator 0:bb348c97df44 595 return res;
lypinator 0:bb348c97df44 596 }
lypinator 0:bb348c97df44 597
lypinator 0:bb348c97df44 598 __IAR_FT void __set_MSPLIM(uint32_t value)
lypinator 0:bb348c97df44 599 {
lypinator 0:bb348c97df44 600 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
lypinator 0:bb348c97df44 601 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
lypinator 0:bb348c97df44 602 // without main extensions, the non-secure MSPLIM is RAZ/WI
lypinator 0:bb348c97df44 603 (void)value;
lypinator 0:bb348c97df44 604 #else
lypinator 0:bb348c97df44 605 __asm volatile("MSR MSPLIM,%0" :: "r" (value));
lypinator 0:bb348c97df44 606 #endif
lypinator 0:bb348c97df44 607 }
lypinator 0:bb348c97df44 608
lypinator 0:bb348c97df44 609 __IAR_FT uint32_t __get_PSPLIM(void)
lypinator 0:bb348c97df44 610 {
lypinator 0:bb348c97df44 611 uint32_t res;
lypinator 0:bb348c97df44 612 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
lypinator 0:bb348c97df44 613 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
lypinator 0:bb348c97df44 614 // without main extensions, the non-secure PSPLIM is RAZ/WI
lypinator 0:bb348c97df44 615 res = 0U;
lypinator 0:bb348c97df44 616 #else
lypinator 0:bb348c97df44 617 __asm volatile("MRS %0,PSPLIM" : "=r" (res));
lypinator 0:bb348c97df44 618 #endif
lypinator 0:bb348c97df44 619 return res;
lypinator 0:bb348c97df44 620 }
lypinator 0:bb348c97df44 621
lypinator 0:bb348c97df44 622 __IAR_FT void __set_PSPLIM(uint32_t value)
lypinator 0:bb348c97df44 623 {
lypinator 0:bb348c97df44 624 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
lypinator 0:bb348c97df44 625 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
lypinator 0:bb348c97df44 626 // without main extensions, the non-secure PSPLIM is RAZ/WI
lypinator 0:bb348c97df44 627 (void)value;
lypinator 0:bb348c97df44 628 #else
lypinator 0:bb348c97df44 629 __asm volatile("MSR PSPLIM,%0" :: "r" (value));
lypinator 0:bb348c97df44 630 #endif
lypinator 0:bb348c97df44 631 }
lypinator 0:bb348c97df44 632
lypinator 0:bb348c97df44 633 __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
lypinator 0:bb348c97df44 634 {
lypinator 0:bb348c97df44 635 uint32_t res;
lypinator 0:bb348c97df44 636 __asm volatile("MRS %0,CONTROL_NS" : "=r" (res));
lypinator 0:bb348c97df44 637 return res;
lypinator 0:bb348c97df44 638 }
lypinator 0:bb348c97df44 639
lypinator 0:bb348c97df44 640 __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
lypinator 0:bb348c97df44 641 {
lypinator 0:bb348c97df44 642 __asm volatile("MSR CONTROL_NS,%0" :: "r" (value));
lypinator 0:bb348c97df44 643 }
lypinator 0:bb348c97df44 644
lypinator 0:bb348c97df44 645 __IAR_FT uint32_t __TZ_get_PSP_NS(void)
lypinator 0:bb348c97df44 646 {
lypinator 0:bb348c97df44 647 uint32_t res;
lypinator 0:bb348c97df44 648 __asm volatile("MRS %0,PSP_NS" : "=r" (res));
lypinator 0:bb348c97df44 649 return res;
lypinator 0:bb348c97df44 650 }
lypinator 0:bb348c97df44 651
lypinator 0:bb348c97df44 652 __IAR_FT void __TZ_set_PSP_NS(uint32_t value)
lypinator 0:bb348c97df44 653 {
lypinator 0:bb348c97df44 654 __asm volatile("MSR PSP_NS,%0" :: "r" (value));
lypinator 0:bb348c97df44 655 }
lypinator 0:bb348c97df44 656
lypinator 0:bb348c97df44 657 __IAR_FT uint32_t __TZ_get_MSP_NS(void)
lypinator 0:bb348c97df44 658 {
lypinator 0:bb348c97df44 659 uint32_t res;
lypinator 0:bb348c97df44 660 __asm volatile("MRS %0,MSP_NS" : "=r" (res));
lypinator 0:bb348c97df44 661 return res;
lypinator 0:bb348c97df44 662 }
lypinator 0:bb348c97df44 663
lypinator 0:bb348c97df44 664 __IAR_FT void __TZ_set_MSP_NS(uint32_t value)
lypinator 0:bb348c97df44 665 {
lypinator 0:bb348c97df44 666 __asm volatile("MSR MSP_NS,%0" :: "r" (value));
lypinator 0:bb348c97df44 667 }
lypinator 0:bb348c97df44 668
lypinator 0:bb348c97df44 669 __IAR_FT uint32_t __TZ_get_SP_NS(void)
lypinator 0:bb348c97df44 670 {
lypinator 0:bb348c97df44 671 uint32_t res;
lypinator 0:bb348c97df44 672 __asm volatile("MRS %0,SP_NS" : "=r" (res));
lypinator 0:bb348c97df44 673 return res;
lypinator 0:bb348c97df44 674 }
lypinator 0:bb348c97df44 675 __IAR_FT void __TZ_set_SP_NS(uint32_t value)
lypinator 0:bb348c97df44 676 {
lypinator 0:bb348c97df44 677 __asm volatile("MSR SP_NS,%0" :: "r" (value));
lypinator 0:bb348c97df44 678 }
lypinator 0:bb348c97df44 679
lypinator 0:bb348c97df44 680 __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
lypinator 0:bb348c97df44 681 {
lypinator 0:bb348c97df44 682 uint32_t res;
lypinator 0:bb348c97df44 683 __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res));
lypinator 0:bb348c97df44 684 return res;
lypinator 0:bb348c97df44 685 }
lypinator 0:bb348c97df44 686
lypinator 0:bb348c97df44 687 __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
lypinator 0:bb348c97df44 688 {
lypinator 0:bb348c97df44 689 __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value));
lypinator 0:bb348c97df44 690 }
lypinator 0:bb348c97df44 691
lypinator 0:bb348c97df44 692 __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
lypinator 0:bb348c97df44 693 {
lypinator 0:bb348c97df44 694 uint32_t res;
lypinator 0:bb348c97df44 695 __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res));
lypinator 0:bb348c97df44 696 return res;
lypinator 0:bb348c97df44 697 }
lypinator 0:bb348c97df44 698
lypinator 0:bb348c97df44 699 __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
lypinator 0:bb348c97df44 700 {
lypinator 0:bb348c97df44 701 __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value));
lypinator 0:bb348c97df44 702 }
lypinator 0:bb348c97df44 703
lypinator 0:bb348c97df44 704 __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
lypinator 0:bb348c97df44 705 {
lypinator 0:bb348c97df44 706 uint32_t res;
lypinator 0:bb348c97df44 707 __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res));
lypinator 0:bb348c97df44 708 return res;
lypinator 0:bb348c97df44 709 }
lypinator 0:bb348c97df44 710
lypinator 0:bb348c97df44 711 __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
lypinator 0:bb348c97df44 712 {
lypinator 0:bb348c97df44 713 __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value));
lypinator 0:bb348c97df44 714 }
lypinator 0:bb348c97df44 715
lypinator 0:bb348c97df44 716 __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
lypinator 0:bb348c97df44 717 {
lypinator 0:bb348c97df44 718 uint32_t res;
lypinator 0:bb348c97df44 719 __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res));
lypinator 0:bb348c97df44 720 return res;
lypinator 0:bb348c97df44 721 }
lypinator 0:bb348c97df44 722 __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
lypinator 0:bb348c97df44 723 {
lypinator 0:bb348c97df44 724 __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value));
lypinator 0:bb348c97df44 725 }
lypinator 0:bb348c97df44 726
lypinator 0:bb348c97df44 727 __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
lypinator 0:bb348c97df44 728 {
lypinator 0:bb348c97df44 729 uint32_t res;
lypinator 0:bb348c97df44 730 __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res));
lypinator 0:bb348c97df44 731 return res;
lypinator 0:bb348c97df44 732 }
lypinator 0:bb348c97df44 733
lypinator 0:bb348c97df44 734 __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
lypinator 0:bb348c97df44 735 {
lypinator 0:bb348c97df44 736 __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value));
lypinator 0:bb348c97df44 737 }
lypinator 0:bb348c97df44 738
lypinator 0:bb348c97df44 739 #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
lypinator 0:bb348c97df44 740
lypinator 0:bb348c97df44 741 #endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
lypinator 0:bb348c97df44 742
lypinator 0:bb348c97df44 743 #define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
lypinator 0:bb348c97df44 744
lypinator 0:bb348c97df44 745 #if __IAR_M0_FAMILY
lypinator 0:bb348c97df44 746 __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
lypinator 0:bb348c97df44 747 {
lypinator 0:bb348c97df44 748 if ((sat >= 1U) && (sat <= 32U))
lypinator 0:bb348c97df44 749 {
lypinator 0:bb348c97df44 750 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
lypinator 0:bb348c97df44 751 const int32_t min = -1 - max ;
lypinator 0:bb348c97df44 752 if (val > max)
lypinator 0:bb348c97df44 753 {
lypinator 0:bb348c97df44 754 return max;
lypinator 0:bb348c97df44 755 }
lypinator 0:bb348c97df44 756 else if (val < min)
lypinator 0:bb348c97df44 757 {
lypinator 0:bb348c97df44 758 return min;
lypinator 0:bb348c97df44 759 }
lypinator 0:bb348c97df44 760 }
lypinator 0:bb348c97df44 761 return val;
lypinator 0:bb348c97df44 762 }
lypinator 0:bb348c97df44 763
lypinator 0:bb348c97df44 764 __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
lypinator 0:bb348c97df44 765 {
lypinator 0:bb348c97df44 766 if (sat <= 31U)
lypinator 0:bb348c97df44 767 {
lypinator 0:bb348c97df44 768 const uint32_t max = ((1U << sat) - 1U);
lypinator 0:bb348c97df44 769 if (val > (int32_t)max)
lypinator 0:bb348c97df44 770 {
lypinator 0:bb348c97df44 771 return max;
lypinator 0:bb348c97df44 772 }
lypinator 0:bb348c97df44 773 else if (val < 0)
lypinator 0:bb348c97df44 774 {
lypinator 0:bb348c97df44 775 return 0U;
lypinator 0:bb348c97df44 776 }
lypinator 0:bb348c97df44 777 }
lypinator 0:bb348c97df44 778 return (uint32_t)val;
lypinator 0:bb348c97df44 779 }
lypinator 0:bb348c97df44 780 #endif
lypinator 0:bb348c97df44 781
lypinator 0:bb348c97df44 782 #if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
lypinator 0:bb348c97df44 783
lypinator 0:bb348c97df44 784 __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
lypinator 0:bb348c97df44 785 {
lypinator 0:bb348c97df44 786 uint32_t res;
lypinator 0:bb348c97df44 787 __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
lypinator 0:bb348c97df44 788 return ((uint8_t)res);
lypinator 0:bb348c97df44 789 }
lypinator 0:bb348c97df44 790
lypinator 0:bb348c97df44 791 __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
lypinator 0:bb348c97df44 792 {
lypinator 0:bb348c97df44 793 uint32_t res;
lypinator 0:bb348c97df44 794 __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
lypinator 0:bb348c97df44 795 return ((uint16_t)res);
lypinator 0:bb348c97df44 796 }
lypinator 0:bb348c97df44 797
lypinator 0:bb348c97df44 798 __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
lypinator 0:bb348c97df44 799 {
lypinator 0:bb348c97df44 800 uint32_t res;
lypinator 0:bb348c97df44 801 __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
lypinator 0:bb348c97df44 802 return res;
lypinator 0:bb348c97df44 803 }
lypinator 0:bb348c97df44 804
lypinator 0:bb348c97df44 805 __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
lypinator 0:bb348c97df44 806 {
lypinator 0:bb348c97df44 807 __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
lypinator 0:bb348c97df44 808 }
lypinator 0:bb348c97df44 809
lypinator 0:bb348c97df44 810 __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
lypinator 0:bb348c97df44 811 {
lypinator 0:bb348c97df44 812 __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
lypinator 0:bb348c97df44 813 }
lypinator 0:bb348c97df44 814
lypinator 0:bb348c97df44 815 __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
lypinator 0:bb348c97df44 816 {
lypinator 0:bb348c97df44 817 __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
lypinator 0:bb348c97df44 818 }
lypinator 0:bb348c97df44 819
lypinator 0:bb348c97df44 820 #endif /* (__CORTEX_M >= 0x03) */
lypinator 0:bb348c97df44 821
lypinator 0:bb348c97df44 822 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
lypinator 0:bb348c97df44 823 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
lypinator 0:bb348c97df44 824
lypinator 0:bb348c97df44 825
lypinator 0:bb348c97df44 826 __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
lypinator 0:bb348c97df44 827 {
lypinator 0:bb348c97df44 828 uint32_t res;
lypinator 0:bb348c97df44 829 __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
lypinator 0:bb348c97df44 830 return ((uint8_t)res);
lypinator 0:bb348c97df44 831 }
lypinator 0:bb348c97df44 832
lypinator 0:bb348c97df44 833 __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
lypinator 0:bb348c97df44 834 {
lypinator 0:bb348c97df44 835 uint32_t res;
lypinator 0:bb348c97df44 836 __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
lypinator 0:bb348c97df44 837 return ((uint16_t)res);
lypinator 0:bb348c97df44 838 }
lypinator 0:bb348c97df44 839
lypinator 0:bb348c97df44 840 __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
lypinator 0:bb348c97df44 841 {
lypinator 0:bb348c97df44 842 uint32_t res;
lypinator 0:bb348c97df44 843 __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
lypinator 0:bb348c97df44 844 return res;
lypinator 0:bb348c97df44 845 }
lypinator 0:bb348c97df44 846
lypinator 0:bb348c97df44 847 __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
lypinator 0:bb348c97df44 848 {
lypinator 0:bb348c97df44 849 __ASM volatile ("STLB %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
lypinator 0:bb348c97df44 850 }
lypinator 0:bb348c97df44 851
lypinator 0:bb348c97df44 852 __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
lypinator 0:bb348c97df44 853 {
lypinator 0:bb348c97df44 854 __ASM volatile ("STLH %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
lypinator 0:bb348c97df44 855 }
lypinator 0:bb348c97df44 856
lypinator 0:bb348c97df44 857 __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
lypinator 0:bb348c97df44 858 {
lypinator 0:bb348c97df44 859 __ASM volatile ("STL %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
lypinator 0:bb348c97df44 860 }
lypinator 0:bb348c97df44 861
lypinator 0:bb348c97df44 862 __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
lypinator 0:bb348c97df44 863 {
lypinator 0:bb348c97df44 864 uint32_t res;
lypinator 0:bb348c97df44 865 __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
lypinator 0:bb348c97df44 866 return ((uint8_t)res);
lypinator 0:bb348c97df44 867 }
lypinator 0:bb348c97df44 868
lypinator 0:bb348c97df44 869 __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
lypinator 0:bb348c97df44 870 {
lypinator 0:bb348c97df44 871 uint32_t res;
lypinator 0:bb348c97df44 872 __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
lypinator 0:bb348c97df44 873 return ((uint16_t)res);
lypinator 0:bb348c97df44 874 }
lypinator 0:bb348c97df44 875
lypinator 0:bb348c97df44 876 __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
lypinator 0:bb348c97df44 877 {
lypinator 0:bb348c97df44 878 uint32_t res;
lypinator 0:bb348c97df44 879 __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
lypinator 0:bb348c97df44 880 return res;
lypinator 0:bb348c97df44 881 }
lypinator 0:bb348c97df44 882
lypinator 0:bb348c97df44 883 __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
lypinator 0:bb348c97df44 884 {
lypinator 0:bb348c97df44 885 uint32_t res;
lypinator 0:bb348c97df44 886 __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
lypinator 0:bb348c97df44 887 return res;
lypinator 0:bb348c97df44 888 }
lypinator 0:bb348c97df44 889
lypinator 0:bb348c97df44 890 __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
lypinator 0:bb348c97df44 891 {
lypinator 0:bb348c97df44 892 uint32_t res;
lypinator 0:bb348c97df44 893 __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
lypinator 0:bb348c97df44 894 return res;
lypinator 0:bb348c97df44 895 }
lypinator 0:bb348c97df44 896
lypinator 0:bb348c97df44 897 __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
lypinator 0:bb348c97df44 898 {
lypinator 0:bb348c97df44 899 uint32_t res;
lypinator 0:bb348c97df44 900 __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
lypinator 0:bb348c97df44 901 return res;
lypinator 0:bb348c97df44 902 }
lypinator 0:bb348c97df44 903
lypinator 0:bb348c97df44 904 #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
lypinator 0:bb348c97df44 905
lypinator 0:bb348c97df44 906 #undef __IAR_FT
lypinator 0:bb348c97df44 907 #undef __IAR_M0_FAMILY
lypinator 0:bb348c97df44 908 #undef __ICCARM_V8
lypinator 0:bb348c97df44 909
lypinator 0:bb348c97df44 910 #pragma diag_default=Pe940
lypinator 0:bb348c97df44 911 #pragma diag_default=Pe177
lypinator 0:bb348c97df44 912
lypinator 0:bb348c97df44 913 #endif /* __CMSIS_ICCARM_H__ */