Thomas Lyp / DevLibMemoryController

Initial commit

Dependencies:   FastPWM

mbed-dev-master/cmsis/TARGET_CORTEX_M/cmsis_armcc.h@0:bb348c97df44, 2020-09-16 (annotated)

Committer:
lypinator
Date:
Wed Sep 16 01:11:49 2020 +0000
Revision:
0:bb348c97df44
Added PWM

Who changed what in which revision?

UserRevisionLine numberNew contents of line
lypinator 0:bb348c97df44 1 /**************************************************************************//**
lypinator 0:bb348c97df44 2 * @file cmsis_armcc.h
lypinator 0:bb348c97df44 3 * @brief CMSIS compiler ARMCC (Arm Compiler 5) header file
lypinator 0:bb348c97df44 4 * @version V5.0.4
lypinator 0:bb348c97df44 5 * @date 10. January 2018
lypinator 0:bb348c97df44 6 ******************************************************************************/
lypinator 0:bb348c97df44 7 /*
lypinator 0:bb348c97df44 8 * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
lypinator 0:bb348c97df44 9 *
lypinator 0:bb348c97df44 10 * SPDX-License-Identifier: Apache-2.0
lypinator 0:bb348c97df44 11 *
lypinator 0:bb348c97df44 12 * Licensed under the Apache License, Version 2.0 (the License); you may
lypinator 0:bb348c97df44 13 * not use this file except in compliance with the License.
lypinator 0:bb348c97df44 14 * You may obtain a copy of the License at
lypinator 0:bb348c97df44 15 *
lypinator 0:bb348c97df44 16 * www.apache.org/licenses/LICENSE-2.0
lypinator 0:bb348c97df44 17 *
lypinator 0:bb348c97df44 18 * Unless required by applicable law or agreed to in writing, software
lypinator 0:bb348c97df44 19 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
lypinator 0:bb348c97df44 20 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
lypinator 0:bb348c97df44 21 * See the License for the specific language governing permissions and
lypinator 0:bb348c97df44 22 * limitations under the License.
lypinator 0:bb348c97df44 23 */
lypinator 0:bb348c97df44 24
lypinator 0:bb348c97df44 25 #ifndef __CMSIS_ARMCC_H
lypinator 0:bb348c97df44 26 #define __CMSIS_ARMCC_H
lypinator 0:bb348c97df44 27
lypinator 0:bb348c97df44 28
lypinator 0:bb348c97df44 29 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
lypinator 0:bb348c97df44 30 #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
lypinator 0:bb348c97df44 31 #endif
lypinator 0:bb348c97df44 32
lypinator 0:bb348c97df44 33 /* CMSIS compiler control architecture macros */
lypinator 0:bb348c97df44 34 #if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
lypinator 0:bb348c97df44 35 (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
lypinator 0:bb348c97df44 36 #define __ARM_ARCH_6M__ 1
lypinator 0:bb348c97df44 37 #endif
lypinator 0:bb348c97df44 38
lypinator 0:bb348c97df44 39 #if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
lypinator 0:bb348c97df44 40 #define __ARM_ARCH_7M__ 1
lypinator 0:bb348c97df44 41 #endif
lypinator 0:bb348c97df44 42
lypinator 0:bb348c97df44 43 #if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
lypinator 0:bb348c97df44 44 #define __ARM_ARCH_7EM__ 1
lypinator 0:bb348c97df44 45 #endif
lypinator 0:bb348c97df44 46
lypinator 0:bb348c97df44 47 /* __ARM_ARCH_8M_BASE__ not applicable */
lypinator 0:bb348c97df44 48 /* __ARM_ARCH_8M_MAIN__ not applicable */
lypinator 0:bb348c97df44 49
lypinator 0:bb348c97df44 50
lypinator 0:bb348c97df44 51 /* CMSIS compiler specific defines */
lypinator 0:bb348c97df44 52 #ifndef __ASM
lypinator 0:bb348c97df44 53 #define __ASM __asm
lypinator 0:bb348c97df44 54 #endif
lypinator 0:bb348c97df44 55 #ifndef __INLINE
lypinator 0:bb348c97df44 56 #define __INLINE __inline
lypinator 0:bb348c97df44 57 #endif
lypinator 0:bb348c97df44 58 #ifndef __STATIC_INLINE
lypinator 0:bb348c97df44 59 #define __STATIC_INLINE static __inline
lypinator 0:bb348c97df44 60 #endif
lypinator 0:bb348c97df44 61 #ifndef __STATIC_FORCEINLINE
lypinator 0:bb348c97df44 62 #define __STATIC_FORCEINLINE static __forceinline
lypinator 0:bb348c97df44 63 #endif
lypinator 0:bb348c97df44 64 #ifndef __NO_RETURN
lypinator 0:bb348c97df44 65 #define __NO_RETURN __declspec(noreturn)
lypinator 0:bb348c97df44 66 #endif
lypinator 0:bb348c97df44 67 #ifndef __USED
lypinator 0:bb348c97df44 68 #define __USED __attribute__((used))
lypinator 0:bb348c97df44 69 #endif
lypinator 0:bb348c97df44 70 #ifndef __WEAK
lypinator 0:bb348c97df44 71 #define __WEAK __attribute__((weak))
lypinator 0:bb348c97df44 72 #endif
lypinator 0:bb348c97df44 73 #ifndef __PACKED
lypinator 0:bb348c97df44 74 #define __PACKED __attribute__((packed))
lypinator 0:bb348c97df44 75 #endif
lypinator 0:bb348c97df44 76 #ifndef __PACKED_STRUCT
lypinator 0:bb348c97df44 77 #define __PACKED_STRUCT __packed struct
lypinator 0:bb348c97df44 78 #endif
lypinator 0:bb348c97df44 79 #ifndef __PACKED_UNION
lypinator 0:bb348c97df44 80 #define __PACKED_UNION __packed union
lypinator 0:bb348c97df44 81 #endif
lypinator 0:bb348c97df44 82 #ifndef __UNALIGNED_UINT32 /* deprecated */
lypinator 0:bb348c97df44 83 #define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
lypinator 0:bb348c97df44 84 #endif
lypinator 0:bb348c97df44 85 #ifndef __UNALIGNED_UINT16_WRITE
lypinator 0:bb348c97df44 86 #define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
lypinator 0:bb348c97df44 87 #endif
lypinator 0:bb348c97df44 88 #ifndef __UNALIGNED_UINT16_READ
lypinator 0:bb348c97df44 89 #define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
lypinator 0:bb348c97df44 90 #endif
lypinator 0:bb348c97df44 91 #ifndef __UNALIGNED_UINT32_WRITE
lypinator 0:bb348c97df44 92 #define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
lypinator 0:bb348c97df44 93 #endif
lypinator 0:bb348c97df44 94 #ifndef __UNALIGNED_UINT32_READ
lypinator 0:bb348c97df44 95 #define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
lypinator 0:bb348c97df44 96 #endif
lypinator 0:bb348c97df44 97 #ifndef __ALIGNED
lypinator 0:bb348c97df44 98 #define __ALIGNED(x) __attribute__((aligned(x)))
lypinator 0:bb348c97df44 99 #endif
lypinator 0:bb348c97df44 100 #ifndef __RESTRICT
lypinator 0:bb348c97df44 101 #define __RESTRICT __restrict
lypinator 0:bb348c97df44 102 #endif
lypinator 0:bb348c97df44 103
lypinator 0:bb348c97df44 104 /* ########################### Core Function Access ########################### */
lypinator 0:bb348c97df44 105 /** \ingroup CMSIS_Core_FunctionInterface
lypinator 0:bb348c97df44 106 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
lypinator 0:bb348c97df44 107 @{
lypinator 0:bb348c97df44 108 */
lypinator 0:bb348c97df44 109
lypinator 0:bb348c97df44 110 /**
lypinator 0:bb348c97df44 111 \brief Enable IRQ Interrupts
lypinator 0:bb348c97df44 112 \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
lypinator 0:bb348c97df44 113 Can only be executed in Privileged modes.
lypinator 0:bb348c97df44 114 */
lypinator 0:bb348c97df44 115 /* intrinsic void __enable_irq(); */
lypinator 0:bb348c97df44 116
lypinator 0:bb348c97df44 117
lypinator 0:bb348c97df44 118 /**
lypinator 0:bb348c97df44 119 \brief Disable IRQ Interrupts
lypinator 0:bb348c97df44 120 \details Disables IRQ interrupts by setting the I-bit in the CPSR.
lypinator 0:bb348c97df44 121 Can only be executed in Privileged modes.
lypinator 0:bb348c97df44 122 */
lypinator 0:bb348c97df44 123 /* intrinsic void __disable_irq(); */
lypinator 0:bb348c97df44 124
lypinator 0:bb348c97df44 125 /**
lypinator 0:bb348c97df44 126 \brief Get Control Register
lypinator 0:bb348c97df44 127 \details Returns the content of the Control Register.
lypinator 0:bb348c97df44 128 \return Control Register value
lypinator 0:bb348c97df44 129 */
lypinator 0:bb348c97df44 130 __STATIC_INLINE uint32_t __get_CONTROL(void)
lypinator 0:bb348c97df44 131 {
lypinator 0:bb348c97df44 132 register uint32_t __regControl __ASM("control");
lypinator 0:bb348c97df44 133 return(__regControl);
lypinator 0:bb348c97df44 134 }
lypinator 0:bb348c97df44 135
lypinator 0:bb348c97df44 136
lypinator 0:bb348c97df44 137 /**
lypinator 0:bb348c97df44 138 \brief Set Control Register
lypinator 0:bb348c97df44 139 \details Writes the given value to the Control Register.
lypinator 0:bb348c97df44 140 \param [in] control Control Register value to set
lypinator 0:bb348c97df44 141 */
lypinator 0:bb348c97df44 142 __STATIC_INLINE void __set_CONTROL(uint32_t control)
lypinator 0:bb348c97df44 143 {
lypinator 0:bb348c97df44 144 register uint32_t __regControl __ASM("control");
lypinator 0:bb348c97df44 145 __regControl = control;
lypinator 0:bb348c97df44 146 }
lypinator 0:bb348c97df44 147
lypinator 0:bb348c97df44 148
lypinator 0:bb348c97df44 149 /**
lypinator 0:bb348c97df44 150 \brief Get IPSR Register
lypinator 0:bb348c97df44 151 \details Returns the content of the IPSR Register.
lypinator 0:bb348c97df44 152 \return IPSR Register value
lypinator 0:bb348c97df44 153 */
lypinator 0:bb348c97df44 154 __STATIC_INLINE uint32_t __get_IPSR(void)
lypinator 0:bb348c97df44 155 {
lypinator 0:bb348c97df44 156 register uint32_t __regIPSR __ASM("ipsr");
lypinator 0:bb348c97df44 157 return(__regIPSR);
lypinator 0:bb348c97df44 158 }
lypinator 0:bb348c97df44 159
lypinator 0:bb348c97df44 160
lypinator 0:bb348c97df44 161 /**
lypinator 0:bb348c97df44 162 \brief Get APSR Register
lypinator 0:bb348c97df44 163 \details Returns the content of the APSR Register.
lypinator 0:bb348c97df44 164 \return APSR Register value
lypinator 0:bb348c97df44 165 */
lypinator 0:bb348c97df44 166 __STATIC_INLINE uint32_t __get_APSR(void)
lypinator 0:bb348c97df44 167 {
lypinator 0:bb348c97df44 168 register uint32_t __regAPSR __ASM("apsr");
lypinator 0:bb348c97df44 169 return(__regAPSR);
lypinator 0:bb348c97df44 170 }
lypinator 0:bb348c97df44 171
lypinator 0:bb348c97df44 172
lypinator 0:bb348c97df44 173 /**
lypinator 0:bb348c97df44 174 \brief Get xPSR Register
lypinator 0:bb348c97df44 175 \details Returns the content of the xPSR Register.
lypinator 0:bb348c97df44 176 \return xPSR Register value
lypinator 0:bb348c97df44 177 */
lypinator 0:bb348c97df44 178 __STATIC_INLINE uint32_t __get_xPSR(void)
lypinator 0:bb348c97df44 179 {
lypinator 0:bb348c97df44 180 register uint32_t __regXPSR __ASM("xpsr");
lypinator 0:bb348c97df44 181 return(__regXPSR);
lypinator 0:bb348c97df44 182 }
lypinator 0:bb348c97df44 183
lypinator 0:bb348c97df44 184
lypinator 0:bb348c97df44 185 /**
lypinator 0:bb348c97df44 186 \brief Get Process Stack Pointer
lypinator 0:bb348c97df44 187 \details Returns the current value of the Process Stack Pointer (PSP).
lypinator 0:bb348c97df44 188 \return PSP Register value
lypinator 0:bb348c97df44 189 */
lypinator 0:bb348c97df44 190 __STATIC_INLINE uint32_t __get_PSP(void)
lypinator 0:bb348c97df44 191 {
lypinator 0:bb348c97df44 192 register uint32_t __regProcessStackPointer __ASM("psp");
lypinator 0:bb348c97df44 193 return(__regProcessStackPointer);
lypinator 0:bb348c97df44 194 }
lypinator 0:bb348c97df44 195
lypinator 0:bb348c97df44 196
lypinator 0:bb348c97df44 197 /**
lypinator 0:bb348c97df44 198 \brief Set Process Stack Pointer
lypinator 0:bb348c97df44 199 \details Assigns the given value to the Process Stack Pointer (PSP).
lypinator 0:bb348c97df44 200 \param [in] topOfProcStack Process Stack Pointer value to set
lypinator 0:bb348c97df44 201 */
lypinator 0:bb348c97df44 202 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
lypinator 0:bb348c97df44 203 {
lypinator 0:bb348c97df44 204 register uint32_t __regProcessStackPointer __ASM("psp");
lypinator 0:bb348c97df44 205 __regProcessStackPointer = topOfProcStack;
lypinator 0:bb348c97df44 206 }
lypinator 0:bb348c97df44 207
lypinator 0:bb348c97df44 208
lypinator 0:bb348c97df44 209 /**
lypinator 0:bb348c97df44 210 \brief Get Main Stack Pointer
lypinator 0:bb348c97df44 211 \details Returns the current value of the Main Stack Pointer (MSP).
lypinator 0:bb348c97df44 212 \return MSP Register value
lypinator 0:bb348c97df44 213 */
lypinator 0:bb348c97df44 214 __STATIC_INLINE uint32_t __get_MSP(void)
lypinator 0:bb348c97df44 215 {
lypinator 0:bb348c97df44 216 register uint32_t __regMainStackPointer __ASM("msp");
lypinator 0:bb348c97df44 217 return(__regMainStackPointer);
lypinator 0:bb348c97df44 218 }
lypinator 0:bb348c97df44 219
lypinator 0:bb348c97df44 220
lypinator 0:bb348c97df44 221 /**
lypinator 0:bb348c97df44 222 \brief Set Main Stack Pointer
lypinator 0:bb348c97df44 223 \details Assigns the given value to the Main Stack Pointer (MSP).
lypinator 0:bb348c97df44 224 \param [in] topOfMainStack Main Stack Pointer value to set
lypinator 0:bb348c97df44 225 */
lypinator 0:bb348c97df44 226 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
lypinator 0:bb348c97df44 227 {
lypinator 0:bb348c97df44 228 register uint32_t __regMainStackPointer __ASM("msp");
lypinator 0:bb348c97df44 229 __regMainStackPointer = topOfMainStack;
lypinator 0:bb348c97df44 230 }
lypinator 0:bb348c97df44 231
lypinator 0:bb348c97df44 232
lypinator 0:bb348c97df44 233 /**
lypinator 0:bb348c97df44 234 \brief Get Priority Mask
lypinator 0:bb348c97df44 235 \details Returns the current state of the priority mask bit from the Priority Mask Register.
lypinator 0:bb348c97df44 236 \return Priority Mask value
lypinator 0:bb348c97df44 237 */
lypinator 0:bb348c97df44 238 __STATIC_INLINE uint32_t __get_PRIMASK(void)
lypinator 0:bb348c97df44 239 {
lypinator 0:bb348c97df44 240 register uint32_t __regPriMask __ASM("primask");
lypinator 0:bb348c97df44 241 return(__regPriMask);
lypinator 0:bb348c97df44 242 }
lypinator 0:bb348c97df44 243
lypinator 0:bb348c97df44 244
lypinator 0:bb348c97df44 245 /**
lypinator 0:bb348c97df44 246 \brief Set Priority Mask
lypinator 0:bb348c97df44 247 \details Assigns the given value to the Priority Mask Register.
lypinator 0:bb348c97df44 248 \param [in] priMask Priority Mask
lypinator 0:bb348c97df44 249 */
lypinator 0:bb348c97df44 250 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
lypinator 0:bb348c97df44 251 {
lypinator 0:bb348c97df44 252 register uint32_t __regPriMask __ASM("primask");
lypinator 0:bb348c97df44 253 __regPriMask = (priMask);
lypinator 0:bb348c97df44 254 }
lypinator 0:bb348c97df44 255
lypinator 0:bb348c97df44 256
lypinator 0:bb348c97df44 257 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
lypinator 0:bb348c97df44 258 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
lypinator 0:bb348c97df44 259
lypinator 0:bb348c97df44 260 /**
lypinator 0:bb348c97df44 261 \brief Enable FIQ
lypinator 0:bb348c97df44 262 \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
lypinator 0:bb348c97df44 263 Can only be executed in Privileged modes.
lypinator 0:bb348c97df44 264 */
lypinator 0:bb348c97df44 265 #define __enable_fault_irq __enable_fiq
lypinator 0:bb348c97df44 266
lypinator 0:bb348c97df44 267
lypinator 0:bb348c97df44 268 /**
lypinator 0:bb348c97df44 269 \brief Disable FIQ
lypinator 0:bb348c97df44 270 \details Disables FIQ interrupts by setting the F-bit in the CPSR.
lypinator 0:bb348c97df44 271 Can only be executed in Privileged modes.
lypinator 0:bb348c97df44 272 */
lypinator 0:bb348c97df44 273 #define __disable_fault_irq __disable_fiq
lypinator 0:bb348c97df44 274
lypinator 0:bb348c97df44 275
lypinator 0:bb348c97df44 276 /**
lypinator 0:bb348c97df44 277 \brief Get Base Priority
lypinator 0:bb348c97df44 278 \details Returns the current value of the Base Priority register.
lypinator 0:bb348c97df44 279 \return Base Priority register value
lypinator 0:bb348c97df44 280 */
lypinator 0:bb348c97df44 281 __STATIC_INLINE uint32_t __get_BASEPRI(void)
lypinator 0:bb348c97df44 282 {
lypinator 0:bb348c97df44 283 register uint32_t __regBasePri __ASM("basepri");
lypinator 0:bb348c97df44 284 return(__regBasePri);
lypinator 0:bb348c97df44 285 }
lypinator 0:bb348c97df44 286
lypinator 0:bb348c97df44 287
lypinator 0:bb348c97df44 288 /**
lypinator 0:bb348c97df44 289 \brief Set Base Priority
lypinator 0:bb348c97df44 290 \details Assigns the given value to the Base Priority register.
lypinator 0:bb348c97df44 291 \param [in] basePri Base Priority value to set
lypinator 0:bb348c97df44 292 */
lypinator 0:bb348c97df44 293 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
lypinator 0:bb348c97df44 294 {
lypinator 0:bb348c97df44 295 register uint32_t __regBasePri __ASM("basepri");
lypinator 0:bb348c97df44 296 __regBasePri = (basePri & 0xFFU);
lypinator 0:bb348c97df44 297 }
lypinator 0:bb348c97df44 298
lypinator 0:bb348c97df44 299
lypinator 0:bb348c97df44 300 /**
lypinator 0:bb348c97df44 301 \brief Set Base Priority with condition
lypinator 0:bb348c97df44 302 \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
lypinator 0:bb348c97df44 303 or the new value increases the BASEPRI priority level.
lypinator 0:bb348c97df44 304 \param [in] basePri Base Priority value to set
lypinator 0:bb348c97df44 305 */
lypinator 0:bb348c97df44 306 __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
lypinator 0:bb348c97df44 307 {
lypinator 0:bb348c97df44 308 register uint32_t __regBasePriMax __ASM("basepri_max");
lypinator 0:bb348c97df44 309 __regBasePriMax = (basePri & 0xFFU);
lypinator 0:bb348c97df44 310 }
lypinator 0:bb348c97df44 311
lypinator 0:bb348c97df44 312
lypinator 0:bb348c97df44 313 /**
lypinator 0:bb348c97df44 314 \brief Get Fault Mask
lypinator 0:bb348c97df44 315 \details Returns the current value of the Fault Mask register.
lypinator 0:bb348c97df44 316 \return Fault Mask register value
lypinator 0:bb348c97df44 317 */
lypinator 0:bb348c97df44 318 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
lypinator 0:bb348c97df44 319 {
lypinator 0:bb348c97df44 320 register uint32_t __regFaultMask __ASM("faultmask");
lypinator 0:bb348c97df44 321 return(__regFaultMask);
lypinator 0:bb348c97df44 322 }
lypinator 0:bb348c97df44 323
lypinator 0:bb348c97df44 324
lypinator 0:bb348c97df44 325 /**
lypinator 0:bb348c97df44 326 \brief Set Fault Mask
lypinator 0:bb348c97df44 327 \details Assigns the given value to the Fault Mask register.
lypinator 0:bb348c97df44 328 \param [in] faultMask Fault Mask value to set
lypinator 0:bb348c97df44 329 */
lypinator 0:bb348c97df44 330 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
lypinator 0:bb348c97df44 331 {
lypinator 0:bb348c97df44 332 register uint32_t __regFaultMask __ASM("faultmask");
lypinator 0:bb348c97df44 333 __regFaultMask = (faultMask & (uint32_t)1U);
lypinator 0:bb348c97df44 334 }
lypinator 0:bb348c97df44 335
lypinator 0:bb348c97df44 336 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
lypinator 0:bb348c97df44 337 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
lypinator 0:bb348c97df44 338
lypinator 0:bb348c97df44 339
lypinator 0:bb348c97df44 340 #if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
lypinator 0:bb348c97df44 341
lypinator 0:bb348c97df44 342 /**
lypinator 0:bb348c97df44 343 \brief Get FPSCR
lypinator 0:bb348c97df44 344 \details Returns the current value of the Floating Point Status/Control register.
lypinator 0:bb348c97df44 345 \return Floating Point Status/Control register value
lypinator 0:bb348c97df44 346 */
lypinator 0:bb348c97df44 347 __STATIC_INLINE uint32_t __get_FPSCR(void)
lypinator 0:bb348c97df44 348 {
lypinator 0:bb348c97df44 349 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
lypinator 0:bb348c97df44 350 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
lypinator 0:bb348c97df44 351 register uint32_t __regfpscr __ASM("fpscr");
lypinator 0:bb348c97df44 352 return(__regfpscr);
lypinator 0:bb348c97df44 353 #else
lypinator 0:bb348c97df44 354 return(0U);
lypinator 0:bb348c97df44 355 #endif
lypinator 0:bb348c97df44 356 }
lypinator 0:bb348c97df44 357
lypinator 0:bb348c97df44 358
lypinator 0:bb348c97df44 359 /**
lypinator 0:bb348c97df44 360 \brief Set FPSCR
lypinator 0:bb348c97df44 361 \details Assigns the given value to the Floating Point Status/Control register.
lypinator 0:bb348c97df44 362 \param [in] fpscr Floating Point Status/Control value to set
lypinator 0:bb348c97df44 363 */
lypinator 0:bb348c97df44 364 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
lypinator 0:bb348c97df44 365 {
lypinator 0:bb348c97df44 366 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
lypinator 0:bb348c97df44 367 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
lypinator 0:bb348c97df44 368 register uint32_t __regfpscr __ASM("fpscr");
lypinator 0:bb348c97df44 369 __regfpscr = (fpscr);
lypinator 0:bb348c97df44 370 #else
lypinator 0:bb348c97df44 371 (void)fpscr;
lypinator 0:bb348c97df44 372 #endif
lypinator 0:bb348c97df44 373 }
lypinator 0:bb348c97df44 374
lypinator 0:bb348c97df44 375 #endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
lypinator 0:bb348c97df44 376
lypinator 0:bb348c97df44 377
lypinator 0:bb348c97df44 378
lypinator 0:bb348c97df44 379 /*@} end of CMSIS_Core_RegAccFunctions */
lypinator 0:bb348c97df44 380
lypinator 0:bb348c97df44 381
lypinator 0:bb348c97df44 382 /* ########################## Core Instruction Access ######################### */
lypinator 0:bb348c97df44 383 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
lypinator 0:bb348c97df44 384 Access to dedicated instructions
lypinator 0:bb348c97df44 385 @{
lypinator 0:bb348c97df44 386 */
lypinator 0:bb348c97df44 387
lypinator 0:bb348c97df44 388 /**
lypinator 0:bb348c97df44 389 \brief No Operation
lypinator 0:bb348c97df44 390 \details No Operation does nothing. This instruction can be used for code alignment purposes.
lypinator 0:bb348c97df44 391 */
lypinator 0:bb348c97df44 392 #define __NOP __nop
lypinator 0:bb348c97df44 393
lypinator 0:bb348c97df44 394
lypinator 0:bb348c97df44 395 /**
lypinator 0:bb348c97df44 396 \brief Wait For Interrupt
lypinator 0:bb348c97df44 397 \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
lypinator 0:bb348c97df44 398 */
lypinator 0:bb348c97df44 399 #define __WFI __wfi
lypinator 0:bb348c97df44 400
lypinator 0:bb348c97df44 401
lypinator 0:bb348c97df44 402 /**
lypinator 0:bb348c97df44 403 \brief Wait For Event
lypinator 0:bb348c97df44 404 \details Wait For Event is a hint instruction that permits the processor to enter
lypinator 0:bb348c97df44 405 a low-power state until one of a number of events occurs.
lypinator 0:bb348c97df44 406 */
lypinator 0:bb348c97df44 407 #define __WFE __wfe
lypinator 0:bb348c97df44 408
lypinator 0:bb348c97df44 409
lypinator 0:bb348c97df44 410 /**
lypinator 0:bb348c97df44 411 \brief Send Event
lypinator 0:bb348c97df44 412 \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
lypinator 0:bb348c97df44 413 */
lypinator 0:bb348c97df44 414 #define __SEV __sev
lypinator 0:bb348c97df44 415
lypinator 0:bb348c97df44 416
lypinator 0:bb348c97df44 417 /**
lypinator 0:bb348c97df44 418 \brief Instruction Synchronization Barrier
lypinator 0:bb348c97df44 419 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
lypinator 0:bb348c97df44 420 so that all instructions following the ISB are fetched from cache or memory,
lypinator 0:bb348c97df44 421 after the instruction has been completed.
lypinator 0:bb348c97df44 422 */
lypinator 0:bb348c97df44 423 #define __ISB() do {\
lypinator 0:bb348c97df44 424 __schedule_barrier();\
lypinator 0:bb348c97df44 425 __isb(0xF);\
lypinator 0:bb348c97df44 426 __schedule_barrier();\
lypinator 0:bb348c97df44 427 } while (0U)
lypinator 0:bb348c97df44 428
lypinator 0:bb348c97df44 429 /**
lypinator 0:bb348c97df44 430 \brief Data Synchronization Barrier
lypinator 0:bb348c97df44 431 \details Acts as a special kind of Data Memory Barrier.
lypinator 0:bb348c97df44 432 It completes when all explicit memory accesses before this instruction complete.
lypinator 0:bb348c97df44 433 */
lypinator 0:bb348c97df44 434 #define __DSB() do {\
lypinator 0:bb348c97df44 435 __schedule_barrier();\
lypinator 0:bb348c97df44 436 __dsb(0xF);\
lypinator 0:bb348c97df44 437 __schedule_barrier();\
lypinator 0:bb348c97df44 438 } while (0U)
lypinator 0:bb348c97df44 439
lypinator 0:bb348c97df44 440 /**
lypinator 0:bb348c97df44 441 \brief Data Memory Barrier
lypinator 0:bb348c97df44 442 \details Ensures the apparent order of the explicit memory operations before
lypinator 0:bb348c97df44 443 and after the instruction, without ensuring their completion.
lypinator 0:bb348c97df44 444 */
lypinator 0:bb348c97df44 445 #define __DMB() do {\
lypinator 0:bb348c97df44 446 __schedule_barrier();\
lypinator 0:bb348c97df44 447 __dmb(0xF);\
lypinator 0:bb348c97df44 448 __schedule_barrier();\
lypinator 0:bb348c97df44 449 } while (0U)
lypinator 0:bb348c97df44 450
lypinator 0:bb348c97df44 451
lypinator 0:bb348c97df44 452 /**
lypinator 0:bb348c97df44 453 \brief Reverse byte order (32 bit)
lypinator 0:bb348c97df44 454 \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
lypinator 0:bb348c97df44 455 \param [in] value Value to reverse
lypinator 0:bb348c97df44 456 \return Reversed value
lypinator 0:bb348c97df44 457 */
lypinator 0:bb348c97df44 458 #define __REV __rev
lypinator 0:bb348c97df44 459
lypinator 0:bb348c97df44 460
lypinator 0:bb348c97df44 461 /**
lypinator 0:bb348c97df44 462 \brief Reverse byte order (16 bit)
lypinator 0:bb348c97df44 463 \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
lypinator 0:bb348c97df44 464 \param [in] value Value to reverse
lypinator 0:bb348c97df44 465 \return Reversed value
lypinator 0:bb348c97df44 466 */
lypinator 0:bb348c97df44 467 #ifndef __NO_EMBEDDED_ASM
lypinator 0:bb348c97df44 468 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
lypinator 0:bb348c97df44 469 {
lypinator 0:bb348c97df44 470 rev16 r0, r0
lypinator 0:bb348c97df44 471 bx lr
lypinator 0:bb348c97df44 472 }
lypinator 0:bb348c97df44 473 #endif
lypinator 0:bb348c97df44 474
lypinator 0:bb348c97df44 475
lypinator 0:bb348c97df44 476 /**
lypinator 0:bb348c97df44 477 \brief Reverse byte order (16 bit)
lypinator 0:bb348c97df44 478 \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
lypinator 0:bb348c97df44 479 \param [in] value Value to reverse
lypinator 0:bb348c97df44 480 \return Reversed value
lypinator 0:bb348c97df44 481 */
lypinator 0:bb348c97df44 482 #ifndef __NO_EMBEDDED_ASM
lypinator 0:bb348c97df44 483 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
lypinator 0:bb348c97df44 484 {
lypinator 0:bb348c97df44 485 revsh r0, r0
lypinator 0:bb348c97df44 486 bx lr
lypinator 0:bb348c97df44 487 }
lypinator 0:bb348c97df44 488 #endif
lypinator 0:bb348c97df44 489
lypinator 0:bb348c97df44 490
lypinator 0:bb348c97df44 491 /**
lypinator 0:bb348c97df44 492 \brief Rotate Right in unsigned value (32 bit)
lypinator 0:bb348c97df44 493 \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
lypinator 0:bb348c97df44 494 \param [in] op1 Value to rotate
lypinator 0:bb348c97df44 495 \param [in] op2 Number of Bits to rotate
lypinator 0:bb348c97df44 496 \return Rotated value
lypinator 0:bb348c97df44 497 */
lypinator 0:bb348c97df44 498 #define __ROR __ror
lypinator 0:bb348c97df44 499
lypinator 0:bb348c97df44 500
lypinator 0:bb348c97df44 501 /**
lypinator 0:bb348c97df44 502 \brief Breakpoint
lypinator 0:bb348c97df44 503 \details Causes the processor to enter Debug state.
lypinator 0:bb348c97df44 504 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
lypinator 0:bb348c97df44 505 \param [in] value is ignored by the processor.
lypinator 0:bb348c97df44 506 If required, a debugger can use it to store additional information about the breakpoint.
lypinator 0:bb348c97df44 507 */
lypinator 0:bb348c97df44 508 #define __BKPT(value) __breakpoint(value)
lypinator 0:bb348c97df44 509
lypinator 0:bb348c97df44 510
lypinator 0:bb348c97df44 511 /**
lypinator 0:bb348c97df44 512 \brief Reverse bit order of value
lypinator 0:bb348c97df44 513 \details Reverses the bit order of the given value.
lypinator 0:bb348c97df44 514 \param [in] value Value to reverse
lypinator 0:bb348c97df44 515 \return Reversed value
lypinator 0:bb348c97df44 516 */
lypinator 0:bb348c97df44 517 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
lypinator 0:bb348c97df44 518 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
lypinator 0:bb348c97df44 519 #define __RBIT __rbit
lypinator 0:bb348c97df44 520 #else
lypinator 0:bb348c97df44 521 __attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
lypinator 0:bb348c97df44 522 {
lypinator 0:bb348c97df44 523 uint32_t result;
lypinator 0:bb348c97df44 524 uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
lypinator 0:bb348c97df44 525
lypinator 0:bb348c97df44 526 result = value; /* r will be reversed bits of v; first get LSB of v */
lypinator 0:bb348c97df44 527 for (value >>= 1U; value != 0U; value >>= 1U)
lypinator 0:bb348c97df44 528 {
lypinator 0:bb348c97df44 529 result <<= 1U;
lypinator 0:bb348c97df44 530 result |= value & 1U;
lypinator 0:bb348c97df44 531 s--;
lypinator 0:bb348c97df44 532 }
lypinator 0:bb348c97df44 533 result <<= s; /* shift when v's highest bits are zero */
lypinator 0:bb348c97df44 534 return result;
lypinator 0:bb348c97df44 535 }
lypinator 0:bb348c97df44 536 #endif
lypinator 0:bb348c97df44 537
lypinator 0:bb348c97df44 538
lypinator 0:bb348c97df44 539 /**
lypinator 0:bb348c97df44 540 \brief Count leading zeros
lypinator 0:bb348c97df44 541 \details Counts the number of leading zeros of a data value.
lypinator 0:bb348c97df44 542 \param [in] value Value to count the leading zeros
lypinator 0:bb348c97df44 543 \return number of leading zeros in value
lypinator 0:bb348c97df44 544 */
lypinator 0:bb348c97df44 545 #define __CLZ __clz
lypinator 0:bb348c97df44 546
lypinator 0:bb348c97df44 547
lypinator 0:bb348c97df44 548 #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
lypinator 0:bb348c97df44 549 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
lypinator 0:bb348c97df44 550
lypinator 0:bb348c97df44 551 /**
lypinator 0:bb348c97df44 552 \brief LDR Exclusive (8 bit)
lypinator 0:bb348c97df44 553 \details Executes a exclusive LDR instruction for 8 bit value.
lypinator 0:bb348c97df44 554 \param [in] ptr Pointer to data
lypinator 0:bb348c97df44 555 \return value of type uint8_t at (*ptr)
lypinator 0:bb348c97df44 556 */
lypinator 0:bb348c97df44 557 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
lypinator 0:bb348c97df44 558 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
lypinator 0:bb348c97df44 559 #else
lypinator 0:bb348c97df44 560 #define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
lypinator 0:bb348c97df44 561 #endif
lypinator 0:bb348c97df44 562
lypinator 0:bb348c97df44 563
lypinator 0:bb348c97df44 564 /**
lypinator 0:bb348c97df44 565 \brief LDR Exclusive (16 bit)
lypinator 0:bb348c97df44 566 \details Executes a exclusive LDR instruction for 16 bit values.
lypinator 0:bb348c97df44 567 \param [in] ptr Pointer to data
lypinator 0:bb348c97df44 568 \return value of type uint16_t at (*ptr)
lypinator 0:bb348c97df44 569 */
lypinator 0:bb348c97df44 570 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
lypinator 0:bb348c97df44 571 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
lypinator 0:bb348c97df44 572 #else
lypinator 0:bb348c97df44 573 #define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
lypinator 0:bb348c97df44 574 #endif
lypinator 0:bb348c97df44 575
lypinator 0:bb348c97df44 576
lypinator 0:bb348c97df44 577 /**
lypinator 0:bb348c97df44 578 \brief LDR Exclusive (32 bit)
lypinator 0:bb348c97df44 579 \details Executes a exclusive LDR instruction for 32 bit values.
lypinator 0:bb348c97df44 580 \param [in] ptr Pointer to data
lypinator 0:bb348c97df44 581 \return value of type uint32_t at (*ptr)
lypinator 0:bb348c97df44 582 */
lypinator 0:bb348c97df44 583 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
lypinator 0:bb348c97df44 584 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
lypinator 0:bb348c97df44 585 #else
lypinator 0:bb348c97df44 586 #define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
lypinator 0:bb348c97df44 587 #endif
lypinator 0:bb348c97df44 588
lypinator 0:bb348c97df44 589
lypinator 0:bb348c97df44 590 /**
lypinator 0:bb348c97df44 591 \brief STR Exclusive (8 bit)
lypinator 0:bb348c97df44 592 \details Executes a exclusive STR instruction for 8 bit values.
lypinator 0:bb348c97df44 593 \param [in] value Value to store
lypinator 0:bb348c97df44 594 \param [in] ptr Pointer to location
lypinator 0:bb348c97df44 595 \return 0 Function succeeded
lypinator 0:bb348c97df44 596 \return 1 Function failed
lypinator 0:bb348c97df44 597 */
lypinator 0:bb348c97df44 598 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
lypinator 0:bb348c97df44 599 #define __STREXB(value, ptr) __strex(value, ptr)
lypinator 0:bb348c97df44 600 #else
lypinator 0:bb348c97df44 601 #define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
lypinator 0:bb348c97df44 602 #endif
lypinator 0:bb348c97df44 603
lypinator 0:bb348c97df44 604
lypinator 0:bb348c97df44 605 /**
lypinator 0:bb348c97df44 606 \brief STR Exclusive (16 bit)
lypinator 0:bb348c97df44 607 \details Executes a exclusive STR instruction for 16 bit values.
lypinator 0:bb348c97df44 608 \param [in] value Value to store
lypinator 0:bb348c97df44 609 \param [in] ptr Pointer to location
lypinator 0:bb348c97df44 610 \return 0 Function succeeded
lypinator 0:bb348c97df44 611 \return 1 Function failed
lypinator 0:bb348c97df44 612 */
lypinator 0:bb348c97df44 613 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
lypinator 0:bb348c97df44 614 #define __STREXH(value, ptr) __strex(value, ptr)
lypinator 0:bb348c97df44 615 #else
lypinator 0:bb348c97df44 616 #define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
lypinator 0:bb348c97df44 617 #endif
lypinator 0:bb348c97df44 618
lypinator 0:bb348c97df44 619
lypinator 0:bb348c97df44 620 /**
lypinator 0:bb348c97df44 621 \brief STR Exclusive (32 bit)
lypinator 0:bb348c97df44 622 \details Executes a exclusive STR instruction for 32 bit values.
lypinator 0:bb348c97df44 623 \param [in] value Value to store
lypinator 0:bb348c97df44 624 \param [in] ptr Pointer to location
lypinator 0:bb348c97df44 625 \return 0 Function succeeded
lypinator 0:bb348c97df44 626 \return 1 Function failed
lypinator 0:bb348c97df44 627 */
lypinator 0:bb348c97df44 628 #if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
lypinator 0:bb348c97df44 629 #define __STREXW(value, ptr) __strex(value, ptr)
lypinator 0:bb348c97df44 630 #else
lypinator 0:bb348c97df44 631 #define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
lypinator 0:bb348c97df44 632 #endif
lypinator 0:bb348c97df44 633
lypinator 0:bb348c97df44 634
lypinator 0:bb348c97df44 635 /**
lypinator 0:bb348c97df44 636 \brief Remove the exclusive lock
lypinator 0:bb348c97df44 637 \details Removes the exclusive lock which is created by LDREX.
lypinator 0:bb348c97df44 638 */
lypinator 0:bb348c97df44 639 #define __CLREX __clrex
lypinator 0:bb348c97df44 640
lypinator 0:bb348c97df44 641
lypinator 0:bb348c97df44 642 /**
lypinator 0:bb348c97df44 643 \brief Signed Saturate
lypinator 0:bb348c97df44 644 \details Saturates a signed value.
lypinator 0:bb348c97df44 645 \param [in] value Value to be saturated
lypinator 0:bb348c97df44 646 \param [in] sat Bit position to saturate to (1..32)
lypinator 0:bb348c97df44 647 \return Saturated value
lypinator 0:bb348c97df44 648 */
lypinator 0:bb348c97df44 649 #define __SSAT __ssat
lypinator 0:bb348c97df44 650
lypinator 0:bb348c97df44 651
lypinator 0:bb348c97df44 652 /**
lypinator 0:bb348c97df44 653 \brief Unsigned Saturate
lypinator 0:bb348c97df44 654 \details Saturates an unsigned value.
lypinator 0:bb348c97df44 655 \param [in] value Value to be saturated
lypinator 0:bb348c97df44 656 \param [in] sat Bit position to saturate to (0..31)
lypinator 0:bb348c97df44 657 \return Saturated value
lypinator 0:bb348c97df44 658 */
lypinator 0:bb348c97df44 659 #define __USAT __usat
lypinator 0:bb348c97df44 660
lypinator 0:bb348c97df44 661
lypinator 0:bb348c97df44 662 /**
lypinator 0:bb348c97df44 663 \brief Rotate Right with Extend (32 bit)
lypinator 0:bb348c97df44 664 \details Moves each bit of a bitstring right by one bit.
lypinator 0:bb348c97df44 665 The carry input is shifted in at the left end of the bitstring.
lypinator 0:bb348c97df44 666 \param [in] value Value to rotate
lypinator 0:bb348c97df44 667 \return Rotated value
lypinator 0:bb348c97df44 668 */
lypinator 0:bb348c97df44 669 #ifndef __NO_EMBEDDED_ASM
lypinator 0:bb348c97df44 670 __attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
lypinator 0:bb348c97df44 671 {
lypinator 0:bb348c97df44 672 rrx r0, r0
lypinator 0:bb348c97df44 673 bx lr
lypinator 0:bb348c97df44 674 }
lypinator 0:bb348c97df44 675 #endif
lypinator 0:bb348c97df44 676
lypinator 0:bb348c97df44 677
lypinator 0:bb348c97df44 678 /**
lypinator 0:bb348c97df44 679 \brief LDRT Unprivileged (8 bit)
lypinator 0:bb348c97df44 680 \details Executes a Unprivileged LDRT instruction for 8 bit value.
lypinator 0:bb348c97df44 681 \param [in] ptr Pointer to data
lypinator 0:bb348c97df44 682 \return value of type uint8_t at (*ptr)
lypinator 0:bb348c97df44 683 */
lypinator 0:bb348c97df44 684 #define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
lypinator 0:bb348c97df44 685
lypinator 0:bb348c97df44 686
lypinator 0:bb348c97df44 687 /**
lypinator 0:bb348c97df44 688 \brief LDRT Unprivileged (16 bit)
lypinator 0:bb348c97df44 689 \details Executes a Unprivileged LDRT instruction for 16 bit values.
lypinator 0:bb348c97df44 690 \param [in] ptr Pointer to data
lypinator 0:bb348c97df44 691 \return value of type uint16_t at (*ptr)
lypinator 0:bb348c97df44 692 */
lypinator 0:bb348c97df44 693 #define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
lypinator 0:bb348c97df44 694
lypinator 0:bb348c97df44 695
lypinator 0:bb348c97df44 696 /**
lypinator 0:bb348c97df44 697 \brief LDRT Unprivileged (32 bit)
lypinator 0:bb348c97df44 698 \details Executes a Unprivileged LDRT instruction for 32 bit values.
lypinator 0:bb348c97df44 699 \param [in] ptr Pointer to data
lypinator 0:bb348c97df44 700 \return value of type uint32_t at (*ptr)
lypinator 0:bb348c97df44 701 */
lypinator 0:bb348c97df44 702 #define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
lypinator 0:bb348c97df44 703
lypinator 0:bb348c97df44 704
lypinator 0:bb348c97df44 705 /**
lypinator 0:bb348c97df44 706 \brief STRT Unprivileged (8 bit)
lypinator 0:bb348c97df44 707 \details Executes a Unprivileged STRT instruction for 8 bit values.
lypinator 0:bb348c97df44 708 \param [in] value Value to store
lypinator 0:bb348c97df44 709 \param [in] ptr Pointer to location
lypinator 0:bb348c97df44 710 */
lypinator 0:bb348c97df44 711 #define __STRBT(value, ptr) __strt(value, ptr)
lypinator 0:bb348c97df44 712
lypinator 0:bb348c97df44 713
lypinator 0:bb348c97df44 714 /**
lypinator 0:bb348c97df44 715 \brief STRT Unprivileged (16 bit)
lypinator 0:bb348c97df44 716 \details Executes a Unprivileged STRT instruction for 16 bit values.
lypinator 0:bb348c97df44 717 \param [in] value Value to store
lypinator 0:bb348c97df44 718 \param [in] ptr Pointer to location
lypinator 0:bb348c97df44 719 */
lypinator 0:bb348c97df44 720 #define __STRHT(value, ptr) __strt(value, ptr)
lypinator 0:bb348c97df44 721
lypinator 0:bb348c97df44 722
lypinator 0:bb348c97df44 723 /**
lypinator 0:bb348c97df44 724 \brief STRT Unprivileged (32 bit)
lypinator 0:bb348c97df44 725 \details Executes a Unprivileged STRT instruction for 32 bit values.
lypinator 0:bb348c97df44 726 \param [in] value Value to store
lypinator 0:bb348c97df44 727 \param [in] ptr Pointer to location
lypinator 0:bb348c97df44 728 */
lypinator 0:bb348c97df44 729 #define __STRT(value, ptr) __strt(value, ptr)
lypinator 0:bb348c97df44 730
lypinator 0:bb348c97df44 731 #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
lypinator 0:bb348c97df44 732 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
lypinator 0:bb348c97df44 733
lypinator 0:bb348c97df44 734 /**
lypinator 0:bb348c97df44 735 \brief Signed Saturate
lypinator 0:bb348c97df44 736 \details Saturates a signed value.
lypinator 0:bb348c97df44 737 \param [in] value Value to be saturated
lypinator 0:bb348c97df44 738 \param [in] sat Bit position to saturate to (1..32)
lypinator 0:bb348c97df44 739 \return Saturated value
lypinator 0:bb348c97df44 740 */
lypinator 0:bb348c97df44 741 __attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
lypinator 0:bb348c97df44 742 {
lypinator 0:bb348c97df44 743 if ((sat >= 1U) && (sat <= 32U))
lypinator 0:bb348c97df44 744 {
lypinator 0:bb348c97df44 745 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
lypinator 0:bb348c97df44 746 const int32_t min = -1 - max ;
lypinator 0:bb348c97df44 747 if (val > max)
lypinator 0:bb348c97df44 748 {
lypinator 0:bb348c97df44 749 return max;
lypinator 0:bb348c97df44 750 }
lypinator 0:bb348c97df44 751 else if (val < min)
lypinator 0:bb348c97df44 752 {
lypinator 0:bb348c97df44 753 return min;
lypinator 0:bb348c97df44 754 }
lypinator 0:bb348c97df44 755 }
lypinator 0:bb348c97df44 756 return val;
lypinator 0:bb348c97df44 757 }
lypinator 0:bb348c97df44 758
lypinator 0:bb348c97df44 759 /**
lypinator 0:bb348c97df44 760 \brief Unsigned Saturate
lypinator 0:bb348c97df44 761 \details Saturates an unsigned value.
lypinator 0:bb348c97df44 762 \param [in] value Value to be saturated
lypinator 0:bb348c97df44 763 \param [in] sat Bit position to saturate to (0..31)
lypinator 0:bb348c97df44 764 \return Saturated value
lypinator 0:bb348c97df44 765 */
lypinator 0:bb348c97df44 766 __attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
lypinator 0:bb348c97df44 767 {
lypinator 0:bb348c97df44 768 if (sat <= 31U)
lypinator 0:bb348c97df44 769 {
lypinator 0:bb348c97df44 770 const uint32_t max = ((1U << sat) - 1U);
lypinator 0:bb348c97df44 771 if (val > (int32_t)max)
lypinator 0:bb348c97df44 772 {
lypinator 0:bb348c97df44 773 return max;
lypinator 0:bb348c97df44 774 }
lypinator 0:bb348c97df44 775 else if (val < 0)
lypinator 0:bb348c97df44 776 {
lypinator 0:bb348c97df44 777 return 0U;
lypinator 0:bb348c97df44 778 }
lypinator 0:bb348c97df44 779 }
lypinator 0:bb348c97df44 780 return (uint32_t)val;
lypinator 0:bb348c97df44 781 }
lypinator 0:bb348c97df44 782
lypinator 0:bb348c97df44 783 #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
lypinator 0:bb348c97df44 784 (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
lypinator 0:bb348c97df44 785
lypinator 0:bb348c97df44 786 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
lypinator 0:bb348c97df44 787
lypinator 0:bb348c97df44 788
lypinator 0:bb348c97df44 789 /* ################### Compiler specific Intrinsics ########################### */
lypinator 0:bb348c97df44 790 /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
lypinator 0:bb348c97df44 791 Access to dedicated SIMD instructions
lypinator 0:bb348c97df44 792 @{
lypinator 0:bb348c97df44 793 */
lypinator 0:bb348c97df44 794
lypinator 0:bb348c97df44 795 #if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
lypinator 0:bb348c97df44 796
lypinator 0:bb348c97df44 797 #define __SADD8 __sadd8
lypinator 0:bb348c97df44 798 #define __QADD8 __qadd8
lypinator 0:bb348c97df44 799 #define __SHADD8 __shadd8
lypinator 0:bb348c97df44 800 #define __UADD8 __uadd8
lypinator 0:bb348c97df44 801 #define __UQADD8 __uqadd8
lypinator 0:bb348c97df44 802 #define __UHADD8 __uhadd8
lypinator 0:bb348c97df44 803 #define __SSUB8 __ssub8
lypinator 0:bb348c97df44 804 #define __QSUB8 __qsub8
lypinator 0:bb348c97df44 805 #define __SHSUB8 __shsub8
lypinator 0:bb348c97df44 806 #define __USUB8 __usub8
lypinator 0:bb348c97df44 807 #define __UQSUB8 __uqsub8
lypinator 0:bb348c97df44 808 #define __UHSUB8 __uhsub8
lypinator 0:bb348c97df44 809 #define __SADD16 __sadd16
lypinator 0:bb348c97df44 810 #define __QADD16 __qadd16
lypinator 0:bb348c97df44 811 #define __SHADD16 __shadd16
lypinator 0:bb348c97df44 812 #define __UADD16 __uadd16
lypinator 0:bb348c97df44 813 #define __UQADD16 __uqadd16
lypinator 0:bb348c97df44 814 #define __UHADD16 __uhadd16
lypinator 0:bb348c97df44 815 #define __SSUB16 __ssub16
lypinator 0:bb348c97df44 816 #define __QSUB16 __qsub16
lypinator 0:bb348c97df44 817 #define __SHSUB16 __shsub16
lypinator 0:bb348c97df44 818 #define __USUB16 __usub16
lypinator 0:bb348c97df44 819 #define __UQSUB16 __uqsub16
lypinator 0:bb348c97df44 820 #define __UHSUB16 __uhsub16
lypinator 0:bb348c97df44 821 #define __SASX __sasx
lypinator 0:bb348c97df44 822 #define __QASX __qasx
lypinator 0:bb348c97df44 823 #define __SHASX __shasx
lypinator 0:bb348c97df44 824 #define __UASX __uasx
lypinator 0:bb348c97df44 825 #define __UQASX __uqasx
lypinator 0:bb348c97df44 826 #define __UHASX __uhasx
lypinator 0:bb348c97df44 827 #define __SSAX __ssax
lypinator 0:bb348c97df44 828 #define __QSAX __qsax
lypinator 0:bb348c97df44 829 #define __SHSAX __shsax
lypinator 0:bb348c97df44 830 #define __USAX __usax
lypinator 0:bb348c97df44 831 #define __UQSAX __uqsax
lypinator 0:bb348c97df44 832 #define __UHSAX __uhsax
lypinator 0:bb348c97df44 833 #define __USAD8 __usad8
lypinator 0:bb348c97df44 834 #define __USADA8 __usada8
lypinator 0:bb348c97df44 835 #define __SSAT16 __ssat16
lypinator 0:bb348c97df44 836 #define __USAT16 __usat16
lypinator 0:bb348c97df44 837 #define __UXTB16 __uxtb16
lypinator 0:bb348c97df44 838 #define __UXTAB16 __uxtab16
lypinator 0:bb348c97df44 839 #define __SXTB16 __sxtb16
lypinator 0:bb348c97df44 840 #define __SXTAB16 __sxtab16
lypinator 0:bb348c97df44 841 #define __SMUAD __smuad
lypinator 0:bb348c97df44 842 #define __SMUADX __smuadx
lypinator 0:bb348c97df44 843 #define __SMLAD __smlad
lypinator 0:bb348c97df44 844 #define __SMLADX __smladx
lypinator 0:bb348c97df44 845 #define __SMLALD __smlald
lypinator 0:bb348c97df44 846 #define __SMLALDX __smlaldx
lypinator 0:bb348c97df44 847 #define __SMUSD __smusd
lypinator 0:bb348c97df44 848 #define __SMUSDX __smusdx
lypinator 0:bb348c97df44 849 #define __SMLSD __smlsd
lypinator 0:bb348c97df44 850 #define __SMLSDX __smlsdx
lypinator 0:bb348c97df44 851 #define __SMLSLD __smlsld
lypinator 0:bb348c97df44 852 #define __SMLSLDX __smlsldx
lypinator 0:bb348c97df44 853 #define __SEL __sel
lypinator 0:bb348c97df44 854 #define __QADD __qadd
lypinator 0:bb348c97df44 855 #define __QSUB __qsub
lypinator 0:bb348c97df44 856
lypinator 0:bb348c97df44 857 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
lypinator 0:bb348c97df44 858 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
lypinator 0:bb348c97df44 859
lypinator 0:bb348c97df44 860 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
lypinator 0:bb348c97df44 861 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
lypinator 0:bb348c97df44 862
lypinator 0:bb348c97df44 863 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
lypinator 0:bb348c97df44 864 ((int64_t)(ARG3) << 32U) ) >> 32U))
lypinator 0:bb348c97df44 865
lypinator 0:bb348c97df44 866 #endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
lypinator 0:bb348c97df44 867 /*@} end of group CMSIS_SIMD_intrinsics */
lypinator 0:bb348c97df44 868
lypinator 0:bb348c97df44 869
lypinator 0:bb348c97df44 870 #endif /* __CMSIS_ARMCC_H */