Liangzhen Lai / Mbed 2 deprecated DDRO_Farrari

Dependencies:   mbed

Dependents:   Orange_Ferrari_board_functional

Committer:
liangzhen
Date:
Mon Oct 07 22:58:19 2013 +0000
Revision:
0:84a8bcfbdec9
power sensor tested;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
liangzhen 0:84a8bcfbdec9 1 /*
liangzhen 0:84a8bcfbdec9 2 This is the JTAG driver file for mbed master
liangzhen 0:84a8bcfbdec9 3 Refer to buspriate + openOCD
liangzhen 0:84a8bcfbdec9 4 */
liangzhen 0:84a8bcfbdec9 5
liangzhen 0:84a8bcfbdec9 6 // Addresses
liangzhen 0:84a8bcfbdec9 7 #define DHCSR_ADDR 0xE000EDF0
liangzhen 0:84a8bcfbdec9 8 #define DCRSR_ADDR 0xE000EDF4
liangzhen 0:84a8bcfbdec9 9 #define DCRDR_ADDR 0xE000EDF8
liangzhen 0:84a8bcfbdec9 10 #define DEMCR_ADDR 0xE000EDFC
liangzhen 0:84a8bcfbdec9 11
liangzhen 0:84a8bcfbdec9 12 #define DHCSR_DBGKEY 0xA05F0000
liangzhen 0:84a8bcfbdec9 13 #define DHCSR_S_RESET_ST 0x2000000
liangzhen 0:84a8bcfbdec9 14 #define DHCSR_S_RETIRE_ST 0x1000000
liangzhen 0:84a8bcfbdec9 15 #define DHCSR_S_LOCKUP 0x80000
liangzhen 0:84a8bcfbdec9 16 #define DHCSR_S_SLEEP 0x40000
liangzhen 0:84a8bcfbdec9 17 #define DHCSR_S_HALT 0x20000
liangzhen 0:84a8bcfbdec9 18 #define DHCSR_S_REGRDY 0x10000
liangzhen 0:84a8bcfbdec9 19 #define DHCSR_C_SNAPSTALL 0x20
liangzhen 0:84a8bcfbdec9 20 #define DHCSR_C_MASKINTS 0x8
liangzhen 0:84a8bcfbdec9 21 #define DHCSR_C_STEP 0x4
liangzhen 0:84a8bcfbdec9 22 #define DHCSR_C_HALT 0x2
liangzhen 0:84a8bcfbdec9 23 #define DHCSR_C_DEBUGEN 0x1
liangzhen 0:84a8bcfbdec9 24
liangzhen 0:84a8bcfbdec9 25 #define DCRSR_REGWnR 0x10000
liangzhen 0:84a8bcfbdec9 26 #define DCRSR_xPSR 0x10
liangzhen 0:84a8bcfbdec9 27 #define DCRSR_MSP 0x11
liangzhen 0:84a8bcfbdec9 28 #define DCRSR_PSP 0x12
liangzhen 0:84a8bcfbdec9 29 #define DCRSR_CONTROL 0x14
liangzhen 0:84a8bcfbdec9 30
liangzhen 0:84a8bcfbdec9 31 #define DEMCR_TRCENA 0x1000000
liangzhen 0:84a8bcfbdec9 32 #define DEMCR_MON_REQ 0x80000
liangzhen 0:84a8bcfbdec9 33 #define DEMCR_MON_STEP 0x40000
liangzhen 0:84a8bcfbdec9 34 #define DEMCR_MON_PEND 0x20000
liangzhen 0:84a8bcfbdec9 35 #define DEMCR_MON_EN 0x10000
liangzhen 0:84a8bcfbdec9 36 #define DEMCR_VC_HARDERR 0x400
liangzhen 0:84a8bcfbdec9 37 #define DEMCR_VC_INTERR 0x200
liangzhen 0:84a8bcfbdec9 38 #define DEMCR_VC_BUSERR 0x100
liangzhen 0:84a8bcfbdec9 39 #define DEMCR_VC_STATERR 0x80
liangzhen 0:84a8bcfbdec9 40 #define DEMCR_VC_CHKERR 0x40
liangzhen 0:84a8bcfbdec9 41 #define DEMCR_VC_NOCPERR 0x20
liangzhen 0:84a8bcfbdec9 42 #define DEMCR_VC_MMERR 0x10
liangzhen 0:84a8bcfbdec9 43 #define DEMCR_VC_CORERESET 0x1
liangzhen 0:84a8bcfbdec9 44
liangzhen 0:84a8bcfbdec9 45
liangzhen 0:84a8bcfbdec9 46
liangzhen 0:84a8bcfbdec9 47 #define AP 1
liangzhen 0:84a8bcfbdec9 48 #define DP 0
liangzhen 0:84a8bcfbdec9 49
liangzhen 0:84a8bcfbdec9 50 #define READ 1
liangzhen 0:84a8bcfbdec9 51 #define WRITE 0
liangzhen 0:84a8bcfbdec9 52
liangzhen 0:84a8bcfbdec9 53 #define DP_CTRLSTAT 0x4
liangzhen 0:84a8bcfbdec9 54 #define DP_SELECT 0x8
liangzhen 0:84a8bcfbdec9 55 #define DP_RDBUFF 0xC
liangzhen 0:84a8bcfbdec9 56
liangzhen 0:84a8bcfbdec9 57 #define AP_CSW 0x0
liangzhen 0:84a8bcfbdec9 58 #define AP_TAR 0x4
liangzhen 0:84a8bcfbdec9 59 #define AP_SELECT 0x8
liangzhen 0:84a8bcfbdec9 60 #define AP_DRW 0xC
liangzhen 0:84a8bcfbdec9 61 #define AP_BD0 0x10
liangzhen 0:84a8bcfbdec9 62 #define AP_BD1 0x14
liangzhen 0:84a8bcfbdec9 63 #define AP_BD2 0x18
liangzhen 0:84a8bcfbdec9 64 #define AP_BD3 0x1C
liangzhen 0:84a8bcfbdec9 65 #define AP_CFG 0xF4
liangzhen 0:84a8bcfbdec9 66 #define AP_BASE 0xF8
liangzhen 0:84a8bcfbdec9 67 #define AP_IDR 0xFC
liangzhen 0:84a8bcfbdec9 68
liangzhen 0:84a8bcfbdec9 69 #define JTAG_ABORT 0x8
liangzhen 0:84a8bcfbdec9 70 #define JTAG_DPACC 0xA
liangzhen 0:84a8bcfbdec9 71 #define JTAG_APACC 0xB
liangzhen 0:84a8bcfbdec9 72 #define JTAG_IDCODE 0xE
liangzhen 0:84a8bcfbdec9 73 #define JTAG_BYPASS 0xF
liangzhen 0:84a8bcfbdec9 74
liangzhen 0:84a8bcfbdec9 75
liangzhen 0:84a8bcfbdec9 76 #define SW_DP_ACK_OK 1
liangzhen 0:84a8bcfbdec9 77 #define SW_DP_ACK_WAIT 2
liangzhen 0:84a8bcfbdec9 78 #define SW_DP_ACK_FAULT 4
liangzhen 0:84a8bcfbdec9 79
liangzhen 0:84a8bcfbdec9 80 #ifndef JTAG_H
liangzhen 0:84a8bcfbdec9 81 #define JTAG_H
liangzhen 0:84a8bcfbdec9 82
liangzhen 0:84a8bcfbdec9 83 class JTAG
liangzhen 0:84a8bcfbdec9 84 {
liangzhen 0:84a8bcfbdec9 85 public:
liangzhen 0:84a8bcfbdec9 86
liangzhen 0:84a8bcfbdec9 87 // Memory
liangzhen 0:84a8bcfbdec9 88 unsigned int memRead(unsigned int baseaddr, unsigned int readdata[], int size, bool check=false, bool print=false);
liangzhen 0:84a8bcfbdec9 89 void memWrite(unsigned int baseaddr, unsigned int writedata[], int size, bool zero=false);
liangzhen 0:84a8bcfbdec9 90 unsigned int readMemory(unsigned int address);
liangzhen 0:84a8bcfbdec9 91 void writeMemory(unsigned int address, unsigned int value);
liangzhen 0:84a8bcfbdec9 92 int loadProgram();
liangzhen 0:84a8bcfbdec9 93
liangzhen 0:84a8bcfbdec9 94 // ------------------------------------------------
liangzhen 0:84a8bcfbdec9 95 // DP/AP Config
liangzhen 0:84a8bcfbdec9 96 unsigned int rdBuff(bool set_ir);
liangzhen 0:84a8bcfbdec9 97 unsigned int readDPACC(unsigned char addr, bool set_ir=true, bool rdthis=true);
liangzhen 0:84a8bcfbdec9 98 unsigned int readAPACC(unsigned char addr, bool set_ir=true, bool rdthis=true);
liangzhen 0:84a8bcfbdec9 99 void writeAPACC(unsigned int data, unsigned char addr, bool set_ir=true);
liangzhen 0:84a8bcfbdec9 100 void writeDPACC(unsigned int data, unsigned char addr, bool set_ir=true);
liangzhen 0:84a8bcfbdec9 101 void writeBanksel(unsigned int banksel, bool set_ir=true);
liangzhen 0:84a8bcfbdec9 102 void DAP_enable(void);
liangzhen 0:84a8bcfbdec9 103 void PowerupDAP();
liangzhen 0:84a8bcfbdec9 104
liangzhen 0:84a8bcfbdec9 105 // --------------------------------
liangzhen 0:84a8bcfbdec9 106 // State Manipulation
liangzhen 0:84a8bcfbdec9 107 void setIR(unsigned char A);
liangzhen 0:84a8bcfbdec9 108 void setState(unsigned char c);
liangzhen 0:84a8bcfbdec9 109 void leaveState(void);
liangzhen 0:84a8bcfbdec9 110 void reset(void);
liangzhen 0:84a8bcfbdec9 111 unsigned int readID(void);
liangzhen 0:84a8bcfbdec9 112
liangzhen 0:84a8bcfbdec9 113 // --------------------------------------------
liangzhen 0:84a8bcfbdec9 114 // Data Shifting
liangzhen 0:84a8bcfbdec9 115 unsigned int shiftBits(unsigned int data, int n);
liangzhen 0:84a8bcfbdec9 116 unsigned int shiftData(unsigned int data, char addr, bool rw);
liangzhen 0:84a8bcfbdec9 117
liangzhen 0:84a8bcfbdec9 118 // ----------------------------------
liangzhen 0:84a8bcfbdec9 119 // Toggle Functions
liangzhen 0:84a8bcfbdec9 120 void DataLow(void);
liangzhen 0:84a8bcfbdec9 121 void DataHigh(void);
liangzhen 0:84a8bcfbdec9 122 void clockLow(void);
liangzhen 0:84a8bcfbdec9 123 void clockHigh(void);
liangzhen 0:84a8bcfbdec9 124 void clockTicks(unsigned char c);
liangzhen 0:84a8bcfbdec9 125 void TMSHigh(void);
liangzhen 0:84a8bcfbdec9 126 void TMSLow(void);
liangzhen 0:84a8bcfbdec9 127
liangzhen 0:84a8bcfbdec9 128 // --------------------------------
liangzhen 0:84a8bcfbdec9 129 // Initializing and Config
liangzhen 0:84a8bcfbdec9 130 JTAG();
liangzhen 0:84a8bcfbdec9 131 void setJTAGspeed(int speed);
liangzhen 0:84a8bcfbdec9 132
liangzhen 0:84a8bcfbdec9 133
liangzhen 0:84a8bcfbdec9 134
liangzhen 0:84a8bcfbdec9 135 char state; // n=null, r=reset, d=data, i=instruction
liangzhen 0:84a8bcfbdec9 136 int delay; // wait time for each signal switching, in us
liangzhen 0:84a8bcfbdec9 137 };
liangzhen 0:84a8bcfbdec9 138
liangzhen 0:84a8bcfbdec9 139 #endif